RE: [PATCH] drm/amdgpu: Refactor mode2 reset logic for v13.0.2

[Public] Reviewed-by: Hawking Zhang Regards, Hawking -Original Message- From: Lazar, Lijo Sent: Thursday, March 3, 2022 11:33 To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Zhang, Hawking Subject: RE: [PATCH] drm/amdgpu: Refactor mode2 reset logic for v13.0.

[PATCH] drm/amdgpu: fix a wrong ib reference

It should be p->job->ibs[j] instead of p->job->ibs[i] here. Fixes: 1027d5d791b7 (drm/amdgpu: use job and ib structures directly in CS parsers) Signed-off-by: Lang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gp

[PATCH 00/21] DC Patches Mar 7, 2022

This DC patchset brings improvements in multiple areas. In summary, we have: * Remove FPU-related code from dcn20/21/303 to dml folder; * Fixes related to clock_source_create; * Several enhancements in DC/DMUB; This version brings along following fixes: - move FPU operations from dcn21 t

[PATCH 01/21] drm/amd/display: fix deep color ratio

From: Hansen Dsouza Fix enum mapping for deep color ratio Reviewed-by: Charlene Liu Acked-by: Alan Liu Signed-off-by: Hansen Dsouza --- .../drm/amd/display/dc/dce/dce_clock_source.c | 100 ++ .../drm/amd/display/dc/dce/dce_clock_source.h | 9 ++ .../drm/amd/display/dc/dcn31

[PATCH 03/21] drm/amd/display: fix the clock source contruct for dcn315

From: "Charlene Liu" [why] Driver sends invalid deep color ratio to DMUB. Update it to the right one by using another clock source construct. Reviewed-by: Hansen Dsouza Acked-by: Alan Liu Signed-off-by: Charlene Liu --- drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c | 2 +- 1 file c

[PATCH 04/21] drm/amd/display: Clean up fixed VS PHY test w/a function

From: George Shen [Why] Unify naming for fixed VS workarounds. [How] Rename function to match naming convention. Refactor code to remove unused function. Reviewed-by: Wenjing Liu Acked-by: Alan Liu Signed-off-by: George Shen --- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 55 ++-

[PATCH 05/21] drm/amd/display: Add minimal pipe split transition state

From: Dillon Varone [WHY?] When adding/removng a plane to some configurations, unsupported pipe programming can occur when moving to a new plane. [HOW?] Add a safe transistion state before programming new configuration. Reviewed-by: Aric Cyr Acked-by: Alan Liu Signed-off-by: Dillon Varone --

[PATCH 06/21] drm/amd/display: Release AUX engine after failed acquire

From: Wyatt Wood [Why] There is a sequence in which aux arbitration doesn't work correctly. Driver is left with aux access after it times out waiting for access. In future dmub fw is never granted aux access and is stuck in a while loop. [How] Cancel aux request from driver after timing out. Re

[PATCH 07/21] drm/amd/display: move FPU associated DCN303 code to DML folder

From: "Dhillon, Jasdeep" [Why & How] As part of the FPU isolation work documented in https://patchwork.freedesktop.org/series/93042/, isolate code that uses FPU in DCN303 to DML, where all FPU code should locate. Co-authored-by: Jasdeep Dhillon Reviewed-by: Rodrigo Siqueira Acked-by: Alan Liu

[PATCH 08/21] drm/amd/display: Add link dp trace support

From: "Leo (Hanghong) Ma" [Why] It is nice to have link training and link loss status logging in our trace, and this patch add the all necessary accessors in dc side. [How] 1. Define dp_trace struct and create new file link_dp_trace.c and link_dp_trace.h; 2. Add dp link training status update in

[PATCH 09/21] drm/amd/display: merge two duplicated clock_source_create

From: Charlene Liu [why] dcn31x could use dcn31 sepcific which contains deep_color_ratio for dmub Reviewed-by: Nevenko Stupar Reviewed-by: Hansen Dsouza Reviewed-by: Aric Cyr Acked-by: Alan Liu Signed-off-by: Charlene Liu --- .../drm/amd/display/dc/dce/dce_clock_source.c | 127 ++--

[PATCH 10/21] drm/amd/display: add gamut coefficient set A and B

From: Jingwen Zhu [Why] Screen shake on DCN3 night light SDR BR3. [How] Change the logic to use double buffer reisgter on gamut settings. Reviewed-by: Krunoslav Kovac Acked-by: Alan Liu Signed-off-by: Jingwen Zhu --- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 2 +- 1 file changed

[PATCH 11/21] drm/amd/display: disable HPD SW timer for passive dongle type 1 only

From: Sung Joon Kim [why] Need to provide this workaround only for type 1 passive dongle [how] Detect if dongle is type 1 or 2. And use it to determine if w/a is needed. Reviewed-by: Charlene Liu Acked-by: Alan Liu Signed-off-by: Sung Joon Kim --- drivers/gpu/drm/amd/display/dc/core/dc_link

[PATCH 12/21] drm/amd/display: handle DP2.0 RX with UHBR20 but not UHBR13.5 support

From: Wenjing Liu [why] DP2.0 defines DP2.0 RX capability using bit maps. This means there is a corner case the DP2.0 RX can declare UHBR20 capability but not UHBR13.5 support. In this case we should skip UHBR13.5 selection and continue to our next option in decide liink settings. Reviewed-by:

[PATCH 13/21] drm/amd/display: enable dcn315/316 s0i2 support

From: Charlene Liu [why] enable the support in driver, let the control by CMOS Reviewed-by: Aric Cyr Acked-by: Alan Liu Signed-off-by: Charlene Liu --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 2 +- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 3 +-

[PATCH 14/21] drm/amd/display: [FW Promotion] Release 0.0.107.0

From: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Alan Liu Signed-off-by: Anthony Koo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub

[PATCH 15/21] drm/amd/display: 3.2.176

From: Aric Cyr drm/amd/display: 3.2.176 This version brings along following fixes: - move FPU operations from dcn21 to dml/dcn20 folder - move FPU-related code from dcn20 to dml folder - Fix compile error from TO_CLK_MGR_INTERNAL - Fix double free during GPU reset on DC strea

[PATCH 16/21] drm/amd/display: Add NULL check

From: Chris Park [Why] Virtualization enters blue screen of death (BSoD) due to NULL res_pool object when accessing DSC encoder capability. [How] Add NULL check to avoid blue screen of death. Reviewed-by: Aric Cyr Acked-by: Alan Liu Signed-off-by: Chris Park --- drivers/gpu/drm/amd/display/

[PATCH 17/21] drm/amd/display: Fix double free during GPU reset on DC streams

From: Nicholas Kazlauskas [Why] The issue only occurs during the GPU reset code path. We first backup the current state prior to commiting 0 streams internally from DM to DC. This state backup contains valid link encoder assignments. DC will clear the link encoder assignments as part of current

[PATCH 18/21] drm/amd/display: Fix compile error from TO_CLK_MGR_INTERNAL

From: Leo Li [Why] On LNX, TO_CLK_MGR_INTERNAL() only works to get clk_mgr_internal from a given clk_mgr. In clk_mgr_dcn316 struct, the clk_mgr_internal is already a memeber by the alias 'base' [How] Use &clk_mgr->base instead. Reviewed-by: Harry Wentland Acked-by: Alan Liu Signed-off-by: L

[PATCH 19/21] drm/amd/display: move FPU-related code from dcn20 to dml folder

From: Melissa Wen Move parts of dcn20 code that uses FPU to dml folder. It aims to isolate FPU operations as described by series: drm/amd/display: Introduce FPU directory inside DC https://patchwork.freedesktop.org/series/93042/ This patch moves the following functions from dcn20_resource to dm

[PATCH 20/21] drm/amd/display: move FPU operations from dcn21 to dml/dcn20 folder

From: Melissa Wen dml/dcn20_fpu file centralizes all DCN2x functions that require FPU access. Therefore, this patch moves FPU-related code from dcn21 to dcn20_fpu. These include: - dcn21_populate_dml_pipes_from_context() - dcn21_validate_bandwidth_fp() and related: - dcn21_calculate_wm(), - p

[PATCH 21/21] drm/amd/display: move FPU code from dcn10 to dml/dcn10 folder

From: Melissa Wen FPU operations in dcn10 was already moved to dml folder via calcs code. However, dcn1_0_ip and dcn_1_0_soc with FPU componentd remains on dcn10. Following previous changes to isolate FPU, this patch creates dcn10_fpu files to isolate FPU-specific code and moves those structs to

RE: [PATCH] drm/amdgpu: Disable baco dummy mode

[AMD Official Use Only] Reviewed-by: Hawking Zhang Regards, Hawking -Original Message- From: Lazar, Lijo Sent: Thursday, March 3, 2022 11:46 To: amd-gfx@lists.freedesktop.org Cc: Zhang, Hawking ; Deucher, Alexander Subject: [PATCH] drm/amdgpu: Disable baco dummy mode On aldebaran, B

[PATCH 02/21] drm/amd/display: cleaning up smu_if to add future flexibility

From: Martin Leung why and how: need to hook in new smu interfaces cleaning up code that used old variables Reviewed-by: Nevenko Stupar Acked-by: Alan Liu Signed-off-by: Martin Leung --- .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 13 +--- .../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c |

Re: [PATCH] drm/amdgpu: fix a wrong ib reference

Am 07.03.22 um 05:03 schrieb Lang Yu: It should be p->job->ibs[j] instead of p->job->ibs[i] here. Rebase fallout, thanks for fixing! Fixes: 1027d5d791b7 (drm/amdgpu: use job and ib structures directly in CS parsers) Signed-off-by: Lang Yu Reviewed-by: Christian König --- drivers/gp

[PATCH 1/2] drm/amdgpu: change registers in error checking for smu 13.0.5

smu 13.0.5 use new registers for smu msg and param. Signed-off-by: Yifan Zhang --- drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c index 590a6ed1