Re: [PATCH 1/6] dma-buf: move dma_resv_prune_unlocked into dma_resv.c

On 28-10-2021 15:26, Christian König wrote: > The i915 driver implements a prune function which is called when it is very > likely that the fences inside the dma_resv object can be removed because they > are all signaled. > > Move that function into the dma-resv.c code since the behavior of pruning

Re: [PATCH 1/6] dma-buf: move dma_resv_prune_unlocked into dma_resv.c

Am 25.11.21 um 10:31 schrieb Maarten Lankhorst: [SNIP] diff --git a/include/linux/dma-resv.h b/include/linux/dma-resv.h index eebf04325b34..e0558429a5ee 100644 --- a/include/linux/dma-resv.h +++ b/include/linux/dma-resv.h @@ -458,6 +458,7 @@ void dma_resv_fini(struct dma_resv *obj); int dma_re

[PATCH 1/9] drm/amdgpu:Define the unified ras function pointers of each IP block

Define an unified ras function pointers for each ip block to adapt. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 20 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 36 - 2 files changed, 37 insertions(+), 19 deletions(-) diff --git a/dr

[PATCH 2/9] drm/amdgpu: Modify gfx block to fit for the unified ras function pointers.

Modify gfx block ras functions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 11 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 24 ++--- drivers/gpu/drm

[PATCH 3/9] drm/amdgpu: Modify gmc block to fit for the unified ras function pointers.

Modify gmc block ras functions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 8 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 7 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/a

[PATCH 4/9] drm/amdgpu: Modify hdp block to fit for the unified ras function pointers.

Modify hdp block ras functions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 8 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h | 7 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8 drivers/gpu/drm/amd/amdgpu/

[PATCH 5/9] drm/amdgpu: Modify mca block to fit for the unified ras function pointers.

Modify mca block ras functions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h | 8 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 12 +- drivers/gpu/drm/amd/amd

[PATCH 6/9] drm/amdgpu: Modify mmhub block to fit for the unified ras function pointers.

Modify mmhub block ras funcions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c| 8 drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h | 9 ++--- drivers/gpu/drm

[PATCH 7/9] drm/amdgpu: Modify nbio block to fit for the unified ras function pointers.

Modify nbio block ras functions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h | 7 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 8 +--- drivers/gpu/drm/amd/amdgpu/soc

[PATCH 8/9] drm/amdgpu: Modify umc block to fit for the unified ras function pointers.

Modify umc block ras functions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 8 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 12 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 8 drivers/gpu/drm/amd/am

[PATCH 9/9] drm/amdgpu: Modify sdma block to fit for the unified ras function pointers.

Modify sdma block ras functions to fit for the unified ras function pointers. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 11 +++ drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 42 drivers/

Re: [PATCH 1/9] drm/amdgpu:Define the unified ras function pointers of each IP block

On 11/25/2021 4:26 PM, yipechai wrote: Define an unified ras function pointers for each ip block to adapt. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 20 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 36 - 2 files changed, 37

[PATCH] drm/amd/pm: Add warning for unexpected PG requests

Ideally power gate/ungate requests shouldn't come when smu block is uninitialized. Add a WARN message to check the origins if such a thing ever happens. Signed-off-by: Lijo Lazar --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a

RE: [PATCH] drm/amd/pm: Add warning for unexpected PG requests

[Public] Use dev_warn to be mGPU friendly? Regards, Guchun -Original Message- From: amd-gfx On Behalf Of Lijo Lazar Sent: Thursday, November 25, 2021 7:51 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Limonciello, Mario ; Zhang, Hawking Subject: [PATCH] drm/amd/pm: Add

Re: [PATCH] drm/amd/pm: Add warning for unexpected PG requests

On 11/25/2021 6:52 PM, Chen, Guchun wrote: [Public] Use dev_warn to be mGPU friendly? The intention is to get a trace as well along with that. There are multiple paths to this function. Thanks, Lijo Regards, Guchun -Original Message- From: amd-gfx On Behalf Of Lijo Lazar Sen

RE: [PATCH] drm/amd/pm: Add warning for unexpected PG requests

[Public] Thanks for clarification, Lijo. Reviewed-by: Guchun Chen Regards, Guchun -Original Message- From: Lazar, Lijo Sent: Thursday, November 25, 2021 9:32 PM To: Chen, Guchun ; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Limonciello, Mario ; Zhang, Hawking Subject: Re

Re: [PATCH v6] drm/amdgpu: handle IH ring1 overflow

On 2021-11-24 8:56 p.m., Felix Kuehling wrote: Am 2021-11-24 um 5:58 p.m. schrieb Philip Yang: IH ring1 is used to process GPU retry fault, overflow is enabled to drain retry fault because we want receive other interrupts while handling retry

Re: [PATCH v6] drm/amdgpu: handle IH ring1 overflow

On 2021-11-25 2:11 a.m., Christian König wrote: Am 25.11.21 um 02:56 schrieb Felix Kuehling: Am 2021-11-24 um 5:58 p.m. schrieb Philip Yang: [SNIP]   #define amdgpu_ih_get_wptr(adev, ih) (adev)->

[PATCH v7] drm/amdgpu: handle IH ring1 overflow

IH ring1 is used to process GPU retry fault, overflow is enabled to drain retry fault because we want receive other interrupts while handling retry fault to recover range. There is no overflow flag set when wptr pass rptr. Use timestamp of rptr and wptr to handle overflow and drain retry fault. If

Re: [PATCH v5] drm/amdgpu: handle IH ring1 overflow

On 2021-11-25 2:03 a.m., Christian König wrote: Am 24.11.21 um 21:20 schrieb Felix Kuehling: Am 2021-11-24 um 10:23 a.m. schrieb philip yang:      #define amdgpu_ih_get_wptr(adev, ih)

[PATCH 0/6] Expand display core documentation

Display Core (DC) is one of the components under amdgpu, and it has multiple features directly related to the KMS API. Unfortunately, we don't have enough documentation about DC in the upstream, which makes the life of some external contributors a little bit more challenging. For these reasons, thi

[PATCH 2/6] Documentation/gpu: Document amdgpu_dm_visual_confirm debugfs entry

Display core provides a feature that makes it easy for users to debug Multiple planes by enabling a visual notification at the bottom of each plane. This commit introduces how to use such a feature. Signed-off-by: Rodrigo Siqueira --- .../gpu/amdgpu-dc/amdgpu-dc-debug.rst | 34 ++

[PATCH 3/6] Documentation/gpu: Document pipe split visual confirmation

Display core provides a feature that makes it easy for users to debug Pipe Split. This commit introduces how to use such a debug option. Signed-off-by: Rodrigo Siqueira --- .../gpu/amdgpu-dc/amdgpu-dc-debug.rst | 28 +-- 1 file changed, 26 insertions(+), 2 deletions(-) d

[PATCH 1/6] Documentation/gpu: Reorganize DC documentation

Display core documentation is not well organized, and it is hard to find information due to the lack of sections. This commit reorganizes the documentation layout, and it is preparation work for future changes. Signed-off-by: Rodrigo Siqueira --- Documentation/gpu/amdgpu-dc.rst | 7

[PATCH 4/6] Documentation/gpu: How to collect DTN log

Introduce how to collect DTN log from debugfs. Signed-off-by: Rodrigo Siqueira --- Documentation/gpu/amdgpu-dc/amdgpu-dc-debug.rst | 17 + 1 file changed, 17 insertions(+) diff --git a/Documentation/gpu/amdgpu-dc/amdgpu-dc-debug.rst b/Documentation/gpu/amdgpu-dc/amdgpu-dc-debug

[PATCH 6/6] Documentation/gpu: Add DC glossary

In the DC driver, we have multiple acronyms that are not obvious most of the time. This commit introduces a DC glossary in order to make it easier to navigate through our driver. Signed-off-by: Rodrigo Siqueira --- Documentation/gpu/amdgpu-dc/amdgpu-dc.rst | 2 +- Documentation/gpu/amdgpu-dc

[PATCH 5/6] Documentation/gpu: Add basic overview of DC pipeline

This commit describes how DCN works by providing high-level diagrams with an explanation of each component. In particular, it details the Global Sync signals. Signed-off-by: Rodrigo Siqueira --- Documentation/gpu/amdgpu-dc/amdgpu-dc.rst | 22 +- .../gpu/amdgpu-dc/amdgpu-dcn-overview.rst

Re: [PATCH] drm/amd/display: fix application of sizeof to pointer

On 2021-11-23 10:04 p.m., cgel@gmail.com wrote: From: Lv Ruyi Both of split and merge are pointers, not arrays. Reported-by: Zeal Robot Signed-off-by: Lv Ruyi --- drivers/gpu/drm/amd/display/dc/dml/dml_wrapper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH] drm/amd/pm: Add warning for unexpected PG requests

Am 2021-11-25 um 8:32 a.m. schrieb Lazar, Lijo: > > > On 11/25/2021 6:52 PM, Chen, Guchun wrote: >> [Public] >> >> Use dev_warn to be mGPU friendly? > > The intention is to get a trace as well along with that. There are > multiple paths to this function. There is also a dev_WARN and dev_WARN_ONCE.

Re: [PATCH v7] drm/amdgpu: handle IH ring1 overflow

Am 2021-11-25 um 10:16 a.m. schrieb Philip Yang: > IH ring1 is used to process GPU retry fault, overflow is enabled to > drain retry fault because we want receive other interrupts while > handling retry fault to recover range. There is no overflow flag set > when wptr pass rptr. Use timestamp of rp

Re: [PATCH v7] drm/amdgpu: handle IH ring1 overflow

Am 2021-11-25 um 12:52 p.m. schrieb Felix Kuehling: > Am 2021-11-25 um 10:16 a.m. schrieb Philip Yang: >> IH ring1 is used to process GPU retry fault, overflow is enabled to >> drain retry fault because we want receive other interrupts while >> handling retry fault to recover range. There is no o

Re: [PATCH v7] drm/amdgpu: handle IH ring1 overflow

On 2021-11-25 1:03 p.m., Felix Kuehling wrote: Am 2021-11-25 um 12:52 p.m. schrieb Felix Kuehling: Am 2021-11-25 um 10:16 a.m. schrieb Philip Yang: IH ring1 is used to process GPU retry fault, overflow is enabled to drain

[PATCH v8] drm/amdgpu: handle IH ring1 overflow

IH ring1 is used to process GPU retry fault, overflow is enabled to drain retry fault because we want receive other interrupts while handling retry fault to recover range. There is no overflow flag set when wptr pass rptr. Use timestamp of rptr and wptr to handle overflow and drain retry fault. If

Re: [PATCH v8] drm/amdgpu: handle IH ring1 overflow

Am 2021-11-25 um 3:30 p.m. schrieb Philip Yang: > IH ring1 is used to process GPU retry fault, overflow is enabled to > drain retry fault because we want receive other interrupts while > handling retry fault to recover range. There is no overflow flag set > when wptr pass rptr. Use timestamp of rpt

[PATCH v1] drm/amd/display: Add DP-HDMI PCON Support in DC

Signed-off-by: Fangzhi Zuo --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 15 .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 71 +++ drivers/gpu/drm/amd/display/dc/dc.h | 6 ++ drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 31 drivers/gpu/drm/amd/d

Re: [PATCH v2 2/2] drm/amdkfd: Slighly optimize 'init_doorbell_bitmap()'

Am 2021-11-23 um 3:46 p.m. schrieb Christophe JAILLET: > The 'doorbell_bitmap' bitmap has just been allocated. So we can use the > non-atomic '__set_bit()' function to save a few cycles as no concurrent > access can happen. > > Reviewed-by: Felix Kuehling > Signed-off-by: Christophe JAILLET Than

[PATCH AUTOSEL 5.15 24/39] drm/amd/pm: Remove artificial freq level on Navi1x

From: Lijo Lazar [ Upstream commit be83a5676767c99c2417083c29d42aa1e109a69d ] Print Navi1x fine grained clocks in a consistent manner with other SOCs. Don't show aritificial DPM level when the current clock equals min or max. Signed-off-by: Lijo Lazar Reviewed-by: Evan Quan Acked-by: Alex Deu

[PATCH AUTOSEL 5.15 25/39] drm/amd/amdkfd: Fix kernel panic when reset failed and been triggered again

From: shaoyunl [ Upstream commit 2cf49e00d40d5132e3d067b5aa6d84791929ab15 ] In SRIOV configuration, the reset may failed to bring asic back to normal but stop cpsch already been called, the start_cpsch will not be called since there is no resume in this case. When reset been triggered again,

[PATCH AUTOSEL 5.15 26/39] drm/amd/amdgpu: fix potential memleak

From: Bernard Zhao [ Upstream commit 27dfaedc0d321b4ea4e10c53e4679d6911ab17aa ] In function amdgpu_get_xgmi_hive, when kobject_init_and_add failed There is a potential memleak if not call kobject_put. Reviewed-by: Felix Kuehling Signed-off-by: Bernard Zhao Signed-off-by: Alex Deucher Signed-

[PATCH AUTOSEL 5.10 19/28] drm/amd/amdgpu: fix potential memleak

From: Bernard Zhao [ Upstream commit 27dfaedc0d321b4ea4e10c53e4679d6911ab17aa ] In function amdgpu_get_xgmi_hive, when kobject_init_and_add failed There is a potential memleak if not call kobject_put. Reviewed-by: Felix Kuehling Signed-off-by: Bernard Zhao Signed-off-by: Alex Deucher Signed-

[PATCH AUTOSEL 5.10 18/28] drm/amd/amdkfd: Fix kernel panic when reset failed and been triggered again

From: shaoyunl [ Upstream commit 2cf49e00d40d5132e3d067b5aa6d84791929ab15 ] In SRIOV configuration, the reset may failed to bring asic back to normal but stop cpsch already been called, the start_cpsch will not be called since there is no resume in this case. When reset been triggered again,

RE: [PATCH 1/9] drm/amdgpu:Define the unified ras function pointers of each IP block

Hi Lijo: I add my replay after your comment. Thanks, Thomas -Original Message- From: Lazar, Lijo Sent: Thursday, November 25, 2021 7:41 PM To: Chai, Thomas ; amd-gfx@lists.freedesktop.org Cc: Chai, Thomas Subject: Re: [PATCH 1/9] drm/amdgpu:Define the unified ras function pointers of

[PATCH] drm/amdgpu: fix the missed handling for SDMA2 and SDMA3

There is no base reg offset or ip_version set for SDMA2 and SDMA3 on SIENNA_CICHLID, so add them. Signed-off-by: Guchun Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/am

[PATCH] drm/amdgpu: declare static function to fix compiler warning

>> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:503:6: warning: no previous >> prototype for function 'release_psp_cmd_buf' [-Wmissing-prototypes] void release_psp_cmd_buf(struct psp_context *psp) ^ drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:503:1: note: declare 'static' if the function is

[PATCH v2] drm/amd/pm: Add warning for unexpected PG requests

v1: Ideally power gate/ungate requests shouldn't come when smu block is uninitialized. Add a WARN message to check the origins if such a thing ever happens. v2: Use dev_WARN to log device info (Felix/Guchun). Signed-off-by: Lijo Lazar --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 6 +- 1

Re: [PATCH] drm/amd/pm: Add warning for unexpected PG requests

On 11/25/2021 10:35 PM, Felix Kuehling wrote: Am 2021-11-25 um 8:32 a.m. schrieb Lazar, Lijo: On 11/25/2021 6:52 PM, Chen, Guchun wrote: [Public] Use dev_warn to be mGPU friendly? The intention is to get a trace as well along with that. There are multiple paths to this function. There

RE: [PATCH v2] drm/amd/pm: Add warning for unexpected PG requests

[Public] Reviewed-by: Guchun Chen Regards, Guchun -Original Message- From: amd-gfx On Behalf Of Lijo Lazar Sent: Friday, November 26, 2021 1:25 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Limonciello, Mario ; Zhang, Hawking Subject: [PATCH v2] drm/amd/pm: Add warnin

Re: [PATCH] drm/amdgpu: fix the missed handling for SDMA2 and SDMA3

[AMD Official Use Only] Reviewed-by: Kevin Wang Best Regards, Kevin From: amd-gfx on behalf of Guchun Chen Sent: Friday, November 26, 2021 1:12 PM To: amd-gfx@lists.freedesktop.org ; Deucher, Alexander ; Koenig, Christian ; Pan, Xinhui Cc: Chen, Guchun Su

Re: [PATCH] drm/amdgpu: declare static function to fix compiler warning

[AMD Official Use Only] Reviewed-by: Kevin Wang It is reasonable to modify it to a static function, which can be matched with function of acquire_psp_cmd_buf() . Best Regards, Kevin From: amd-gfx on behalf of Guchun Chen Sent: Friday, November 26, 2021 1:16

Re: [PATCH v2] drm/amd/pm: Add warning for unexpected PG requests

[AMD Official Use Only] Reviewed-by: Kevin Yang Best Regards, Kevin From: amd-gfx on behalf of Lijo Lazar Sent: Friday, November 26, 2021 1:25 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Limonciello, Mario ; Zhang, Hawking Subject: [PATCH

[PATCH] drm/amdgpu: Use MAX_HWIP instead of HW_ID_MAX

HW_ID_MAX considers HWID of all IPs, far more than what amdgpu uses. amdgpu tracks only the IPs defined by amd_hw_ip_block_type whose max is MAX_HWIP. Signed-off-by: Lijo Lazar --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu

Re: [PATCH 0/2] Create shared array of power profile name strings

On 11/25/2021 7:49 AM, Darren Powell wrote: == Description == All the power profile modes use the same strings (or a subset of) Creating a public array of the strings will allow sharing rather than duplicating for each chip First patch only implements change for navi10 Second patch e

RE: [PATCH] drm/amdgpu: Use MAX_HWIP instead of HW_ID_MAX

[Public] Reviewed-by: Guchun Chen Regards, Guchun -Original Message- From: amd-gfx On Behalf Of Lijo Lazar Sent: Friday, November 26, 2021 2:43 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Zhang, Hawking Subject: [PATCH] drm/amdgpu: Use MAX_HWIP instead of HW_ID_MAX