Modify hdp block ras functions to fit for the unified ras function pointers.

Signed-off-by: yipechai <yipeng.c...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c |  8 ++++----
 drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h |  7 ++-----
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c |  8 ++++----
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c   | 10 ++++++----
 5 files changed, 18 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index b7c462749d37..0aab31fce997 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -459,8 +459,8 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
        }
 
        if (adev->hdp.ras_funcs &&
-           adev->hdp.ras_funcs->ras_late_init) {
-               r = adev->hdp.ras_funcs->ras_late_init(adev);
+           adev->hdp.ras_funcs->ops.ras_late_init) {
+               r = adev->hdp.ras_funcs->ops.ras_late_init(adev);
                if (r)
                        return r;
        }
@@ -504,8 +504,8 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
                adev->gmc.xgmi.ras_funcs->ops.ras_fini(adev);
 
        if (adev->hdp.ras_funcs &&
-           adev->hdp.ras_funcs->ras_fini)
-               adev->hdp.ras_funcs->ras_fini(adev);
+           adev->hdp.ras_funcs->ops.ras_fini)
+               adev->hdp.ras_funcs->ops.ras_fini(adev);
 }
 
        /*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
index 7ec99d591584..49121eb7d599 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
@@ -22,13 +22,10 @@
  */
 #ifndef __AMDGPU_HDP_H__
 #define __AMDGPU_HDP_H__
+#include "amdgpu_ras.h"
 
 struct amdgpu_hdp_ras_funcs {
-       int (*ras_late_init)(struct amdgpu_device *adev);
-       void (*ras_fini)(struct amdgpu_device *adev);
-       void (*query_ras_error_count)(struct amdgpu_device *adev,
-                                     void *ras_error_status);
-       void (*reset_ras_error_count)(struct amdgpu_device *adev);
+       struct amdgpu_ras_block_ops ops;
 };
 
 struct amdgpu_hdp_funcs {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 7f830bf8f8df..a3b606c84d45 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -948,8 +948,8 @@ int amdgpu_ras_query_error_status(struct amdgpu_device 
*adev,
                break;
        case AMDGPU_RAS_BLOCK__HDP:
                if (adev->hdp.ras_funcs &&
-                   adev->hdp.ras_funcs->query_ras_error_count)
-                       adev->hdp.ras_funcs->query_ras_error_count(adev, 
&err_data);
+                   adev->hdp.ras_funcs->ops.query_ras_error_count)
+                       adev->hdp.ras_funcs->ops.query_ras_error_count(adev, 
&err_data);
                break;
        case AMDGPU_RAS_BLOCK__MCA:
                amdgpu_ras_mca_query_error_status(adev, &info->head, &err_data);
@@ -1040,8 +1040,8 @@ int amdgpu_ras_reset_error_status(struct amdgpu_device 
*adev,
                break;
        case AMDGPU_RAS_BLOCK__HDP:
                if (adev->hdp.ras_funcs &&
-                   adev->hdp.ras_funcs->reset_ras_error_count)
-                       adev->hdp.ras_funcs->reset_ras_error_count(adev);
+                   adev->hdp.ras_funcs->ops.reset_ras_error_count)
+                       adev->hdp.ras_funcs->ops.reset_ras_error_count(adev);
                break;
        default:
                break;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3606d2cbff5e..c40c669d49c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1301,8 +1301,8 @@ static int gmc_v9_0_late_init(void *handle)
                        adev->mmhub.ras_funcs->reset_ras_error_count(adev);
 
                if (adev->hdp.ras_funcs &&
-                   adev->hdp.ras_funcs->reset_ras_error_count)
-                       adev->hdp.ras_funcs->reset_ras_error_count(adev);
+                   adev->hdp.ras_funcs->ops.reset_ras_error_count)
+                       adev->hdp.ras_funcs->ops.reset_ras_error_count(adev);
        }
 
        r = amdgpu_gmc_ras_late_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
index 74b90cc2bf48..9021ea08ee0d 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
@@ -150,10 +150,12 @@ static void hdp_v4_0_init_registers(struct amdgpu_device 
*adev)
 }
 
 const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs = {
-       .ras_late_init = amdgpu_hdp_ras_late_init,
-       .ras_fini = amdgpu_hdp_ras_fini,
-       .query_ras_error_count = hdp_v4_0_query_ras_error_count,
-       .reset_ras_error_count = hdp_v4_0_reset_ras_error_count,
+       .ops = {
+               .ras_late_init = amdgpu_hdp_ras_late_init,
+               .ras_fini = amdgpu_hdp_ras_fini,
+               .query_ras_error_count = hdp_v4_0_query_ras_error_count,
+               .reset_ras_error_count = hdp_v4_0_reset_ras_error_count,
+       },
 };
 
 const struct amdgpu_hdp_funcs hdp_v4_0_funcs = {
-- 
2.25.1

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