[PATCH v2] drm/amdkfd: dqm fence memory corruption

Amdgpu driver uses 4-byte data type as DQM fence memory, and transmits GPU address of fence memory to microcode through query status PM4 message. However, query status PM4 message definition and microcode processing are all processed according to 8 bytes. Fence memory only allocates 4 bytes of memo

[PATCH] drm/amd/display: Simplify bool conversion

Fix the following coccicheck warning: ./drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c:3137:35-40: WARNING: conversion to bool not needed here Reported-by: Abaci Robot Suggested-by: Yang Li Signed-off-by: Abaci Team --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +

Re: [PATCH] drm/amdgpu: Limit the maximum size of contiguous VRAM that can be encapsulated by an instance of DRM memory node

Am 28.01.21 um 18:43 schrieb Ramesh Errabolu: [Why] Enable 1:1 mapping between VRAM of a DRM node and a scatterlist node [How] Ensure construction of DRM node to not exceed specified limit Signed-off-by: Ramesh Errabolu Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_

[PATCH] amdgpu: Add Missing Sienna Cichlid DID

The purpose of this patch is to add a missing device ID for Sienna Cichlid. The missing ID "0x73A1" is now added to the "amdgpu_drv.c" file. Signed-off-by: Ori Messinger --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amd

RE: [PATCH] amdgpu: Add Missing Sienna Cichlid DID

[AMD Public Use] Reviewed-by: Kent Russell > -Original Message- > From: amd-gfx On Behalf Of Ori > Messinger > Sent: Friday, January 29, 2021 7:43 AM > To: amd-gfx@lists.freedesktop.org > Cc: Messinger, Ori > Subject: [PATCH] amdgpu: Add Missing Sienna Cichlid DID > > The purpose of

Re: [PATCH v4 11/14] drm/amdgpu: Guard against write accesses after device removal

Am 28.01.21 um 18:23 schrieb Andrey Grodzovsky: On 1/19/21 1:59 PM, Christian König wrote: Am 19.01.21 um 19:22 schrieb Andrey Grodzovsky: On 1/19/21 1:05 PM, Daniel Vetter wrote: [SNIP] So say writing in a loop to some harmless scratch register for many times both for plugged and unplugge

[PATCH][next] drm/amdgpu: Fix memory leak of object caps on error return paths

From: Colin Ian King Currently there are three error return paths that don't kfree object caps. Fix this by performing the allocation of caps after the checks and error return paths to avoid the premature allocation and memory leaking. Addresses-Coverity: ("Resource leak") Fixes: 555fc7fbb2a2 (

Re: [PATCH] drm/amd/pm: enable ACDC feature

On Thu, Jan 28, 2021 at 10:07 PM Kenneth Feng wrote: > > The power limit and clock ragne are different in AC mode and DC mode. > Firmware does the setting after this feature is enabled. > Applied on mobile skus. > > Signed-off-by: Kenneth Feng Reviewed-by: Alex Deucher > --- > drivers/gpu/drm

[PATCH AUTOSEL 5.10 29/41] drm/amd/display: Update dram_clock_change_latency for DCN2.1

From: Jake Wang [ Upstream commit 901c1ec05ef277ce9d43cb806a225b28b3efe89a ] [WHY] dram clock change latencies get updated using ddr4 latency table, but does that update does not happen before validation. This value should not be the default and should be number received from df for better mode

[PATCH AUTOSEL 5.10 30/41] drm/amd/display: Allow PSTATE chnage when no displays are enabled

From: Aric Cyr [ Upstream commit 8bc3d461d0a95bbcc2a0a908bbadc87e198a86a8 ] [Why] When no displays are currently enabled, display driver should not disallow PSTATE switching. [How] Allow PSTATE switching if either the active configuration supports it, or there are no active displays. Tested-by

[PATCH AUTOSEL 5.10 31/41] drm/amd/display: Change function decide_dp_link_settings to avoid infinite looping

From: Bing Guo [ Upstream commit 4716a7c50c5c66d6ddc42401e1e0ba13b492e105 ] Why: Function decide_dp_link_settings() loops infinitely when required bandwidth can't be supported. How: Check the required bandwidth against verified_link_cap before trying to find a link setting for it. Tested-by: D

[PATCH AUTOSEL 5.10 33/41] drm/amd/display: Fixed corruptions on HPDRX link loss restore

From: Vladimir Stempen [ Upstream commit 4b08d8c78360241d270396a9de6eb774e88acd00 ] [why] Heavy corruption or blank screen reported on wake, with 6k display connected and FEC enabled [how] When Disable/Enable stream for display pipes on HPDRX, DC should take into account ODM split pipes. Teste

[PATCH AUTOSEL 5.10 32/41] drm/amd/display: Use hardware sequencer functions for PG control

From: Nicholas Kazlauskas [ Upstream commit c74f865f14318217350aa33363577cb95b06eb82 ] [Why & How] These can differ per ASIC or not be present. Don't call the dcn20 ones directly but rather the ones defined by the ASIC init table. Tested-by: Daniel Wheeler Signed-off-by: Nicholas Kazlauskas R

[PATCH AUTOSEL 5.4 15/19] drm/amd/display: Update dram_clock_change_latency for DCN2.1

From: Jake Wang [ Upstream commit 901c1ec05ef277ce9d43cb806a225b28b3efe89a ] [WHY] dram clock change latencies get updated using ddr4 latency table, but does that update does not happen before validation. This value should not be the default and should be number received from df for better mode

[PATCH AUTOSEL 5.4 16/19] drm/amd/display: Change function decide_dp_link_settings to avoid infinite looping

From: Bing Guo [ Upstream commit 4716a7c50c5c66d6ddc42401e1e0ba13b492e105 ] Why: Function decide_dp_link_settings() loops infinitely when required bandwidth can't be supported. How: Check the required bandwidth against verified_link_cap before trying to find a link setting for it. Tested-by: D

Re: [PATCH v4 11/14] drm/amdgpu: Guard against write accesses after device removal

On 1/29/21 10:16 AM, Christian König wrote: Am 28.01.21 um 18:23 schrieb Andrey Grodzovsky: On 1/19/21 1:59 PM, Christian König wrote: Am 19.01.21 um 19:22 schrieb Andrey Grodzovsky: On 1/19/21 1:05 PM, Daniel Vetter wrote: [SNIP] So say writing in a loop to some harmless scratch register

Re: [PATCH v4 11/14] drm/amdgpu: Guard against write accesses after device removal

Am 29.01.21 um 18:35 schrieb Andrey Grodzovsky: On 1/29/21 10:16 AM, Christian König wrote: Am 28.01.21 um 18:23 schrieb Andrey Grodzovsky: On 1/19/21 1:59 PM, Christian König wrote: Am 19.01.21 um 19:22 schrieb Andrey Grodzovsky: On 1/19/21 1:05 PM, Daniel Vetter wrote: [SNIP] So say wri

Re: [PATCH] drm/amd/display: Simplify bool conversion

On Thu, Jan 28, 2021 at 2:45 PM Abaci Team wrote: > > Fix the following coccicheck warning: > ./drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c:3137:35-40: > WARNING: conversion to bool not needed here > > Reported-by: Abaci Robot > Suggested-by: Yang Li > Signed-off-by: Abaci Team A

Re: [PATCH][next] drm/amdgpu: Fix memory leak of object caps on error return paths

On Fri, Jan 29, 2021 at 7:08 AM Colin King wrote: > > From: Colin Ian King > > Currently there are three error return paths that don't kfree object > caps. Fix this by performing the allocation of caps after the checks > and error return paths to avoid the premature allocation and memory > leaki

[PATCH 00/27] DC Patches Jan 29, 2021

This DC patchset brings improvements in multiple areas. In summary, we have: - Better handling of dummy p-state table - Workaround for some legacy DP-VGA dongles - Add Freesync HDMI support to DMCU - Enable "trigger_hotplug" debugfs on all outputs - fix initial bounding box values for dcn3.02 - imp

[PATCH 02/27] drm/amd/display: Fix DPCD translation for LTTPR AUX_RD_INTERVAL

From: George Shen [Why] The translation between the DPCD value and the specified AUX_RD_INTERVAL in the DP spec do not match. [How] Update values to match the spec. Signed-off-by: George Shen Reviewed-by: Wenjing Liu Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

[PATCH 03/27] drm/amd/display: initialize i2c speed if not initialized in dcnxxx__resource.c

From: Brendan Steve Leder Some dcnxxx__resource.c do not initialize the i2c speed; this patch adds the required initialization at dc_construct(). Signed-off-by: Brendan Steve Leder Reviewed-by: Charlene Liu Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dc/core/dc.c | 4 1 file c

[PATCH 01/27] drm/amd/display: Drop SOC bounding box hookup in DM/DC

From: Nicholas Kazlauskas [Why] There aren't any ASIC where we use these binaries and they aren't useful for future use since it's inconvenient to extend and maintain these structures. [How] Drop the support from DM and DC for now. Signed-off-by: Nicholas Kazlauskas Reviewed-by: Roman Li Acke

[PATCH 05/27] drm/amd/display: reuse current context instead of recreating one

From: Bhawanpreet Lakha [Why] Currently we discard the current context and recreate it. The current context is what is applied to the HW so we should be re-using this rather than creating a new context. Recreating the context can lead to mismatch between new context and the current context For

[PATCH 04/27] drm/amd/display: Add null pointer check to is_dig_enabled func

From: Michael Strauss [WHY] Safeguarding as pointer may be null in diagnostic environment Signed-off-by: Michael Strauss Reviewed-by: Sung Lee Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --

[PATCH 06/27] drm/amd/display: Set power_gated to true for seamless boot pipe init

From: Lewis Huang [Why] In seamless boot without a flip case, the flag power_gated didn't get cleared when resetting path mode because the plane_state is null. The following sequence will cause this issue: 1. OS call set mode to clone/extended 2. Reset path mode to remove edp [How] Set p

[PATCH 09/27] drm/amd/display: [FW Promotion] Release 0.0.49

From: Anthony Koo - Add field for passing line time for a frame Signed-off-by: Anthony Koo Reviewed-by: Anthony Koo Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/d

[PATCH 07/27] drm/amd/display: correct some hdcp variable naming

From: Wenjing Liu [why] In HDCP update stream config interface, some variables are named as xxx_supported, but in fact the variable indicates whether or not xxx_enabled. Correct the naming so it is less confusing to read the code. Signed-off-by: Wenjing Liu Reviewed-by: George Shen Acked-by: A

[PATCH 10/27] drm/amd/display: 3.2.120

From: Aric Cyr This DC update brings improvements in multiple areas. In summary, we highlight: - Fix display detection on HDMI ComboPHY - Drop SOC bounding box hookup - Fix DPCD values Signed-off-by: Aric Cyr Reviewed-by: Aric Cyr Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dc/d

[PATCH 08/27] drm/amd/display: Add more Clock Sources to DCN2.1

From: Sung Lee [WHY] When enabling HDMI on ComboPHY, there are not enough clock sources to complete display detection. [HOW] Initialize more clock sources. Signed-off-by: Sung Lee Reviewed-by: Tony Cheng Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 10 ++

[PATCH 11/27] drm/amd/display: fix calculation for the pwl backlight curve

From: Anthony Koo [Why] The PWL backlight curve is used by the firmware to convert between brightness and linear PWM value. Driver has a backlight LUT, but the firmware holds a PWL curve and interpolates between points. The calculations are incorrect leading to slightly off backlight values bein

[PATCH 12/27] drm/amd/display: Revert "Fix EDID parsing after resume from suspend"

From: Stylon Wang This reverts commit b24bdc37d03a0478189e20a50286092840f414fa. It caused memory leak after S3 on 4K HDMI displays. Signed-off-by: Stylon Wang Reviewed-by: Rodrigo Siqueira Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 -- 1 file changed, 2 d

[PATCH 13/27] drm/amd/display: Release DSC before acquiring

From: Mikita Lipski [why] Need to unassign DSC from pipes that are not using it so other pipes can acquire it. That is needed for asic's that have unmatching number of DSC engines from the number of pipes. [how] Before acquiring dsc to stream resources, first remove it. Signed-off-by: Mikita Li

[PATCH 19/27] drm/amd/display: Add Freesync HDMI support to DMCU

From: Stylon Wang [Why] Adding support for Freesync HDMI to DC and DMCU [How] Create DC interface and implementation on top of DMCU to support parsing CEA blocks in DMCU. Signed-off-by: Stylon Wang Reviewed-by: Hersen Wu Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dc/Makefile

[PATCH 15/27] drm/amd/display: implement support for DID2.0 dsc passthrough

From: Jun Lei [Why] Some panels contain active converters (e.g. DP to MIPI) which only support restricted DSC configurations. DID2.0 adds support for such displays to explicitly define per timing BPP restrictions on DSC. Ignoring these restrictions leads to blackscreen. [How] Add parsing in DI

[PATCH 21/27] drm/amd/display: Free atomic state after drm_atomic_commit

From: Victor Lu [why] drm_atomic_commit was changed so that the caller must free their drm_atomic_state reference on successes. [how] Add drm_atomic_commit_put after drm_atomic_commit call in dm_force_atomic_commit. Signed-off-by: Victor Lu Reviewed-by: Roman Li Acked-by: Anson Jacob --- dr

[PATCH 17/27] drm/amd/display: Fix CW4 programming for dmub30 cached inbox

From: Nicholas Kazlauskas [Why] The conditions for whether we used cached vs non-cached inbox1 depend on a version check that mismatches what the shared helpers in dmub20 implement. [How] Use the dmub_dcn20_use_cached_inbox check for dmub_dcn30 as well. Signed-off-by: Nicholas Kazlauskas Acked

[PATCH 23/27] drm/amd/display: Workaround for some legacy DP-VGA dongles

From: Taimur Hassan [Why] Maximum resolution is 1440*900 when connecting to FHD monitor via some DP-VGA dongles. The display EDID reading fails over AUX/I2C via DP->VGA dongle, and this leads to the maximum resolution 1920*1080 cannot be obtained from EDID. [How] Provide a workaround for some le

[PATCH 14/27] drm/amd/display: Fix dc_sink kref count in emulated_link_detect

From: Victor Lu [why] prev_sink is not used anywhere else in the function and the reference to it from dc_link is replaced with a new dc_sink. [how] Change dc_sink_retain(prev_sink) to dc_sink_release(prev_sink). Signed-off-by: Victor Lu Reviewed-by: Nicholas Kazlauskas Acked-by: Anson Jacob

[PATCH 16/27] drm/amd/display: fix initial bounding box values for dcn3.02

From: Samson Tam [Why] Initial bounding box values are updated in dcn30_update_bw_bounding_box but they use dcn3_0_soc and dcn3_0_ip instead of dcn3_02_soc and dcn3_02_ip [How] Add dcn302_update_bw_bounding_box and dcn302_get_optimal_dcfclk_fclk_for_uclk so it uses dcn3_02_soc and dcn3_02_ip

[PATCH 18/27] drm/amd/display: Enable "trigger_hotplug" debugfs on all outputs

From: Stylon Wang [Why] Per-connector debugfs entry "trigger_hotplug" is available on DP/eDP only. New IGT tests need this entry to test other outputs. [How] Enable this debugfs entry on all types of connectors Signed-off-by: Stylon Wang Reviewed-by: Mikita Lipski Acked-by: Anson Jacob ---

[PATCH 25/27] drm/amd/display: Reject too small viewport size when validating plane

From: Nikola Cornij [why] Overlay won't move to a new positon if viewport size is smaller than what can be handled. It'd either disappear or stay at the old position. This condition is for example hit if overlay is moved too much outside of left or top edge of the screen, but it applies to any no

[PATCH 20/27] drm/amd/display: remove unused force_ignore_link_settings debug option

From: Wenjing Liu [why] Remove force_ignore_link_settings debug option as it is no longer used. Signed-off-by: Wenjing Liu Reviewed-by: Eric Bernstein Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dc/core/dc.c | 2 -- drivers/gpu/drm/amd/display/dc/dc.h | 2 -- 2 files changed,

[PATCH 22/27] drm/amd/display: Decrement refcount of dc_sink before reassignment

From: Victor Lu [why] An old dc_sink state is causing a memory leak because it is missing a dc_sink_release before a new dc_sink is assigned back to aconnector->dc_sink. [how] Decrement the dc_sink refcount before reassigning it to a new dc_sink. Signed-off-by: Victor Lu Reviewed-by: Rodrigo S

[PATCH 27/27] drm/amd/display: 3.2.121

From: Aric Cyr This version brings along following fixes: - Better handling of dummy p-state table - Workaround for some legacy DP-VGA dongles - Add Freesync HDMI support to DMCU - Enable "trigger_hotplug" debugfs on all outputs - fix initial bounding box values for dcn3.02 - implement support fo

[PATCH 24/27] drm/amd/display: Better handling of dummy p-state table

From: Joshua Aberback [Why] Some scenarios where we use a UCLK frequency in between dummy p-state table entries result in a p-state hang, due to the table not having a close enough match, so the default DPM0 latency is used, which can be too long to support dummy p-state switching in these scenar

[PATCH 26/27] drm/amd/display: [FW Promotion] Release 0.0.50

From: Anthony Koo Signed-off-by: Anthony Koo Reviewed-by: Anthony Koo Acked-by: Anson Jacob --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/displa

RE: [PATCH 00/27] DC Patches Jan 29, 2021

[AMD Public Use] Hi all, Ran the test this week on a Sapphire Pulse RX5700XT and a HP Envy 360 with Ryzen 5 4500U. Tested with 2x 4k60 (DP) displays, 1x 1440p 144hz (DP) display, and 1x 1680x1050 display. Tested the laptop with these displays (via usb-c to dp/dvi/hdmi/vga) alongside it's 1080p

[pull] amdgpu, amdkfd drm-next-5.12

Hi Dave, Daniel, Fixes for 5.12. The following changes since commit a6b8720c2f85143561c3453e1cf928a2f8586ac0: Merge tag 'amd-drm-next-5.12-2021-01-20' of https://gitlab.freedesktop.org/agd5f/linux into drm-next (2021-01-20 13:08:18 +0100) are available in the Git repository at: https://g

Re: [pull] amdgpu, amdkfd drm-next-5.12

Am 2021-01-29 um 5:28 p.m. schrieb Alex Deucher: > drm/amdgpu: Make contiguous pinning optional This one needs a follow-up fix, as it breaks pinning in GTT. Xinhui should have the fix ready very soon. You may want to hold this back until the fix lands. Regards,   Felix _

RE: [pull] amdgpu, amdkfd drm-next-5.12

[AMD Public Use] > -Original Message- > From: Kuehling, Felix > Sent: Friday, January 29, 2021 5:33 PM > To: Alex Deucher ; amd- > g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; > airl...@gmail.com; daniel.vet...@ffwll.ch > Cc: Deucher, Alexander ; Pan, Xinhui > ; Koenig, Ch

[PATCH] drm/amdgpu: Fix a false positive when pin non-VRAM memory

Flag TTM_PL_FLAG_CONTIGUOUS is only valid for VRAM domain. So fix the false positive by checking memory type too. Suggested-by: Felix Kuehling Acked-by: Christian König Signed-off-by: xinhui pan --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion