Hi Xiangliang:
Could you try to replace spinlock with mutex?
Thanks
Roger(Hongbo.He)
-Original Message-
From: Yu, Xiangliang
Sent: Friday, June 16, 2017 2:30 PM
To: Christian König ; Zhou, David(ChunMing)
; He, Roger ;
amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu:
ping...?
Forwarded Message
Subject:upsteam find bo api
Date: Wed, 14 Jun 2017 18:16:24 +0800
From: zhoucm1
To: amd-gfx@lists.freedesktop.org
Hi all,
Since patches are one feature, and contain kernel and libdrm, I attached
them not by send-mail. Hope not inc
Am 15.06.2017 um 05:59 schrieb Dave Airlie:
On 1 June 2017 at 11:06, Dave Airlie wrote:
From: Dave Airlie
This creates a new command submission chunk for amdgpu
to add in and out sync objects around the submission.
Sync objects are managed via the drm syncobj ioctls.
The command submission
What is the background or what is it for?
Thanks
Roger(Hongbo.He)
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
zhoucm1
Sent: Friday, June 16, 2017 4:09 PM
To: amd-gfx@lists.freedesktop.org
Subject: Fwd: upsteam find bo api
ping...?
Forwarded Message --
On 16 June 2017 at 09:08, zhoucm1 wrote:
>
> ping...?
>
Normally you want to send patches as plain text (ideally git
send-email), so that people can reply/comment inline.
But above all a summary of the "requirements" and "how it's achieved"
helps your colleagues, amongst others ;-)
-Emil
On Thu, Jun 15, 2017 at 10:11:36AM -0400, Leo wrote:
>
>
> On 2017-06-13 08:55 AM, Arkadiusz Hiler wrote:
> > On Tue, Jun 13, 2017 at 03:41:14PM +0300, Arkadiusz Hiler wrote:
> > > On Tue, Jun 13, 2017 at 10:35:34AM +0300, Jani Nikula wrote:
> > > > On Mon, 12 Jun 2017, Harry Wentland wrote:
> >
find bo API is used by vulkan， which is being in hybrid only previous， but
now，they want to upstream.
Sent from my Huawei Mobile
原始邮件
主题：RE: upsteam find bo api
发件人："He, Roger"
收件人："Zhou, David(ChunMing)" ,amd-gfx@lists.freedesktop.org
抄送：
What is the background or what is it
On SI..VI platforms this allows access to SMC registers without kernel access.
Signed-off-by: Tom St Denis
(v2): Use difference instances of accessors to SMC as well as properly break
out
use_pci/!use_pci support in the umr_read_smc/umr_write_smc functions.
---
src/app/main.c| 4 +-
On 15/06/17 02:09 PM, Deucher, Alexander wrote:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Tom St Denis
Sent: Thursday, June 15, 2017 12:54 PM
To: amd-gfx@lists.freedesktop.org
Cc: StDenis, Tom
Subject: [PATCH umr] Add ability to read/writ
In original function amdgpu_bo_list_get, the waiting
for result->lock can be quite long while mutex
bo_list_lock was holding. It can make other tasks
waiting for bo_list_lock for long period.
Secondly, this patch allows several tasks(readers of idr)
to proceed at the same time.
v2: use rcu and kr
On Fri, Jun 16, 2017 at 01:56:24PM +0300, Arkadiusz Hiler wrote:
> On Thu, Jun 15, 2017 at 10:11:36AM -0400, Leo wrote:
> >
> >
> > On 2017-06-13 08:55 AM, Arkadiusz Hiler wrote:
> > > On Tue, Jun 13, 2017 at 03:41:14PM +0300, Arkadiusz Hiler wrote:
> > > > On Tue, Jun 13, 2017 at 10:35:34AM +030
On 2017-06-16 09:10 AM, Arkadiusz Hiler wrote:
> On Fri, Jun 16, 2017 at 01:56:24PM +0300, Arkadiusz Hiler wrote:
>> On Thu, Jun 15, 2017 at 10:11:36AM -0400, Leo wrote:
>>>
>>>
>>> On 2017-06-13 08:55 AM, Arkadiusz Hiler wrote:
On Tue, Jun 13, 2017 at 03:41:14PM +0300, Arkadiusz Hiler wrote:
We are getting the patches out in preparation for open source vulkan.
Additionally Christian has plans to use them in mesa as well.
Alex
On Fri, Jun 16, 2017 at 4:47 AM, He, Roger wrote:
> What is the background or what is it for?
>
>
>
> Thanks
>
> Roger(Hongbo.He)
>
> *From:* amd-gfx [mailto:
On Thu, Jun 15, 2017 at 6:02 PM, Alex Deucher wrote:
> Not used.
>
> v2: include DC as well
> v3: handle vega10/RV
>
> Reviewed-by: Christian König
> Signed-off-by: Alex Deucher
Ping?
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
On Fri, Jun 16, 2017 at 7:37 AM, Tom St Denis wrote:
> On SI..VI platforms this allows access to SMC registers without kernel access.
>
> Signed-off-by: Tom St Denis
>
> (v2): Use difference instances of accessors to SMC as well as properly break
> out
> use_pci/!use_pci support in the umr_read
Signed-off-by: Tom St Denis
---
src/lib/mmio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/lib/mmio.c b/src/lib/mmio.c
index dfd9f0d33e5d..f0737c43913a 100644
--- a/src/lib/mmio.c
+++ b/src/lib/mmio.c
@@ -31,6 +31,7 @@ static uint32_t umr_smc_read(struct umr_asic *asic, uint64_t
ad
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Tom St Denis
> Sent: Friday, June 16, 2017 11:57 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: StDenis, Tom
> Subject: [PATCH umr] add Kaveri family to SMC read/write
>
> Signed-off-by: Tom St
On Thu, Mar 09, 2017 at 10:57:27AM +0100, Christian König wrote:
> Am 09.03.2017 um 04:44 schrieb Alex Deucher:
> > From: Ken Wang
> >
> > Newer asics use 64 bit wptrs
>
> We need a better patch description. Newer asics doesn't use 64bit wptrs, but
> rather need them!
>
> E.g. if the wptr is no
Am 16.06.2017 um 00:02 schrieb Alex Deucher:
Not used.
v2: include DC as well
v3: handle vega10/RV
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Nice cleanup.
Acked-by: Christian König for patch #2 and #3
in this series.
Regards,
Christian.
---
drivers/gpu/drm/amd/amdgpu
Am 16.06.2017 um 04:36 schrieb Michel Dänzer:
On 16/06/17 07:21 AM, Alex Deucher wrote:
Avoids printing spurious messages like this:
[3.102059] amdgpu :01:00.0: VM size (-1) must be a power of 2
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4
1 f
Am 16.06.2017 um 07:03 schrieb Alex Xie:
v2: Remove duplication of zeroing of bo list (Christian König)
Move idr_alloc function to end of ioctl (Christian König)
Call kfree bo_list when amdgpu_bo_list_set return error.
Combine the previous two patches into this patch.
Add amdg
Am 16.06.2017 um 07:03 schrieb Alex Xie:
Use rw_semaphore instead of mutex for bo_lists.
In original function amdgpu_bo_list_get, the waiting
for result->lock can be quite long while mutex
bo_list_lock was holding. It can make other tasks
waiting for bo_list_lock for long period too.
Change bo_l
Am 16.06.2017 um 18:28 schrieb Jerome Glisse:
On Thu, Mar 09, 2017 at 10:57:27AM +0100, Christian König wrote:
Am 09.03.2017 um 04:44 schrieb Alex Deucher:
From: Ken Wang
Newer asics use 64 bit wptrs
We need a better patch description. Newer asics doesn't use 64bit wptrs, but
rather need the
Hello,
I'm looking for ideas and suggestions on how to enable IGT to work on
planes with multiple possible_crtcs during atomic commit. Amdgpu
currently has features that rely on this, and planes with multiple
crtc's are not being properly committed when tests run an atomic commit.
To explain,
The patches look good to me. Christian what did you have in mind?
Acked-by: Alex Deucher
Alex
On Fri, Jun 16, 2017 at 4:08 AM, zhoucm1 wrote:
> ping...?
>
>
>
> Forwarded Message
> Subject: upsteam find bo api
> Date: Wed, 14 Jun 2017 18:16:24 +0800
> From: zhoucm1
> To: a
On 2017-06-16 01:48 PM, Christian König wrote:
Am 16.06.2017 um 07:03 schrieb Alex Xie:
Use rw_semaphore instead of mutex for bo_lists.
In original function amdgpu_bo_list_get, the waiting
for result->lock can be quite long while mutex
bo_list_lock was holding. It can make other tasks
waiting
> team which seem to make a lot of sense to upstream as well:
>
> 1. An IOCTL to reset a sync object to it's initial state. E.g. reset the
> fence the sync objects wraps back to NULL.
>
> 2. The ability to merge multiple sync objects into one. Essentially the same
> thing we have for the sync file,
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