---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 -
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 5 +-
drivers/gpu/drm/amd/amdgpu/dce_v10_0.h | 3 --
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 5 +-
drivers/gpu/drm/amd/amdgpu/dce_v11_0.h | 3 --
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 5 +-
drivers/gpu/drm/amd/amdgpu/dce_v8_0.h | 3 --
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 7 ---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 57 -----------------------
11 files changed, 6 insertions(+), 86 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 063fc73..831e070 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1902,7 +1902,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
#define amdgpu_ih_get_wptr(adev) (adev)->irq.ih_funcs->get_wptr((adev))
#define amdgpu_ih_decode_iv(adev, iv) (adev)->irq.ih_funcs->decode_iv((adev),
(iv))
#define amdgpu_ih_set_rptr(adev) (adev)->irq.ih_funcs->set_rptr((adev))
-#define amdgpu_display_set_vga_render_state(adev, r)
(adev)->mode_info.funcs->set_vga_render_state((adev), (r))
#define amdgpu_display_vblank_get_counter(adev, crtc)
(adev)->mode_info.funcs->vblank_get_counter((adev), (crtc))
#define amdgpu_display_vblank_wait(adev, crtc)
(adev)->mode_info.funcs->vblank_wait((adev), (crtc))
#define amdgpu_display_backlight_set_level(adev, e, l)
(adev)->mode_info.funcs->backlight_set_level((e), (l))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 0b211d9..e086eb1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -270,8 +270,6 @@ struct amdgpu_mode_mc_save {
};
struct amdgpu_display_funcs {
- /* vga render */
- void (*set_vga_render_state)(struct amdgpu_device *adev, bool render);
/* display watermarks */
void (*bandwidth_update)(struct amdgpu_device *adev);
/* get frame count */
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 4550ec3..46864ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -612,8 +612,8 @@ void dce_v10_0_resume_mc_access(struct amdgpu_device *adev,
WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control);
}
-void dce_v10_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render)
+static void dce_v10_0_set_vga_render_state(struct amdgpu_device *adev,
+ bool render)
{
u32 tmp;
@@ -3736,7 +3736,6 @@ static void dce_v10_0_encoder_add(struct amdgpu_device *adev,
}
static const struct amdgpu_display_funcs dce_v10_0_display_funcs = {
- .set_vga_render_state = &dce_v10_0_set_vga_render_state,
.bandwidth_update = &dce_v10_0_bandwidth_update,
.vblank_get_counter = &dce_v10_0_vblank_get_counter,
.vblank_wait = &dce_v10_0_vblank_wait,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h
index c29c10b1..2ced0eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.h
@@ -29,9 +29,6 @@ extern const struct amdgpu_ip_block_version
dce_v10_0_ip_block;
extern const struct amdgpu_ip_block_version dce_v10_1_ip_block;
void dce_v10_0_disable_dce(struct amdgpu_device *adev);
-
-void dce_v10_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render);
void dce_v10_0_stop_mc_access(struct amdgpu_device *adev,
struct amdgpu_mode_mc_save *save);
void dce_v10_0_resume_mc_access(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 1ce2666..5942d3d 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -572,8 +572,8 @@ void dce_v11_0_resume_mc_access(struct amdgpu_device *adev,
WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control);
}
-void dce_v11_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render)
+static void dce_v11_0_set_vga_render_state(struct amdgpu_device *adev,
+ bool render)
{
u32 tmp;
@@ -3805,7 +3805,6 @@ static void dce_v11_0_encoder_add(struct amdgpu_device *adev,
}
static const struct amdgpu_display_funcs dce_v11_0_display_funcs = {
- .set_vga_render_state = &dce_v11_0_set_vga_render_state,
.bandwidth_update = &dce_v11_0_bandwidth_update,
.vblank_get_counter = &dce_v11_0_vblank_get_counter,
.vblank_wait = &dce_v11_0_vblank_wait,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h
index 6e9a7a9..c993728 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.h
@@ -28,9 +28,6 @@ extern const struct amdgpu_ip_block_version
dce_v11_0_ip_block;
extern const struct amdgpu_ip_block_version dce_v11_2_ip_block;
void dce_v11_0_disable_dce(struct amdgpu_device *adev);
-
-void dce_v11_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render);
void dce_v11_0_stop_mc_access(struct amdgpu_device *adev,
struct amdgpu_mode_mc_save *save);
void dce_v11_0_resume_mc_access(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 4f3f5f8..dc52be8 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -3524,7 +3524,6 @@ static void dce_v6_0_encoder_add(struct amdgpu_device
*adev,
}
static const struct amdgpu_display_funcs dce_v6_0_display_funcs = {
- .set_vga_render_state = &dce_v6_0_set_vga_render_state,
.bandwidth_update = &dce_v6_0_bandwidth_update,
.vblank_get_counter = &dce_v6_0_vblank_get_counter,
.vblank_wait = &dce_v6_0_vblank_wait,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 145e83d..6f96447 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -494,8 +494,8 @@ void dce_v8_0_resume_mc_access(struct amdgpu_device *adev,
WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control);
}
-void dce_v8_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render)
+static void dce_v8_0_set_vga_render_state(struct amdgpu_device *adev,
+ bool render)
{
u32 tmp;
@@ -3573,7 +3573,6 @@ static void dce_v8_0_encoder_add(struct amdgpu_device *adev,
}
static const struct amdgpu_display_funcs dce_v8_0_display_funcs = {
- .set_vga_render_state = &dce_v8_0_set_vga_render_state,
.bandwidth_update = &dce_v8_0_bandwidth_update,
.vblank_get_counter = &dce_v8_0_vblank_get_counter,
.vblank_wait = &dce_v8_0_vblank_wait,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h
index 457a528..c5d09ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.h
@@ -31,9 +31,6 @@ extern const struct amdgpu_ip_block_version dce_v8_3_ip_block;
extern const struct amdgpu_ip_block_version dce_v8_5_ip_block;
void dce_v8_0_disable_dce(struct amdgpu_device *adev);
-
-void dce_v8_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render);
void dce_v8_0_stop_mc_access(struct amdgpu_device *adev,
struct amdgpu_mode_mc_save *save);
void dce_v8_0_resume_mc_access(struct amdgpu_device *adev,
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index 3c7fa4d..21e1760 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
@@ -145,12 +145,6 @@ static void dce_virtual_resume_mc_access(struct
amdgpu_device *adev,
return;
}
-static void dce_virtual_set_vga_render_state(struct amdgpu_device *adev,
- bool render)
-{
- return;
-}
-
/**
* dce_virtual_bandwidth_update - program display watermarks
*
@@ -676,7 +670,6 @@ static int dce_virtual_connector_encoder_init(struct
amdgpu_device *adev,
}
static const struct amdgpu_display_funcs dce_virtual_display_funcs = {
- .set_vga_render_state = &dce_virtual_set_vga_render_state,
.bandwidth_update = &dce_virtual_bandwidth_update,
.vblank_get_counter = &dce_virtual_vblank_get_counter,
.vblank_wait = &dce_virtual_vblank_wait,
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 3fb6a65..414a9a6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1526,61 +1526,8 @@ void dce_v12_0_resume_mc_access(struct amdgpu_device
*adev,
#endif
}
-void dce_v12_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render)
-{
- u32 tmp;
-
- /* Lockout access through VGA aperture*/
- tmp = RREG32(0xCA);
- if (render) {
- tmp = tmp & 0xFFFFFFEF;
- WREG32(0xCA, tmp);
- } else {
- tmp |= 0x10;
- WREG32(0xCA, tmp);
- }
-
- /* disable VGA render */
- tmp = RREG32(0xC0);
- if (render) {
- tmp |= 0x10000;
- WREG32(0xC0, tmp);
- } else {
- tmp = tmp & 0xFFFCFFFF;
- WREG32(0xC0, tmp);
- }
-}
-
-#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
-void dcn_v1_0_set_vga_render_state(struct amdgpu_device *adev,
- bool render)
-{
- u32 tmp;
-
- /* Lockout access through VGA aperture*/
- tmp = RREG32(SOC15_REG_OFFSET(DCE, 0, mmVGA_HDP_CONTROL));
- if (render)
- tmp = tmp & 0xFFFFFFEF;
- else
- tmp |= 0x10;
-
- WREG32(SOC15_REG_OFFSET(DCE, 0, mmVGA_HDP_CONTROL), tmp);
-
- /* disable VGA render */
- tmp = RREG32(SOC15_REG_OFFSET(DCE, 0, mmVGA_RENDER_CONTROL));
- if (render)
- tmp |= 0x10000;
- else
- tmp = tmp & 0xFFFCFFFF;
-
- WREG32(SOC15_REG_OFFSET(DCE, 0, mmVGA_HDP_CONTROL), tmp);
-}
-#endif
-
#ifdef CONFIG_DRM_AMDGPU_CIK
static const struct amdgpu_display_funcs dm_dce_v8_0_display_funcs = {
- .set_vga_render_state = dce_v8_0_set_vga_render_state,
.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
.vblank_wait = NULL,
@@ -1603,7 +1550,6 @@ static const struct amdgpu_display_funcs
dm_dce_v8_0_display_funcs = {
#endif
static const struct amdgpu_display_funcs dm_dce_v10_0_display_funcs = {
- .set_vga_render_state = dce_v10_0_set_vga_render_state,
.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
.vblank_wait = NULL,
@@ -1626,7 +1572,6 @@ static const struct amdgpu_display_funcs
dm_dce_v10_0_display_funcs = {
};
static const struct amdgpu_display_funcs dm_dce_v11_0_display_funcs = {
- .set_vga_render_state = dce_v11_0_set_vga_render_state,
.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
.vblank_wait = NULL,
@@ -1649,7 +1594,6 @@ static const struct amdgpu_display_funcs
dm_dce_v11_0_display_funcs = {
};
static const struct amdgpu_display_funcs dm_dce_v12_0_display_funcs = {
- .set_vga_render_state = dce_v12_0_set_vga_render_state,
.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
.vblank_wait = NULL,
@@ -1673,7 +1617,6 @@ static const struct amdgpu_display_funcs
dm_dce_v12_0_display_funcs = {
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
static const struct amdgpu_display_funcs dm_dcn_v1_0_display_funcs = {
- .set_vga_render_state = dcn_v1_0_set_vga_render_state,
.bandwidth_update = dm_bandwidth_update, /* called unconditionally */
.vblank_get_counter = dm_vblank_get_counter,/* called unconditionally */
.vblank_wait = NULL,
