v2: cleanup headers, add copyright
Signed-off-by: Huang Rui
---
drivers/gpu/drm/amd/powerplay/inc/smu71.h | 510 +
drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h | 631 +
2 files changed, 1141 insertions(+)
create mode 100644 drivers/gpu/drm/amd/
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index ee95e95..fc22d39 100644
--- a/drivers/gpu/dr
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/include/cgs_common.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h
b/drivers/gpu/drm/amd/include/cgs_common.h
index f32af2f..ed5fa33 100644
--- a/
This patch adds DPM running checking back, because the DPM issue is
fixed.
Signed-off-by: Huang Rui
Reviewed-by: Ken Wang
---
drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c
b/drivers/g
Signed-off-by: Huang Rui
Reviewed-by: Ken Wang
---
drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c
index 9c6d7e3..7ff
This patch adds the deep sleep initialization at DPM, it needs send a
message to SMC to enable this feature before enable voltage controller.
Signed-off-by: Huang Rui
Reviewed-by: Ken Wang
---
.../gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c| 34 ++
1 file changed, 34 ins
Signed-off-by: Huang Rui
Reviewed-by: Ken Wang
---
.../gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c| 51 ++
1 file changed, 51 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c
index 7a974
Signed-off-by: Huang Rui
Reviewed-by: Ken Wang
---
drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/iceland_hwmgr.c
index 6075050..d538d28 100644
---
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
.../drm/amd/powerplay/hwmgr/iceland_dyn_defaults.h | 41 ++
1 file changed, 41 insertions(+)
create mode 100644 drivers/gpu/drm/amd/powerplay/hwmgr/iceland_dyn_defaults.h
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr
The system management unit (SMU) is a subcomponent of the northbridge
that is responsible for a variety of system and power management tasks
during boot and runtime for GPU. In powerplay, it will be used on
firmware loading and power task management. This patch adds SMU
mananger for iceland.
Signe
From: Huang Rui
Hi all,
Part I: https://lists.freedesktop.org/archives/amd-gfx/2016-July/000569.html
After add the prep (Part I) of iceland powerplay, this part (Part II)
introduces iceland powerplay support, and there is two sub-part:
1) Patch 1 - 9: add SMU and HW manager function support.
2
This patch adds new definition in bif header, and will be used on
iceland HW powertune part.
Signed-off-by: Huang Rui
---
drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h
b/drivers/gpu/d
This patch adds device id and revision into system info entry at CGS,
it's able to get PCI device id and revision id from amdgpu, it might
get more info in future.
PCI device id will be also used on powerplay part at current.
Suggested-by: Alex Deucher
Signed-off-by: Huang Rui
Reviewed-by: Alex
It's able to enable iceland powerplay manually via the module
parameter. The default state is disabled.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd
This patch renames the smum header guards to align with the file name.
Reported-by: Edward O'Callaghan
Signed-off-by: Huang Rui
Reviewed-by: Ken Wang
---
drivers/gpu/drm/amd/amdgpu/iceland_smum.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex
Deucher
Sent: Thursday, July 28, 2016 1:46 PM
To: Tom St Denis
Cc: StDenis, Tom; amd-gfx list
Subject: Re: [PATCH 4/4] drm/amd/powerplay: Prevent UVD powerdown before init
On Tue, Jul 26, 2016 at 11:38 AM, Tom St Deni
Change-Id: I520ff615c5fe1dd78ef2e97c60437347a4994a5a
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 4
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 1 -
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 1 +
drivers/gpu/drm/amd/powerplay/hwmgr/f
Change-Id: Ife6002b68b1e64f76886e6e421b3e6f5f454eda9
Signed-off-by: Rex Zhu
Reviewed-by: Alexandre Demers
---
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
b/dri
Change-Id: I6e338a5faeb023b13bb450ecb1c4bb3eaa3b0ac5
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
b/drivers/gpu/drm/amd/powerplay/eventmgr/even
Change-Id: I44a5a7fef33fdb1dce9e5f753d45c982f8743c08
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 5 -
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 6 +-
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 6 +-
4 files changed, 15 insertions(
Since we cannot make sure VRAM is safe after gpu reset, page table backup
is neccessary, shadow page table is sense way to recovery page talbe when
gpu reset happens.
We need to allocate GTT bo as the shadow of VRAM bo when creating page table,
and make them same. After gpu reset, we will need to u
shadow bo is the shadow of a bo, which is always in GTT,
which can be used to backup the original bo.
Change-Id: Ia27d4225c47ff41d3053eb691276e29fb2d64026
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 36 +
Change-Id: Icf64bf5964f0ef66c239ab0679d51275cc272699
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index eab93
Change-Id: I8245cdad490d2a0b8cf4b9320e53e14db0b6add4
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index
Change-Id: Ia0378640962eef362569e0bbe090aea1ca083a55
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 24
drivers/gpu/drm/amd/scheduler/gpu_scheduler.h | 3 +++
2 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/amd/scheduler/
Change-Id: Icafa90a6625ea7b5ab3e360ba0d73544cda251b0
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 68 +++---
2 files changed, 48 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd
Change-Id: I963598ba6eb44bc8620d70e026c0175d1a1de120
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgp
the pd/pt shadow bo will be used to backup page table, when gpu reset
happens, we can restore the page table by them.
Change-Id: I31eeb581f203d1db0654a48745ef4e64ed40ed9b
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16
Change-Id: Ibcc3558c2330caad1a2edb9902b3f21bd950d19f
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
b/drivers/gpu/drm/amd/scheduler/gpu_scheduler
Change-Id: I5a8c0f4c1e9b65d2310ccb0f669b478884072a11
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 71 +++---
1 file changed, 48 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgp
Add vm client to list tail when creating it, move to head while submit to
scheduler.
Change-Id: I0625092f918853303a5ee97ea2eac87fb790ed69
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 6 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4
drivers/gpu/drm/
Before every job runs, we must make sure which's vm is recoverred completely.
Change-Id: Ibe77a3c8f8206def280543fbb4195ad2ab9772e0
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 5 +
drivers/gpu/drm/amd/amdgpu/amdg
Change-Id: I9957e726576289448911f5fb2ff7bcb9311a1906
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 77 ++
2 files changed, 79 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
To lock adev->vm_list.
Change-Id: I74d309eca9c22d190dd4072c69d26fa7fdea8884
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm
Change-Id: Ib84621d8ab61bf2ca0719c6888cc403982127684
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_test.c | 8
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
Change-Id: I08ca5a805f590cc7aad0e9ccd91bd5925bb216e2
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 11 +++
3 files changed, 13 insertions(+)
diff --git a/
hw job list should be exact, so deleting job node should be in irq
handler instead of work thread.
And Calculating time of next job should be immediate as well.
Change-Id: I6d2686d84be3e7077300df7181c2a284fbcda9eb
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 3
It will be used to recover hw jobs.
Change-Id: I5508f5ffa04909b480ddd669dfb297e5059eba04
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 24
drivers/gpu/drm/amd/scheduler/gpu_scheduler.h | 1 +
2 files changed, 21 insertions(+), 4 deleti
The old way is trying to recover hw jobs directly, which will conflict
with scheduler thread.
Change-Id: I9e45abd43ae280a675b0b0d88a820106dea2716c
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 48 +--
1 file changed, 16 insertions(+), 32
Change-Id: I7171d1e3884aabe1263d8f7be18cadf2e98216a4
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/scheduler/gpu_scheduler.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
remove recover_entity for recover_rq when reset job.
add recover_entity back when recover job
Change-Id: Ic2e5cb6ab79d2abc49374e1770299487e327efe9
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletion
every vm uses itself recover entity to recovery page table from shadow.
Change-Id: I93e37666cb3fb511311c96ff172b6e9ebd337547
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 21 ++---
2 files changed, 16 in
every vm has itself recovery entity, which is used to reovery page table from
their shadow.
They don't need to wait front vm completed.
And also using all pte rings can speed reovery.
every scheduler has its own recovery entity, which is used to save hw jobs, and
resubmit from it, which solves t
Change-Id: Ic74508ec9de0bf1c027313ce9574e6cb8ea9bb1d
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 34 ++
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/am
Change-Id: Ie3d5440dc0d2d3a61d8e785ab08b8b91eda223db
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 11c1263..1d58
recover entities have handled very well for each dependency.
Change-Id: I70a8d0e2753741c4b54d9e01085d00dd708b5c80
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm
I found that moving the PG_EN to start would cause problems. I'm pretty sure
you have to write it just before calling the firmware otherwise bad things
happen which is why I moved it there. We could probably move it into the
uvd_v6_0's powergating function which is called just before the smu c
Quick question, how am I meant to get access to pm.mutex from powerplay?
I need a lock I can see around the SMU calls and in the amdgpu side (for
userspace locking).
Tom
From: Zhu, Rex
Sent: Thursday, July 28, 2016 03:43
To: Alex Deucher; Tom St Denis
Cc: StD
Nevermind I moved the locking into amdgpu_pm.c and that did the trick.
Attached is a patch that contains all the changes. If you guys want to give it
a quick once-through I can then start splitting it up per Alex's comments.
Tom
From: amd-gfx on behalf of S
Looks good to me.
Best Regards
Rex
From: StDenis, Tom
Sent: Thursday, July 28, 2016 8:19:52 PM
To: Zhu, Rex; Alex Deucher
Cc: amd-gfx list
Subject: Re: [PATCH 4/4] drm/amd/powerplay: Prevent UVD powerdown before init
Nevermind I moved the locking into amdgpu_
Hi Rex,
Thanks. BTW I fixed the one liner {} in the PP code (removed the {} braces) in
my worktree after I sent that in case anyone notices that :-)
Tom
From: Zhu, Rex
Sent: Thursday, July 28, 2016 08:43
To: StDenis, Tom; Alex Deucher
Cc: amd-gfx list
Subjec
you mean
+if (cz_hwmgr->uvd_power_gated == bgate) {
return 0;
+}
I didn't pay any attention at first.
Best Regards
Rex
From: StDenis, Tom
Sent: Thursday, July 28, 2016 8:44:11 PM
To: Zhu, Rex; Alex Deucher
Cc: amd-gfx list
Subject: Re: [PATC
On Thu, Jul 28, 2016 at 8:59 AM, StDenis, Tom wrote:
> Yup, I fixed that in my worktree already.
Looks good to me.
Alex
>
>
> Tom
>
>
>
>
> From: Zhu, Rex
> Sent: Thursday, July 28, 2016 08:59
>
> To: StDenis, Tom; Alex Deucher
> Cc: amd-gfx list
> Subject: Re:
Yup, I fixed that in my worktree already.
Tom
From: Zhu, Rex
Sent: Thursday, July 28, 2016 08:59
To: StDenis, Tom; Alex Deucher
Cc: amd-gfx list
Subject: Re: [PATCH 4/4] drm/amd/powerplay: Prevent UVD powerdown before init
you mean
+if (cz_hwmgr->uvd_powe
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Thursday, July 28, 2016 5:53 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 4/4] drm/amd/powerplay: not change uvd/vce block's state
> when initialize/
This fixes a warning on big endian. Bitfields need to
be handled properly.
Cc: Arnd Bergmann
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
Um, I had this in my worktree ... so uh do I drop it from mine or what?
Tom
From: amd-gfx on behalf of Deucher,
Alexander
Sent: Thursday, July 28, 2016 09:48
To: Zhu, Rex; amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: RE: [PATCH 4/4] drm/amd/powerplay:
Whoever commits it first wins ;)
From: StDenis, Tom
Sent: Thursday, July 28, 2016 10:13 AM
To: Deucher, Alexander; Zhu, Rex; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/4] drm/amd/powerplay: not change uvd/vce block's state
when initialize/resume
Um, I had this in my worktree ... so uh
In this respin I've factored out the changes into multiple patches
followed by adding fixes for powerplay (don't gate on init/resume)
as well as reverse the order of the operations when powering up
(set the clock last).
Finally, this series adds VCE PG tested on both the Carrizo and Stoney
system
This adds a mutex lock for both DPM/PP around the changes in
power gating state so that userspace can poll registers without
a race condition on power state.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 58 +++---
1 file changed, 25 inserti
Cannot set clockgating state before ungating power.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
b/drivers/gp
This is handled properly by both DPM and PP externally.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 4fa
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 41 +++--
1 file changed, 35 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
index 8ba07e79d4cb..301d0b98e607 100644
--- a/d
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/vi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 1f4cf6d3808e..26d15a446ad0 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/d
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/vi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 550fafb01aba..1f4cf6d3808e 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/v
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/vi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 26d15a446ad0..33bad99176fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/d
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/vi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 4fa9fea541a5..f271ee0cc033 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/d
Setting PG state this early would cause lock ups in the IP block
initialized functions.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
b/dr
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/vi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f271ee0cc033..550fafb01aba 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/d
Enable the PG_EN bit just before the SMU would be tasked
with the PG transition.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 7f2b5d
There's no need to track CG state anymore.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index 4dbd5ab29bba..
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/vi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 9ba64989f092..4fa9fea541a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgp
Adds support for PM locks around access to registers that might
have race conditions on PG transistions.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp
Hi Christian,
Patches has been updated and sent for reviewing in another thread, please
take a look.
发件人: Christian König
发送时间: 2016年7月22日 21:02:56
收件人: Wang, Ken; Kuehling, Felix; amd-gfx@lists.freedesktop.org
主题: Re: 答复: 答复: 答复: 答复: [PATCH] drm/amdgpu: adju
From: Christian König
Context buffers should be denied by default, not allowed.
Signed-off-by: Christian König
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b/driver
From: Christian König
Supported starting on certain FW versions.
Signed-off-by: Christian König
Reviewed-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 28 ++--
2 files changed, 27 insertions(+), 2 deletions(-)
Well I'll submit my patches momentarily and if Rex hasn't pushed his by then
I'll push mine.
Tom
From: Deucher, Alexander
Sent: Thursday, July 28, 2016 10:17
To: StDenis, Tom; Zhu, Rex; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 4/4] drm/amd/powerplay: n
On Thursday, July 28, 2016 10:00:46 AM CEST Alex Deucher wrote:
> This fixes a warning on big endian. Bitfields need to
> be handled properly.
>
> Cc: Arnd Bergmann
> Signed-off-by: Alex Deucher
>
Acked-by: Arnd Bergmann
Thanks!
___
amd-gfx mailing
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Leo Liu
> Sent: Thursday, July 28, 2016 10:13 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Koenig, Christian; dri-de...@lists.freedesktop.org
> Subject: [PATCH 2/2] drm/amdgpu: enable UVD cont
> -Original Message-
> From: Peter Wu [mailto:pe...@lekensteyn.nl]
> Sent: Thursday, July 21, 2016 6:43 AM
> To: Deucher, Alexander
> Cc: amd-gfx@lists.freedesktop.org; Zhang, Hawking; Koenig, Christian; dri-
> de...@lists.freedesktop.org; Christoph Haag
> Subject: ATPX changes in drm-next-
On Thu, Jul 28, 2016 at 03:33:25PM +, Deucher, Alexander wrote:
> > From: Peter Wu [mailto:pe...@lekensteyn.nl]
> > Sent: Thursday, July 21, 2016 6:43 AM
> > In case you missed it, Dave's D3cold patches were succeeded by changes
> > in PCI core. Relevant commits in the pci/pm branch:
> >
> >
For the series:
Reviewed-by: Rex Zhu
Best Regards
Rex
From: amd-gfx on behalf of Tom St Denis
Sent: Thursday, July 28, 2016 10:19:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: StDenis, Tom
Subject: [PATCH 07/14] drm/amd/powerplay: remove
enable_clock_power_g
Now that the implementation is complete.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
index 260da
On Thu, Jul 28, 2016 at 10:18 AM, Tom St Denis wrote:
> In this respin I've factored out the changes into multiple patches
> followed by adding fixes for powerplay (don't gate on init/resume)
> as well as reverse the order of the operations when powering up
> (set the clock last).
>
> Finally, thi
On Wed, Jul 27, 2016 at 04:10:45PM -0400, Alex Deucher wrote:
> If we do it at enable time, it's too late for the feature
> checks.
>
> bug: https://bugzilla.kernel.org/show_bug.cgi?id=115321
> Signed-off-by: Alex Deucher
> Cc: Peter Wu
> ---
> drivers/gpu/drm/radeon/radeon_atpx_handler.c | 3 +
On Thu, Jul 28, 2016 at 05:40:31PM +0200, Lukas Wunner wrote:
> On Thu, Jul 28, 2016 at 03:33:25PM +, Deucher, Alexander wrote:
> > > From: Peter Wu [mailto:pe...@lekensteyn.nl]
> > > Sent: Thursday, July 21, 2016 6:43 AM
> > > In case you missed it, Dave's D3cold patches were succeeded by chan
On Thu, Jul 28, 2016 at 01:40:02PM -0400, Alex Deucher wrote:
> Now that the implementation is complete.
>
> Signed-off-by: Alex Deucher
Acked-by: Huang Rui
+ Alvin and Ken for awareness.
Thanks,
Rui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 4 +---
> 1 file changed, 1 inserti
ping...
On Mon, Jul 25, 2016 at 02:15:24PM +0800, Flora Cui wrote:
> V2: fix the return value for fill failure and validate bo before
> filling data
>
> Change-Id: I256178afa18c1a433fe60d8656d1c5cc5d55cf2f
> Signed-off-by: Flora Cui
> Reviewed-by: Chunming Zhou
> ---
> drivers/gpu/drm/amd/amdg
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