ping...
On Mon, Jul 25, 2016 at 02:15:24PM +0800, Flora Cui wrote:
> V2: fix the return value for fill failure and validate bo before
> filling data
>
> Change-Id: I256178afa18c1a433fe60d8656d1c5cc5d55cf2f
> Signed-off-by: Flora Cui <flora....@amd.com>
> Reviewed-by: Chunming Zhou <david1.z...@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 33
> ++++++++++++++++++++++++++++++
> include/uapi/drm/amdgpu_drm.h | 2 ++
> 2 files changed, 35 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 6f0873c..59f3a75 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -277,11 +277,44 @@ int amdgpu_bo_create_restricted(struct amdgpu_device
> *adev,
> if (unlikely(r != 0)) {
> return r;
> }
> +
> + if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
> + bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
> + struct fence *fence;
> +
> + if (adev->mman.buffer_funcs_ring == NULL ||
> + !adev->mman.buffer_funcs_ring->ready) {
> + r = -EBUSY;
> + goto fail_free;
> + }
> +
> + r = amdgpu_bo_reserve(bo, false);
> + if (unlikely(r != 0))
> + goto fail_free;
> +
> + amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
> + r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
> + if (unlikely(r != 0))
> + goto fail_unreserve;
> +
> + amdgpu_fill_buffer(bo, 0, bo->tbo.resv, &fence);
> + amdgpu_bo_fence(bo, fence, false);
> + amdgpu_bo_unreserve(bo);
> + fence_put(bo->tbo.moving);
> + bo->tbo.moving = fence_get(fence);
> + fence_put(fence);
> + }
> *bo_ptr = bo;
>
> trace_amdgpu_bo_create(bo);
>
> return 0;
> +
> +fail_unreserve:
> + amdgpu_bo_unreserve(bo);
> +fail_free:
> + amdgpu_bo_unref(&bo);
> + return r;
> }
>
> int amdgpu_bo_create(struct amdgpu_device *adev,
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 946f238..8df3816 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -75,6 +75,8 @@
> #define AMDGPU_GEM_CREATE_NO_CPU_ACCESS (1 << 1)
> /* Flag that USWC attributes should be used for GTT */
> #define AMDGPU_GEM_CREATE_CPU_GTT_USWC (1 << 2)
> +/* Flag that the memory should be in VRAM and cleared */
> +#define AMDGPU_GEM_CREATE_VRAM_CLEARED (1 << 3)
>
> struct drm_amdgpu_gem_create_in {
> /** the requested memory size */
> --
> 1.9.1
>
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> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
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