[PATCH 10/11] drm/amd/display: [FW Promotion] Release 0.1.11.0

From: Taimur Hassan Refactoring some DMUB related structs and enum. Acked-by: Wayne Lin Signed-off-by: Taimur Hassan Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 34 +-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers

[PATCH 07/11] drm/amd/display: add support for 2nd sharpening range

From: Samson Tam [Why & How] Add support for 2nd sharpening range for cases where we want override existing DCN sharpening range. Reviewed-by: Alvin Lee Signed-off-by: Samson Tam Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h | 4 1 file change

[PATCH 11/11] drm/amd/display: Promote DAL to 3.2.334

From: Taimur Hassan This version brings along following update: -Support external tunneling feature -Modify DCN401 DMUB reset & halt sequence -Fix the typo in dcn401 Hubp block -Skip backend validation for virtual monitors Acked-by: Wayne Lin Signed-off-by: Taimur Hassan Signed-off-by:

[PATCH 09/11] drm/amd/display: Add GPINT retries to ips_query_residency_info

From: Ovidiu Bunea [why & how] GPINTs can timeout without returning any data. Since this path is only for testing purposes, it should retry several times to ensure data is collected. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Ovidiu Bunea Signed-off-by: Tom Chung --- drivers/gpu

[PATCH 08/11] drm/amd/display: Modify DCN401 DMUB reset & halt sequence

From: Dillon Varone [WHY&HOW] If DMCUB is already disabled or reset, no need to send the halt command again. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Dillon Varone Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dmub/src/dmub_dcn401.c | 16 ++-- 1 file change

[PATCH 06/11] drm/amd/display: Fix the typo in dcn401 Hubp block

From: Nevenko Stupar [Why & How] Fix the typo for hubp_clear_tiling, currently calls hubp2_clear_tiling for dcn401 instead of intended hubp401_clear_tiling. Reviewed-by: Aurabindo Pillai Signed-off-by: Nevenko Stupar Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/hubp/dc

[PATCH 05/11] drm/amd/display: Skip backend validation for virtual monitors

tion. Reviewed-by: Aric Cyr Signed-off-by: Chiawen Huang Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/core/dc.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c i

[PATCH 04/11] drm/amd/display: Move mcache allocation programming from DML to resource

o the resource file. Reviewed-by: Alvin Lee Signed-off-by: Karthi Kandasamy Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/core/dc_resource.c | 9 +++ .../dc/dml2/dml21/dml21_translation_helper.c | 2 +- .../dc/dml2/dml21/dml21_translation_helper.h | 2 + .../amd/display/dc/dml2/

[PATCH 03/11] drm/amd/display: Support external tunneling feature

From: Cruise Hung [Why & How] The original code only supports the tunneling for embedded one. To support external tunneling feature, it needs to check Tunneling_Support bit register. Reviewed-by: Wenjing Liu Reviewed-by: Jun Lei Signed-off-by: Cruise Hung Signed-off-by: Tom C

[PATCH 02/11] drm/amd/display: init local variable to fix format errors

From: Yihan Zhu [WHY & HOW] Uninitialized local variables will cause format checker complain about them. Reviewed-by: Charlene Liu Signed-off-by: Yihan Zhu Signed-off-by: Tom Chung --- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c| 16 1 file changed, 8 insertions(+

[PATCH 01/11] drm/amd/display: Extend dc_plane_get_status with flags

From: Tomasz Siemek [WHY] dc_plane_get_status may be used for reading other plane properties in the future. [HOW] Provide API for choosing plane properties to read. Reviewed-by: Charlene Liu Reviewed-by: Aric Cyr Reviewed-by: Swapnil Patel Signed-off-by: Tomasz Siemek Signed-off-by: Tom

[PATCH 00/11] DC Patches May 19 2025

This DC patchset brings improvements in multiple areas. In summary, we highlight: -Support external tunneling feature -Modify DCN401 DMUB reset & halt sequence -Fix the typo in dcn401 Hubp block -Skip backend validation for virtual monitors Cc: Daniel Wheeler Chiawen Huang (1): drm/amd/disp

[PATCH 02/22] drm/amd/display: Disable unneeded hpd interrupts during dm_init

nts first, then selectively enabling ones for connectors that have valid hpd sources. Cc: Mario Limonciello Cc: Alex Deucher Cc: sta...@vger.kernel.org Reviewed-by: Harry Wentland Signed-off-by: Leo Li Signed-off-by: Tom Chung --- .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 64

[PATCH 07/22] drm/amd/display: Do not enable replay when vtotal update is pending.

From: Danny Wang [Why&How] Vtotal is not applied to HW when handling vsync interrupt. Make sure vtotal is aligned before enable replay. Reviewed-by: Anthony Koo Reviewed-by: Robin Chen Signed-off-by: Danny Wang Signed-off-by: Zhongwei Zhang Signed-off-by: Tom Chung --- drivers/gpu/drm

[PATCH 08/22] drm/amd/display: not abort link train when bw is low

Somasundaram Signed-off-by: Peichen Huang Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/link/protocols/link_dp_training.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c b/drivers/gpu/drm/amd/display/dc/link

[PATCH 13/22] drm/amd/display: dml2 soc dscclk use DPM table clk setting.

From: Charlene Liu [why & how] The dml2 will calculate the minimum required clocks. Use DPM table clk setting for dml2 soc dscclk. Reviewed-by: Alvin Lee Signed-off-by: Charlene Liu Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c | 2 +- 1

[PATCH 09/22] drm/amd/display: Implement PCON regulated autonomous mode handling

-by: Wenjing Liu Signed-off-by: George Shen Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 27 - .../dc/link/protocols/link_dp_capability.c| 55 +++ 2 files changed, 71 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd

[PATCH 15/22] drm/amd/display: calculate the remain segments for all pipes

xceed the maximum. [HOW] Add the non-top pipe to calculate the remain de-tile buffer segments. Don't set override size to use the average according to pipe count if the value exceed the maximum. Reviewed-by: Charlene Liu Signed-off-by: Zhikai Zhai Signed-off-by: Tom Chung --- .../dc/resou

[PATCH 16/22] drm/amd/display: Correct timing_adjust_pending flag setting.

t. Reviewed-by: Charlene Liu Signed-off-by: Zhongwei Zhang Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/core/dc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 5

[PATCH 05/22] drm/amd/display: Restore correct backlight brightness after a GPU reset

ious value. Acked-by: Wayne Lin Signed-off-by: Mario Limonciello Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/a

[PATCH 03/22] drm/amd/display: Add more debug data to dmub_srv

dmub_diagnostic_data directly in dmub_srv - use dmub_srv->debug when collecting diagnostic info instead of stack object to allow for easy inspection in crash dumps Reviewed-by: Alvin Lee Signed-off-by: Joshua Aberback Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c |

[PATCH 04/22] drm/amd/display: fix default brightness

the value. Userspace may however still change it during boot. Fixes: 2fe87f54abdc ("drm/amd/display: Set default brightness according to ACPI") Acked-by: Wayne Lin Signed-off-by: Mario Limonciello Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- 1 file

[PATCH 19/22] drm/amd/display: Add scoped mutexes for amdgpu_dm_dhcp

From: Mario Limonciello [Why] Guards automatically release mutex when it goes out of scope making code easier to follow. [How] Replace all use of mutex_lock()/mutex_unlock() with guard(mutex). Reviewed-by: Alex Hung Signed-off-by: Mario Limonciello Signed-off-by: Tom Chung --- .../amd

[PATCH 00/22] DC Patches Mar 10 2025

This DC patchset brings improvements in multiple areas. In summary, we highlight: - Fix some Replay/PSR issue - Fix backlight brightness - Fix suspend issue - Fix visual confirm color - Add scoped mutexes for amdgpu_dm_dhcp Cc: Daniel Wheeler Alex Hung (1): drm/amd/display: Assign normalized

[PATCH 12/22] drm/amd/display: Assign normalized_pix_clk when color depth = 14

igning pix_clk * (14 * 3) / 24 - same as the rests. Also fixes the indentation in get_norm_pix_clk. Reviewed-by: Harry Wentland Signed-off-by: Alex Hung Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-)

[PATCH 22/22] drm/amd/display: Promote DAL to 3.2.324

Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index a62c4893e5ff..67e1bb6fa335 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b

[PATCH 21/22] drm/amd/display: remove minimum Dispclk and apply oem panel timing.

From: Charlene Liu [why & how] 1. apply oem panel timing (not only on OLED) 2. remove MIN_DPP_DISP_CLK request in driver. This fix will apply for dcn31x but not sync with DML's output. Reviewed-by: Ovidiu Bunea Signed-off-by: Charlene Liu Signed-off-by: Tom Chung --- drivers/gp

[PATCH 17/22] drm/amd/display: Prevent VStartup Overflow

iewed-by: Dillon Varone Signed-off-by: Ryan Seto Signed-off-by: Tom Chung --- .../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c b/drivers/gpu/dr

[PATCH 18/22] drm/amd/display: Fix slab-use-after-free on hdcp_work

m/amd/display: Update CP property based on HW query") Cc: Alex Deucher Cc: sta...@vger.kernel.org Reviewed-by: Alex Hung Signed-off-by: Mario Limonciello Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/d

[PATCH 20/22] drm/amd/display: Drop unnecessary ret variable for enable_assr()

From: Mario Limonciello [Why] enable_assr() has a res variable that only is changed in one block with no cleanup necessary. [How] Remove variable and return early from failure cases. Reviewed-by: Alex Hung Signed-off-by: Mario Limonciello Signed-off-by: Tom Chung --- drivers/gpu/drm/amd

[PATCH 14/22] drm/amd/display: Fix visual confirm color not updating

From: Leo Zeng [WHY] Sometimes visual confirm color is updated, but the background color is not changed. This causes visual confrim to show incorrect colors. [HOW] Update background color when visual confirm color changes. Reviewed-by: Dillon Varone Signed-off-by: Leo Zeng Signed-off-by: Tom

[PATCH 11/22] drm/amd/display: Add Support for reg inbox0 for host->DMUB CMDs

replacement for the frame buffer based mailbox (Inbox1). It supports all of the required features: - Supports all messages handled by FB Inbox1 - Supports multi command batching Reviewed-by: Joshua Aberback Signed-off-by: Dillon Varone Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc

[PATCH 10/22] drm/amd/display: assume VBIOS supports DSC as default

From: Charlene Liu [Why & How] The clear_dsc_setting at boot logic was based on dcn version check. As such new ASIC lost this DSC clear up logic, change the assumption to BIOS support eDP DSC for new ASIC. Reviewed-by: Alvin Lee Signed-off-by: Charlene Liu Signed-off-by: Tom C

[PATCH 06/22] drm/amd/display: Add and use new dm_prepare_suspend() callback

ck instead when possible. This will help for suspend and hibernate sequences. The shutdown sequence however will not call prepare() so check whether the state has been already saved to decide what to do. Acked-by: Wayne Lin Signed-off-by: Mario Limonciello Signed-off-by: Tom Chung --- .../g

[PATCH 01/22] drm/amd/display: Fix incorrect DPCD configs while Replay/PSR switch

From: Leon Huang [Why] When switching between PSR/Replay, the DPCD config of previous mode is not cleared, resulting in unexpected behavior in TCON. [How] Initialize the DPCD in setup function Reviewed-by: Robin Chen Signed-off-by: Leon Huang Signed-off-by: Tom Chung --- .../link/protocols

[PATCH] Revert "drm/amd/display: Use HW lock mgr for PSR1"

This reverts commit 2a69ae1e1354 ("drm/amd/display: Use HW lock mgr for PSR1") Because it may cause system hang while connect with two edp panel. Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletion

[PATCH 14/24] drm/amd/display: Remove unnecessary eDP power down

function before DCN32. We remov eDP power down in dcn32_disable_link_output(). Reviewed-by: Charlene Liu Signed-off-by: Yiling Chen Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a

[PATCH 08/24] drm/amd/display: Reduce accessing remote DPCD overhead

d one first. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3720 Fixes: fa57924c76d9 ("drm/amd/display: Refactor function dm_dp_mst_is_port_support_mode()") Cc: Mario Limonciello Cc: Alex Deucher Cc: sta...@vger.kernel.org Reviewed-by: Jerry Zuo Signed-off-by: Wayne Lin Sig

[PATCH 20/24] drm/amd/display: Use HW lock mgr for PSR1

[Why] Without the dmub hw lock, it may cause the lock timeout issue while do modeset on PSR1 eDP panel. [How] Allow dmub hw lock for PSR1. Reviewed-by: Sun peng Li Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1

[PATCH 01/24] drm/amd/display: Limit Scaling Ratio on DCN3.01

From: Gabe Teeger [why] Underflow and flickering was occuring due to high scaling ratios when resizing videos. [how] Limit the scaling ratios by increasing the max scaling factor Reviewed-by: Nicholas Kazlauskas Signed-off-by: Gabe Teeger Signed-off-by: Tom Chung --- .../drm/amd/display/dc

[PATCH 07/24] drm/amd/display: Validate mdoe under MST LCT=1 case as well

Signed-off-by: Tom Chung --- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c| 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c inde

[PATCH 06/24] drm/amd/display: DML2.1 Post-Si Cleanup

eferences in DML2.1 wrapper. Reviewed-by: Austin Zheng Reviewed-by: Dillon Varone Signed-off-by: Rafal Ostrowski Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/core/dc_resource.c | 16 +- .../dc/dml2/dml21/dml21_translation_helper.c | 77 -- .../dc/dml2/dml21/dml21_translation_helper

[PATCH 16/24] drm/amd/display: Do not elevate mem_type change to full update

ps between them. Fixes: a7c0cad0dc06 ("drm/amd/display: ensure async flips are only accepted for fast updates") Reviewed-by: Tom Chung Signed-off-by: Leo Li Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++ 1 file changed, 23 insertions

[PATCH 23/24] drm/amd/display: avoid reset DTBCLK at clock init

From: Charlene Liu [why & how] this is to init to HW real DTBCLK. and use real HW DTBCLK status to update internal logic state Reviewed-by: Nicholas Kazlauskas Reviewed-by: Martin Leung Signed-off-by: Charlene Liu Signed-off-by: Ausef Yousof Signed-off-by: Tom Chung --- .../displa

[PATCH 24/24] drm/amd/display: 3.2.316

refactoring DML2.1 Acked-by: Wayne Lin Reviewed-by: Martin Leung Signed-off-by: Ryan Seto Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index

[PATCH 22/24] drm/amd/display: improve dpia pre-train

hpd_pending is true. 3. check if 2 lane supported when it is alt mode Reviewed-by: Wenjing Liu Reviewed-by: Meenakshikumar Somasundaram Signed-off-by: Peichen Huang Signed-off-by: Tom Chung --- .../amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c| 5 +++-- drivers/gpu/drm/amd/display/dc/link

[PATCH 19/24] drm/amd/display: Revised for Replay Pseudo vblank control

From: Dennis Chan [why & how] Revised Replay Full screen video Pseudo vblank control. Reviewed-by: Allen Li Signed-off-by: Dennis Chan Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc_types.h | 4 ++-- drivers/gpu/drm/amd/display/modules/power/power_helpe

[PATCH 17/24] drm/amd/display: Remove unused read_ono_state function from Hwss module

that no functionality is affected, and the code is simplified. Reviewed-by: Martin Leung Signed-off-by: Karthi Kandasamy Signed-off-by: Tom Chung --- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 85 --- .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 2 - 2 files changed, 87

[PATCH 21/24] drm/amd/display: Apply DML21 Patches

From: Austin Zheng [Why & How] Add several DML21 fixes Reviewed-by: Wenjing Liu Signed-off-by: Austin Zheng Signed-off-by: Tom Chung --- .../src/dml2_core/dml2_core_dcn4_calcs.c | 107 -- .../src/dml2_core/dml2_core_shared_types.h| 6 +- .../dml21/src/dml2_

[PATCH 18/24] drm/amd/display: Add a new flag for replay low hz

From: Robin Chen [Why & How] Add a new flag in replay_config to indicate the replay low hz status. Reviewed-by: Allen Li Signed-off-by: Robin Chen Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc_types.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm

[PATCH 15/24] drm/amd/display: Do not wait for PSR disable on vbl enable

iting for panel to exit PSR1, before programming hw for CRC generation. Fixes: 58a261bfc967 ("drm/amd/display: use a more lax vblank enable policy for older ASICs") Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3743 Reviewed-by: Tom Chung Signed-off-by: Leo Li Signed-of

[PATCH 13/24] Revert "drm/amd/display: Enable urgent latency adjustments for DCN35"

rruption issue which it fixed. Reviewed-by: Charlene Liu Signed-off-by: Nicholas Susanto Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

[PATCH 12/24] drm/amd/display: Add SMU interface to get UMC count for dcn401

From: Dillon Varone [WHY&HOW] BIOS table will not always contain accurate UMC channel info when harvesting is enabled, so get the correct info from SMU. Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Tom Chung --- .../amd/display/dc/clk_mgr/dcn401/dalsmc.h

[PATCH 11/24] drm/amd/display: Initialize denominator defaults to 1

From: Alex Hung [WHAT & HOW] Variables, used as denominators and maybe not assigned to other values, should be initialized to non-zero to avoid DIVIDE_BY_ZERO, as reported by Coverity. Reviewed-by: Austin Zheng Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Hung Signed-off-by: Tom C

[PATCH 09/24] drm/amd/display: Add support to configure CRC window on specific CRC instance

. Additionally, add another parameter to specify whether to skip the default reset of crc engine. Reviewed-by: HaoPing Liu Signed-off-by: Wayne Lin Signed-off-by: Tom Chung --- .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +- drivers/gpu/drm

[PATCH 10/24] drm/amd/display: Extend secure display to support DisplayCRC mode

handled by the driver only Reviewed-by: HaoPing Liu Signed-off-by: Wayne Lin Signed-off-by: Tom Chung --- .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 56 +-- .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h | 9 +++ 2 files changed, 49 insertions(+), 16 deletions(-) diff --git a/

[PATCH 03/24] drm/amd/display: Add replay desync error count tracking and reset functionality

From: Jack Chang [Why & How] Build-up get/reset desync error count interface and implement the functions. Reviewed-by: ChunTao Tso Reviewed-by: Robin Chen Signed-off-by: Jack Chang Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc_types.h| 2 ++ .../drm

[PATCH 05/24] drm/amd/display: Update chip_cap defines and usage

. Reviewed-by: Wenjing Liu Signed-off-by: Michael Strauss Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 9 + .../amd/display/dc/link/accessories/link_dp_cts.c | 4 ++-- .../link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c | 2 +- drivers/gpu/drm/amd

[PATCH 04/24] drm/amd/display: [FW Promotion] Release 0.0.248.0

From: Taimur Hassan Refactoring some flags for replay Acked-by: Wayne Lin Signed-off-by: Taimur Hassan Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/display

[PATCH 02/24] drm/amd/display: Log Hard Min Clocks and Phantom Pipe Status

Signed-off-by: Tom Chung --- .../dc/clk_mgr/dcn401/dcn401_clk_mgr.c| 16 ++ drivers/gpu/drm/amd/display/dc/core/dc.c | 22 +++ .../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 3 +++ 3 files changed, 41 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc

[PATCH 00/24] DC Patches Jan 13 2025

w hz Ryan Seto (1): drm/amd/display: 3.2.316 Sung Lee (1): drm/amd/display: Log Hard Min Clocks and Phantom Pipe Status Taimur Hassan (1): drm/amd/display: [FW Promotion] Release 0.0.248.0 Tom Chung (1): drm/amd/display: Use HW lock mgr for PSR1 Wayne Lin (4): drm/amd/display: Val

[PATCH 06/16] drm/amd/display: Refactoring if and endif statements to enable DC_LOGGER

From: Lohita Mudimela [Why] For Header related changes for core [How] Refactoring if and endif statements to enable DC_LOGGER Reviewed-by: Mounika Adhuri Reviewed-by: Alvin Lee Signed-off-by: Lohita Mudimela Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/clk_mgr/dcn31

[PATCH 15/16] drm/amd/display: [FW Promotion] Release 0.0.240.0

From: Taimur Hassan Add some scruct for secure display. Acked-by: Wayne Lin Signed-off-by: Taimur Hassan Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 53 +++ 1 file changed, 44 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd

[PATCH 09/16] drm/amd/display: Remove useless assignments and variables

eira Signed-off-by: Alex Hung Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c| 1 - drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c | 2 -- drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c | 2 -- drivers/gpu/drm/amd/displa

[PATCH 16/16] drm/amd/display: 3.2.307

Lin Signed-off-by: Aric Cyr Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 412cdb01a61a..72adbab589f5 100644 --- a/drivers/gpu

[PATCH 14/16] drm/amd/display: store sharpness 1dlut table in dscl_prog_data

dscl_prog_data. This ensures that each display can have its own sharpness setting. Reviewed-by: Ilya Bakoulin Signed-off-by: Samson Tam Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c | 3 ++- drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 3

[PATCH 13/16] drm/amd/display: Do not read DSC state if not in use

From: Ovidiu Bunea [why & how] DSC may be power gated when coming out of S0i3, so avoid polling DSC registers since it will fail anyways. Only read if it is known that DSC is in use. Reviewed-by: Charlene Liu Signed-off-by: Ovidiu Bunea Signed-off-by: Tom Chung --- .../drm/amd/displa

[PATCH 12/16] drm/amd/display: Fix idle optimizations entry log

and add them in DC Reviewed-by: Alvin Lee Signed-off-by: Aurabindo Pillai Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 8 ++-- drivers/gpu/drm/amd/display/dc/core/dc.c | 8 ++-- 2 files changed, 8 insertions(+), 8 deletions(-)

[PATCH 08/16] drm/amd/display: fix handling of max_downscale_src_width fail check in SPL

to populate dscl_prog_data Populate taps in spl_get_optimal_number_of_taps Reviewed-by: Alvin Lee Signed-off-by: Samson Tam Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm

[PATCH 11/16] drm/amd/display: Change MPC Tree visual confirm colours

] Use colours that only have 0 or MAX values in each component Reviewed-by: Alvin Lee Signed-off-by: Joshua Aberback Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd

[PATCH 10/16] drm/amd/display: Simplify dcn35_is_ips_supported()

From: Alex Hung [WHAT & HOW] The variable "ips_supported" is redundant and we can return from dcn35_smu_get_ips_supported directly. This fixes 1 UNUSED_VALUE issue reported by Coverity. Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Hung Signed-off-by: Tom Chung --- drive

[PATCH 07/16] drm/amd/display: Fix underflow when playing 8K video in full screen mode

ed-off-by: Dillon Varone Signed-off-by: Tom Chung --- .../drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c| 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c b/drivers/gpu/drm/amd/display/dc/d

[PATCH 04/16] Revert "drm/amd/display: update DML2 policy EnhancedPrefetchScheduleAccelerationFinal DCN35"

g, so there is another issue generic to that sequence that needs to be investigated. Cc: Mario Limonciello Cc: Alex Deucher Cc: sta...@vger.kernel.org Reviewed-by: Nicholas Kazlauskas Signed-off-by: Ovidiu Bunea Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dml2/dml2_policy.c | 1 +

[PATCH 05/16] drm/amd/display: Reduce HPD Detection Interval for IPS

m/amd/display: Add periodic detection for IPS") Reviewed-by: Roman Li Signed-off-by: Fangzhi Zuo Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu

[PATCH 03/16] drm/amd/display: Add P-State Stall Timeout Recovery Support for dcn401

From: Dillon Varone [WHY&HOW] Adds support for P-State stall timeout detection in DCHUBBUB. Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Tom Chung --- .../dc/dml2/dml21/inc/dml_top_dchub_registers.h | 1 + .../dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

[PATCH 02/16] drm/amd/display: Add a boot option to reduce phy ssc for HBR3

From: Hansen Dsouza [Why] Spread on DPREFCLK by 0.3 percent can have a negative effect on sink when PHY SSC is also spread by 0.3 percent [How] Add boot option for DMU to lower PHY SSC Reviewed-by: Nicholas Kazlauskas Signed-off-by: Hansen Dsouza Signed-off-by: Tom Chung --- drivers/gpu/drm

[PATCH 01/16] drm/amd/display: Optimize power up sequence for specific OLED

gned-off-by: Ovidiu Bunea Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc.h | 1 + drivers/gpu/drm/amd/display/dc/dc_types.h | 1 + .../drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 3 ++- drivers/gpu/drm/amd/display/dc/link/link_dpms.c

[PATCH 00/16] DC Patches Oct 28 2024

This DC patchset brings improvements in multiple areas. In summary, we highlight: - Fix polling DSC registers during S0i3 - Fix idle optimizations entry log - Change MPC Tree visual confirm colours - Fix underflow when playing 8K video in full screen mode - Optimize power up sequence for specific

[PATCH 24/24] drm/amd/display: Promote DAL to 3.2.296

position for AS-SDP - Update to using new dccg callbacks - Enable otg synchronization logic for DCN321 - Disable DCN401 UCLK P-State support on full updates Acked-by: Wayne Lin Signed-off-by: Martin Leung Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1

[PATCH 23/24] drm/amd/display: Remove unnecessary call to REG_SEQ_SUBMIT|WAIT_DONE

From: Rodrigo Siqueira [why & how] Remove unnecessary call to REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE, since those macros are not necessary anymore at the dpp1 set degamma. Those are part of an old implementation. Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira Signed-off-by: Tom C

[PATCH 21/24] drm/amd/display: fix cursor offset on rotation 180

nk: https://gitlab.freedesktop.org/drm/amd/-/issues/2247 Reviewed-by: Harry Wentland Fixes: 9d84c7ef8a87 ("drm/amd/display: Correct cursor position on horizontal mirror") Signed-off-by: Melissa Wen Signed-off-by: Hamza Mahfooz Signed-off-by: Alex Deucher Signed-off-by: Tom Chung Cc: sta...@vger.kernel.o

[PATCH 22/24] drm/amd/display: Adjust cursor position

patch. Fixes: 9d84c7ef8a87 ("drm/amd/display: Correct cursor position on horizontal mirror") Cc: Mario Limonciello Cc: Alex Deucher Cc: sta...@vger.kernel.org Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn1

[PATCH 20/24] drm/amd/display: Improve FAM control for DCN401

rm/amd/display: Add driver support for future FAMS versions") Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu

[PATCH 19/24] drm/amd/display: Remove unused field

From: Rodrigo Siqueira [why & how] Remove force_backlight_start_level since it is never used. Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dc.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/dis

[PATCH 17/24] drm/amd/display: remove redundant msg to pmfw at boot/resume

From: Charlene Liu [why & how] this is to remove redundant msg to pmfw at boot/resume since bios already power up dcn. Reviewed-by: Chris Park Signed-off-by: Charlene Liu Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 7 +-- 1 file change

[PATCH 18/24] drm/amd/display: Enable otg synchronization logic for DCN321

in dcn321. Fixes: 5f0c74915815 ("drm/amd/display: Fix for otg synchronization logic") Cc: Mario Limonciello Cc: Alex Deucher Cc: sta...@vger.kernel.org Reviewed-by: Alvin Lee Signed-off-by: Loan Chen Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource

[PATCH 16/24] drm/amd/display: Set max VTotal cap for dcn401

From: Dillon Varone [WHY&HOW] Set max VTotal cap for dcn401 because VTotal register is only 16 bits wide on dcn401. Reviewed-by: Chris Park Signed-off-by: Dillon Varone Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c | 1 + 1 file change

[PATCH 15/24] drm/amd/display: Perform outstanding programming on full updates

perform any strictly required outstanding programming. Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/core/dc.c | 121 + .../drm/amd/display/dc/core/dc_hw_sequencer.c | 123 ++ .../amd/display/dc

[PATCH 14/24] drm/amd/display: Disable DCN401 UCLK P-State support on full updates

f-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c index b604c8886ef4..ac0a21ac

[PATCH 13/24] drm/amd/display: Reduce redundant minimal transitions due to SubVP

k the transition as seamless. Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Tom Chung --- .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 25 ++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq

[PATCH 12/24] drm/amd/display: Optimize vstartup position for AS-SDP

Signed-off-by: Robin Chen Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c index

[PATCH 11/24] drm/amd/display: Fix print format specifiers in DC_LOG_IPS

From: Roman Li [Why] %d specifier is used for printing unsigned values. It can result in negative values in logs for unsigned variables. [How] Replace %d with %u for unsigned. Reviewed-by: Nicholas Kazlauskas Signed-off-by: Roman Li Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display

[PATCH 10/24] drm/amd/display: Check null pointer before try to access it

From: Wayne Lin [why & how] Make sure plane_state is not null before calling a function that dereferences it. Besides, remove redundant codes. Reviewed-by: Alex Hung Signed-off-by: Wayne Lin Signed-off-by: Tom Chung --- .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c

[PATCH 09/24] drm/amd/display: Check null pointer before try to access it

From: Rodrigo Siqueira [why & how] Change the order of the pipe_ctx->plane_state check to ensure that plane_state is not null before accessing it. Reviewed-by: Alex Hung Signed-off-by: Rodrigo Siqueira Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

[PATCH 08/24] drm/amd/display: guard otg disable w/a for test

From: Muhammad Ahmed [why & how] HW removed this w/a, but we will still keep it to avoid regression. but return in test mode. Reviewed-by: Charlene Liu Signed-off-by: Muhammad Ahmed Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 3 +++ 1

[PATCH 07/24] drm/amd/display: Add more logging for MALL static screen

From: Aurabindo Pillai [why & how] print additional info for MALL related calculations and DMCUB messaging to aid debugging. Reviewed-by: Rodrigo Siqueira Signed-off-by: Aurabindo Pillai Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

[PATCH 05/24] drm/amd/display: Unlock Pipes Based On DET Allocation

pipes. Reviewed-by: Alvin Lee Signed-off-by: Austin Zheng Signed-off-by: Tom Chung --- .../gpu/drm/amd/display/dc/core/dc_resource.c | 28 ++ .../display/dc/hubbub/dcn401/dcn401_hubbub.c | 23 + .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 91 +++ .../amd/display/dc

[PATCH 04/24] drm/amd/display: Check null pointers before using dc->clk_mgr

es to "dcn35_apply_idle_power_optimizations".) This fixes 1 FORWARD_NULL issue reported by Coverity. Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Hung Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/core/dc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) dif

[PATCH 06/24] drm/amd/display: Update to using new dccg callbacks

From: Hansen Dsouza [Why and how] Update to using new dccg callbacks Reviewed-by: Chris Park Signed-off-by: Hansen Dsouza Signed-off-by: Tom Chung --- drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu

[PATCH 03/24] drm/amd/display: 3DLUT non-DMA refactor

d-off-by: Tom Chung --- .../amd/display/dc/hwss/dcn32/dcn32_init.c| 1 - .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 46 --- .../amd/display/dc/hwss/dcn401/dcn401_init.c | 2 +- 3 files changed, 21 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/amd/displ

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