On 09/01/2025 11:34, Saleemkhan Jamadar wrote:
Introduce db_info structure to the populate the doorbell
information that is required to be mapped.
Made changes to the doorbell mapping func more generic,
by taking parameters that vary based on IPs and/or usecase
into db_info structure.
v2 - Fi
On 09/01/2025 11:34, Saleemkhan Jamadar wrote:
VCN and VPE have different offset range, update the doorbell
offset range repsectively.
Doorbell size for VCN and VPE is 32bit .
v1 : add gfx switch case and fix checkpatch warnings (Shashank)
Signed-off-by: Saleemkhan Jamadar
---
drivers/gpu/
Hello Saleem,
On 06/01/2025 17:45, Saleemkhan Jamadar wrote:
This structure basically used to the populate the doorbell
information that is required to be mapped.
Signed-off-by: Saleemkhan Jamadar
---
drivers/gpu/drm/amd/include/amdgpu_userqueue.h | 7 +++
1 file changed, 7 insertions(+
On 06/01/2025 17:45, Saleemkhan Jamadar wrote:
VCN and VPE have different offset range, update the doorbell
offset range repsectively.
Doorbell size for VCN and VPE is 32bit.
Signed-off-by: Saleemkhan Jamadar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 15 +++
1 file chan
On 06/01/2025 17:45, Saleemkhan Jamadar wrote:
Made changes to the doorbell mapping func more generic,
by taking parameters that vary based on IPs and/or usecase
into db_info structure.
Signed-off-by: Saleemkhan Jamadar
]
This line above is garbage, please make sure that you pass checkpatch.
On 03/01/2025 07:34, Saleemkhan Jamadar wrote:
Hi Shashank,
Replied inline [Saleem]
Regards,
Salem
On 02/01/25 18:58, Sharma, Shashank wrote:
+ (amd-gfx)
On 01/01/2025 07:03, Saleemkhan Jamadar wrote:
#resending patch
From 79cd62f882197505dbf9c489ead2b0bcab98209f Mon Sep 17 00:00:00
Lgtm, Reviewed-by: Shashank Sharma
Regards
Shashank
On 01/01/2025 02:58, Lu Yao wrote:
This patch add null pointer check for amdgpu_vm_put_task_info and
amdgpu_vm_get_task_info_vm, because there is only a warning if create
task_info failed in amdgpu_vm_init.
Fixes: b8f67b9ddf4f ("drm/amdgpu
+ (amd-gfx)
On 01/01/2025 07:03, Saleemkhan Jamadar wrote:
#resending patch
From 79cd62f882197505dbf9c489ead2b0bcab98209f Mon Sep 17 00:00:00 2001
From: Saleemkhan Jamadar
Date: Wed, 18 Dec 2024 19:30:22 +0530
Subject: [PATCH] drm/amdgpu: user queue doorbell allocation for IP reqs
Currenlty
[AMD Official Use Only - AMD Internal Distribution Only]
Please feel free to use:
Reviewed-by: Shashank Sharma
Regards
Shashank
From: Yadav, Arvind
Sent: Monday, December 23, 2024 4:34 PM
To: Koenig, Christian ; Sharma, Shashank
; Deucher, Alexander
Cc: amd
Jadav ;
airl...@gmail.com ; sim...@ffwll.ch ;
lucas.demar...@intel.com ; rodrigo.v...@intel.com
; jani.nik...@linux.intel.com
; andriy.shevche...@linux.intel.com
; l...@asahilina.net ;
michal.wajdec...@intel.com ; Sharma, Shashank
Cc: intel-...@lists.freedesktop.org ;
d
On 21/11/2024 16:19, Christian König wrote:
Am 21.11.24 um 14:10 schrieb Shashank Sharma:
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower offset mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
Deucher
Sent: Friday, October 18, 2024 9:18 PM
To: Sharma, Shashank
Cc: Deucher, Alexander ;
amd-gfx@lists.freedesktop.org ; Somalapuram,
Amaranath ; Koenig, Christian
; Yadav, Arvind
Subject: Re: [PATCH] drm/amdgpu: enable userqueue support for GFX12
On Tue, Oct 15, 2024 at 12:37 PM Sharma
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Shashank Sharma
Regards
Shashank
From: Yadav, Arvind
Sent: Tuesday, October 22, 2024 2:58 PM
To: Sharma, Shashank ; amd-gfx@lists.freedesktop.org
Cc: Yadav, Arvind ; Yadav, Arvind
Subject
On 15/10/2024 18:50, Alex Deucher wrote:
On Tue, Oct 15, 2024 at 12:33 PM Shashank Sharma
wrote:
This patch sets MES HQD mask to setup GFX queues for MES and KIQ
operations. We are using one queue each for KIQ operations, and
setting rest of the queues for MES scheduling.
This also fixes a r
On 15/10/2024 16:58, Alex Deucher wrote:
On Tue, Oct 15, 2024 at 6:13 AM Sharma, Shashank
wrote:
Hello Alex,
On 14/10/2024 22:29, Deucher, Alexander wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
-Original Message-
From: Sharma, Shashank
Sent: Thursday, October
Hello Alex,
On 14/10/2024 22:29, Deucher, Alexander wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
-Original Message-
From: Sharma, Shashank
Sent: Thursday, October 10, 2024 2:08 PM
To:amd-gfx@lists.freedesktop.org
Cc: Somalapuram, Amaranath; Deucher,
Alexander
On 17/09/2024 14:30, Christian König wrote:
Am 09.09.24 um 22:06 schrieb Shashank Sharma:
This patch adds support for userqueue resume. What it typically does is
this:
- adds a new delayed work for resuming all the queues.
- schedules this delayed work from the suspend work.
- validates the BO
On 19/09/2024 18:59, Alex Deucher wrote:
On Mon, Sep 9, 2024 at 4:07 PM Shashank Sharma wrote:
This patch series introduces base code of AMDGPU usermode queues for gfx
workloads. Usermode queues is a method of GPU workload submission into the
graphics hardware without any interaction with ker
On 17/09/2024 13:58, Christian König wrote:
Am 09.09.24 um 22:06 schrieb Shashank Sharma:
This patch adds suspend support for gfx userqueues. It typically does
the following:
- adds an enable_signaling function for the eviction fence, so that it
can trigger the userqueue suspend,
- adds a d
Hey Christian,
On 16/09/2024 16:14, Christian König wrote:
Am 09.09.24 um 22:06 schrieb Shashank Sharma:
This patch adds basic eviction fence framework for the gfx buffers.
The idea is to:
- One eviction fence is created per gfx process, at kms_open.
- This fence is attached to all the gem buff
Hello Alex
On 09/09/2024 22:31, Alex Deucher wrote:
On Mon, Sep 9, 2024 at 4:18 PM Shashank Sharma wrote:
From: Shashank Sharma
This reverts commit 81af32520e7aaa337fe132f16c12ce54170187ea.
This commit prevents a usermode queue client to get the shadow related
information.
Signed-off-by: S
Hey Christian,
On 19/08/2024 13:21, Christian König wrote:
Am 19.08.24 um 09:21 schrieb Friedrich Vock:
In Vulkan, it is the application's responsibility to perform adequate
synchronization before a sparse unmap, replace or BO destroy operation.
This adds an option to AMDGPU_VA_OPs to disable r
On 02/05/2024 23:25, Alex Deucher wrote:
On Thu, May 2, 2024 at 1:27 PM Shashank Sharma wrote:
This patch adds:
- A new IOCTL function to create and destroy
- A new structure to keep all the user queue data in one place.
- A function to generate unique index for the queue.
V1: Worked on revi
On 02/05/2024 17:22, Christian König wrote:
Am 26.04.24 um 15:48 schrieb Shashank Sharma:
This patch:
- adds a kernel config option "CONFIG_DRM_AMD_USERQ_GFX"
- moves the usequeue initialization code for all IPs under
this flag
so that the userqueue works only when the config is enabled.
On 02/05/2024 17:22, Christian König wrote:
Am 26.04.24 um 15:48 schrieb Shashank Sharma:
This patch:
- adds a kernel config option "CONFIG_DRM_AMD_USERQ_GFX"
- moves the usequeue initialization code for all IPs under
this flag
so that the userqueue works only when the config is enabled.
On 02/05/2024 17:19, Christian König wrote:
Am 26.04.24 um 15:48 schrieb Shashank Sharma:
Current MES GFX mask prevents FW to enable oversubscription. This patch
does the following:
- Fixes the mask values and adds a description for the same.
- Removes the central mask setup and makes it IP sp
On 02/05/2024 17:18, Christian König wrote:
Am 26.04.24 um 15:48 schrieb Shashank Sharma:
To support oversubscription, MES FW expects WPTR BOs to
be mapped into GART, before they are submitted to usermode
queues. This patch adds a function for the same.
V4: fix the wptr value before mapping l
On 02/05/2024 17:14, Christian König wrote:
Am 26.04.24 um 15:48 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
- Add
On 02/05/2024 16:10, Alex Deucher wrote:
On Thu, May 2, 2024 at 1:51 AM Sharma, Shashank wrote:
On 01/05/2024 22:44, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
From: Arvind Yadav
This patch does the necessary changes required to
enable compute workload
On 02/05/2024 15:55, Alex Deucher wrote:
On Thu, May 2, 2024 at 1:47 AM Sharma, Shashank wrote:
On 01/05/2024 22:41, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
This patch does necessary modifications to enable the SDMA
usermode queues using the existing
On 02/05/2024 15:06, Kasiviswanathan, Harish wrote:
[AMD Official Use Only - General]
-Original Message-
From: amd-gfx On Behalf Of Sharma,
Shashank
Sent: Thursday, May 2, 2024 1:32 AM
To: Alex Deucher
Cc: amd-gfx@lists.freedesktop.org; Yadav, Arvind ; Deucher, Alexander
; Koenig
On 02/05/2024 07:23, Sharma, Shashank wrote:
Hey Alex,
On 01/05/2024 22:39, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and
On 01/05/2024 22:44, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
From: Arvind Yadav
This patch does the necessary changes required to
enable compute workload support using the existing
usermode queues infrastructure.
Cc: Alex Deucher
Cc: Christian Koenig
S
On 01/05/2024 22:41, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:27 AM Shashank Sharma
wrote:
This patch does necessary modifications to enable the SDMA
usermode queues using the existing userqueue infrastructure.
V9: introduced this patch in the series
Cc: Christian König
Cc: Alex Deuc
On 01/05/2024 23:36, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 9:57 AM Shashank Sharma wrote:
To support oversubscription, MES FW expects WPTR BOs to
be mapped into GART, before they are submitted to usermode
queues. This patch adds a function for the same.
V4: fix the wptr value before ma
On 01/05/2024 23:11, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint object for the same, and calculates
GPU space offset
On 01/05/2024 22:50, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 9:48 AM Shashank Sharma wrote:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
Hey Alex,
On 01/05/2024 22:39, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
wrote:
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work qu
On 05/04/2024 18:39, Joshi, Mukul wrote:
[AMD Official Use Only - General]
-Original Message-
From: Sharma, Shashank
Sent: Friday, April 5, 2024 11:37 AM
To: Joshi, Mukul ; amd-gfx@lists.freedesktop.org
Cc: Koenig, Christian ; Deucher, Alexander
; Yadav, Arvind
Subject: Re: [PATCH
On 05/04/2024 17:26, Joshi, Mukul wrote:
[AMD Official Use Only - General]
-Original Message-
From: amd-gfx On Behalf Of
Shashank Sharma
Sent: Friday, April 5, 2024 10:36 AM
To: amd-gfx@lists.freedesktop.org
Cc: Sharma, Shashank ; Koenig, Christian
; Deucher, Alexander
; Yadav
Hi Alex,
On 02/04/2024 02:42, Liu, Shaoyun wrote:
[AMD Official Use Only - General]
[AMD Official Use Only - General]
Comments inline
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Saturday, March 30, 2024 10:01 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alex
On 03/04/2024 09:31, Yu, Lang wrote:
[AMD Official Use Only - General]
-Original Message-
From: Sharma, Shashank
Sent: Wednesday, April 3, 2024 3:19 PM
To: Yu, Lang ; Christian König
; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
Subject: Re: [PATCH] drm
Hey Lang,
On 03/04/2024 08:51, Yu, Lang wrote:
[AMD Official Use Only - General]
-Original Message-
From: Christian König
Sent: Tuesday, April 2, 2024 9:38 PM
To: Yu, Lang ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Sharma, Shashank
Subject: Re
Thanks for the patch,
Patch pushed for staging.
Regards
Shashank
On 25/03/2024 00:23, Alex Deucher wrote:
On Sat, Mar 23, 2024 at 4:47 PM Sharma, Shashank
wrote:
On 23/03/2024 15:52, Johannes Weiner wrote:
On Thu, Mar 14, 2024 at 01:09:57PM -0400, Johannes Weiner wrote:
Hello,
On Fri
[AMD Official Use Only - General]
From: amd-gfx on behalf of Liu, Shaoyun
Sent: Monday, March 25, 2024 1:58 PM
To: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu : Increase the mes log buffer size as per new
MES FW version
[AMD Official Use
[AMD Official Use Only - General]
Hey Alex,
Sure, I will pick it up and push it to staging.
Regards
Shashank
From: Alex Deucher
Sent: Monday, March 25, 2024 12:23 AM
To: Sharma, Shashank
Cc: Johannes Weiner ; Christian König
; Deucher, Alexander
; Koenig
On 23/03/2024 15:52, Johannes Weiner wrote:
On Thu, Mar 14, 2024 at 01:09:57PM -0400, Johannes Weiner wrote:
Hello,
On Fri, Mar 08, 2024 at 12:32:33PM +0100, Christian König wrote:
Am 07.03.24 um 23:07 schrieb Johannes Weiner:
Lastly I went with an open loop instead of a memcpy() as I wasn'
On 18/03/2024 16:24, Christian König wrote:
Am 18.03.24 um 16:22 schrieb Sharma, Shashank:
On 18/03/2024 16:01, Christian König wrote:
Am 18.03.24 um 15:44 schrieb Shashank Sharma:
The idea behind this patch is to delay the freeing of PT entry objects
until the TLB flush is done.
This
, Alexander
; Sharma, Shashank
Subject: [PATCH v9 1/2] drm/amdgpu: implement TLB flush fence
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
From: Christian Koenig
The problem is that when (for example) 4k pages
On 18/03/2024 19:10, Christian König wrote:
Am 18.03.24 um 17:11 schrieb Shashank Sharma:
From: Christian Koenig
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
On 18/03/2024 16:01, Christian König wrote:
Am 18.03.24 um 15:44 schrieb Shashank Sharma:
The idea behind this patch is to delay the freeing of PT entry objects
until the TLB flush is done.
This patch:
- Adds a tlb_flush_waitlist in amdgpu_vm_update_params which will
keep the
objects tha
On 18/03/2024 15:58, Christian König wrote:
Am 18.03.24 um 13:08 schrieb Shashank Sharma:
From: Christian Koenig
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
[AMD Official Use Only - General]
Already sent a NULL check patch based on this backtrace, I am waiting for
Rajneesh's feedback.
Regards
Shashank
From: Bhardwaj, Rajneesh
Sent: Monday, March 18, 2024 3:04 PM
To: Sharma, Shashank ; amd-gfx@lists.freedeskto
On 14/03/2024 06:58, Khatri, Sunil wrote:
On 3/14/2024 2:06 AM, Alex Deucher wrote:
On Tue, Mar 12, 2024 at 8:42 AM Sunil Khatri
wrote:
Add firmware version information of each
IP and each instance where applicable.
Is there a way we can share some common code with devcoredump,
debugfs, a
On 12/03/2024 09:31, Christian König wrote:
Am 11.03.24 um 15:37 schrieb Sharma, Shashank:
On 07/03/2024 20:22, Philip Yang wrote:
On 2024-03-06 09:41, Shashank Sharma wrote:
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need
On 07/03/2024 20:22, Philip Yang wrote:
On 2024-03-06 09:41, Shashank Sharma wrote:
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
Solv
On 07/03/2024 00:54, Felix Kuehling wrote:
On 2024-03-06 09:41, Shashank Sharma wrote:
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
S
On 01/03/2024 14:29, Christian König wrote:
Am 01.03.24 um 12:07 schrieb Shashank Sharma:
The idea behind this patch is to delay the freeing of PT entry objects
until the TLB flush is done.
This patch:
- Adds a tlb_flush_waitlist which will keep the objects that need to be
freed after tl
On 01/03/2024 18:07, Felix Kuehling wrote:
On 2024-02-05 12:05, Shashank Sharma wrote:
This patch changes the handling and lifecycle of vm->task_info object.
The major changes are:
- vm->task_info is a dynamically allocated ptr now, and its uasge is
reference counted.
- introducing two new h
On 01/03/2024 13:59, Christian König wrote:
Am 01.03.24 um 12:07 schrieb Shashank Sharma:
From: Christian König
The problem is that when (for example) 4k pages are replaced
with a single 2M page we need to wait for change to be flushed
out by invalidating the TLB before the PT can be freed.
On 26/02/2024 17:52, Philip Yang wrote:
On 2024-02-23 08:42, Shashank Sharma wrote:
This patch:
- adds a new list in amdgou_vm to hold the VM PT entries being freed
- waits for the TLB flush using the vm->tlb_flush_fence
- actually frees the PT BOs
V2: rebase
V3: Do not attach the tlb_fence
[AMD Official Use Only - General]
Please feel free to use:
Reviewed-by: Shashank Sharma
Regards
Shashank
From: Christian König
Sent: Monday, February 26, 2024 3:45 PM
To: Sharma, Shashank ; amd-gfx@lists.freedesktop.org
Cc: Koenig, Christian ; Deucher
Hey Christian,
On 01/02/2024 14:48, Christian König wrote:
Am 31.01.24 um 18:14 schrieb Shashank Sharma:
This patch:
- Attaches the TLB flush fence to the PT objects being freed
- Adds a new ptr in VM to save this last TLB flush fence
- Adds a new lock in VM to prevent out-of-context update o
[AMD Official Use Only - General]
Reviewed-by: Shashank Sharma
Regards
Shashank
-Original Message-
From: Icenowy Zheng
Sent: Sunday, October 8, 2023 8:47 AM
To: Deucher, Alexander ; Koenig, Christian
; Pan, Xinhui ; David Airlie
; Daniel Vetter ; Sharma, Shashank
; Yadav, Arvind
Cc
[AMD Official Use Only - General]
-Original Message-
From: Zhang, Yifan
Sent: Wednesday, September 20, 2023 4:48 PM
To: Sharma, Shashank ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Yadav, Arvind ; Sharma,
Shashank
Subject: RE: [PATCH v6 3/9] drm/amdgpu
@lists.freedesktop.org; linux-ker...@vger.kernel.org; Sharma, Shashank
Cc: kernel-...@igalia.com; Deucher, Alexander ;
Pelloux-Prayer, Pierre-Eric
Subject: Re: [PATCH v6 1/5] drm/amdgpu: Allocate coredump memory in a
nonblocking way
Am 11.09.23 um 05:00 schrieb André Almeida:
> During a GPU reset, a normal mem
[AMD Official Use Only - General]
Hey Christian,
Will do that.
Regards
Shashank
-Original Message-
From: Koenig, Christian
Sent: Monday, September 11, 2023 1:15 PM
To: André Almeida ; dri-de...@lists.freedesktop.org;
amd-gfx@lists.freedesktop.org; linux-ker...@vger.kernel.org; Sharma
; Daniel Vetter
; Sharma, Shashank ;
amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Subject: [PATCH 11/20] drm/amd/amdgpu/amdgpu_doorbell_mgr: Correct
misdocumented param 'doorbell_index'
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/
, Alexander ; Koenig, Christian
; Sharma, Shashank ; Zhang,
Yifan
Subject: [PATCH] Revert "drm/amdgpu: don't modify num_doorbells for mes"
This reverts commit f46644aa8de6d5efeff8d8c7fbf3ed58a89c765c.
THe doorbell index could go beyond the first page for mes queues, this patch
breaks th
[Public]
> CSA, GDS backup, and shadow are allocated by userspace now.
Noted Alex, thanks. I will update the patch series and userspace accordingly.
Regards
Shashank
-Original Message-
From: Deucher, Alexander
Sent: 25 April 2023 19:38
To: Sharma, Shashank ; Koenig, Christian
;
calls amdgpu_free_userq, which does the destroy_OP
for the IOCTL.
- Shashank
-Original Message-
From: Bas Nieuwenhuizen
Sent: 10 April 2023 11:26
To: Sharma, Shashank
Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Kuehling, Felix ; Koenig,
Christian ; Yadav, Arvind
Subject
:
https://gitlab.freedesktop.org/contactshashanksharma/userq-amdgpu/-/tree/integrated-db-and-uq-v3
Please stay tuned for updated libDRM changes with doorbell objects.
Regards
Shashank
-Original Message-
From: Bas Nieuwenhuizen
Sent: 10 April 2023 02:37
To: Sharma, Shashank
Cc: amd-gfx
[AMD Official Use Only - General]
Hey Luben,
Agree and noted.
I have configured my editor to write the code according to the alignment
conventions, but probably something missed the mark.
- Shashank
-Original Message-
From: Tuikov, Luben
Sent: 30 March 2023 15:50
To: Sharma
one option from the patch:
+#define AMDGPU_CTX_WORKLOAD_HINT_VR
Regards
Shashank
From: Koenig, Christian
Sent: 22 March 2023 15:29
To: Marek Olšák
Cc: Christian König ; Sharma, Shashank
; Deucher, Alexander ;
Somalapuram, Amaranath ;
amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 1/5
: Marek Olšák
Sent: 21 March 2023 04:05
To: Sharma, Shashank
Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Somalapuram, Amaranath
; Koenig, Christian
Subject: Re: [PATCH v3 1/5] drm/amdgpu: add UAPI for workload hints to ctx ioctl
I think we should do it differently because this
[AMD Official Use Only - General]
+ Uday, for awareness.
Regards
Shashank
-Original Message-
From: Pekka Paalanen
Sent: 14 February 2023 10:28
To: Melissa Wen
Cc: Ville Syrjälä ;
dri-de...@lists.freedesktop.org; airl...@gmail.com;
laurent.pinchart+rene...@ideasonboard.com; Sharma
On 9/30/2022 11:54 AM, Lazar, Lijo wrote:
On 9/30/2022 2:52 PM, Sharma, Shashank wrote:
On 9/30/2022 11:13 AM, Lazar, Lijo wrote:
On 9/30/2022 2:07 PM, Sharma, Shashank wrote:
On 9/30/2022 7:08 AM, Lazar, Lijo wrote:
On 9/30/2022 12:02 AM, Alex Deucher wrote:
On Thu, Sep 29
On 9/30/2022 11:13 AM, Lazar, Lijo wrote:
On 9/30/2022 2:07 PM, Sharma, Shashank wrote:
On 9/30/2022 7:08 AM, Lazar, Lijo wrote:
On 9/30/2022 12:02 AM, Alex Deucher wrote:
On Thu, Sep 29, 2022 at 10:14 AM Lazar, Lijo
wrote:
On 9/29/2022 7:30 PM, Sharma, Shashank wrote:
On 9
On 9/30/2022 7:08 AM, Lazar, Lijo wrote:
On 9/30/2022 12:02 AM, Alex Deucher wrote:
On Thu, Sep 29, 2022 at 10:14 AM Lazar, Lijo wrote:
On 9/29/2022 7:30 PM, Sharma, Shashank wrote:
On 9/29/2022 3:37 PM, Lazar, Lijo wrote:
To be clear your understanding -
Nothing is automatic in
On 9/29/2022 4:14 PM, Lazar, Lijo wrote:
On 9/29/2022 7:30 PM, Sharma, Shashank wrote:
On 9/29/2022 3:37 PM, Lazar, Lijo wrote:
To be clear your understanding -
Nothing is automatic in PMFW. PMFW picks a priority based on the
actual mask sent by driver.
Assuming lower bits
On 9/29/2022 3:37 PM, Lazar, Lijo wrote:
To be clear your understanding -
Nothing is automatic in PMFW. PMFW picks a priority based on the actual
mask sent by driver.
Assuming lower bits corresponds to highest priority -
If driver sends a mask with Bit3 and Bit 0 set, PMFW will chose prof
On 9/29/2022 1:10 PM, Lazar, Lijo wrote:
On 9/29/2022 2:18 PM, Sharma, Shashank wrote:
On 9/28/2022 11:51 PM, Alex Deucher wrote:
On Wed, Sep 28, 2022 at 4:57 AM Sharma, Shashank
wrote:
On 9/27/2022 10:40 PM, Alex Deucher wrote:
On Tue, Sep 27, 2022 at 11:38 AM Sharma, Shashank
On 9/28/2022 11:51 PM, Alex Deucher wrote:
On Wed, Sep 28, 2022 at 4:57 AM Sharma, Shashank
wrote:
On 9/27/2022 10:40 PM, Alex Deucher wrote:
On Tue, Sep 27, 2022 at 11:38 AM Sharma, Shashank
wrote:
On 9/27/2022 5:23 PM, Felix Kuehling wrote:
Am 2022-09-27 um 10:58 schrieb Sharma
Small correction,
On 9/28/2022 10:56 AM, Sharma, Shashank wrote:
On 9/27/2022 10:40 PM, Alex Deucher wrote:
On Tue, Sep 27, 2022 at 11:38 AM Sharma, Shashank
wrote:
On 9/27/2022 5:23 PM, Felix Kuehling wrote:
Am 2022-09-27 um 10:58 schrieb Sharma, Shashank:
Hello Felix,
Thank for the
On 9/27/2022 10:40 PM, Alex Deucher wrote:
On Tue, Sep 27, 2022 at 11:38 AM Sharma, Shashank
wrote:
On 9/27/2022 5:23 PM, Felix Kuehling wrote:
Am 2022-09-27 um 10:58 schrieb Sharma, Shashank:
Hello Felix,
Thank for the review comments.
On 9/27/2022 4:48 PM, Felix Kuehling wrote:
Am
On 9/27/2022 7:13 PM, Michel Dänzer wrote:
On 2022-09-27 18:59, Sharma, Shashank wrote:
Hey Michel,
Thanks for the review coments.
On 9/27/2022 6:24 PM, Michel Dänzer wrote:
On 2022-09-26 23:40, Shashank Sharma wrote:
AMDGPU SOCs supports dynamic workload based power profiles, which can
On 9/27/2022 6:33 PM, Michel Dänzer wrote:
On 2022-09-27 13:47, Sharma, Shashank wrote:
On 9/27/2022 12:03 PM, Lazar, Lijo wrote:
On 9/27/2022 3:10 AM, Shashank Sharma wrote:
This patch and switches the GPU workload based profile based
on the workload hint information saved in the workload
Hey Michel,
Thanks for the review coments.
On 9/27/2022 6:24 PM, Michel Dänzer wrote:
On 2022-09-26 23:40, Shashank Sharma wrote:
AMDGPU SOCs supports dynamic workload based power profiles, which can
provide fine-tuned performance for a particular type of workload.
This patch series adds an int
On 9/27/2022 5:23 PM, Felix Kuehling wrote:
Am 2022-09-27 um 10:58 schrieb Sharma, Shashank:
Hello Felix,
Thank for the review comments.
On 9/27/2022 4:48 PM, Felix Kuehling wrote:
Am 2022-09-27 um 02:12 schrieb Christian König:
Am 26.09.22 um 23:40 schrieb Shashank Sharma:
This patch
Hello Felix,
Thank for the review comments.
On 9/27/2022 4:48 PM, Felix Kuehling wrote:
Am 2022-09-27 um 02:12 schrieb Christian König:
Am 26.09.22 um 23:40 schrieb Shashank Sharma:
This patch switches the GPU workload mode to/from
compute mode, while submitting compute workload.
Signed-off-
On 9/27/2022 4:34 PM, Lazar, Lijo wrote:
On 9/27/2022 7:50 PM, Sharma, Shashank wrote:
On 9/27/2022 4:00 PM, Lazar, Lijo wrote:
On 9/27/2022 7:17 PM, Sharma, Shashank wrote:
On 9/27/2022 3:29 PM, Lazar, Lijo wrote:
On 9/27/2022 6:23 PM, Sharma, Shashank wrote:
On 9/27/2022 2
On 9/27/2022 4:00 PM, Lazar, Lijo wrote:
On 9/27/2022 7:17 PM, Sharma, Shashank wrote:
On 9/27/2022 3:29 PM, Lazar, Lijo wrote:
On 9/27/2022 6:23 PM, Sharma, Shashank wrote:
On 9/27/2022 2:39 PM, Lazar, Lijo wrote:
On 9/27/2022 5:53 PM, Sharma, Shashank wrote:
On 9/27/2022 2
On 9/27/2022 3:29 PM, Lazar, Lijo wrote:
On 9/27/2022 6:23 PM, Sharma, Shashank wrote:
On 9/27/2022 2:39 PM, Lazar, Lijo wrote:
On 9/27/2022 5:53 PM, Sharma, Shashank wrote:
On 9/27/2022 2:10 PM, Lazar, Lijo wrote:
On 9/27/2022 5:11 PM, Sharma, Shashank wrote:
On 9/27/2022 11
On 9/27/2022 2:39 PM, Lazar, Lijo wrote:
On 9/27/2022 5:53 PM, Sharma, Shashank wrote:
On 9/27/2022 2:10 PM, Lazar, Lijo wrote:
On 9/27/2022 5:11 PM, Sharma, Shashank wrote:
On 9/27/2022 11:58 AM, Lazar, Lijo wrote:
On 9/27/2022 3:10 AM, Shashank Sharma wrote:
This patch adds
On 9/27/2022 2:20 PM, Lazar, Lijo wrote:
On 9/27/2022 5:17 PM, Sharma, Shashank wrote:
On 9/27/2022 12:03 PM, Lazar, Lijo wrote:
On 9/27/2022 3:10 AM, Shashank Sharma wrote:
This patch and switches the GPU workload based profile based
on the workload hint information saved in the
On 9/27/2022 2:10 PM, Lazar, Lijo wrote:
On 9/27/2022 5:11 PM, Sharma, Shashank wrote:
On 9/27/2022 11:58 AM, Lazar, Lijo wrote:
On 9/27/2022 3:10 AM, Shashank Sharma wrote:
This patch adds new functions which will allow a user to
change the GPU power profile based a GPU workload
On 9/27/2022 12:03 PM, Lazar, Lijo wrote:
On 9/27/2022 3:10 AM, Shashank Sharma wrote:
This patch and switches the GPU workload based profile based
on the workload hint information saved in the workload context.
The workload profile is reset to NONE when the job is done.
Signed-off-by: Ale
On 9/27/2022 11:58 AM, Lazar, Lijo wrote:
On 9/27/2022 3:10 AM, Shashank Sharma wrote:
This patch adds new functions which will allow a user to
change the GPU power profile based a GPU workload hint
flag.
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/Ma
On 9/27/2022 11:29 AM, Quan, Evan wrote:
[AMD Official Use Only - General]
-Original Message-
From: Sharma, Shashank
Sent: Tuesday, September 27, 2022 3:30 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Somalapuram,
Amaranath ; Koenig, Christian
, Christian
; Sharma, Shashank
Subject: [PATCH v3 2/5] drm/amdgpu: add new functions to set GPU power
profile
This patch adds new functions which will allow a user to
change the GPU power profile based a GPU workload hint
flag.
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm
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