this
one in next week's promotion to save time. All of his patches are
focused on DCE devices (but the series below could have some impact on
new devices), and the last one addresses analog connector.
https://patchwork.freedesktop.org/series/152016/
Thanks
--
Rodrigo Siqueira
dce60_clock_source_create(ctx, bp,
> CLOCK_SOURCE_ID_PLL1, &clk_src_regs[0], true);
> + dce60_clock_source_create(ctx, bp,
> CLOCK_SOURCE_ID_PLL0, &clk_src_regs[0], true);
>
> pool->base.clock_sources[0] =
> -
This lgtm, but I guess it would be nice to
test this patch with other SI devices just to be sure
Reviewed-by: Rodrigo Siqueira
I added other display folks.
Thanks
> return &clk_mgr->base;
> }
> #endif
> --
> 2.50.1
>
--
Rodrigo Siqueira
, CLK_TYPE_DISPCLK);
> + else if (dsc_enc_caps->max_total_throughput_mps)
> + max_dispclk_khz = dsc_enc_caps->max_total_throughput_mps * 1000;
> + else
> + return 0;
>
> /* consider minimum odm slices required due to
>* 1) display pip
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 13 +++
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 11 +--
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 10 +--
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 11 +--
> drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 11 +--
> .../drm/amd/amdkfd/kfd_device_queue_manager.c | 2 +-
> 36 files changed, 454 insertions(+), 280 deletions(-)
>
> --
> 2.50.0
>
--
Rodrigo Siqueira
it_reg_write_reg_wait_helper,
> + .reset = jpeg_v4_0_5_ring_reset,
> };
>
> static void jpeg_v4_0_5_set_dec_ring_funcs(struct amdgpu_device *adev)
> --
> 2.50.0
>
--
Rodrigo Siqueira
ev, ring->me, true);
> amdgpu_amdkfd_resume(adev, true);
> + if (r)
> + return r;
>
> - return r;
> + return amdgpu_ring_reset_helper_end(ring, timedout_fence);
> }
>
> static int sdma_v5_0_stop_queue(struct amdgpu_ring *ring)
> --
> 2.50.0
>
--
Rodrigo Siqueira
ecovery = gfx_v10_0_ring_soft_recovery,
> .emit_mem_sync = gfx_v10_0_emit_mem_sync,
> .reset = gfx_v10_0_reset_kgq,
> .emit_cleaner_shader = gfx_v10_0_ring_emit_cleaner_shader,
> @@ -9950,7 +9922,6 @@ static const struct amdgpu_ring_funcs
> gfx_v10_0_ring_funcs_compute = {
> .emit_wreg = gfx_v10_0_ring_emit_wreg,
> .emit_reg_wait = gfx_v10_0_ring_emit_reg_wait,
> .emit_reg_write_reg_wait = gfx_v10_0_ring_emit_reg_write_reg_wait,
> - .soft_recovery = gfx_v10_0_ring_soft_recovery,
> .emit_mem_sync = gfx_v10_0_emit_mem_sync,
> .reset = gfx_v10_0_reset_kcq,
> .emit_cleaner_shader = gfx_v10_0_ring_emit_cleaner_shader,
> --
> 2.50.0
>
--
Rodrigo Siqueira
gt; + return amdgpu_ring_reset_helper_end(ring, timedout_fence);
> }
>
> static void gfx_v9_ip_print(struct amdgpu_ip_block *ip_block, struct
> drm_printer *p)
> --
> 2.50.0
>
--
Rodrigo Siqueira
8 @@ static int sdma_v5_2_restore_queue(struct amdgpu_ring
> *ring)
> r = sdma_v5_2_gfx_resume_instance(adev, inst_id, true);
>
> amdgpu_gfx_rlc_exit_safe_mode(adev, 0);
> - if (r)
> - return r;
> - amdgpu_fence_driver_force_completion(ring);
> - return 0;
> +
> + return r;
> }
>
> static int sdma_v5_2_ring_preempt_ib(struct amdgpu_ring *ring)
> --
> 2.50.0
>
--
Rodrigo Siqueira
tr_cpu_addr;
> @@ -550,4 +562,10 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev);
> void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
> int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
> bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring);
> +void amdgpu_ring_backup_unprocessed_commands(struct amdgpu_ring *ring,
> + struct amdgpu_fence *guilty_fence);
> +void amdgpu_ring_reset_helper_begin(struct amdgpu_ring *ring,
> + struct amdgpu_fence *guilty_fence);
> +int amdgpu_ring_reset_helper_end(struct amdgpu_ring *ring,
> + struct amdgpu_fence *guilty_fence);
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index f042372d9f2e6..ea9b0f050f799 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -765,6 +765,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct
> amdgpu_job *job,
> bool cleaner_shader_needed = false;
> bool pasid_mapping_needed = false;
> struct dma_fence *fence = NULL;
> + struct amdgpu_fence *af;
> unsigned int patch;
> int r;
>
> @@ -830,6 +831,9 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct
> amdgpu_job *job,
> r = amdgpu_fence_emit(ring, &fence, NULL, 0);
> if (r)
> return r;
> + /* this is part of the job's context */
> + af = container_of(fence, struct amdgpu_fence, base);
> + af->context = job->base.s_fence ?
> job->base.s_fence->finished.context : 0;
> }
>
> if (vm_flush_needed) {
> --
> 2.50.0
>
--
Rodrigo Siqueira
On 06/30, Alex Deucher wrote:
> On Tue, May 27, 2025 at 4:46 PM Rodrigo Siqueira wrote:
> >
> > Hi Alex,
> >
> > Follow some comments and questions.
> >
> > On 05/02, Alex Deucher wrote:
> > > Add an initial documentation page for user mode
-1 &&
> > + quirk_entries.boe_2420_2423_bl_force_pwm) {
> > + panel = drm_edid_get_panel_id(aconnector->drm_edid);
> > + if (panel == drm_edid_encode_panel_id('B', 'O', 'E', 0x0974) ||
> > + panel == drm_edid_encode_panel_id('B', 'O', 'E', 0x0977))
> > + caps->aux_support = false;
> > + }
It lgtm,
Additionally, I believe this is safe to merge since it only affects a
specific device. Perhaps display folks would like to include this as
part of this week's promotion? Anyway, Cc other devs from the display.
Reviewed-by: Rodrigo Siqueira
> > if (caps->aux_support)
> > aconnector->dc_link->backlight_control_type =
> > BACKLIGHT_CONTROL_AMD_AUX;
--
Rodrigo Siqueira
On 06/13, Mario Limonciello wrote:
> On 6/13/2025 9:58 AM, Melissa Wen wrote:
> > From: Rodrigo Siqueira
> >
> > Since DC is a shared code, this commit introduces a new file to work as
> > a mid-layer in DC for the edid manipulation.
> >
> > v3:
&g
+
> +Kernel and User Queues
> +==
> +
> +In order to properly validate and test performance, we have a driver option
> to
> +select what type of queues are enabled (kernel queues, user queues or both).
> +The user_queue driver parameter allows you to enable kernel queues only (0),
> +user queues and kernel queues (1), and user queues only (2). Enabling user
> +queues only will free up static queue assignments that would otherwise be
> used
> +by kernel queues for use by the scheduling firmware. Some kernel queues are
> +required for kernel driver operation and they will always be created. When
> the
> +kernel queues are not enabled, they are not registered with the drm scheduler
> +and the CS IOCTL will reject any incoming command submissions which target
> those
> +queue types. Kernel queues only mirrors the behavior on all existing GPUs.
> +Enabling both queues allows for backwards compatibility with old userspace
> while
> +still supporting user queues.
> --
> 2.49.0
>
--
Rodrigo Siqueira
DRM_WEDGE_RECOVERY_NONE);
> goto exit;
> }
> - dev_err(adev->dev, "Ring %s reset failure\n", ring->sched.name);
> + dev_err(adev->dev, "Ring %s reset failed\n", ring->sched.name);
> }
> dma_fence_set_error(&s_job->s_fence->finished, -ETIME);
>
> --
> 2.49.0
>
--
Rodrigo Siqueira
adev->gfx.me.num_queue_per_pipe = 2;
> adev->gfx.mec.num_mec = 2;
> adev->gfx.mec.num_pipe_per_mec = 4;
> --
> 2.49.0
>
--
Rodrigo Siqueira
On 05/20, Alex Deucher wrote:
> On Mon, May 19, 2025 at 7:59 PM Rodrigo Siqueira wrote:
> >
> > On 05/02, Christian König wrote:
> > > Testing this feature turned out that it was a bit unstable. The
> > > CP_VMID_RESET register takes the VMID which all submissi
> + dev_err(adev->dev, "Ring %s reset failed\n", ring->sched.name);
> }
> dma_fence_set_error(&s_job->s_fence->finished, -ETIME);
>
> --
> 2.34.1
>
Hi Christian,
I tested your series with Polaris and the 6600 series with the HangTest
suite, and with your series, the following tests failed:
- soft_recovery_loop
- soft_recovery_pagefault_read
- soft_recovery_pagefault_write
When using the latest code of the amd-staging-drm-next, all of the above
tests behave well. I'll try to identify what is going on.
Thanks
--
Rodrigo Siqueira
t; - .soft_recovery = gfx_v9_0_ring_soft_recovery,
> .emit_mem_sync = gfx_v9_0_emit_mem_sync,
> .emit_wave_limit = gfx_v9_0_emit_wave_limit,
> .reset = gfx_v9_0_reset_kcq,
> @@ -7598,7 +7587,7 @@ static const struct amdgpu_ring_funcs
> gfx_v9_0_ring_funcs_kiq = {
> 20 + /* gfx_v9_0_ring_emit_gds_switch */
> 7 + /* gfx_v9_0_ring_emit_hdp_flush */
> 5 + /* hdp invalidate */
> - 7 + /* gfx_v9_0_ring_emit_pipeline_sync */
> + 7 + 7 + 5 + 7 + /* PIPELINE_SYNC */
> SOC15_FLUSH_GPU_TLB_NUM_WREG * 5 +
> SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 7 +
> 8 + 8 + 8, /* gfx_v9_0_ring_emit_fence_kiq x3 for user fence,
> vm fence */
> --
> 2.34.1
>
--
Rodrigo Siqueira
On 05/05, Christian König wrote:
> On 5/4/25 23:47, Rodrigo Siqueira wrote:
> > In the GFX code, there are multiple parsers of the CSB buffer, which can
> > be avoided. This data is parsed via get_csb_buffer() in earlier stages,
> > and the result can be checked in "adev-
dcn35_update_odm has the same implementation as dcn314_update_odm. This
commit removes the duplicate implementation by using dcn314_update_odm
in the DCN35 code.
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 52 ---
.../amd/display/dc/hwss
DCN401 and DCN31 share the same implementation for disabling CRTC. This
commit makes DCN401 use the DCN31 implementation and removes the code
duplication in the DCN401.
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/optc/dcn31/dcn31_optc.c| 2 +-
.../amd/display/dc/optc/dcn31
The optc35_disable_crtc() function is a copy & paste from
optc31_disable_crtc. This commit removes the duplication in favor of
using optc31_disable_crtc.
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc/optc/dcn35/dcn35_optc.c| 35 +--
1 file changed, 1 inser
The *_enable_crtc function from DCN31 to the latest DCNs has the same
implementation. This commit removes all the duplications in favor of
using the optc31_enable_crtc implementation instead of duplicating the
code across different DCNs.
Signed-off-by: Rodrigo Siqueira
---
.../amd/display/dc
the reuse of old ASIC
implementation in new ASICs.
Thanks
Rodrigo Siqueira (4):
drm/amd/display: Use optc31_enable_crtc implementation for new DCNs
drm/amd/display: Use optc31_disable_crtc for DCN 31 and 401
drm/amd/display: Uses optc31_disable_crtc for DCN35
drm/amd/display: Replace
Remove the unnecessary parser of the CSB buffer in the GFX11, and
directly use the result from "adev->gfx.rlc.cs_ptr".
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 23 +--
1 file changed, 5 insertions(+), 18 deletions(-)
diff --
Remove the unnecessary parser of the CSB buffer in the GFX8, and
directly use the result from "adev->gfx.rlc.cs_ptr".
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 22 +-
1 file changed, 5 insertions(+), 17 deletions(-)
diff --git
Remove the unnecessary parser of the CSB buffer, and directly use the
result from "adev->gfx.rlc.cs_ptr".
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 23 +--
1 file changed, 5 insertions(+), 18 deletions(-)
diff --git a/driver
Use amdgpu_gfx_write_csb_to_ring() to replace duplicated CSB parse in
gfx_v9_0_cp_gfx_start().
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 23 ++-
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Remove the unnecessary parser of the CSB buffer in the GFX7, and
directly use the result from "adev->gfx.rlc.cs_ptr".
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 20 +---
1 file changed, 5 insertions(+), 15 deletions(-)
diff --git
he CSB buffer into the ring buffer.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 21 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 4
2 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
b/drivers/gpu/d
ptr, and avoid re-parse CSB.
Note: This series idea came from a discussion available in the below
link:
https://lore.kernel.org/amd-gfx/cadnq5_nagvaj1-7+_nzqszlsphccudrskkhkezjbeqg0gme...@mail.gmail.com/T/#m8fd6d9ce10b9644299f2f306f2a7d00a9aa1e5ee
Thanks
Rodrigo Siqueira (6):
drm/amd/amdgpu:
Add some random documentation associated with the ring buffer
manipulations and writeback.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 52 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 74
2 files changed, 125 insertions
ore ring documentation.
- Expand glossary.
Thanks
Rodrigo Siqueira (2):
drm/amdgpu: Add documentation to some parts of the AMDGPU ring and wb
Documentation/gpu: Add new entries to amdgpu glossary
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 33 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 33
1 file changed, 33 insertions(+)
diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst
b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
index 8e6af7cc76c2..70aceff4bdc6 100644
--- a
On 04/22, Alex Deucher wrote:
> On Mon, Apr 21, 2025 at 6:24 PM Rodrigo Siqueira wrote:
> >
> > Add some random documentation associated with the ring buffer
> > manipulations and writeback.
>
> I think this will result in documentation warnings if not all of the
>
Add some random documentation associated with the ring buffer
manipulations and writeback.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 28 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 37
2 files changed, 64 insertions
Add a description for the get_csb_buffer callback, update the glossary,
and add some extra information about RB, which is associated with CSB
configuration.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 6 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
Instead of having the hardcoded values for the CSB buffer in
gfx_v7_0_get_csb_buffer, use the values calculated in previous steps by
accessing raster_config and raster_config_1.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 25 ++---
1 file
Remove duplications from gfx_v6_0_get_csb_buffer by using CSB helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 29 ---
1 file changed, 4 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/drivers/gpu
Use CSB helpers to remove code duplication from gfx_v7_0_get_csb_buffer.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 30 ---
1 file changed, 4 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
b/drivers
Eliminate code duplication in gfx_v9_0_get_csb_buffer by using CSB
helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 32 ---
1 file changed, 4 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers
Remove code duplication from gfx_v8_0_get_csb_buffer by using CSB
helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 34 ---
1 file changed, 5 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers
Part of the code in gfx_v11_0_get_csb_buffer can be removed in favor of
some GFX CSB helpers. This commit removes the duplicated part for the
GFX 11 CSB function.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 34 --
1 file changed, 5
:
- Alex:
- Update GFX7 CSB to use rb_config struct.
- Expand documentation based on Alex's explanations in the previous
series.
Thanks
Rodrigo Siqueira (9):
drm/amdgpu/gfx: Introduce helpers handling CSB manipulation
drm/amdgpu/gfx: Use CSB helpers in gfx_v11_0_get_csb_buffer
drm/amdgp
X11.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 69 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 3 ++
2 files changed, 72 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
in
Remove duplicate code by using CSB helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 34 --
1 file changed, 5 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
On 04/13, Alex Deucher wrote:
> On Sat, Apr 12, 2025 at 4:22 PM Rodrigo Siqueira wrote:
> >
> > CHIP_KAVERI, CHIP_KABINI, and CHIP_MULLINS have the same buffer
> > manipulation as the default option in the switch case. Remove those
> > specific manipulations and rely
On 04/14, Mario Limonciello wrote:
> On 4/12/2025 3:37 PM, Rodrigo Siqueira wrote:
> > Add some random documentation associated with the ring buffer
> > manipulations and writeback.
> >
> > Signed-off-by: Rodrigo Siqueira
> > ---
> > driver
It looks like that CP_PACKET2 is from the radeon GPU driver and was
brought to amdgpu, but it was never used. This commit removes PACKET2
and related defines from amdgpu.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/cikd.h | 5 -
drivers/gpu/drm/amd/amdgpu/nvd.h| 5
Add some random documentation associated with the ring buffer
manipulations and writeback.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 29 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 37
2 files changed, 65
On 04/08, Rodrigo Siqueira wrote:
> On 04/07, Alex Deucher wrote:
> > On Mon, Apr 7, 2025 at 4:15 PM Rodrigo Siqueira wrote:
> > >
> > > On 04/07, Alex Deucher wrote:
> > > > On Sun, Apr 6, 2025 at 7:07 PM Rodrigo Siqueira
> > > > wrote:
>
Remove duplicate code by using CSB helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 34 --
1 file changed, 5 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
Eliminate code duplication in gfx_v9_0_get_csb_buffer by using CSB
helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 32 ---
1 file changed, 4 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers
Part of the code in gfx_v11_0_get_csb_buffer can be removed in favor of
some GFX CSB helpers. This commit removes the duplicated part for the
GFX 11 CSB function.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 34 --
1 file changed, 5
Remove code duplication from gfx_v8_0_get_csb_buffer by using CSB
helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 34 ---
1 file changed, 5 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers
Add a description for the get_csb_buffer callback and an entry for CSB
in the glossary.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 14 ++
2 files changed, 17 insertions(+)
diff --git a
X11.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 69 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 3 ++
2 files changed, 72 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
in
Use CSB helpers to remove code duplication from gfx_v7_0_get_csb_buffer.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 30 ---
1 file changed, 4 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
b/drivers
. Create a dedicated function for the preamble start.
2. Create a function to parse the cs data.
3. Create a helper for finishing the preamble.
4. Replace the duplicated part from gfx6 to 11.
For the GFX update, I created one commit for each to ensure this series
is bisectable.
Thanks
Rodrigo
CHIP_KAVERI, CHIP_KABINI, and CHIP_MULLINS have the same buffer
manipulation as the default option in the switch case. Remove those
specific manipulations and rely on the default behavior for them.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 9 -
1 file
Remove duplications from gfx_v6_0_get_csb_buffer by using CSB helpers.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 29 ---
1 file changed, 4 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/drivers/gpu
On 04/07, Alex Deucher wrote:
> On Mon, Apr 7, 2025 at 4:15 PM Rodrigo Siqueira wrote:
> >
> > On 04/07, Alex Deucher wrote:
> > > On Sun, Apr 6, 2025 at 7:07 PM Rodrigo Siqueira
> > > wrote:
> > > >
> > > > This patchset was inspired a
On 04/07, Alex Deucher wrote:
> On Sun, Apr 6, 2025 at 7:07 PM Rodrigo Siqueira wrote:
> >
> > This patchset was inspired and made on top of the below series:
> >
> > https://lore.kernel.org/amd-gfx/20250319162225.3775315-1-alexander.deuc...@amd.com/
> >
> &
generic files (e.g., amdgpu_gfx) and reduces the
number of includes.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 +++-
.../gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h | 2
Move the only specific GFX6 part from gfx_v6_0_get_csb_buffer to
gfx_get_csb_buffer and remove the gfx6 version.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 +
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 44 +
2 files changed, 9
the GFX9 code path. Finally, this commit eliminates
the unnecessary gfx_v9_0_get_csb_buffer function in favor of
gfx_get_csb_buffer.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 13 +---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 43
gfx11 and gfx10.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 3 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 57
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 50
has the same implementation found in gfx_v10_0_get_csb_buffer and
gfx_v11_0_get_csb_buffer (these two functions have the same code). After
that, every patch is dedicated to absorbing one of the csb_buffer
functions from gfx from 9 to 6; notice that some adaptations were
required.
Thanks
Rodrigo
specific operation.
2. Move mmPA_SC_RASTER_CONFIG registers to the common register list.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 12 -
drivers/gpu/drm/amd/amdgpu/cik.c | 2 +
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 2
The gfx_v7_0_get_csb_buffer function is incorporated into
gfx_get_csb_buffer, but it required to port some specific ASIC
operations to the function. Additionally, this transition also
eliminates some unnecessary code from gfx_v7_0_get_csb_buffer.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu
On 03/25, Alex Deucher wrote:
> On Tue, Mar 25, 2025 at 4:16 PM Rodrigo Siqueira wrote:
> >
> > On 03/19, Alex Deucher wrote:
> > > We shouldn't return after the last section.
> > > We need to update the rest of the CSIB.
> >
> > What is CSIB?
buffer[count++] =
> cpu_to_le32(ext->extent[i]);
> - } else {
> - return;
> }
> }
> }
> --
> 2.48.1
>
--
Rodrigo Siqueira
provides a number of debugfs files to aid in debugging
> +issues in the driver. Thse are usually found in
/Thse/These/
With that change:
Reviewed-by: Rodrigo Siqueira
> +/sys/kernel/debug/dri/.
> +
> +DebugFS Files
> +=
> +
> +amdgpu_benchmark
> +--
n == 0xc3) &&
> - (adev->pdev->device == 0x6665)) {
> - info->is_kicker = true;
> - strscpy(fw_name,
> "radeon/banks_k_2_smc.bin");
> - } else {
> - strscpy(fw_name,
> "radeon/hainan_smc.bin");
> - }
> - break;
> case CHIP_BONAIRE:
Is there any specific reason why the other ASICs in this switch
(Bonaire, Hawaii, etc) are not using a similar mechanism like si_dpm.c?
Anyway,
Reviewed-by: Rodrigo Siqueira
Thanks
> if ((adev->pdev->revision == 0x80) ||
> (adev->pdev->revision == 0x81) ||
> --
> 2.49.0
>
--
Rodrigo Siqueira
Since driver-core has an overview of the AMD GPU hardware structure, it
makes more sense to keep it first. This commit move driver-core up in
the index list.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/index.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 03/18, Alex Deucher wrote:
> On Tue, Mar 18, 2025 at 1:46 PM Rodrigo Siqueira wrote:
> >
> > On 03/13, Alex Deucher wrote:
> > > On Thu, Mar 13, 2025 at 6:21 PM Rodrigo Siqueira
> > > wrote:
> > > >
> > > > n 03/13, Alex Deucher wrot
MES is an important firmware that lacks some essential documentation.
This commit introduces an overview of it and how it works.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/driver-core.rst | 2 ++
Documentation/gpu/amdgpu/gc/index.rst| 7 -
Documentation/gpu/amdgpu/gc
This commit introduces some new acronyms extracted from the source code
and found on some web pages around the internet (most of them came from
ArchLinux, Gentoo, and Wikipedia links).
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 36
1
just some basic organization to improve the documentation
flow. The last part describes pipes, hardware queues, ring buffers, and
MES.
Thanks
Siqueira
Rodrigo Siqueira (6):
Documentation/gpu: Add new acronyms
Documentation/gpu: Change index order to show driver core first
Documentation/gpu
GC is a large block that plays a vital role for amdgpu; for this reason,
this commit creates one specific page for GC and adds extra information
about the CP component.
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/driver-core.rst | 30 ++-
Documentation/gpu/amdgpu/gc
/#m9a670b55ab20e0f7c46c80f802a0a4be255a719d
- https://gitlab.freedesktop.org/mesa/mesa/-/issues/11759
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/driver-core.rst | 49 +
.../gpu/amdgpu/pipe_and_queue_abstraction.svg | 1279 +
2 files changed, 1328 insertions(+)
create mode 100644
The APU and dGPU tables are hidden in the driver misc info, which makes
it hard to find specific hardware info when users need it. This commit
creates a single page for this information and adds it to the top of the
amdgpu list to improve searchability.
Signed-off-by: Rodrigo Siqueira
"amdgpu: failed to initialize vblank sw for display
> support.\n");
> goto error;
> }
>
> --
> 2.34.1
>
Reviewed-by: Rodrigo Siqueira
--
Rodrigo Siqueira
On 03/13, Alex Deucher wrote:
> On Thu, Mar 13, 2025 at 6:21 PM Rodrigo Siqueira wrote:
> >
> > n 03/13, Alex Deucher wrote:
> > > To better evaluate user queues, add a module parameter
> > > to disable kernel queues. With this set kernel queues
> >
dex b4fd1e17205e9..4a97afcb38b78 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -297,6 +297,7 @@ struct amdgpu_ring {
> struct dma_fence*vmid_wait;
> boolhas_compute_vm_bug;
> boolno_scheduler;
> + boolno_user_submission;
> int hw_prio;
> unsignednum_hw_submission;
> atomic_t*sched_score;
> @@ -310,7 +311,6 @@ struct amdgpu_ring {
> unsigned intentry_index;
> /* store the cached rptr to restore after reset */
> uint64_t cached_rptr;
> -
> };
>
> #define amdgpu_ring_parse_cs(r, p, job, ib) ((r)->funcs->parse_cs((p),
> (job), (ib)))
> --
> 2.48.1
>
--
Rodrigo Siqueira
drm/amd/amdgpu/gmc_v10_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 16 +-
> drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 15 +-
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 4 +
> drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 4 +
> 17 files changed, 345 insertions(+), 155 deletions(-)
>
> --
> 2.48.1
>
--
Rodrigo Siqueira
>me = i;
> + ring->no_user_submission = adev->sdma.no_user_submission;
>
> DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,
> ring->use_doorbell?"true":"false");
> --
> 2.48.1
>
Hi Alex,
I think patch 9-11 could be a squashed in a single one.
Thanks
--
Rodrigo Siqueira
te_ring[i];
> - if (ring->me == me_id && ring->pipe == pipe_id &&
> - ring->queue == queue_id)
> - drm_sched_fault(&ring->sched);
> + if (!adev->gfx.disable_kq) {
> + switch (me_id) {
> + case 0:
> + for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
> + ring = &adev->gfx.gfx_ring[i];
> + if (ring->me == me_id && ring->pipe == pipe_id
> &&
> + ring->queue == queue_id)
> + drm_sched_fault(&ring->sched);
> + }
> + break;
> + case 1:
> + case 2:
> + for (i = 0; i < adev->gfx.num_compute_rings; i++) {
> + ring = &adev->gfx.compute_ring[i];
> + if (ring->me == me_id && ring->pipe == pipe_id
> &&
> + ring->queue == queue_id)
> + drm_sched_fault(&ring->sched);
> + }
> + break;
> + default:
> + BUG();
> + break;
> }
> - break;
> - default:
> - BUG();
> - break;
> }
> }
>
> --
> 2.48.1
>
--
Rodrigo Siqueira
fb1b77cfc0377d477bdc
> > 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
> > @@ -63,6 +63,9 @@ void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv
> > *dmub_srv,
> >
> > bool should_use_dmub_lock(struct dc_link *link)
> > {
> > + /* ASIC doesn't support DMUB */
> > + if (!link->ctx->dmub_srv)
> > + return false;
> > if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 ||
> > link->psr_settings.psr_version == DC_PSR_VERSION_1)
> > return true;
> >
> > ---
> > base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
> > change-id: 20250205-amdgpu-dmub-3fc25a0bc68e
> >
> > Best regards,
> > --
> > Thadeu Lima de Souza Cascardo
> >
>
It looks like the patch pointed in the "Fixed" tag was reverted.
However, this patch is still valid. The should_use_dmub_lock() could be
called in a context without DMUB.
(+Other display folks)
Reviewed-by: Rodrigo Siqueira
Thanks
--
Rodrigo Siqueira
SPL_EXPAND2(a, b)
> #define SPL_NAMESPACE(symbol) SPL_EXPAND(SPL_PFX_, symbol)
>
> -#ifdef __cplusplus
> -extern "C" {
> -#endif
>
> /* SPL interfaces */
>
> --
> 2.43.0
>
Reviewed-by: Rodrigo Siqueira
--
Rodrigo Siqueira
> change-id: 20250227-amd-display-a8342c55a9a0
>
> Best regards,
> --
> Ethan Carter Edwards
>
Hi,
This series LGTM,
Reviewed-by: Rodrigo Siqueira
To Display folks,
(Cc some other devs)
If possible, try to include this series in this week's promotion tests,
or check the IGT test in the CI just to be safe.
Thanks
--
Rodrigo Siqueira
th shader waves.
> +
> +amdgpu_fw_attestation
> +-
> +
> +Provides an interface for reading back firmware attestation records.
What is this attestation record?
Is this available for all GPUs and APUs?
> diff --git a/Documentation/gpu/amdgpu/index.rst
> b/Documentation/gpu/amdgpu/index.rst
> index 302d039928ee8..5254f3a162f84 100644
> --- a/Documentation/gpu/amdgpu/index.rst
> +++ b/Documentation/gpu/amdgpu/index.rst
> @@ -17,4 +17,5 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA)
> architectures.
> driver-misc
> debugging
I believe this page is directly related to the debugging page. In this
sense, maybe add a new section about the debugfs entries to the
debugging page.
Thanks
> process-isolation
> + debugfs
> amdgpu-glossary
> --
> 2.48.1
>
--
Rodrigo Siqueira
On 02/26, Alex Deucher wrote:
> Some items were defined in both the general and DC glossaries.
> Remove the duplicate entries.
>
> Fixes: 2df30ae0ba0b ("Documentation/gpu: Add acronyms for some firmware
> components")
> Reported-by: Stephen Rothwell
> Cc: Rodrigo
Signed-off-by: Rodrigo Siqueira
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c8b35ca294a0..a94abf72e117 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1024,7 +1024,7 @@ F:drivers/crypto/ccp/hsti.*
AMD DISPLAY CORE
M
ned-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/amdgpu-glossary.rst | 45 ++--
1 file changed, 42 insertions(+), 3 deletions(-)
diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst
b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
index 00a47ebb0b0f..1e9283e076ba 10
Map all of my previously used email addresses to my @igalia.com address.
Signed-off-by: Rodrigo Siqueira
---
.mailmap | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.mailmap b/.mailmap
index 5e829da09e7f..64413bbc286c 100644
--- a/.mailmap
+++ b/.mailmap
@@ -583,6 +583,8 @@ Richard
This patchset changes my status from a Maintainer of the display code to
a reviewer, and it also adds an entry to my name in the mailmap file.
Thanks
Siqueira
Rodrigo Siqueira (2):
MAINTAINERS: Change my role from Maintainer to Reviewer
mailmap: Add entry for Rodrigo Siqueira
.mailmap
On 02/14, Alex Deucher wrote:
> On Fri, Feb 14, 2025 at 6:00 PM Rodrigo Siqueira wrote:
> >
> > Users can check the file "/sys/kernel/debug/dri/0/amdgpu_firmware_info"
> > to get information on the firmware loaded in the system. This file has
> > multiple ac
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