From: Alex Hung
[WHAT]
mode_select was supposed to be initialized in mpc_read_gamut_remap but
is not set in default case. This can cause indeterminate
behaviors.
This is reported as an UNINIT error by Coverity.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Alex Hung
Signed-off-by: Fangzhi Zuo
From: Alvin Lee
Reviewed-by: Sridevi Arvindekar
Signed-off-by: Alvin Lee
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c | 1 -
1 file changed, 1 deletion(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
b
an
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index f5df271c8d1a..c35978214e38 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++
: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index e6730e59d987..93f35ac7f5b9 100644
--- a/drivers/gpu/drm/amd/display/dmub
It is normal to prune resolutions that exceed hw or bw limitation.
Use error oriented wordings could cause misunderstanding.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
From: "Ostrowski, Rafal"
[Why]
Driver should be able to send LSDMA commands to DMCUB
[How]
Driver can now send LSDMA commands to DMCUB.
DMCUB should process them and send to LSDMA controller.
Reviewed-by: Alvin Lee
Signed-off-by: Ostrowski Rafal
Signed-off-by: Fangzhi Zuo
---
d
x27;t poll
in case the pixel clock or other clock was bugged or until vactive and
the vblank are hit again.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Wen Chen
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 +-
1 file changed, 1 insertion(+),
use it
as part of the calculations for required bandwidth.
Reviewed-by: Dillon Varone
Signed-off-by: Austin Zheng
Signed-off-by: Fangzhi Zuo
---
.../src/dml2_core/dml2_core_dcn4_calcs.c | 42 +++
.../src/dml2_core/dml2_core_shared_types.h| 16 ---
2 files changed
From: Ovidiu Bunea
[why & how]
Add DMUB IPS CMD interface for driver and
DMU to communicate for IPS residency tools.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Ovidiu Bunea
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 102 ++
dri
From: Austin Zheng
Update logging macros for detailed debugging
Update structs to contain more detailed information
Add HDMI 16 and 20 Gbps rates
Reviewed-by: Alvin Lee
Signed-off-by: Austin Zheng
Signed-off-by: Fangzhi Zuo
---
.../dml2/dml21/inc/dml_top_dchub_registers.h | 1
From: Ilya Bakoulin
Add the number of horizontal slices argument to allow configuring clock
based on slice number.
Reviewed-by: Nevenko Stupar
Signed-off-by: Ilya Bakoulin
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c | 2 +-
drivers/gpu/drm/amd
From: weiguali
[Why&How]
Found that we add redundant macro on refresh rate when calculating vtotal,
so we remove it.
Reviewed-by: Robin Chen
Signed-off-by: Weiguang Li
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 2 +-
1 file changed, 1 inser
From: Cruise Hung
[Why & How]
Add new function for DP tunnel bandwidth validation.
It uses the estimated BW and allocated BW to validate the timings.
Reviewed-by: PeiChen Huang
Reviewed-by: Meenakshikumar Somasundaram
Signed-off-by: Cruise Hung
Signed-off-by: Fangzhi Zuo
---
.../gpu
drm/amd/display: Add new DP tunnel bandwidth validation
Fangzhi Zuo (1):
drm/amd/display: Rewording Mode Validation Result
Ilya Bakoulin (1):
drm/amd/display: Add num_slices_h to set_dto_dscclk signature
Ostrowski, Rafal (1):
drm/amd/display: LSDMA support
Ovidiu Bunea (1):
drm/amd/di
This reverts commit 243678df7a058f65f5f43e8026b359bcc91e0b69.
Reason for revert: cause corruption on Dell U3224KB DP2 display.
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdg
: Wayne Lin
Signed-off-by: Fangzhi Zuo
---
.../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
b/drivers/gpu/drm/amd/display/amdgpu_dm
From: Aurabindo Pillai
drm_info prints the drm device instance which is helpful when
debugging multi gpu issues
Reviewed-by: Alex Hung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +--
1 file changed, 12
From: Aurabindo Pillai
make the drm device available in create_validate_stream_for_sink()
so that drm_err() can be used
Reviewed-by: Alex Hung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 +++--
1 file changed
From: Dillon Varone
[WHY&HOW]
Core should evaluate support based on the max clocks after considering
downspread.
Reviewed-by: Austin Zheng
Signed-off-by: Dillon Varone
Signed-off-by: Fangzhi Zuo
---
.../dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 6 +++---
.../amd/displa
replacement for the frame
buffer based mailbox (Inbox1). It supports all of the required features:
- Supports all messages handled by FB Inbox1
- Supports multi command batching
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Dillon Varone
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc
From: Robin Chen
Enable replay low refresh rate support.
Reviewed-by: ChunTao Tso
Signed-off-by: Robin Chen
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc
: Fangzhi Zuo
---
.../display/dc/dml2/dml2_dc_resource_mgmt.c | 24 +--
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
index a966abd40788
drm/amd/display: Fix VUpdate offset calculations for dcn401
drm/amd/display: Fix Vertical Interrupt definitions for dcn32, dcn401
Fangzhi Zuo (1):
drm/amd/display: Do Not Consider DSC if Valid Config Not Found
Joshua Aberback (1):
drm/amd/display: Use meaningful size for block_sequence ar
From: Aurabindo Pillai
prefer drm_err instead of DRM_ERROR since the former prints the
associated DRM device, which is helpful when debugging multi-gpu
use cases.
Reviewed-by: Alex Hung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm
, assume every update occurs on max number of pipes
- define array sizes for function parameters, for static analysis
Reviewed-by: Dillon Varone
Signed-off-by: Joshua Aberback
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c | 4 ++--
drivers/gpu/drm/amd
From: Dillon Varone
[WHY&HOW]
DCN401 uses a different structure to store the VStartup offset used to
calculate the VUpdate position, so adjust the calculations to use this
value.
Reviewed-by: Aric Cyr
Signed-off-by: Dillon Varone
Signed-off-by: Fangzhi Zuo
---
.../amd/display/dc/hwss/dc
From: Aric Cyr
Summary:
* Improve vrr for replay and psr
* Rewrite drm debug message
* Fix clock issues for dcn32 and dcn401
* Fix mst dsc mode validation issue
Reviewed-by: Aurabindo Pillai
Signed-off-by: Aric Cyr
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2
From: Aurabindo Pillai
add amdgpu_device pointer to data associated with the work struct
such that hpd handlers has access to the drm device for use with
drm_err()
Reviewed-by: Alex Hung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm
From: Dillon Varone
[WHY&HOW]
- VUPDATE_NO_LOCK should be used in place of VUPDATE always
- Add VERTICAL_INTERRUPT1 and VERTICAL_INTERRUPT2 definitions
Reviewed-by: Aric Cyr
Signed-off-by: Dillon Varone
Signed-off-by: Fangzhi Zuo
---
.../display/dc/irq/dcn32/irq_service_dcn32.c
From: Aurabindo Pillai
drm_warn prints the drm device instance which is helpful when
debugging multi gpu issues
Reviewed-by: Alex Hung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 26 +--
1 file changed, 13
ed-by: Sun peng Li
Signed-off-by: Tom Chung
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
b/drivers/gpu/drm/amd/display
From: ChunTao Tso
[Why]
Replay need special policy for the scenario Teams,
add a flag to imply apply special policy or not.
[How]
Add a config option intended for future use for video conferencing applications.
Reviewed-by: Aric Cyr
Signed-off-by: ChunTao Tso
Signed-off-by: Fangzhi Zuo
From: Aurabindo Pillai
pass in a pointer to amdgpu_device directly to the function.
Reviewed-by: Alex Hung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff
fixed by improving the timings check by using the hw cursor
required flag to cover the unaccounted use cases.
Reviewed-by: Austin Zheng
Signed-off-by: Peterson
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This DC patchset brings improvements in multiple areas. In summary, we have:
* Fix dcn351 clk table
* Bug fix on IP2, reply, DP tunneling
Cc: Daniel Wheeler
Alex Deucher (1):
drm/amdgpu: rework resume handling for display
Aric Cyr (1):
drm/amd/display: 3.2.312
Ausef Yousof (1):
drm/amd/d
call to calculate
UrgBChroma prefetch values
-revision commits: small formatting/brackets/null check addition + remove test
change + dGPU code
Reviewed-by: Charlene Liu
Signed-off-by: Ausef Yousof
Signed-off-by: Fangzhi Zuo
---
.../amd/display/dc/dml2/display_mode_core.c | 5
From: Aric Cyr
DC 3.2.312 contains some improvements as summarized below:
* Fix dcn351 clk table
* Bug fix on IP2, reply, DP tunneling
Reviewed-by: Fangzhi Zuo
Signed-off-by: Aric Cyr
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion
From: Samson Tam
[Why & How]
v and h tap calculations slightly different
Use h tap calculation for both v and h tap
Reviewed-by: Navid Assadian
Signed-off-by: Samson Tam
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 8
1 file changed, 4 insert
From: Alex Deucher
Split resume into a 3rd step to handle displays when DCC is
enabled on DCN 4.0.1. Move display after the buffer funcs
have been re-enabled so that the GPU will do the move and
properly set the DCC metadata for DCN.
Signed-off-by: Alex Deucher
Ack-by: Fangzhi Zuo
From: Cruise
Move DP tunneling field DPCD reading after all other RX caps are read.
Reviewed-by: Wenjing Liu
Signed-off-by: Cruise
Signed-off-by: Fangzhi Zuo
---
.../dc/link/protocols/link_dp_capability.c| 21 +--
1 file changed, 10 insertions(+), 11 deletions(-)
diff
ned-off-by: Nicholas Kazlauskas
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 5 -
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/
From: Charlene Liu
[why]
driver got wrong clock table due to miss match dtm_table headers.
correct the dtn_clock table based on pmfw header.
Reviewed-by: Alvin Lee
Reviewed-by: Sung joon Kim
Signed-off-by: Charlene Liu
Signed-off-by: Fangzhi Zuo
---
.../display/dc/clk_mgr/dcn35
From: Dennis Chan
[why]
Revised Replay Full screen video Pseudo vblank control.
Reviewed-by: ChunTao Tso
Signed-off-by: Dennis Chan
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc_types.h | 4 ++--
drivers/gpu/drm/amd/display/modules/power/power_helpers.c
dependency changes for
each vendor.
2. Rename passthrough_aux with dsc_passthrough_aux to align with the name of
dsc_aux.
Signed-off-by: Fangzhi Zuo
Signed-off-by: Wayne Lin
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 20
: split original single patch into two
v3: rebase against the latest code
v4: fix a ci issue
Fangzhi Zuo (2):
drm/display/dsc: Refactor DRM MST DSC Determination Policy
drm/display/dsc: MST DSC Interface Change
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
.../amd/display/amdgpu_dm
ce
types.
2. Synaptics quirk DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD analyzing is no
longer needed
as long as we determine dsc aux generically by dpcd info.
Signed-off-by: Fangzhi Zuo
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 241 -
ce
types.
2. Synaptics quirk DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD analyzing is no
longer needed
as long as we determine dsc aux generically by dpcd info.
Signed-off-by: Fangzhi Zuo
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 238 -
: split original single patch into two
v3: rebase against the latest code
Fangzhi Zuo (2):
drm/display/dsc: Refactor DRM MST DSC Determination Policy
drm/display/dsc: MST DSC Interface Change
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c
dependency changes for
each vendor.
2. Rename passthrough_aux with dsc_passthrough_aux to align with the name of
dsc_aux.
Signed-off-by: Fangzhi Zuo
Signed-off-by: Wayne Lin
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 20
ce
types.
2. Synaptics quirk DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD analyzing is no
longer needed
as long as we determine dsc aux generically by dpcd info.
Signed-off-by: Fangzhi Zuo
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 238 -
.
Fangzhi Zuo (2):
drm/display/dsc: Refactor DRM MST DSC Determination Policy
drm/display/dsc: MST DSC Interface Change
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 20 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 30 +-
drivers/gpu
dependency changes for
each vendor.
2. Rename passthrough_aux with dsc_passthrough_aux to align with the name of
dsc_aux.
Signed-off-by: Fangzhi Zuo
Signed-off-by: Wayne Lin
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 2 +-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 20
From: Aric Cyr
DC 3.2.303 contains some improvements as summarized below:
* Improve brightness control
* Add support for UHBR10 eDP
* OPTC required only for DTBCLK_P for dcn401
* Fix TBT monitor resume issue
* Code cleanup
Signed-off-by: Aric Cyr
Signed-off-by: Fangzhi Zuo
---
drivers/gpu
From: Taimur Hassan
Signed-off-by: Taimur Hassan
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 62 +--
1 file changed, 57 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display
This DC patchset brings improvements in multiple areas.
In summary, we highlight:
* Improve brightness control
* Add support for UHBR10 eDP
* OPTC required only for DTBCLK_P for dcn401
* Fix TBT monitor resume issue
* Code cleanup
Cc: Daniel Wheeler
Alex Hung (3):
drm/amd/display: Remove alwa
From: "Liu Xi (Alex)"
[Why and how]
The current UHBR10 eDP panel has new security feature update. Add support for
the new FW
Reviewed-by: Wenjing Liu
Signed-off-by: Liu Xi (Alex)
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc.h| 1
From: Muyuan Yang
Prioritize Aux-based over PWM-based brightness control
for more types of panels and introduce a new structure
to store and manage the type of brightness control used.
Reviewed-by: Anthony Koo
Signed-off-by: Muyuan Yang
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd
d by Coverity.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Alex Hung
Signed-off-by: Fangzhi Zuo
---
.../drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 9 -
.../drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c| 3 +--
2 files changed, 1 insertion(+), 11 deletions(-)
diff --g
PP, add it.
Reviewed-by: Aric Cyr
Signed-off-by: Paul Hsieh
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/include/logger_types.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h
b/drivers/gpu/drm/amd/displ
From: Muyuan Yang
Adjust the existing brightness control functions to use the new
ABC Framework and prioritize Aux-based brightness control.
Reviewed-by: Anthony Koo
Signed-off-by: Muyuan Yang
Signed-off-by: Fangzhi Zuo
---
.../link/protocols/link_edp_panel_control.c | 40
Signed-off-by: Alex Hung
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 --
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 48 ---
2 files changed, 8 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
d-by: Aric Cyr
Signed-off-by: Ovidiu Bunea
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 78 +++
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 39
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 8 ++
.../gpu/drm/amd/display/dmub/inc/dmub_c
This DC patchset brings improvements in multiple areas.
In summary, we highlight:
* Improve brightness control
* Add support for UHBR10 eDP
* OPTC required only for DTBCLK_P for dcn401
* Fix TBT monitor resume issue
* Code cleanup
Cc: Daniel Wheeler
Alex Hung (3):
drm/amd/display: Remove alwa
From: Alex Hung
[WHAT & HOW]
This removes recursive inclusion like dc.h -> dc_state.h -> dc.h and
dc.h -> dc_plane.h -> dc.h
This fixes 4 PW.INCLUDE_RECURSION issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Alex Hung
Signed-off-by: Fangzhi Zuo
---
pixel rate will then be wrong, causing issues in CRTC.
[HOW]
Only program the DTBCLK_P when programming CRTC, as its expected it will
be enabled prior to HPO, and disabled after HPO in all valid cases.
Reviewed-by: Alvin Lee
Signed-off-by: Dillon Varone
Signed-off-by: Fangzhi Zuo
---
.../amd
for TMDS
Reviewed-by: Wenjing Liu
Signed-off-by: Ryan Seto
Signed-off-by: Fangzhi Zuo
---
.../amd/display/dc/dccg/dcn401/dcn401_dccg.c | 81 ---
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 52
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 4 +
.../amd/display
l mess up the pipe topology after resume.
[How]
Skip the TBT monitor HPD during the resume procedure because we
currently will probe the connectors after resume by default.
Reviewed-by: Wayne Lin
Signed-off-by: Tom Chung
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgp
for TMDS
Reviewed-by: Wenjing Liu
Signed-off-by: Ryan Seto
Signed-off-by: Fangzhi Zuo
---
.../amd/display/dc/dccg/dcn401/dcn401_dccg.c | 81 ---
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 52
.../amd/display/dc/hwss/dcn401/dcn401_hwseq.h | 4 +
.../amd/display
PP, add it.
Reviewed-by: Aric Cyr
Signed-off-by: Paul Hsieh
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/include/logger_types.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h
b/drivers/gpu/drm/amd/displ
l mess up the pipe topology after resume.
[How]
Skip the TBT monitor HPD during the resume procedure because we
currently will probe the connectors after resume by default.
Reviewed-by: Wayne Lin
Signed-off-by: Tom Chung
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgp
erating
different connection types of the peer device.
In addition, we add parsing vendor data 0x50C ~ 0x50F into dpcd quirk routine
for
expanding the ability to determine specific dock products that shall pick root
aux as the
dsc decompression point.
Signed-off-by: Fangzhi Zuo
Signed
[why]
It is to fix in try_disable_dsc() due to misrevert patch of
"drm/amd/display: Fix MST BW calculation Regression"
[How]
Fix restoring minimum compression bw by 'max_kbps', instead of
native bw 'stream_kbps'
Signed-off-by: Fangzhi Zuo
---
drivers
Synaptics Cascaded Panamera topology needs to unconditionally
acquire root aux for dsc decoding.
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
ascaded DSC Determination"
Please apply the two patches on
https://gitlab.freedesktop.org/agd5f/linux/-/commits/amd-staging-drm-next,
and give a sanity test on 4k60 over Lenovo HDMI output.
Fangzhi Zuo (2):
drm/amd/display: Fix a mistake in revert commit
drm/amd/display: Fix Synaptics Cascad
From: Aric Cyr
* FW Release 0.0.225.0
* DML2 fixes
* Re-enable panel replay feature
* Allow display DCC for DCN401
* Refactor DWB, OPP, MPC, MMHUBBUB
* Fix dscclk Programming issue on DCN401
Acked-by: Rodrigo Siqueira
Signed-off-by: Jerry Zuo
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/d
From: Aurabindo Pillai
Use an extra for loop to reduce duplicate code for adding modifiers
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Jerry Zuo
Signed-off-by: Aurabindo Pillai
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 36 +--
1 file changed, 17 insertions(+), 19 d
From: Rodrigo Siqueira
Acked-by: Jerry Zuo
Signed-off-by: Rodrigo Siqueira
---
.../dml2/dml21/src/dml2_core/dml2_core_dcn4.c | 78 ---
1 file changed, 78 deletions(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c
b/drivers/gpu/drm/amd/
From: Aurabindo Pillai
To enable mesa to use display dcc, DM should expose them in the
supported modifiers. Add the best (most efficient) modifiers first.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Jerry Zuo
Signed-off-by: Aurabindo Pillai
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c
From: Joshua Aberback
[Why]
In some cases during topology changes, a pipe that was used to drive a
stream being removed can be re-assigned to drive a different stream. In
these cases, DSC power gating is not handled properly, leading to
situations where DSC is being setup while power gated.
[How
From: Aurabindo Pillai
fix a memleak introduced by not removing the buffer object for use with
early dmub bounding box value storage
Fixes: 25a40071e ("drm/amd/display: Enable copying of bounding box data from
VBIOS DMUB")
Reviewed-by: Rodrigo Siqueira
Reviewed-by: Alex Hung
Signed-off-by: J
From: Daniel Sa
why:
When the cursor disappears/reappears on fullscreen video, there is a
short transitional period where the cursor's color matrix is using the
same format as the video plane. This sets the cursor to the wrong color
momentarily before the UI plane appears, correcting the color.
From: Duncan Ma
[Why]
Visual Confirm would tell us if it ever
entered idle state.
[How]
Add debug option for IPS visual confirm
Reviewed-by: Ovidiu Bunea
Signed-off-by: Jerry Zuo
Signed-off-by: Duncan Ma
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display
From: Sung Joon Kim
[why & how]
We calculate static screen wait frames based
on the current timing info in the active stream.
If stream is not initialized, then we should skip
the calculation and go with the default values.
Reviewed-by: Gabe Teeger
Signed-off-by: Jerry Zuo
Signed-off-by: Sung
From: Fudongwang
[Why & How]
For DCN harvest case, if there is no dmcub support, we should return false
to avoid bugcheck later.
Reviewed-by: Aric Cyr
Signed-off-by: Jerry Zuo
Signed-off-by: Fudongwang
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 3 +++
1 file changed, 3 insertions(+)
dif
From: Dillon Varone
[WHY&HOW]
Some global configuration options were previously hardcoded in DC, now they are
exported by DML and sent to FW.
Reviewed-by: Martin Leung
Signed-off-by: Jerry Zuo
Signed-off-by: Dillon Varone
---
.../gpu/drm/amd/display/dc/core/dc_state.c| 4 +-
drivers/gp
From: Mudimela
[Why]
To refactor DWB related files from dcn30 Files
[How]
Moved DWB related files from dcn30 to specific DWB folder and
updated Makefiles to fix Compilation.
Reviewed-by: Martin Leung
Signed-off-by: Jerry Zuo
Signed-off-by: Mudimela
---
drivers/gpu/drm/amd/display/dc/dcn30/M
From: Alex Hung
[WHY]
dml2_core_shared_mode_support and dml_core_mode_support access the third
element of dummy_boolean, i.e. hw_debug5 = &s->dummy_boolean[2], when
dummy_boolean has size of 2. Any assignment to hw_debug5 causes an
OVERRUN.
[HOW]
Increase dummy_boolean's array size to 3.
This f
From: Alex Hung
[WHAT & HOW]
Poniters, such as stream_enc and dc->bw_vbios, are null checked previously
in the same function, so Coverity warns "implies that stream_enc and
dc->bw_vbios might be null". They are used multiple times in the
subsequent code and need to be checked.
This fixes 10 FORW
From: Alex Hung
[WHAT & HOW]
Poniters, such as dc->clk_mgr, are null checked previously in the same
function, so Coverity warns "implies that "dc->clk_mgr" might be null".
As a result, these pointers need to be checked when used again.
This fixes 10 FORWARD_NULL issues reported by Coverity.
Rev
From: Alex Hung
[WHAT & HOW]
Functions dp_enable_link_phy and dp_disable_link_phy can pass link_res
without initializing hpo_dp_link_enc and it is necessary to check for
null before dereferencing.
This fixes 2 FORWARD_NULL issues reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Signed-off-b
From: Samson Tam
[Why]
Make SPL library dc-independent so it can be reused by other
components
[How]
Create separate set of fixed31_32 calls in SPL
Make all inputs and outputs to SPL use primitive types
For ratios and inits, return as uint32 from SPL. So
add conversion from uint32 back to fix
From: Alvin Lee
[Description]
There are scenarios where ODM4:1 is used but the
surface is entirely outside of the first and last
ODM slice. In this case the recout.width for the
first and last slice is 0 because there's no overlap
with the surface and that ODM slice, but this causes
the x_pos for
From: Nevenko Stupar
[Why & How]
Current logic in mcache admissibility check has flaw if
calculated number of maches are 3 or more per surface,
so sometimes the check may pass when it should fail,
and sometimes may fail when it should pass, fix the
issue and also adding additional check to make s
From: Dillon Varone
[WHY&HOW]
OTG has new functionality to allow P-State relative to VStartup. Keepout region
for this should be configured based on DML outputs same as other global sync
params.
Reviewed-by: Alvin Lee
Signed-off-by: Jerry Zuo
Signed-off-by: Dillon Varone
---
.../dc/dce110/dc
From: Dillon Varone
[WHY]
DML2.1 currently has no concept of a "blanked" stream. For cases like DPMS off,
things like UCLK p-state is always allowed, so PMO is not required to optimize
for it.
[HOW]
Add flag to DML2.1 display configuration to indicate all streams are blanked,
so certain operatio
From: Tom Chung
[Why & How]
Fixed the replay issues and now re-enable the panel replay feature.
Reported-by: Arthur Borsboom
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3344
Reviewed-by: Mario Limonciello
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Jerry Zuo
Signed-off-by: Tom
From: Tom Chung
[Why]
Sometimes the VRR cannot enable after login to the desktop.
User space may call the DRM_IOCTL_MODE_GETCONNECTOR right after
the DRM_IOCTL_MODE_RMFB.
After calling DRM_IOCTL_MODE_RMFB to remove all the frame buffer
and it will cause the driver to disable the crtc and disabl
From: Mounika Adhuri
[Why]
To refactor MPC files
[How]
Moved MPC files to respective folders and
updated makefiles appropriately.
Reviewed-by: Martin Leung
Signed-off-by: Jerry Zuo
Signed-off-by: Mounika Adhuri
---
drivers/gpu/drm/amd/display/dc/dcn10/Makefile | 1 -
drivers/gpu/drm/amd/di
From: Sung Joon Kim
[why]
To determine which block instance to power-gate,
we look at the available pipe resource for both plane
and stream. On MPO, DSC3 was falsely powered on even
though only 1 stream path was enabled because
the resource mapping was not done correctly.
[how]
Acquire the corre
From: Revalla Hari Krishna
[Why]
To refactor MMHUBBUB files
[How]
Moved mmhubbub files from dcn20 to /mmhubbub/ folder and
update makefile to fix compilation.
Reviewed-by: Martin Leung
Signed-off-by: Jerry Zuo
Signed-off-by: Revalla Hari Krishna
---
drivers/gpu/drm/amd/display/dc/dcn20/Make
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