ition")
Reported-by: Stephen Rothwell
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_
From: Karthi Kandasamy
Expose some functions for new platform use
Reviewed-by: Nevenko Stupar
Signed-off-by: Karthi Kandasamy
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c | 2 +-
drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.h | 8
2
From: Taimur Hassan
DC v3.2.338 summary:
* DML bug fixes
* Add pwait to DMCUB hang reporting
* New definitions / changes to prep for new platforms.
* Misc cleanups
Signed-off-by: Taimur Hassan
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1
Reviewed-by: Aric Cyr
Signed-off-by: Yan Li
Signed-off-by: Aurabindo Pillai
---
.../display/dc/dml2/dml2_translation_helper.c | 19 --
.../drm/amd/display/dc/dml2/dml2_wrapper.c| 198 +-
.../dc/resource/dcn32/dcn32_resource.c| 1 -
.../dc/resource/dcn321
From: Charlene Liu
some new asics will have an APG instance taking over certain functions.
Reviewed-by: Dmytro Laktyushkin
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Ryan Seto
[Why & How]
The functions in this commit are defined for dpp401 but never used.
Removing them as they are not necessary.
Reviewed-by: Alvin Lee
Signed-off-by: Ryan Seto
Signed-off-by: Aurabindo Pillai
---
.../amd/display/dc/dpp/dcn401/dcn401_dpp.c| 2 +-
.../amd/dis
abled scaling but a non-native resolution has
been picked for an eDP panel turn the scaler on anyway. This will ensure
compatibility.
Reviewed-by: Roman Li
Signed-off-by: Mario Limonciello
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 16
1
From: Nicholas Kazlauskas
[Why]
To know if the firmware is idle when logging.
[How]
Add the pwait status to the DMCUB diagnostics.
Reviewed-by: Ovidiu Bunea
Signed-off-by: Nicholas Kazlauskas
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dmub/dmub_srv.h| 1
From: Alex Hung
[WHAT]
hws was checked for null earlier in dce110_blank_stream, indicating hws
can be null, and should be checked whenever it is used.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Aurabindo Pillai
Signed-off-by: Alex Hung
Signed-off-by
nable the scaler by
default.
[How]
Check the connector type. If the connector is eDP avoid adding common
modes.
Reviewed-by: Roman Li
Signed-off-by: Mario Limonciello
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(
DC v3.2.338 highlights:
* DML bug fixes
* Add pwait to DMCUB hang reporting
* New definitions / changes to prep for new platforms.
* Misc cleanups
_
Alex Hung (1):
drm/amd/display: Check dce_hwseq before dereferencing it
Charlene Liu (1):
drm/amd/display: add APG struct to s
is found found and returns
its index.
Reviewed-by: Nicholas Kazlauskas
Reviewed-by: Aric Cyr
Signed-off-by: Yan Li
Signed-off-by: Aurabindo Pillai
---
.../amd/display/dc/dml2/display_mode_core.c | 2 +-
.../dc/dml2/display_mode_core_structs.h | 1 +
.../drm/amd/display/dc/dml2
2 and later ASICs
dc->caps.color.dpp.ogam_rom_caps.srgb = 0;
dc->caps.color.dpp.ogam_rom_caps.bt2020 = 0;
Reviewed-by: Aurabindo Pillai
--
Thanks & Regards,
Aurabindo Pillai
FAMS is the successor to SubVP starting with DCN4x. Reuse the same
debug option to disable FAMS for debugging purposes.
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++-
drivers/gpu/drm/amd/include/amd_shared.h | 5 +++--
2 files changed, 6
This reverts commit 219898d29c438d8ec34a5560fac4ea8f6b8d4f20 since it
causes regressions on certain configs. Revert until the issue can be
isolated and debugged.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4238
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm
Add some HDCP related register headers for future use.
Signed-off-by: Aurabindo Pillai
---
.../include/asic_reg/dcn/dcn_4_1_0_offset.h | 26 +++
.../include/asic_reg/dcn/dcn_4_1_0_sh_mask.h | 16
2 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/amd
This reverts commit 572193a6e3a842204757a6fa2944125811b29f70 since it
introduces incompatbility with older firmware
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 34 ++-
1 file changed, 2 insertions(+), 32 deletions(-)
diff --git a/drivers
Replace all use of DRM_DEBUG_DRIVER in amdgpu_dm.c with
drm_dbg_driver(). The latter prints the instance of the drm device
associated with the error which would helpful in debugging scenarios
involving multiple GPUs
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm
s(struct timing_generator *optc,
--
Thanks & Regards,
Aurabindo Pillai
Reviewed-by: Aurabindo Pillai
On 2025-04-17 15:30, Srinivasan Shanmugam wrote:
This commit updates the dm_force_atomic_commit function to replace the
usage of PTR_ERR_OR_ZERO with IS_ERR for checking error states after
retrieving the Connector (drm_atomic_get_connector_state), CRTC
: Nicholas Kazlauskas
Cc: Tom Chung
Cc: Rodrigo Siqueira
Cc: Roman Li
Cc: Alex Hung
Cc: Aurabindo Pillai
Reported-by: Dan Carpenter
Signed-off-by: Srinivasan Shanmugam
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 20 +++
1 file changed, 12 insertions(+), 8 delet
From: Aric Cyr
Create a temporary scratch dc_link for programming purposes
and fix a copy of pipe_ctx on the stack to a pointer reference.
Reviewed-by: Josip Pavic
Signed-off-by: Aric Cyr
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 329
failed. If it did, fall
back to the ref clock to avoid a hang and keep the system in a recoverable
state.
Reviewed-by: Dillon Varone
Signed-off-by: Brendan Tam
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 6 +-
drivers/gpu/drm/amd/display/dc
From: "JinZe.Xu"
[Why]
Access to indirect registers by DC and other components are not synchronized.
[How]
Use sync version of indirect register access.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: JinZe.Xu
Signed-off-by: Aurabindo Pillai
---
.../display/dc/clk_mgr/dcn315/dc
On 2025-03-27 05:53, Huacai Chen wrote:
Commit 7da55c27e76749b9 ("drm/amd/display: Remove incorrect FP context
start") removes the FP context protection of dml2_create(), and it said
"All the DC_FP_START/END should be used before call anything from DML2".
However, dml21_copy() are not protected
On 2025-03-26 21:40, Huacai Chen wrote:
Hi, Alex,
On Thu, Mar 27, 2025 at 8:10 AM Alex Hung wrote:
The following error messages showed up on an APU and a dGPU during testing.
<3> [100.231411] BUG: sleeping function called from invalid context at
include/linux/sched/mm.h:321
<3> [100.23141
dto source during dpms off, as we
cannot update pipe src sel for the otg in dccg_set_dtbclk_dto as the tg
may still be on at that point.
Reviewed-by: Alvin Lee
Signed-off-by: Ausef Yousof
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 5 -
drive
-by: Leo Zeng
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 45 +++
drivers/gpu/drm/amd/display/dc/dc.h | 5 +++
.../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 1 -
3 files changed, 50 insertions(+), 1 deletion(-)
diff --git a
delay
less perceivable.
If this ends up being too high of a percentage, it can be dropped
further in a future change.
Fixes: 537ef0f88897 ("drm/amd/display: use new vblank enable policy for DCN35+")
Reviewed-by: Harry Wentland
Signed-off-by: Leo Li
Signed-off-by: Aurabindo Pillai
From: Charlene Liu
[why]
the guard of is_apu not in sync, caused no watermark_c output.
Reviewed-by: Ovidiu Bunea
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c | 5 -
1 file changed, 4 insertions(+), 1 deletion
[HOW]
Check the DSC used on current pipe status when update stream.
Skip to enable if it has been off. The operation enable
DSC should happen when set power on.
Reviewed-by: Wenjing Liu
Signed-off-by: Paul Hsieh
Signed-off-by: Aurabindo Pillai
---
.../drm/amd/display/dc/hwss/dcn314/dcn314_hw
From: Cruise
[Why]
USB4 BW Allocation response will be handled in HPD IRQ.
No need to handle it in DPIA notification callback.
[How]
Remove DP BW allocation response code in DPIA notification.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Cruise
Signed-off-by: Aurabindo Pillai
DCN35+")
Reviewed-by: Harry Wentland
Signed-off-by: Leo Li
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display
DC v3.2.326 Summary:
* DML 2.1 resync
* Vblank disable fixes
* Visual confirm debug improvements
* Add command for reading ABM histogram
* Bug fixes & improvements
__
Aric Cyr (2):
drm/amd/display: Create a temporary scratch dc_link
drm/amd/display: DC v3.2.326
Ausef Yousof (1):
From: Charlene Liu
[why]
this dscclk use DCN defined per DPM level will cause a DCFCLK increase.
needs to follow up.
This reverts commit 9932ab57776fa0168b702371ff5e2881c026f353
Reviewed-by: Yihan Zhu
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
nals
use DTBCLK and not DPREFCLK.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Yi-Ling Chen
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/displa
: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 ++
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 28d1353f403d..5a44f5da68dc 100644
--- a
From: Chun-Liang Chang
[Why]
Read the histogram for VariBright validation
[How]
Add dc/dmub functions to read histogram and ACE
Reviewed-by: Jun Lei
Signed-off-by: Chun-Liang Chang
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 2 +
.../gpu/drm/amd
From: Aric Cyr
Summary:
* DML 2.1 resync
* Vblank disable fixes
* Visual confirm debug improvements
* Add command for reading ABM histogram
* Bug fixes & improvements
Signed-off-by: Aric Cyr
Signed-off-by: Aurabindo Pillai
Reviewed-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dc.h
Implement w/a for a panel which requires 10s delay after link detect.
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 ++-
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 10 ++--
drivers/gpu/drm/amd/display/dc/dc_types.h | 1 +
3
drm_* macros are more helpful that DRM_* macros since the former
indicates the associated DRM device that prints the error, which maybe
helpful when debugging.
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 6 +++---
1 file changed, 3 insertions
Chaitanya is no longer with AMD, and the responsibility has been
taken over by Austin.
Signed-off-by: Aurabindo Pillai
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c8b35ca294a0..d167946f88e5 100644
--- a/MAINTAINERS
+++ b
Remove extraneous tab and newline in dml2_core_dcn4.c that was
reported by the bot
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202502211920.txufwtsj-...@intel.com/
Fixes: 70839da6360 ("drm/amd/display: Add new DCN401 sources")
Signed-off-by: Aurabi
From: Taimur Hassan
Summary:
* Start enabling support for 4-plane MPO
* DML21 Updates
* SPL Updates
* Other minor fixes
Signed-off-by: Taimur Hassan
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Summary:
* Start enabling support for 4-plane MPO
* DML21 Updates
* SPL Updates
* Other minor fixes
--
Aurabindo Pillai (1):
drm/amd/display: Make dcn401_program_pipe non static
Ausef Yousof (1):
drm/amd
-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
Reviewed-by: Roman Li
---
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 2 ++
drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c | 1 +
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h | 1 +
3 files changed, 4 insertions
From: Samson Tam
[Why & How]
LLS policy not affected by TF.
Remove check in don't care case and use
pixel format only.
Reviewed-by: Navid Assadian
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c | 31 +--
disconnected link.
Reviewed-by: Wenjing Liu
Signed-off-by: Ilya Bakoulin
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols
From: Zaeem Mohamed
MAX_SURFACES and MAX_PLANES now have docstrings that better show the difference
between the two.
Reviewed-by: Sun peng Li
Signed-off-by: Zaeem Mohamed
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 6 ++
1 file changed, 6 insertions
ewed-by: Chris Park
Signed-off-by: Ausef Yousof
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c | 1
Allow reuse of code by making dcn401_program_pipe()
non static.
Fixes: 0ed6d68efd76 ("drm/amd/display: Allow reuse of of DCN4x code")
Signed-off-by: Aurabindo Pillai
Signed-off-by: Karthi Kandasamy
Reviewed-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_h
From: Leo Zeng
[WHY & HOW]
needed in certain scenarios for debugging and logging
Reviewed-by: Joshua Aberback
Reviewed-by: Martin Leung
Signed-off-by: Leo Zeng
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/irq_types.h | 1 +
1 file changed, 1 insertion(+)
diff --g
From: Samson Tam
[Why & How]
Remove unused filters and functions
Add static to limit scope
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
Reviewed-by: Jun Lei
---
.../display/dc/sspl/dc_spl_isharp_filters.c | 321 +-
.../display/dc/sspl/dc_spl_isharp_filte
From: Samson Tam
[Why & How]
Instead of converting tables from s1_10 to s1_12,
added s1_12 tables instead in SPL
Remove init calls that do the conversion
Reviewed-by: Alvin Lee
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/resource/dc
From: Zaeem Mohamed
[why]
For enabling 4-plane MPO, we need dc to expose 4 planes for DCN35 and
beyond, as well as DCN21
[how]
Set dc_caps.max_slave_*planes to 3 for appropriate ASICs
Reviewed-by: Sun peng Li
Signed-off-by: Zaeem Mohamed
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd
Tam
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 ++
.../gpu/drm/amd/display/dc/link/protocols/link_dp_training.c| 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display
From: Samson Tam
[Why & How]
Instead of converting tables from s1_10 to s1_12, add s1_12 tables instead.
Remove init calls that do the conversion. Add APIs to read s1_10 tables
Reviewed-by: Navid Assadian
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
---
.../display/dc/
This reverts commit 742d670b416b272e42f6674e30e393bbb8ffa6d1.
SW and HW state are not always matching in some cases causing cursor to
be disabled.
---
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c | 7 +++
.../gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c | 6 ++
drivers/g
From: Kenneth Feng
set the workload type based on MALL status
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
.../drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 12 ++--
drivers/gpu/drm/a
From: Leo Li
They were named with the incorrect dcn version.
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c| 4 ++--
.../gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c| 4 ++--
.../gpu/drm/amd/display/dc/resource/dcn201
dc_plane_state update in DMColor and update color space,
bias and scale on dc_plane_info.
Reviewed-by: Dillon Varone
Signed-off-by: Chris Park
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
2 files changed, 5
From: Charlene Liu
[why]
hw register offset delta
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/clk_mgr/Makefile | 2 +-
.../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 5 +-
.../display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c | 140
e phy index assignment, store connector's relevant info
into dm mapping array. Once need the index, just look up the static
array.
Reviewed-by: HaoPing Liu
Signed-off-by: Wayne Lin
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 4 +
.../drm/amd/d
policy is not
applicable and causes many display states to run at max pstate
unexpectedly due to the only valid states being the first and last.
Reviewed-by: Gabe Teeger
Reviewed-by: Yihan Zhu
Signed-off-by: Nicholas Kazlauskas
Signed-off-by: Aurabindo Pillai
---
.../amd/display/dc/dml2
From: Gabe Teeger
This reverts commit 69e9ce2a572b
Due to a replay regression.
Fixes: 69e9ce2a572b ("drm/amd/display: Revised for Replay Pseudo vblank
control")
Reviewed-by: Dennis Chan
Signed-off-by: Gabe Teeger
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/
From: Taimur Hassan
Signed-off-by: Taimur Hassan
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 154 --
1 file changed, 103 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd
From: Aric Cyr
* Fix some regressions related to IPS2 and PSR Panel Replay
* Bug fixes in DML
* DMCUB debug improvements
* Other refactors and improvements across multiple components
Signed-off-by: Aric Cyr
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1
no longer being met.
Fixes: 4ac57a450da3("drm/amd/display: Don't allow IPS2 in D0 for RCG Dynamic")
Reviewed-by: Ovidiu Bunea
Signed-off-by: Nicholas Kazlauskas
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 5 +
drivers/gpu/drm/amd/disp
hy_id at dm layer.
Reviewed-by: HaoPing Liu
Signed-off-by: Wayne Lin
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 6 --
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dc_stream.h| 1
From: Zhongwei
[Why/How]
The force_ffu_mode flag could be initialized at other place.
Reviewed-by: Robin Chen
Signed-off-by: Zhongwei
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a
, a fallback to the
hardcoded default is needed. To make this value available to other .c
files, its define was moved to dmub_srv.h.
Also, print a indicator at the start of the log if rollover occurred.
Reviewed-by: Harry Wentland
Signed-off-by: Leo Li
Signed-off-by: Aurabindo Pillai
---
.../amd
Signed-off-by: Aurabindo Pillai
---
.../dc/resource/dcn20/dcn20_resource.c| 57 +--
1 file changed, 3 insertions(+), 54 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
: Aurabindo Pillai
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 16 +--
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 109 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h | 16 ++-
4 files changed, 81 insertions(+), 72
From: Samson Tam
[Why & How]
Add check for invalid pixel format, remove unused pixel formats
and clean up some names
Reviewed-by: Navid Assadian
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/dc_spl_translate.c | 9 ++-
drivers/gpu/drm/amd/dis
are in the same loop used for calculation and at that point its
fine to overwrite them, its not the case for plain UBF values.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Ausef Yousof
Signed-off-by: Aurabindo Pillai
---
.../amd/display/dc/dml2/display_mode_core.c | 30 +--
.
Zheng
Signed-off-by: Aurabindo Pillai
---
.../dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2
This DC patchset brings improvements in multiple areas. In summary, we have:
* Fix some regressions related to IPS2 and PSR Panel Replay
* Bug fixes in DML
* DMCUB debug improvements
* Other refactors and improvements across multiple components
Cc: Daniel Wheeler
___
eng_id can be moved within the appropriate section of the if statement.
Reviewed-by: Alvin Lee
Signed-off-by: Joshua Aberback
Signed-off-by: Aurabindo Pillai
---
.../amd/display/dc/dcn31/dcn31_panel_cntl.c | 34 ++-
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a
: Aurabindo Pillai
---
.../amd/display/dc/hubp/dcn401/dcn401_hubp.c | 20
.../amd/display/dc/hubp/dcn401/dcn401_hubp.h | 23 +++
2 files changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
b/drivers/gpu
From: Harry VanZyllDeJong
[HOW&WHY]
Stores DMUB support for enablement of Varibright over VABC in DCN32
Reviewed-by: Aric Cyr
Reviewed-by: Iswara Nagulendran
Signed-off-by: Harry VanZyllDeJong
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
Add a mising reg field to the autogenerated header for future use
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_sh_mask.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_1_0_sh_mask.h
b/drivers/gpu
For debugging purposes, add a runtime override to disable display scanout
from MALL cache (MALL Static Screen) by disallowing the driver from
triggering the idle power optimizations when desktop is idle.
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
sta...@vger.kernel.org
Reviewed-by: Charlene Liu
Signed-off-by: Yihan Zhu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_policy.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_policy.c
b/drivers/gpu/drm/amd/display/dc/dml2/dml2_poli
when compared to the current dc_state,
triggering a dsc recompute that should not have happened.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Fangzhi Zuo
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +-
1 file changed, 1 insertion(+), 1
actually change.
Reviewed-by: Dillon Varone
Signed-off-by: Joshua Aberback
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 45 ---
drivers/gpu/drm/amd/display/dc/dc.h | 1 -
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 -
3
From: Samson Tam
[Why & How]
Fix static analysis warnings in SPL library
Reviewed-by: Alvin Lee
Signed-off-by: Samson Tam
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/spl/dc_spl_types.h | 4 +--
.../gpu/drm/amd/display/dc/spl/spl_debug.h
From: Leo Li
[Why]
There are more IPS modes other than DMUB_IPS_ENABLE that enables IPS. We
need to enable the hotplug detect idle workqueue for those modes as
well.
[How]
Modify the if condition to initialize the workqueue in all IPS modes
except for DMUB_IPS_DISABLE_ALL.
Fixes: 514fd3e75d90
From: Charlene Liu
[why]
set dispclk to 0 cause stability issue.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/resource/dcn351
instead of context.
Use pipe from current_state instead of context. This assumes that
pipe in the current_state is an OTG_MASTER pipe if the pipe in the context is
an OTG_MASTER pipe.
Reviewed-by: Dillon Varone
Signed-off-by: Austin Zheng
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display
le ID supported platform receives no
reply from a DMUB cable id query.
Reviewed-by: Wenjing Liu
Reviewed-by: Ovidiu Bunea
Signed-off-by: Michael Strauss
Signed-off-by: Aurabindo Pillai
---
.../dc/link/protocols/link_dp_capability.c| 22 ++-
1 file changed, 16 insertions(
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c| 2 ++
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 17 +
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 11 +--
.../gpu/drm/amd/display/dc/hwss/hw_sequencer.h | 4
4 files
functions that can be used to determine power level:
-get power profile after a dc_state has undergone full validation
Reviewed-by: Aric Cyr
Signed-off-by: Austin Zheng
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c| 9 -
.../dml21/src/dml2_pmo
sta...@vger.kernel.org
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Alex Hung
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 ++-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 4
drivers/gpu/drm/amd/display/dc/dc_types.h
egister clock branch will
always be running.
As a consequence, the dynamic power will be higher than expected.
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c | 10 --
1 file changed, 4 insert
case.
Restore the optimized pbn value, instead of using the pbn value under minimum
compression.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Wayne Lin
Signed-off-by: Fangzhi Zuo
Signed-off-by: Aurabindo Pillai
---
.../amd/display/amdgpu_dm
From: Sung Lee
[WHY]
Triple buffer enablement currently does not work properly
[HOW]
Allow triple buffer enablement to happen properly on
fast updates
Reviewed-by: Aric Cyr
Signed-off-by: Sung Lee
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 23
From: Aric Cyr
Signed-off-by: Aric Cyr
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 6d60f7597f88..51fdc0085935 100644
unlock order.
Indicate which pipes should be unlocked first using
array stored in dc scratch memory.
Pipes indicated in array can be unlocked in any order.
Reviewed-by: Alvin Lee
Signed-off-by: Austin Zheng
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 42
ead 3 different
status registers for pending cleared, one specifically for OTG updates,
one specifically for OPTC updates, and the last for surface related
updates.
Reviewed-by: Dillon Varone
Signed-off-by: Alvin Lee
Signed-off-by: Aurabindo Pillai
---
.../drm/amd/display/dc/core/dc_hw_sequencer.c
From: Shunlu Zhang
[WHY]
cm2_params is used to set update_flags.
It's value is not intended to be modified.
[WHAT]
Change the declaration of cm2_params to be a constant variable
Reviewed-by: Tao Huang
Reviewed-by: Ariel Bernstein
Signed-off-by: Shunlu Zhang
Signed-off-by: Aurabindo P
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