[PATCH] drm/amdgpu: still cleanup sid.h

The defines, shifts and masks are already available in dce_6_0_d.h, dce_6_0_sh_mask.h. Signed-off-by: Alexandre Demers --- drivers/gpu/drm/amd/amdgpu/si.c | 26 +- drivers/gpu/drm/amd/amdgpu/sid.h | 16 2 files changed, 13 insertions(+), 29 deletions(-)

Re: [PATCH v1] drm/amdgpu: no need to set queue_active in mes_userq_resume

Ping On 4/2/2025 5:46 PM, Sunil Khatri wrote: In mes_userq_resume calls mes_userq_map which set the queue_active state to true if it succeed and from the resume we dont need to explicitly set the queue state. Signed-off-by: Sunil Khatri --- drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 1 -

Re: [PATCH v2] drm/amdgpu: make mes_userq_unmap as int from void

Ping ? On 4/2/2025 5:41 PM, Sunil Khatri wrote: mes_userq_unmap could fail due to MES fw unable to unmap the queue and the return value needs is not to be ignored and handled on first step itself. Also queue->queue_active set to false in this function but only when the queue is removed successf

Re: [PATCH 1/2] drm/amdgpu: add UAPI to query if user queues are supported

Reviewed-by: Marek Olšák For both patches. Marek On Mon, Mar 24, 2025 at 4:34 PM Alex Deucher wrote: > Add an INFO query to check if user queues are supported. > > v2: switch to a mask of IPs (Marek) > v3: move to drm_amdgpu_info_device (Marek) > > Cc: marek.ol...@amd.com > Cc: prike.li...@am

[PATCH 1/6] drm/amd/amdgpu: Create a headears to keep some common GC registers

Some GC registers are duplicated across multiple instances of GC offset files. This commit creates a new file named gc_common_offset.h that centralizes some common registers in a single file. Aside from eliminating multiple duplications, this approach also avoids including specific registers in gen

[PATCH] drm/amdgpu: cancel gfx idle work in device suspend for s0ix

This is normally handled in the gfx IP suspend callbacks, but for S0ix, those are skipped because we don't want to touch gfx. So handle it in device suspend. Fixes: b9467983b774 ("drm/amdgpu: add dynamic workload profile switching for gfx10") Fixes: 963537ca2325 ("drm/amdgpu: add dynamic workloa

[PATCH 6/6] drm/amdgpu/gfx: Merge gfx_v6_0_get_csb_buffer into gfx_get_csb_buffer

Move the only specific GFX6 part from gfx_v6_0_get_csb_buffer to gfx_get_csb_buffer and remove the gfx6 version. Signed-off-by: Rodrigo Siqueira --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 + drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 44 + 2 files changed, 9 inse

[PATCH 3/6] drm/amdgpu/gfx: Integrate gfx_v9_0_get_csb_buffer into gfx_get_csb_buffer

The code implementation in gfx_get_csb_buffer is very similar to the gfx_v9_0_get_csb_buffer; the main difference is the fact that GFX9 does not have some of the specific operations for GFX11 and GFX10. This commit adds a check in the particular part of gfx_get_csb_buffer that should be skipped in

[PATCH 2/6] drm/amdgpu/gfx: Introduce generic gfx_get_csb_buffer

When inspecting gfx_v11_0_get_csb_buffer and gfx_v10_0_get_csb_buffer, it becomes clear that both functions are very similar (only the function name change). Since those operations are common between gfx11 and gfx10, this commit creates a dedicated function named gfx_get_csb_buffer and uses it for

[PATCH 0/6] Introduce a generic function to get the CSB buffer

This patchset was inspired and made on top of the below series: https://lore.kernel.org/amd-gfx/20250319162225.3775315-1-alexander.deuc...@amd.com/ In the above series, there is a bug fix in many functions named gfx_vX_0_get_csb_buffer (where X ranges from 6 to 11). After closely looking at those

[PATCH 4/6] drm/amdgpu/gfx: Absorb gfx_v8_0_get_csb_buffer into gfx_get_csb_buffer

The gfx_v8_0_get_csb_buffer only differs from gfx_get_csb_buffer in a sequence where some specific registers must be used. To assimilate gfx_v8_0_get_csb_buffer into gfx_get_csb_buffer, it was necessary two modifications: 1. In gfx_get_csb_buffer, check for GFX8 and, based on that, execute the

[PATCH 5/6] drm/amdgpu/gfx: Assimilate gfx_v7_0_get_csb_buffer into gfx_get_csb_buffer

The gfx_v7_0_get_csb_buffer function is incorporated into gfx_get_csb_buffer, but it required to port some specific ASIC operations to the function. Additionally, this transition also eliminates some unnecessary code from gfx_v7_0_get_csb_buffer. Signed-off-by: Rodrigo Siqueira --- drivers/gpu/d

Re: [PATCH v2] drm/amd: Add pre-zen AMD hardware to PCIe dynamic switching exclusions

On Thu, Apr 3, 2025 at 3:13 PM Mario Limonciello wrote: > > On 4/3/2025 10:48 AM, Alex Deucher wrote: > > On Wed, Apr 2, 2025 at 11:12 PM Mario Limonciello > > wrote: > >> > >> From: Mario Limonciello > >> > >> AMD RX580 when added AMD Phenom 2 has problems with overheating. This is > >> due t

[PATCH] Fixed the warning at ./drivers/gpu/drm/amd/include/amd_shared.h:369

warning: Incorrect use of kernel-doc format: * @DC_HDCP_LC_ENABLE_SW_FALLBACK If set, upon HDCP Locality Check FW Signed-off-by: Kevin Paul Reddy Janagari --- drivers/gpu/drm/amd/include/amd_shared.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/include/

Re: [PATCH v2] drm/amd: Add pre-zen AMD hardware to PCIe dynamic switching exclusions

Em 03/04/2025 00:11, Mario Limonciello escreveu: > From: Mario Limonciello > > AMD RX580 when added AMD Phenom 2 has problems with overheating. This is due > to > changes with PCIe dynamic switching introduced by commit 466a7d115326e > ("drm/amd: Use the first non-dGPU PCI device for BW limits")