Hi,
On 31/01/2025 18:58, David Francis wrote:
This patch (in combination with the accompanying CRIU patch)
allows the amdgpu CRIU plugin to support dmabuf IPC.
It includes
- A new amdgpu ioctl (amdgpu_criu_op_ioctl), which has similar
options to kfd_ioctl_criu, and accompanying struct
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Asad Kamal
Thanks & Regards
Asad
-Original Message-
From: Lazar, Lijo
Sent: Tuesday, February 25, 2025 4:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Kamal, Asad ; Ma, Le
; Zhan
Le 25/01/2025 à 07:45, Jim Cromie a écrit :
struct ddebug_class_param keeps a ref to the state-storage of the
param; make both class-types use the same unsigned long storage type.
ISTM this is simpler and safer; it avoids an irrelevant difference,
and if 2 users somehow get class-type mixed u
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Tao Zhou
Sent: Tuesday, February 25, 2025 19:21
To: amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao
Subject: [PATCH] drm/amdgpu: increase AMDG
Increase it since a cper ring is introduced.
Signed-off-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 52f7a9a79e7b..b4fd1e172
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
Two tests are added to VKMS LUT handling:
- linear
- inv_srgb
Reviewed-by: Louis Chauvet
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Fix checkpatch warnings (Louis Chauvet)
- Adde a commit messages
Le 25/01/2025 à 07:45, Jim Cromie a écrit :
A more careful reading of logging output from test_dynamic_debug.ko
reveals:
lib/test_dynamic_debug.c:103 [test_dynamic_debug]do_cats =pmf "doing
categories\n"
lib/test_dynamic_debug.c:105 [test_dynamic_debug]do_cats =p "LOW msg\n"
class:MID
lib/t
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
We add two 3x4 matrices into the VKMS color pipeline. The reason
we're adding matrices is so that we can test that application
of a matrix and its inverse yields an output equal to the input
image.
One complication with the mat
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
This type is used to support a 3x4 matrix in colorops. A 3x4
matrix uses the last column as a "bias" column. Some HW exposes
support for 3x4. The calculation looks like:
out matrixin
|R| |0 1 2 3 | | R |
|G|
Le 25/01/2025 à 07:45, Jim Cromie a écrit :
When a dyndbg classname is unknown to a kernel module (as before
previous patch), the callsite is un-addressable via >control queries.
The control-file displays this condition as "class unknown,"
currently. That spelling is sub-optimal/too-generic,
On Tuesday, February 25th, 2025 at 10:37, Louis Chauvet
wrote:
> Can I extract this patch from the series and apply it on drm-misc-next?
That sounds completely fine by me, and TBH it sounds like it could even
be drm-misc-fixes material?
We need to be a bit careful when merging patches from the
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Tuesday, February 25, 2025 19:03
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Lin, Amber ; Zhang, Ava
Subject
XGMI and WAFL share the same versions. Use WAFL version if XGMI version
is not present in discovery.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dis
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
This patch introduces a VKMS color pipeline that includes two
drm_colorops for named transfer functions. For now the only ones
supported are sRGB EOTF, sRGB Inverse EOTF, and a Linear TF.
We will expand this in the future but I don
Correct the logic to find supported NPS modes from firmware.
Signed-off-by: Lijo Lazar
Reported-by: Ava Zhang
Fixes: cdb41537812f ("drm/amdgpu: Use firmware supported NPS modes")
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
We'll construct color pipelines out of drm_colorop by
chaining them via the NEXT pointer. NEXT will point to
the next drm_colorop in the pipeline, or by 0 if we're
at the end of the pipeline.
Signed-off-by: Alex Hung
Signed-of
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
Add a read-only TYPE property. The TYPE specifies the colorop
type, such as enumerated curve, 1D LUT, CTM, 3D LUT, PWL LUT,
etc.
For now we're only introducing an enumerated 1D LUT type to
illustrate the concept.
Signed-off-by
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
We want to be able to bypass each colorop at all times.
Introduce a new BYPASS boolean property for this.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
Reviewed-by: Louis Chauvet
--
Louis Chauvet, Bootlin
Embedde
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
Add a new drm_colorop with DRM_COLOROP_1D_CURVE with two subtypes:
DRM_COLOROP_1D_CURVE_SRGB_EOTF and DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF.
Signed-off-by: Harry Wentland
Co-developed-by: Alex Hung
Signed-off-by: Alex Hung
---
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
This patches introduces a new drm_colorop mode object. This
object represents color transformations and can be used to
define color pipelines.
We also introduce the drm_colorop_state here, as well as
various helpers and state t
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
Debugging LUT math is much easier when we can unit test
it. Add kunit functionality to VKMS and add tests for
- get_lut_index
- lerp_u16
Reviewed-by: Louis Chauvet
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
C
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
fixp2int always rounds down, fixp2int_ceil rounds up. We need
the new fixp2int_round.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
Reviewed-by: Louis Chauvet
Hi,
Can I extract this patch from the series and appl
Le 24/02/2025 à 19:50, Alex Hung a écrit :
On 2/24/25 09:07, Louis Chauvet wrote:
Le 20/12/2024 à 05:33, Alex Hung a écrit :
From: Harry Wentland
CTM values are defined as signed-magnitude values. Add
a helper that converts from CTM signed-magnitude fixed
point value to the twos-comple
On 2/25/2025 2:13 PM, jesse.zh...@amd.com wrote:
> From: "jesse.zh...@amd.com"
>
> This commit updates the VM flush implementation for the SDMA engine.
>
> - Added a new function `sdma_v4_4_2_get_invalidate_req` to construct the
> VM_INVALIDATE_ENG0_REQ
> register value for the specified V
From: "jesse.zh...@amd.com"
This commit updates the VM flush implementation for the SDMA engine.
- Added a new function `sdma_v4_4_2_get_invalidate_req` to construct the
VM_INVALIDATE_ENG0_REQ
register value for the specified VMID and flush type. This function ensures
that all relevant
pag
While running:
./scripts/get_maintainer.pl \
drivers/gpu/drm/amd/display/amdgpu_dm \
--no-rolestats'
For a list of Cc's, I got two undeliverable address errors from
postmas...@amd.com:
Xinhui Pan
Hamza Mahfooz
I tried to contact Alex Deucher and Christian König back in early
Febru
Instead of only triggering a wedged event for complete GPU resets,
trigger for ring resets. Regardless of the reset, it's useful for
userspace to know that it happened because the kernel will reject
further submissions from that app.
Signed-off-by: André Almeida
---
v3: do only for ring resets, n
Hi Alex,
Thanks for your prompt response.
On Mon, Feb 24 2025, Alex Deucher wrote:
> On Mon, Feb 24, 2025 at 8:51 AM Baruch Siach wrote:
>> I see this failure on probe when trying to bring up amdgpu on a new arm64
>> platform. Kernel is v6.14-rc4, and aldebaran firmware is latest
>> (linux-firm
From: "jesse.zh...@amd.com"
- Modify the VM invalidation engine allocation logic to handle SDMA page rings.
SDMA page rings now share the VM invalidation engine with SDMA gfx rings
instead of
allocating a separate engine. This change ensures efficient resource
management and
avoids the is
From: "jesse.zh...@amd.com"
Increase the maximum number of rings supported by the AMDGPU driver from 132 to
148.
This change is necessary to enable support for the SDMA page ring.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 2 +-
1 file changed, 1 insertion(+), 1
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