On 10/4/24 05:43, Louis Chauvet wrote:
On 03/10/24 - 16:01, Harry Wentland wrote:
Not all HW will be able to do bypass on all color
operations. Introduce an 'allow_bypass' boolean for
all colorop init functions and only create the BYPASS
property when it's true.
Signed-off-by: Harry Wentland
Create a new macro for_each_new_colorop_in_state to access new
drm_colorop_state updated from uapi.
Signed-off-by: Alex Hung
---
include/drm/drm_atomic.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
index f3afc1ef3f
Add layout of data blob for colorop types: DRM_COLOROP_1D_LUT,
DRM_COLOROP_CTM_3X4 and DRM_COLOROP_3D_LUT
Signed-off-by: Alex Hung
---
include/drm/drm_colorop.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index 7b5
From: Harry Wentland
Add the default Bypass pipeline and ensure it passes the
kms_colorop test plane-XR30-XR30-bypass.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 19 +++
1 file changed, 19 insertions(+)
diff --gi
The functions are to clean up color pipeline when a device driver
fails to create its color pipeline.
Signed-off-by: Alex Hung
---
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 3 +-
drivers/gpu/drm/drm_colorop.c | 41 +++
drivers/gpu/drm/vkms/vkms_colorop.c
From: Harry Wentland
Add kernel doc for AMD color pipeline.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 122 +++---
1 file changed, 102 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm
This adds support for a 3D LUT.
The color pipeline now consists of the following colorops:
1. 1D curve colorop
2. Multiplier
3. 3x4 CTM
4. 1D curve colorop
5. 1D LUT
6. 3D LUT
7. 1D curve colorop
8. 1D LUT
Signed-off-by: Alex Hung
---
v7:
- Simplify 3D LUT according to drm_colorop changes (Simo
From: Harry Wentland
Not all HW will be able to do bypass on all color
operations. Introduce an 'allow_bypass' boolean for
all colorop init functions and only create the BYPASS
property when it's true.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu
It is to be used to enable HDR by allowing userpace to create and pass
3D LUTs to kernel and hardware.
new drm_colorop_type: DRM_COLOROP_3D_LUT.
Signed-off-by: Alex Hung
---
v7:
- Simplify 3D LUT by removing lut_3d_modes and related functions (Simon Ser)
drivers/gpu/drm/drm_atomic.c | 6
From: Harry Wentland
We want to make sure userspace is aware of the 1D LUT
interpolation. While linear interpolation is common it
might not be supported on all HW. Give driver implementers
a way to specify their interpolation.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- F
Swap the order of matrix and multiplier as designed in hardware.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 12 ++--
.../drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c| 8
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git
This adds support for a multiplier. This multiplier is
programmed via the HDR Multiplier in DCN.
With this change the following IGT tests pass:
kms_colorop --run plane-XR30-XR30-multiply_125
kms_colorop --run plane-XR30-XR30-multiply_inv_125
The color pipeline now consists of the following coloro
This introduces a new drm_colorop_type: DRM_COLOROP_MULTIPLIER.
It's a simple multiplier to all pixel values. The value is
specified via a S31.32 fixed point provided via the
"MULTIPLIER" property.
Signed-off-by: Alex Hung
---
v7:
- Modify size_property to lut_size_property
drivers/gpu/drm/dr
This patch adds colorops for custom 1D LUTs in the SHAPER and
BLND HW blocks.
With this change the following IGT tests pass:
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut-srgb_eotf_lut
The color pipeline now consists of the following color
This adds support for a 3x4 color transformation matrix.
With this change the following IGT tests pass:
kms_colorop --run plane-XR30-XR30-ctm_3x4_50_desat
kms_colorop --run plane-XR30-XR30-ctm_3x4_overdrive
kms_colorop --run plane-XR30-XR30-ctm_3x4_oversaturate
kms_colorop --run plane-XR30-XR30-ct
From: Harry Wentland
This adds support for the BT.709/BT.2020 transfer functions
on all current 1D curve plane colorops, i.e., on DEGAM, SHAPER,
and BLND blocks.
With this change the following IGT subtests pass:
kms_colorop --run plane-XR30-XR30-bt2020_inv_oetf
kms_colorop --run plane-XR30-XR30-
We've previously introduced DRM_COLOROP_1D_CURVE for
pre-defined 1D curves. But we also have HW that supports
custom curves and userspace needs the ability to pass
custom curves, aka LUTs.
This patch introduces a new colorop type, called
DRM_COLOROP_1D_LUT that provides a SIZE property which
is us
From: Harry Wentland
The BT.709 and BT.2020 OETFs are the same, the only difference
being that the BT.2020 variant is defined with more precision
for 10 and 12-bit per color encodings.
Both are used as encoding functions for video content, and are
therefore defined as OETF (opto-electronic trans
From: Harry Wentland
This patchset enables support for the PQ_125 EOTF and its inverse
on all existing plane 1D curve colorops, i.e., on DEGAM, SHAPER,
and BLND blocks.
With this patchset the following IGT subtests are passing:
kms_colorop --run plane-XR30-XR30-pq_125_eotf
kms_colorop --run plan
From: Harry Wentland
The PQ function defines a mapping of code values to nits (cd/m^2).
The max code value maps to 10,000 nits.
Windows DWM's canonical composition color space (CCCS) defaults
to composing SDR contents to 80 nits and uses a float value of
1.0 to represent this. For this reason A
Expose a 3rd 1D curve colorop, with support for
DRM_COLOROP_1D_CURVE_SRGB_EOTF and program the BLND block
to perform the sRGB transform when the colorop is not in
bypass
With this change the following IGT test passes:
kms_colorop --run plane-XR30-XR30-srgb_eotf-srgb_inv_eotf-srgb_eotf
The color p
Expose a 2nd curve colorop with support for
DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF and program HW to
perform the sRGB Inverse EOTF on the shaper block
when the colorop is not in bypass.
With this change the follow IGT tests pass:
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf
kms_colorop --run plane-
Expose one 1D curve colorop with support for
DRM_COLOROP_1D_CURVE_SRGB_EOTF and program HW to perform
the sRGB transform when the colorop is not in bypass.
With this change the following IGT test passes:
kms_colorop --run plane-XR30-XR30-srgb_eotf
The color pipeline now consists of a single color
cursor plane does not need to have color pipeline.
Signed-off-by: Alex Hung
---
v7:
- Add a commit messages
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
b/drivers/gpu/drm/
From: Harry Wentland
When the plane_color_pipeline bit is set we should ignore
deprecated properties, such as COLOR_RANGE and COLOR_ENCODING.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
1 file changed, 4 insertions(+)
From: Harry Wentland
Drivers will need to know whether an atomic check/commit
originated from a client with DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE
so they can ignore deprecated properties, like COLOR_ENCODING
and COLOR_RANGE.
Pass the plane_color_pipeline bit to drm_atomic_state.
Signed-off-by: Al
From: Harry Wentland
While working on the CTM implementation of VKMS I had to ascertain
myself of a few assumptions. One of those is whether drm_fixed.h
treats its numbers using signed-magnitude or twos-complement. It is
twos-complement.
In order to make someone else's day easier I am adding the
From: Harry Wentland
A whole slew of tests for CTM handling that greatly helped in
debugging the CTM code. The extent of tests might seem a bit
silly but they're fast and might someday help save someone
else's day when debugging this.
Reviewed-by: Louis Chauvet
Signed-off-by: Alex Hung
Signed-
From: Harry Wentland
We add two 3x4 matrices into the VKMS color pipeline. The reason
we're adding matrices is so that we can test that application
of a matrix and its inverse yields an output equal to the input
image.
One complication with the matrix implementation has to do with
the fact that
From: Harry Wentland
Certain operations require us to preserve values below 0.0 and
above 1.0 (0x0 and 0x respectively in 16 bpc unorm). One
such operation is a BT709 encoding operation followed by its
decoding operation, or the reverse.
We'll use s32 values as intermediate in and outputs of
From: Harry Wentland
This patch introduces a VKMS color pipeline that includes two
drm_colorops for named transfer functions. For now the only ones
supported are sRGB EOTF, sRGB Inverse EOTF, and a Linear TF.
We will expand this in the future but I don't want to do so
without accompanying IGT tes
From: Harry Wentland
This type is used to support a 3x4 matrix in colorops. A 3x4
matrix uses the last column as a "bias" column. Some HW exposes
support for 3x4. The calculation looks like:
out matrixin
|R| |0 1 2 3 | | R |
|G| = |4 5 6 7 | x | G |
|B| |8 9 10 11| | B
From: Harry Wentland
Two tests are added to VKMS LUT handling:
- linear
- inv_srgb
Reviewed-by: Louis Chauvet
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Fix checkpatch warnings (Louis Chauvet)
- Adde a commit messages
- Fix code styles by adding and removing spaces
From: Harry Wentland
We're adding a new enum COLOR PIPELINE property. This
property will have entries for each COLOR PIPELINE by
referencing the DRM object ID of the first drm_colorop
of the pipeline. 0 disables the entire COLOR PIPELINE.
Userspace can use this to discover the available color
pi
From: Harry Wentland
With the introduction of the pre-blending color pipeline we
can no longer have color operations that don't have a clear
position in the color pipeline. We deprecate all existing
plane properties. For upstream drivers those are:
- COLOR_ENCODING
- COLOR_RANGE
Drivers are ex
From: Harry Wentland
Print atomic state for drm_colorop in debugfs
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Add a commit messages
- Squash "drm/colorop: Add NEXT to colorop state print" (Simon Ser)
drivers/gpu/drm/drm_atomic.c | 26 +-
1 file
From: Harry Wentland
We'll construct color pipelines out of drm_colorop by
chaining them via the NEXT pointer. NEXT will point to
the next drm_colorop in the pipeline, or by 0 if we're
at the end of the pipeline.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v5:
- move next comme
From: Harry Wentland
Add kernel doc for drm_colorop objects.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Add a commit messages
v5:
- Drop TODO
Documentation/gpu/drm-kms.rst | 15 +++
drivers/gpu/drm/drm_colorop.c | 31 +++
2 fil
From: Harry Wentland
We want to be able to bypass each colorop at all times.
Introduce a new BYPASS boolean property for this.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v6:
- clarify that bypass is only valid if BYPASS prop exists (Louis Chauvet)
drivers/gpu/drm/drm_atomic_
From: Harry Wentland
Add a new drm_colorop with DRM_COLOROP_1D_CURVE with two subtypes:
DRM_COLOROP_1D_CURVE_SRGB_EOTF and DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF.
Signed-off-by: Harry Wentland
Co-developed-by: Alex Hung
Signed-off-by: Alex Hung
---
v5:
- Add drm_get_colorop_curve_1d_type_name in
From: Harry Wentland
Add a read-only TYPE property. The TYPE specifies the colorop
type, such as enumerated curve, 1D LUT, CTM, 3D LUT, PWL LUT,
etc.
For now we're only introducing an enumerated 1D LUT type to
illustrate the concept.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
From: Harry Wentland
This patches introduces a new drm_colorop mode object. This
object represents color transformations and can be used to
define color pipelines.
We also introduce the drm_colorop_state here, as well as
various helpers and state tracking bits.
Signed-off-by: Alex Hung
Signed-
From: Harry Wentland
Add documentation for color pipeline API.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Add a commit messages
v5:
- Don't require BYPASS to succeed (Sebastian)
- use DATA for 1D and 3D LUT types (Sebastian)
- update 3DLUT ops to use 3DLUT_MODES and
From: Harry Wentland
Debugging LUT math is much easier when we can unit test
it. Add kunit functionality to VKMS and add tests for
- get_lut_index
- lerp_u16
Reviewed-by: Louis Chauvet
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
Cc: Arthur Grillo
---
v7:
- Fix checkpatch warnin
From: Harry Wentland
fixp2int always rounds down, fixp2int_ceil rounds up. We need
the new fixp2int_round.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
Reviewed-by: Louis Chauvet
---
drivers/gpu/drm/vkms/vkms_composer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
From: Harry Wentland
CTM values are defined as signed-magnitude values. Add
a helper that converts from CTM signed-magnitude fixed
point value to the twos-complement value used by
drm_fixed.
Signed-off-by: Harry Wentland
---
include/drm/drm_fixed.h | 18 ++
1 file changed, 18 i
This is an RFC set for a color pipeline API, along with implementations
in VKMS and amdgpu. It is tested with a set of IGT tests that can be
found at [1]. The IGT tests run a pixel-by-pixel comparison with an
allowable delta variation as the goal for these transformations is
perceptual correctness,
On Thu, Dec 19, 2024 at 5:32 AM Brian Starkey wrote:
> On Wed, Dec 18, 2024 at 09:53:56PM +, Marek Olšák wrote:
> > On Wed, Dec 18, 2024 at 5:32 AM Brian Starkey
> wrote:
> >
> > > On Wed, Dec 18, 2024 at 11:24:58AM +, Simona Vetter wrote:
> > > >
> > > > For that reason I think linear m
arn_flag := -Wframe-larger-than=2048
endif
---
base-commit: 695c2c745e5dff201b75da8a1d237ce403600d04
change-id:
20241219-amdgpu-dml2-address-clang-frame-larger-than-allconfig-f034d9c5118e
Best regards,
--
Nathan Chancellor
On Thu, Dec 19, 2024 at 05:21:41PM -0500, Alex Deucher wrote:
> On Thu, Dec 19, 2024 at 12:23 PM Nathan Chancellor wrote:
> > If you would prefer reapplying the local fix, feel free to do so, but I
> > would like for it to be in the upstream source so it does not have to
> > keep being applied.
>
/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_factory.o :=
> $(dml2_ccflags)
> CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.o :=
> $(dml2_ccflags)
> CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_factory.o :=
> $(dml2_ccflags)
>
> ---
> base-commit: 695c2c745e5dff201b75da8a1d237ce403600d04
> change-id: 20241219-amdgpu-fix-enum-float-conversion-again-again-cbfd9159f76d
>
> Best regards,
> --
> Nathan Chancellor
>
On 12/17/24 1:45 PM, Melissa Wen wrote:
Hi,
Some issues have been found by Cosmic users of AMD display since the
introduction of cursor overlay mode: page fault and divide errors
causing interface freezes. Both are 100% reproducible and affects
multiple HW versions.
Patch 1 addresses the pag
On Thu, Dec 19, 2024 at 09:02:27AM +, Daniel Stone wrote:
> On Wed, 18 Dec 2024 at 10:32, Brian Starkey wrote:
> > On Wed, Dec 18, 2024 at 11:24:58AM +, Simona Vetter wrote:
> > > For that reason I think linear modifiers with explicit pitch/size
> > > alignment constraints is a sound conce
)
CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_factory.o :=
$(dml2_ccflags)
---
base-commit: 695c2c745e5dff201b75da8a1d237ce403600d04
change-id: 20241219-amdgpu-fix-enum-float-conversion-again-again-cbfd9159f76d
Best regards,
--
Nathan Chancellor
On Thu, Dec 19, 2024 at 09:30:30AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> After commit
> 746ae46c1113 ("drm/sched: Mark scheduler work queues with WQ_MEM_RECLAIM")
> amdgpu started seeing the following warning:
>
> [ ] workqueue: WQ_MEM_RECLAIM sdma0:drm_sched_run_job_work [gpu
On 2024-12-19 10:02, Daniel Stone wrote:
>
> How this would be used in practice is also way too underdocumented. We
> need to document that exact-round-up 64b is more restrictive than
> any-multiple-of 64b is more restrictive than 'classic' linear. We need
> to document what people should advertis
Am 19.12.24 um 15:56 schrieb Arvind Yadav:
When applications closes, it triggers the drm_file_free
function which subsequently releases all allocated buffer
objects. Concurrently, the resume_worker thread will attempt
to map the usermode queue. However, since the wptr buffer
object has already be
[Public]
> From: jesse.zh...@amd.com
> Sent: Wednesday, December 18, 2024 6:26 PM
> Subject: [PATCH] drm/amdkfd: fixed page fault when enable MES shader debugger
>
> Initialize the process context address before setting the shader debugger.
I think it would make sense to pull this into it's own
Am 19.12.24 um 15:55 schrieb Li, Yunxiang (Teddy):
[Public]
From: Koenig, Christian
Sent: Thursday, December 19, 2024 5:07
Am 16.12.24 um 18:49 schrieb Yunxiang Li:
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works ok
When applications closes, it triggers the drm_file_free
function which subsequently releases all allocated buffer
objects. Concurrently, the resume_worker thread will attempt
to map the usermode queue. However, since the wptr buffer
object has already been deallocated, this will result in
an Illega
[Public]
> From: Koenig, Christian
> Sent: Thursday, December 19, 2024 5:07
> Am 16.12.24 um 18:49 schrieb Yunxiang Li:
> > Before, every time fdinfo is queried we try to lock all the BOs in the
> > VM and calculate memory usage from scratch. This works okay if the
> > fdinfo is rarely read and t
[Public]
> -Original Message-
> From: jesse.zh...@amd.com
> Sent: Wednesday, December 18, 2024 5:26 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Kuehling, Felix ;
> Huang, Tim ; Zhang, Jesse(Jie)
>
> Subject: [PATCH] drm/amdkfd: fixed page fault
Hi!
On Wed, 18 Dec 2024, Tobias Klausmann wrote:
> I have been hitting kernel messages from AMDGPU since v6.13-rc2, for
> example:
Additional data:
- v6.13-rc3 has the same issue
- reverting the commit patch from -rc3 makes the problem go away
- hardware is:
03:00.0 VGA compatible controller:
Hi!
I have been hitting kernel messages from AMDGPU since v6.13-rc2, for
example:
[Wed Dec 18 15:56:24 2024] gmc_v11_0_process_interrupt: 10 callbacks suppressed
[Wed Dec 18 15:56:24 2024] amdgpu :03:00.0: amdgpu: [gfxhub] page fault
(src_id:0 ring:169 vmid:0 pasid:0)
[Wed Dec 18 15:56:24 20
Hi!
On Thu, 19 Dec 2024, Zhang, Jesse(Jie) wrote:
> [Public]
> Hi Tobias,
> With this patch, PyTorch works on my side, please help verify this on your
> side.
> https://lists.freedesktop.org/archives/amd-gfx/2024-December/118058.html
I can confirm that this patch, ontop of -rc3, makes the page f
Hi,
Yes, I see you have the prior work and I have duplicated your work.
Apology for the inconvenience.
Best regards,
Mirsad Todorovac
On 12/18/24 11:32, Mark Harmstone wrote:
> There's a fix for this already in the for-next branch:
> https://github.com/btrfs/linux/commit/1a287050962c6847fa4918d
There is a spelling mistake in a dml2_printf message. Fix it.
Signed-off-by: Colin Ian King
---
.../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_d
Hi Alex, Christian, Xinhui,
We forgot to Cc you on that series, sorry. Could you have a look at the
following patch?
Thanks!
Maxime
On Wed, Dec 04, 2024 at 02:44:05PM +0100, Maarten Lankhorst wrote:
> Similar to xe, enable some simple management of VRAM only.
>
> Co-developed-by: Maxime Ripard
Am 19.12.24 um 11:38 schrieb Arunpravin Paneer Selvam:
Fix the wait IOCTL lockup issue.
v2:(Christian)
- The problem is that you need to lock all BOs under a single
drm_exec_until_all_locked() loop. Otherwise not all BOs
would be locked again on contention.
v3: Locking vm pd when a
Am 19.12.24 um 11:38 schrieb Arunpravin Paneer Selvam:
Fix out-of-bounds issue in userq fence create when
accessing the userq xa structure. Added a lock to
protect the race condition.
v2:(Christian)
- Acquire xa lock only for the xa_for_each blocks and
not for the kvmalloc_array() mem
Fix the wait IOCTL lockup issue.
v2:(Christian)
- The problem is that you need to lock all BOs under a single
drm_exec_until_all_locked() loop. Otherwise not all BOs
would be locked again on contention.
v3: Locking vm pd when accessing the GEM BO's solves the lockup
issues.
[Dec 6
Make the xa field names used in the userqueue and userfence
structure more understandable and add more clarity.
Signed-off-by: Arunpravin Paneer Selvam
---
.../gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 31 ++-
.../gpu/drm/amd/amdgpu/amdgpu_userq_fence.h | 4 +--
drivers/gpu/
Fix out-of-bounds issue in userq fence create when
accessing the userq xa structure. Added a lock to
protect the race condition.
v2:(Christian)
- Acquire xa lock only for the xa_for_each blocks and
not for the kvmalloc_array() memory allocation part.
v3:
- Replacing the kvmalloc_array() s
On Wed, Dec 18, 2024 at 09:53:56PM +, Marek Olšák wrote:
> On Wed, Dec 18, 2024 at 5:32 AM Brian Starkey wrote:
>
> > On Wed, Dec 18, 2024 at 11:24:58AM +, Simona Vetter wrote:
> > >
> > > For that reason I think linear modifiers with explicit pitch/size
> > > alignment constraints is a s
Am 16.12.24 um 18:49 schrieb Yunxiang Li:
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works okay if the
fdinfo is rarely read and the VMs don't have a ton of BOs. If either of
these conditions is not true, we get a massiv
From: Tvrtko Ursulin
After commit
746ae46c1113 ("drm/sched: Mark scheduler work queues with WQ_MEM_RECLAIM")
amdgpu started seeing the following warning:
[ ] workqueue: WQ_MEM_RECLAIM sdma0:drm_sched_run_job_work [gpu_sched] is
flushing !WQ_MEM_RECLAIM events:amdgpu_device_delay_enable_gfx_off
On Thu, 19 Dec 2024 at 02:54, Marek Olšák wrote:
> On Wed, Dec 18, 2024 at 5:32 AM Brian Starkey wrote:
>> On Wed, Dec 18, 2024 at 11:24:58AM +, Simona Vetter wrote:
>> > For that reason I think linear modifiers with explicit pitch/size
>> > alignment constraints is a sound concept and fits i
On Wed, 18 Dec 2024 at 10:32, Brian Starkey wrote:
> On Wed, Dec 18, 2024 at 11:24:58AM +, Simona Vetter wrote:
> > For that reason I think linear modifiers with explicit pitch/size
> > alignment constraints is a sound concept and fits into how modifiers work
> > overall.
>
> Could we make it
[AMD Official Use Only - AMD Internal Distribution Only]
+ Teddy,
Ping ...
-Original Message-
From: jesse.zh...@amd.com
Sent: Wednesday, December 18, 2024 6:26 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Kuehling, Felix ; Huang,
Tim ; Zhang, Jess
[Public]
Hi Tobias and Teddy,
-Original Message-
From: Li, Yunxiang (Teddy)
Sent: Thursday, December 19, 2024 12:46 AM
To: Deucher, Alexander ; Tobias Klausmann
; amd-gfx@lists.freedesktop.org
Cc: Zhang, Jesse(Jie) ; Kuehling, Felix
Subject: RE: [Bug report] Regression with kernel v6.
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