On Tue, 20 Aug 2024 at 00:13, Alex Deucher wrote:
>
> On Mon, Aug 19, 2024 at 9:55 AM Andrew Worsley wrote:
> >
> > The v6.11-rc4 linux hangs during amdgpu start up where as the v6.10.0
> > is fine. I had to take a photo of the screen (see attachment) from
.
> > amdgpu :c1:00.0: Direct fi
On 2024-08-19 11:21:21+, Jani Nikula wrote:
> On Sun, 18 Aug 2024, Thomas Weißschuh wrote:
> > drm_edid_is_valid() does not modify its argument, so mark it as const.
>
> That's not true.
Indeed, thanks for noticing.
It turns out this patch is not necessary anyways and I dropped it for
the ne
Hi Melissa,
On 2024-08-19 11:31:44+, Melissa Wen wrote:
> On 08/18, Thomas Weißschuh wrote:
> > The AMD DRM drivers use 'struct edid', raw pointers and even custom
> > structs to represent EDID data.
> > Uniformly switch to the safe and recommended "struct drm_edid".
> >
> > Some uses of "str
On 2024-08-19 11:51:45+, Jani Nikula wrote:
> On Sun, 18 Aug 2024, Thomas Weißschuh wrote:
> > "struct drm_edid" is the safe and recommended alternative to "struct edid".
> >
> > Rename the member to make sure that no usage sites are missed,
> > as "struct drm_edid" has some restrictions, for
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Zhang, Hawking
Sent: Tuesday, August 20, 2024 2:31 PM
To: amd-gfx@lists.freedesktop.org; Wang, Yang(Kevin) ;
Feng, Kenneth
Cc: Zhang, Hawking
Subject: [PATCH]
When SMU IP is disabled by ip_block_mask, driver
should not refer to any dpm/swSMU callback. Instead,
any driver call into swSMU/dpm callback needs to
return error code EOPNOTSUPP.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 3 ++-
1 file changed, 2 insertions(+)
[AMD Official Use Only - AMD Internal Distribution Only]
The series is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Hawking Zhang
> Sent: Tuesday, August 20, 2024 2:05 PM
> To: amd-gfx@lists.freedesktop.org; Zhou1, Tao ; Yang,
> Stanley
> Cc: Zhang, Hawking ; Fan, Shikang
>
>
[AMD Official Use Only - AMD Internal Distribution Only]
Ignore this one. please review [PATCH v2 1/3] drm/amdkfd: Check int source id
for utcl2 poison event
Regards,
Hawking
-Original Message-
From: Hawking Zhang
Sent: Tuesday, August 20, 2024 14:05
To: amd-gfx@lists.freedesktop.org;
Traditional utcl2 fault_status polling does not
work in SRIOV environment. The polling of fault
status register from guest side will be dropped
by hardware.
Driver should switch to check utcl2 interrupt
source id to identify utcl2 poison event. It is
set to 1 when poisoned data interrupts are
sign
Traditional utcl2 fault_status polling does not
work in SRIOV environment. The polling of fault
status register from guest side will be dropped
by hardware.
Driver should switch to check utcl2 interrupt
source id to identify utcl2 poison event. It is
set to 1 when poisoned data interrupts are
sign
On 8/9/24 15:42, Hamza Mahfooz wrote:
We don't actually need to request that the compositor does a full
modeset to modify the panel power savings level, we can instead
just make a request to DMUB, to set the new level dynamically.
Cc: Harry Wentland
Cc: Leo Li
Cc: Mario Limonciello
Cc: Sebast
On 19. 08. 24, 16:29, Li, Roman wrote:
Thank you, Jiri, for your feedback.
I've dropped this patch from DC v.3.2.297.
We will follow-up on this separately and merge it after you do confirm the
issue you reported is fixed.
The patch is all fine and very welcome to be upstream as soon as
possi
On 19. 08. 24, 22:12, Deucher, Alexander wrote:
[Public]
-Original Message-
From: Jiri Slaby
Sent: Monday, August 19, 2024 3:54 AM
To: Greg Kroah-Hartman ;
sta...@vger.kernel.org
Cc: patc...@lists.linux.dev; Deucher, Alexander
; Sasha Levin ; Koenig,
Christian ; Pan, Xinhui ;
amd-gfx@l
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: Hawking Zhang
> Sent: Monday, August 19, 2024 11:15 PM
> To: amd-gfx@lists.freedesktop.org; Zhou1, Tao ; Yang,
> Stanley
> Cc: Zhang, Hawking ; Fan, Shikang
>
> Subject: [PATCH 1/3] drm/amdkfd: Check i
add guard band interface on smu v14.0.2/3
Signed-off-by: Kenneth Feng
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 1 +
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 19 +++
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 3 +++
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.
From: Mario Limonciello
If the dGPU is off, then reading the sysfs files with a sensor monitoring
application will wake it. Change the behavior to return an error when the
dGPU is in D3cold.
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 90 +++---
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Yang Wang
Best Regards,
Kevin
From: Kenneth Feng
Sent: Tuesday, August 20, 2024 08:59
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Yang(Kevin) ; Feng, Kenneth
Subject: [PATCH] drm/amd/pm: up
update message interface for smu v14.0.2/3
Signed-off-by: Kenneth Feng
---
.../pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h | 18 ++
.../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 1 -
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/i
Not all HW will be able to do bypass on all color
operations. Introduce an 'allow_bypass' boolean for
all colorop init functions and only create the BYPASS
property when it's true.
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 22 +---
drivers/gpu/drm/drm_
From: Alex Hung
We've previously introduced DRM_COLOROP_1D_CURVE for
pre-defined 1D curves. But we also have HW that supports
custom curves and userspace needs the ability to pass
custom curves, aka LUTs.
This patch introduces a new colorop type, called
DRM_COLOROP_1D_LUT that provides a SIZE pr
From: Alex Hung
Swap the order of matrix and multiplier as designed in hardware.
Signed-off-by: Alex Hung
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 22 +++---
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 30 +--
2 files changed, 26 insertions(+), 26 deletio
A short description about the AMD color pipeline.
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 122 +++---
1 file changed, 102 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/
From: Alex Hung
This adds support for a 3x4 color transformation matrix.
With this change the following IGT tests pass:
kms_colorop --run plane-XR30-XR30-ctm_3x4_50_desat
kms_colorop --run plane-XR30-XR30-ctm_3x4_overdrive
kms_colorop --run plane-XR30-XR30-ctm_3x4_oversaturate
kms_colorop --run
From: Alex Hung
This adds support for a 3D LUT.
The color pipeline now consists of the following colorops:
1. 1D curve colorop
2. Multiplier
3. 3x4 CTM
4. 1D curve colorop
5. 1D LUT
6. 3D LUT
7. 1D curve colorop
8. 1D LUT
Signed-off-by: Alex Hung
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.
From: Alex Hung
It is to be used to enable HDR by allowing userpace to create and pass
3D LUTs to kernel and hardware.
1. new drm_colorop_type: DRM_COLOROP_3D_LUT.
2. 3D LUT modes define hardware capabilities to userspace applications.
3. mode index points to current 3D LUT mode in lut_3d_modes.
From: Alex Hung
This introduces a new drm_colorop_type: DRM_COLOROP_MULTIPLIER.
It's a simple multiplier to all pixel values. The value is
specified via a S31.32 fixed point provided via the
"MULTIPLIER" property.
v5:
- Fix atomic state print
- Add kernel doc
Signed-off-by: Alex Hung
---
d
From: Alex Hung
This adds support for a multiplier. This multiplier is
programmed via the HDR Multiplier in DCN.
With this change the following IGT tests pass:
kms_colorop --run plane-XR30-XR30-multiply_125
kms_colorop --run plane-XR30-XR30-multiply_inv_125
The color pipeline now consists of th
From: Alex Hung
This patch adds colorops for custom 1D LUTs in the SHAPER and
BLND HW blocks.
With this change the following IGT tests pass:
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf_lut-srgb_eotf_lut
The color pipeline now consists of t
We want to make sure userspace is aware of the 1D LUT
interpolation. While linear interpolation is common it
might not be supported on all HW. Give driver implementers
a way to specify their interpolation.
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 6 ++--
When the plane_color_pipeline bit is set we should ignore
deprecated properties, such as COLOR_RANGE and COLOR_ENCODING.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_
From: Alex Hung
Expose one 1D curve colorop with support for
DRM_COLOROP_1D_CURVE_SRGB_EOTF and program HW to perform
the sRGB transform when the colorop is not in bypass.
With this change the following IGT test passes:
kms_colorop --run plane-XR30-XR30-srgb_eotf
The color pipeline now consists
Add the default Bypass pipeline and ensure it passes the
kms_colorop test plane-XR30-XR30-bypass.
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_
The BT.709 and BT.2020 OETFs are the same, the only difference
being that the BT.2020 variant is defined with more precision
for 10 and 12-bit per color encodings.
Both are used as encoding functions for video content, and are
therefore defined as OETF (opto-electronic transfer function)
instead o
The PQ function defines a mapping of code values to nits (cd/m^2).
The max code value maps to 10,000 nits.
Windows DWM's canonical composition color space (CCCS) defaults
to composing SDR contents to 80 nits and uses a float value of
1.0 to represent this. For this reason AMD HW hard-codes a PQ
f
From: Alex Hung
Expose a 3rd 1D curve colorop, with support for
DRM_COLOROP_1D_CURVE_SRGB_EOTF and program the BLND block
to perform the sRGB transform when the colorop is not in
bypass
With this change the following IGT test passes:
kms_colorop --run plane-XR30-XR30-srgb_eotf-srgb_inv_eotf-srgb
This adds support for the BT.709/BT.2020 transfer functions
on all current 1D curve plane colorops, i.e., on DEGAM, SHAPER,
and BLND blocks.
With this change the following IGT subtests pass:
kms_colorop --run plane-XR30-XR30-bt2020_inv_oetf
kms_colorop --run plane-XR30-XR30-bt2020_oetf
Signed-off
From: Alex Hung
Expose a 2nd curve colorop with support for
DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF and program HW to
perform the sRGB Inverse EOTF on the shaper block
when the colorop is not in bypass.
With this change the follow IGT tests pass:
kms_colorop --run plane-XR30-XR30-srgb_inv_eotf
kms_co
This patchset enables support for the PQ_125 EOTF and its inverse
on all existing plane 1D curve colorops, i.e., on DEGAM, SHAPER,
and BLND blocks.
With this patchset the following IGT subtests are passing:
kms_colorop --run plane-XR30-XR30-pq_125_eotf
kms_colorop --run plane-XR30-XR30-pq_125_inv_
A whole slew of tests for CTM handling that greatly helped in
debugging the CTM code. The extent of tests might seem a bit
silly but they're fast and might someday help save someone
else's day when debugging this.
v5:
- Make apply_3x4_matrix static
v4:
- Comment on origin of bt709_enc matrix (P
We're adding a new enum COLOR PIPELINE property. This
property will have entries for each COLOR PIPELINE by
referencing the DRM object ID of the first drm_colorop
of the pipeline. 0 disables the entire COLOR PIPELINE.
Userspace can use this to discover the available color
pipelines, as well as set
While working on the CTM implementation of VKMS I had to ascertain
myself of a few assumptions. One of those is whether drm_fixed.h
treats its numbers using signed-magnitude or twos-complement. It is
twos-complement.
In order to make someone else's day easier I am adding the
drm_test_int2fixp test
Drivers will need to know whether an atomic check/commit
originated from a client with DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE
so they can ignore deprecated properties, like COLOR_ENCODING
and COLOR_RANGE.
Pass the plane_color_pipeline bit to drm_atomic_state.
v5:
- Fix kernel docs
Signed-off-by: H
From: Alex Hung
Create a new macro for_each_new_colorop_in_state to access new
drm_colorop_state updated from uapi.
Signed-off-by: Alex Hung
---
include/drm/drm_atomic.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.
This patch introduces a VKMS color pipeline that includes two
drm_colorops for named transfer functions. For now the only ones
supported are sRGB EOTF, sRGB Inverse EOTF, and a Linear TF.
We will expand this in the future but I don't want to do so
without accompanying IGT tests.
We introduce a new
Certain operations require us to preserve values below 0.0 and
above 1.0 (0x0 and 0x respectively in 16 bpc unorm). One
such operation is a BT709 encoding operation followed by its
decoding operation, or the reverse.
We'll use s32 values as intermediate in and outputs of our
color operations,
This type is used to support a 3x4 matrix in colorops. A 3x4
matrix uses the last column as a "bias" column. Some HW exposes
support for 3x4. The calculation looks like:
out matrixin
|R| |0 1 2 3 | | R |
|G| = |4 5 6 7 | x | G |
|B| |8 9 10 11| | B |
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/vkms/tests/vkms_color_tests.c | 37 ++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vkms/tests/vkms_color_tests.c
b/drivers/gpu/drm/vkms/tests/vkms_color_tests.c
index fc73e48aa57c..e6ac01dee830 1
From: Alex Hung
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index d260db42d407..8fc0
We'll construct color pipelines out of drm_colorop by
chaining them via the NEXT pointer. NEXT will point to
the next drm_colorop in the pipeline, or by 0 if we're
at the end of the pipeline.
v5:
- move next comment here from Add 3x4 CTM patch (Sebastian)
- Add kernel doc
v4:
- Allow setting o
We add two 3x4 matrices into the VKMS color pipeline. The reason
we're adding matrices is so that we can test that application
of a matrix and its inverse yields an output equal to the input
image.
One complication with the matrix implementation has to do with
the fact that the matrix entries are
With the introduction of the pre-blending color pipeline we
can no longer have color operations that don't have a clear
position in the color pipeline. We deprecate all existing
plane properties. For upstream drivers those are:
- COLOR_ENCODING
- COLOR_RANGE
Drivers are expected to ignore these
Debugging LUT math is much easier when we can unit test
it. Add kunit functionality to VKMS and add tests for
- get_lut_index
- lerp_u16
v5:
- Bring back static for lerp_u16 and get_lut_index (Arthur)
v4:
- Test the critical points of the lerp function (Pekka)
v3:
- Use include way of testi
Add a read-only TYPE property. The TYPE specifies the colorop
type, such as enumerated curve, 1D LUT, CTM, 3D LUT, PWL LUT,
etc.
v5:
- Add drm_get_colorop_type_name in header
- Add kernel docs
v4:
- Use enum property for TYPE (Pekka)
v3:
- Make TYPE a range property
- Move enum drm_colorop_
v5:
- Add drm_get_colorop_curve_1d_type_name in header
- Add drm_colorop_init
- Set default curve
- Add kernel docs
v4:
- Use drm_colorop_curve_1d_type_enum_list to get name (Pekka)
- Create separate init function for 1D curve
- Pass supported TFs into 1D curve init function
Signed-off-by:
We want to be able to bypass each colorop at all times.
Introduce a new BYPASS boolean property for this.
v5:
- Drop TODO
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_atomic_uapi.c | 6 +-
drivers/gpu/drm/drm_colorop.c | 15 +++
include/drm/drm_colorop.h |
This patches introduces a new drm_colorop mode object. This
object represents color transformations and can be used to
define color pipelines.
We also introduce the drm_colorop_state here, as well as
various helpers and state tracking bits.
v5:
- Add comment to drm_atomic_state.colorops
- Repla
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_atomic.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index b09db9835e1f..096460d38545 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b
v5:
- Don't require BYPASS to succeed (Sebastian)
- use DATA for 1D and 3D LUT types (Sebastian)
- update 3DLUT ops to use 3DLUT_MODES and 3DLUT_MODE_INDEX
- Add section on drm_colorop extensibility
- Add color_pipeline.rst to RFC toc tree
v4:
- Drop IOCTL docs since we dropped the IOCTLs (P
Signed-off-by: Harry Wentland
---
Documentation/gpu/drm-kms.rst | 15 +++
drivers/gpu/drm/drm_colorop.c | 31 +++
2 files changed, 46 insertions(+)
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
index abfe220764e1..2292e65f044c
v5:
- Drop unused header definitions
v3:
- Read NEXT ID from drm_colorop's next pointer
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_atomic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index d333433319f6..9919a6f109
This is an RFC set for a color pipeline API, along with implementations
in VKMS and amdgpu. It is tested with a set of IGT tests that can be
found at [1]. The IGT tests run a pixel-by-pixel comparison with an
allowable delta variation as the goal for these transformations is
perceptual correctness,
CTM values are defined as signed-magnitude values. Add
a helper that converts from CTM signed-magnitude fixed
point value to the twos-complement value used by
drm_fixed.
Signed-off-by: Harry Wentland
---
include/drm/drm_fixed.h | 18 ++
1 file changed, 18 insertions(+)
diff --gi
fixp2int always rounds down, fixp2int_ceil rounds up. We need
the new fixp2int_round.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/vkms/vkms_composer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/vkms/vkms_composer.c
b/drivers/gpu/drm/vkms/vkms_compo
[Public]
> -Original Message-
> From: Jiri Slaby
> Sent: Monday, August 19, 2024 3:54 AM
> To: Greg Kroah-Hartman ;
> sta...@vger.kernel.org
> Cc: patc...@lists.linux.dev; Deucher, Alexander
> ; Sasha Levin ; Koenig,
> Christian ; Pan, Xinhui ;
> amd-gfx@lists.freedesktop.org
> Subject: R
From: Leo Li
[Why]
There are currently known backlight and abm issues when IPS is enabled
on DCN35.
While the issues are being ironed out, let's default to
IPS_DISABLE_DYNAMIC so users will not experience hangs. When the issues
are resolved, this patch should be reverted.
[How]
Set the defaul
From: Leo Li
[Why]
dc_exit_ips_for_hw_access() is the same as
dc_allow_idle_optimizations(), but with a check on whether IPS is
supported by the ASIC.
[How]
Let's also pipe it through the dm function introduced by the previous
change.
No functional changes are intended.
Signed-off-by: Leo Li
From: Leo Li
[Why]
The IPS_DISABLE_DYNAMIC configuration disables IPS in all cases except
for when the driver is put into d3 for s0ix.
[How]
Now that we have a common entry point into dc_allow_idle_optimizations
from dm, implement said configuration there.
Signed-off-by: Leo Li
---
.../gpu/
From: Leo Li
[Why]
In preparation for enabling IPS debug flags that require DM changes,
a common entry point for allowing DC idle optimisations is needed.
[How]
Create an alias in DM for dc_allow_idle_optimizations(). Change all
calls to it into dm_allow_idle_optimizations().
No functional ch
From: Leo Li
[Why]
Idle power states (IPS) describe levels of power-gating within DCN. DM
and DC is responsible for ensuring that we are out of IPS before any DCN
programming happens. Any DCN programming while we're in IPS leads to
undefined behavior (mostly hangs).
Because IPS intersects with
On 2024-08-19 10:41, Harry Wentland wrote:
On 2024-08-16 18:57, sunpeng...@amd.com wrote:
From: Leo Li
[Why]
Idle power states (IPS) describe levels of power-gating within DCN. DM
and DC is responsible for ensuring that we are out of IPS before any DCN
programming happens. Any DCN progra
Currently multiple partitions will incorrectly overwrite the VM lookup
table since the table is indexed by PASID and multiple partitions can
register different VM objects on the same PASID.
This results in loading the wrong VM object on PASID query.
To correct this, setup the lookup table to be p
Alex Deucher writes:
Hello Alex,
> In aperture_remove_conflicting_pci_devices(), we currently only
> call sysfb_disable() on vga class devices. This leads to the
> following problem when the pimary device is not VGA compatible:
>
> 1. A PCI device with a non-VGA class is the boot display
> 2. T
I forgot to update the patch title but it should probably be something like:
video/aperture: optionally match the device in sysfb_disable()
Alex
On Mon, Aug 19, 2024 at 1:00 PM Alex Deucher wrote:
>
> In aperture_remove_conflicting_pci_devices(), we currently only
> call sysfb_disable() on vga
In aperture_remove_conflicting_pci_devices(), we currently only
call sysfb_disable() on vga class devices. This leads to the
following problem when the pimary device is not VGA compatible:
1. A PCI device with a non-VGA class is the boot display
2. That device is probed first and it is not a VGA
Thomas Zimmermann writes:
> Call drm_client_setup() to run the kernel's default client setup
> for DRM. Set fbdev_probe in struct drm_driver, so that the client
> setup can start the common fbdev client.
>
> The solomon driver specifies a preferred color mode of 32. As this
> is the default if no
Thomas Zimmermann writes:
> Call drm_client_setup() to run the kernel's default client setup
> for DRM. Set fbdev_probe in struct drm_driver, so that the client
> setup can start the common fbdev client.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Thomas Zimmermann
> Cc: Javier Martinez Canillas
Thomas Zimmermann writes:
Hello Thomas,
> Call drm_client_setup() to run the kernel's default client setup
> for DRM. Set fbdev_probe in struct drm_driver, so that the client
> setup can start the common fbdev client.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Thomas Zimmermann
> Cc: Javier Ma
On Mon, Aug 19, 2024 at 10:00 AM Bas Nieuwenhuizen
wrote:
>
>
> On Mon, Aug 19, 2024 at 4:51 PM Christian König <
> ckoenig.leichtzumer...@gmail.com> wrote:
>
>> Am 07.08.24 um 22:33 schrieb Bas Nieuwenhuizen:
>>
>> On Wed, Aug 7, 2024 at 10:25 PM Faith Ekstrand
>> wrote:
>>
>>> On Wed, Aug 7, 2
On 16/08/2024 14:22, Thomas Zimmermann wrote:
Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
Signed-off-by: Thomas Zimmermann
Cc: Neil Armstrong
Cc: Jessica Zhang
---
On 16/08/2024 14:22, Thomas Zimmermann wrote:
Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
Signed-off-by: Thomas Zimmermann
Cc: Neil Armstrong
Cc: Jessica Zhang
---
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Monday, August 19, 2024 23:24
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Ma Jun
Subject: [PATCH] drm/amd
The driver needs to wait for the on board firmware
to finish its initialization before probing the card.
Commit 959056982a9b ("drm/amdgpu: Fix discovery initialization failure during
pci rescan")
switched from using msleep() to using usleep_range() which
seems to have caused init failures on some
Driver switches to interrupt source id to identify
utcl2 poison event. polling interface is not needed.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 16
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 2 --
drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.
Not supported.
Signed-off-by: Hawking Zhang
---
.../gpu/drm/amd/amdkfd/kfd_int_process_v10.c | 71 ---
1 file changed, 71 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c
b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c
index 8e0d0356e810..bb8cbfc39
Traditional utcl2 fault_status polling does not
work in SRIOV environment. The polling of fault
status register from guest side will be dropped
by hardware.
Driver should switch to check utcl2 interrupt
source id to identify utcl2 poison event. It is
set to 1 when poisoned data interrupts are
sign
Am 19.08.24 um 10:04 schrieb Thomas Zimmermann:
Hi
Am 16.08.24 um 22:57 schrieb Alex Deucher:
On Mon, Aug 12, 2024 at 8:10 AM Thomas Zimmermann
wrote:
Hi
Am 10.08.24 um 13:44 schrieb kernel test robot:
Hi Alex,
kernel test robot noticed the following build errors:
[auto build test ERRO
Am 08.08.24 um 19:48 schrieb Victor Skvortsov:
Register access from userspace should be blocked until
reset is complete.
Signed-off-by: Victor Skvortsov
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 44 ++---
1 file changed, 32 insertions(+), 12 deletions(-)
diff --git a
On Mon, Aug 19, 2024 at 4:51 PM Christian König <
ckoenig.leichtzumer...@gmail.com> wrote:
> Am 07.08.24 um 22:33 schrieb Bas Nieuwenhuizen:
>
> On Wed, Aug 7, 2024 at 10:25 PM Faith Ekstrand
> wrote:
>
>> On Wed, Aug 7, 2024 at 2:23 PM Joshua Ashton wrote:
>>
>>> I was thinking about this more
Am 07.08.24 um 22:33 schrieb Bas Nieuwenhuizen:
On Wed, Aug 7, 2024 at 10:25 PM Faith Ekstrand
wrote:
On Wed, Aug 7, 2024 at 2:23 PM Joshua Ashton wrote:
I was thinking about this more recently. I was initially
considering "maybe this should be a per-BO import," but I
On 2024-08-16 18:57, sunpeng...@amd.com wrote:
> From: Leo Li
>
> [Why]
>
> Idle power states (IPS) describe levels of power-gating within DCN. DM
> and DC is responsible for ensuring that we are out of IPS before any DCN
> programming happens. Any DCN programming while we're in IPS leads to
On 08/18, Thomas Weißschuh wrote:
> The AMD DRM drivers use 'struct edid', raw pointers and even custom
> structs to represent EDID data.
> Uniformly switch to the safe and recommended "struct drm_edid".
>
> Some uses of "struct edid" are left because some ad-hoc parsing is still
> being done insi
[Public]
Thank you, Jiri, for your feedback.
I've dropped this patch from DC v.3.2.297.
We will follow-up on this separately and merge it after you do confirm the
issue you reported is fixed.
Thanks,
Roman
> -Original Message-
> From: Jiri Slaby
> Sent: Monday, August 19, 2024 4:37 AM
On Thu, Aug 15, 2024 at 09:37:31AM +0100, Tvrtko Ursulin wrote:
>
> On 13/08/2024 19:47, Rob Clark wrote:
> > On Tue, Aug 13, 2024 at 6:57 AM Tvrtko Ursulin wrote:
> > >
> > > From: Tvrtko Ursulin
> > >
> > > Currently it is not well defined what is drm-memory- compared to other
> > > categori
On Mon, Aug 19, 2024 at 9:55 AM Andrew Worsley wrote:
>
> The v6.11-rc4 linux hangs during amdgpu start up where as the v6.10.0
> is fine. I had to take a photo of the screen (see attachment) from
> which I generated
> the following summary:
>
> Booting linux v6.11-rc4 :
> ...
> amdgpu: Virtua
Thomas Zimmermann writes:
Hello Alex and Thomas,
> Hi
>
> Am 16.08.24 um 22:57 schrieb Alex Deucher:
>> On Mon, Aug 12, 2024 at 8:10 AM Thomas Zimmermann
>> wrote:
>>> Hi
>>>
>>> Am 10.08.24 um 13:44 schrieb kernel test robot:
Hi Alex,
kernel test robot noticed the following bui
Hi, Thomas
I love your patch, yet ...
On 2024/8/16 20:23, Thomas Zimmermann wrote:
i915's fbdev contains additional code for hotplugging a display that
cannot be ported to the common fbdev client. Introduce the callback
struct drm_fb_helper.fb_hotplug and implement it for i915. The fbdev
help
Hi,
On 2024/8/16 20:23, Thomas Zimmermann wrote:
Call drm_client_setup() to run the kernel's default client setup
for DRM. Set fbdev_probe in struct drm_driver, so that the client
setup can start the common fbdev client.
The loongson driver specifies a preferred color mode of 32. As this
is th
Hi Christian,
On 8/19/2024 1:59 PM, Christian König wrote:
Am 05.08.24 um 16:01 schrieb Arunpravin Paneer Selvam:
We require this flag AMDGPU_GEM_CREATE_GFX12_DCC or any other
kernel level GFX12 DCC flag to differentiate the DCC buffers and other
pinned display buffers(which has TTM_PL_FLAG_CON
Am 19.08.24 um 09:21 schrieb Friedrich Vock:
In Vulkan, it is the application's responsibility to perform adequate
synchronization before a sparse unmap, replace or BO destroy operation.
This adds an option to AMDGPU_VA_OPs to disable redundant implicit sync
that happens on sparse unmap or replac
Am 06.08.24 um 18:00 schrieb David (Ming Qiang) Wu:
Add JPEG IB command parser to ensure registers
in the command are within the JPEG IP block.
You should probably re-order the patches so that the cleanup comes first
and then the new functionality.
Apart from that looks good to me.
Regards,
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