Am 07.07.23 um 08:28 schrieb Friedrich Vock:
During gfxoff, the per-VMID GDS registers are reset and not restored
afterwards.
Hui? Since when? Those registers should be part of the saved ones.
Have you found that by observation?
Thanks,
Christian.
The kernel needs to emit a GDS switch
During gfxoff, the per-VMID GDS registers are reset and not restored
afterwards. The kernel needs to emit a GDS switch to manually update the
GWS registers in this case. Since gfxoff can happen between any two
submissions and the kernel has no way of knowing, emit the GDS switch
before every submis
[Public]
> -Original Message-
> From: Koenig, Christian
> Sent: Thursday, July 6, 2023 7:25 PM
> To: Chen, Guchun ; amd-
> g...@lists.freedesktop.org; Deucher, Alexander
> ; Zhang, Hawking
> ; Milinkovic, Dusica
> ; Prica, Nikola ; Cui,
> Flora
> Cc: sta...@vger.kernel.org
> Subject: Re:
[Public]
Hi Mike,
Yes, we are aware of this problem, and we are working on that. The problem is
caused by recent code stores xcp_id to amdgpu bo for accounting memory usage
and so on. However, not all VMs are attached to that like the case in
amdgpu_mes_self_test.
Regards,
Guchun
> -Orig
[Public]
>From the log you provided, I extracted the panel id so I expect FAMS to get
>disabled on your monitor. If it doesn't work, let me know.
--
Regards,
Jay
From: Michel Dänzer
Sent: Thursday, July 6, 2023 10:11 AM
To: Pillai, Aurabindo ; amd-gfx@lists.fre
[AMD Official Use Only - General]
Thanks. I'm going to leave this series as the backup option, have another idea
that I'll have Koba try first.
> -Original Message-
> From: Quan, Evan
> Sent: Wednesday, July 5, 2023 20:04
> To: Limonciello, Mario ; amd-
> g...@lists.freedesktop.org
> Cc
rlc_init() is part of sw_init() so it should not touch hardware.
Additionally, calling the rlc update_spm_vmid() callback
directly invokes a gfx on/off cycle which could result in
powergating being enabled before hw init is complete. Split
update_spm_vmid() into an internal implementation for loca
rlc_init() is part of sw_init() so it should not touch hardware.
Additionally, calling the rlc update_spm_vmid() callback
directly invokes a gfx on/off cycle which could result in
powergating being enabled before hw init is complete. Split
update_spm_vmid() into an internal implementation for loca
On 06/07/2023 19:41, Alex Deucher wrote:
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
It has been observed that the MES FW needs 250-300us to map the gfx
userqueue, and if the user rings the doorbell before this duration,
the FW never recognizes the work. This patch adds the delay of
each xcc instance needs to get iq wait time and set
grace period accordingly.
Signed-off-by: Eric Huang
---
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 9 --
.../drm/amd/amdkfd/kfd_device_queue_manager.h | 2 +-
.../gpu/drm/amd/amdkfd/kfd_packet_manager.c | 32 +++
..
From: Jonathan Kim
Set watch points for all xcc instances on GFX943.
Signed-off-by: Jonathan Kim
Reviewed-by: Felix Kuehling
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdkfd/kfd_debug.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/am
From: Jonathan Kim
The additional information that the KFD reports to the debugger was
destroyed when the following commit was merged:
"drm/amdkfd: convert switches to IP version checking"
Signed-off-by: Jonathan Kim
Reviewed-by: Harish Kasiviswanathan
Signed-off-by: Jonathan Kim
Acked-by: Am
To set TTMP setup on by default.
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_debug.c | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 6 +++---
3 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/am
From: Jonathan Kim
Similar to GC v9.4.2, GC v9.4.3 should use the 5-Dword extended
MAP_PROCESS packet to support multi-process debugging. Update the
mutli-process debug support list so that the KFD updates the runlist
on debug mode setting and that it allocates enough GTT memory during
KFD devic
From: Jonathan Kim
Implement the similarities as GC v9.4.2, and the difference
for GC v9.4.3 HW spec, i.e. xcc instance.
Signed-off-by: Jonathan Kim
Signed-off-by: Eric Huang
---
.../drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c | 10 +-
.../drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h | 30
Eric Huang (2):
drm/amdkfd: enable grace period for xcc instance
drm/amdkfd: always keep trap enabled for GC v9.4.3
Jonathan Kim (4):
drm/amdkfd: add kfd2kgd debugger callbacks for GC v9.4.3
drm/amdkfd: restore debugger additional info for gfx v9_4_3
drm/amdkfd: enable watch points globa
On Thu, Jul 6, 2023 at 12:25 PM Zhigang Luo wrote:
>
> For SRIOV VF, FB location is programmed by host driver, no need to
> program it in guest driver.
>
> Signed-off-by: Zhigang Luo
> Change-Id: I2a4838f6703e94bb0bcf3a8e923c69466e37803f
> ---
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 15 +---
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
>
> It has been observed that the MES FW needs 250-300us to map the gfx
> userqueue, and if the user rings the doorbell before this duration,
> the FW never recognizes the work. This patch adds the delay of 300
> us after the queue mapping.
>
>
On Thu, Jul 6, 2023 at 1:32 PM Shashank Sharma wrote:
>
>
> On 06/07/2023 19:26, Alex Deucher wrote:
> > On Thu, Jul 6, 2023 at 1:15 PM Shashank Sharma
> > wrote:
> >>
> >> On 06/07/2023 18:52, Alex Deucher wrote:
> >>> On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma
> >>> wrote:
> This pa
On Thu, Jul 6, 2023 at 12:53 PM Shashank Sharma wrote:
>
>
> On 06/07/2023 18:36, Alex Deucher wrote:
> > On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma
> > wrote:
> >> This patch adds skeleton code for amdgpu usermode queue.
> >> It contains:
> >> - A new files with init functions of usermode q
On 06/07/2023 19:26, Alex Deucher wrote:
On Thu, Jul 6, 2023 at 1:15 PM Shashank Sharma wrote:
On 06/07/2023 18:52, Alex Deucher wrote:
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
This patch adds new functions to map/unmap a usermode queue into
the FW, using the MES ring. As soo
On Thu, Jul 6, 2023 at 1:15 PM Shashank Sharma wrote:
>
>
> On 06/07/2023 18:52, Alex Deucher wrote:
> > On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma
> > wrote:
> >> This patch adds new functions to map/unmap a usermode queue into
> >> the FW, using the MES ring. As soon as this mapping is don
On 06/07/2023 18:52, Alex Deucher wrote:
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
This patch adds new functions to map/unmap a usermode queue into
the FW, using the MES ring. As soon as this mapping is done, the
queue would be considered ready to accept the workload.
V1: Addres
On 06/07/2023 18:36, Alex Deucher wrote:
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
This patch adds skeleton code for amdgpu usermode queue.
It contains:
- A new files with init functions of usermode queues.
- A queue context manager in driver private data.
V1: Worked on design re
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
>
> This patch adds new functions to map/unmap a usermode queue into
> the FW, using the MES ring. As soon as this mapping is done, the
> queue would be considered ready to accept the workload.
>
> V1: Addressed review comments from Alex on th
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
>
> The FW expects us to allocate at least one page as context
> space to process gang, process, GDS and FW related work.
> This patch creates a joint object for the same, and calculates
> GPU space offsets for each of these spaces.
>
> V1: Ad
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
>
> This patch adds skeleton code for amdgpu usermode queue.
> It contains:
> - A new files with init functions of usermode queues.
> - A queue context manager in driver private data.
>
> V1: Worked on design review comments from RFC patch seri
Hey Alex,
On 06/07/2023 18:27, Alex Deucher wrote:
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This
On Thu, Jul 6, 2023 at 8:36 AM Shashank Sharma wrote:
>
> A Memory queue descriptor (MQD) of a userqueue defines it in
> the hw's context. As MQD format can vary between different
> graphics IPs, we need gfx GEN specific handlers to create MQDs.
>
> This patch:
> - Introduces MQD handler functions
Signed-off-by: Zhigang Luo
Change-Id: I71524c69c7137c6db4968b95e480c910aba24703
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 21438ff61c6e..de9a2a7f5459 10064
For SRIOV VF, FB location is programmed by host driver, no need to
program it in guest driver.
Signed-off-by: Zhigang Luo
Change-Id: I2a4838f6703e94bb0bcf3a8e923c69466e37803f
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 15 +--
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c | 12
Add RLCG interface support for gfx v9.4.3 and multiple XCCs.
Do not enable it yet.
v2: Fix amdgpu_rlcg_reg_access_ctrl init, add support for multiple XCCs
in amdgpu_mm_wreg_mmio_rlc
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
This patch adds new functions to map/unmap a usermode queue into
the FW, using the MES ring. As soon as this mapping is done, the
queue would be considered ready to accept the workload.
V1: Addressed review comments from Alex on the RFC patch series
add session context buffer to decoder ring test.
v4 - data type, explain change of ib size change (Christian)
v3 - indent and v2 changes correction. (Christian)
v2 - put the buffer at the end of the IB (Christian)
Signed-off-by: Saleemkhan Jamadar
Acked-by: Leo Liu
---
drivers/gpu/drm/amd/amd
[Public]
As mentioned before, if we're going to set up the trap temporaries, we may as
well enable them persistently now that GC 9.4.3 should not have a performance
penalty on TTMP setup i.e. we can keep_trap_enabled any time we
disable_debug_trap.
Thanks,
Jon
> -Original Message-
>
[AMD Official Use Only - General]
> -Original Message-
> From: Huang, JinHuiEric
> Sent: Wednesday, July 5, 2023 6:57 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Kim, Jonathan ; Kim, Jonathan
> ; Kasiviswanathan, Harish
> ; Lin, Amber ;
> Huang, JinHuiEric
> Subject: [PATCH 2/5] drm/amd
[Public]
> -Original Message-
> From: Huang, JinHuiEric
> Sent: Wednesday, July 5, 2023 6:57 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Kim, Jonathan ; Huang, JinHuiEric
>
> Subject: [PATCH 3/5] drm/amdkfd: add xcc instance for debugger APIs
>
> Since GFX9 GPU has multiple xcc instance
On 7/6/23 15:55, Pillai, Aurabindo wrote:
>
> Hi Michel,
>
> You confirmed in another thread the monitor specific quirk for disabling FAMS
> fixed your hang.
That's not quite accurate. I confirmed that hard-coding FAMS to be disabled
works around the hangs I reported, and you asked me to test
On 7/6/23 7:58?AM, Alex Deucher wrote:
> On Thu, Jul 6, 2023 at 3:37?AM Yang Rong wrote:
>>
>> The files drivers/net/virtio_net.c,
>> drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c, and io_uring/io_uring.c were
>> modified to fix warnings.
>> Specifically, the opportunities for max() and min() wer
On Thu, Jul 06, 2023 at 10:06:16AM +0800, Yang Rong wrote:
> The files drivers/net/virtio_net.c,
> drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c, and io_uring/io_uring.c were
> modified to fix warnings.
what warnings? the point of the warning is to analyze it not "fix" it
blindly.
> Specifically
On 32-bit:
../tests/amdgpu/amdgpu_stress.c: In function ‘alloc_bo’:
../tests/amdgpu/amdgpu_stress.c:178:49: warning: format ‘%lx’ expects
argument of type ‘long unsigned int’, but argument 4 has type ‘uint64_t’ {aka
‘long long unsigned int’} [-Wformat=]
fprintf(stdout, "Allocated B
On Thu, Jul 6, 2023 at 8:01 AM Danijel Slivka wrote:
>
> Why:
> If the reg mmMP1_SMN_C2PMSG_90 is being programed to 0x0 before
> guest initialization, then modprobe amdgpu will fail at smu hw_init.
> (the default mmMP1_SMN_C2PMSG_90 at a clean guest environment is 0x1).
>
> How to fix:
> this pat
On Thu, Jul 6, 2023 at 3:37 AM Yang Rong wrote:
>
> The files drivers/net/virtio_net.c,
> drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c, and io_uring/io_uring.c were
> modified to fix warnings.
> Specifically, the opportunities for max() and min() were utilized to address
> the warnings.
Please
On Thu, Jul 6, 2023 at 4:56 AM Chen, Horace wrote:
>
> [AMD Official Use Only - General]
>
> Hi Christian & Leo,
>
> Sorry, missed Leo's email.
>
> Currently SR-IOV VF doesn't have suspend/resume use case and this code is in
> vcn_v4_0_start_sriov() which will only called by SR-IOV code path. So
[Public]
Hi Michel,
You confirmed in another thread the monitor specific quirk for disabling FAMS
fixed your hang. Fixes references the commit which adds such quirk:
de1da2f7fe25 drm/amd/display: Add monitor specific edid quirk
The intention is that these two patches should only be merged into
[Public]
Reviewed-by: Aurabindo Pillai
--
Regards,
Jay
From: Wang, Chao-kai (Stylon)
Sent: Thursday, July 6, 2023 3:00 AM
To: amd-gfx@lists.freedesktop.org
Cc: Wentland, Harry ; Li, Sun peng (Leo)
; Lakha, Bhawanpreet ; Siqueira,
Rodrigo ; Pillai, Aurabindo
On 06/07/2023 15:39, Christian König wrote:
Am 06.07.23 um 15:37 schrieb Shashank Sharma:
On 06/07/2023 15:22, Christian König wrote:
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between d
Am 06.07.23 um 15:37 schrieb Shashank Sharma:
On 06/07/2023 15:22, Christian König wrote:
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific
Am 06.07.23 um 15:33 schrieb Shashank Sharma:
Hey Christian,
On 06/07/2023 15:28, Christian König wrote:
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint
On 06/07/2023 15:22, Christian König wrote:
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
- Intro
Hey Christian,
On 06/07/2023 15:28, Christian König wrote:
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint object for the same, and calculates
GPU space
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint object for the same, and calculates
GPU space offsets for each of these spaces.
V1: Addressed review comme
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
- Introduces MQD handler functions for the usermode qu
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
This patch adds:
- A new IOCTL function to create and destroy
- A new structure to keep all the user queue data in one place.
- A function to generate unique index for the queue.
V1: Worked on review comments from RFC patch series:
- Alex: Keep a
Am 06.07.23 um 14:49 schrieb Saleemkhan Jamadar:
add session context buffer to decoder ring test.
v3 - indent and v2 changes correction. (Christian)
v2 - put the buffer at the end of the IB (Christian)
Signed-off-by: Saleemkhan Jamadar
Acked-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgp
add session context buffer to decoder ring test.
v3 - indent and v2 changes correction. (Christian)
v2 - put the buffer at the end of the IB (Christian)
Signed-off-by: Saleemkhan Jamadar
Acked-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 13 +++--
drivers/gpu/drm/amd/amdg
Am 06.07.23 um 14:35 schrieb Shashank Sharma:
This patch adds skeleton code for amdgpu usermode queue.
It contains:
- A new files with init functions of usermode queues.
- A queue context manager in driver private data.
V1: Worked on design review comments from RFC patch series:
(https://patchwo
It has been observed that the MES FW needs 250-300us to map the gfx
userqueue, and if the user rings the doorbell before this duration,
the FW never recognizes the work. This patch adds the delay of 300
us after the queue mapping.
V1: Moved the delay from userspace IOCTL to kernel (Alex).
Cc: Ale
This patch adds code to cleanup any leftover userqueues which
a user might have missed to destroy due to a crash or any other
programming error.
Cc: Alex Deucher
Cc: Christian Koenig
Suggested-by: Bas Nieuwenhuizen
Signed-off-by: Bas Nieuwenhuizen
Signed-off-by: Shashank Sharma
---
drivers/g
To support oversubscription, MES FW expects WPTR BOs to
be mapped into GART, before they are submitted to usermode
queues. This patch adds a function for the same.
V4: fix the wptr value before mapping lookup (Bas, Christian).
V5: Addressed review comments from Christian:
- Either pin object o
The userspace sends us the doorbell object and the relative doobell
index in the object to be used for the usermode queue, but the FW
expects the absolute doorbell index on the PCI BAR in the MQD. This
patch adds a function to convert this relative doorbell index to
absolute doorbell index.
This p
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW related work.
This patch creates a joint object for the same, and calculates
GPU space offsets for each of these spaces.
V1: Addressed review comments on RFC patch:
Alex: Make this function I
This patch adds new functions to map/unmap a usermode queue into
the FW, using the MES ring. As soon as this mapping is done, the
queue would be considered ready to accept the workload.
V1: Addressed review comments from Alex on the RFC patch series
- Map/Unmap should be IP specific.
V2:
From: Alex Deucher
This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work queue for it. The
output of this UAPI is a queue id.
This UAPI maps the queue into GPU, so the graphics app can s
A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.
This patch:
- Introduces MQD handler functions for the usermode queues.
- Adds new functions to create and destroy
This patch adds skeleton code for amdgpu usermode queue.
It contains:
- A new files with init functions of usermode queues.
- A queue context manager in driver private data.
V1: Worked on design review comments from RFC patch series:
(https://patchwork.freedesktop.org/series/112214/)
- Alex: Keep
This patch adds:
- A new IOCTL function to create and destroy
- A new structure to keep all the user queue data in one place.
- A function to generate unique index for the queue.
V1: Worked on review comments from RFC patch series:
- Alex: Keep a list of queues, instead of single queue per proce
This patch series introduces AMDGPU usermode queues for gfx workloads.
Usermode queues is a method of GPU workload submission into the graphics
hardware without any interaction with kernel/DRM schedulers. In this
method, a userspace graphics application can create its own workqueue
and submit it di
Why:
If the reg mmMP1_SMN_C2PMSG_90 is being programed to 0x0 before
guest initialization, then modprobe amdgpu will fail at smu hw_init.
(the default mmMP1_SMN_C2PMSG_90 at a clean guest environment is 0x1).
How to fix:
this patch is to check whether smu is idle by sending a test
message to smu.
Am 06.07.23 um 10:35 schrieb Guchun Chen:
In below thousands of screen rotation loop tests with virtual display
enabled, a CPU hard lockup issue may happen, leading system to unresponsive
and crash.
do {
xrandr --output Virtual --rotate inverted
xrandr --output Virtual --rotate r
Am 06.07.23 um 11:23 schrieb Guchun Chen:
Due to a coding typo.
Signed-off-by: Guchun Chen
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
b/drivers/gpu/drm/amd/amdgp
On 7/5/23 20:07, Aurabindo Pillai wrote:
> From: Wesley Chalmers
>
> [WHY]
> Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a
> pipe commit can cause underflow.
>
> [HOW]
> Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets
> optimized_required.
>
> Thi
Configure SQ watchdog timer setting.
Signed-off-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 38 +
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 9e3b835bdbb2..590b0fa62
Due to a coding typo.
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
index 70fb0df039e3..2a318c6d2cdf 100644
--- a/drivers/gpu/drm/am
[AMD Official Use Only - General]
Hi Christian & Leo,
Sorry, missed Leo's email.
Currently SR-IOV VF doesn't have suspend/resume use case and this code is in
vcn_v4_0_start_sriov() which will only called by SR-IOV code path. So currently
we will not hit the suspend/resume issue even with this
In below thousands of screen rotation loop tests with virtual display
enabled, a CPU hard lockup issue may happen, leading system to unresponsive
and crash.
do {
xrandr --output Virtual --rotate inverted
xrandr --output Virtual --rotate right
xrandr --output Virtual --rotat
The files drivers/net/virtio_net.c,
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c, and io_uring/io_uring.c were
modified to fix warnings.
Specifically, the opportunities for max() and min() were utilized to address
the warnings.
Signed-off-by: Yang Rong
---
drivers/gpu/drm/amd/display/dc/dc_dm
Since this patch was already pushed please revert it until we have a
technical consent on why this should be necessary.
Regards,
Christian.
Am 05.07.23 um 21:57 schrieb Leo Liu:
What Christian says is correct, esp. during the playback or encode,
when suspend/resume happens, it will save the FW
[Why & How]
It's useful to be able to enable DPIA trace with dcdebugmask
option, especially to debug DPIA issues involved in transition
of system power states.
This patch adds an option to amdgpu.dcdebugmask to be picked up
by amdgpu DM to enable DPIA trace.
Signed-off-by: Stylon Wang
---
drive
79 matches
Mail list logo
