Acked-by: Luben Tuikov
Regards,
Luben
On 2023-04-06 06:13, Tong Liu01 wrote:
> [why]
> regGOLDEN_TSC_COUNT_LOWER/regGOLDEN_TSC_COUNT_UPPER are protected and
> unaccessible under sriov.
> The clock counter high bit may update during reading process.
>
> [How]
> Replace regGOLDEN_TSC_COUNT_LOWER/
On 4/7/2023 00:38, Wenyou Yang wrote:
When the SMT changes on the fly, send the message to the PMFW
to notify the SMT status changed.
Changes in v6
1./ Update last_smt_active only when the return from
smu_set_cpu_smt_enable() successfully.
2./ Use smu->adev->pm.fw_version to check smu version, i
Add some more logging for DP link traning test pattern seqeunces
for better debugging.
Cc: Harry Wentland
Cc: Leo Li
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
.../display/dc/link/protocols/link_dp_training.c | 16
1 file changed, 16 insertions(+)
diff --git a/
Update the driver implementations to fit those data exposed
by PMFW.
Signed-off-by: Evan Quan
Change-Id: I8579f6b22fb586bb52a6c97b8edfc13c493bd484
---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 6 ++
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 4 ++--
drivers/gpu/drm/a
[AMD Official Use Only - General]
Hi,
Anyone can help review this patch? Thanks!
Kind regards,
Esther
-Original Message-
From: Tong Liu01
Sent: 2023年4月6日星期四 下午6:13
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan ; Chen, Horace ; Tuikov,
Luben ; Koenig, Christian ;
Deucher, Alexande
