[AMD Official Use Only]
OK. If that can help the debugging for RAS development, I’m fine with it.
Reviewed-by: Evan Quan
BR
Evan
From: Yang, Stanley
Sent: Monday, December 6, 2021 8:37 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org; Zhang,
Hawking ; Clements, John ; Zhou1,
Tao ; Li, Candic
[AMD Official Use Only]
> -Original Message-
> From: Christian König
> Sent: Tuesday, December 7, 2021 3:03 PM
> To: Quan, Evan ; Deucher, Alexander
>
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu: don't skip runtime pm get on A+A config
>
> You are looking at
otherwise the drm_plane is not released
Signed-off-by: Flora Cui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
index af3a
I can add a default error injection function in amdgpuras_c, if some block
don't define special . ras_error_inject function, it will use default error
injection in amdgpuras_c.
-Original Message-
From: Zhou1, Tao
Sent: Monday, December 6, 2021 3:34 PM
To: Chai, Thomas ; amd-gfx@lists
You are looking at outdated code, that stuff is gone by now.
amd-staging-drm-next probably needs a rebase.
And this code was what the check was initially good for. Just skipping
the PM stuff as well on A+A was unintentionally.
Regards,
Christian.
Am 07.12.21 um 02:58 schrieb Quan, Evan:
[AM
Hi tao:
Thanks for your review. I add another two comments behind your comments,
please review again.
-Original Message-
From: Zhou1, Tao
Sent: Tuesday, December 7, 2021 12:07 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking
Subject: RE: [PATCH V2 03/11] drm
[AMD Official Use Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Stanley.Yang
Sent: Tuesday, December 7, 2021 14:40
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking ;
Clements, John ; Zhou1, Tao ; Li,
Candice ; Chai, Thomas
Cc: Yang, Stanley
Subject: [P
remove in recovery stat check, skip umc ras err cnt
harvest in amdgpu_ras_log_on_err_counter
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/dri
Hi tao:
I add my comments behind your comments. Please review.
-Original Message-
From: Zhou1, Tao
Sent: Monday, December 6, 2021 2:58 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking
Subject: RE: [PATCH V2 03/11] drm/amdgpu: Modify gfx block to fit for the
u
[AMD Official Use Only]
Hi Thomas,
Please see my two comments.
Regards,
Tao
> -Original Message-
> From: Chai, Thomas
> Sent: Tuesday, December 7, 2021 11:37 AM
> To: Zhou1, Tao ; amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking
> Subject: RE: [PATCH V2 03/11] drm/amdgpu: Modify gfx
-Original Message-
From: Zhou1, Tao
Sent: Monday, December 6, 2021 2:57 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking
Subject: RE: [PATCH V2 02/11] drm/amdgpu: Modify the compilation failed problem
when other ras blocks' .h include amdgpu_ras.h
[AMD Official
[AMD Official Use Only]
It seems more jobs(below) other than bumping the runpm counter are performed.
Are they desired also?
r = __dma_resv_make_exclusive(bo->tbo.base.resv);
if (r)
goto out;
bo->prime_shared_count++;
BR
Evan
> -Original Message-
On Mon, Dec 06, 2021 at 05:15:11PM -0500, Alex Deucher wrote:
> Do you have push rights to drm-misc?
No, I am sorry. I have not.
Best regards.
Claudio Suarez.
IIRC, these patches depend on
> the is_hdmi changes that recently went into drm-misc, so these patches
> should probably go upstream v
On Mon, Dec 6, 2021 at 4:36 PM Yann Dirson wrote:
>
> Hi Alex,
>
> > We have not validated virtualization of our integrated GPUs. I don't
> > know that it will work at all. We had done a bit of testing but ran
> > into the same issues with the PSP, but never had a chance to debug
> > further bec
Do you have push rights to drm-misc? IIRC, these patches depend on
the is_hdmi changes that recently went into drm-misc, so these patches
should probably go upstream via drm-misc rather than amdgpu.
Alex
On Mon, Dec 6, 2021 at 5:21 AM Claudio Suarez wrote:
>
>
> Hello,
>
> These patches
>
> htt
Hi Alex,
> We have not validated virtualization of our integrated GPUs. I don't
> know that it will work at all. We had done a bit of testing but ran
> into the same issues with the PSP, but never had a chance to debug
> further because this feature is not productized.
...
> You need a functiona
From: Perry Yuan
[ Upstream commit 2da34b7bb59e1caa9a336e0e20a76b8b6a4abea2 ]
[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI connectio
From: Mustapha Ghaddar
[ Upstream commit 5ceaebcda9061c04f439c93961f0819878365c0f ]
[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.
[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should
From: Perry Yuan
[ Upstream commit 2da34b7bb59e1caa9a336e0e20a76b8b6a4abea2 ]
[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI connectio
From: Mustapha Ghaddar
[ Upstream commit 5ceaebcda9061c04f439c93961f0819878365c0f ]
[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.
[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should
From: Philip Yang
[ Upstream commit 3abfe30d803e62cc75dec254eefab3b04d69219b ]
process_info->lock is used to protect kfd_bo_list, vm_list_head, n_vms
and userptr valid/inval list, svm_range_restore_work and
svm_range_set_attr don't access those, so do not need to take
process_info lock. This wil
From: Perry Yuan
[ Upstream commit 2da34b7bb59e1caa9a336e0e20a76b8b6a4abea2 ]
[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI connectio
From: Mustapha Ghaddar
[ Upstream commit 5ceaebcda9061c04f439c93961f0819878365c0f ]
[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.
[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should
From: Philip Yang
[ Upstream commit 494f2e42ce4a9ddffb5d8c5b2db816425ef90397 ]
drm_gem_object_put calls release_notify callback to free the mem
structure and unreserve_mem_limit, move it down after the last access
of mem and make it conditional call.
Signed-off-by: Philip Yang
Reviewed-by: Fel
From: Flora Cui
[ Upstream commit 1053b9c948e614473819a1a5bcaff6d44e680dcf ]
since vkms support atomic KMS interface
Signed-off-by: Flora Cui
Reviewed-by: Guchun Chen
Acked-by: Alex Deucher
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/d
From: Flora Cui
[ Upstream commit 3e467e478ed3a9701bb588d648d6e0ccb82ced09 ]
Signed-off-by: Flora Cui
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
On Mon, Dec 6, 2021 at 5:29 AM Yann Dirson wrote:
>
> Hello,
>
> Context: trying to understand what happens with my Renoir passed through
> to a Xen domu [0] (starting with the "VCN disabled" because I don't need it
> now (so let's postpone the problem with its _fini) and with "PSP disabled"
> bec
On Sat, Nov 27, 2021 at 11:28 AM wrote:
>
> Hello,
>
> Xen passthrough of a boot GPU those days (at least in the small QubesOS world)
> is mostly tested/documented for Intel iGPUs (or I missed something).
> I've been trying to do that with a Renoir GPU (for context, the goal is
> to have a xen dom
Am 2021-12-03 um 2:18 a.m. schrieb Christian König:
> Well NAK.
>
> We already discussed this and decided to not use any hardware
> acceleration for the debug access.
Conclusions from our offline discussion for the record:
We need amdgpu_ttm_access_memory (e.g. gdb accessing VRAM) for
post-mortem
Device Coherent type uses device memory that is coherently accesible by
the CPU. This could be shown as SP (special purpose) memory range
at the BIOS-e820 memory enumeration. If no SP memory is supported in
system, this could be faked by setting CONFIG_EFI_FAKE_MEMMAP.
Currently, test_hmm only sup
Add two more parameters to set spm_addr_dev0 & spm_addr_dev1
addresses. These two parameters configure the start SP
addresses for each device in test_hmm driver.
Consequently, this configures zone device type as coherent.
Signed-off-by: Alex Sierra
---
v2:
Add more mknods for device coherent type
The intention is to test device coherent type pages that have been
called through get user pages with PIN_LONGTERM flag set.
Signed-off-by: Alex Sierra
---
tools/testing/selftests/vm/Makefile| 2 +-
tools/testing/selftests/vm/hmm-tests.c | 81 ++
2 files changed, 82
Test cases such as migrate_fault and migrate_multiple, were modified to
explicit migrate from device to sys memory without the need of page
faults, when using device coherent type.
Snapshot test case updated to read memory device type first and based
on that, get the proper returned results migrat
Coherent device type memory on VRAM to RAM migration, has similar access
as System RAM from the CPU. This flag sets the source from the sender.
Which in Coherent type case, should be set as
MIGRATE_VMA_SELECT_DEVICE_COHERENT.
Signed-off-by: Alex Sierra
Reviewed-by: Felix Kuehling
---
drivers/gp
new ioctl cmd added to query zone device type. This will be
used once the test_hmm adds zone device coherent type.
Signed-off-by: Alex Sierra
---
lib/test_hmm.c | 14 ++
lib/test_hmm_uapi.h | 8
2 files changed, 22 insertions(+)
diff --git a/lib/test_hmm.c b/lib/test_
Device memory that is cache coherent from device and CPU point of view.
This is used on platforms that have an advanced system bus (like CAPI
or CXL). Any page of a process can be migrated to such memory. However,
no one should be allowed to pin such memory so that it can always be
evicted.
Signed
When CPU is connected throug XGMI, it has coherent
access to VRAM resource. In this case that resource
is taken from a table in the device gmc aperture base.
This resource is used along with the device type, which could
be DEVICE_PRIVATE or DEVICE_COHERENT to create the device
page map region.
Sig
In order to configure device coherent in test_hmm, two module parameters
should be passed, which correspond to the SP start address of each
device (2) spm_addr_dev0 & spm_addr_dev1. If no parameters are passed,
private device type is configured.
Signed-off-by: Alex Sierra
---
lib/test_hmm.c
This patch series introduces MEMORY_DEVICE_COHERENT, a type of memory
owned by a device that can be mapped into CPU page tables like
MEMORY_DEVICE_GENERIC and can also be migrated like
MEMORY_DEVICE_PRIVATE.
Christoph, the suggestion to incorporate Ralph Campbell???s refcount
cleanup patch into ou
Avoid long term pinning for Coherent device type pages. This could
interfere with their own device memory manager.
If caller tries to get user device coherent pages with PIN_LONGTERM flag
set, those pages will be migrated back to system memory.
Signed-off-by: Alex Sierra
---
mm/gup.c | 32 ++
This case is used to migrate pages from device memory, back to system
memory. Device coherent type memory is cache coherent from device and CPU
point of view.
Signed-off-by: Alex Sierra
---
v2:
condition added when migrations from device coherent pages.
---
include/linux/migrate.h | 1 +
mm/migr
Am 2021-12-02 um 2:19 p.m. schrieb Alex Deucher:
> This adds a new IOCTL currently used to implement querying
> and setting the stable power state for GPU profiling. The
> stable pstates use fixed clocks and disable certain power
> features in order to get accurate pipeline profiling.
>
> Currentl
[Public]
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Flora Cui
Sent: Monday, December 6, 2021 1:34 AM
To: =guchun.c...@amd.com <=guchun.c...@amd.com>; Yuan, Perry
; Shi, Leslie ;
amd-gfx@lists.freedesktop.org
Cc: Shi, Leslie ; Cui, Flora
Subject: [
[Public]
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Hawking
Zhang
Sent: Saturday, December 4, 2021 6:24 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking
Subject: [PATCH] drm/amdgpu: don't override default ECO_BITs setting
Leave this bit as h
On Mon, Dec 6, 2021 at 5:23 AM Le Ma wrote:
>
> From: Le Ma
>
> should count on GC IP base address
>
> Signed-off-by: Le Ma
> Signed-off-by: Hawking Zhang
> Reviewed-by: Hawking Zhang
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
> 1 file changed, 2 inser
[Public]
Hi all,
This week this patchset was tested on the following systems:
Lenovo Thinkpad T14s Gen2 with AMD Ryzen 5 5650U, with the following display
types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C
to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP t
Am 06.12.21 um 14:23 schrieb Lazar, Lijo:
On 12/6/2021 5:42 PM, Christian König wrote:
Am 06.12.21 um 12:36 schrieb Lazar, Lijo:
On 12/6/2021 4:52 PM, Christian König wrote:
Am 06.12.21 um 11:56 schrieb Lazar, Lijo:
On 12/5/2021 2:53 PM, Christian König wrote:
Am 03.12.21 um 17:13 schrieb Al
On 12/6/2021 5:42 PM, Christian König wrote:
Am 06.12.21 um 12:36 schrieb Lazar, Lijo:
On 12/6/2021 4:52 PM, Christian König wrote:
Am 06.12.21 um 11:56 schrieb Lazar, Lijo:
On 12/5/2021 2:53 PM, Christian König wrote:
Am 03.12.21 um 17:13 schrieb Alex Deucher:
On Fri, Dec 3, 2021 at 7:15
Hi Evan,
The error prompts in function smu_cmn_send_smc_msg_with_param do not cover all
failed cases since it only prints reg stat SMU_RESP_NONE,
SMU_RESP_BUSY_OTHER or response -EREMOTEIO. I think it is better update reg
error stat judgment conditions to print more error msg.
Regards,
Stanley
Am 06.12.21 um 12:36 schrieb Lazar, Lijo:
On 12/6/2021 4:52 PM, Christian König wrote:
Am 06.12.21 um 11:56 schrieb Lazar, Lijo:
On 12/5/2021 2:53 PM, Christian König wrote:
Am 03.12.21 um 17:13 schrieb Alex Deucher:
On Fri, Dec 3, 2021 at 7:15 AM Christian König
wrote:
Am 02.12.21 um 20:19
[AMD Official Use Only]
Hi Hawking,
A new function is defined in this patch, but it has not been used.
I am not sure whether this separate patch will generate a warning or whether it
can be directly merged into patch-2 ?
and the "(u8 *)" is not necessary for this case, discard or using (void *)
On 12/6/2021 4:52 PM, Christian König wrote:
Am 06.12.21 um 11:56 schrieb Lazar, Lijo:
On 12/5/2021 2:53 PM, Christian König wrote:
Am 03.12.21 um 17:13 schrieb Alex Deucher:
On Fri, Dec 3, 2021 at 7:15 AM Christian König
wrote:
Am 02.12.21 um 20:19 schrieb Alex Deucher:
This adds a new
Am 06.12.21 um 11:56 schrieb Lazar, Lijo:
On 12/5/2021 2:53 PM, Christian König wrote:
Am 03.12.21 um 17:13 schrieb Alex Deucher:
On Fri, Dec 3, 2021 at 7:15 AM Christian König
wrote:
Am 02.12.21 um 20:19 schrieb Alex Deucher:
This adds a new IOCTL currently used to implement querying
and se
On 12/5/2021 2:53 PM, Christian König wrote:
Am 03.12.21 um 17:13 schrieb Alex Deucher:
On Fri, Dec 3, 2021 at 7:15 AM Christian König
wrote:
Am 02.12.21 um 20:19 schrieb Alex Deucher:
This adds a new IOCTL currently used to implement querying
and setting the stable power state for GPU pro
The runtime PM get was incorrectly added after the check.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index ae6ab93c
Hello,
Context: trying to understand what happens with my Renoir passed through
to a Xen domu [0] (starting with the "VCN disabled" because I don't need it
now (so let's postpone the problem with its _fini) and with "PSP disabled"
because the alternative issue seems easier to solve -- so ip_block_
[AMD Official Use Only]
Ping.. for the patch series.
> -Original Message-
> From: Quan, Evan
> Sent: Friday, December 3, 2021 11:06 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Lazar, Lijo ; Feng,
> Kenneth ; Quan, Evan
> Subject: [PATCH V4 17/
On 12/06/ , Lazar, Lijo wrote:
>
>
> On 12/6/2021 2:14 PM, Lang Yu wrote:
> > On 12/06/ , Lazar, Lijo wrote:
> > >
> > >
> > > On 12/6/2021 12:18 PM, Yu, Lang wrote:
> > > > [Public]
> > > >
> > > > A typo.
> > > >
> > > > > -Original Message-
> > > > > From: Yu, Lang
> > > > > Sent:
On 12/6/2021 12:18 PM, Yu, Lang wrote:
[Public]
A typo.
-Original Message-
From: Yu, Lang
Sent: Monday, December 6, 2021 2:47 PM
To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Huang, Ray
Subject: RE: [PATCH 2/2] drm/amdgpu: allow APU to send power gate mes
Signed-off-by: Flora Cui
Reviewed-by: Leslie Shi
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
index 6c62c45e3e3e..acc2d31ea93f 100644
--- a/d
On 12/06/ , Lazar, Lijo wrote:
>
>
> On 12/6/2021 12:18 PM, Yu, Lang wrote:
> > [Public]
> >
> > A typo.
> >
> > > -Original Message-
> > > From: Yu, Lang
> > > Sent: Monday, December 6, 2021 2:47 PM
> > > To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
> > > Cc: Deucher, Alexander ; Hu
On 12/6/2021 8:19 AM, Yu, Lang wrote:
[Public]
-Original Message-
From: Lazar, Lijo
Sent: Friday, December 3, 2021 5:52 PM
To: Yu, Lang ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Huang, Ray
Subject: Re: [PATCH 2/2] drm/amdgpu: allow APU to send power gate message
wh
[Public]
>-Original Message-
>From: Lazar, Lijo
>Sent: Friday, December 3, 2021 5:52 PM
>To: Yu, Lang ; amd-gfx@lists.freedesktop.org
>Cc: Deucher, Alexander ; Huang, Ray
>
>Subject: Re: [PATCH 2/2] drm/amdgpu: allow APU to send power gate message
>when dpm is disabled
>
>
>
>On 12/3/20
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index 6e781cee8bb6..e0a8224e466f 100644
-
[AMD Official Use Only]
Please see my comments inline.
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, December 1, 2021 6:53 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Chai,
> Thomas
> Subject: [PATCH V2 03/11] drm/amdgpu: Mo
[AMD Official Use Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, December 1, 2021 6:53 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Chai,
> Thomas
> Subject: [PATCH V2 02/11] drm/amdgpu: Modify the compilation failed pr
[Public]
>-Original Message-
>From: Lazar, Lijo
>Sent: Monday, December 6, 2021 11:41 AM
>To: Yu, Lang ; amd-gfx@lists.freedesktop.org
>Cc: Deucher, Alexander ; Huang, Ray
>
>Subject: Re: [PATCH 2/2] drm/amdgpu: allow APU to send power gate message
>when dpm is disabled
>
>
>
>On 12/6/2
[AMD Official Use Only]
The error injection has no difference among RAS blocks except GFX and XGMI.
I agree to move the xgmi error injection to amdgpu_xgmi.c, but I don't think
it's necessary to implement specific error injection functions for all other
RAS blocks.
Regards,
Tao
> -Original
Signed-off-by: Flora Cui
Reviewed-by: Leslie Shi
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
index acc2d31ea93f..af3a2f8c12b4
[AMD Official Use Only]
Hi Stanley,
There is already error prompts in the smu_cmn_send_smc_msg_with_param() used by
the API mentioned below.
Can that cover your use case?
BR
Evan
> -Original Message-
> From: Stanley.Yang
> Sent: Sunday, December 5, 2021 6:02 PM
> To: amd-gfx@lists.free
[Public]
A typo.
>-Original Message-
>From: Yu, Lang
>Sent: Monday, December 6, 2021 2:47 PM
>To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
>Cc: Deucher, Alexander ; Huang, Ray
>
>Subject: RE: [PATCH 2/2] drm/amdgpu: allow APU to send power gate message
>when dpm is disabled
>
>[Public]
[AMD Official Use Only]
It's better to loop @Clements, John for the code review.
Regards,
Tao
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, December 1, 2021 6:53 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Chai,
> Thomas
>
On 12/6/2021 2:14 PM, Lang Yu wrote:
On 12/06/ , Lazar, Lijo wrote:
On 12/6/2021 12:18 PM, Yu, Lang wrote:
[Public]
A typo.
-Original Message-
From: Yu, Lang
Sent: Monday, December 6, 2021 2:47 PM
To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Huang, Ra
[AMD Official Use Only]
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: Friday, December 3, 2021 3:19 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [RFC PATCH 1/2] drm/amdgpu/UAPI: add new PROFILE IOCTL
>
> This adds a new IOCTL cu
Am 03.12.21 um 17:13 schrieb Alex Deucher:
On Fri, Dec 3, 2021 at 7:15 AM Christian König
wrote:
Am 02.12.21 um 20:19 schrieb Alex Deucher:
This adds a new IOCTL currently used to implement querying
and setting the stable power state for GPU profiling. The
stable pstates use fixed clocks and
in case they are not avaiable in early phase
Signed-off-by: Hawking Zhang
Reviewed-by: Le Ma
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c | 19 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 5 +
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 11 +++
drivers/gpu/drm/amd
From: Le Ma
should count on GC IP base address
Signed-off-by: Le Ma
Signed-off-by: Hawking Zhang
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/d
Leave this bit as hardware default setting
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 1 -
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/m
Hello,
These patches
https://www.mail-archive.com/amd-gfx@lists.freedesktop.org/msg69247.html
are not uploaded to the linux source. I suppose I have to ping here.
Best regards,
Claudio Suarez.
On Mon, Oct 18, 2021 at 09:37:13AM -0400, Harry Wentland wrote:
> On 2021-10-17 07:34, Claudio S
read and authenticate ip discovery binary getting from
vram first, if it is not valid, read and authenticate
the one getting from file
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 46 +--
1 file changed, 23 insertions
read and authenticate ip discovery binary getting from
vram first, if it is not valid, read and authenticate
the one getting from file
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 44 +--
1 file changed, 20 insertions
To be used to check ip discovery binary signature
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdg
add _from_vram in the funciton name to diffrentiate
the one used to read from file
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_d
[AMD Official Use Only]
Please ignore this one (patch #4). Will send out a new one based on latest code.
Regards,
Hawking
-Original Message-
From: Zhang, Hawking
Sent: Saturday, December 4, 2021 18:21
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking
Subject: [PATCH 4/4] drm/amdgpu
To be used when ip_discovery binary is not carried by vbios
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discover
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