After defer the execution of gfx/compute ib tests. However, at that time, the
gfx already go into "mid state" of gfxoff.
PWR_MISC_CNTL_STATUS: PWR_GFXOFF_STATUS field (2:1 bits)
0 = GFXOFF.
1 = Transition out of GFXOFF state.
2 = Not in GFXOFF.
3 = Transition into GFXOFF.
If hit the mid state (1
Reviewed-by: Rex Zhu
Best Regards
Rex
From: amd-gfx on behalf of Alex Deucher
Sent: Friday, June 1, 2018 1:48 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu/pp: switch the default dpm implementation for CI
Switch ha
On Thu, May 24, 2018 at 02:46:34PM -0500, Alex Deucher wrote:
> This reverts commit 13b40935cf64f59b93cf1c716a2033488e5a228c.
>
> This was a workaround for a bug in the HDA driver that prevented
> the HDA audio chip from going into runtime pm which prevented
> the GPU from going into runtime pm.
>
On Thu, May 31, 2018 at 12:48:19PM -0500, Alex Deucher wrote:
> Switch hawaii and bonaire to use powerplay rather than the old
> dpm implementation. Powerplay supports more features and is
> better maintained. Ultimately, we can drop the older dpm
> implementation like we did for other older asic
On Wed, May 30, 2018 at 12:41 PM, Colin King wrote:
> From: Colin Ian King
>
> The comparison with the number of elements in array df_v3_7_channel_number
> is off-by-one and can produce an array out-of-bounds read if
> fb_channel_number is equal to the number of elements of the array. Fix
> this
Hi Dave,
Fixes for 4.18. Highlights:
- Improve DC/powerplay interface to allow additional power savings on vega
- DP 1.4 compliance fixes
- Various vega20 fixes
- Fix for DC scale ratios
- Per vm bo fixes
- Scheduler dependency corner case fix
- Misc bug fixes
The following changes since commit d
Hi Dave,
Two last minute DC fixes for 4.17. A fix for underscan on fiji and
a fix for gamma settings getting after dpms.
The following changes since commit 0e333751cff1dd7383be15372960a1be6e2b4e47:
Merge tag 'drm-misc-fixes-2018-05-30' of
git://anongit.freedesktop.org/drm/drm-misc into drm-f
Am 30.05.2018 um 18:03 schrieb Harry Wentland:
On 2018-05-30 06:17 AM, Shirish S wrote:
This patch fixes the warning messages that are caused due to calling
sleep in atomic context as below:
BUG: sleeping function called from invalid context at mm/slab.h:419
in_atomic(): 1, irqs_disabled(): 1,
On 05/31/2018 01:04 PM, Michel Dänzer wrote:
On 2018-05-31 06:49 PM, Leo Liu wrote:
On 05/31/2018 12:47 PM, Michel Dänzer wrote:
On 2018-05-31 06:39 PM, Leo Liu wrote:
On 05/31/2018 12:30 PM, Michel Dänzer wrote:
On 2018-05-30 08:42 PM, Leo Liu wrote:
diff --git a/drivers/gpu/drm/amd/amdgp
On 2018-05-31 10:33 AM, Alex Deucher wrote:
> It's required for displays on Raven. The DCN bandwidth calcs use
> floating point, but DCN is APU only and it already depends on
> X86.
>
> Signed-off-by: Alex Deucher
Series is
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/displ
On 2018-05-31 12:08 PM, Michel Dänzer wrote:
> On 2018-05-31 04:33 PM, Alex Deucher wrote:
>> It's required for displays on Raven. The DCN bandwidth calcs use
>> floating point, but DCN is APU only and it already depends on
>> X86.
>>
>> Signed-off-by: Alex Deucher
>> ---
>> drivers/gpu/drm/amd/
From: David Francis
When the underscan state was changed, atomic-check was triggering a
validation but passing the old underscan values. This change adds a
somewhat hacky check in dm_update_crtcs_state that will update the
stream if old and newunderscan values are different.
This was causing 4k
Switch hawaii and bonaire to use powerplay rather than the old
dpm implementation. Powerplay supports more features and is
better maintained. Ultimately, we can drop the older dpm
implementation like we did for other older asics.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/cik.c
On 2018-05-31 06:49 PM, Leo Liu wrote:
> On 05/31/2018 12:47 PM, Michel Dänzer wrote:
>> On 2018-05-31 06:39 PM, Leo Liu wrote:
>>> On 05/31/2018 12:30 PM, Michel Dänzer wrote:
On 2018-05-30 08:42 PM, Leo Liu wrote:
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> b/drivers/gpu/
On 05/31/2018 12:47 PM, Michel Dänzer wrote:
On 2018-05-31 06:39 PM, Leo Liu wrote:
On 05/31/2018 12:30 PM, Michel Dänzer wrote:
On 2018-05-30 08:42 PM, Leo Liu wrote:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 12f0d18c6ee8..343ff115cff
On 05/31/2018 12:39 PM, Leo Liu wrote:
On 05/31/2018 12:30 PM, Michel Dänzer wrote:
On 2018-05-30 08:42 PM, Leo Liu wrote:
There are four ioctls in this files, and DOC gives details of
data structures for each of ioctls, and their functionalities.
Signed-off-by: Leo Liu
This isn't enough
On 2018-05-31 06:39 PM, Leo Liu wrote:
> On 05/31/2018 12:30 PM, Michel Dänzer wrote:
>> On 2018-05-30 08:42 PM, Leo Liu wrote:
>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
>>> index 12f0d18c6ee8..343ff115cff1 100644
>>> --- a/drivers/gpu/d
On 05/31/2018 12:30 PM, Michel Dänzer wrote:
On 2018-05-30 08:42 PM, Leo Liu wrote:
There are four ioctls in this files, and DOC gives details of
data structures for each of ioctls, and their functionalities.
Signed-off-by: Leo Liu
This isn't enough to actually make this part of the generat
On 2018-05-30 08:42 PM, Leo Liu wrote:
> There are four ioctls in this files, and DOC gives details of
> data structures for each of ioctls, and their functionalities.
>
> Signed-off-by: Leo Liu
This isn't enough to actually make this part of the generated
documentation. It needs to be hooked up
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
Documentation/gpu/amdgpu.rst | 6 ++
Documentation/gpu/drivers.rst | 1 +
2 files changed, 7 insertions(+)
create mode 100644 Documentation/gpu/amdgpu.rst
diff --git a/Documentation/gpu/amdgpu.rst b/Documentation/gpu/amdgpu.rst
new fil
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
Documentation/gpu/amdgpu.rst | 14 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 119 ++
2 files changed, 133 insertions(+)
diff --git a/Documentation/gpu/amdgpu.rst b/Documentation/gpu/amdgpu.rst
index 41
From: Michel Dänzer
So that it can be referenced from e.g. DOC comments.
Signed-off-by: Michel Dänzer
---
Documentation/gpu/drm-mm.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst
index 96ebcc2a7b41..21b6b72a9ba8 100644
--- a
On 05/31/2018 11:43 AM, Alex Deucher wrote:
On Wed, May 30, 2018 at 2:42 PM, Leo Liu wrote:
There are four ioctls in this files, and DOC gives details of
data structures for each of ioctls, and their functionalities.
Signed-off-by: Leo Liu
A few comments below about readability. With thos
On 2018-05-31 04:33 PM, Alex Deucher wrote:
> It's required for displays on Raven. The DCN bandwidth calcs use
> floating point, but DCN is APU only and it already depends on
> X86.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/display/Kconfig | 1 +
> 1 file changed, 1 insertion(
On Wed, May 30, 2018 at 2:42 PM, Leo Liu wrote:
> There are four ioctls in this files, and DOC gives details of
> data structures for each of ioctls, and their functionalities.
>
> Signed-off-by: Leo Liu
A few comments below about readability. With those fixed:
Reviewed-by: Alex Deucher
> ---
Ping?
These patches worked around a regression in the hda driver which has
since been fixed.
On Thu, May 24, 2018 at 3:46 PM, Alex Deucher wrote:
> This reverts commit 13b40935cf64f59b93cf1c716a2033488e5a228c.
>
> This was a workaround for a bug in the HDA driver that prevented
> the HDA audio ch
On 2018-05-31 09:19 AM, David Francis wrote:
> A few register addresses were declared in
> amd/display/dc/dce*/dce*_resource.c.
>
> They have been consolidated with the appropriate
> master list of registers in
> amd/include/asic_reg/dce/...
>
> This will make them accessible to external tools
It's required for displays on Raven. The DCN bandwidth calcs use
floating point, but DCN is APU only and it already depends on
X86.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/Kconfig
b/driv
Just enable it always. This was leftover from feature
bring up.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/Kconfig| 10 --
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 5 +
drive
From: Eric Bernstein
Number of OPPs to be instantiated is based on number
of timing generators, not number of pipes.
Signed-off-by: Eric Bernstein
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/
From: Mikita Lipski
Initially FBC would be initialized if display's edid was correct
and all the modes acquired from it, but n case when edid is corrupted
or non-existant we must still initialize FBC.
Signed-off-by: Mikita Lipski
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/g
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/modules/stats/stats.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/modules/stats/stats.c
b/drivers/gpu/drm/amd/disp
From: Krunoslav Kovac
Signed-off-by: Krunoslav Kovac
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 ++-
drivers/gpu/drm/amd/display/dc/dc_stream.h| 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/
We'd like to use some of them in dc_link_ddc and amdgpu_dm and should
have them available in dc_ddc_types.h.
Signed-off-by: Harry Wentland
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc_ddc_types.h | 59 +++
.../drm/amd/display/dc/i2caux/
From: "Leo (Sunpeng) Li"
This fixes issues where color management properties don't persist
over DPMS on/off, or when the CRTC is moved across connectors.
Signed-off-by: Leo (Sunpeng) Li
Reviewed-by: Harry Wentland
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.
From: Krunoslav Kovac
Signed-off-by: Harry Wentland
Signed-off-by: Krunoslav Kovac
Reviewed-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dc/dc_stream.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h
b/drivers/gpu/drm/amd/display/dc/dc_st
From: Krunoslav Kovac
Signed-off-by: Harry Wentland
Signed-off-by: Krunoslav Kovac
Reviewed-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_enc
From: Krunoslav Kovac
Signed-off-by: Harry Wentland
Signed-off-by: Krunoslav Kovac
Reviewed-by: Anthony Koo
---
.../drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_h
From: Eric Bernstein
Remove setting DP_DB_DISABLE to avoid issues when changing
bit depth after vbios take over.
Refactor code to perform single register update for both
pixel encoding and component depth fields.
Signed-off-by: Eric Bernstein
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
-
From: Alvin lee
Signed-off-by: Alvin lee
Reviewed-by: Jun Lei
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 1 +
drivers/gpu/drm/amd/display/dc/core/dc_sink.c | 4
drivers/gpu/drm/amd/display/dc/dc.h | 6 +-
drivers/gpu/drm/amd/display/dc/dc_t
From: Vitaly Prosyak
It is used when curve register settings are generated
by 'matlab', i.e. bypass color module calculation.
Signed-off-by: Vitaly Prosyak
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 6 +-
1 file changed, 5 insertions(+), 1
From: Mikita Lipski
Extract edid's checksum and send it back for verification if EDID_TEST
is requested.
Also added a flag for EDID checksum write in TEST_RESPONSE structure,
and simple spelling fix.
Signed-off-by: Mikita Lipski
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../amd/d
From: SivapiriyanKumarasamy
Signed-off-by: SivapiriyanKumarasamy
Reviewed-by: Tony Cheng
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/displa
From: "Leo (Sunpeng) Li"
For cases where the CRTC is inactive (DPMS off), where a modeset is not
required, yet the CRTC is still in the atomic state, we should not
attempt to update anything on it.
Previously, we were relying on the modereset_required() helper to check
the above condition. Howev
From: Eric Bernstein
Update stream encoder based on feedback from HW team.
Signed-off-by: Eric Bernstein
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../display/dc/dcn10/dcn10_stream_encoder.c | 30 +--
1 file changed, 1 insertion(+), 29 deletions(-)
diff --git a/
From: Mikita Lipski
Provide the connector with a single fail-safe mode of 640x480 for CTS
tests instead of providing a list of possible base modes.
Signed-off-by: Mikita Lipski
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
1
From: David Francis
When the underscan state was changed, atomic-check was triggering a
validation but passing the old underscan values. This change adds a
somewhat hacky check in dm_update_crtcs_state that will update the
stream if old and newunderscan values are different.
This was causing 4k
* Fix underscan validation in atomic_check (David)
* Fix BUG_ON during CRTC atomic check update (Leo)
* Apply color properties after DPMS changes (Leo)
* Bunch of DP CTS fixes (Mikita)
Alex, can you pull the following into 4.17 fixes?
drm/amd/display: Make atomic-check validate underscan cha
A few register addresses were declared in
amd/display/dc/dce*/dce*_resource.c.
They have been consolidated with the appropriate
master list of registers in
amd/include/asic_reg/dce/...
This will make them accessible to external tools that
need direct asic register access
Signed-off-by: David Fra
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Feifei Xu
Sent: Thursday, May 31, 2018 9:10:56 AM
To: amd-gfx@lists.freedesktop.org
Cc: Xu, Feifei
Subject: [PATCH] drm/gfx9: Update gc goldensetting for vega20.
Update mmCB_DCC_CONFIG register goldensetting
Update mmCB_DCC_CONFIG register goldensetting.
Signed-off-by: Feifei Xu
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index eb50d86..3647729
On 2018-05-31 05:59 AM, Shirish S wrote:
> This patch fixes the warning messages that are caused due to calling
> sleep in atomic context as below:
>
> BUG: sleeping function called from invalid context at mm/slab.h:419
> in_atomic(): 1, irqs_disabled(): 1, pid: 5, name: kworker/u4:0
> CPU: 1 PID:
All of the V2 patches are:
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Shirish S
Sent: Thursday, May 31, 2018 5:59:24 AM
To: amd-gfx@lists.freedesktop.org; Wentland, Harry
Cc: S, Shirish
Subject: [PATCH] drm/amd/display: avoid sleeping in atomic conte
This patch replaces kzalloc's flag from GFP_KERNEL to
GFP_ATOMIC to avoid sleeping in atomic context.
Below is the stack trace:
BUG: sleeping function called from invalid context at mm/slab.h:***
in_atomic(): 1, irqs_disabled(): 0, pid: 1137, name: DrmThread
CPU: 1 PID: 1137 Comm: DrmThread Taint
mutex's lead to sleeps which should be avoided in
atomic context.
Hence this patch replaces it with the spin_locks.
Below is the stack trace:
BUG: sleeping function called from invalid context at kernel/locking/mutex.c:**
in_atomic(): 1, irqs_disabled(): 1, pid: 89, name: kworker/u4:3
CPU: 1 PID:
This patch replaces usage of mutex with spin_lock
to avoid sleep in atomic context.
Below is the stack trace:
BUG: sleeping function called from invalid context at kernel/locking/mutex.c:**
in_atomic(): 1, irqs_disabled(): 1, pid: 5, name: kworker/u4:0
CPU: 1 PID: 5 Comm: kworker/u4:0 Tainted: G
This patch replaces kzalloc's flag from GFP_KERNEL to
GFP_ATOMIC to avoid sleeping in atomic context.
Below is the stack trace:
BUG: sleeping function called from invalid context at mm/slab.h:***
in_atomic(): 1, irqs_disabled(): 0, pid: 1137, name: DrmThread
CPU: 1 PID: 1137 Comm: DrmThread Taint
This patch fixes the warning messages that are caused due to calling
sleep in atomic context as below:
BUG: sleeping function called from invalid context at mm/slab.h:419
in_atomic(): 1, irqs_disabled(): 1, pid: 5, name: kworker/u4:0
CPU: 1 PID: 5 Comm: kworker/u4:0 Tainted: GW 4.14.
On 5/30/2018 9:33 PM, Harry Wentland wrote:
On 2018-05-30 06:17 AM, Shirish S wrote:
This patch fixes the warning messages that are caused due to calling
sleep in atomic context as below:
BUG: sleeping function called from invalid context at mm/slab.h:419
in_atomic(): 1, irqs_disabled(): 1, p
On 5/30/2018 9:10 PM, Christian König wrote:
Keep in mind that under SRIOV you can read registers while in atomic
context, e.g. while holding a spinlock.
Please double check if that won't bite us.
Apart from that the change looks good to me,
Thanks Christian, i verified boot, s3, s5 on Ston
On 5/30/2018 8:51 PM, Deucher, Alexander wrote:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Shirish S
Sent: Wednesday, May 30, 2018 6:20 AM
To: amd-gfx@lists.freedesktop.org; Wentland, Harry
; Zhu, Rex
Cc: S, Shirish
Subject: [PATCH] dr
On 5/30/2018 8:51 PM, Deucher, Alexander wrote:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Shirish S
Sent: Wednesday, May 30, 2018 6:19 AM
To: amd-gfx@lists.freedesktop.org; Wentland, Harry
; Zhu, Rex
Cc: S, Shirish
Subject: [PATCH] dr
Am 30.05.2018 um 21:54 schrieb Andrey Grodzovsky:
Dying process might be blocked from receiving any more signals
so avoid using it.
Also retire enity->fini_status and just check the SW queue,
if it's not empty do the fallback cleanup.
Also handle entity->last_scheduled == NULL use case which
ha
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