Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
________________________________
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of Feifei Xu
<feifei...@amd.com>
Sent: Thursday, May 31, 2018 9:10:56 AM
To: amd-gfx@lists.freedesktop.org
Cc: Xu, Feifei
Subject: [PATCH] drm/gfx9: Update gc goldensetting for vega20.
Update mmCB_DCC_CONFIG register goldensetting.
Signed-off-by: Feifei Xu <feifei...@amd.com>
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index eb50d86..3647729 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -112,6 +112,7 @@ static const struct soc15_reg_golden
golden_settings_gc_9_0_vg10[] =
static const struct soc15_reg_golden golden_settings_gc_9_0_vg20[] =
{
+ SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_DCC_CONFIG, 0x0f000080, 0x04000080),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_2, 0x0f000000,
0x0a000000),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL_3, 0x30000000,
0x10000000),
SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0xf3e777ff,
0x22014042),
--
2.7.4
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