CPU overhead is increased a bit, but we can optimize it later, the
series is Reviewed-by: Chunming Zhou
On 2018年05月17日 17:49, Christian König wrote:
Move all BOs belonging to a VM on the LRU with every submission.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |
error: uninitialized symbol ''
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c | 24 +-
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 3 ++-
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 6 ++
3 files changed, 14 insertion
Hi Christian,
Yes, it has already one rcu_barrier, but it has called twice call_rcu, so
the one rcu_barrier just could barrier one call_rcu some time.
After I added another rcu_barrier, the kernel issue will disappear.
Best Wishes,
Emily Deng
> -Original Message-
> From: Christi
Patch 9667849bbb8d: "drm/amd/powerplay: add control gfxoff enabling in late
init" from Mar 13, 2018, leads to the following static checker warning:
drivers/gpu/drm/amd/amdgpu/../powerplay/amd_powerplay.c:194
pp_late_init()
error: we previously assumed 'hwmgr' could be null (see lin
On Thu, 2018-05-10 at 19:33 -0400, Jan Vesely wrote:
> Close the file descriptors under lock as well.
>
> Signed-off-by: Jan Vesely
> ---
> amdgpu/amdgpu_device.c | 11 +++
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
Reviewed-by: James Zhu
On 2018-05-17 06:36 PM, Alex Deucher wrote:
Take the encode rings into account in the idle work handler.
v2: fix typo: s/num_uvd_inst/num_enc_rings/
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 5 -
1 file changed, 4 insertions(+),
Reviewed-by: James Zhu
On 2018-05-17 06:36 PM, Alex Deucher wrote:
Current multi-UVD hardware uses a single clock and power source
so handle all instances in the idle handler.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 6 +-
1 file changed, 5 insertions(
Reviewed-by: James Zhu
On 2018-05-17 06:36 PM, Alex Deucher wrote:
This reverts commit 4f7b8507bb4ba19f994e0d72eedd6029961be402.
We don't need separate idle work handles for UVD 7.2. Both instances are
driven by the same clock and power.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/am
Take the encode rings into account in the idle work handler.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index e5d234cf804f..604
Current multi-UVD hardware uses a single clock and power source
so handle all instances in the idle handler.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b
Take the encode rings into account in the idle work handler.
v2: fix typo: s/num_uvd_inst/num_enc_rings/
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b/dri
This reverts commit 4f7b8507bb4ba19f994e0d72eedd6029961be402.
We don't need separate idle work handles for UVD 7.2. Both instances are
driven by the same clock and power.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 17 -
drivers/gpu/drm/amd/amdgpu/
Signed-off-by: Samuel Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 233 +
1 file changed, 233 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 6a9e46a..271dbfa 100644
--- a/drivers/gpu/drm
On 2018-05-16 01:09 PM, Michel Dänzer wrote:
On 2018-05-03 08:31 PM, sunpeng...@amd.com wrote:
From: "Leo (Sunpeng) Li"
The dpms_mode flag on the driver-private CRTC was not being set when
it's DPMS state is set to off. This causes some problems when toggling
it back on, as some conditionals
On 2018-05-16 01:10 PM, Michel Dänzer wrote:
On 2018-05-03 08:31 PM, sunpeng...@amd.com wrote:
From: "Leo (Sunpeng) Li"
This will persist color management properties on a CRTC across DPMS
state changes.
Signed-off-by: Leo (Sunpeng) Li
---
src/drmmode_display.c | 6 ++
1 file changed
On 2018-05-16 01:06 PM, Michel Dänzer wrote:
On 2018-05-03 08:31 PM, sunpeng...@amd.com wrote:
3. The three color management properties (Degamma LUT, Color Transform Matrix
(CTM), and Gamma LUT) are hard-coded into the DDX driver, to be listed (as
disabled) regardless of whether a CRT
On 2018-05-16 01:08 PM, Michel Dänzer wrote:
On 2018-05-03 08:31 PM, sunpeng...@amd.com wrote:
From: "Leo (Sunpeng) Li"
Push staged values on the driver-private CRTC, to kernel DRM when it's
initialized. This is to flush out any previous state that hardware was
in, and set them to their defa
On 2018-05-16 01:09 PM, Michel Dänzer wrote:
On 2018-05-03 08:31 PM, sunpeng...@amd.com wrote:
From: "Leo (Sunpeng) Li"
The properties on an RandR output needs to stay consistent throughout
it's lifecycle. However, we cannot list color properties on an output if
there is no CRTC attached.
T
On 2018-05-16 01:07 PM, Michel Dänzer wrote:
On 2018-05-03 08:31 PM, sunpeng...@amd.com wrote:
From: "Leo (Sunpeng) Li"
Non-legacy color management consists of 3 properties on the CRTC:
Degamma LUT, Color Transformation Matrix (CTM), and Gamma LUT.
Add these properties to the driver-private
On 2018-05-17 11:50 AM, Andrey Grodzovsky wrote:
> First of all it's already being called from the display code from
> amd_ip_funcs.suspend/resume hooks.
> Second of all, the place in amdgpu_device_gpu_recover it's being called is
> wrong for GPU stalls since
> it is called BEFORE we cancel and f
On Thu, May 17, 2018 at 2:24 PM, Leo Liu wrote:
>
>
> On 05/17/2018 02:18 PM, Alex Deucher wrote:
>>
>> On Thu, May 17, 2018 at 2:12 PM, Leo Liu wrote:
>>>
>>> NO_OP register should be writen to 0
>>>
>>> Signed-off-by: Leo Liu
>>
>> We discussed this when we first started working on amdgpu. Do
On 05/17/2018 02:18 PM, Alex Deucher wrote:
On Thu, May 17, 2018 at 2:12 PM, Leo Liu wrote:
NO_OP register should be writen to 0
Signed-off-by: Leo Liu
We discussed this when we first started working on amdgpu. Does it
have to be 0?
Yes. I confirmed with FW engineer that we need put 0 in
On Thu, May 17, 2018 at 2:12 PM, Leo Liu wrote:
> NO_OP register should be writen to 0
>
> Signed-off-by: Leo Liu
We discussed this when we first started working on amdgpu. Does it
have to be 0? This function is used for padding. What happens if we
need an odd number of dwords of padding requ
NO_OP register should be writen to 0
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
index f5d074a..341ee6d 100644
NO_OP register should be writen to 0
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index f9a54821..57d32f2 100644
--- a
NO_OP register should be writen to 0
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index dc39169..bfddf97 100644
NO_OP register should be writen to 0
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 5f22135d..6fed3d7 100644
NO_OP register should be writen to 0
Signed-off-by: Leo Liu
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 0501746b..7fbbdb1 100644
-
Take the encode rings into account in the idle work handler.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index be
Take the encode rings into account in the idle work handler.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index e5d234cf804f..604
Current multi-UVD hardware uses a single clock and power source
so handle all instances in the idle handler.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
b
This reverts commit 4f7b8507bb4ba19f994e0d72eedd6029961be402.
We don't need separate idle work handles for UVD 7.2. Both instances are
driven by the same clock and power.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 17 -
drivers/gpu/drm/amd/amdgpu/
If the pin domain is set to GTT | VRAM, look at the preferred domains
for the bo and respect that if it's been set explicitly.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/a
First of all it's already being called from the display code from
amd_ip_funcs.suspend/resume hooks.
Second of all, the place in amdgpu_device_gpu_recover it's being called is
wrong for GPU stalls since
it is called BEFORE we cancel and force completion of all jobs which were not
yet processed.
On Thu, May 17, 2018 at 8:56 AM, Dan Carpenter wrote:
> We added some more lines of code to this if statement but forgot to add
> curly braces.
>
> Fixes: 0c24e7ef233b ("drm/amd/powerplay: add specific changes for VEGAM in
> smu7_hwmgr.c")
> Signed-off-by: Dan Carpenter
Applied. thanks!
Alex
On Tue, May 15, 2018 at 10:02 AM, Tom St Denis wrote:
> NFC just comments.
>
> (v2): Updated based on feedback from Alex Deucher.
>
> Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 347
> +++-
> 1 file chan
On Thu, May 17, 2018 at 8:23 AM, Rex Zhu wrote:
> warning: missing braces around initializer [-Wmissing-braces]
>
> Signed-off-by: Rex Zhu
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c| 2 +-
> drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c | 4 +++-
On Fri, Mar 30, 2018 at 03:11:38PM +0100, Daniel Stone wrote:
> Since drm_framebuffer can now store GEM objects directly, place them
> there rather than in our own subclass. As this makes the framebuffer
> create_handle and destroy functions the same as the GEM framebuffer
> helper, we can reuse th
On Fri, Mar 30, 2018 at 03:11:37PM +0100, Daniel Stone wrote:
> Since drm_framebuffer can now store GEM objects directly, place them
> there rather than in our own subclass. As this makes the framebuffer
> create_handle and destroy functions the same as the GEM framebuffer
> helper, we can reuse th
On Wed, May 16, 2018 at 8:23 AM, Grazvydas Ignotas wrote:
> On Wed, May 16, 2018 at 2:11 PM, Grazvydas Ignotas wrote:
>> On Tue, May 15, 2018 at 5:59 PM, Alex Deucher wrote:
>>> From: Shaoyun Liu
>>>
>>> v2: cleanups (Alex)
>>> v3: make it vega20 only (Alex)
>>>
>>> Signed-off-by: Shaoyun Liu
On Wed, May 16, 2018 at 6:55 AM, Grazvydas Ignotas wrote:
> On Tue, May 15, 2018 at 5:59 PM, Alex Deucher wrote:
>> From: Feifei Xu
>>
>> Signed-off-by: Feifei Xu
>> Reviewed-by: Alex Deucher
>> Reviewed-by: Hawking Zhang
>> Signed-off-by: Alex Deucher
>> ---
>> drivers/gpu/drm/amd/amdgpu/a
On Fri, Mar 30, 2018 at 03:11:36PM +0100, Daniel Stone wrote:
> Since drm_framebuffer can now store GEM objects directly, place them
> there rather than in our own subclass. As this makes the framebuffer
> create_handle and destroy functions the same as the GEM framebuffer
> helper, we can reuse th
On Wed, May 16, 2018 at 6:51 AM, Grazvydas Ignotas wrote:
> On Tue, May 15, 2018 at 5:59 PM, Alex Deucher wrote:
>> From: Roman Li
>>
>> Updating dce12 register headers by adding dc registers
>> required for potential DP LTTPR support.
>>
>> Signed-off-by: Roman Li
>> Acked-by: Alex Deucher
>>
Hello Huang Rui,
The patch 9667849bbb8d: "drm/amd/powerplay: add control gfxoff
enabling in late init" from Mar 13, 2018, leads to the following
static checker warning:
drivers/gpu/drm/amd/amdgpu/../powerplay/amd_powerplay.c:194
pp_late_init()
error: we previously assumed 'hwmgr'
Hello Rex Zhu,
The patch 62fd51275e4d: "drm/amd/pp: Use gfx rlc funcs directly in
powerplay" from Mar 23, 2018, leads to the following static checker
warning:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_powertune.c:977
smu7_enable_didt_config()
warn: inconsistent returns 'mutex:&adev->grb
Hello Mikita Lipski,
The patch b361521f5976: "drm/amd/display: Adding stutter entry wm to
dce bw struct" from Mar 12, 2018, leads to the following static
checker warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:3237
bw_calcs()
warn: inconsistent indenting
driv
Hello Rex Zhu,
The patch d389d607e608: "drm/amd/pp: Change voltage/clk range for OD
feature on VI" from Apr 18, 2018, leads to the following static
checker warning:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:872
smu7_setup_voltage_range_from_vbios()
error: uniniti
On Thu, May 17, 2018 at 4:03 AM, Rex Zhu wrote:
> Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/soc15_common.h | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
> b/drivers/gpu/drm/amd/amd
We added some more lines of code to this if statement but forgot to add
curly braces.
Fixes: 0c24e7ef233b ("drm/amd/powerplay: add specific changes for VEGAM in
smu7_hwmgr.c")
Signed-off-by: Dan Carpenter
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
b/drivers/gpu/drm/amd/power
warning: missing braces around initializer [-Wmissing-braces]
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c| 2 +-
drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/po
Am 17.05.2018 um 12:03 schrieb Emily Deng:
To free the fence from the amdgpu_fence_slab, need twice call_rcu, to avoid
the amdgpu_fence_slab_fini call kmem_cache_destroy(amdgpu_fence_slab) before
kmem_cache_free(amdgpu_fence_slab, fence), add rcu_barrier after
drm_sched_entity_fini.
The kmem_ca
To free the fence from the amdgpu_fence_slab, need twice call_rcu, to avoid
the amdgpu_fence_slab_fini call kmem_cache_destroy(amdgpu_fence_slab) before
kmem_cache_free(amdgpu_fence_slab, fence), add rcu_barrier after
drm_sched_entity_fini.
The kmem_cache_free(amdgpu_fence_slab, fence)'s call tra
Hi Christian,
Good suggestion. Put the barrier() before the kmem_cache_destroy() will be
better. I will send a v2 patch later. Thanks
Best Wishes,
Emily Deng
> -Original Message-
> From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
> Sent: Thursday, May 17, 2018 4:39 PM
Move all BOs belonging to a VM on the LRU with every submission.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 28 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++
2 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/drivers/g
Splice the moved list to a local one to avoid taking the lock over and
over again.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b
Instead of sometimes checking if the vm_status is empty use the moved
flag and also reset it when the BO leaves the state machine.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 28 +++-
1 file changed, 15 insertions(+), 13 deletions(-)
diff
Only the moved state needs a separate spin lock protection. All other
states are protected by reserving the VM anyway.
v2: fix some more incorrect cases
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 66 +++---
drivers/gpu/drm/amd/amdgpu/
Use list_for_each_entry_safe here.
v2: Drop the optimization, it doesn't work as expected.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b
In theory it is possible that PDs/PTs can move without eviction.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdg
Am 17.05.2018 um 05:05 schrieb Emily Deng:
To free the fence from the amdgpu_fence_slab, need twice call_rcu, to avoid
the amdgpu_fence_slab_fini call kmem_cache_destroy(amdgpu_fence_slab) before
kmem_cache_free(amdgpu_fence_slab, fence), add rcu_barrier after
drm_sched_entity_fini.
The kmem_ca
Reviewed-by: Christian König
Am 17.05.2018 um 04:32 schrieb zhoucm1:
Yes, every thing is clear, Acked-by: Chunming Zhou
On 2018年05月16日 23:33, Andrey Grodzovsky wrote:
This spinlock is superfluous, any call to drm_sched_entity_push_job
should already be under a lock together with matching dr
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index def8650..0942f49 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_com
On 2018-05-17 05:05 AM, Emily Deng wrote:
> To free the fence from the amdgpu_fence_slab, need twice call_rcu, to avoid
> the amdgpu_fence_slab_fini call kmem_cache_destroy(amdgpu_fence_slab) before
> kmem_cache_free(amdgpu_fence_slab, fence), add rcu_barrier after
> drm_sched_entity_fini.
>
> Th
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