Re: Kafka OAuth authentication using OKTA

To: users@kafka.apache.org Subject: Re: Kafka OAuth authentication using OKTA EXTERNAL EMAIL - USE CAUTION when clicking links or attachments Hi Anup, I agree that the documentation could be improved. Are you able to provide the steps you did try and the specific error message you're

Re: Kafka OAuth authentication using OKTA

EXTERNAL EMAIL - USE CAUTION when clicking links or attachments Hi Anup, I don't think I can help you with your problem, but it appears you've included some credentials in your message with the KAFKA_OPTS Please check that you haven't got an issue now with leaked credential

Kafka OAuth authentication using OKTA

, Anup Shirolkar.

Re: [PATCH 1/1] goldfish_rtc: keep time offset when resetting

> > Move the synchronization of the RTC with the system clock to the instance > realization. > > Reported-by: Frederik Du Toit Lotter > Signed-off-by: Heinrich Schuchardt LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > hw/rtc/goldfish_rtc.c | 14 +++--- > 1 fil

Re: Introductory email in reference to GSoC 2025 (https://wiki.netbsd.org/projects/project/swap-auto/)

r would also be required to avoid thrashing and to implement time-outs. I'm interested in this though and in case it is still available later on (outside of GSoC or perhaps next year's GSoC) I'll reach out to you again. Thanks and regards, Anup K Parikh. On Sat, Mar 8, 2025 at 7:05 PM

Re: [PATCH v2 0/4] RISC-V KVM PMU fix and selftest improvement

lftests: Change command line option > KVM: riscv: selftests: Allow number of interrupts to be configurable Queued this series for Linux-6.15. Thanks, Anup > > arch/riscv/kvm/vcpu_pmu.c| 1 + > tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 81

Introductory email in reference to GSoC 2025 (https://wiki.netbsd.org/projects/project/swap-auto/)

Hello, My name is Anup. I'd like to participate in the project at https://wiki.netbsd.org/projects/project/swap-auto/. I'm not a student but I think I'm eligible as I've never participated in GSoC or other project based FOSS internships. I'm interested in the FOSS

Re: [PATCH] riscv: Add initial Xen guest support for RISC-V

h many changes is hard to review. Please convert this patch into a series with smaller patches. Also, include a cover letter in the series explaining how to test Xen on RISC-V. Regards, Anup > --- > arch/riscv/Kbuild| 1 + > arch/riscv/Kconfig

Re: [PATCH 0/5] riscv: add support for Zaamo and Zalrsc extensions

inux-6.14. If you can ACK these patches then I can take it through the KVM RISC-V tree. Regards, Anup > > Documentation/arch/riscv/hwprobe.rst | 8 > .../devicetree/bindings/riscv/extensions.yaml | 19 +++ > arch/riscv/include/asm/hwcap.h

Re: [PATCH 5/5] KVM: riscv: selftests: Add Zaamo/Zalrsc extensions to get-reg-list test

On Wed, Jun 19, 2024 at 9:11 PM Clément Léger wrote: > > The KVM RISC-V allows Zaamo/Zalrsc extensions for Guest/VM so add these > extensions to get-reg-list test. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > tools/testing/selfte

Re: [PATCH 4/5] RISC-V: KVM: Allow Zaamo/Zalrsc extensions for Guest/VM

On Wed, Jun 19, 2024 at 9:11 PM Clément Léger wrote: > > Extend the KVM ISA extension ONE_REG interface to allow KVM user space > to detect and enable Zaamo/Zalrsc extensions for Guest/VM. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Regards, Anup >

Re: [PATCH v5 09/10] RISC-V: KVM: Allow Smnpm and Ssnpm extensions for guests

ing the senvcfg CSR within the guest, so that extension > cannot be hidden from the guest without intercepting writes to the CSR. > > Signed-off-by: Samuel Holland LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > > Changes in v5: > - Do not allow Smnpm to be disabled, as

Re: [PATCH 1/1] hw/intc/riscv_aplic: Fix APLIC in clrip and clripnum write emulation

e kernel patch. https://lore.kernel.org/kvm/caahsdy3nmwbhy9qef9luexfr0ie7wc-u0d_fhzc47pxk-mz...@mail.gmail.com/ Regards, Anup > > Signed-off-by: Yong-Xuan Wang > --- > hw/intc/riscv_aplic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw

Re: [PATCH v12 58/84] KVM: RISC-V: Use kvm_faultin_pfn() when mapping pfns into the guest

n For KVM RISC-V: Acked-by: Anup Patel Regards, Anup > --- > arch/riscv/kvm/mmu.c | 11 --- > 1 file changed, 4 insertions(+), 7 deletions(-) > > diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c > index 806f68e70642..f73d6a79a78c 100644 > --- a/arch/riscv

Re: [PATCH v12 57/84] KVM: RISC-V: Mark "struct page" pfns accessed before dropping mmu_lock

ed > outside of mmu_lock is ok (not great, but safe), but marking pages _dirty_ > outside of mmu_lock can make filesystems unhappy. > > Signed-off-by: Sean Christopherson For KVM RISC-V: Acked-by: Anup Patel Regards, Anup > --- > arch/riscv/kvm/mmu.c | 4 ++-- > 1 file chan

Re: [PATCH v12 56/84] KVM: RISC-V: Mark "struct page" pfns dirty iff a stage-2 PTE is installed

fix, this paves the way for converting > RISC-V to use kvm_release_faultin_page(). > > Signed-off-by: Sean Christopherson For KVM RISC-V: Acked-by: Anup Patel Regards, Anup > --- > arch/riscv/kvm/mmu.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > dif

Re: [PATCH v8 4/5] KVM: riscv: selftests: Fix compile error

: riscv: selftests: Add some Zc* extensions to > get-reg-list test") > Signed-off-by: Yong-Xuan Wang Queued this patch for Linux-6.11-rc1 fixes. Thanks, Anup > --- > tools/testing/selftests/kvm/riscv/get-reg-list.c | 8 > 1 file changed, 4 insertions(+), 4 deletion

ZOOKEEPER-4766 - Avoid snapshots during leader election

tion times for some of our large scale clusters. Thanks, Anup

Re: bootstrap standby namenode failure

Thanks Ayush, I am trying to understand the reason why Active NN does not have a record of txn ids that are in shared edit space. On Sat, May 25, 2024 at 7:54 AM Ayush Saxena wrote: > Hi Anup, > Did you explore: -skipSharedEditsCheck, Check this ticket once [1], if > your use case i

bootstrap standby namenode failure

Hello Team, I am trying to recover the failed node which has namenode and journal node, the cluster has one active NN and 2 journal nodes currently. When I am trying to setup node being recovered as standby, I am getting this error. *java.io.IOException: Gap in transactions. Expected to be able

Re: [PATCH v5 05/16] KVM: riscv: selftests: Add Zimop extension to get-reg-list test

On Fri, May 17, 2024 at 8:23 PM Clément Léger wrote: > > The KVM RISC-V allows Zimop extension for Guest/VM so add this > extension to get-reg-list test. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Acked-by: Anup Patel Regards, Anup > --- > tools/

Re: [PATCH v5 04/16] RISC-V: KVM: Allow Zimop extension for Guest/VM

On Fri, May 17, 2024 at 8:23 PM Clément Léger wrote: > > Extend the KVM ISA extension ONE_REG interface to allow KVM user space > to detect and enable Zimop extension for Guest/VM. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Acked-by: Anup Patel

Re: [Intel-gfx] [PATCH 1/3] intel: Disable drm_intel_probe_agp_aperture_size() on Android

Re: [PATCH v8 00/24] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest

Hi Palmer, On Mon, Apr 22, 2024 at 3:29 PM Anup Patel wrote: > > On Sat, Apr 20, 2024 at 5:17 AM Atish Patra wrote: > > > > This series implements SBI PMU improvements done in SBI v2.0[1] i.e. PMU > > snapshot > > and fw_read_hi() functions. > > > >

Re: [PATCH v8 00/24] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest

it to the user space if perf event failed > RISC-V: KVM: Implement SBI PMU Snapshot feature > RISC-V: KVM: Add perf sampling support for guests > RISC-V: KVM: Support 64 bit firmware counters on RV32 > RISC-V: KVM: Improve firmware counter read function > KVM: riscv: selftests: Mov

Re: [PATCH v8 24/24] KVM: riscv: selftests: Add commandline option for SBI PMU test

ents or all ISA extensions. > > The commandline option allows user to disable any set of tests if > they want to. > > Suggested-by: Andrew Jones > Signed-off-by: Atish Patra LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > .../selftests/kvm/riscv/sbi_pmu_test.c

Re: [PATCH v8 18/24] KVM: riscv: selftests: Add helper functions for extension checks

e to worry about the conversions. > > Replace the current usages as well with new helpers. > > Reviewed-by: Andrew Jones > Signed-off-by: Atish Patra LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > tools/testing/selftests/kvm/include/riscv/processor.h | 10 ++

Re: [PATCH v8 17/24] KVM: riscv: selftests: Move sbi definitions to its own header file

On Sat, Apr 20, 2024 at 5:18 AM Atish Patra wrote: > > The SBI definitions will continue to grow. Move the sbi related > definitions to its own header file from processor.h > > Suggested-by: Andrew Jones > Reviewed-by: Andrew Jones > Signed-off-by: Atish Patra LGTM. Re

Re: [PATCH v8 16/24] RISC-V: KVM: Improve firmware counter read function

On Sat, Apr 20, 2024 at 5:18 AM Atish Patra wrote: > > Rename the function to indicate that it is meant for firmware > counter read. While at it, add a range sanity check for it as > well. > > Reviewed-by: Andrew Jones > Signed-off-by: Atish Patra LGTM. Reviewed-by: Anup

Re: [PATCH v8 10/24] RISC-V: KVM: Fix the initial sample period value

d-off-by: Atish Patra LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/kvm/vcpu_pmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c > index 86391a5061dd..cee1b9ca4ec4 100644 &g

Re: [PATCH v2 00/12] Add support for a few Zc* extensions as well as Zcmop

| 10 + > .../selftests/kvm/riscv/get-reg-list.c| 20 ++ > 20 files changed, 394 insertions(+), 189 deletions(-) > > -- > 2.43.0 > Most likely the KVM RISC-V related changes in this series will conflict with the KVM RISC-V repo. I will provide a shared tag based on 6.9-rc3 tomorrow or early next week. Regards, Anup

Re: [PATCH v2 12/12] KVM: riscv: selftests: Add Zcmop extension to get-reg-list test

On Thu, Apr 18, 2024 at 6:14 PM Clément Léger wrote: > > The KVM RISC-V allows Zcmop extension for Guest/VM so add this > extension to get-reg-list test. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Acked-by: Anup Patel Thanks, Anup > --- > tools/

Re: [PATCH v2 11/12] RISC-V: KVM: Allow Zcmop extension for Guest/VM

On Thu, Apr 18, 2024 at 6:14 PM Clément Léger wrote: > > Extend the KVM ISA extension ONE_REG interface to allow KVM user space > to detect and enable Zcmop extension for Guest/VM. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Acked-by: Anup Patel

Re: [PATCH v2 07/12] KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test

On Thu, Apr 18, 2024 at 6:14 PM Clément Léger wrote: > > The KVM RISC-V allows Zca, Zcf, Zcd and Zcb extensions for Guest/VM so > add these extensions to get-reg-list test. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Acked-by: Anup Patel Thanks, Anup

Re: [PATCH v2 06/12] RISC-V: KVM: Allow Zca, Zcf, Zcd and Zcb extensions for Guest/VM

On Thu, Apr 18, 2024 at 6:14 PM Clément Léger wrote: > > Extend the KVM ISA extension ONE_REG interface to allow KVM user space > to detect and enable Zca, Zcf, Zcd and Zcb extensions for Guest/VM. > > Signed-off-by: Clément Léger LGTM. Reviewed-by: Anup Patel Acked-by: Anup

Re: [PATCH 1/4] KVM: delete .change_pte MMU notifier callback

e generic KVM code that dispatches to kvm_set_spte_gfn(), as > well as all the architecture specific implementations. > > Signed-off-by: Paolo Bonzini For KVM RISC-V: Acked-by: Anup Patel Regards, Anup > --- > arch/arm64/kvm/mmu.c | 34 -

Re: [PATCH 1/4] KVM: delete .change_pte MMU notifier callback

e generic KVM code that dispatches to kvm_set_spte_gfn(), as > well as all the architecture specific implementations. > > Signed-off-by: Paolo Bonzini For KVM RISC-V: Acked-by: Anup Patel Regards, Anup > --- > arch/arm64/kvm/mmu.c | 34 -

Re: [PATCH] KVM: riscv: selftests: Add SBI base extension test

mode firmware implementations. > > If we also have them here, then we'll end up duplicating that effort. > > > > Thanks for the information, Andrew! > > The SBI KVM selftest was planned last year when I talked with Anup about > KVM selftest support on RISC-V. Since th

Re: [PATCH][next] KVM: selftests: Fix spelling mistake "trigged" -> "triggered"

On Thu, Mar 7, 2024 at 1:49 PM Colin Ian King wrote: > > There are spelling mistakes in __GUEST_ASSERT messages. Fix them. > > Signed-off-by: Colin Ian King Queued this patch for Linux-6.9 fixes. Thanks, Anup > --- > tools/testing/selftests/kvm/aarch64/arch_timer.c | 2 +

Re: [PATCH][next] KVM: selftests: Fix spelling mistake "trigged" -> "triggered"

On Fri, Mar 8, 2024 at 3:47 AM Oliver Upton wrote: > > Thanks for the fix Colin. Paolo/Anup, up to you how you want to play it, > I see the 6.9 PR is already out for riscv. > > Acked-by: Oliver Upton I can take this as a Linux-6.9-rcX fix if everyone is okay with it. Regards, A

[PATCH 0/2] RISC-V APLIC fixes

Few fixes for RISC-V APLIC discovered during Linux AIA patch reviews. These patches can also be found in the apatel_aplic_fixes_v1 branch at: https://github.com/avpatel/qemu.git Anup Patel (2): hw/intc/riscv_aplic: Fix setipnum_le write emulation for APLIC MSI-mode hw/intc/riscv_aplic

[PATCH 2/2] hw/intc/riscv_aplic: Fix in_clrip[x] read emulation

lue = (incoming wire value) XOR (source is inverted)" Update the riscv_aplic_read_input_word() implementation to match the above. Fixes: e8f79343cfc8 ("hw/intc: Add RISC-V AIA APLIC device emulation") Signed-off-by: Anup Patel --- hw/intc/riscv_aplic.c | 17 +++-- 1 fil

[PATCH 1/2] hw/intc/riscv_aplic: Fix setipnum_le write emulation for APLIC MSI-mode

d RISC-V AIA APLIC device emulation") Signed-off-by: Anup Patel --- hw/intc/riscv_aplic.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c index e98e258deb..775bb96164 100644 --- a/hw/intc/riscv_aplic.c +++ b/hw

Re: [PATCH v3 2/2] riscv: Fix text patching when IPI are used

Signed-off-by: Björn Töpel > >> Signed-off-by: Alexandre Ghiti > >> Reviewed-by: Andrea Parri > > > > What commit does this fix? > > Hmm. The bug is exposed when the AIA IPI are introduced, and used > (instead of the firmware-based). > > I'm not sure th

Re: [PATCH 0/5] KVM RISC-V report few more ISA extensions through ONE_REG

On Wed, Feb 14, 2024 at 6:08 PM Anup Patel wrote: > > This series extends the KVM RISC-V ONE_REG interface to report few more > ISA extensions namely: Ztso and Zacas. These extensions are already > supported by the HWPROBE interface in Linux-6.8 kernel. > > To test these patches

Re: [PATCH v4 15/15] KVM: riscv: selftests: Add a test for counter overflow

ISA extensions to detect if a platform supports that. Thus, > this test will fail on platform with virtualization but doesn't > support overflow on these two events. > > Signed-off-by: Atish Patra LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > tools/testi

Re: [PATCH v4 14/15] KVM: riscv: selftests: Add a test for PMU snapshot functionality

On Thu, Feb 29, 2024 at 6:32 AM Atish Patra wrote: > > Verify PMU snapshot functionality by setting up the shared memory > correctly and reading the counter values from the shared memory > instead of the CSR. > > Signed-off-by: Atish Patra LGTM. Reviewed-by: Anup Pat

Re: [PATCH v4 13/15] KVM: riscv: selftests: Add SBI PMU selftest

at the time of merging. Reviewed-by: Anup Patel Regards, Anup > --- > tools/testing/selftests/kvm/Makefile| 1 + > tools/testing/selftests/kvm/riscv/sbi_pmu.c | 340 > 2 files changed, 341 insertions(+) > create mode 100644 tools/testing/selftest

Re: [PATCH v4 12/15] KVM: riscv: selftests: Add SBI PMU extension definitions

On Thu, Feb 29, 2024 at 6:32 AM Atish Patra wrote: > > The SBI PMU extension definition is required for upcoming SBI PMU > selftests. > > Signed-off-by: Atish Patra LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > .../selftests/kvm/include/ris

Re: [PATCH v4 11/15] KVM: riscv: selftests: Add Sscofpmf to get-reg-list test

On Thu, Feb 29, 2024 at 6:32 AM Atish Patra wrote: > > The KVM RISC-V allows Sscofpmf extension for Guest/VM so let us > add this extension to get-reg-list test. > > Signed-off-by: Atish Patra LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > tools/testing/selfte

Re: [PATCH v3 0/2] Export debug triggers as an extension

compatible (which I also wasn't sure was the > case). If, OTOH, QEMU's debug implementation exactly implements sdtrig's > specification, then I'm in favor of deprecating the 'debug' extension. The QEMU's debug implementation aligns more with Sdtrig v1

Re: [PATCH v5 11/12] KVM: riscv: selftests: Change vcpu_has_ext to a common function

Jones > > Date: Wed Dec 13 18:09:58 2023 +0100 > > > > RISC-V: KVM: selftests: Treat SBI ext regs like ISA ext regs > > > > Anyway, your changes were right. Please go ahead to include them when > > merging. > > > > I am not sure what

Re: Spark 3.3 Query Analyzer Bug Report

Apologies. Issue is seen after we upgraded from Spark 3.1 to Spark 3.3. The same query runs fine on Spark 3.1. Omit the Spark version mentioned in email subject earlier. Anup Error trace: query_result.explain(extended=True)\n File \"…/spark/python/lib/pyspark.zip/pyspark/sql/datafra

Spark 4.0 Query Analyzer Bug Report

scala:1431)\n\tat scala.collection.TraversableOnce.foldLeft(TraversableOnce.scala:199)\n\tat scala.collect... Could you please let us know if this is already being looked at? Thanks, Anup

Google Ads API - Standard Access Application

Hi, We recently applied for Standard Access to the Google Ads API, but we haven't received a case ID or any confirmation regarding our application. Could you please provide a timeline for the processing of our Standard Access application? We are in a critical situation and need to plan accord

Re: [PATCH] tty: hvc: Don't enable the RISC-V SBI console by default

gt; Signed-off-by: Palmer Dabbelt LTGM. Reviewed-by: Anup Patel Regards, Anup > --- > drivers/tty/hvc/Kconfig | 8 +--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig > index 6e05c5c7bca1..c2a4e88b328

[PATCH 5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test

The KVM RISC-V allows Zacas extension for Guest/VM so let us add this extension to get-reg-list test. Signed-off-by: Anup Patel --- tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 1 file changed, 4 insertions(+) diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools

[PATCH 4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM

We extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zacas extension for Guest/VM. Signed-off-by: Anup Patel --- arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/riscv

[PATCH 3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test

The KVM RISC-V allows Ztso extension for Guest/VM so let us add this extension to get-reg-list test. Signed-off-by: Anup Patel --- tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 1 file changed, 4 insertions(+) diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools

[PATCH 2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM

We extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Ztso extension for Guest/VM. Signed-off-by: Anup Patel --- arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/riscv

[PATCH 1/5] RISC-V: KVM: Forward SEED CSR access to user space

rypto extensions for Guest/VM") Signed-off-by: Anup Patel --- arch/riscv/kvm/vcpu_insn.c | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c index 7a6abed41bc1..ee7215f4071f 100644 --- a/arch/riscv/kvm/vcpu_insn.c +++ b/arch

[PATCH 0/5] KVM RISC-V report few more ISA extensions through ONE_REG

/avpatel/kvmtool.git These patches can also be found in the riscv_kvm_more_exts_round2_v1 branch at: https://github.com/avpatel/linux.git Anup Patel (5): RISC-V: KVM: Forward SEED CSR access to user space RISC-V: KVM: Allow Ztso extension for Guest/VM KVM: riscv: selftests: Add Ztso extension

Re: [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests

: selftests: Add guest helper to get vcpu id > KVM: riscv: selftests: Change vcpu_has_ext to a common function > KVM: riscv: selftests: Add sstc timer test > > Paolo Bonzini (1): > selftests/kvm: Fix issues with $(SPLIT_TESTS) Rebased on Linux-6.8-rc4 and queued this

Re: Re: [PATCH 0/2] Export debug triggers as an extension

ning if triggers are used and x-sdtrig is not enabled > > > > - Update the trigger implementation to match frozen spec > > > > > > We will need to support two versions, as there are two ratified specs. > > > > > > > We'll likely want to be allow

Google Ads API - Standard Access Application

Hi, We recently applied for Standard Access to the Google Ads API, but we haven't received a case ID or any confirmation regarding our application. Could you please provide a timeline for the processing of our Standard Access application? We are in a critical situation and need to plan accord

Re: [PATCH v5 0/5] RISC-V SBI debug console extension support

>> Nathan points out that this has some semantic conflicts with a patch in > >> Greg's TTY tree: > >> https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git/commit/?id=f32fcbedbe9290565e4eac3fd7c4c451d5478787 > >> > >> So I thin

Re: [PATCH v2] tty: hvc: Fix the RISC-V SBI driver for a refactoring

> +static ssize_t hvc_sbi_dbcn_tty_put(uint32_t vtermno, const u8 *buf, size_t > count) > { > return sbi_debug_console_write(buf, count); > } > > -static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count) > +static ssize_t hvc_sbi_dbcn_tty_get(uint32_t vtermno, u8 *buf, size_t count) > { > return sbi_debug_console_read(buf, count); > } > -- > 2.43.0 > > Reviewed-by: Anup Patel Thanks, Anup

[PATCH v6 5/5] RISC-V: Enable SBI based earlycon support

Let us enable SBI based earlycon support in defconfig for both RV32 and RV64 so that "earlycon=sbi" can be used again. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defcon

[PATCH v6 4/5] tty: Add SBI debug console support to HVC SBI driver

From: Atish Patra RISC-V SBI specification supports advanced debug console support via SBI DBCN extension. Extend the HVC SBI driver to support it. Signed-off-by: Atish Patra Signed-off-by: Anup Patel Reviewed-by: Andrew Jones Acked-by: Greg Kroah-Hartman --- drivers/tty/hvc/Kconfig

[PATCH v6 3/5] tty/serial: Add RISC-V SBI debug console based earlycon

We extend the existing RISC-V SBI earlycon support to use the new RISC-V SBI debug console extension. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones Acked-by: Greg Kroah-Hartman --- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/earlycon-riscv-sbi.c | 27

[PATCH v6 2/5] RISC-V: Add SBI debug console helper routines

Let us provide SBI debug console helper routines which can be shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/include/asm/sbi.h | 5 +++ arch/riscv/kernel/sbi.c | 66 2

[PATCH v6 1/5] RISC-V: Add stubs for sbi_console_putchar/getchar()

The functions sbi_console_putchar() and sbi_console_getchar() are not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add stub of these functions to avoid "#ifdef" on user side. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/include/asm/sbi.h | 5 +++

[PATCH v6 0/5] RISC-V SBI debug console extension support

space have to explicitly opt-in for emulating SBI DBCN. - Introduced new PATCH5 in this series which adds inline version of sbi_console_getchar() and sbi_console_putchar() for the case where CONFIG_RISCV_SBI_V01 is disabled. Anup Patel (4): RISC-V: Add stubs for sbi_console_putchar/getcha

Re: [PATCH v5 0/5] RISC-V SBI debug console extension support

id=f32fcbedbe9290565e4eac3fd7c4c451d5478787 > > So I think the best bet is to wait on Greg's patch to land in Linus' > tree, and then base a v6 of this patch set on that merged patch. I'm > going to drop this one from for-next. Greg's patch is now available in upstream Linux so I will rebase and send out v6. Thanks, Anup

Re: [PATCH v2 1/2] target/riscv: Convert sdtrig functionality from property to an extension

if (riscv_cpu_cfg(env)->ext_sdtrig) { > return RISCV_EXCP_NONE; > } > > diff --git a/target/riscv/machine.c b/target/riscv/machine.c > index 72fe2374dc..8f9787a30f 100644 > --- a/target/riscv/machine.c > +++ b/target/riscv/machine.c > @@ -231,7 +231,7 @@ static bool debug_needed(void *opaque) > { > RISCVCPU *cpu = opaque; > > -return cpu->cfg.debug; > +return cpu->cfg.ext_sdtrig; > } > > static int debug_post_load(void *opaque, int version_id) > -- > 2.34.1 > > Regards, Anup

Re: [PATCH -fixes v2] RISC-V: KVM: Require HAVE_KVM

On Thu, Jan 18, 2024 at 11:10 PM Sean Christopherson wrote: > > On Thu, Jan 18, 2024, Anup Patel wrote: > > On Thu, Jan 4, 2024 at 6:07 PM Andrew Jones wrote: > > > > > > KVM requires EVENTFD, which is selected by HAVE_KVM. Other KVM > > > supporting archi

Re: [PATCH -fixes v2] RISC-V: KVM: Require HAVE_KVM

nfradead.org/ > Signed-off-by: Andrew Jones Queued this patch for Linux-6.8 Regards, Anup > --- > > v2: > - Added Fixes tag and -fixes prefix [Alexandre/Anup] > > arch/riscv/Kconfig | 1 + > arch/riscv/kvm/Kconfig | 2 +- > 2 files changed, 2 insertions(+),

Re: [PATCH 00/15] KVM RISC-V report more ISA extensions through ONE_REG

On Tue, Nov 28, 2023 at 8:24 PM Anup Patel wrote: > > This extends the KVM RISC-V ONE_REG interface to report more ISA extensions > namely: Zbz, scalar crypto, vector crypto, Zfh[min], Zihintntl, Zvfh[min], > and Zfa. > > This series depends upon the "riscv: report more

Re: Re: [PATCH] RISC-V: KVM: Require HAVE_KVM

ems like it should be 8132d887a702 > ("KVM: remove CONFIG_HAVE_KVM_EVENTFD"), it could also be 99cdc6c18c2d > ("RISC-V: Add initial skeletal KVM support"). > > I'll leave both the urgency decision and the Fixes tag selection up to > the maintainers. Anup? Paolo? Lets add Fixes: 99cdc6c18c2d ("RISC-V: Add initial skeletal KVM support") Regards, Anup

Re: [PATCH v4 00/13] RISC-V: Add steal-time support

rew/linux/commits/kvm/steal-time-v4 > > Changes since v3: > - Use work "Computing" instead of "using" in pr_info [Atish] > - Rename KVM_REG_RISCV_SBI to KVM_REG_RISCV_SBI_STATE [Atish, Anup] > - Picked up r-b's from Atish and Anup > > Changes since

Re: [PATCH v4 00/13] RISC-V: Add steal-time support

.com/jones-drew/linux/commits/kvm/steal-time-v4 > > Changes since v3: > - Use work "Computing" instead of "using" in pr_info [Atish] > - Rename KVM_REG_RISCV_SBI to KVM_REG_RISCV_SBI_STATE [Atish, Anup] > - Picked up r-b's from Atish and Anup > > Chang

Re: [PATCH v3 03/13] RISC-V: paravirt: Implement steal-time support

Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/Kconfig | 19 +++ > arch/riscv/kernel/paravirt.c | 63 ++-- > 2 files changed, 79 insertions(+), 3 deletions(-) > > diff --git a/

Re: [PATCH v3 07/13] RISC-V: KVM: Add support for SBI extension registers

extension registers. Each SBI extension that uses this type > > will have its own subtype. There are currently no subtypes defined. > > The next patch introduces the first one. > > > > Reviewed-by: Anup Patel > > Signed-off-by: Andrew Jones > > --- > > arch/r

Re: [PATCH v2 13/13] RISC-V: KVM: selftests: Add get-reg-list test for STA registers

On Thu, Dec 14, 2023 at 3:46 PM Andrew Jones wrote: > > Add SBI STA and its two registers to the get-reg-list test. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > .../selftests/kvm/riscv/get-reg-list.c| 43 +++

Re: [PATCH v2 12/13] RISC-V: KVM: selftests: Add steal_time test support

On Thu, Dec 14, 2023 at 3:46 PM Andrew Jones wrote: > > With the introduction of steal-time accounting support for > RISC-V KVM we can add RISC-V support to the steal_time test. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > tools/

Re: [PATCH v2 11/13] RISC-V: KVM: selftests: Add guest_sbi_probe_extension

ll current extension IDs or base > extension function IDs though, even though we need one of each, > because we'd prefer to bring those in as necessary. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > .../sel

Re: [PATCH v2 10/13] RISC-V: KVM: selftests: Move sbi_ecall to processor.c

On Thu, Dec 14, 2023 at 3:46 PM Andrew Jones wrote: > > sbi_ecall() isn't ucall specific and its prototype is already in > processor.h. Move its implementation to processor.c. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel --- > .../selftests/kv

Re: [PATCH v2 09/13] RISC-V: KVM: Implement SBI STA extension

> Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/kvm/Kconfig| 1 + > arch/riscv/kvm/vcpu_sbi_sta.c | 96 ++- > 2 files changed, 95 insertions(+), 2 deletions(-) > > diff --git a/arc

Re: [PATCH v2 08/13] RISC-V: KVM: Add support for SBI STA registers

userspace must not set the hi register to anything other > than zero and is allowed to completely neglect saving/restoring it. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/include/asm/kvm_vcpu_sbi.h | 5 +++ > arch/risc

Re: [PATCH v2 07/13] RISC-V: KVM: Add support for SBI extension registers

type. There are currently no subtypes defined. > The next patch introduces the first one. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/include/asm/kvm_vcpu_sbi.h | 4 ++ > arch/riscv/include/uapi/asm/kvm.h | 3 +

Re: [PATCH v2 06/13] RISC-V: KVM: Add SBI STA info to vcpu_arch

(struct kvm_vcpu *vcpu) > { > + gpa_t shmem = vcpu->arch.sta.shmem; > + > + if (shmem == INVALID_GPA) > + return; > } > > static int kvm_sbi_sta_steal_time_set_shmem(struct kvm_vcpu *vcpu) > -- > 2.43.0 > Apart from the above, it looks good to me. Reviewed-by: Anup Patel Regards, Anup

Re: [PATCH v2 05/13] RISC-V: KVM: Add steal-update vcpu request

o by making the request from vcpu-load. The record > function is just a stub for now and will be filled in with the rest > of the steal-time support functions in following patches. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > arch

Re: [PATCH v2 04/13] RISC-V: KVM: Add SBI STA extension skeleton

On Thu, Dec 14, 2023 at 3:46 PM Andrew Jones wrote: > > Add the files and functions needed to support the SBI STA > (steal-time accounting) extension. In the next patches we'll > complete the functions to fully enable SBI STA support. > > Signed-off-by: Andrew Jones L

Re: [PATCH v2 03/13] RISC-V: paravirt: Implement steal-time support

> + steal = READ_ONCE(st->steal); > + virt_rmb(); > + } while ((le32_to_cpu(sequence) & 1) || > +sequence != READ_ONCE(st->sequence)); Actually, we should be doing this sequence for both RV64 and RV32 because for RV64 the steal time value is valid only when sequence is an even number. > + } else { > + steal = READ_ONCE(st->steal); > + } > + > + return le64_to_cpu(steal); > } > > int __init pv_time_init(void) > -- > 2.43.0 > Regards, Anup

Re: [PATCH v2 02/13] RISC-V: Add SBI STA extension definitions

On Thu, Dec 14, 2023 at 3:45 PM Andrew Jones wrote: > > The SBI STA extension enables steal-time accounting. Add the > definitions it specifies. > > Signed-off-by: Andrew Jones > Reviewed-by: Conor Dooley LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > arch

Re: [PATCH v2 01/13] RISC-V: paravirt: Add skeleton for pv-time support

ions to fully enable steal-time > support. > > Signed-off-by: Andrew Jones LGTM. Reviewed-by: Anup Patel Regards, Anup > --- > .../admin-guide/kernel-parameters.txt | 6 +- > arch/riscv/include/asm/paravirt.h | 28 +++ > arch/riscv/include/asm/pa

Re: [PATCH v4 11/11] KVM: selftests: Enable tunning of err_margin_us in arch timer test

ncrease the value > when hitting the failure.. > > Signed-off-by: Haibo Xu Can you please review this patch ? We want to take this entire series through the KVM RISC-V tree. Regards, Anup > --- > .../selftests/kvm/aarch64/arch_timer.c| 8 +-- > tools/testing/se

Re: [PATCH v4 02/11] KVM: arm64: selftests: Split arch_timer test code

gned-off-by: Haibo Xu > Reviewed-by: Andrew Jones Can you please review this patch ? We want to take this entire series through KVM RISC-V tree. Regards, Anup > --- > tools/testing/selftests/kvm/Makefile | 3 +- > .../selftests/kvm/aarch64/arch_timer.c| 275 +-

Re: [PATCH 26/26] KVM: Hide KVM internal data structures and values from kernel at-large

few PPC includes and an s390 declaration as needed, and > opportunistically include kvm_host.h in trace/events.kvm.h instead of > relying on the parent to provide the right includes. > > Cc: Anish Ghulati > Cc: Venkatesh Srinivas > Cc: Andrew Thornton > Signed-off-by: Sean

Re: [PATCH 22/26] entry/kvm: KVM: Move KVM details related to signal/-EINTR into KVM proper

not obviously better than having KVM > react to -EINTR (though it's not obviously worse either). > > Signed-off-by: Sean Christopherson For KVM RISC-V: Anup Patel Regards, Anup > --- > arch/arm64/kvm/arm.c | 3 +-- > arch/riscv/kvm/vcpu.c | 2 +- > arch/x86

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