Thanks for the good questions.
On Sun, Dec 29, 2024 at 4:10 PM andreas.elding via 9fans
<9fans@9fans.net> wrote:
> How was it presented to the users? Could they query to see the current
> utilization of the system?
It looked very normal. To see what was running, you did ps. In the
status, you co
On Mon, Dec 30, 2024 at 10:15:13AM -0800, Paul Lalonde wrote:
> The hard part is memory consistency.
>
> x86 has a strong coherence model, which means that any write is immediately
> visible to any other core that loads the same address. This wreaks havoc
> on your cache architecture. You need t
Yes, AMD's EPYC line and derivatives, with their reasonably nice memory
partitioning is *excellent* for running independent VMs. It does a good
job of letting you scale your core counts appropriately to the size of the
VM.
Nvidia's GeForce NOW game streaming platform runs (ran? I'm not there
any
I wonder how these many-core systems share memory effectively.
> On Dec 30, 2024, at 8:25 AM, Ron Minnich wrote:
>
> BTW, there are 512- and 1024-core risc-v systems in the works, and NIX
> looks pretty good for that kind of CPU.
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On Mon, Dec 30, 2024 at 9:39 AM Bakul Shah via 9fans <9fans@9fans.net> wrote:
>
> I wonder how these many-core systems share memory effectively.
Typically there is an on-chip network, and at least on some systems,
memory blocks scattered among the cores.
See the Esperanto SOC-1 for one example.
The hard part is memory consistency.
x86 has a strong coherence model, which means that any write is immediately
visible to any other core that loads the same address. This wreaks havoc
on your cache architecture. You need to either have a global
synchronization point (effectively a global share
