[U-Boot] [PATCH] powerpc: mpc85xx/mpc86xx: Fix off-by-one boundary checking with ARRAY_SIZE
If a variable is used as array subscript, it's valid value range is
0 ... ARRAY_SIZE -1.
Signed-off-by: Axel Lin
---
arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c | 4 ++--
arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c | 4 ++--
arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 4 ++--
arch/powerpc/cpu/mpc85xx/p1021_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p1022_serdes.c | 4 ++--
arch/powerpc/cpu/mpc85xx/p1023_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p2020_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p2041_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p3041_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p4080_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p5020_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/p5040_serdes.c | 2 +-
arch/powerpc/cpu/mpc85xx/t1040_serdes.c | 2 +-
arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c | 4 ++--
arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c | 4 ++--
19 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
index 6dadeb8..ec96e81 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
@@ -228,7 +228,7 @@ void fsl_serdes_init(void)
break;
}
- if (srds1_io_sel > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ if (srds1_io_sel >= ARRAY_SIZE(serdes1_cfg_tbl)) {
printf("Invalid PORDEVSR[SRDS1_IO_SEL] = %d\n", srds1_io_sel);
return;
}
@@ -237,7 +237,7 @@ void fsl_serdes_init(void)
serdes1_prtcl_map |= (1 << lane_prtcl);
}
- if (srds2_io_sel > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ if (srds2_io_sel >= ARRAY_SIZE(serdes2_cfg_tbl)) {
printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_io_sel);
return;
}
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
index 7c49097..3483366 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
@@ -68,7 +68,7 @@ void fsl_serdes_init(void)
debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
- if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
return;
}
@@ -77,7 +77,7 @@ void fsl_serdes_init(void)
serdes1_prtcl_map |= (1 << lane_prtcl);
}
- if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
return;
}
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
index 76288cd..c9eea15 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
@@ -53,7 +53,7 @@ void fsl_serdes_init(void)
debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
- if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ if (srds1_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg);
return ;
}
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
index 2582637..49a0290 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
@@ -53,7 +53,7 @@ void fsl_serdes_init(void)
debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
- if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
return;
}
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
index f480c26..7af6aff 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
@@ -62,7 +62,7 @@ void fsl_serdes_init(void)
debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
- if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
return;
}
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
index 2ff5d9a..fcccb52 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
@@ -57,7 +57,7 @@ void fsl_serdes_init(vo
[U-Boot] [PATCH] spi: armada100_spi: Remove unnecessary NULL test for dout and din
Signed-off-by: Axel Lin
---
drivers/spi/armada100_spi.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/drivers/spi/armada100_spi.c b/drivers/spi/armada100_spi.c
index afdbe05..b237c7c 100644
--- a/drivers/spi/armada100_spi.c
+++ b/drivers/spi/armada100_spi.c
@@ -182,15 +182,8 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
goto done;
}
- if (dout)
- pss->tx = dout;
- else
- pss->tx = NULL;
-
- if (din)
- pss->rx = din;
- else
- pss->rx = NULL;
+ pss->tx = dout;
+ pss->rx = din;
if (flags & SPI_XFER_BEGIN) {
spi_cs_activate(slave);
--
1.8.1.2
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[U-Boot] [PATCH 1/2] spi: tegra114_spi: Convert to use spi_alloc_slave()
Signed-off-by: Axel Lin
---
Forgot to CC mailing list, so here is a resend.
drivers/spi/tegra114_spi.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index b11a0a1..4d2af48 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -152,13 +152,11 @@ struct spi_slave *tegra114_spi_setup_slave(unsigned int
bus, unsigned int cs,
return NULL;
}
- spi = malloc(sizeof(struct tegra_spi_slave));
+ spi = spi_alloc_slave(struct tegra_spi_slave, bus, cs);
if (!spi) {
printf("SPI error: malloc of SPI structure failed\n");
return NULL;
}
- spi->slave.bus = bus;
- spi->slave.cs = cs;
spi->ctrl = &spi_ctrls[bus];
if (!spi->ctrl) {
printf("SPI error: could not find controller for bus %d\n",
--
1.8.1.2
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[U-Boot] [PATCH 2/2] spi: tegra20_sflash: Remove redundant code to set bus and cs of struct spi_slave
It's done in spi_alloc_slave(), thus remove the redundant code.
Signed-off-by: Axel Lin
---
drivers/spi/tegra20_sflash.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 9322ce7..7c3a3fc 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -132,8 +132,6 @@ struct spi_slave *tegra20_spi_setup_slave(unsigned int bus,
unsigned int cs,
printf("SPI error: malloc of SPI structure failed\n");
return NULL;
}
- spi->slave.bus = bus;
- spi->slave.cs = cs;
spi->ctrl = &spi_ctrls[bus];
if (!spi->ctrl) {
printf("SPI error: could not find controller for bus %d\n",
--
1.8.1.2
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[U-Boot] [PATCH] spi: Use DIV_ROUND_UP at appropriate places
This change slightly improves readability.
Signed-off-by: Axel Lin
---
drivers/spi/cf_qspi.c | 2 +-
drivers/spi/mxc_spi.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/cf_qspi.c b/drivers/spi/cf_qspi.c
index a37ac4e..06bcf91 100644
--- a/drivers/spi/cf_qspi.c
+++ b/drivers/spi/cf_qspi.c
@@ -171,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
volatile qspi_t *qspi = dev->regs;
u8 *txbuf = (u8 *)dout;
u8 *rxbuf = (u8 *)din;
- u32 count = ((bitlen / 8) + (bitlen % 8 ? 1 : 0));
+ u32 count = DIV_ROUND_UP(bitlen, 8);
u32 n, i = 0;
/* Sanitize arguments */
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 5bed858..2ea3228 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -224,7 +224,7 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
const u8 *dout, u8 *din, unsigned long flags)
{
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
- int nbytes = (bitlen + 7) / 8;
+ int nbytes = DIV_ROUND_UP(bitlen, 8);
u32 data, cnt, i;
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
@@ -294,7 +294,7 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
/* Transfer completed, clear any pending request */
reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF);
- nbytes = (bitlen + 7) / 8;
+ nbytes = DIV_ROUND_UP(bitlen, 8);
cnt = nbytes % 32;
@@ -330,7 +330,7 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
void *din, unsigned long flags)
{
- int n_bytes = (bitlen + 7) / 8;
+ int n_bytes = DIV_ROUND_UP(bitlen, 8);
int n_bits;
int ret;
u32 blk_size;
--
1.8.1.2
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Re: [U-Boot] [PATCH] spi: Use DIV_ROUND_UP at appropriate places
2013/6/14 Jagan Teki : > Hi, > > IMHO: > Can you please use the proper commit header prefix. > > I am just sharing my thoughts, ignore this if you know it already. > I followed below syntax. > ": : : " > > Ex: for this commit (seems like this commit changes two drivers) > spi: cf_qspi | mxc_spi: Use DIV_ROUND_UP at appropriate places This does not scale. What if a (trivial) patch touches 10 drivers? > > if you send same changes individually. > spi: cf_qspi: Use DIV_ROUND_UP at appropriate places > spi: mxc_spi: Use DIV_ROUND_UP at appropriate places I was thinking doing so may add maintainer's burden. (well for this case with 2 patches, it's not a problem) But since you prefer sending a fix per driver, I'll resend the patches. > > On Fri, Jun 14, 2013 at 1:29 PM, Axel Lin wrote: >> This change slightly improves readability. >> >> Signed-off-by: Axel Lin >> --- >> drivers/spi/cf_qspi.c | 2 +- >> drivers/spi/mxc_spi.c | 6 +++--- >> 2 files changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/spi/cf_qspi.c b/drivers/spi/cf_qspi.c >> index a37ac4e..06bcf91 100644 >> --- a/drivers/spi/cf_qspi.c >> +++ b/drivers/spi/cf_qspi.c >> @@ -171,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int >> bitlen, const void *dout, >> volatile qspi_t *qspi = dev->regs; >> u8 *txbuf = (u8 *)dout; >> u8 *rxbuf = (u8 *)din; >> - u32 count = ((bitlen / 8) + (bitlen % 8 ? 1 : 0)); > > Was this equivalent to (bitlen + 7) / 8 ? Yes. And that is the point of this patch ( to handle divide-round-up in a uniform way). > > -- > Thanks, > Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] spi: cf_qspi: Use DIV_ROUND_UP at appropriate place
This change slightly improves readability. Signed-off-by: Axel Lin --- drivers/spi/cf_qspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/cf_qspi.c b/drivers/spi/cf_qspi.c index a37ac4e..06bcf91 100644 --- a/drivers/spi/cf_qspi.c +++ b/drivers/spi/cf_qspi.c @@ -171,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, volatile qspi_t *qspi = dev->regs; u8 *txbuf = (u8 *)dout; u8 *rxbuf = (u8 *)din; - u32 count = ((bitlen / 8) + (bitlen % 8 ? 1 : 0)); + u32 count = DIV_ROUND_UP(bitlen, 8); u32 n, i = 0; /* Sanitize arguments */ -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] spi: mxc_spi: Use DIV_ROUND_UP at appropriate places
This change slightly improves readability.
Signed-off-by: Axel Lin
---
drivers/spi/mxc_spi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 5bed858..2ea3228 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -224,7 +224,7 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
const u8 *dout, u8 *din, unsigned long flags)
{
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
- int nbytes = (bitlen + 7) / 8;
+ int nbytes = DIV_ROUND_UP(bitlen, 8);
u32 data, cnt, i;
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
@@ -294,7 +294,7 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
/* Transfer completed, clear any pending request */
reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF);
- nbytes = (bitlen + 7) / 8;
+ nbytes = DIV_ROUND_UP(bitlen, 8);
cnt = nbytes % 32;
@@ -330,7 +330,7 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int
bitlen,
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
void *din, unsigned long flags)
{
- int n_bytes = (bitlen + 7) / 8;
+ int n_bytes = DIV_ROUND_UP(bitlen, 8);
int n_bits;
int ret;
u32 blk_size;
--
1.8.1.2
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[U-Boot] spi: cf_spi: Question about checking (dspi->sr & 0x0000F000) witch magic number 4
Hi, While reading the code in cfspi_tx(): while ((dspi->sr & 0xF000) >= 4) ; I don't see the point of checking "(dspi->sr & 0xF000) >= 4)". I'm wondering if it should be while ((dspi->sr & 0xF000) >> 12) >= 4) ; or simply while (dspi->sr & 0xF000) ; Current code actually has the same effect as "while (dspi->sr & 0xF000) ;". comments? Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] gpio: altera_pio: Fix inversed logic of gpio_is_valid() implementation
The implementation of gpio_is_valid() has inversed logic, fix it. Signed-off-by: Axel Lin --- Hi, I don't have this hardware to test, but current code looks obviously wrong. I'd appreciate if someone can review and test this patch. Axel drivers/gpio/altera_pio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/altera_pio.c b/drivers/gpio/altera_pio.c index fb03760..7ab6df8 100644 --- a/drivers/gpio/altera_pio.c +++ b/drivers/gpio/altera_pio.c @@ -294,6 +294,6 @@ int gpio_is_valid(int number) int gidx = altera_pio_gidx(number); if (gidx < 0) - return 1; - return 0; + return 0; + return 1; } -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] gpio: s3c2440_gpio: Fix wrong writel arguments
Current code had writel arguments the wrong way around, fix it.
Signed-off-by: Axel Lin
---
Hi,
I don't have this hardware to test, but current code looks obviously wrong.
I'd appreciate if someone can review and test this patch.
Axel
drivers/gpio/s3c2440_gpio.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/s3c2440_gpio.c b/drivers/gpio/s3c2440_gpio.c
index 43bbf11..09b04eb 100644
--- a/drivers/gpio/s3c2440_gpio.c
+++ b/drivers/gpio/s3c2440_gpio.c
@@ -61,7 +61,7 @@ int gpio_set_value(unsigned gpio, int value)
else
l &= ~bit;
- return writel(port, l);
+ return writel(l, port);
}
int gpio_get_value(unsigned gpio)
@@ -85,11 +85,11 @@ int gpio_free(unsigned gpio)
int gpio_direction_input(unsigned gpio)
{
- return writel(GPIO_FULLPORT(gpio), GPIO_INPUT << GPIO_BIT(gpio));
+ return writel(GPIO_INPUT << GPIO_BIT(gpio), GPIO_FULLPORT(gpio));
}
int gpio_direction_output(unsigned gpio, int value)
{
- writel(GPIO_FULLPORT(gpio), GPIO_OUTPUT << GPIO_BIT(gpio));
+ writel(GPIO_OUTPUT << GPIO_BIT(gpio), GPIO_FULLPORT(gpio));
return gpio_set_value(gpio, value);
}
--
1.8.1.2
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[U-Boot] [PATCH] gpio: s5p_gpio: Call s5p_gpio_set_value() instead of open-code
Call s5p_gpio_set_value() to avoid code duplication.
Signed-off-by: Axel Lin
---
drivers/gpio/s5p_gpio.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 656bf4a..4efb768 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -48,15 +48,8 @@ void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio,
int cfg)
void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en)
{
- unsigned int value;
-
s5p_gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
-
- value = readl(&bank->dat);
- value &= ~DAT_MASK(gpio);
- if (en)
- value |= DAT_SET(gpio);
- writel(value, &bank->dat);
+ s5p_gpio_set_value(bank, gpio, en);
}
void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio)
--
1.8.1.2
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[U-Boot] gpio: Question about gpio_set_value() implementation in spear_gpio.c
Current code looks strange because no matter the value argument is 0 or 1
it always calls
writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
And then gpio_get_value() always return 1.
I'm wondering if it needs to be fixed, something like below change:
diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
index d3c728e..8878608 100644
--- a/drivers/gpio/spear_gpio.c
+++ b/drivers/gpio/spear_gpio.c
@@ -52,7 +52,10 @@ int gpio_set_value(unsigned gpio, int value)
{
struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
- writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ if (value)
+ writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ else
+ writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
return 0;
}
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Re: [U-Boot] gpio: Question about gpio_set_value() implementation in spear_gpio.c
2013/6/19 Marek Vasut :
> Dear Axel Lin,
>
>> Current code looks strange because no matter the value argument is 0 or 1
>> it always calls
>> writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>>
>> And then gpio_get_value() always return 1.
>>
>> I'm wondering if it needs to be fixed, something like below change:
>>
>> diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
>> index d3c728e..8878608 100644
>> --- a/drivers/gpio/spear_gpio.c
>> +++ b/drivers/gpio/spear_gpio.c
>> @@ -52,7 +52,10 @@ int gpio_set_value(unsigned gpio, int value)
>> {
>> struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
>>
>> - writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>> + if (value)
>> + writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>> + else
>> + writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>
>
> You might want to use clrbits_le32() and setbits_le32() here, no?
>
Honestly, I ask this because I cannot find the detail datasheet for the gpio
control of this device. ( Just found the code looks strange).
Usually we can use clrbits_le32() and setbits_le32() helpers to set/clear
register bits. But if the only meaningful bit is "1 << gpio", simply use
"write 1 << gpio" and "write 0" saves a register read operation.
So maybe Stefan or someone from ST can provide the information about gpio
control on this hardware.
Regards,
Axel
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[U-Boot] [PATCH] gpio: omap_gpio: Remove check_gpio() function
check_gpio() and gpio_is_valid() are both used to check if a gpio is valid or
not. It looks pointless to have both function because we can just call
gpio_is_valid() instead of check_gpio(). Thus remove check_gpio() function.
Signed-off-by: Axel Lin
---
drivers/gpio/omap_gpio.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index a30d7f0..221acc6 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -58,15 +58,6 @@ int gpio_is_valid(int gpio)
return (gpio >= 0) && (gpio < 192);
}
-static int check_gpio(int gpio)
-{
- if (!gpio_is_valid(gpio)) {
- printf("ERROR : check_gpio: invalid GPIO %d\n", gpio);
- return -1;
- }
- return 0;
-}
-
static void _set_gpio_direction(const struct gpio_bank *bank, int gpio,
int is_input)
{
@@ -142,7 +133,7 @@ int gpio_set_value(unsigned gpio, int value)
{
const struct gpio_bank *bank;
- if (check_gpio(gpio) < 0)
+ if (!gpio_is_valid(gpio))
return -1;
bank = get_gpio_bank(gpio);
_set_gpio_dataout(bank, get_gpio_index(gpio), value);
@@ -159,7 +150,7 @@ int gpio_get_value(unsigned gpio)
void *reg;
int input;
- if (check_gpio(gpio) < 0)
+ if (!gpio_is_valid(gpio))
return -1;
bank = get_gpio_bank(gpio);
reg = bank->base;
@@ -191,7 +182,7 @@ int gpio_direction_input(unsigned gpio)
{
const struct gpio_bank *bank;
- if (check_gpio(gpio) < 0)
+ if (!gpio_is_valid(gpio))
return -1;
bank = get_gpio_bank(gpio);
@@ -207,7 +198,7 @@ int gpio_direction_output(unsigned gpio, int value)
{
const struct gpio_bank *bank;
- if (check_gpio(gpio) < 0)
+ if (!gpio_is_valid(gpio))
return -1;
bank = get_gpio_bank(gpio);
@@ -224,7 +215,7 @@ int gpio_direction_output(unsigned gpio, int value)
*/
int gpio_request(unsigned gpio, const char *label)
{
- if (check_gpio(gpio) < 0)
+ if (!gpio_is_valid(gpio))
return -1;
return 0;
--
1.8.1.2
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[U-Boot] [PATCH] gpio: spear_gpio: Fix gpio_set_value() implementation
In current gpio_set_value() implementation, it always sets the gpio control bit
no matter the value argument is 0 or 1. Thus the GPIOs never set to low.
This patch fixes this bug.
Signed-off-by: Axel Lin
---
drivers/gpio/spear_gpio.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
index d3c728e..8878608 100644
--- a/drivers/gpio/spear_gpio.c
+++ b/drivers/gpio/spear_gpio.c
@@ -52,7 +52,10 @@ int gpio_set_value(unsigned gpio, int value)
{
struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
- writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ if (value)
+ writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ else
+ writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
return 0;
}
--
1.8.1.2
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Re: [U-Boot] [PATCH] gpio: omap_gpio: Remove check_gpio() function
2013/6/20 Nikita Kiryanov
> Hi Axel,
>
>
> On 06/20/2013 04:03 AM, Axel Lin wrote:
>
>> check_gpio() and gpio_is_valid() are both used to check if a gpio is
>> valid or
>> not. It looks pointless to have both function because we can just call
>> gpio_is_valid() instead of check_gpio(). Thus remove check_gpio()
>> function.
>>
>
> I don't see the benefit in this patch.
> The functions clearly exist for different reasons: gpio_is_valid() is
> part of the gpio api, while check_gpio() exists to attach an error
> message to a failed validity check without causing code duplication all
> over omap_gpio.c.
>
How about just showing error in gpio_is_valid() and then remove
check_gpio()?
int gpio_is_valid(int gpio)
{
if ((gpio >= 0) && (gpio < 192))
return 1;
printf("ERROR : invalid GPIO %d\n", gpio);
return 0;
}
> Essentially what you are doing is removing a helpful error message.
My intention is to remove redundant code.
Regards,
Axel
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Re: [U-Boot] [PATCH] gpio: spear_gpio: Fix gpio_set_value() implementation
2013/6/20 Marek Vasut
>
> Dear Axel Lin,
>
> > In current gpio_set_value() implementation, it always sets the gpio control
> > bit no matter the value argument is 0 or 1. Thus the GPIOs never set to
> > low. This patch fixes this bug.
> >
> > Signed-off-by: Axel Lin
> > ---
> > drivers/gpio/spear_gpio.c | 5 -
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
> > index d3c728e..8878608 100644
> > --- a/drivers/gpio/spear_gpio.c
> > +++ b/drivers/gpio/spear_gpio.c
> > @@ -52,7 +52,10 @@ int gpio_set_value(unsigned gpio, int value)
> > {
> > struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
> >
> > - writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
> > + if (value)
> > + writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
> > + else
> > + writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>
> How can this possibly work? Writing 0 to the whole bank will unset all the
> GPIOs, no ?
Because each GPIO is controlled by a register.
And only one bit will be set when set gpio to high.
So it's safe to write 0 for clearing the bit.
Note, the gpio_get_value() implementation also assumes there is only one bit
will be set. ( If this is not true, both gpio_get_value() and gpio_set_value()
need fix.)
Vipin, can you review this patch and confirm this behavior?
Thanks,
Axel
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[U-Boot] [PATCH] gpio: omap_gpio: Fix valid gpio range for AM33XX
AM33XX has 4 gpio banks, thus the valid gpio range should be 0 ... 127.
Signed-off-by: Axel Lin
---
drivers/gpio/omap_gpio.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index a30d7f0..9aa6d41 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -55,7 +55,11 @@ static inline int get_gpio_index(int gpio)
int gpio_is_valid(int gpio)
{
+#if defined(CONFIG_AM33XX)
+ return (gpio >= 0) && (gpio < 128);
+#else
return (gpio >= 0) && (gpio < 192);
+#endif
}
static int check_gpio(int gpio)
--
1.8.1.2
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[U-Boot] [PATCH v2] gpio: omap_gpio: Fix valid gpio range for AM33XX
AM33XX has 4 gpio banks, thus the valid gpio range should be 0 ... 127.
Signed-off-by: Axel Lin
---
v2: define OMAP_MAX_GPIO and use it.
This change is mainly based on Stefan's comment, however I use
OMAP_MAX_GPIO instead of CONFIG_OMAP_MAX_GPIO because having CONFIG_ prefix
seems meaning it can be configurable in configs.
drivers/gpio/omap_gpio.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index a30d7f0..6fa57c9 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -40,6 +40,12 @@
#include
#include
+#if defined(CONFIG_AM33XX)
+#define OMAP_MAX_GPIO 128
+#else
+#define OMAP_MAX_GPIO 192
+#endif
+
#define OMAP_GPIO_DIR_OUT 0
#define OMAP_GPIO_DIR_IN 1
@@ -55,7 +61,7 @@ static inline int get_gpio_index(int gpio)
int gpio_is_valid(int gpio)
{
- return (gpio >= 0) && (gpio < 192);
+ return (gpio >= 0) && (gpio < OMAP_MAX_GPIO);
}
static int check_gpio(int gpio)
--
1.8.1.2
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Re: [U-Boot] [PATCH v2] gpio: omap_gpio: Fix valid gpio range for AM33XX
2013/6/21 Lubomir Popov :
> Hi Axel,
>
> On 21/06/13 06:07, Axel Lin wrote:
>> AM33XX has 4 gpio banks, thus the valid gpio range should be 0 ... 127.
>>
>> Signed-off-by: Axel Lin
>> ---
>> v2: define OMAP_MAX_GPIO and use it.
>> This change is mainly based on Stefan's comment, however I use
>> OMAP_MAX_GPIO instead of CONFIG_OMAP_MAX_GPIO because having CONFIG_ prefix
>> seems meaning it can be configurable in configs.
>>
>> drivers/gpio/omap_gpio.c | 8 +++-
>> 1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
>> index a30d7f0..6fa57c9 100644
>> --- a/drivers/gpio/omap_gpio.c
>> +++ b/drivers/gpio/omap_gpio.c
>> @@ -40,6 +40,12 @@
>> #include
>> #include
>>
>> +#if defined(CONFIG_AM33XX)
>> +#define OMAP_MAX_GPIO128
>> +#else
>> +#define OMAP_MAX_GPIO192
>> +#endif
>
> Please be aware that OMAP54XX and DRA7XX SoCs have 8 banks per 32 GPIOs,
> that is, 256 in total. The DRA7xx config defines CONFIG_DRA7XX, but also
> includes omap5_common.h, where CONFIG_OMAP54XX is defined (due to sharing
> of many internal IPs with the OMAP5, including GPIO). The above definitions
> should be changed to something like:
>
> #if defined(CONFIG_OMAP54XX)
> #define OMAP_MAX_GPIO 256 /* OMAP54XX and DRA7XX */
In arch/arm/cpu/armv7/omap5/hwinit.c
we have below settings:
static struct gpio_bank gpio_bank_54xx[6] = {
{ (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
};
const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
So gpio_bank_54xx only has 6 entries rather than 8 entries.
Seems need to fix this before setting OMAP_MAX_GPIO to 256.
I'm wondering if it's ok to have this patch as is, and then an incremental
patch to set gpio_bank_54xx[] and OMAP_MAX_GPIO for
OMAP54XX and DRA7XX.
Regards,
Axel
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[U-Boot] [PATCH v3 1/2] gpio: omap_gpio: Fix valid gpio range for AM33XX
AM33XX has 4 gpio banks, thus the valid gpio range should be 0 ... 127.
Signed-off-by: Axel Lin
Acked-by: Stefan Roese
---
v2: define OMAP_MAX_GPIO and use it.
v3: no change, just for adding patch 2/2.
drivers/gpio/omap_gpio.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index a30d7f0..6fa57c9 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -40,6 +40,12 @@
#include
#include
+#if defined(CONFIG_AM33XX)
+#define OMAP_MAX_GPIO 128
+#else
+#define OMAP_MAX_GPIO 192
+#endif
+
#define OMAP_GPIO_DIR_OUT 0
#define OMAP_GPIO_DIR_IN 1
@@ -55,7 +61,7 @@ static inline int get_gpio_index(int gpio)
int gpio_is_valid(int gpio)
{
- return (gpio >= 0) && (gpio < 192);
+ return (gpio >= 0) && (gpio < OMAP_MAX_GPIO);
}
static int check_gpio(int gpio)
--
1.8.1.2
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[U-Boot] [PATCH v3 2/2] gpio: omap_gpio: Fix valid GPIO range for OMAP5
OMAP54XX and DRA7XX SoCs have 8 banks per 32 GPIOs, that is, 256 in total.
The DRA7xx config defines CONFIG_DRA7XX, but also includes omap5_common.h,
where CONFIG_OMAP54XX is defined (due to sharing of many internal IPs with
the OMAP5, including GPIO).
Reported-by: Lubomir Popov
Signed-off-by: Axel Lin
---
v3: just a new patch adding to this patch serial.
Hi Lubomir,
I'd appreciate if you can test this patch serial ( mainly for OMAP5 ).
Thanks,
Axel
arch/arm/cpu/armv7/omap5/hwinit.c | 4 +++-
arch/arm/include/asm/arch-omap5/gpio.h | 2 ++
drivers/gpio/omap_gpio.c | 2 ++
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c
b/arch/arm/cpu/armv7/omap5/hwinit.c
index daf124e..11ba36b 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -43,13 +43,15 @@ DECLARE_GLOBAL_DATA_PTR;
u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
-static struct gpio_bank gpio_bank_54xx[6] = {
+static struct gpio_bank gpio_bank_54xx[8] = {
{ (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO7_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO8_BASE, METHOD_GPIO_24XX },
};
const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
diff --git a/arch/arm/include/asm/arch-omap5/gpio.h
b/arch/arm/include/asm/arch-omap5/gpio.h
index c14dff0..f507a35 100644
--- a/arch/arm/include/asm/arch-omap5/gpio.h
+++ b/arch/arm/include/asm/arch-omap5/gpio.h
@@ -46,5 +46,7 @@
#define OMAP54XX_GPIO4_BASE0x48059000
#define OMAP54XX_GPIO5_BASE0x4805B000
#define OMAP54XX_GPIO6_BASE0x4805D000
+#define OMAP54XX_GPIO7_BASE0x48051000
+#define OMAP54XX_GPIO8_BASE0x48053000
#endif /* _GPIO_OMAP5_H */
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index 6fa57c9..0092c13 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -42,6 +42,8 @@
#if defined(CONFIG_AM33XX)
#define OMAP_MAX_GPIO 128
+#elif defined(CONFIG_OMAP54XX)
+#define OMAP_MAX_GPIO 256
#else
#define OMAP_MAX_GPIO 192
#endif
--
1.8.1.2
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Re: [U-Boot] [PATCH v2] gpio: omap_gpio: Fix valid gpio range for AM33XX
2013/6/21 Heiko Schocher : > Hello Lubomir, > > Am 21.06.2013 09:44, schrieb Lubomir Popov: >> One more thing that perhaps seems more reasonable in general: >> >> These OMAP_MAX_GPIO defines could go into the corresponding .../arch-omap*.h >> files, where the base addresses are defined, and the number of GPIOs is >> implicitly obvious. And we shall have no ugly #ifdefs in the GPIO driver. > > This sounds good. I vote for doing it this way ... I'm sending patches base on this idea now... Thanks, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] OMAP5: Fix gpio_bank_54xx setting
OMAP54XX and DRA7XX SoCs have 8 banks per 32 GPIOs, that is, 256 in total.
Fix the gpio bank setting.
Signed-off-by: Axel Lin
---
arch/arm/cpu/armv7/omap5/hwinit.c | 4 +++-
arch/arm/include/asm/arch-omap5/gpio.h | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c
b/arch/arm/cpu/armv7/omap5/hwinit.c
index daf124e..11ba36b 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -43,13 +43,15 @@ DECLARE_GLOBAL_DATA_PTR;
u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
-static struct gpio_bank gpio_bank_54xx[6] = {
+static struct gpio_bank gpio_bank_54xx[8] = {
{ (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO7_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO8_BASE, METHOD_GPIO_24XX },
};
const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
diff --git a/arch/arm/include/asm/arch-omap5/gpio.h
b/arch/arm/include/asm/arch-omap5/gpio.h
index c14dff0..f507a35 100644
--- a/arch/arm/include/asm/arch-omap5/gpio.h
+++ b/arch/arm/include/asm/arch-omap5/gpio.h
@@ -46,5 +46,7 @@
#define OMAP54XX_GPIO4_BASE0x48059000
#define OMAP54XX_GPIO5_BASE0x4805B000
#define OMAP54XX_GPIO6_BASE0x4805D000
+#define OMAP54XX_GPIO7_BASE0x48051000
+#define OMAP54XX_GPIO8_BASE0x48053000
#endif /* _GPIO_OMAP5_H */
--
1.8.1.2
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[U-Boot] [PATCH 2/2] OMAP: gpio: Introduce get_omap_gpio_count() function to get gpio count
Now the omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
These SoCs have various gpio count. Thus introduce get_omap_gpio_count()
function to get correct gpio count.
Signed-off-by: Axel Lin
---
arch/arm/cpu/armv7/am33xx/board.c | 5 +
arch/arm/cpu/armv7/omap3/board.c | 5 +
arch/arm/cpu/armv7/omap4/hwinit.c | 5 +
arch/arm/cpu/armv7/omap5/hwinit.c | 5 +
arch/arm/include/asm/omap_gpio.h | 1 +
drivers/gpio/omap_gpio.c | 2 +-
6 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 885fb2d..405d649 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -51,6 +51,11 @@ static const struct gpio_bank gpio_bank_am33xx[4] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
+unsigned int get_omap_gpio_count(void)
+{
+ return ARRAY_SIZE(gpio_bank_am33xx) * 32;
+}
+
#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
int cpu_mmc_init(bd_t *bis)
{
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index b72fadc..950b13f 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -65,6 +65,11 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+unsigned int get_omap_gpio_count(void)
+{
+ return ARRAY_SIZE(gpio_bank_34xx) * 32;
+}
+
#ifdef CONFIG_SPL_BUILD
/*
* We use static variables because global data is not ready yet.
diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c
b/arch/arm/cpu/armv7/omap4/hwinit.c
index 81f5a48..3212980 100644
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -51,6 +51,11 @@ static const struct gpio_bank gpio_bank_44xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_44xx;
+unsigned int get_omap_gpio_count(void)
+{
+ return ARRAY_SIZE(gpio_bank_44xx) * 32;
+}
+
#ifdef CONFIG_SPL_BUILD
/*
* Some tuning of IOs for optimal power and performance
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c
b/arch/arm/cpu/armv7/omap5/hwinit.c
index 11ba36b..58c77e7 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -56,6 +56,11 @@ static struct gpio_bank gpio_bank_54xx[8] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
+unsigned int get_omap_gpio_count(void)
+{
+ return ARRAY_SIZE(gpio_bank_54xx) * 32;
+}
+
#ifdef CONFIG_SPL_BUILD
/* LPDDR2 specific IO settings */
static void io_settings_lpddr2(void)
diff --git a/arch/arm/include/asm/omap_gpio.h b/arch/arm/include/asm/omap_gpio.h
index 1ebfa86..5e25707 100644
--- a/arch/arm/include/asm/omap_gpio.h
+++ b/arch/arm/include/asm/omap_gpio.h
@@ -46,6 +46,7 @@ struct gpio_bank {
};
extern const struct gpio_bank *const omap_gpio_bank;
+extern unsigned int get_omap_gpio_count(void);
#define METHOD_GPIO_24XX 4
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index a30d7f0..1088803 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -55,7 +55,7 @@ static inline int get_gpio_index(int gpio)
int gpio_is_valid(int gpio)
{
- return (gpio >= 0) && (gpio < 192);
+ return (gpio >= 0) && (gpio < get_omap_gpio_count());
}
static int check_gpio(int gpio)
--
1.8.1.2
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[U-Boot] [PATCH] ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
These SoCs have different gpio count but currently omap_gpio driver uses hard
coded 192 which is wrong.
This patch fixes this issue by:
1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h.
2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5.
Thanks for Lubomir Popov to provide valuable comments to fix this issue.
Signed-off-by: Axel Lin
---
This patch supersedes below patches:
[PATCH v3 1/2] gpio: omap_gpio: Fix valid gpio range for AM33XX [1]
[PATCH v3 2/2] gpio: omap_gpio: Fix valid GPIO range for OMAP5 [2]
[PATCH 1/2] OMAP5: Fix gpio_bank_54xx setting [3]
[PATCH 2/2] OMAP: gpio: Introduce get_omap_gpio_count() function to get gpio
count [4]
[1] http://lists.denx.de/pipermail/u-boot/2013-June/156980.html
[2] http://lists.denx.de/pipermail/u-boot/2013-June/156981.html
[3] http://lists.denx.de/pipermail/u-boot/2013-June/156984.html
[4] http://lists.denx.de/pipermail/u-boot/2013-June/156985.html
Regards,
Axel
arch/arm/cpu/armv7/omap5/hw_data.c | 2 ++
arch/arm/cpu/armv7/omap5/hwinit.c | 4 +++-
arch/arm/include/asm/arch-am33xx/gpio.h | 2 ++
arch/arm/include/asm/arch-omap3/gpio.h | 2 ++
arch/arm/include/asm/arch-omap4/gpio.h | 2 ++
arch/arm/include/asm/arch-omap5/gpio.h | 4
drivers/gpio/omap_gpio.c| 2 +-
7 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
b/arch/arm/cpu/armv7/omap5/hw_data.c
index 56cf1f8..07b1108 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -412,6 +412,8 @@ void enable_basic_clocks(void)
(*prcm)->cm_l4per_gpio4_clkctrl,
(*prcm)->cm_l4per_gpio5_clkctrl,
(*prcm)->cm_l4per_gpio6_clkctrl,
+ (*prcm)->cm_l4per_gpio7_clkctrl,
+ (*prcm)->cm_l4per_gpio8_clkctrl,
0
};
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c
b/arch/arm/cpu/armv7/omap5/hwinit.c
index daf124e..11ba36b 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -43,13 +43,15 @@ DECLARE_GLOBAL_DATA_PTR;
u32 *const omap_si_rev = (u32 *)OMAP_SRAM_SCRATCH_OMAP_REV;
-static struct gpio_bank gpio_bank_54xx[6] = {
+static struct gpio_bank gpio_bank_54xx[8] = {
{ (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
{ (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO7_BASE, METHOD_GPIO_24XX },
+ { (void *)OMAP54XX_GPIO8_BASE, METHOD_GPIO_24XX },
};
const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h
b/arch/arm/include/asm/arch-am33xx/gpio.h
index 1a211e9..8346979 100644
--- a/arch/arm/include/asm/arch-am33xx/gpio.h
+++ b/arch/arm/include/asm/arch-am33xx/gpio.h
@@ -21,6 +21,8 @@
#include
+#define OMAP_MAX_GPIO 128
+
#define AM33XX_GPIO0_BASE 0x44E07000
#define AM33XX_GPIO1_BASE 0x4804C000
#define AM33XX_GPIO2_BASE 0x481AC000
diff --git a/arch/arm/include/asm/arch-omap3/gpio.h
b/arch/arm/include/asm/arch-omap3/gpio.h
index 8bba3b0..d72f5e5 100644
--- a/arch/arm/include/asm/arch-omap3/gpio.h
+++ b/arch/arm/include/asm/arch-omap3/gpio.h
@@ -40,6 +40,8 @@
#include
+#define OMAP_MAX_GPIO 192
+
#define OMAP34XX_GPIO1_BASE0x4831
#define OMAP34XX_GPIO2_BASE0x4905
#define OMAP34XX_GPIO3_BASE0x49052000
diff --git a/arch/arm/include/asm/arch-omap4/gpio.h
b/arch/arm/include/asm/arch-omap4/gpio.h
index 26f19d1..fdf65ed 100644
--- a/arch/arm/include/asm/arch-omap4/gpio.h
+++ b/arch/arm/include/asm/arch-omap4/gpio.h
@@ -40,6 +40,8 @@
#include
+#define OMAP_MAX_GPIO 192
+
#define OMAP44XX_GPIO1_BASE0x4A31
#define OMAP44XX_GPIO2_BASE0x48055000
#define OMAP44XX_GPIO3_BASE0x48057000
diff --git a/arch/arm/include/asm/arch-omap5/gpio.h
b/arch/arm/include/asm/arch-omap5/gpio.h
index c14dff0..7c82f90 100644
--- a/arch/arm/include/asm/arch-omap5/gpio.h
+++ b/arch/arm/include/asm/arch-omap5/gpio.h
@@ -40,11 +40,15 @@
#include
+#define OMAP_MAX_GPIO 256
+
#define OMAP54XX_GPIO1_BASE0x4Ae1
#define OMAP54XX_GPIO2_BASE0x48055000
#define OMAP54XX_GPIO3_BASE0x48057000
#define OMAP54XX_GPIO4_BASE0x48059000
#define OMAP54XX_GPIO5_BASE0x4805B000
#define OMAP54XX_GPIO6_BASE0x4805D000
+#define OMAP54XX_GPIO7_BASE0x48051000
+#define OMAP54XX_GPIO8_BASE0x48053000
#endif /* _GPIO_OMAP5_H */
diff --git a/drivers
[U-Boot] [PATCH] gpio: pca953x: Use ARRAY_SIZE instead of reinventing it
Signed-off-by: Axel Lin
---
drivers/gpio/pca953x.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index be13745..7371cd4 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -47,9 +47,6 @@ struct pca953x_chip_ngpio {
static struct pca953x_chip_ngpio pca953x_chip_ngpios[] =
CONFIG_SYS_I2C_PCA953X_WIDTH;
-#define NUM_CHIP_GPIOS (sizeof(pca953x_chip_ngpios) / \
- sizeof(struct pca953x_chip_ngpio))
-
/*
* Determine the number of GPIO pins supported. If we don't know we assume
* 8 pins.
@@ -58,7 +55,7 @@ static int pca953x_ngpio(uint8_t chip)
{
int i;
- for (i = 0; i < NUM_CHIP_GPIOS; i++)
+ for (i = 0; i < ARRAY_SIZE(pca953x_chip_ngpios); i++)
if (pca953x_chip_ngpios[i].chip == chip)
return pca953x_chip_ngpios[i].ngpio;
--
1.8.1.2
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[U-Boot] [PATCH] cmd_i2c: Use ARRAY_SIZE instead of reinventing it
Signed-off-by: Axel Lin
---
common/cmd_i2c.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 4380794..3215644 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -120,8 +120,6 @@ static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
#endif /* CONFIG_MULTI_BUS */
-
-#define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
#endif
#if defined(CONFIG_I2C_MUX)
@@ -713,7 +711,7 @@ static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv
#if defined(CONFIG_SYS_I2C_NOPROBES)
skip = 0;
- for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
+ for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
skip = 1;
break;
@@ -731,7 +729,7 @@ static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int
argc, char * const argv
#if defined(CONFIG_SYS_I2C_NOPROBES)
puts ("Excluded chip addresses:");
- for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
+ for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
if (COMPARE_BUS(bus,k))
printf(" %02X", NO_PROBE_ADDR(k));
}
--
1.8.1.2
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[U-Boot] [PATCH] serial: Use ARRAY_SIZE instead of reinventing it
Signed-off-by: Axel Lin
---
drivers/serial/serial.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index daa8003..a19cec5 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -37,7 +37,6 @@ static struct serial_device *serial_current;
* Table with supported baudrates (defined in config_xyz.h)
*/
static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
-#defineN_BAUDRATES (sizeof(baudrate_table) / sizeof(baudrate_table[0]))
/**
* serial_null() - Void registration routine of a serial driver
@@ -74,11 +73,11 @@ static int on_baudrate(const char *name, const char *value,
enum env_op op,
if (gd->baudrate == baudrate)
return 0;
- for (i = 0; i < N_BAUDRATES; ++i) {
+ for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) {
if (baudrate == baudrate_table[i])
break;
}
- if (i == N_BAUDRATES) {
+ if (i == ARRAY_SIZE(baudrate_table)) {
if ((flags & H_FORCE) == 0)
printf("## Baudrate %d bps not supported\n",
baudrate);
--
1.8.1.2
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[U-Boot] [PATCH 1/3] hwmon: lm63: Use ARRAY_SIZE at appropriate place
Signed-off-by: Axel Lin
---
drivers/hwmon/lm63.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c
index f3adf64..bb8e644 100644
--- a/drivers/hwmon/lm63.c
+++ b/drivers/hwmon/lm63.c
@@ -133,8 +133,7 @@ int dtt_init_one(int sensor)
/*
* Setup PWM Lookup-Table
*/
- for (i = 0; i < sizeof(pwm_lookup) / sizeof(struct pwm_lookup_entry);
-i++) {
+ for (i = 0; i < ARRAY_SIZE(pwm_lookup); i++) {
int address = DTT_PWM_LOOKUP_BASE + 2 * i;
val = pwm_lookup[i].temp;
if (is_lm64(sensor))
--
1.8.1.2
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[U-Boot] [PATCH 2/3] mtd: cfi_flash: Use ARRAY_SIZE at appropriate places
Signed-off-by: Axel Lin
---
drivers/mtd/cfi_flash.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 25f8752..a13b0b8 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1797,7 +1797,7 @@ static int flash_detect_legacy(phys_addr_t base, int
banknum)
};
int i;
- for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(modes); i++) {
info->vendor = modes[i];
info->start[0] =
(ulong)map_physmem(base,
@@ -1883,8 +1883,7 @@ static int __flash_detect_cfi (flash_info_t * info,
struct cfi_qry *qry)
/* Issue FLASH reset command */
flash_cmd_reset(info);
- for (cfi_offset=0;
-cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
+ for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
cfi_offset++) {
flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
FLASH_CMD_CFI);
@@ -2336,7 +2335,7 @@ void flash_protect_default(void)
#endif
#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
- for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
+ for (i = 0; i < ARRAY_SIZE(apl); i++) {
debug("autoprotecting from %08lx to %08lx\n",
apl[i].start, apl[i].start + apl[i].size - 1);
flash_protect(FLAG_PROTECT_SET,
--
1.8.1.2
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[U-Boot] [PATCH 3/3] usb: musb: Use ARRAY_SIZE at appropriate places
Signed-off-by: Axel Lin
---
drivers/usb/musb/musb_hcd.c | 3 +--
drivers/usb/musb/musb_udc.c | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c
index 60e03a4..7bb91e5 100644
--- a/drivers/usb/musb/musb_hcd.c
+++ b/drivers/usb/musb/musb_hcd.c
@@ -1105,8 +1105,7 @@ int usb_lowlevel_init(int index, void **controller)
/* Configure all the endpoint FIFO's and start usb controller */
musbr = musb_cfg.regs;
- musb_configure_ep(&epinfo[0],
- sizeof(epinfo) / sizeof(struct musb_epinfo));
+ musb_configure_ep(&epinfo[0], ARRAY_SIZE(epinfo));
musb_start();
/*
diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
index e0b4217..e8a2ce0 100644
--- a/drivers/usb/musb/musb_udc.c
+++ b/drivers/usb/musb/musb_udc.c
@@ -894,8 +894,7 @@ void udc_setup_ep(struct usb_device_instance *device,
unsigned int id,
epinfo[id * 2].epsize = endpoint->rcv_packetSize;
}
- musb_configure_ep(&epinfo[0],
- sizeof(epinfo) / sizeof(struct musb_epinfo));
+ musb_configure_ep(&epinfo[0], ARRAY_SIZE(epinfo));
} else {
if (debug_level > 0)
serial_printf("ERROR : %s endpoint request %d "
--
1.8.1.2
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Re: [U-Boot] [PATCH] cmd_i2c: Use ARRAY_SIZE instead of reinventing it
2013/6/25 Simon Glass : > On Sat, Jun 22, 2013 at 6:56 AM, Axel Lin wrote: >> >> Signed-off-by: Axel Lin > > > Missing commit message? Because the subject line is already very clear. And tools/checkpatch.pl does not complaint. > > Otherwise: > > Acked-by: Simon Glass > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] blackfin: gpio: Unreserve gpio in special_gpio_free()
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by: Axel Lin --- arch/blackfin/cpu/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/blackfin/cpu/gpio.c b/arch/blackfin/cpu/gpio.c index f74a0b7..a4d10d5 100644 --- a/arch/blackfin/cpu/gpio.c +++ b/arch/blackfin/cpu/gpio.c @@ -662,8 +662,8 @@ void special_gpio_free(unsigned gpio) return; } - reserve(special_gpio, gpio); - reserve(peri, gpio); + unreserve(special_gpio, gpio); + unreserve(peri, gpio); set_label(gpio, "free"); } #endif -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] gpio: adi_gpio2: Unreserve gpio in special_gpio_free()
In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by: Axel Lin --- drivers/gpio/adi_gpio2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c index 7a034eb..051073c 100644 --- a/drivers/gpio/adi_gpio2.c +++ b/drivers/gpio/adi_gpio2.c @@ -352,8 +352,8 @@ void special_gpio_free(unsigned gpio) return; } - reserve(special_gpio, gpio); - reserve(peri, gpio); + unreserve(special_gpio, gpio); + unreserve(peri, gpio); set_label(gpio, "free"); } #endif -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] blackfin: gpio: Use proper mask for comparing function
The function return from P_FUNCT2MUX(per) takes 2 bits, however
for BF537_FAMILY with offset != 1 the function is 1 bit.
Also has small refactor for better readability.
In portmux_setup(), it looks odd having "muxreg &= ~(3 << 1);"
while in current code we do muxreg |= (function << offset);.
Signed-off-by: Axel Lin
---
arch/blackfin/cpu/gpio.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/blackfin/cpu/gpio.c b/arch/blackfin/cpu/gpio.c
index f74a0b7..c4cddaf 100644
--- a/arch/blackfin/cpu/gpio.c
+++ b/arch/blackfin/cpu/gpio.c
@@ -247,7 +247,7 @@ static struct {
static void portmux_setup(unsigned short per)
{
- u16 y, offset, muxreg;
+ u16 y, offset, muxreg, mask;
u16 function = P_FUNCT2MUX(per);
for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
@@ -258,12 +258,13 @@ static void portmux_setup(unsigned short per)
offset = port_mux_lut[y].offset;
muxreg = bfin_read_PORT_MUX();
- if (offset != 1)
- muxreg &= ~(1 << offset);
+ if (offset == 1)
+ mask = 3;
else
- muxreg &= ~(3 << 1);
+ mask = 1;
- muxreg |= (function << offset);
+ muxreg &= ~(mask << offset);
+ muxreg |= ((function & mask) << offset);
bfin_write_PORT_MUX(muxreg);
}
}
--
1.8.1.2
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[U-Boot] [PATCH] blackfin: Fix using gd->baudrate before setting its value
Current code uses gd->baudrate before setting its value.
Besides, I got below build warning which is introduced by
commit ddb5c5be "blackfin: add baudrate to bdinfo".
board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes pointer
from integer without a cast [enabled by default]
include/vsprintf.h:27:7: note: expected 'const char *' but argument is of type
'unsigned int'
This patch moves the code using gd->baudrate to be after init_baudrate() call,
this ensures we get the baudrate setting before using it.
Signed-off-by: Axel Lin
---
I forgot to CC u-boot mail list. here is a resend.
Hi,
I don't have this hardware to test.
I'd appreciate if someone can test it.
Thanks,
Axel
arch/blackfin/lib/board.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index f1d5547..9e2e9de 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -231,8 +231,6 @@ static int global_board_data_init(void)
bd->bi_sclk = get_sclk();
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
- bd->bi_baudrate = (gd->baudrate > 0)
- ? simple_strtoul(gd->baudrate, NULL, 10) : CONFIG_BAUDRATE;
return 0;
}
@@ -299,6 +297,7 @@ void board_init_f(ulong bootflag)
env_init();
serial_early_puts("Baudrate init\n");
init_baudrate();
+ gd->bd->bi_baudrate = gd->baudrate;
serial_early_puts("Serial init\n");
serial_init();
serial_initialize();
--
1.8.1.2
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Re: [U-Boot] [PATCH] blackfin: Fix using gd->baudrate before setting its value
2013/6/29 Marek Vasut : > Dear Axel Lin, > >> Current code uses gd->baudrate before setting its value. >> Besides, I got below build warning which is introduced by >> commit ddb5c5be "blackfin: add baudrate to bdinfo". >> >> board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes >> pointer from integer without a cast [enabled by default] >> include/vsprintf.h:27:7: note: expected 'const char *' but argument is of >> type 'unsigned int' >> >> This patch moves the code using gd->baudrate to be after init_baudrate() >> call, this ensures we get the baudrate setting before using it. >> >> Signed-off-by: Axel Lin >> --- >> I forgot to CC u-boot mail list. here is a resend. >> >> Hi, >> I don't have this hardware to test. >> I'd appreciate if someone can test it. >> >> Thanks, >> Axel >> arch/blackfin/lib/board.c | 3 +-- >> 1 file changed, 1 insertion(+), 2 deletions(-) >> >> diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c >> index f1d5547..9e2e9de 100644 >> --- a/arch/blackfin/lib/board.c >> +++ b/arch/blackfin/lib/board.c >> @@ -231,8 +231,6 @@ static int global_board_data_init(void) >> bd->bi_sclk = get_sclk(); >> bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; >> bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; >> - bd->bi_baudrate = (gd->baudrate > 0) >> - ? simple_strtoul(gd->baudrate, NULL, 10) : CONFIG_BAUDRATE; > > > I'd rather say the fix here is to use (gd->baudrate > 0) ? gd->baudrate ? > CONFIG_BAUDRATE ; > > Otherwise you're changing the logic of the code and for that, you'd need > Mikes' > ack. Hi Marek, It's because gd->baudrate is set in init_baudrate(). And if it is not found in an environment variable, the default is CONFIG_BAUDRATE. It's unlikely gd->baudrate is 0. So if we have below code: init_baudrate(); gd->bd->bi_baudrate = (gd->baudrate > 0) ? gd->baudrate : CONFIG_BAUDRATE; In an unlikely case where baudrate environment variable is set to 0, then we have inconsistency setting: gd->baudrate = 0; gd->bd->bi_baudrate = CONFIG_BAUDRATE; Comments? Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] net: Use ARRAY_SIZE at appropriate places
Use ARRAY_SIZE instead of having similar implementation in each drivers.
Signed-off-by: Axel Lin
Cc: Albert Aribaud
Cc: Ben Warren
Cc: Jean-Christophe PLAGNIOL-VILLARD
Cc: Joe Hershberger
Cc: Marek Vasut
Cc: Mike Frysinger
Cc: Nobuhiro Iwamatsu
Cc: TsiChungLiew
Cc: Wolfgang Denk
Cc: York Sun
---
Hi,
tools/checkpatch.pl shows
total: 2 errors, 12 warnings, 0 checks, 89 lines checked
The errors are:
ERROR: code indent should use tabs where possible
The warnings are something like below:
WARNING: line over 80 characters
WARNING: please, no spaces at the start of a line
WARNING: Avoid CamelCase:
I don't fixup the checkpatch.pl issues because I feel having the patch
as is seems cleaner.
Regards,
Axel
drivers/net/ax88180.c | 2 +-
drivers/net/fsl_mcdmafec.c| 2 +-
drivers/net/lan91c96.c| 2 +-
drivers/net/mcffec.c | 2 +-
drivers/net/mcfmii.c | 2 +-
drivers/net/ne2000.c | 2 +-
drivers/net/npe/IxEthDBFeatures.c | 4 ++--
drivers/net/npe/IxOsalIoMem.c | 3 +--
drivers/net/npe/include/IxEthDBPortDefs.h | 2 +-
drivers/net/npe/include/IxOsalTypes.h | 2 +-
10 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c
index f501768..7f0cfe5 100644
--- a/drivers/net/ax88180.c
+++ b/drivers/net/ax88180.c
@@ -157,7 +157,7 @@ static void ax88180_mac_reset (struct eth_device *dev)
OUTW (dev, MISC_RESET_MAC, MISC);
tmpval = INW (dev, MISC);
- for (i = 0; i < (sizeof (program_seq) / sizeof (program_seq[0])); i++)
+ for (i = 0; i < ARRAY_SIZE(program_seq); i++)
OUTW (dev, program_seq[i].value, program_seq[i].offset);
}
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
index 63842cd..0e18764 100644
--- a/drivers/net/fsl_mcdmafec.c
+++ b/drivers/net/fsl_mcdmafec.c
@@ -520,7 +520,7 @@ int mcdmafec_initialize(bd_t * bis)
u32 tmp = CONFIG_SYS_INTSRAM + 0x2000;
#endif
- for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(fec_info); i++) {
dev =
(struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE,
diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c
index 11d350e..47c15c4 100644
--- a/drivers/net/lan91c96.c
+++ b/drivers/net/lan91c96.c
@@ -779,7 +779,7 @@ static int lan91c96_detect_chip(struct eth_device *dev)
SMC_SELECT_BANK(dev, 3);
chip_id = (SMC_inw(dev, 0xA) & LAN91C96_REV_CHIPID) >> 4;
SMC_SELECT_BANK(dev, 0);
- for (r = 0; r < sizeof(supported_chips) / sizeof(struct id_type); r++)
+ for (r = 0; r < ARRAY_SIZE(supported_chips); r++)
if (chip_id == supported_chips[r].id)
return r;
return 0;
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index ed7459c..7ae6320 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -559,7 +559,7 @@ int mcffec_initialize(bd_t * bis)
u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000;
#endif
- for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(fec_info); i++) {
dev =
(struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE,
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
index 5e64dbd..63bc8f8 100644
--- a/drivers/net/mcfmii.c
+++ b/drivers/net/mcfmii.c
@@ -186,7 +186,7 @@ int mii_discover_phy(struct eth_device *dev)
printf("PHY @ 0x%x pass %d\n", phyno, pass);
#endif
- for (i = 0; (i < (sizeof(phyinfo) / sizeof(phy_info_t)))
+ for (i = 0; (i < ARRAY_SIZE(phyinfo))
&& (phyinfo[i].phyid != 0); i++) {
if (phyinfo[i].phyid == phytype) {
#ifdef ET_DEBUG
diff --git a/drivers/net/ne2000.c b/drivers/net/ne2000.c
index 3939158..e6cd3e9 100644
--- a/drivers/net/ne2000.c
+++ b/drivers/net/ne2000.c
@@ -228,7 +228,7 @@ int get_prom(u8* mac_addr, u8* base_addr)
mdelay (10);
- for (i = 0; i < sizeof (program_seq) / sizeof (program_seq[0]); i++)
+ for (i = 0; i < ARRAY_SIZE(program_seq); i++)
n2k_outb (program_seq[i].value, program_seq[i].offset);
PRINTK ("PROM:");
diff --git a/drivers/net/npe/IxEthDBFeatures.c
b/drivers/net/npe/IxEthDBFeatures.c
index c5b680a..ecabec5 100644
--- a/drivers/net/npe/IxEthDBFeatures.c
+++ b/drivers/net/npe/IxEthDBFeatures.c
@@ -144,7 +144,7 @@ void ixEthDBFeatureCapabilityScan(void)
/* find the traffic class definition index compatible with the
current NPE A functionality ID */
for (trafficClassDefinitionIndex = 0 ;
-trafficClassDefinitionIndex < s
Re: [U-Boot] [PATCH] net: Use ARRAY_SIZE at appropriate places
2013/6/30 Marek Vasut : > Dear Axel Lin, > >> Use ARRAY_SIZE instead of having similar implementation in each drivers. >> >> Signed-off-by: Axel Lin >> Cc: Albert Aribaud >> Cc: Ben Warren >> Cc: Jean-Christophe PLAGNIOL-VILLARD >> Cc: Joe Hershberger >> Cc: Marek Vasut >> Cc: Mike Frysinger >> Cc: Nobuhiro Iwamatsu >> Cc: TsiChungLiew >> Cc: Wolfgang Denk >> Cc: York Sun > > You can trim the CC a bit next time ;-) Hi Marek, I try to cc related people. the maintainers, the driver authers, and developer who is active in recent commits. Is there a smarter way to find who should be CCed? Some tool like get_maintainer.pl used in linux kernel may help. Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] net: Use ARRAY_SIZE at appropriate places
Use ARRAY_SIZE instead of having similar implementation in each drivers.
Signed-off-by: Axel Lin
Cc: Albert Aribaud
Cc: Ben Warren
Cc: Jean-Christophe PLAGNIOL-VILLARD
Cc: Joe Hershberger
Cc: Marek Vasut
Cc: Mike Frysinger
Cc: Nobuhiro Iwamatsu
Cc: TsiChungLiew
Cc: Wolfgang Denk
Cc: York Sun
Signed-off-by: Axel Lin
---
Hi Jagan Teki,
This is v2 per your request.
v2:
Fix checkpatch issues, now checkpatch only shows below warnings:
a few WARNING: Avoid CamelCase
and a WARNING: line over 80 characters
#134: FILE: drivers/net/npe/IxEthDBFeatures.c:150:
+ if
(ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX]
== npeAImageId.functionalityId) {
Obviously, I prefer v1 for below reasons:
1. The diff in v2 becomes bigger and makes it harder for review.
2. The whole file in drivers/net/npe/IxEthDBFeatures.c uses 4 spaces as indent,
only the lines touched by this patch uses tab as indent (to make checkpatch
happy).
This makes the code looks odd after apply v2, I don't think this is an
improvement.
Well, it's up to maintainer to pick up the version he prefer.
Regards,
Axel
drivers/net/ax88180.c | 2 +-
drivers/net/fsl_mcdmafec.c| 2 +-
drivers/net/lan91c96.c| 2 +-
drivers/net/mcffec.c | 2 +-
drivers/net/mcfmii.c | 2 +-
drivers/net/ne2000.c | 2 +-
drivers/net/npe/IxEthDBFeatures.c | 28 ++--
drivers/net/npe/IxOsalIoMem.c | 3 +--
drivers/net/npe/include/IxEthDBPortDefs.h | 2 +-
drivers/net/npe/include/IxOsalTypes.h | 2 +-
10 files changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c
index f501768..7f0cfe5 100644
--- a/drivers/net/ax88180.c
+++ b/drivers/net/ax88180.c
@@ -157,7 +157,7 @@ static void ax88180_mac_reset (struct eth_device *dev)
OUTW (dev, MISC_RESET_MAC, MISC);
tmpval = INW (dev, MISC);
- for (i = 0; i < (sizeof (program_seq) / sizeof (program_seq[0])); i++)
+ for (i = 0; i < ARRAY_SIZE(program_seq); i++)
OUTW (dev, program_seq[i].value, program_seq[i].offset);
}
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
index 63842cd..0e18764 100644
--- a/drivers/net/fsl_mcdmafec.c
+++ b/drivers/net/fsl_mcdmafec.c
@@ -520,7 +520,7 @@ int mcdmafec_initialize(bd_t * bis)
u32 tmp = CONFIG_SYS_INTSRAM + 0x2000;
#endif
- for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(fec_info); i++) {
dev =
(struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE,
diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c
index 11d350e..47c15c4 100644
--- a/drivers/net/lan91c96.c
+++ b/drivers/net/lan91c96.c
@@ -779,7 +779,7 @@ static int lan91c96_detect_chip(struct eth_device *dev)
SMC_SELECT_BANK(dev, 3);
chip_id = (SMC_inw(dev, 0xA) & LAN91C96_REV_CHIPID) >> 4;
SMC_SELECT_BANK(dev, 0);
- for (r = 0; r < sizeof(supported_chips) / sizeof(struct id_type); r++)
+ for (r = 0; r < ARRAY_SIZE(supported_chips); r++)
if (chip_id == supported_chips[r].id)
return r;
return 0;
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index ed7459c..7ae6320 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -559,7 +559,7 @@ int mcffec_initialize(bd_t * bis)
u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000;
#endif
- for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(fec_info); i++) {
dev =
(struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE,
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
index 5e64dbd..63bc8f8 100644
--- a/drivers/net/mcfmii.c
+++ b/drivers/net/mcfmii.c
@@ -186,7 +186,7 @@ int mii_discover_phy(struct eth_device *dev)
printf("PHY @ 0x%x pass %d\n", phyno, pass);
#endif
- for (i = 0; (i < (sizeof(phyinfo) / sizeof(phy_info_t)))
+ for (i = 0; (i < ARRAY_SIZE(phyinfo))
&& (phyinfo[i].phyid != 0); i++) {
if (phyinfo[i].phyid == phytype) {
#ifdef ET_DEBUG
diff --git a/drivers/net/ne2000.c b/drivers/net/ne2000.c
index 3939158..e6cd3e9 100644
--- a/drivers/net/ne2000.c
+++ b/drivers/net/ne2000.c
@@ -228,7 +228,7 @@ int get_prom(u8* mac_addr, u8* base_addr)
mdelay (10);
- for (i = 0; i < sizeof (program_seq) / sizeof (program_seq[0]); i++)
+ for (i = 0; i < ARRAY_SIZE(program_seq); i++)
n2k_outb (program_seq[i].value, program_seq[i].offset);
PRINTK ("PROM:");
diff --git a/
Re: [U-Boot] [PATCH] net: Use ARRAY_SIZE at appropriate places
>> diff --git a/drivers/net/npe/include/IxOsalTypes.h >> b/drivers/net/npe/include/IxOsalTypes.h index 06e71de..615c655 100644 >> --- a/drivers/net/npe/include/IxOsalTypes.h >> +++ b/drivers/net/npe/include/IxOsalTypes.h >> @@ -93,7 +93,7 @@ typedef volatile INT32 VINT32; >> >> >> #ifndef NUMELEMS >> -#define NUMELEMS(x) (sizeof(x) / sizeof((x)[0])) >> +#define NUMELEMS(x) ARRAY_SIZE(x) >> #endif > > Just kill this macro altogether please. Ah, yes. I missed your comment here when I reply the mail. NUMELEMS is not used at all so it can be removed. Will fix it in v3. I just sent v2 per Jagan Teki's request. I think I'll wait for Jagan Teki's feedback before sending v3. Thanks for the review. Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] gpio: spear_gpio: Fix gpio_set_value() implementation
2013/6/21 Michael Trimarchi :
> On 06/21/2013 06:40 AM, Vipin Kumar wrote:
>> On 6/20/2013 7:26 PM, Axel Lin wrote:
>>> 2013/6/20 Marek Vasut
>>>>
>>>> Dear Axel Lin,
>>>>
>>>>> In current gpio_set_value() implementation, it always sets the gpio
>>>>> control
>>>>> bit no matter the value argument is 0 or 1. Thus the GPIOs never set to
>>>>> low. This patch fixes this bug.
>>>>>
>>>>> Signed-off-by: Axel Lin
>>>>> ---
>>>>> drivers/gpio/spear_gpio.c | 5 -
>>>>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
>>>>> index d3c728e..8878608 100644
>>>>> --- a/drivers/gpio/spear_gpio.c
>>>>> +++ b/drivers/gpio/spear_gpio.c
>>>>> @@ -52,7 +52,10 @@ int gpio_set_value(unsigned gpio, int value)
>>>>> {
>>>>>struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
>>>>>
>>>>> - writel(1<< gpio,®s->gpiodata[DATA_REG_ADDR(gpio)]);
>>>>> + if (value)
>>>>> + writel(1<< gpio,®s->gpiodata[DATA_REG_ADDR(gpio)]);
>>>>> + else
>>>>> + writel(0,®s->gpiodata[DATA_REG_ADDR(gpio)]);
>>>>
>>>> How can this possibly work? Writing 0 to the whole bank will unset all the
>>>> GPIOs, no ?
>>>
>>>
>>> Because each GPIO is controlled by a register.
>>> And only one bit will be set when set gpio to high.
>>>
>>> So it's safe to write 0 for clearing the bit.
>>>
>>> Note, the gpio_get_value() implementation also assumes there is only one bit
>>> will be set. ( If this is not true, both gpio_get_value() and
>>> gpio_set_value()
>>> need fix.)
>>>
>>> Vipin, can you review this patch and confirm this behavior?
>>>
>>
>> Yes this is right. and the code is fine
>>
>
> The problem is not in set one bit but in reset one bit. Can you check
> the else path?
Hi,
I'm not the best person to answer this question because I don't have the
hardware and datasheet.
In the case only one bit is meaningful and the reset bits are 0,
it looks ok for me to write 0 for clearing the bit.
( note, each gpio pin is controlled by different register.)
This patch is acked and reviewed by Stefan Roese and Vipin Kumar.
I'm wondering if this patch is acceptable?
Or maybe a test-by can help to make this patch acceptable?
Regards,
Axel
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[U-Boot] [PATCH] gpio: spear_gpio: Remove unused gpio_toggle_value() function
There is no user calling this function, thus remove it.
Signed-off-by: Axel Lin
---
drivers/gpio/spear_gpio.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
index d3c728e..5b5521e 100644
--- a/drivers/gpio/spear_gpio.c
+++ b/drivers/gpio/spear_gpio.c
@@ -80,11 +80,6 @@ int gpio_free(unsigned gpio)
return 0;
}
-void gpio_toggle_value(unsigned gpio)
-{
- gpio_set_value(gpio, !gpio_get_value(gpio));
-}
-
int gpio_direction_input(unsigned gpio)
{
return gpio_direction(gpio, GPIO_DIRECTION_IN);
--
1.8.1.2
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Re: [U-Boot] [PATCH] gpio: spear_gpio: Fix gpio_set_value() implementation
2013/6/30 Michael Trimarchi :
> Hi
> Il giorno 30/giu/2013 06:18, "Axel Lin" ha scritto:
>
>
>>
>> 2013/6/21 Michael Trimarchi :
>> > On 06/21/2013 06:40 AM, Vipin Kumar wrote:
>> >> On 6/20/2013 7:26 PM, Axel Lin wrote:
>> >>> 2013/6/20 Marek Vasut
>> >>>>
>> >>>> Dear Axel Lin,
>> >>>>
>> >>>>> In current gpio_set_value() implementation, it always sets the gpio
>> >>>>> control
>> >>>>> bit no matter the value argument is 0 or 1. Thus the GPIOs never set
>> >>>>> to
>> >>>>> low. This patch fixes this bug.
>> >>>>>
>> >>>>> Signed-off-by: Axel Lin
>> >>>>> ---
>> >>>>> drivers/gpio/spear_gpio.c | 5 -
>> >>>>> 1 file changed, 4 insertions(+), 1 deletion(-)
>> >>>>>
>> >>>>> diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
>> >>>>> index d3c728e..8878608 100644
>> >>>>> --- a/drivers/gpio/spear_gpio.c
>> >>>>> +++ b/drivers/gpio/spear_gpio.c
>> >>>>> @@ -52,7 +52,10 @@ int gpio_set_value(unsigned gpio, int value)
>> >>>>> {
>> >>>>>struct gpio_regs *regs = (struct gpio_regs
>> >>>>> *)CONFIG_GPIO_BASE;
>> >>>>>
>> >>>>> - writel(1<< gpio,®s->gpiodata[DATA_REG_ADDR(gpio)]);
>> >>>>> + if (value)
>> >>>>> + writel(1<<
>> >>>>> gpio,®s->gpiodata[DATA_REG_ADDR(gpio)]);
>> >>>>> + else
>> >>>>> + writel(0,®s->gpiodata[DATA_REG_ADDR(gpio)]);
>> >>>>
>> >>>> How can this possibly work? Writing 0 to the whole bank will unset
>> >>>> all the
>> >>>> GPIOs, no ?
>> >>>
>> >>>
>> >>> Because each GPIO is controlled by a register.
>> >>> And only one bit will be set when set gpio to high.
>> >>>
>> >>> So it's safe to write 0 for clearing the bit.
>> >>>
>> >>> Note, the gpio_get_value() implementation also assumes there is only
>> >>> one bit
>> >>> will be set. ( If this is not true, both gpio_get_value() and
>> >>> gpio_set_value()
>> >>> need fix.)
>> >>>
>> >>> Vipin, can you review this patch and confirm this behavior?
>> >>>
>> >>
>> >> Yes this is right. and the code is fine
>> >>
>> >
>> > The problem is not in set one bit but in reset one bit. Can you check
>> > the else path?
>>
>> Hi,
>> I'm not the best person to answer this question because I don't have the
>> hardware and datasheet.
>> In the case only one bit is meaningful and the reset bits are 0,
>> it looks ok for me to write 0 for clearing the bit.
>> ( note, each gpio pin is controlled by different register.)
>>
>> This patch is acked and reviewed by Stefan Roese and Vipin Kumar.
>> I'm wondering if this patch is acceptable?
>> Or maybe a test-by can help to make this patch acceptable?
>>
>
> If each pin is controlled by a different register why you need to 1< set path?
Because the meaningful bit for different register is different.
>
> And how it works for gpio 33?
SPEAR_GPIO_COUNT is 8, so this driver only allows setting gpio0 ~ gpio7.
Vipin, any chance to double check the datasheet and confirm if this patch is ok?
Regards,
Axel
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Re: [U-Boot] [PATCH] blackfin: Fix using gd->baudrate before setting its value
2013/7/1 Sonic Zhang :
> Hi Axel,
>
> On Sat, Jun 29, 2013 at 8:34 AM, Axel Lin wrote:
>> Current code uses gd->baudrate before setting its value.
>> Besides, I got below build warning which is introduced by
>> commit ddb5c5be "blackfin: add baudrate to bdinfo".
>>
>> board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes pointer
>> from integer without a cast [enabled by default]
>> include/vsprintf.h:27:7: note: expected 'const char *' but argument is of
>> type 'unsigned int'
>>
>> This patch moves the code using gd->baudrate to be after init_baudrate()
>> call,
>> this ensures we get the baudrate setting before using it.
>>
>> Signed-off-by: Axel Lin
>> ---
>> I forgot to CC u-boot mail list. here is a resend.
>>
>> Hi,
>> I don't have this hardware to test.
>> I'd appreciate if someone can test it.
>>
>> Thanks,
>> Axel
>> arch/blackfin/lib/board.c | 3 +--
>> 1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
>> index f1d5547..9e2e9de 100644
>> --- a/arch/blackfin/lib/board.c
>> +++ b/arch/blackfin/lib/board.c
>> @@ -231,8 +231,6 @@ static int global_board_data_init(void)
>> bd->bi_sclk = get_sclk();
>> bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
>> bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
>> - bd->bi_baudrate = (gd->baudrate > 0)
>> - ? simple_strtoul(gd->baudrate, NULL, 10) : CONFIG_BAUDRATE;
>>
>> return 0;
>> }
>> @@ -299,6 +297,7 @@ void board_init_f(ulong bootflag)
>> env_init();
>> serial_early_puts("Baudrate init\n");
>> init_baudrate();
>> + gd->bd->bi_baudrate = gd->baudrate;
>
> I prefer to move this line into init_baudrate().
hi Sonic,
$ grep -r "int init_baudrate" -A 4 arch
It shows we have the same implementation for all supported architectures.
So I think init_baudrate() may be moved to a common place in the future.
I pernsonal prefer keep the code as is in this patch.
But if you insist on moving this line into init_baudrate(), I have no problem
to send a v2. Just let me know how do you think.
Thanks for the review,
Axel
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[U-Boot] [PATCH v2] blackfin: Fix using gd->baudrate before setting its value
Current code uses gd->baudrate before setting its value.
Besides, I got below build warning which is introduced by
commit ddb5c5be "blackfin: add baudrate to bdinfo".
board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes pointer
from integer without a cast [enabled by default]
include/vsprintf.h:27:7: note: expected 'const char *' but argument is of type
'unsigned int'
This patch ensures we get the baudrate setting before using it.
Signed-off-by: Axel Lin
---
v2: The change is based on Sonic 's suggestion:
move "gd->bd->bi_baudrate = gd->baudrate;" into init_baudrate()
arch/blackfin/lib/board.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index f1d5547..460c97d 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -63,6 +63,7 @@ static int display_banner(void)
static int init_baudrate(void)
{
gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
+ gd->bd->bi_baudrate = gd->baudrate;
return 0;
}
@@ -231,8 +232,6 @@ static int global_board_data_init(void)
bd->bi_sclk = get_sclk();
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
- bd->bi_baudrate = (gd->baudrate > 0)
- ? simple_strtoul(gd->baudrate, NULL, 10) : CONFIG_BAUDRATE;
return 0;
}
--
1.8.1.2
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Re: [U-Boot] [PATCH] gpio: spear_gpio: Fix gpio_set_value() implementation
>
> The questions raised here are valid and it forced me to re-read the
> datasheet. For your convenience, I must tell you that the device is actually
> pl061 from ARM, so the driver can also be named so.
>
> The datasheet is here
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0190b/I1002697.html
>
> Quoting from the datasheet
> "The GPIODATA register is the data register. In software control mode,
> values written in the GPIODATA register are transferred onto the GPOUT pins
> if the respective pins have been configured as outputs through the GPIODIR
> register.
>
> In order to write to GPIODATA, the corresponding bits in the mask, resulting
> from the address bus, PADDR[9:2], must be HIGH. Otherwise the bit values
> remain unchanged by the write.
>
> Similarly, the values read from this register are determined for each bit,
> by the mask bit derived from the address used to access the data register,
> PADDR[9:2]. Bits that are 1 in the address mask cause the corresponding bits
> in GPIODATA to be read, and bits that are 0 in the address mask cause the
> corresponding bits in GPIODATA to be read as 0, regardless of their value.
>
> A read from GPIODATA returns the last bit value written if the respective
> pins are configured as output, or it returns the value on the corresponding
> input GPIN bit when these are configured as inputs. All bits are cleared by
> a reset."
>
> After reading all this I am confused about numbering of the gpio's. I think
> the numbering should be from 1 to 8 for a device. And this would mean that
> we should write to *®s->datareg[1 << (gpio - 1)]* instead of the present
> code which is _®s->datareg[1 << (gpio + 2)]_
Hi Vipin,
Thanks for the review and providing the datasheet information.
You mentioned that this is PL061.
So... I just checked the gpio-pl061 driver in linux kernel.
It's writing to _®s->datareg[1 << (gpio + 2)]. and seems no bug
report for this.
And the gpio_get/set implementation in linux kernel has the same behavior as
this patch does:
( below is from linux/drivers/gpio/gpio-pl061.c )
static int pl061_get_value(struct gpio_chip *gc, unsigned offset)
{
struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
return !!readb(chip->base + (1 << (offset + 2)));
}
static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value)
{
struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
writeb(!!value << offset, chip->base + (1 << (offset + 2)));
}
BTW, it would be great if you have the hardware to test.
Regards,
Axel
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Re: [U-Boot] [PATCH v2] net: Use ARRAY_SIZE at appropriate places
>>> diff --git a/drivers/net/npe/IxEthDBFeatures.c
>>> b/drivers/net/npe/IxEthDBFeatures.c
>>> index c5b680a..d43efaa 100644
>>> --- a/drivers/net/npe/IxEthDBFeatures.c
>>> +++ b/drivers/net/npe/IxEthDBFeatures.c
>>> @@ -143,22 +143,22 @@ void ixEthDBFeatureCapabilityScan(void)
>>> IX_ENSURE(sizeof (ixEthDBTrafficClassDefinitions) != 0,
>>> "DB: no traffic class definitions found, check IxEthDBQoS.h");
>>>
>>> /* find the traffic class definition index compatible with
>>> the current NPE A functionality ID */
>>> -for (trafficClassDefinitionIndex = 0 ;
>>> -trafficClassDefinitionIndex < sizeof
>>> (ixEthDBTrafficClassDefinitions) / sizeof
>>> (ixEthDBTrafficClassDefinitions[0]);
>>> -trafficClassDefinitionIndex++)
>>> -{
>>> -if
>>> (ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX]
>>> == npeAImageId.functionalityId)
>>> -{
>>> -/* found it */
>>> -break;
>>> -}
>>> -}
>>> + for (trafficClassDefinitionIndex = 0;
>>> + trafficClassDefinitionIndex <
>>> + ARRAY_SIZE(ixEthDBTrafficClassDefinitions);
>>> + trafficClassDefinitionIndex++) {
>>> + if
>>> (ixEthDBTrafficClassDefinitions[trafficClassDefinitionIndex][IX_ETH_DB_NPE_A_FUNCTIONALITY_ID_INDEX]
>>> == npeAImageId.functionalityId) {
>>> + /* found it */
>>> + break;
>>> + }
>>> + }
>>>
>> Above for loop along with if should be a block separable, means
>>
>> for (trafficClassDefinitionIndex = 0;
>> trafficClassDefinitionIndex <
>> ARRAY_SIZE(ixEthDBTrafficClassDefinitions);
>> trafficClassDefinitionIndex++) {
>> if (..) {
>
> Previous msg sent intermediately,
>
> See my exact comment here.
>
> for (trafficClassDefinitionIndex = 0;
>trafficClassDefinitionIndex <
>ARRAY_SIZE(ixEthDBTrafficClassDefinitions);
>trafficClassDefinitionIndex++) {
>if (..) {
>
> The above way is easy to understand where the code block starts, It
> just my opinion you may find the different way
> but it should be understandable where should code block start for a
> given condition statement.
>
Hi Jagan,
I thogut I just proved v2 is worse than v1, but obviously you don't think so.
In v1:
drivers/net/npe/IxEthDBFeatures.c | 4 ++--
In v2:
drivers/net/npe/IxEthDBFeatures.c | 28 ++--
The intention of this patch is really simple and clear in v1 - to use
ARRAY_SIZE.
Note, the checkpatch issue is not introduced by this patch.
It is because the original file does not pass checkpath at all.
If you do apply v2 to you should be able to see my comment in v2:
The whole file in drivers/net/npe/IxEthDBFeatures.c uses 4 spaces as indent,
only the lines touched by this patch uses tab as indent (to make
checkpatch happy).
Note: tab takes 8 spaces. The indent looks really odd after apply v2.
I just cannot convince myself v2 is better.
I do think we should use v1 and you can send a separate patch to fix all
checkpatch warnings if you want.
Regards,
Axel
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[U-Boot] [PATCH v3] net: Use ARRAY_SIZE at appropriate places
Use ARRAY_SIZE instead of having similar implementation in each drivers.
The NUMELEMS defined in drivers/net/npe/include/IxOsalTypes.h is not used
at all, so this patch removes it instead of converting it to use ARRAY_SIZE.
Signed-off-by: Axel Lin
Cc: Albert Aribaud
Cc: Ben Warren
Cc: Jean-Christophe PLAGNIOL-VILLARD
Cc: Joe Hershberger
Cc: Marek Vasut
Cc: Mike Frysinger
Cc: Nobuhiro Iwamatsu
Cc: TsiChungLiew
Cc: Wolfgang Denk
Cc: York Sun
---
v2: Fix checkpatch issues. (abandoned)
v3: Modified from v1, because v2 makes the patch bigger.
And using tab (which takes 8 spaces) as indent makes the code looks odd
because the whole file uses 4 spaces as indent.
Note, the checkpatch issue is not introduced by this patch itself, it's
because original source code does not pass checkpatch at all.
Address Marek's comment:
Remove NUMELEMS in drivers/net/npe/include/IxOsalTypes.h
because it is not used at all.
drivers/net/ax88180.c | 2 +-
drivers/net/fsl_mcdmafec.c| 2 +-
drivers/net/lan91c96.c| 2 +-
drivers/net/mcffec.c | 2 +-
drivers/net/mcfmii.c | 2 +-
drivers/net/ne2000.c | 2 +-
drivers/net/npe/IxEthDBFeatures.c | 4 ++--
drivers/net/npe/IxOsalIoMem.c | 3 +--
drivers/net/npe/include/IxEthDBPortDefs.h | 2 +-
drivers/net/npe/include/IxOsalTypes.h | 6 --
10 files changed, 10 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c
index f501768..7f0cfe5 100644
--- a/drivers/net/ax88180.c
+++ b/drivers/net/ax88180.c
@@ -157,7 +157,7 @@ static void ax88180_mac_reset (struct eth_device *dev)
OUTW (dev, MISC_RESET_MAC, MISC);
tmpval = INW (dev, MISC);
- for (i = 0; i < (sizeof (program_seq) / sizeof (program_seq[0])); i++)
+ for (i = 0; i < ARRAY_SIZE(program_seq); i++)
OUTW (dev, program_seq[i].value, program_seq[i].offset);
}
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
index 63842cd..0e18764 100644
--- a/drivers/net/fsl_mcdmafec.c
+++ b/drivers/net/fsl_mcdmafec.c
@@ -520,7 +520,7 @@ int mcdmafec_initialize(bd_t * bis)
u32 tmp = CONFIG_SYS_INTSRAM + 0x2000;
#endif
- for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(fec_info); i++) {
dev =
(struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE,
diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c
index 11d350e..47c15c4 100644
--- a/drivers/net/lan91c96.c
+++ b/drivers/net/lan91c96.c
@@ -779,7 +779,7 @@ static int lan91c96_detect_chip(struct eth_device *dev)
SMC_SELECT_BANK(dev, 3);
chip_id = (SMC_inw(dev, 0xA) & LAN91C96_REV_CHIPID) >> 4;
SMC_SELECT_BANK(dev, 0);
- for (r = 0; r < sizeof(supported_chips) / sizeof(struct id_type); r++)
+ for (r = 0; r < ARRAY_SIZE(supported_chips); r++)
if (chip_id == supported_chips[r].id)
return r;
return 0;
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index ed7459c..7ae6320 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -559,7 +559,7 @@ int mcffec_initialize(bd_t * bis)
u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000;
#endif
- for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(fec_info); i++) {
dev =
(struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE,
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
index 5e64dbd..63bc8f8 100644
--- a/drivers/net/mcfmii.c
+++ b/drivers/net/mcfmii.c
@@ -186,7 +186,7 @@ int mii_discover_phy(struct eth_device *dev)
printf("PHY @ 0x%x pass %d\n", phyno, pass);
#endif
- for (i = 0; (i < (sizeof(phyinfo) / sizeof(phy_info_t)))
+ for (i = 0; (i < ARRAY_SIZE(phyinfo))
&& (phyinfo[i].phyid != 0); i++) {
if (phyinfo[i].phyid == phytype) {
#ifdef ET_DEBUG
diff --git a/drivers/net/ne2000.c b/drivers/net/ne2000.c
index 3939158..e6cd3e9 100644
--- a/drivers/net/ne2000.c
+++ b/drivers/net/ne2000.c
@@ -228,7 +228,7 @@ int get_prom(u8* mac_addr, u8* base_addr)
mdelay (10);
- for (i = 0; i < sizeof (program_seq) / sizeof (program_seq[0]); i++)
+ for (i = 0; i < ARRAY_SIZE(program_seq); i++)
n2k_outb (program_seq[i].value, program_seq[i].offset);
PRINTK ("PROM:");
diff --git a/drivers/net/npe/IxEthDBFeatures.c
b/drivers/net/npe/IxEthDBFeatures.c
index c5b680a..ecabec5 100644
--- a/drivers/net/npe/IxEthDBFeatures.c
+++ b/drivers/net/npe/IxEthDBFeatures.c
@@ -144,7 +144,7 @@ void ixEthDBFeatureCapabilityScan(void)
[U-Boot] nds32: ag101/ag102: Inconsistent timer3 counter unit?
Hi Macpaul, For the case CONFIG_FTTMR010_EXT_CLK is not defined: In reset_timer_masked(): lastdec = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2); In get_timer_masked(): ulong now = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2 / 1024); The code looks strange. (Why one needs to be divided by 1024 and the other one does not?) I'm not sure which one is correct. Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] nds32: ag101/ag102: Fix setting lastdec and now values
The timer3 counter unit for lastdesc and now values are inconsistent in current
code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is
second. However, CONFIG_SYS_HZ is defined as 1000 in board config file.
This means the accuracy of "lastdec" and "now" should be in millisecond,
thus fix the equation to set lastdec and now variables accordingly.
Signed-off-by: Axel Lin
---
Hi Kuan-Yu,
This change is based on your suggestion.
I don't have this hardware, can you test if this patch works?
Thanks,
Axel
arch/nds32/cpu/n1213/ag101/timer.c | 7 ---
arch/nds32/cpu/n1213/ag102/timer.c | 7 ---
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/nds32/cpu/n1213/ag101/timer.c
b/arch/nds32/cpu/n1213/ag101/timer.c
index caa36b8..926091f 100644
--- a/arch/nds32/cpu/n1213/ag101/timer.c
+++ b/arch/nds32/cpu/n1213/ag101/timer.c
@@ -86,7 +86,8 @@ void reset_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- lastdec = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2);
+ lastdec = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
timestamp = 0; /* start "advancing" time stamp from 0 */
@@ -110,8 +111,8 @@ ulong get_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- ulong now = readl(&tmr->timer3_counter) / \
- (CONFIG_SYS_CLK_FREQ / 2 / 1024);
+ ulong now = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
diff --git a/arch/nds32/cpu/n1213/ag102/timer.c
b/arch/nds32/cpu/n1213/ag102/timer.c
index caa36b8..926091f 100644
--- a/arch/nds32/cpu/n1213/ag102/timer.c
+++ b/arch/nds32/cpu/n1213/ag102/timer.c
@@ -86,7 +86,8 @@ void reset_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
lastdec = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- lastdec = readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2);
+ lastdec = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
timestamp = 0; /* start "advancing" time stamp from 0 */
@@ -110,8 +111,8 @@ ulong get_timer_masked(void)
#ifdef CONFIG_FTTMR010_EXT_CLK
ulong now = readl(&tmr->timer3_counter) / (TIMER_CLOCK / CONFIG_SYS_HZ);
#else
- ulong now = readl(&tmr->timer3_counter) / \
- (CONFIG_SYS_CLK_FREQ / 2 / 1024);
+ ulong now = readl(&tmr->timer3_counter) /
+ (CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ);
#endif
debug("%s(): now = %lx, lastdec = %lx\n", __func__, now, lastdec);
--
1.8.1.2
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[U-Boot] [PATCH 1/3] spi: bfin_spi: Use DIV_ROUND_UP instead of open-coded
Use DIV_ROUND_UP to simplify the code. Signed-off-by: Axel Lin --- drivers/spi/bfin_spi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c index a9a4d92..f7192c2 100644 --- a/drivers/spi/bfin_spi.c +++ b/drivers/spi/bfin_spi.c @@ -144,10 +144,8 @@ void spi_set_speed(struct spi_slave *slave, uint hz) u32 baud; sclk = get_sclk(); - baud = sclk / (2 * hz); /* baud should be rounded up */ - if (sclk % (2 * hz)) - baud += 1; + baud = DIV_ROUND_UP(sclk, 2 * hz); if (baud < 2) baud = 2; else if (baud > (u16)-1) -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] spi: fsl_espi: Use DIV_ROUND_UP instead of open-coded
Use DIV_ROUND_UP to simplify the code.
Signed-off-by: Axel Lin
---
drivers/spi/fsl_espi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index 28609ee..e20ab9f 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -234,15 +234,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *data_out,
slave->bus, slave->cs, *(uint *) dout,
dout, *(uint *) din, din, len);
- num_chunks = data_len / max_tran_len +
- (data_len % max_tran_len ? 1 : 0);
+ num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
while (num_chunks--) {
if (data_in)
din = buffer + rx_offset;
dout = buffer;
tran_len = min(data_len , max_tran_len);
- num_blks = (tran_len + cmd_len) / 4 +
- ((tran_len + cmd_len) % 4 ? 1 : 0);
+ num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
num_bytes = (tran_len + cmd_len) % 4;
fsl->data_len = tran_len + cmd_len;
spi_cs_activate(slave);
--
1.8.1.2
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[U-Boot] [PATCH 3/3] spi: mpc8xxx_spi: Use DIV_ROUND_UP instead of open-coded
Use DIV_ROUND_UP to simplify the code.
Signed-off-by: Axel Lin
---
drivers/spi/mpc8xxx_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 6b0e3b4..c90c0ce 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -93,7 +93,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
{
volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
unsigned int tmpdout, tmpdin, event;
- int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0);
+ int numBlks = DIV_ROUND_UP(bitlen, 32);
int tm, isRead = 0;
unsigned char charSize = 32;
--
1.8.1.2
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Re: [U-Boot] [PATCH v2] blackfin: Fix using gd->baudrate before setting its value
2013/7/1 Sonic Zhang : > Acked-by: Sonic Zhang hi Sonic, I thought you will pick up this patch, but now I got your ACK and I have no idea who will take this patch. Just wondering if this patch should be applied for v2013.07? Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] spi: sh_spi: Use sh_spi_clear_bit() instead of open-coded
We have a sh_spi_clear_bit() function, there's no reason not to use it.
Signed-off-by: Axel Lin
---
drivers/spi/sh_spi.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c
index 744afe3..7ca5e36 100644
--- a/drivers/spi/sh_spi.c
+++ b/drivers/spi/sh_spi.c
@@ -151,7 +151,6 @@ static int sh_spi_send(struct sh_spi *ss, const unsigned
char *tx_data,
{
int i, cur_len, ret = 0;
int remain = (int)len;
- unsigned long tmp;
if (len >= SH_SPI_FIFO_SIZE)
sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
@@ -183,9 +182,7 @@ static int sh_spi_send(struct sh_spi *ss, const unsigned
char *tx_data,
}
if (flags & SPI_XFER_END) {
- tmp = sh_spi_read(&ss->regs->cr1);
- tmp = tmp & ~(SH_SPI_SSD | SH_SPI_SSDB);
- sh_spi_write(tmp, &ss->regs->cr1);
+ sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1);
sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
udelay(100);
write_fifo_empty_wait(ss);
@@ -198,16 +195,13 @@ static int sh_spi_receive(struct sh_spi *ss, unsigned
char *rx_data,
unsigned int len, unsigned long flags)
{
int i;
- unsigned long tmp;
if (len > SH_SPI_MAX_BYTE)
sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3);
else
sh_spi_write(len, &ss->regs->cr3);
- tmp = sh_spi_read(&ss->regs->cr1);
- tmp = tmp & ~(SH_SPI_SSD | SH_SPI_SSDB);
- sh_spi_write(tmp, &ss->regs->cr1);
+ sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1);
sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
for (i = 0; i < len; i++) {
--
1.8.1.2
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[U-Boot] [PATCH] spi: oc_tiny_spi: Refactor to simplify spi_xfer implementation
Currently we have similar code for (txp && rxp), (txp && !rxp), (!rxp & txp),
and (!txp && !rxp) cases. This patch refactors the code a bit to avoid
duplicate similar code.
Signed-off-by: Axel Lin
---
Hi Thomas,
This path is similar to the patch I sent for spi-oc-tiny.c linux driver.
I'd appreciate if you can review and test this patch.
Regards,
Axel
drivers/spi/oc_tiny_spi.c | 85 ++-
1 file changed, 11 insertions(+), 74 deletions(-)
diff --git a/drivers/spi/oc_tiny_spi.c b/drivers/spi/oc_tiny_spi.c
index 4de5d00..a8c1dfd 100644
--- a/drivers/spi/oc_tiny_spi.c
+++ b/drivers/spi/oc_tiny_spi.c
@@ -158,85 +158,22 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *dout,
spi_cs_activate(slave);
/* we need to tighten the transfer loop */
- if (txp && rxp) {
- writeb(*txp++, ®s->txdata);
- if (bytes > 1) {
- writeb(*txp++, ®s->txdata);
- for (i = 2; i < bytes; i++) {
- u8 rx, tx = *txp++;
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXR))
+ writeb(txp ? *txp++ : CONFIG_TINY_SPI_IDLE_VAL, ®s->txdata);
+ for (i = 1; i < bytes; i++) {
+ writeb(txp ? *txp++ : CONFIG_TINY_SPI_IDLE_VAL, ®s->txdata);
+
+ if (rxp || (i != bytes - 1)) {
+ while (!(readb(®s->status) & TINY_SPI_STATUS_TXR))
;
- rx = readb(®s->txdata);
- writeb(tx, ®s->txdata);
- *rxp++ = rx;
- }
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXR))
- ;
- *rxp++ = readb(®s->txdata);
}
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXE))
- ;
- *rxp++ = readb(®s->rxdata);
- } else if (rxp) {
- writeb(CONFIG_TINY_SPI_IDLE_VAL, ®s->txdata);
- if (bytes > 1) {
- writeb(CONFIG_TINY_SPI_IDLE_VAL,
- ®s->txdata);
- for (i = 2; i < bytes; i++) {
- u8 rx;
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXR))
- ;
- rx = readb(®s->txdata);
- writeb(CONFIG_TINY_SPI_IDLE_VAL,
- ®s->txdata);
- *rxp++ = rx;
- }
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXR))
- ;
+
+ if (rxp)
*rxp++ = readb(®s->txdata);
- }
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXE))
+ }
+ while (!(readb(®s->status) & TINY_SPI_STATUS_TXE))
;
+ if (rxp)
*rxp++ = readb(®s->rxdata);
- } else if (txp) {
- writeb(*txp++, ®s->txdata);
- if (bytes > 1) {
- writeb(*txp++, ®s->txdata);
- for (i = 2; i < bytes; i++) {
- u8 tx = *txp++;
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXR))
- ;
- writeb(tx, ®s->txdata);
- }
- }
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXE))
- ;
- } else {
- writeb(CONFIG_TINY_SPI_IDLE_VAL, ®s->txdata);
- if (bytes > 1) {
- writeb(CONFIG_TINY_SPI_IDLE_VAL,
- ®s->txdata);
- for (i = 2; i < bytes; i++) {
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXR))
- ;
- writeb(CONFIG_TINY_SPI_IDLE_VAL,
- ®s->txdata);
- }
- }
- while (!(readb(®s->status) &
-TINY_SPI_STATUS_TXE))
- ;
- }
-
done:
if (flags & SPI_XFER_END)
spi_cs_deactivate(slave);
--
1.8.1.2
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[U-Boot] [PATCH 1/2] serial: opencores_yanu: Fix build error
Fix build error due to missing include of serial.h and a trivial typo.
Signed-off-by: Axel Lin
---
drivers/serial/opencores_yanu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/opencores_yanu.c b/drivers/serial/opencores_yanu.c
index 8de2eca..80e9ae5 100644
--- a/drivers/serial/opencores_yanu.c
+++ b/drivers/serial/opencores_yanu.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -154,7 +155,7 @@ static int oc_serial_tstc(void)
((1 << YANU_RFIFO_CHARS_N) - 1)) > 0);
}
-statoc int oc_serial_getc(void)
+static int oc_serial_getc(void)
{
while (serial_tstc() == 0)
WATCHDOG_RESET ();
--
1.8.1.2
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[U-Boot] [PATCH 2/2] serial: opencores_yanu: Avoid duplicate oc_serial_setbrg() implementation
The implementation of oc_serial_setbrg() for CONFIG_SYS_NIOS_FIXEDBAUD and
!CONFIG_SYS_NIOS_FIXEDBAUD are very similar.
Add a baudrate variable and set it to either CONFIG_BAUDRATE or gd->baudrate.
Then we can unify the code for both cases.
Signed-off-by: Axel Lin
---
drivers/serial/opencores_yanu.c | 49 -
1 file changed, 9 insertions(+), 40 deletions(-)
diff --git a/drivers/serial/opencores_yanu.c b/drivers/serial/opencores_yanu.c
index 80e9ae5..d4ed60c 100644
--- a/drivers/serial/opencores_yanu.c
+++ b/drivers/serial/opencores_yanu.c
@@ -18,62 +18,34 @@ DECLARE_GLOBAL_DATA_PTR;
static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE;
-#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
-
-/* Everything's already setup for fixed-baud PTF assignment*/
-
static void oc_serial_setbrg(void)
{
int n, k;
const unsigned max_uns = 0x;
unsigned best_n, best_m, baud;
+ unsigned baudrate;
- /* compute best N and M couple */
- best_n = YANU_MAX_PRESCALER_N;
- for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
- if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
- (unsigned)CONFIG_BAUDRATE) {
- best_n = n;
- break;
- }
- }
- for (k = 0;; k++) {
- if ((unsigned)CONFIG_BAUDRATE <= (max_uns >> (15+n-k)))
- break;
- }
- best_m =
- ((unsigned)CONFIG_BAUDRATE * (1 << (15 + n - k))) /
- ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
-
- baud = best_m + best_n * YANU_BAUDE;
- writel(baud, &uart->baud);
-
- return;
-}
-
+#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
+ /* Everything's already setup for fixed-baud PTF assignment */
+ baudrate = CONFIG_BAUDRATE;
#else
-
-static void oc_serial_setbrg(void)
-{
- int n, k;
- const unsigned max_uns = 0x;
- unsigned best_n, best_m, baud;
-
+ baudrate = gd->baudrate;
+#endif
/* compute best N and M couple */
best_n = YANU_MAX_PRESCALER_N;
for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
- gd->baudrate) {
+ baudrate) {
best_n = n;
break;
}
}
for (k = 0;; k++) {
- if (gd->baudrate <= (max_uns >> (15+n-k)))
+ if (baudrate <= (max_uns >> (15+n-k)))
break;
}
best_m =
- (gd->baudrate * (1 << (15 + n - k))) /
+ (baudrate * (1 << (15 + n - k))) /
((unsigned)CONFIG_SYS_CLK_FREQ >> k);
baud = best_m + best_n * YANU_BAUDE;
@@ -82,9 +54,6 @@ static void oc_serial_setbrg(void)
return;
}
-
-#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
-
static int oc_serial_init(void)
{
unsigned action,control;
--
1.8.1.2
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[U-Boot] [PATCH RESEND 2/2] serial: opencores_yanu: Avoid duplicate oc_serial_setbrg() implementation
The implementation of oc_serial_setbrg() for CONFIG_SYS_NIOS_FIXEDBAUD and
!CONFIG_SYS_NIOS_FIXEDBAUD are very similar.
Add a baudrate variable and set it to either CONFIG_BAUDRATE or gd->baudrate.
Then we can unify the code for both cases.
Signed-off-by: Axel Lin
---
drivers/serial/opencores_yanu.c | 49 -
1 file changed, 9 insertions(+), 40 deletions(-)
diff --git a/drivers/serial/opencores_yanu.c b/drivers/serial/opencores_yanu.c
index 80e9ae5..d4ed60c 100644
--- a/drivers/serial/opencores_yanu.c
+++ b/drivers/serial/opencores_yanu.c
@@ -18,62 +18,34 @@ DECLARE_GLOBAL_DATA_PTR;
static yanu_uart_t *uart = (yanu_uart_t *)CONFIG_SYS_NIOS_CONSOLE;
-#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
-
-/* Everything's already setup for fixed-baud PTF assignment*/
-
static void oc_serial_setbrg(void)
{
int n, k;
const unsigned max_uns = 0x;
unsigned best_n, best_m, baud;
+ unsigned baudrate;
- /* compute best N and M couple */
- best_n = YANU_MAX_PRESCALER_N;
- for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
- if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
- (unsigned)CONFIG_BAUDRATE) {
- best_n = n;
- break;
- }
- }
- for (k = 0;; k++) {
- if ((unsigned)CONFIG_BAUDRATE <= (max_uns >> (15+n-k)))
- break;
- }
- best_m =
- ((unsigned)CONFIG_BAUDRATE * (1 << (15 + n - k))) /
- ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
-
- baud = best_m + best_n * YANU_BAUDE;
- writel(baud, &uart->baud);
-
- return;
-}
-
+#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
+ /* Everything's already setup for fixed-baud PTF assignment */
+ baudrate = CONFIG_BAUDRATE;
#else
-
-static void oc_serial_setbrg(void)
-{
- int n, k;
- const unsigned max_uns = 0x;
- unsigned best_n, best_m, baud;
-
+ baudrate = gd->baudrate;
+#endif
/* compute best N and M couple */
best_n = YANU_MAX_PRESCALER_N;
for (n = YANU_MAX_PRESCALER_N; n >= 0; n--) {
if ((unsigned)CONFIG_SYS_CLK_FREQ / (1 << (n + 4)) >=
- gd->baudrate) {
+ baudrate) {
best_n = n;
break;
}
}
for (k = 0;; k++) {
- if (gd->baudrate <= (max_uns >> (15+n-k)))
+ if (baudrate <= (max_uns >> (15+n-k)))
break;
}
best_m =
- (gd->baudrate * (1 << (15 + n - k))) /
+ (baudrate * (1 << (15 + n - k))) /
((unsigned)CONFIG_SYS_CLK_FREQ >> k);
baud = best_m + best_n * YANU_BAUDE;
@@ -82,9 +54,6 @@ static void oc_serial_setbrg(void)
return;
}
-
-#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
-
static int oc_serial_init(void)
{
unsigned action,control;
--
1.8.1.2
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[U-Boot] [PATCH RESEND 1/2] serial: opencores_yanu: Fix build error
Fix build error due to missing include of serial.h and a trivial typo.
Signed-off-by: Axel Lin
---
Hi Tom,
This patch was sent on
http://lists.denx.de/pipermail/u-boot/2014-January/171093.html
I don't get any feedback from NIOS2 maintainers so far.
Maybe you can pick up this serial
(or at least pick up this one which fixes build error).
Thanks,
Axel
drivers/serial/opencores_yanu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/opencores_yanu.c b/drivers/serial/opencores_yanu.c
index 8de2eca..80e9ae5 100644
--- a/drivers/serial/opencores_yanu.c
+++ b/drivers/serial/opencores_yanu.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -154,7 +155,7 @@ static int oc_serial_tstc(void)
((1 << YANU_RFIFO_CHARS_N) - 1)) > 0);
}
-statoc int oc_serial_getc(void)
+static int oc_serial_getc(void)
{
while (serial_tstc() == 0)
WATCHDOG_RESET ();
--
1.8.1.2
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[U-Boot] [PATCH RFT] gpio: at91: Fix getting addres of private data
Use dev_get_priv() rather than dev_get_platdata() to get correct address of
private data.
Signed-off-by: Axel Lin
---
Hi Simon,
I don't have this h/w, so please test if you think this patch is ok.
Thanks,
Axel
drivers/gpio/at91_gpio.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index 6129c02..22fbd63 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -451,7 +451,7 @@ struct at91_port_priv {
/* set GPIO pin 'gpio' as an input */
static int at91_gpio_direction_input(struct udevice *dev, unsigned offset)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
at91_set_port_input(port->regs, offset, 0);
@@ -462,7 +462,7 @@ static int at91_gpio_direction_input(struct udevice *dev,
unsigned offset)
static int at91_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
at91_set_port_output(port->regs, offset, value);
@@ -472,7 +472,7 @@ static int at91_gpio_direction_output(struct udevice *dev,
unsigned offset,
/* read GPIO IN value of pin 'gpio' */
static int at91_gpio_get_value(struct udevice *dev, unsigned offset)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
return at91_get_port_value(port->regs, offset);
}
@@ -481,7 +481,7 @@ static int at91_gpio_get_value(struct udevice *dev,
unsigned offset)
static int at91_gpio_set_value(struct udevice *dev, unsigned offset,
int value)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
at91_set_port_value(port->regs, offset, value);
@@ -490,7 +490,7 @@ static int at91_gpio_set_value(struct udevice *dev,
unsigned offset,
static int at91_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
/* GPIOF_FUNC is not implemented yet */
if (at91_get_port_output(port->regs, offset))
--
1.9.1
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[U-Boot] [PATCH RFT v2] gpio: at91: Fix getting address of private data
Use dev_get_priv() rather than dev_get_platdata() to get correct address of
private data.
Signed-off-by: Axel Lin
---
v2: Fix an obvious typo in subject line (s/addres/address).
drivers/gpio/at91_gpio.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index 6129c02..22fbd63 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -451,7 +451,7 @@ struct at91_port_priv {
/* set GPIO pin 'gpio' as an input */
static int at91_gpio_direction_input(struct udevice *dev, unsigned offset)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
at91_set_port_input(port->regs, offset, 0);
@@ -462,7 +462,7 @@ static int at91_gpio_direction_input(struct udevice *dev,
unsigned offset)
static int at91_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
at91_set_port_output(port->regs, offset, value);
@@ -472,7 +472,7 @@ static int at91_gpio_direction_output(struct udevice *dev,
unsigned offset,
/* read GPIO IN value of pin 'gpio' */
static int at91_gpio_get_value(struct udevice *dev, unsigned offset)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
return at91_get_port_value(port->regs, offset);
}
@@ -481,7 +481,7 @@ static int at91_gpio_get_value(struct udevice *dev,
unsigned offset)
static int at91_gpio_set_value(struct udevice *dev, unsigned offset,
int value)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
at91_set_port_value(port->regs, offset, value);
@@ -490,7 +490,7 @@ static int at91_gpio_set_value(struct udevice *dev,
unsigned offset,
static int at91_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct at91_port_priv *port = dev_get_platdata(dev);
+ struct at91_port_priv *port = dev_get_priv(dev);
/* GPIOF_FUNC is not implemented yet */
if (at91_get_port_output(port->regs, offset))
--
1.9.1
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[U-Boot] [PATCH] gpio: omap: Pass correct argument to _get_gpio_direction()
Pass bank rather than bank->base to _get_gpio_direction(). Signed-off-by: Axel Lin --- drivers/gpio/omap_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index f3a7ccb..19fc451 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -291,7 +291,7 @@ static int omap_gpio_get_function(struct udevice *dev, unsigned offset) struct gpio_bank *bank = dev_get_priv(dev); /* GPIOF_FUNC is not implemented yet */ - if (_get_gpio_direction(bank->base, offset) == OMAP_GPIO_DIR_OUT) + if (_get_gpio_direction(bank, offset) == OMAP_GPIO_DIR_OUT) return GPIOF_OUTPUT; else return GPIOF_INPUT; -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] image: Convert to use fdt_for_each_subnode macro
Signed-off-by: Axel Lin
---
common/image-fit.c | 4 +---
common/image-sig.c | 16
2 files changed, 5 insertions(+), 15 deletions(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index b47d110..778d2a1 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1010,9 +1010,7 @@ int fit_image_verify(const void *fit, int image_noffset)
}
/* Process all hash subnodes of the component image node */
- for (noffset = fdt_first_subnode(fit, image_noffset);
-noffset >= 0;
-noffset = fdt_next_subnode(fit, noffset)) {
+ fdt_for_each_subnode(fit, noffset, image_noffset) {
const char *name = fit_get_name(fit, noffset, NULL);
/*
diff --git a/common/image-sig.c b/common/image-sig.c
index 2c9f0cd..eda5e13 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -212,9 +212,7 @@ static int fit_image_verify_sig(const void *fit, int
image_noffset,
int ret;
/* Process all hash subnodes of the component image node */
- for (noffset = fdt_first_subnode(fit, image_noffset);
-noffset >= 0;
-noffset = fdt_next_subnode(fit, noffset)) {
+ fdt_for_each_subnode(fit, noffset, image_noffset) {
const char *name = fit_get_name(fit, noffset, NULL);
if (!strncmp(name, FIT_SIG_NODENAME,
@@ -262,9 +260,7 @@ int fit_image_verify_required_sigs(const void *fit, int
image_noffset,
return 0;
}
- for (noffset = fdt_first_subnode(sig_blob, sig_node);
-noffset >= 0;
-noffset = fdt_next_subnode(sig_blob, noffset)) {
+ fdt_for_each_subnode(sig_blob, noffset, sig_node) {
const char *required;
int ret;
@@ -397,9 +393,7 @@ static int fit_config_verify_sig(const void *fit, int
conf_noffset,
int ret;
/* Process all hash subnodes of the component conf node */
- for (noffset = fdt_first_subnode(fit, conf_noffset);
-noffset >= 0;
-noffset = fdt_next_subnode(fit, noffset)) {
+ fdt_for_each_subnode(fit, noffset, conf_noffset) {
const char *name = fit_get_name(fit, noffset, NULL);
if (!strncmp(name, FIT_SIG_NODENAME,
@@ -444,9 +438,7 @@ int fit_config_verify_required_sigs(const void *fit, int
conf_noffset,
return 0;
}
- for (noffset = fdt_first_subnode(sig_blob, sig_node);
-noffset >= 0;
-noffset = fdt_next_subnode(sig_blob, noffset)) {
+ fdt_for_each_subnode(sig_blob, noffset, sig_node) {
const char *required;
int ret;
--
1.9.1
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[U-Boot] [PATCH v2] image: Convert to use fdt_for_each_subnode macro
Use fdt_for_each_subnode macro to simplify the code a bit.
Signed-off-by: Axel Lin
---
v2: Update commit log
common/image-fit.c | 4 +---
common/image-sig.c | 16
2 files changed, 5 insertions(+), 15 deletions(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index b47d110..778d2a1 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1010,9 +1010,7 @@ int fit_image_verify(const void *fit, int image_noffset)
}
/* Process all hash subnodes of the component image node */
- for (noffset = fdt_first_subnode(fit, image_noffset);
-noffset >= 0;
-noffset = fdt_next_subnode(fit, noffset)) {
+ fdt_for_each_subnode(fit, noffset, image_noffset) {
const char *name = fit_get_name(fit, noffset, NULL);
/*
diff --git a/common/image-sig.c b/common/image-sig.c
index 2c9f0cd..eda5e13 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -212,9 +212,7 @@ static int fit_image_verify_sig(const void *fit, int
image_noffset,
int ret;
/* Process all hash subnodes of the component image node */
- for (noffset = fdt_first_subnode(fit, image_noffset);
-noffset >= 0;
-noffset = fdt_next_subnode(fit, noffset)) {
+ fdt_for_each_subnode(fit, noffset, image_noffset) {
const char *name = fit_get_name(fit, noffset, NULL);
if (!strncmp(name, FIT_SIG_NODENAME,
@@ -262,9 +260,7 @@ int fit_image_verify_required_sigs(const void *fit, int
image_noffset,
return 0;
}
- for (noffset = fdt_first_subnode(sig_blob, sig_node);
-noffset >= 0;
-noffset = fdt_next_subnode(sig_blob, noffset)) {
+ fdt_for_each_subnode(sig_blob, noffset, sig_node) {
const char *required;
int ret;
@@ -397,9 +393,7 @@ static int fit_config_verify_sig(const void *fit, int
conf_noffset,
int ret;
/* Process all hash subnodes of the component conf node */
- for (noffset = fdt_first_subnode(fit, conf_noffset);
-noffset >= 0;
-noffset = fdt_next_subnode(fit, noffset)) {
+ fdt_for_each_subnode(fit, noffset, conf_noffset) {
const char *name = fit_get_name(fit, noffset, NULL);
if (!strncmp(name, FIT_SIG_NODENAME,
@@ -444,9 +438,7 @@ int fit_config_verify_required_sigs(const void *fit, int
conf_noffset,
return 0;
}
- for (noffset = fdt_first_subnode(sig_blob, sig_node);
-noffset >= 0;
-noffset = fdt_next_subnode(sig_blob, noffset)) {
+ fdt_for_each_subnode(sig_blob, noffset, sig_node) {
const char *required;
int ret;
--
1.9.1
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[U-Boot] spi: ftssp010_spi: Use to_ftssp010_spi() to ensure free correct address
Don't assume slave is always the first member of struct ftssp010_spi.
Use to_ftssp010_spi() to ensure free correct address in spi_free_slave().
Signed-off-by: Axel Lin
---
drivers/spi/ftssp010_spi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/ftssp010_spi.c b/drivers/spi/ftssp010_spi.c
index 267e4d8..c7d6480 100644
--- a/drivers/spi/ftssp010_spi.c
+++ b/drivers/spi/ftssp010_spi.c
@@ -431,7 +431,9 @@ free_out:
void spi_free_slave(struct spi_slave *slave)
{
- free(slave);
+ struct ftssp010_spi *chip = to_ftssp010_spi(slave);
+
+ free(chip);
}
int spi_claim_bus(struct spi_slave *slave)
--
1.9.1
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[U-Boot] [PATCH 1/2] spi: cf_spi: Use to_cf_spi_slave to resolve cfslave from slave
Don't assume slave is always the first member of struct cf_spi_slave.
Use container_of instead of casting first structure member.
Signed-off-by: Axel Lin
---
drivers/spi/cf_spi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
index 879a809..7453538 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/cf_spi.c
@@ -46,6 +46,11 @@ DECLARE_GLOBAL_DATA_PTR;
#define SPI_MODE_MOD 0x0020
#define SPI_DBLRATE0x0010
+static inline struct cf_spi_slave *to_cf_spi_slave(struct spi_slave *slave)
+{
+ return container_of(slave, struct cf_spi_slave, slave);
+}
+
void cfspi_init(void)
{
volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
@@ -105,7 +110,7 @@ u16 cfspi_rx(void)
int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
void *din, ulong flags)
{
- struct cf_spi_slave *cfslave = (struct cf_spi_slave *)slave;
+ struct cf_spi_slave *cfslave = to_cf_spi_slave(slave);
u16 *spi_rd16 = NULL, *spi_wr16 = NULL;
u8 *spi_rd = NULL, *spi_wr = NULL;
static u32 ctrl = 0;
@@ -326,7 +331,9 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
unsigned int cs,
void spi_free_slave(struct spi_slave *slave)
{
- free(slave);
+ struct cf_spi_slave *cfslave = to_cf_spi_slave(slave);
+
+ free(cfslave);
}
int spi_claim_bus(struct spi_slave *slave)
--
1.9.1
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[U-Boot] [PATCH 2/2] spi: cf_spi: Staticize local functions
Make local functions static and remove unneeded forward declarations.
Signed-off-by: Axel Lin
---
drivers/spi/cf_spi.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
index 7453538..6ce1101 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/cf_spi.c
@@ -20,13 +20,6 @@ struct cf_spi_slave {
int charbit;
};
-int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
- void *din, ulong flags);
-struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode);
-void cfspi_init(void);
-void cfspi_tx(u32 ctrl, u16 data);
-u16 cfspi_rx(void);
-
extern void cfspi_port_conf(void);
extern int cfspi_claim_bus(uint bus, uint cs);
extern void cfspi_release_bus(uint bus, uint cs);
@@ -51,7 +44,7 @@ static inline struct cf_spi_slave *to_cf_spi_slave(struct
spi_slave *slave)
return container_of(slave, struct cf_spi_slave, slave);
}
-void cfspi_init(void)
+static void cfspi_init(void)
{
volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
@@ -89,7 +82,7 @@ void cfspi_init(void)
#endif
}
-void cfspi_tx(u32 ctrl, u16 data)
+static void cfspi_tx(u32 ctrl, u16 data)
{
volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
@@ -98,7 +91,7 @@ void cfspi_tx(u32 ctrl, u16 data)
dspi->tfr = (ctrl | data);
}
-u16 cfspi_rx(void)
+static u16 cfspi_rx(void)
{
volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
@@ -107,8 +100,8 @@ u16 cfspi_rx(void)
return (dspi->rfr & 0x);
}
-int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
- void *din, ulong flags)
+static int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
+ void *din, ulong flags)
{
struct cf_spi_slave *cfslave = to_cf_spi_slave(slave);
u16 *spi_rd16 = NULL, *spi_wr16 = NULL;
@@ -181,7 +174,8 @@ int cfspi_xfer(struct spi_slave *slave, uint bitlen, const
void *dout,
return 0;
}
-struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
+static struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave,
+ uint mode)
{
/*
* bit definition for mode:
--
1.9.1
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[U-Boot] [PATCH] serial: arc: Convert to use default_serial_puts
Use default_serial_puts() instead of duplicating the implementation.
Signed-off-by: Axel Lin
---
drivers/serial/serial_arc.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c
index e63d25d..fd56ca3 100644
--- a/drivers/serial/serial_arc.c
+++ b/drivers/serial/serial_arc.c
@@ -77,19 +77,13 @@ static int arc_serial_getc(void)
return readl(®s->data) & 0xFF;
}
-static void arc_serial_puts(const char *s)
-{
- while (*s)
- arc_serial_putc(*s++);
-}
-
static struct serial_device arc_serial_drv = {
.name = "arc_serial",
.start = arc_serial_init,
.stop = NULL,
.setbrg = arc_serial_setbrg,
.putc = arc_serial_putc,
- .puts = arc_serial_puts,
+ .puts = default_serial_puts,
.getc = arc_serial_getc,
.tstc = arc_serial_tstc,
};
--
1.8.1.2
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[U-Boot] [PATCH] spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation
Refactor the code a bit to make it better in readability.
Remove the comments because now the intention of the code is pretty clear.
Signed-off-by: Axel Lin
---
drivers/spi/atmel_dataflash_spi.c | 31 ---
1 file changed, 12 insertions(+), 19 deletions(-)
diff --git a/drivers/spi/atmel_dataflash_spi.c
b/drivers/spi/atmel_dataflash_spi.c
index 8a5eddc..a2e9c00 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -102,33 +102,26 @@ void AT91F_SpiEnable(int cs)
{
unsigned long mode;
+ mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
+ mode &= ~AT91_SPI_PCS;
+
switch (cs) {
- case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
- mode &= 0xFFF0;
- writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) &
AT91_SPI_PCS),
- ATMEL_BASE_SPI0 + AT91_SPI_MR);
+ case 0:
+ mode |= AT91_SPI_PCS0_DATAFLASH_CARD << 16;
break;
- case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */
- mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
- mode &= 0xFFF0;
- writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) &
AT91_SPI_PCS),
- ATMEL_BASE_SPI0 + AT91_SPI_MR);
+ case 1:
+ mode |= AT91_SPI_PCS1_DATAFLASH_CARD << 16;
break;
- case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */
- mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
- mode &= 0xFFF0;
- writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) &
AT91_SPI_PCS),
- ATMEL_BASE_SPI0 + AT91_SPI_MR);
+ case 2:
+ mode |= AT91_SPI_PCS2_DATAFLASH_CARD << 16;
break;
case 3:
- mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
- mode &= 0xFFF0;
- writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) &
AT91_SPI_PCS),
- ATMEL_BASE_SPI0 + AT91_SPI_MR);
+ mode |= AT91_SPI_PCS3_DATAFLASH_CARD << 16;
break;
}
+ writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR);
+
/* SPI_Enable */
writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
}
--
1.8.1.2
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[U-Boot] [PATCH RFT] gpio: lpc32xx: Use priv data instead of platdata
Initially I found this driver has set priv_auto_alloc_size but it actually
never use dev->priv. The U_BOOT_DEVICE(lpc32xx_gpios) does not provide the
platdata and all fields in struct lpc32xx_gpio_platdata are set in probe.
It looks like the struct lpc32xx_gpio_platdata actually should be a priv
data. Thus this patch renames lpc32xx_gpio_platdata to lpc32xx_gpio_priv
and converts all dev_get_platdata() to dev_get_priv().
Signed-off-by: Axel Lin
---
Hi Albert,
I don't have this h/w for testing, so only compile test.
I'd appreciate if you can review and test this patch.
Thanks,
Axel
drivers/gpio/lpc32xx_gpio.c | 39 +++
1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c
index 96b3125..8a9826e 100644
--- a/drivers/gpio/lpc32xx_gpio.c
+++ b/drivers/gpio/lpc32xx_gpio.c
@@ -37,7 +37,7 @@
#define LPC32XX_GPIOS 128
-struct lpc32xx_gpio_platdata {
+struct lpc32xx_gpio_priv {
struct gpio_regs *regs;
/* GPIO FUNCTION: SEE WARNING #2 */
signed char function[LPC32XX_GPIOS];
@@ -60,8 +60,8 @@ struct lpc32xx_gpio_platdata {
static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
@@ -83,7 +83,7 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev,
unsigned offset)
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_INPUT;
+ gpio_priv->function[offset] = GPIOF_INPUT;
return 0;
}
@@ -95,8 +95,8 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev,
unsigned offset)
static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
{
int port, rank, mask, value;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
@@ -130,8 +130,8 @@ static int lpc32xx_gpio_get_value(struct udevice *dev,
unsigned offset)
static int gpio_set(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
@@ -162,8 +162,8 @@ static int gpio_set(struct udevice *dev, unsigned gpio)
static int gpio_clr(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
@@ -208,8 +208,8 @@ static int lpc32xx_gpio_direction_output(struct udevice
*dev, unsigned offset,
int value)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
@@ -231,7 +231,7 @@ static int lpc32xx_gpio_direction_output(struct udevice
*dev, unsigned offset,
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_OUTPUT;
+ gpio_priv->function[offset] = GPIOF_OUTPUT;
return lpc32xx_gpio_set_value(dev, offset, value);
}
@@ -251,8 +251,8 @@ static int lpc32xx_gpio_direction_output(struct udevice
*dev, unsigned offset,
static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- return gpio_platdata->function[offset];
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ return gpio_priv->function[offset];
}
static const struct dm_gpio_ops gpio_lpc32xx_ops = {
@@ -265,7 +265,7 @@ static const struct dm_gpio_ops gpio_lpc32xx_ops = {
static int lpc32xx_gpio_probe(struct udevice *dev)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
struct
Re: [U-Boot] [PATCH RFT] gpio: lpc32xx: Use priv data instead of platdata
2015-04-13 16:41 GMT+08:00 Albert ARIBAUD : > Hi Axel, > > Le Sat, 11 Apr 2015 10:20:08 +0800, Axel Lin a > écrit : > >> Initially I found this driver has set priv_auto_alloc_size but it actually >> never use dev->priv. The U_BOOT_DEVICE(lpc32xx_gpios) does not provide the >> platdata and all fields in struct lpc32xx_gpio_platdata are set in probe. >> It looks like the struct lpc32xx_gpio_platdata actually should be a priv >> data. Thus this patch renames lpc32xx_gpio_platdata to lpc32xx_gpio_priv >> and converts all dev_get_platdata() to dev_get_priv(). >> >> Signed-off-by: Axel Lin >> --- >> Hi Albert, >> I don't have this h/w for testing, so only compile test. >> I'd appreciate if you can review and test this patch. >> Thanks, >> Axel > > Indeed the driver allocates priv and does not use it. However, I think > that the allocation should be removed as useless, rather than plat data > be converted to priv. IIUC, priv is a way to apply a single driver to > several similar devices, and LPC32XX only has one GPIO device. Hi Albert, I think it's fine to use privdata here even though LPC32XX only has one GPIO device. gpio_platdata->function stores the runtime state which should be stored in privdata. I don't see any good reason to use platdata here, that is why I think it's a misue of platdata and thus convert it to use privdata. Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] gpio: lpc32xx: Use priv_data instead of platdata
The LPC32XX GPIO driver platdata currently contains GPIO state information,
which should go into priv_data. Thus rename lpc32xx_gpio_platdata to
lpc32xx_gpio_priv and convert to use dev_get_priv() instead.
Signed-off-by: Axel Lin
---
v2: Update commit log to mention that using priv_data for runtime state
which was stored in platdata.
drivers/gpio/lpc32xx_gpio.c | 39 +++
1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c
index 96b3125..8a9826e 100644
--- a/drivers/gpio/lpc32xx_gpio.c
+++ b/drivers/gpio/lpc32xx_gpio.c
@@ -37,7 +37,7 @@
#define LPC32XX_GPIOS 128
-struct lpc32xx_gpio_platdata {
+struct lpc32xx_gpio_priv {
struct gpio_regs *regs;
/* GPIO FUNCTION: SEE WARNING #2 */
signed char function[LPC32XX_GPIOS];
@@ -60,8 +60,8 @@ struct lpc32xx_gpio_platdata {
static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
@@ -83,7 +83,7 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev,
unsigned offset)
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_INPUT;
+ gpio_priv->function[offset] = GPIOF_INPUT;
return 0;
}
@@ -95,8 +95,8 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev,
unsigned offset)
static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
{
int port, rank, mask, value;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
@@ -130,8 +130,8 @@ static int lpc32xx_gpio_get_value(struct udevice *dev,
unsigned offset)
static int gpio_set(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
@@ -162,8 +162,8 @@ static int gpio_set(struct udevice *dev, unsigned gpio)
static int gpio_clr(struct udevice *dev, unsigned gpio)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(gpio);
mask = GPIO_TO_MASK(gpio);
@@ -208,8 +208,8 @@ static int lpc32xx_gpio_direction_output(struct udevice
*dev, unsigned offset,
int value)
{
int port, mask;
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- struct gpio_regs *regs = gpio_platdata->regs;
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ struct gpio_regs *regs = gpio_priv->regs;
port = GPIO_TO_PORT(offset);
mask = GPIO_TO_MASK(offset);
@@ -231,7 +231,7 @@ static int lpc32xx_gpio_direction_output(struct udevice
*dev, unsigned offset,
}
/* GPIO FUNCTION: SEE WARNING #2 */
- gpio_platdata->function[offset] = GPIOF_OUTPUT;
+ gpio_priv->function[offset] = GPIOF_OUTPUT;
return lpc32xx_gpio_set_value(dev, offset, value);
}
@@ -251,8 +251,8 @@ static int lpc32xx_gpio_direction_output(struct udevice
*dev, unsigned offset,
static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
- return gpio_platdata->function[offset];
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
+ return gpio_priv->function[offset];
}
static const struct dm_gpio_ops gpio_lpc32xx_ops = {
@@ -265,7 +265,7 @@ static const struct dm_gpio_ops gpio_lpc32xx_ops = {
static int lpc32xx_gpio_probe(struct udevice *dev)
{
- struct lpc32xx_gpio_platdata *gpio_platdata = dev_get_platdata(dev);
+ struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
struct gpio_dev_priv *uc_priv = dev->uclass_priv;
if (dev->of_offset == -1) {
@@ -274,12 +274,11 @@ static int lpc32xx_gpio_probe(struct udevice *dev)
}
/* set base address for GPIO registers */
- gpio_platdata->regs = (struct
Re: [U-Boot] [U-Boot PATCH 3/8] spi: Zap ftssp010_spi driver
2015-04-22 2:26 GMT+08:00 Jagannadha Sutradharudu Teki : > Zap ftssp010_spi driver since the boards used this driver > is no longer been active. I'm not sure if this is correct thing to do... It's fine to drop unmaintained boards, but a driver can/may be used by different boards. So If someday the boards(or new boards) that need this driver becomes active, it needs to add back this(and all required) driver(s). Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] gpio: stm32_gpio: Use clrsetbits_le32() at appropriate places
Use clrsetbits_le32() to replace clrbits_le32() + setbits_le32(). Signed-off-by: Axel Lin --- drivers/gpio/stm32_gpio.c | 15 --- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index d3497e9..76f7b1b 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -74,17 +74,10 @@ int stm32_gpio_config(const struct stm32_gpio_dsc *dsc, i = dsc->pin * 2; - clrbits_le32(&gpio_regs->moder, (0x3 << i)); - setbits_le32(&gpio_regs->moder, ctl->mode << i); - - clrbits_le32(&gpio_regs->otyper, (0x3 << i)); - setbits_le32(&gpio_regs->otyper, ctl->otype << i); - - clrbits_le32(&gpio_regs->ospeedr, (0x3 << i)); - setbits_le32(&gpio_regs->ospeedr, ctl->speed << i); - - clrbits_le32(&gpio_regs->pupdr, (0x3 << i)); - setbits_le32(&gpio_regs->pupdr, ctl->pupd << i); + clrsetbits_le32(&gpio_regs->moder, 0x3 << i, ctl->mode << i); + clrsetbits_le32(&gpio_regs->otyper, 0x3 << i, ctl->otype << i); + clrsetbits_le32(&gpio_regs->ospeedr, 0x3 << i, ctl->speed << i); + clrsetbits_le32(&gpio_regs->pupdr, 0x3 << i, ctl->pupd << i); rv = 0; out: -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Question about the hard-coded baud_divisor in debug_uart_init
Hi Simon, Any reason that now using hard-coded "baud_divisor = 13;" in debug_uart_init()? (The change is introduced by commit dd0b0122bac serial: ns16550: Add an option to specify the debug UART register shift) Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] serial: ns16550: Remove hard-coded baud_divisor setting
This was accidentally added by commit dd0b0122bacc "serial: ns16550: Add an option to specify the debug UART register shift". Remove it. Signed-off-by: Axel Lin --- drivers/serial/ns16550.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index fd110b3..3d376d7 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -255,7 +255,6 @@ void debug_uart_init(void) */ baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); - baud_divisor = 13; serial_out_shift(&com_port->ier, CONFIG_DEBUG_UART_SHIFT, CONFIG_SYS_NS16550_IER); serial_out_shift(&com_port->mcr, CONFIG_DEBUG_UART_SHIFT, UART_MCRVAL); -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] gpio: stm32_gpio: Use clrsetbits_le32() at appropriate places
Use clrsetbits_le32() to replace clrbits_le32() + setbits_le32(). Signed-off-by: Axel Lin --- v2: Conver one more place (updating &gpio_regs->afr[dsc->pin >> 3] register) to use clrsetbits_le32(). drivers/gpio/stm32_gpio.c | 18 +- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index d3497e9..6d6fdb0 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -69,22 +69,14 @@ int stm32_gpio_config(const struct stm32_gpio_dsc *dsc, setbits_le32(&STM32_RCC->ahb1enr, 1 << dsc->port); i = (dsc->pin & 0x07) * 4; - clrbits_le32(&gpio_regs->afr[dsc->pin >> 3], (0xF << i)); - setbits_le32(&gpio_regs->afr[dsc->pin >> 3], ctl->af << i); + clrsetbits_le32(&gpio_regs->afr[dsc->pin >> 3], 0xF << i, ctl->af << i); i = dsc->pin * 2; - clrbits_le32(&gpio_regs->moder, (0x3 << i)); - setbits_le32(&gpio_regs->moder, ctl->mode << i); - - clrbits_le32(&gpio_regs->otyper, (0x3 << i)); - setbits_le32(&gpio_regs->otyper, ctl->otype << i); - - clrbits_le32(&gpio_regs->ospeedr, (0x3 << i)); - setbits_le32(&gpio_regs->ospeedr, ctl->speed << i); - - clrbits_le32(&gpio_regs->pupdr, (0x3 << i)); - setbits_le32(&gpio_regs->pupdr, ctl->pupd << i); + clrsetbits_le32(&gpio_regs->moder, 0x3 << i, ctl->mode << i); + clrsetbits_le32(&gpio_regs->otyper, 0x3 << i, ctl->otype << i); + clrsetbits_le32(&gpio_regs->ospeedr, 0x3 << i, ctl->speed << i); + clrsetbits_le32(&gpio_regs->pupdr, 0x3 << i, ctl->pupd << i); rv = 0; out: -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] dm: i2c-gpio: Remove redundant dm_gpio_set_value() call
dm_gpio_set_dir_flags() will also set gpio output value when switching to
gpio output. So it's not necessary to call dm_gpio_set_value() after
dm_gpio_set_dir_flags() call.
Signed-off-by: Axel Lin
---
drivers/i2c/i2c-gpio.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index ed899d4..a8b83c5 100644
--- a/drivers/i2c/i2c-gpio.c
+++ b/drivers/i2c/i2c-gpio.c
@@ -41,18 +41,19 @@ static int i2c_gpio_sda_get(struct gpio_desc *sda)
static void i2c_gpio_sda_set(struct gpio_desc *sda, int bit)
{
- if (bit) {
+ if (bit)
dm_gpio_set_dir_flags(sda, GPIOD_IS_IN);
- } else {
+ else
dm_gpio_set_dir_flags(sda, GPIOD_IS_OUT);
- dm_gpio_set_value(sda, 0);
- }
}
static void i2c_gpio_scl_set(struct gpio_desc *scl, int bit)
{
- dm_gpio_set_dir_flags(scl, GPIOD_IS_OUT);
- dm_gpio_set_value(scl, bit);
+ ulong flags = GPIOD_IS_OUT;
+
+ if (bit)
+ flags |= GPIOD_IS_OUT_ACTIVE;
+ dm_gpio_set_dir_flags(scl, flags);
}
static void i2c_gpio_write_bit(struct gpio_desc *scl, struct gpio_desc *sda,
--
2.1.0
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[U-Boot] [PATCH] ARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_crit
cpu_init_crit() can be skipped, but the code is still enabled requiring a platform to supply lowlevel_init(). Signed-off-by: Axel Lin --- arch/arm/cpu/arm720t/start.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 9facc7e..9f0e3f9 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -244,6 +244,7 @@ c_runtime_cpu_setup: * */ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: #if !defined(CONFIG_TEGRA) @@ -258,6 +259,7 @@ cpu_init_crit: #endif mov pc, lr +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #ifndef CONFIG_SPL_BUILD -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_crit
2013/5/15 Albert ARIBAUD : > Hi Marek, > > On Wed, 15 May 2013 05:36:14 +0200, Marek Vasut wrote: > >> Dear Axel Lin, >> >> > cpu_init_crit() can be skipped, but the code is still enabled requiring a >> > platform to supply lowlevel_init(). >> > >> > Signed-off-by: Axel Lin >> >> Nice CC list, it'd be the best if you CCed the ARM maintainer too though ;-) > > Thanks Marek. :) > >> > --- >> > arch/arm/cpu/arm720t/start.S | 2 ++ >> > 1 file changed, 2 insertions(+) >> > >> > diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S >> > index 9facc7e..9f0e3f9 100644 >> > --- a/arch/arm/cpu/arm720t/start.S >> > +++ b/arch/arm/cpu/arm720t/start.S >> > @@ -244,6 +244,7 @@ c_runtime_cpu_setup: >> > * >> > */ >> > >> > +#ifndef CONFIG_SKIP_LOWLEVEL_INIT >> > cpu_init_crit: >> > >> > #if !defined(CONFIG_TEGRA) >> > @@ -258,6 +259,7 @@ cpu_init_crit: >> > #endif >> > >> > mov pc, lr >> > +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ >> > >> > >> > #ifndef CONFIG_SPL_BUILD > > I am tempted to ask: what actual issue does this guarding aim at > solving? Just in case, beware that AFAIR Wolfgang does not consider > 'because debugging' a valid answer. This fixes below build error if a platform has set CONFIG_SKIP_LOWLEVEL_INIT but does not implement lowlevel_init. arch/arm/cpu/arm720t/start.o: In function `cpu_init_crit': arch/arm/cpu/arm720t/start.S:256: undefined reference to `lowlevel_init' I have no idea if current supported boards in u-boot has this issue or not. I hit this build error because I'm porting u-boot to a SoC that is not supported by u-boot at this moment. Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_crit
2013/5/15 Stephen Warren : > On 05/14/2013 09:04 PM, Axel Lin wrote: >> cpu_init_crit() can be skipped, but the code is still enabled requiring a >> platform to supply lowlevel_init(). > >> diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S > >> +#ifndef CONFIG_SKIP_LOWLEVEL_INIT >> cpu_init_crit: >> >> #if !defined(CONFIG_TEGRA) >> @@ -258,6 +259,7 @@ cpu_init_crit: >> #endif >> >> mov pc, lr >> +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ > > If you're going to make changes here, you should probably ensure that > Tegra is setting CONFIG_SKIP_LOWLEVEL_INIT, and then remove the > Tegra-specific ifdef from the body of that function. That's assuming > that setting CONFIG_SKIP_LOWLEVEL_INIT doesn't have any other side-effects. Tegra exists in both arm720t and armv7: ./arch/arm/cpu/arm720t/tegra-common ./arch/arm/cpu/arm720t/tegra30 ./arch/arm/cpu/arm720t/tegra20 ./arch/arm/cpu/arm720t/tegra114 ./arch/arm/cpu/armv7/tegra-common ./arch/arm/cpu/armv7/tegra30 ./arch/arm/cpu/armv7/tegra20 ./arch/arm/cpu/armv7/tegra114 I'm wondering if we set CONFIG_SKIP_LOWLEVEL_INIT for tegra will also impact the code path in arch/arm/cpu/armv7/start.S ? Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH RFT] tegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL build
Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit. Signed-off-by: Axel Lin --- Hi Stephen, This patch is on top of [PATCH] ARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_crit [1] I make this as a separate patch because this patch is tegra specific. And I don't have any tegra platform to test, only compile tested. I'd appreciate if someone can test it. [1] http://lists.denx.de/pipermail/u-boot/2013-May/154331.html Regards, Axel arch/arm/cpu/arm720t/start.S| 2 -- include/configs/tegra-common-post.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 9f0e3f9..f425a55 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -247,7 +247,6 @@ c_runtime_cpu_setup: #ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: -#if !defined(CONFIG_TEGRA) mov ip, lr /* * before relocating, we have to setup RAM timing @@ -256,7 +255,6 @@ cpu_init_crit: */ bl lowlevel_init mov lr, ip -#endif mov pc, lr #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index bf18699..6ed2fde 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -157,6 +157,8 @@ /* overrides for SPL build here */ #ifdef CONFIG_SPL_BUILD +#define CONFIG_SKIP_LOWLEVEL_INIT + /* remove devicetree support */ #ifdef CONFIG_OF_CONTROL #undef CONFIG_OF_CONTROL -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] tegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL build
Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit. Signed-off-by: Axel Lin Tested-by: Stephen Warren --- arch/arm/cpu/arm720t/start.S| 2 -- include/configs/tegra-common-post.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 9f0e3f9..f425a55 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -247,7 +247,6 @@ c_runtime_cpu_setup: #ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: -#if !defined(CONFIG_TEGRA) mov ip, lr /* * before relocating, we have to setup RAM timing @@ -256,7 +255,6 @@ cpu_init_crit: */ bl lowlevel_init mov lr, ip -#endif mov pc, lr #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index bf18699..6ed2fde 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -157,6 +157,8 @@ /* overrides for SPL build here */ #ifdef CONFIG_SPL_BUILD +#define CONFIG_SKIP_LOWLEVEL_INIT + /* remove devicetree support */ #ifdef CONFIG_OF_CONTROL #undef CONFIG_OF_CONTROL -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] ARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_crit
cpu_init_crit() can be skipped, but the code is still enabled requiring a platform to supply lowlevel_init(). Signed-off-by: Axel Lin Tested-by: Stephen Warren --- arch/arm/cpu/arm720t/start.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 9facc7e..9f0e3f9 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -244,6 +244,7 @@ c_runtime_cpu_setup: * */ +#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: #if !defined(CONFIG_TEGRA) @@ -258,6 +259,7 @@ cpu_init_crit: #endif mov pc, lr +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ #ifndef CONFIG_SPL_BUILD -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] boards.cfg: Fix the comment for invoking tools/reformat.py from vim
Add the missing bang (!) to execute external command, otherwise it does not work. Signed-off-by: Axel Lin --- boards.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.cfg b/boards.cfg index dbd8479..9fc77fb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -38,7 +38,7 @@ # It can be used from a shell: # tools/reformat.py -i -d '-' -s 8 boards0.cfg && mv boards0.cfg boards.cfg # It can directly be invoked from vim: -# :%tools/reformat.py -i -d '-' -s 8 +# :%!tools/reformat.py -i -d '-' -s 8 # # Status, Arch, CPU:SPLCPU, SoC, Vendor, Board name, Target, Options, Maintainers ### -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RESEND] gpio: spear_gpio: Fix gpio_set_value() implementation
2013/9/14 Albert ARIBAUD :
> Hi Axel,
>
> On Fri, 06 Sep 2013 14:22:40 +0800, Axel Lin
> wrote:
>
>> In current gpio_set_value() implementation, it always sets the gpio control
>> bit
>> no matter the value argument is 0 or 1. Thus the GPIOs never set to low.
>> This patch fixes this bug.
>>
>> Signed-off-by: Axel Lin
>> Acked-by: Stefan Roese
>> Reviewed-by: Vipin Kumar
>> ---
>> This patch was sent on
>> http://lists.denx.de/pipermail/u-boot/2013-June/156861.html
>>
>> Has Stefan's Ack:
>> http://lists.denx.de/pipermail/u-boot/2013-June/156864.html
>>
>> Vipin says the code is fine, so I add Vipin's review-by.
>> http://lists.denx.de/pipermail/u-boot/2013-June/156966.html
>>
>> Michael confirms it works:
>> http://lists.denx.de/pipermail/u-boot/2013-August/160652.html
>>
>> No body picks up this patch, so here is a resend.
>> Although I think this is a bug fix, but I'll let maintainers to determinate
>> if this is the material for v2013.10.
>> Anyway, can someone at least let me know if this patch is ok for apply at
>> some
>> point? I have no idea who is maintaining this file.
>>
>> Regards,
>> Axel
>>
>> drivers/gpio/spear_gpio.c | 5 -
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
>> index 367b670..6fb4117 100644
>> --- a/drivers/gpio/spear_gpio.c
>> +++ b/drivers/gpio/spear_gpio.c
>> @@ -36,7 +36,10 @@ int gpio_set_value(unsigned gpio, int value)
>> {
>> struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
>>
>> - writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>> + if (value)
>> + writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>> + else
>> + writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
>>
>> return 0;
>> }
>
> Despite discussions in the previous thread and the confirmations that
> this code is functionally equivalent to the Linux code, I still believe
> this code is incorrect for both writing and reading.
>
> From the doc, writing to GPIODATA will obviously copy each of bits 7
> to 0 of the written value into the actuals GPIO mapped to bits 7 to
> 0 of this register (assuming they are configured as outputs, of course).
> Based on this, the code above:
>
> - when setting a single GPIO, sets *but clears up to seven other GPIOs*;
> - when clearing a single GPIO, clears it *and up to seven other GPIOs*.
>
> This code may have been tested only for a single active GPIO at a time,
> for which this code would behave correctly; but as soon as two GPIOs
> from the same bank must be set at the same time, it fails.
>
> Please fix this code so that setting or clearing a GPIO does not set or
> clear any other GPIO, and perform an actual test to confirm this works
> before submitting V2.
No.
Some people (Marek, and *Michael*) asked this question in original
discussion thread.
The datasheet says each GPIO is controlled by *different* register.
(Well, it's unusual.)
And that is why we don't need a read-write-update operation.
Simply write 0 to the register does work. ( *Michael* replied it works )
>
> BTW: if (as the previous thread seemed to imply) no one around has the
> hardware to test this change, then why exactly is it needed?
>
> Amicalement,
> --
> Albert.
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[U-Boot] [PATCH v2] gpio: spear_gpio: Fix gpio_set_value() implementation
In current gpio_set_value() implementation, it always sets the gpio control bit
no matter the value argument is 0 or 1. Thus the GPIOs never set to low.
This patch fixes this bug.
The address bus is used as a mask on read/write operations, so that independent
software drivers can set their GPIO bits without affecting any other pins in a
single write operation. Thus we don't need a read-modify-write to update the
register.
Signed-off-by: Axel Lin
Acked-by: Stefan Roese
Reviewed-by: Vipin Kumar
Reviewed-by: Michael Trimarchi
---
v2: Update commit log to explain why a read-modify-write is not necessary
for clearing specific GPIO bit.
Also added Michael Trimarchi's reviewed-by tag since he does review the
patch and said the patch is fine.
drivers/gpio/spear_gpio.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
index 367b670..6fb4117 100644
--- a/drivers/gpio/spear_gpio.c
+++ b/drivers/gpio/spear_gpio.c
@@ -36,7 +36,10 @@ int gpio_set_value(unsigned gpio, int value)
{
struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
- writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ if (value)
+ writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ else
+ writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
return 0;
}
--
1.8.1.2
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[U-Boot] [PATCH] serial: mxs_auart: Staticize local functions
Staticize local functions in mxs_auart driver.
Signed-off-by: Axel Lin
---
drivers/serial/mxs_auart.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/serial/mxs_auart.c b/drivers/serial/mxs_auart.c
index 7cfe5bc..fc0fa96 100644
--- a/drivers/serial/mxs_auart.c
+++ b/drivers/serial/mxs_auart.c
@@ -40,7 +40,7 @@ static struct mxs_uartapp_regs *get_uartapp_registers(void)
* Sets the baud rate and settings.
* The settings are: 8 data bits, no parit and 1 stop bit.
*/
-void mxs_auart_setbrg(void)
+static void mxs_auart_setbrg(void)
{
u32 div;
u32 linectrl = 0;
@@ -77,7 +77,7 @@ void mxs_auart_setbrg(void)
writel(linectrl, ®s->hw_uartapp_linectrl);
}
-int mxs_auart_init(void)
+static int mxs_auart_init(void)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Reset everything */
@@ -99,7 +99,7 @@ int mxs_auart_init(void)
return 0;
}
-void mxs_auart_putc(const char c)
+static void mxs_auart_putc(const char c)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Wait in loop while the transmit FIFO is full */
@@ -112,14 +112,14 @@ void mxs_auart_putc(const char c)
mxs_auart_putc('\r');
}
-int mxs_auart_tstc(void)
+static int mxs_auart_tstc(void)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Checks if receive FIFO is empty */
return !(readl(®s->hw_uartapp_stat) & UARTAPP_STAT_RXFE_MASK);
}
-int mxs_auart_getc(void)
+static int mxs_auart_getc(void)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Wait until a character is available to read */
--
1.8.1.2
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Re: [U-Boot] [PATCH] serial: mxs_auart: Staticize local functions
2013/10/15 Marek Vasut : > Dear Axel Lin, > >> Staticize local functions in mxs_auart driver. >> >> Signed-off-by: Axel Lin > > Acked-by: Marek Vasut > > Just curious, how did you find this? Did you lint the files with some tool? I just read the code. Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] serial: xuartlite: Staticize local functions
Staticize local functions in xuartlite driver.
Signed-off-by: Axel Lin
---
drivers/serial/serial_xuartlite.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/serial/serial_xuartlite.c
b/drivers/serial/serial_xuartlite.c
index 9c1d025..daaf155 100644
--- a/drivers/serial/serial_xuartlite.c
+++ b/drivers/serial/serial_xuartlite.c
@@ -39,7 +39,7 @@ static struct uartlite *userial_ports[4] = {
#endif
};
-void uartlite_serial_putc(const char c, const int port)
+static void uartlite_serial_putc(const char c, const int port)
{
struct uartlite *regs = userial_ports[port];
@@ -51,13 +51,13 @@ void uartlite_serial_putc(const char c, const int port)
out_be32(®s->tx_fifo, c & 0xff);
}
-void uartlite_serial_puts(const char *s, const int port)
+static void uartlite_serial_puts(const char *s, const int port)
{
while (*s)
uartlite_serial_putc(*s++, port);
}
-int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(const int port)
{
struct uartlite *regs = userial_ports[port];
@@ -66,7 +66,7 @@ int uartlite_serial_getc(const int port)
return in_be32(®s->rx_fifo) & 0xff;
}
-int uartlite_serial_tstc(const int port)
+static int uartlite_serial_tstc(const int port)
{
struct uartlite *regs = userial_ports[port];
--
1.8.1.2
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[U-Boot] [PATCH 2/2] serial: s5p: Staticize local functions
Staticize local functions in s5p serial driver.
Signed-off-by: Axel Lin
---
drivers/serial/serial_s5p.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index f98b422..13ced26 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -65,7 +65,7 @@ static const int udivslot[] = {
0xffdf,
};
-void serial_setbrg_dev(const int dev_index)
+static void serial_setbrg_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
u32 uclk = get_uart_clk(dev_index);
@@ -96,7 +96,7 @@ void serial_setbrg_dev(const int dev_index)
* Initialise the serial port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*/
-int serial_init_dev(const int dev_index)
+static int serial_init_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -138,7 +138,7 @@ static int serial_err_check(const int dev_index, int op)
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
-int serial_getc_dev(const int dev_index)
+static int serial_getc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -158,7 +158,7 @@ int serial_getc_dev(const int dev_index)
/*
* Output a single byte to the serial port.
*/
-void serial_putc_dev(const char c, const int dev_index)
+static void serial_putc_dev(const char c, const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -181,7 +181,7 @@ void serial_putc_dev(const char c, const int dev_index)
/*
* Test whether a character is in the RX buffer
*/
-int serial_tstc_dev(const int dev_index)
+static int serial_tstc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -191,7 +191,7 @@ int serial_tstc_dev(const int dev_index)
return (int)(readl(&uart->utrstat) & 0x1);
}
-void serial_puts_dev(const char *s, const int dev_index)
+static void serial_puts_dev(const char *s, const int dev_index)
{
while (*s)
serial_putc_dev(*s++, dev_index);
--
1.8.1.2
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[U-Boot] [PATCH v2 1/2] serial: xuartlite: Staticize local functions
Staticize local functions in xuartlite driver.
Signed-off-by: Axel Lin
---
v2: Also staticize userial##port##_* functions
drivers/serial/serial_xuartlite.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/serial/serial_xuartlite.c
b/drivers/serial/serial_xuartlite.c
index 9c1d025..e613994 100644
--- a/drivers/serial/serial_xuartlite.c
+++ b/drivers/serial/serial_xuartlite.c
@@ -39,7 +39,7 @@ static struct uartlite *userial_ports[4] = {
#endif
};
-void uartlite_serial_putc(const char c, const int port)
+static void uartlite_serial_putc(const char c, const int port)
{
struct uartlite *regs = userial_ports[port];
@@ -51,13 +51,13 @@ void uartlite_serial_putc(const char c, const int port)
out_be32(®s->tx_fifo, c & 0xff);
}
-void uartlite_serial_puts(const char *s, const int port)
+static void uartlite_serial_puts(const char *s, const int port)
{
while (*s)
uartlite_serial_putc(*s++, port);
}
-int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(const int port)
{
struct uartlite *regs = userial_ports[port];
@@ -66,7 +66,7 @@ int uartlite_serial_getc(const int port)
return in_be32(®s->rx_fifo) & 0xff;
}
-int uartlite_serial_tstc(const int port)
+static int uartlite_serial_tstc(const int port)
{
struct uartlite *regs = userial_ports[port];
@@ -82,16 +82,16 @@ static int uartlite_serial_init(const int port)
/* Multi serial device functions */
#define DECLARE_ESERIAL_FUNCTIONS(port) \
- int userial##port##_init(void) \
+ static int userial##port##_init(void) \
{ return uartlite_serial_init(port); } \
- void userial##port##_setbrg(void) {} \
- int userial##port##_getc(void) \
+ static void userial##port##_setbrg(void) {} \
+ static int userial##port##_getc(void) \
{ return uartlite_serial_getc(port); } \
- int userial##port##_tstc(void) \
+ static int userial##port##_tstc(void) \
{ return uartlite_serial_tstc(port); } \
- void userial##port##_putc(const char c) \
+ static void userial##port##_putc(const char c) \
{ uartlite_serial_putc(c, port); } \
- void userial##port##_puts(const char *s) \
+ static void userial##port##_puts(const char *s) \
{ uartlite_serial_puts(s, port); }
/* Serial device descriptor */
--
1.8.1.2
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[U-Boot] [PATCH v2 2/2] serial: s5p: Staticize local functions
Staticize local functions in s5p serial driver.
Signed-off-by: Axel Lin
---
v2: Also staticize s5p_serial##port##_* functions
drivers/serial/serial_s5p.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index f98b422..cc20d2d 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -65,7 +65,7 @@ static const int udivslot[] = {
0xffdf,
};
-void serial_setbrg_dev(const int dev_index)
+static void serial_setbrg_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
u32 uclk = get_uart_clk(dev_index);
@@ -96,7 +96,7 @@ void serial_setbrg_dev(const int dev_index)
* Initialise the serial port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*/
-int serial_init_dev(const int dev_index)
+static int serial_init_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -138,7 +138,7 @@ static int serial_err_check(const int dev_index, int op)
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
-int serial_getc_dev(const int dev_index)
+static int serial_getc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -158,7 +158,7 @@ int serial_getc_dev(const int dev_index)
/*
* Output a single byte to the serial port.
*/
-void serial_putc_dev(const char c, const int dev_index)
+static void serial_putc_dev(const char c, const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -181,7 +181,7 @@ void serial_putc_dev(const char c, const int dev_index)
/*
* Test whether a character is in the RX buffer
*/
-int serial_tstc_dev(const int dev_index)
+static int serial_tstc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
@@ -191,7 +191,7 @@ int serial_tstc_dev(const int dev_index)
return (int)(readl(&uart->utrstat) & 0x1);
}
-void serial_puts_dev(const char *s, const int dev_index)
+static void serial_puts_dev(const char *s, const int dev_index)
{
while (*s)
serial_putc_dev(*s++, dev_index);
@@ -199,12 +199,12 @@ void serial_puts_dev(const char *s, const int dev_index)
/* Multi serial device functions */
#define DECLARE_S5P_SERIAL_FUNCTIONS(port) \
-int s5p_serial##port##_init(void) { return serial_init_dev(port); } \
-void s5p_serial##port##_setbrg(void) { serial_setbrg_dev(port); } \
-int s5p_serial##port##_getc(void) { return serial_getc_dev(port); } \
-int s5p_serial##port##_tstc(void) { return serial_tstc_dev(port); } \
-void s5p_serial##port##_putc(const char c) { serial_putc_dev(c, port); } \
-void s5p_serial##port##_puts(const char *s) { serial_puts_dev(s, port); }
+static int s5p_serial##port##_init(void) { return serial_init_dev(port); } \
+static void s5p_serial##port##_setbrg(void) { serial_setbrg_dev(port); } \
+static int s5p_serial##port##_getc(void) { return serial_getc_dev(port); } \
+static int s5p_serial##port##_tstc(void) { return serial_tstc_dev(port); } \
+static void s5p_serial##port##_putc(const char c) { serial_putc_dev(c, port);
} \
+static void s5p_serial##port##_puts(const char *s) { serial_puts_dev(s, port);
}
#define INIT_S5P_SERIAL_STRUCTURE(port, __name) { \
.name = __name, \
--
1.8.1.2
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[U-Boot] [PATCH] spi: davinci: Fix register address for SPI1_BUS
Fix a trivial copy-paste bug. Signed-off-by: Axel Lin --- drivers/spi/davinci_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 28fb3a2..0ec5b9d 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -41,7 +41,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, break; #ifdef CONFIG_SYS_SPI1 case SPI1_BUS: - ds->regs = (struct davinci_spi_regs *)SPI0_BASE; + ds->regs = (struct davinci_spi_regs *)SPI1_BASE; break; #endif #ifdef CONFIG_SYS_SPI2 -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] How to write jffs2 image to spi nor flash?
Hi list, I use "sf erase" + "sf write" commands to write root image to spi nor flash. It works for writing a ext2 image. However, if I use the same commands to write a jffs2 image I got a lot of "Magic bitmask 0x1985 not found at..." messages and "jffs2: inflate returned -3". jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f780: 0x4bbb instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f784: 0x50f2 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f788: 0x4230 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f78c: 0x76ac instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f790: 0x439c instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f794: 0xd9b9 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f798: 0x73d3 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f79c: 0x5758 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f7a0: 0x1b47 instead jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f7a4: 0xf908 instead jffs2: Further such events for this erase block will not be printed So how to correctly write a jffs2 image to spi nor flash in u-boot? Thanks, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] How to write jffs2 image to spi nor flash?
2013/11/28 Axel Lin : > Hi list, > > I use "sf erase" + "sf write" commands to write root image to spi nor flash. > It works for writing a ext2 image. > However, if I use the same commands to write a jffs2 image I got a lot > of "Magic bitmask 0x1985 not found at..." messages and > "jffs2: inflate returned -3". > > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f780: > 0x4bbb instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f784: > 0x50f2 instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f788: > 0x4230 instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f78c: > 0x76ac instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f790: > 0x439c instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f794: > 0xd9b9 instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f798: > 0x73d3 instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f79c: > 0x5758 instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f7a0: > 0x1b47 instead > jffs2: jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x0012f7a4: > 0xf908 instead > jffs2: Further such events for this erase block will not be printed > > So how to correctly write a jffs2 image to spi nor flash in u-boot? It's my fault. Fix it by adding --pad=SIZE to mkfs.jffs2. Regards, Axel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
