Re: [RESEND PATCH 2/2] ARM: stm32: env: Enable scan and start for AB schema on STM32MP15 DHSOM
On 3/27/25 15:38, Pascal Zimmermann wrote:
> For the STM32MP15 DHSOM, change the default environment so an AB schema
> on a device can be detected.
>
> For this the define "SCAN_DEV_FOR_BOOT_PARTS" is overwritten and
> appended.
>
> The detection works by looking for the partitions with specific lables.
> The name of those partitions are in the variables and its defaults:
> * dh_ab_partname_primary=rootfs-a
> * dh_ab_partname_secondary=rootfs-b
>
> To prevent being hanging at bootcmd, enable "CONFIG_BOOT_RETRY" and
> "CONFIG_RESET_TO_RETRY", but the timer will only be activated, if the AB
> partitions are detected.
>
> Signed-off-by: Pascal Zimmermann
> ---
> Cc: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> Cc: Tom Rini
> Cc: Simon Glass
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> Cc: u-boot@lists.denx.de
> ---
> configs/stm32mp15_dhsom.config | 3 +++
> include/configs/stm32mp15_dh_dhsom.h | 33
> 2 files changed, 36 insertions(+)
>
> diff --git a/configs/stm32mp15_dhsom.config b/configs/stm32mp15_dhsom.config
> index 7e5b5aa67ef..c84116482f6 100644
> --- a/configs/stm32mp15_dhsom.config
> +++ b/configs/stm32mp15_dhsom.config
> @@ -10,6 +10,9 @@ CONFIG_BOARD_EARLY_INIT_F=y
> CONFIG_BOARD_SIZE_LIMIT=1441792
> CONFIG_BOOTCOUNT_BOOTLIMIT=3
> CONFIG_BOOTDELAY=1
> +CONFIG_BOOTRETRY=y
> +CONFIG_RESET_TO_RETRY=y
> +CONFIG_BOOT_RETRY_TIME=-1
> CONFIG_CMD_ADC=y
> CONFIG_CMD_REMOTEPROC=y
> CONFIG_CMD_STBOARD=y
> diff --git a/include/configs/stm32mp15_dh_dhsom.h
> b/include/configs/stm32mp15_dh_dhsom.h
> index c004a8cec82..267e3446779 100644
> --- a/include/configs/stm32mp15_dh_dhsom.h
> +++ b/include/configs/stm32mp15_dh_dhsom.h
> @@ -17,7 +17,40 @@
> " 0x80\0"
> #endif
>
> +/* Add the search for AB partitons */
> +#define SCAN_DEV_FOR_BOOT_PARTS
> \
> + "run dh_check_if_ab; " \
> + "if test -z \"${devplist}\"; " \
> + "then " \
> + "part list ${devtype} ${devnum} -bootable devplist; " \
> + "fi; "
> +
> #define STM32MP_BOARD_EXTRA_ENV
> \
> + "altbootcmd= " \
> + "setenv dh_ab_get_partnames " \
> + "'setenv dh_ab_partnames ${dh_ab_partname_secondary} " \
> + "${dh_ab_partname_primary}' && "\
> + "run bootcmd\0" \
> + "dh_check_if_ab= " /* Sets devplist if AB partitions*/ \
> + "echo test for AB on ${devtype} ${devnum} && " \
> + "run dh_ab_get_partnames && " \
> + "setenv devplist && " \
> + "for partname in ${dh_ab_partnames}; do " \
> + "setenv partnum && "\
> + "if part number ${devtype} ${devnum} ${partname}
> partnum; "\
> + "then " \
> + "setenv devplist \"${devplist} ${partnum}\" &&
> "\
> + "setenv bootretry 60 ;" \
> + "fi; " \
> + "done ; " \
> + "if test -n \"${devplist}\"; " \
> + "then echo AB partitions found! ; " \
> + "fi\0" \
> + "dh_ab_get_partnames= " /* Sets dh_ab_partnames */ \
> + "setenv dh_ab_partnames ${dh_ab_partname_primary} " \
> + "${dh_ab_partname_secondary}\0" \
> + "dh_ab_partname_primary=rootfs-a\0" /* Names of AB partitions */\
> + "dh_ab_partname_secondary=rootfs-b\0" \
> "dh_preboot=" \
> "run dh_testbench_backward_compat\0"\
> "dh_update_sd_to_emmc=" /* Install U-Boot from SD to eMMC */\
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH v2 5/6] video: support FRIDA FRD400B25025-A-CTK
On 4/1/25 09:00, Dario Binacchi wrote: > [backport from Linux commits 9b26d5c044d6a29ebfb1845408e0f2a7c5f89818 > and 219a1f49094f50bf9c382830d06149e677f76bed] > > The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the > Novatek NT35510-based panel family. > > Signed-off-by: Dario Binacchi > --- > > (no changes since v1) > > drivers/video/Kconfig |7 + > drivers/video/Makefile |1 + > drivers/video/novatek-nt35510.c | 1253 +++ > 3 files changed, 1261 insertions(+) > create mode 100644 drivers/video/novatek-nt35510.c > > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig > index 3c3cebaacd02..76dc2d65a6d3 100644 > --- a/drivers/video/Kconfig > +++ b/drivers/video/Kconfig > @@ -550,6 +550,13 @@ config VIDEO_LCD_HIMAX_HX8394 > Say Y here if you want to enable support for Himax HX8394 > dsi 4dl panel. > > +config VIDEO_LCD_NOVATEK_NT35510 > + bool "Novatek NT35510 DSI LCD panel support" > + select VIDEO_MIPI_DSI > + help > + Say Y here if you want to enable support for Novatek nt35510 > + dsi panel. > + > config VIDEO_LCD_ORISETECH_OTM8009A > bool "OTM8009A DSI LCD panel support" > select VIDEO_MIPI_DSI > diff --git a/drivers/video/Makefile b/drivers/video/Makefile > index 5a00438ce064..ff9c9e1c2512 100644 > --- a/drivers/video/Makefile > +++ b/drivers/video/Makefile > @@ -59,6 +59,7 @@ obj-$(CONFIG_VIDEO_LCD_ENDEAVORU) += endeavoru-panel.o > obj-$(CONFIG_VIDEO_LCD_HIMAX_HX8394) += himax-hx8394.o > obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o > obj-$(CONFIG_VIDEO_LCD_LG_LD070WX3) += lg-ld070wx3.o > +obj-$(CONFIG_VIDEO_LCD_NOVATEK_NT35510) += novatek-nt35510.o > obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o > obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o > obj-$(CONFIG_VIDEO_LCD_RENESAS_R61307) += renesas-r61307.o > diff --git a/drivers/video/novatek-nt35510.c b/drivers/video/novatek-nt35510.c > new file mode 100644 > index ..f3432939c0cb > --- /dev/null > +++ b/drivers/video/novatek-nt35510.c > @@ -0,0 +1,1253 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2025 Amarula Solutions, Dario Binacchi > > + * > + * Inspired from the Linux kernel driver panel-novatek-nt35510.c > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define NT35510_CMD_CORRECT_GAMMA BIT(0) > +#define NT35510_CMD_CONTROL_DISPLAY BIT(1) > +#define NT35510_CMD_SETVCMOFF BIT(2) > + > +#define MCS_CMD_MAUCCTR 0xF0 /* Manufacturer command enable */ > +#define MCS_CMD_READ_ID1 0xDA > +#define MCS_CMD_READ_ID2 0xDB > +#define MCS_CMD_READ_ID3 0xDC > +#define MCS_CMD_MTP_READ_SETTING 0xF8 /* Uncertain about name */ > +#define MCS_CMD_MTP_READ_PARAM 0xFF /* Uncertain about name */ > + > +/* > + * These manufacturer commands are available after we enable manufacturer > + * command set (MCS) for page 0. > + */ > +#define NT35510_P0_DOPCTR 0xB1 > +#define NT35510_P0_SDHDTCTR 0xB6 > +#define NT35510_P0_GSEQCTR 0xB7 > +#define NT35510_P0_SDEQCTR 0xB8 > +#define NT35510_P0_SDVPCTR 0xBA > +#define NT35510_P0_DPFRCTR1 0xBD > +#define NT35510_P0_DPFRCTR2 0xBE > +#define NT35510_P0_DPFRCTR3 0xBF > +#define NT35510_P0_DPMCTR12 0xCC > + > +#define NT35510_P0_DOPCTR_LEN 2 > +#define NT35510_P0_GSEQCTR_LEN 2 > +#define NT35510_P0_SDEQCTR_LEN 4 > +#define NT35510_P0_SDVPCTR_LEN 1 > +#define NT35510_P0_DPFRCTR1_LEN 5 > +#define NT35510_P0_DPFRCTR2_LEN 5 > +#define NT35510_P0_DPFRCTR3_LEN 5 > +#define NT35510_P0_DPMCTR12_LEN 3 > + > +#define NT35510_DOPCTR_0_RAMKP BIT(7) /* Contents kept in sleep */ > +#define NT35510_DOPCTR_0_DSITE BIT(6) /* Enable TE signal */ > +#define NT35510_DOPCTR_0_DSIG BIT(5) /* Enable generic read/write */ > +#define NT35510_DOPCTR_0_DSIM BIT(4) /* Enable video mode on DSI */ > +#define NT35510_DOPCTR_0_EOTP BIT(3) /* Support EoTP */ > +#define NT35510_DOPCTR_0_N565 BIT(2) /* RGB or BGR pixel format */ > +#define NT35510_DOPCTR_1_TW_PWR_SEL BIT(4) /* TE power selector */ > +#define NT35510_DOPCTR_1_CRGB BIT(3) /* RGB or BGR byte order */ > +#define NT35510_DOPCTR_1_CTB BIT(2) /* Vertical scanning direction */ > +#define NT35510_DOPCTR_1_CRL BIT(1) /* Source driver data shift */ > +#define NT35510_P0_SDVPCTR_PRG BIT(2) /* 0 = normal operation, 1 = VGLO */ > +#define NT35510_P0_SDVPCTR_AVDD 0 /* source driver output = AVDD */ > +#define NT35510_P0_SDVPCTR_OFFCOL 1 /* source driver output = off color */ > +#define NT35510_P0_SDVPCTR_AVSS 2 /* source driver output = AVSS */ > +#define NT35510_P0_SDVPCTR_HI_Z 3 /* source driver output = High impedance */ > + > +/* > + * These manufacturer commands are available after we enable manufacturer > + * command set (MCS) for page 1. > + */ > +#define NT35510_P1_SETAVDD 0xB0 > +#define NT35510_P1_SETAVEE 0xB1 > +#define NT35510_P1_SETVCL 0xB2 > +#define NT35510_P1_SETVGH 0x
Re: [PATCH] Dockerfile: Update to gcc-14.2.0 and clang-18
On 1/29/25 00:02, Tom Rini wrote:
Outside of changing versions here the other visible change is that we
tell grub that riscv64 does not have "large model" support. Without this
change the resulting mkimage is non-functional. This is known upstream
already.
Link: https://savannah.gnu.org/bugs/?65909
Signed-off-by: Tom Rini
---
.azure-pipelines.yml| 8
.gitlab-ci.yml | 6 +++---
tools/docker/Dockerfile | 8
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index ba351b9802d1..4d3a5800beb3 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -2,7 +2,7 @@ variables:
windows_vm: windows-2022
ubuntu_vm: ubuntu-24.04
macos_vm: macOS-14
- ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20240911.1-08Dec2024
+ ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20240911.1-28Jan2025
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@@ -324,16 +324,16 @@ stages:
TEST_PY_TEST_SPEC: "version"
sandbox_clang:
TEST_PY_BD: "sandbox"
- OVERRIDE: "-O clang-17"
+ OVERRIDE: "-O clang-18"
sandbox_clang_asan:
TEST_PY_BD: "sandbox"
- OVERRIDE: "-O clang-17 -a ASAN"
+ OVERRIDE: "-O clang-18 -a ASAN"
TEST_PY_TEST_SPEC: "version"
sandbox64:
TEST_PY_BD: "sandbox64"
sandbox64_clang:
TEST_PY_BD: "sandbox64"
- OVERRIDE: "-O clang-17"
+ OVERRIDE: "-O clang-18"
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 74dc05d58a70..c3c38e24fd1d 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -20,7 +20,7 @@ workflow:
# Grab our configured image. The source for this is found
# in the u-boot tree at tools/docker/Dockerfile
-image:
${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20240911.1-08Dec2024
+image:
${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20240911.1-28Jan2025
# We run some tests in different order, to catch some failures quicker.
stages:
@@ -241,7 +241,7 @@ sandbox with clang test.py:
- ${DEFAULT_AMD64_TAG}
variables:
TEST_PY_BD: "sandbox"
-OVERRIDE: "-O clang-17"
+OVERRIDE: "-O clang-18"
<<: *buildman_and_testpy_dfn
sandbox64 test.py:
@@ -256,7 +256,7 @@ sandbox64 with clang test.py:
- ${DEFAULT_AMD64_TAG}
variables:
TEST_PY_BD: "sandbox64"
-OVERRIDE: "-O clang-17"
+OVERRIDE: "-O clang-18"
<<: *buildman_and_testpy_dfn
sandbox_spl test.py:
diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile
index d2848ab85f35..b72ed357fa36 100644
--- a/tools/docker/Dockerfile
+++ b/tools/docker/Dockerfile
@@ -23,7 +23,7 @@ ENV ARCHS="aarch64 arc i386 m68k mips microblaze nios2
powerpc riscv64 riscv32 s
ENV MIRROR=https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin
# Toolchain version
-ENV TCVER=13.2.0
+ENV TCVER=14.2.0
RUN echo "Building on $BUILDPLATFORM, for target $TARGETPLATFORM"
@@ -32,7 +32,7 @@ RUN --mount=type=cache,target=/var/cache/apt,sharing=locked \
--mount=type=cache,target=/var/lib/apt,sharing=locked \
apt-get update && apt-get install -y gnupg2 wget xz-utils
RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add -
-RUN echo deb http://apt.llvm.org/jammy/ llvm-toolchain-jammy-17 main | tee
/etc/apt/sources.list.d/llvm.list
+RUN echo deb http://apt.llvm.org/jammy/ llvm-toolchain-jammy-18 main | tee
/etc/apt/sources.list.d/llvm.list
# Create a list of URLs to process, then pass them into a 'while read' loop
RUN if [ "$TARGETPLATFORM" = "linux/amd64" ]; then HOSTARCH=x86_64; else
HOSTARCH=arm64; fi; ( \
@@ -65,7 +65,7 @@ RUN --mount=type=cache,target=/var/cache/apt,sharing=locked \
bison \
build-essential \
cgpt \
- clang-17 \
+ clang-18 \
coreutils \
cpio \
curl \
@@ -182,7 +182,7 @@ RUN git clone git://git.savannah.gnu.org/grub.git /tmp/grub
&& \
search search_fs_file search_fs_uuid search_label serial sleep test \
true && \
make clean && \
- ./configure --target=riscv64 --with-platform=efi \
+ grub_cv_cc_mcmodel=no ./configure --target=riscv64 --with-platform=efi \
Hello Tom,
The upstream GRUB code already has a test in autoconfigure.ac to check
if the large model is supported:
if test "$target_cpu" = x86_64 || test "$target_cpu" = sparc64 || test
"$target_cpu" = riscv64 ; then
# Use large model to support 4G memory
AC_CACHE_CHECK([whether option -mcmodel=large works],
grub_cv_cc_mcmodel, [
CFLAGS="$TARGET_CFLAGS -mcmodel=large"
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
Re: [PATCH 1/3] efi_loader: efi_load_initrd: provide a memory mapped initrd
On 3/18/25 14:23, Adriano Cordova wrote:
U-Boot can pass an initrd to subsequent boot stages via the
EFI_LOAD_FILE2_PROTOCOL. The current implementation only supports
this functionality via the efi boot manager: the initrd is taken
from the load options of the BootCurrent variable. This commit adds
support for registering a memory mapped initrd, e.g. loaded from a
FIT image. For now this new method takes precedence over loading the
initrd from the BootCurrent variable (if both are present) because
the BootCurrent variable is not cleared on exiting the boot manager.
Signed-off-by: Adriano Cordova
---
include/efi_loader.h | 2 +-
lib/efi_loader/efi_bootmgr.c | 2 +-
lib/efi_loader/efi_load_initrd.c | 71 +++-
3 files changed, 62 insertions(+), 13 deletions(-)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index e9c10819ba2..cc732dc4807 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -667,7 +667,7 @@ efi_status_t efi_http_register(const efi_handle_t handle,
struct efi_service_binding_protocol
*http_service_binding);
/* Called by bootefi to make the watchdog available */
efi_status_t efi_watchdog_register(void);
-efi_status_t efi_initrd_register(void);
+efi_status_t efi_initrd_register(struct efi_device_path *dp_initrd);
efi_status_t efi_initrd_deregister(void);
/* Called by bootefi to make SMBIOS tables available */
/**
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index c6124c590d9..6e66cf3793c 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -670,7 +670,7 @@ static efi_status_t try_load_entry(u16 n, efi_handle_t
*handle,
/* try to register load file2 for initrd's */
if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
- ret = efi_initrd_register();
+ ret = efi_initrd_register(NULL);
if (ret != EFI_SUCCESS)
goto error;
}
diff --git a/lib/efi_loader/efi_load_initrd.c b/lib/efi_loader/efi_load_initrd.c
index fb8cc7bcbe3..74b92f8bd66 100644
--- a/lib/efi_loader/efi_load_initrd.c
+++ b/lib/efi_loader/efi_load_initrd.c
@@ -42,6 +42,7 @@ static const struct efi_lo_dp_prefix dp_lf2_handle = {
};
static efi_handle_t efi_initrd_handle;
+static struct efi_device_path *efi_initrd_dp;
/**
* get_initrd_fp() - Get initrd device path from a FilePathList device path
@@ -72,6 +73,41 @@ static efi_status_t get_initrd_fp(struct efi_device_path
**initrd_fp)
return EFI_SUCCESS;
}
+/**
+ * efi_initrd_from_mem() - load initial RAM disk from memory
+ *
+ * This function copies the initrd from the memory mapped device
+ * path pointed to by efi_initrd_dp
+ *
+ * @buffer_size: size of allocated buffer
+ * @buffer:buffer to load the file
+ *
+ * Return: status code
+ */
+static efi_status_t efi_initrd_from_mem(efi_uintn_t *buffer_size, void *buffer)
+{
+ efi_status_t ret = EFI_NOT_FOUND;
+ efi_uintn_t bs;
+ struct efi_device_path_memory *mdp;
+
+ mdp = (struct efi_device_path_memory *)efi_initrd_dp;
+ if (!mdp)
+ return ret;
+
+ bs = mdp->end_address - mdp->start_address;
+
+ if (!buffer || *buffer_size < bs) {
+ ret = EFI_BUFFER_TOO_SMALL;
+ *buffer_size = bs;
+ } else {
+ memcpy(buffer, (void *)mdp->start_address, bs);
This fails to build on 32bit:
+lib/efi_loader/efi_load_initrd.c: In function 'efi_initrd_from_mem':
+lib/efi_loader/efi_load_initrd.c:103:32: error: cast to pointer from
integer of different size [-Werror=int-to-pointer-cast]
+ 103 | memcpy(buffer, (void *)mdp->start_address, bs);
+ |^
start_address is of type u64.
(void *)(uinptr_t) is the correct conversion.
Best regards
Heinrich
+ *buffer_size = bs;
+ ret = EFI_SUCCESS;
+ }
+
+ return ret;
+}
+
/**
* efi_load_file2_initrd() - load initial RAM disk
*
@@ -118,6 +154,9 @@ efi_load_file2_initrd(struct efi_load_file_protocol *this,
goto out;
}
+ if (efi_initrd_dp)
+ return EFI_EXIT(efi_initrd_from_mem(buffer_size, buffer));
+
ret = get_initrd_fp(&initrd_fp);
if (ret != EFI_SUCCESS)
goto out;
@@ -209,6 +248,9 @@ efi_status_t efi_initrd_deregister(void)
NULL);
efi_initrd_handle = NULL;
+ efi_free_pool(efi_initrd_dp);
+ efi_initrd_dp = NULL;
+
return ret;
}
@@ -234,24 +276,31 @@ static void EFIAPI efi_initrd_return_notify(struct
efi_event *event,
* This function creates a new handle and installs a Linux specific vendor
* device path and an EFI_LOAD_FILE2_PROTOCOL. Linux uses the device path
* to identify the handle and then calls the LoadFile servi
Re: Gitlab runner timeout on evb-ast2600 ?
On Fri, 11 Apr 2025 at 16:54, Cédric Le Goater wrote:
>
> Hi,
>
> On 4/11/25 01:14, Tom Rini wrote:
> > On Fri, Apr 11, 2025 at 08:07:15AM +0930, Joel Stanley wrote:
> >> On Mon, 7 Apr 2025 at 23:25, Eugen Hristev
> >> wrote:
> >>>
> >>> Hi everyone,
> >>>
> >>> I keep getting an error on running the CI loop on -next on my tree :
> >>>
> >>> https://source.denx.de/u-boot/custodians/u-boot-at91/-/jobs/1090517
> >>
> >> Thanks for the report.
> >>
> >>>
> >>> ! _pytest.outcomes.Exit: Lab timeout: Marking connection bad - no other
> >>> tests will run !
> >>>
> >>> Any clue ? It's been like this for few days. It doesn't look like a
> >>> faulty patch.
> >>
> >> I can't see that link you sent me, it 403s.
> >>
> >> Do you have any other traces or information to share?
> >
> > It's been intermittent recently. I was able to put qemu + gdb together
> > and see it's one of the early initcalls that fails and hang()s but
> > didn't see why. You should be able to use commit 1f0281294d8b ("Merge
> > patch series "Annotate switch/case fallthrough cases"") as a starting
> > point of failure.
> >
>
> Do you have logs ?
>
> Things look ok from the QEMU side (latest 10.0.0-rc and 9.1) :
I brefily tried to run the steps from CI locally, but couldn't work
out how to get the flash image built. Instead I used the instructions
from 154cffa16a7b6647e180ed6cef55342b39580aff.
Testing master with Debian's qemu 9.2.2:
makearm evb-ast2600_defconfig
make u-boot-with-spl.bin
truncate -s 64M u-boot-with-spl.bin
qemu-system-arm -nographic -M ast2600-evb \
-drive file=u-boot-with-spl.bin,if=mtd,format=raw
U-Boot SPL 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 17:05:20 +0930)
Trying to boot from RAM
## Checking hash(es) for config conf-1 ... OK
## Checking hash(es) for Image firmware-1 ... crc32+ OK
## Checking hash(es) for Image fdt-1 ... crc32+ OK
U-Boot 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 17:05:20 +0930)
Model: Aspeed BMC
DRAM: already initialized, 1008 MiB (capacity:1024 MiB, VGA:64 MiB), ECC off
Core: 266 devices, 24 uclasses, devicetree: separate
WDT: Started watchdog@1e785000 with servicing every 1000ms (60s timeout)
MMC: sdhci@1e750100: 0
Loading Environment from SPIFlash... SF: Detected mx25u51245g with
page size 256 Bytes, erase size 64 KiB, total 64 MiB
*** Warning - bad CRC, using default environment
In:serial@1e784000
Out: serial@1e784000
Err: serial@1e784000
Net: eth0: ftgmac@1e66, eth1: ftgmac@1e68, eth2:
ftgmac@1e67, eth3: ftgmac@1e69
Hit any key to stop autoboot: 0
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
Error loading kernel FIT image
=>
I tried to run qemu using the recipie from CI but I couldn't see where
the step to create the flash image happens.
>
> uboot_build=/path/to/u-boot/
> flashsize=65536
> flash=./flash-ast2600-evb-uboot
> dd of=$flash bs=1K if=/dev/zero count=$flashsize
> dd of=$flash conv=notrunc bs=1K if=$uboot_build/spl/u-boot-spl.bin
> dd of=$flash conv=notrunc bs=1K if=$uboot_build/u-boot.img seek=64
>
> $ qemu-system-arm -M ast2600-evb -net nic,netdev=net0 -netdev
> user,id=net0 -nographic -snapshot -serial mon:stdio -drive
> file=flash-ast2600-evb-uboot,format=raw,if=mtd
> qemu-system-arm: warning: nic ftgmac100.1 has no peer
> qemu-system-arm: warning: nic ftgmac100.2 has no peer
> qemu-system-arm: warning: nic ftgmac100.3 has no peer
>
> U-Boot SPL 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 09:08:40 +0200)
> Trying to boot from RAM
> ## Checking hash(es) for config conf-1 ... OK
> ## Checking hash(es) for Image firmware-1 ... crc32+ OK
> ## Checking hash(es) for Image fdt-1 ... crc32+ OK
>
>
> U-Boot 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 09:08:40 +0200)
>
> Model: Aspeed BMC
> DRAM: already initialized, 1008 MiB (capacity:1024 MiB, VGA:64 MiB),
> ECC off
> Core: 266 devices, 24 uclasses, devicetree: separate
> WDT: Started watchdog@1e785000 with servicing every 1000ms (60s
> timeout)
> MMC: sdhci@1e750100: 0
> Loading Environment from SPIFlash... SF: Detected mx25u51245g with page
> size 256 Bytes, erase size 64 KiB, total 64 MiB
> *** Warning - bad CRC, using default environment
>
> In:serial@1e784000
> Out: serial@1e784000
> Err: serial@1e784000
> Net: eth0: ftgmac@1e66, eth1: ftgmac@1e68, eth2:
> ftgmac@1e67, eth3: ftgmac@1e69
> Hit any key to stop autoboot: 0
> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
> Error loading kernel FIT image
> =>
>
>
> Thanks,
>
> C.
>
>
[PATCH v9 01/20] firmware: scmi: use scmi_proto_driver_get() function to get SCMI protocol driver
From: Alice Guo
If there is a SoC specific SCMI protocol driver, using
scmi_proto_driver_get() function can avoid to add SoC specific code to
scmi_agent-uclass.c.
Signed-off-by: Alice Guo
---
drivers/clk/clk_scmi.c| 8 +++
drivers/firmware/scmi/scmi_agent-uclass.c | 28 ---
drivers/power/domain/scmi-power-domain.c | 8 +++
drivers/power/regulator/scmi_regulator.c | 8 +++
drivers/reset/reset-scmi.c| 8 +++
5 files changed, 36 insertions(+), 24 deletions(-)
diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c
index e42d2032d45..b8d40cc9653 100644
--- a/drivers/clk/clk_scmi.c
+++ b/drivers/clk/clk_scmi.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -191,3 +192,10 @@ U_BOOT_DRIVER(scmi_clock) = {
.ops = &scmi_clk_ops,
.probe = scmi_clk_probe,
};
+
+static struct scmi_proto_match match[] = {
+ { .proto_id = SCMI_PROTOCOL_ID_CLOCK },
+ { /* Sentinel */ }
+};
+
+U_BOOT_SCMI_PROTO_DRIVER(scmi_clock, match);
diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c
b/drivers/firmware/scmi/scmi_agent-uclass.c
index ea79cfa0cf2..cc3f31d881e 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -425,31 +425,11 @@ static int scmi_bind_protocols(struct udevice *dev)
drv = NULL;
name = ofnode_get_name(node);
- switch (protocol_id) {
- case SCMI_PROTOCOL_ID_POWER_DOMAIN:
- if (CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN) &&
- scmi_protocol_is_supported(dev, protocol_id))
- drv = DM_DRIVER_GET(scmi_power_domain);
- break;
- case SCMI_PROTOCOL_ID_CLOCK:
- if (CONFIG_IS_ENABLED(CLK_SCMI) &&
- scmi_protocol_is_supported(dev, protocol_id))
- drv = DM_DRIVER_GET(scmi_clock);
- break;
- case SCMI_PROTOCOL_ID_RESET_DOMAIN:
- if (IS_ENABLED(CONFIG_RESET_SCMI) &&
- scmi_protocol_is_supported(dev, protocol_id))
- drv = DM_DRIVER_GET(scmi_reset_domain);
- break;
- case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
- if (IS_ENABLED(CONFIG_DM_REGULATOR_SCMI) &&
- scmi_protocol_is_supported(dev, protocol_id))
- drv = DM_DRIVER_GET(scmi_voltage_domain);
- break;
- default:
- break;
- }
+ if (!scmi_protocol_is_supported(dev, protocol_id))
+ continue;
+
+ drv = scmi_proto_driver_get(protocol_id);
if (!drv) {
dev_dbg(dev, "Ignore unsupported SCMI protocol %#x\n",
protocol_id);
diff --git a/drivers/power/domain/scmi-power-domain.c
b/drivers/power/domain/scmi-power-domain.c
index 3cd0f075d95..e8c0ba8878e 100644
--- a/drivers/power/domain/scmi-power-domain.c
+++ b/drivers/power/domain/scmi-power-domain.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
@@ -190,3 +191,10 @@ U_BOOT_DRIVER(scmi_power_domain) = {
.probe = scmi_power_domain_probe,
.priv_auto = sizeof(struct scmi_power_domain_priv),
};
+
+static struct scmi_proto_match match[] = {
+ { .proto_id = SCMI_PROTOCOL_ID_POWER_DOMAIN },
+ { /* Sentinel */ }
+};
+
+U_BOOT_SCMI_PROTO_DRIVER(scmi_power_domain, match);
diff --git a/drivers/power/regulator/scmi_regulator.c
b/drivers/power/regulator/scmi_regulator.c
index 79db1a6a8aa..7d2db1e2bee 100644
--- a/drivers/power/regulator/scmi_regulator.c
+++ b/drivers/power/regulator/scmi_regulator.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -202,3 +203,10 @@ U_BOOT_DRIVER(scmi_voltage_domain) = {
.id = UCLASS_NOP,
.bind = scmi_regulator_bind,
};
+
+static struct scmi_proto_match match[] = {
+ { .proto_id = SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN },
+ { /* Sentinel */ }
+};
+
+U_BOOT_SCMI_PROTO_DRIVER(scmi_voltage_domain, match);
diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c
index 6dc1fcb3365..f92a9e35579 100644
--- a/drivers/reset/reset-scmi.c
+++ b/drivers/reset/reset-scmi.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
@@ -81,3 +82,10 @@ U_BOOT_DRIVER(scmi_reset_domain) = {
.ops = &scmi_reset_domain_ops,
.probe = scmi_reset_probe,
};
+
+static struct scmi_proto_match match[] = {
+ { .proto_id = SCMI_PROTOCOL_ID_RESET_DOMAIN },
+ { /* Sentinel */ }
+};
+
+U_BOOT_SCMI_PROTO_DRIVER(scmi_reset_domain, match);
--
2.43.0
[PATCH v9 00/20] imx: add i.MX95 support
From: Alice Guo Changes for v9: - remove the "firmware: scmi: smt: Interrupt communication enable" patch from this patch-set and sent it separately https://patchwork.ozlabs.org/project/uboot/patch/20250401075635.3802640-1-alice@oss.nxp.com/ - use scmi_proto_driver_get() function to get SCMI protocol driver, which dependents on two patches which have not been applied https://patchwork.ozlabs.org/project/uboot/patch/2025032201.174796-1-ma...@denx.de/ https://patchwork.ozlabs.org/project/uboot/patch/20250409075352.535194-1-alice@oss.nxp.com/ - query SCMI clock management protocol version in .probe() once and cache the value in private data - explain u32 protocols[] in struct scmi_base_discover_list_protocols_out in commit log - make debug prints in read_auth_image() a bit more informative - keep the list of "config IMX8_ROMAPI" sorted - correct spelling errors in imx95_container.txt Signed-off-by: Alice Guo Alice Guo (11): firmware: scmi: use scmi_proto_driver_get() function to get SCMI protocol driver pinctrl: nxp: add a pin controller driver based on SCMI pin control protocol firmware: scmi_agent: add SCMI pin control protocol support clk: scmi: check the clock state/parent/rate control permissions sandbox: add SCMI clock control permissions to sandbox cpu: imx95: add i.MX95 support imx: Kconfig: IMX8_ROMAPI is not configured for i.MX95 binman: add a new entry type for packing DDR PHY firmware images tools: imx8image: add i.MX95 support doc: imx: add document for i.MX95 Image Container Format Makefile: add some files to CLEAN_FILES Peng Fan (4): scmi_protocols: add SCMI misc protocol protocol_id and message_id for getting the ROM passover data scmi_protocols: add SCMI Performance domain management protocol message IDs clk: scmi: add the command CLOCK_PARENT_SET imx9: scmi: add i.MX95 SoC and clock related code Ye Li (5): scmi_protocols: update struct scmi_base_discover_list_protocols_out spl: imx: use trampoline buffer to load images to secure region imx9: add i.MX95 Kconfig and Makefile imx: container: add V2X container support for i.MX95 imx95_evk: add i.MX95 19x19 EVK board basic support Makefile | 3 +- arch/arm/dts/imx95-19x19-evk-u-boot.dtsi | 62 ++ arch/arm/dts/imx95-u-boot.dtsi| 188 + arch/arm/include/asm/arch-imx/cpu.h | 2 + arch/arm/include/asm/arch-imx9/clock.h| 10 + arch/arm/include/asm/arch-imx9/imx-regs.h | 6 + arch/arm/include/asm/arch-imx9/sys_proto.h| 1 + arch/arm/include/asm/mach-imx/sys_proto.h | 39 + arch/arm/mach-imx/Kconfig | 2 +- arch/arm/mach-imx/image-container.c | 119 ++- arch/arm/mach-imx/imx9/Kconfig| 15 + arch/arm/mach-imx/imx9/Makefile | 9 +- arch/arm/mach-imx/imx9/scmi/Makefile | 6 + arch/arm/mach-imx/imx9/scmi/clock.c | 70 ++ arch/arm/mach-imx/imx9/scmi/clock_scmi.c | 133 arch/arm/mach-imx/imx9/scmi/container.cfg | 10 + arch/arm/mach-imx/imx9/scmi/imximage.cfg | 15 + arch/arm/mach-imx/imx9/scmi/soc.c | 749 ++ arch/sandbox/include/asm/scmi_test.h | 4 +- board/freescale/imx95_evk/Kconfig | 12 + board/freescale/imx95_evk/MAINTAINERS | 6 + board/freescale/imx95_evk/Makefile| 11 + board/freescale/imx95_evk/imx95_19x19_evk.env | 91 +++ board/freescale/imx95_evk/imx95_evk.c | 36 + board/freescale/imx95_evk/spl.c | 69 ++ common/spl/Kconfig| 6 + common/spl/spl_imx_container.c| 41 +- configs/imx95_19x19_evk_defconfig | 152 doc/board/nxp/imx95_evk.rst | 114 +++ doc/board/nxp/index.rst | 1 + doc/imx/imx95_container.txt | 136 drivers/clk/clk_scmi.c| 204 - drivers/cpu/imx8_cpu.c| 2 + drivers/firmware/scmi/base.c | 24 +- drivers/firmware/scmi/sandbox-scmi_agent.c| 56 +- drivers/firmware/scmi/scmi_agent-uclass.c | 34 +- drivers/pinctrl/nxp/Kconfig | 13 + drivers/pinctrl/nxp/Makefile | 1 + drivers/pinctrl/nxp/pinctrl-imx-scmi.c| 162 drivers/power/domain/scmi-power-domain.c | 8 + drivers/power/regulator/scmi_regulator.c | 8 + drivers/reset/reset-scmi.c| 8 + include/configs/imx95_evk.h | 24 + include/imx8image.h | 19 +- include/scmi_agent-uclass.h | 2 + include/scmi_protocols.h | 104 ++- tools/binman/entries.rst | 10 + tools/binman/etype/nxp_header_ddrfw.py| 29 + tools/binman/ftest.py | 11 + tools/binman/test/346_nxp_
[PATCH v9 02/20] pinctrl: nxp: add a pin controller driver based on SCMI pin control protocol
From: Alice Guo
This patch provides a pinctrl driver based on SCMI pin control protocol.
Currently, only the PINCTRL_CONFIG_SET command is implemented.
Signed-off-by: Ranjani Vaidyanathan
Signed-off-by: Peng Fan
Signed-off-by: Alice Guo
Reviewed-by: Ye Li
---
drivers/pinctrl/nxp/Kconfig| 13 +++
drivers/pinctrl/nxp/Makefile | 1 +
drivers/pinctrl/nxp/pinctrl-imx-scmi.c | 154 +
include/scmi_protocols.h | 36 ++
4 files changed, 204 insertions(+)
create mode 100644 drivers/pinctrl/nxp/pinctrl-imx-scmi.c
diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig
index d13c5f2a6d5..84d9a3641ff 100644
--- a/drivers/pinctrl/nxp/Kconfig
+++ b/drivers/pinctrl/nxp/Kconfig
@@ -139,6 +139,19 @@ config PINCTRL_IMXRT
only parses the 'fsl,pins' property and configure related
registers.
+config PINCTRL_IMX_SCMI
+ bool "IMX pinctrl SCMI driver"
+ depends on ARCH_IMX9 && PINCTRL_FULL
+ select PINCTRL_IMX
+ help
+ This provides a simple pinctrl driver for i.MX SoC which supports
+ SCMI. This feature depends on device tree configuration. This driver
+ is different from the linux one, this is a simple implementation,
+ only parses the 'fsl,pins' property and configure related
+ registers.
+
+ Say Y here to enable the imx pinctrl SCMI driver
+
config PINCTRL_VYBRID
bool "Vybrid (vf610) pinctrl driver"
depends on ARCH_VF610 && PINCTRL_FULL
diff --git a/drivers/pinctrl/nxp/Makefile b/drivers/pinctrl/nxp/Makefile
index 44e37c631e5..7d861ae52c1 100644
--- a/drivers/pinctrl/nxp/Makefile
+++ b/drivers/pinctrl/nxp/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_PINCTRL_IMX93) += pinctrl-imx93.o
obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o
obj-$(CONFIG_PINCTRL_VYBRID) += pinctrl-vf610.o
obj-$(CONFIG_PINCTRL_IMXRT)+= pinctrl-imxrt.o
+obj-$(CONFIG_PINCTRL_IMX_SCMI) += pinctrl-imx-scmi.o
diff --git a/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
new file mode 100644
index 000..20ea55d40ae
--- /dev/null
+++ b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 NXP
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "pinctrl-imx.h"
+
+#define DAISY_OFFSET_IMX95 0x408
+
+/* SCMI pin control types */
+#define PINCTRL_TYPE_MUX192
+#define PINCTRL_TYPE_CONFIG 193
+#define PINCTRL_TYPE_DAISY_ID 194
+#define PINCTRL_TYPE_DAISY_CFG 195
+#define PINCTRL_NUM_CFGS_SHIFT 2
+
+struct imx_scmi_pinctrl_priv {
+ u16 daisy_offset;
+};
+
+static int imx_pinconf_scmi_set(struct udevice *dev, u32 mux_ofs, u32 mux, u32
config_val,
+ u32 input_ofs, u32 input_val)
+{
+ struct imx_scmi_pinctrl_priv *priv = dev_get_priv(dev);
+ int ret, num_cfgs = 0;
+ struct scmi_msg msg;
+
+ /* Call SCMI API to set the pin mux and configuration. */
+ struct scmi_pinctrl_config_set_out out;
+ struct scmi_pinctrl_config_set_in in = {
+ .identifier = mux_ofs / 4,
+ .function_id = 0x,
+ .attributes = 0,
+ };
+
+ if (mux_ofs) {
+ in.configs[num_cfgs].type = PINCTRL_TYPE_MUX;
+ in.configs[num_cfgs].val = mux;
+ num_cfgs++;
+ }
+
+ if (config_val) {
+ in.configs[num_cfgs].type = PINCTRL_TYPE_CONFIG;
+ in.configs[num_cfgs].val = config_val;
+ num_cfgs++;
+ }
+
+ if (input_ofs) {
+ in.configs[num_cfgs].type = PINCTRL_TYPE_DAISY_ID;
+ in.configs[num_cfgs].val = (input_ofs - priv->daisy_offset) /
4;
+ num_cfgs++;
+ in.configs[num_cfgs].type = PINCTRL_TYPE_DAISY_CFG;
+ in.configs[num_cfgs].val = input_val;
+ num_cfgs++;
+ }
+
+ /* Update the number of configs sent in this call. */
+ in.attributes = num_cfgs << PINCTRL_NUM_CFGS_SHIFT;
+
+ msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_PINCTRL,
+ SCMI_MSG_PINCTRL_CONFIG_SET, in, out);
+
+ ret = devm_scmi_process_msg(dev, &msg);
+ if (ret || out.status) {
+ dev_err(dev, "Failed to set PAD = %d, daisy = %d, scmi_err =
%d, ret = %d\n",
+ mux_ofs / 4, input_ofs / 4, out.status, ret);
+ }
+
+ return ret;
+}
+
+static int imx_pinctrl_set_state_scmi(struct udevice *dev, struct udevice
*config)
+{
+ int mux_ofs, mux, config_val, input_reg, input_val;
+ u32 *pin_data;
+ int i, j = 0;
+ int npins;
+ int ret;
+
+ ret = imx_pinctrl_set_state_common(dev, config, FSL_PIN_SIZE,
+ &pin_data, &npins);
+ if (ret)
+ retu
[PATCH v9 03/20] firmware: scmi_agent: add SCMI pin control protocol support
From: Alice Guo
This patch adds SCMI pin control protocol support to make the pin
controller driver based on SCMI, such as
drivers/pinctrl/nxp/pinctrl-imx-scmi.c, can be bound to the SCMI agent
device whose protocol id is 0x19.
Signed-off-by: Alice Guo
---
drivers/firmware/scmi/scmi_agent-uclass.c | 6 ++
drivers/pinctrl/nxp/pinctrl-imx-scmi.c| 8
include/scmi_agent-uclass.h | 2 ++
3 files changed, 16 insertions(+)
diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c
b/drivers/firmware/scmi/scmi_agent-uclass.c
index cc3f31d881e..e7ec2c108e6 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -97,6 +97,9 @@ struct udevice *scmi_get_protocol(struct udevice *dev,
case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
proto = priv->voltagedom_dev;
break;
+ case SCMI_PROTOCOL_ID_PINCTRL:
+ proto = priv->pinctrl_dev;
+ break;
default:
dev_err(dev, "Protocol not supported\n");
proto = NULL;
@@ -147,6 +150,9 @@ static int scmi_add_protocol(struct udevice *dev,
case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
priv->voltagedom_dev = proto;
break;
+ case SCMI_PROTOCOL_ID_PINCTRL:
+ priv->pinctrl_dev = proto;
+ break;
default:
dev_err(dev, "Protocol not supported\n");
return -EPROTO;
diff --git a/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
index 20ea55d40ae..cc92dd89466 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx-scmi.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include "pinctrl-imx.h"
@@ -152,3 +153,10 @@ U_BOOT_DRIVER(scmi_pinctrl_imx) = {
.ops = &imx_scmi_pinctrl_ops,
.flags = DM_FLAG_PRE_RELOC,
};
+
+static struct scmi_proto_match match[] = {
+ { .proto_id = SCMI_PROTOCOL_ID_PINCTRL },
+ { /* Sentinel */ }
+};
+
+U_BOOT_SCMI_PROTO_DRIVER(scmi_pinctrl_imx, match);
diff --git a/include/scmi_agent-uclass.h b/include/scmi_agent-uclass.h
index 842c56858af..d6586eb3ff9 100644
--- a/include/scmi_agent-uclass.h
+++ b/include/scmi_agent-uclass.h
@@ -27,6 +27,7 @@ struct scmi_channel;
* @clock_dev: SCMI clock protocol device
* @resetdom_dev: SCMI reset domain protocol device
* @voltagedom_dev:SCMI voltage domain protocol device
+ * @pinctrl_dev: SCMI pin control protocol device
*/
struct scmi_agent_priv {
u32 version;
@@ -43,6 +44,7 @@ struct scmi_agent_priv {
struct udevice *clock_dev;
struct udevice *resetdom_dev;
struct udevice *voltagedom_dev;
+ struct udevice *pinctrl_dev;
};
static inline u32 scmi_version(struct udevice *dev)
--
2.43.0
[PATCH v9 04/20] scmi_protocols: add SCMI misc protocol protocol_id and message_id for getting the ROM passover data
From: Peng Fan
SCMI misc protocol is intended for miscellaneous functions which are
device specific and are usually defined to access bit fields. It is i.MX
specific. This patch adds SCMI misc protocol protocol_id and message_id
for getting the ROM passover data.
Signed-off-by: Peng Fan
Signed-off-by: Alice Guo
Reviewed-by: Ye Li
Reviewed-by: Marek Vasut
---
include/scmi_protocols.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index 279ebbad440..06de4a601f8 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -25,6 +25,7 @@ enum scmi_std_protocol {
SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16,
SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN = 0x17,
SCMI_PROTOCOL_ID_PINCTRL = 0x19,
+ SCMI_PROTOCOL_ID_IMX_MISC = 0x84,
};
enum scmi_status_code {
@@ -50,6 +51,10 @@ enum scmi_discovery_id {
SCMI_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2,
};
+enum scmi_imx_misc_message_id {
+ SCMI_MISC_ROM_PASSOVER_GET = 0x7
+};
+
/*
* SCMI Base Protocol
*/
--
2.43.0
[PATCH v9 05/20] scmi_protocols: add SCMI Performance domain management protocol message IDs
From: Peng Fan
SCMI Performance domain management protocol is intended for performance
management of groups of devices or APs that run in the same performance
domain. The functionality provided by the callee-side can be used by
passing the corresponding message_id.
Signed-off-by: Peng Fan
Signed-off-by: Alice Guo
Reviewed-by: Ye Li
Reviewed-by: Marek Vasut
---
include/scmi_protocols.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index 06de4a601f8..34f272c448c 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -1046,4 +1046,22 @@ struct scmi_pinctrl_config_set_out {
s32 status;
};
+/* SCMI Perf Protocol */
+enum scmi_perf_message_id {
+ SCMI_PERF_DOMAIN_ATTRIBUTES = 0x3,
+ SCMI_PERF_DESCRIBE_LEVELS = 0x4,
+ SCMI_PERF_LIMITS_SET = 0x5,
+ SCMI_PERF_LIMITS_GET = 0x6,
+ SCMI_PERF_LEVEL_SET = 0x7,
+ SCMI_PERF_LEVEL_GET = 0x8
+};
+
+struct scmi_perf_in {
+ u32 domain_id;
+ u32 perf_level;
+};
+
+struct scmi_perf_out {
+ s32 status;
+};
#endif /* _SCMI_PROTOCOLS_H */
--
2.43.0
[PATCH v9 07/20] clk: scmi: check the clock state/parent/rate control permissions
From: Alice Guo
Clock driver based on SCMI clock management protocol in Linux checks
clock state, parent and rate control permissions. To be consistent with
the kernel driver, add this check here. CLOCK_GET_PERMISSIONS is from
ARM System Control and Management Interface Platform Design Document 3.2.
When using common clock framework (CCF), use the clock signal ID to get
the clock registered by clk_register() in scmi_clk_probe(), and then
obatin the struct clk_scmi variable with container_of().
Signed-off-by: Alice Guo
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
---
drivers/clk/clk_scmi.c | 178 ---
include/scmi_protocols.h | 24 ++
2 files changed, 190 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c
index af5e8679003..af69850cdd8 100644
--- a/drivers/clk/clk_scmi.c
+++ b/drivers/clk/clk_scmi.c
@@ -13,6 +13,54 @@
#include
#include
+struct clk_scmi {
+ struct clk clk;
+ u32 ctrl_flags;
+};
+
+struct scmi_clock_priv {
+ u32 version;
+};
+
+static int scmi_clk_get_permissions(struct udevice *dev, int clkid, u32 *perm)
+{
+ struct scmi_clock_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ struct scmi_clk_get_permissions_in in = {
+ .clock_id = clkid,
+ };
+ struct scmi_clk_get_permissions_out out;
+ struct scmi_msg msg = {
+ .protocol_id = SCMI_PROTOCOL_ID_CLOCK,
+ .message_id = SCMI_CLOCK_GET_PERMISSIONS,
+ .in_msg = (u8 *)&in,
+ .in_msg_sz = sizeof(in),
+ .out_msg = (u8 *)&out,
+ .out_msg_sz = sizeof(out),
+ };
+
+ if (priv->version < CLOCK_PROTOCOL_VERSION_3_0) {
+ log_debug("%s: SCMI clock management protocol version is less
than 3.0.\n", __func__);
+ return -EINVAL;
+ }
+
+ ret = devm_scmi_process_msg(dev, &msg);
+ if (ret) {
+ log_debug("%s: get SCMI clock management protocol permissions
failed\n", __func__);
+ return ret;
+ }
+
+ ret = scmi_to_linux_errno(out.status);
+ if (ret < 0) {
+ log_debug("%s: the status code of getting permissions: %d\n",
__func__, ret);
+ return ret;
+ }
+
+ *perm = out.permissions;
+ return 0;
+}
+
static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks)
{
struct scmi_clk_protocol_attr_out out;
@@ -33,7 +81,8 @@ static int scmi_clk_get_num_clock(struct udevice *dev, size_t
*num_clocks)
return 0;
}
-static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name)
+static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name,
+u32 *attr)
{
struct scmi_clk_attribute_in in = {
.clock_id = clkid,
@@ -54,6 +103,7 @@ static int scmi_clk_get_attibute(struct udevice *dev, int
clkid, char **name)
return ret;
*name = strdup(out.clock_name);
+ *attr = out.attributes;
return 0;
}
@@ -79,12 +129,48 @@ static int scmi_clk_gate(struct clk *clk, int enable)
static int scmi_clk_enable(struct clk *clk)
{
- return scmi_clk_gate(clk, 1);
+ struct clk_scmi *clkscmi;
+ struct clk *c;
+ int ret;
+
+ if (!CONFIG_IS_ENABLED(CLK_CCF))
+ return scmi_clk_gate(clk, 1);
+
+ ret = clk_get_by_id(clk->id, &c);
+ if (ret)
+ return ret;
+
+ clkscmi = container_of(c, struct clk_scmi, clk);
+
+ if (clkscmi->ctrl_flags & SUPPORT_CLK_STAT_CONTROL)
+ return scmi_clk_gate(clk, 1);
+
+ /* Following Linux drivers/clk/clk-scmi.c, directly return 0 if agent
has no permission. */
+ log_debug("%s: SCMI CLOCK: the clock cannot be enabled by the
agent.\n", __func__);
+ return 0;
}
static int scmi_clk_disable(struct clk *clk)
{
- return scmi_clk_gate(clk, 0);
+ struct clk_scmi *clkscmi;
+ struct clk *c;
+ int ret;
+
+ if (!CONFIG_IS_ENABLED(CLK_CCF))
+ return scmi_clk_gate(clk, 0);
+
+ ret = clk_get_by_id(clk->id, &c);
+ if (ret)
+ return ret;
+
+ clkscmi = container_of(c, struct clk_scmi, clk);
+
+ if (clkscmi->ctrl_flags & SUPPORT_CLK_STAT_CONTROL)
+ return scmi_clk_gate(clk, 0);
+
+ /* Following Linux drivers/clk/clk-scmi.c, directly return 0 if agent
has no permission. */
+ log_debug("%s: SCMI CLOCK: the clock cannot be disabled by the
agent.\n", __func__);
+ return 0;
}
static ulong scmi_clk_get_rate(struct clk *clk)
@@ -109,7 +195,7 @@ static ulong scmi_clk_get_rate(struct clk *clk)
return (ulong)(((u64)out.rate_msb << 32) | out.rate_lsb);
}
-static ulong scmi_clk_set_rate(struct clk *clk, ulong rate)
+static ulong __scmi_clk_set_rate(struct clk *clk, ulong rate)
{
struct scmi_clk_rate_set_in in =
[PATCH v9 09/20] scmi_protocols: update struct scmi_base_discover_list_protocols_out
From: Ye Li
@protocols is an array of protocol identifiers that are implemented,
excluding the Base protocol. Four protocol identifiers are packed into
each array element. The number of elements of @protocols is specified by
callee-side.
Signed-off-by: Ye Li
Signed-off-by: Alice Guo
---
drivers/firmware/scmi/base.c | 24 +---
include/scmi_protocols.h | 2 +-
2 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/firmware/scmi/base.c b/drivers/firmware/scmi/base.c
index f4e3974ff5b..78ee2ffd2da 100644
--- a/drivers/firmware/scmi/base.c
+++ b/drivers/firmware/scmi/base.c
@@ -258,7 +258,7 @@ static int scmi_base_discover_impl_version_int(struct
udevice *dev,
static int scmi_base_discover_list_protocols_int(struct udevice *dev,
u8 **protocols)
{
- struct scmi_base_discover_list_protocols_out out;
+ struct scmi_base_discover_list_protocols_out *out;
int cur;
struct scmi_msg msg = {
.protocol_id = SCMI_PROTOCOL_ID_BASE,
@@ -268,7 +268,7 @@ static int scmi_base_discover_list_protocols_int(struct
udevice *dev,
.out_msg = (u8 *)&out,
.out_msg_sz = sizeof(out),
};
- u32 num_agents, num_protocols;
+ u32 num_agents, num_protocols, out_size;
u8 *buf;
int i, ret;
@@ -276,22 +276,31 @@ static int scmi_base_discover_list_protocols_int(struct
udevice *dev,
if (ret)
return ret;
+ out_size = sizeof(*out) + sizeof(u32) * (1 + num_protocols / 4);
+ out = calloc(1, out_size);
+ if (!out)
+ return -ENOMEM;
+ msg.out_msg = (u8 *)out;
+ msg.out_msg_sz = out_size;
+
buf = calloc(sizeof(u8), num_protocols);
- if (!buf)
+ if (!buf) {
+ free(out);
return -ENOMEM;
+ }
cur = 0;
do {
ret = devm_scmi_process_msg(dev, &msg);
if (ret)
goto err;
- if (out.status) {
- ret = scmi_to_linux_errno(out.status);
+ if (out->status) {
+ ret = scmi_to_linux_errno(out->status);
goto err;
}
- for (i = 0; i < out.num_protocols; i++, cur++)
- buf[cur] = out.protocols[i / 4] >> ((i % 4) * 8);
+ for (i = 0; i < out->num_protocols; i++, cur++)
+ buf[cur] = out->protocols[i / 4] >> ((i % 4) * 8);
} while (cur < num_protocols);
*protocols = buf;
@@ -299,6 +308,7 @@ static int scmi_base_discover_list_protocols_int(struct
udevice *dev,
return num_protocols;
err:
free(buf);
+ free(out);
return ret;
}
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index 519b906b4ce..9046de7e3e7 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -145,7 +145,7 @@ struct scmi_base_discover_impl_version_out {
struct scmi_base_discover_list_protocols_out {
s32 status;
u32 num_protocols;
- u32 protocols[3];
+ u32 protocols[];
};
/**
--
2.43.0
[PATCH v9 06/20] clk: scmi: add the command CLOCK_PARENT_SET
From: Peng Fan
This patch adds the command CLOCK_PARENT_SET that can be used to set the
parent of a clock. ARM SCMI Version 3.2 supports to change the parent of
a clock device.
Signed-off-by: Peng Fan
Signed-off-by: Alice Guo
Reviewed-by: Ye Li
Reviewed-by: Marek Vasut
---
drivers/clk/clk_scmi.c | 20
include/scmi_protocols.h | 19 +++
2 files changed, 39 insertions(+)
diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c
index b8d40cc9653..af5e8679003 100644
--- a/drivers/clk/clk_scmi.c
+++ b/drivers/clk/clk_scmi.c
@@ -179,11 +179,31 @@ static int scmi_clk_probe(struct udevice *dev)
return 0;
}
+static int scmi_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct scmi_clk_parent_set_in in = {
+ .clock_id = clk->id,
+ .parent_clk = parent->id,
+ };
+ struct scmi_clk_parent_set_out out;
+ struct scmi_msg msg = SCMI_MSG_IN(SCMI_PROTOCOL_ID_CLOCK,
+ SCMI_CLOCK_PARENT_SET,
+ in, out);
+ int ret;
+
+ ret = devm_scmi_process_msg(clk->dev, &msg);
+ if (ret < 0)
+ return ret;
+
+ return scmi_to_linux_errno(out.status);
+}
+
static const struct clk_ops scmi_clk_ops = {
.enable = scmi_clk_enable,
.disable = scmi_clk_disable,
.get_rate = scmi_clk_get_rate,
.set_rate = scmi_clk_set_rate,
+ .set_parent = scmi_clk_set_parent,
};
U_BOOT_DRIVER(scmi_clock) = {
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index 34f272c448c..342a65ae7f4 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -737,6 +737,7 @@ enum scmi_clock_message_id {
SCMI_CLOCK_RATE_SET = 0x5,
SCMI_CLOCK_RATE_GET = 0x6,
SCMI_CLOCK_CONFIG_SET = 0x7,
+ SCMI_CLOCK_PARENT_SET = 0xD,
};
#define SCMI_CLK_PROTO_ATTR_COUNT_MASK GENMASK(15, 0)
@@ -839,6 +840,24 @@ struct scmi_clk_rate_set_out {
s32 status;
};
+/**
+ * struct scmi_clk_parent_state_in - Message payload for CLOCK_PARENT_SET
command
+ * @clock_id: SCMI clock ID
+ * @parent_clk:SCMI clock ID
+ */
+struct scmi_clk_parent_set_in {
+ u32 clock_id;
+ u32 parent_clk;
+};
+
+/**
+ * struct scmi_clk_parent_set_out - Response payload for CLOCK_PARENT_SET
command
+ * @status:SCMI command status
+ */
+struct scmi_clk_parent_set_out {
+ s32 status;
+};
+
/*
* SCMI Reset Domain Protocol
*/
--
2.43.0
[PATCH v9 08/20] sandbox: add SCMI clock control permissions to sandbox
From: Alice Guo
This patch is used to add SCMI clock control permissions to sandbox for
testing.
Signed-off-by: Alice Guo
---
arch/sandbox/include/asm/scmi_test.h | 2 +
drivers/firmware/scmi/sandbox-scmi_agent.c | 56 --
2 files changed, 55 insertions(+), 3 deletions(-)
diff --git a/arch/sandbox/include/asm/scmi_test.h
b/arch/sandbox/include/asm/scmi_test.h
index 619f8f5098c..b30e536a357 100644
--- a/arch/sandbox/include/asm/scmi_test.h
+++ b/arch/sandbox/include/asm/scmi_test.h
@@ -27,10 +27,12 @@ struct sandbox_scmi_pwd {
* @id:Identifier of the clock used in the SCMI protocol
* @enabled: Clock state: true if enabled, false if disabled
* @rate: Clock rate in Hertz
+ * @perm: Indicating state/parent/rate permission
*/
struct sandbox_scmi_clk {
bool enabled;
ulong rate;
+ u32 perm;
};
/**
diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c
b/drivers/firmware/scmi/sandbox-scmi_agent.c
index 19be280ec44..74a87832dcb 100644
--- a/drivers/firmware/scmi/sandbox-scmi_agent.c
+++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
@@ -80,9 +80,9 @@ static struct sandbox_scmi_pwd scmi_pwdom[] = {
};
static struct sandbox_scmi_clk scmi_clk[] = {
- { .rate = 333 },
- { .rate = 200 },
- { .rate = 1000 },
+ { .rate = 333, .perm = 0xE000 },
+ { .rate = 200, .perm = 0xE000 },
+ { .rate = 1000, .perm = 0xE000 },
};
static struct sandbox_scmi_reset scmi_reset[] = {
@@ -700,6 +700,21 @@ static int sandbox_scmi_pwd_name_get(struct udevice *dev,
struct scmi_msg *msg)
/* Clock Protocol */
+static int sandbox_scmi_clock_protocol_version(struct udevice *dev,
+ struct scmi_msg *msg)
+{
+ struct scmi_protocol_version_out *out = NULL;
+
+ if (!msg->out_msg || msg->out_msg_sz < sizeof(*out))
+ return -EINVAL;
+
+ out = (struct scmi_protocol_version_out *)msg->out_msg;
+ out->version = 0x3;
+ out->status = SCMI_SUCCESS;
+
+ return 0;
+}
+
static int sandbox_scmi_clock_protocol_attribs(struct udevice *dev,
struct scmi_msg *msg)
{
@@ -740,6 +755,9 @@ static int sandbox_scmi_clock_attribs(struct udevice *dev,
struct scmi_msg *msg)
if (clk_state->enabled)
out->attributes = 1;
+ /* Restricted clock */
+ out->attributes |= BIT(1);
+
ret = snprintf(out->clock_name, sizeof(out->clock_name),
"clk%u", in->clock_id);
assert(ret > 0 && ret < sizeof(out->clock_name));
@@ -837,6 +855,34 @@ static int sandbox_scmi_clock_gate(struct udevice *dev,
struct scmi_msg *msg)
return 0;
}
+static int sandbox_scmi_clock_permissions_get(struct udevice *dev,
+ struct scmi_msg *msg)
+{
+ struct scmi_clk_get_permissions_in *in = NULL;
+ struct scmi_clk_get_permissions_out *out = NULL;
+ struct sandbox_scmi_clk *clk_state = NULL;
+
+ if (!msg->in_msg || msg->in_msg_sz < sizeof(*in) ||
+ !msg->out_msg || msg->out_msg_sz < sizeof(*out))
+ return -EINVAL;
+
+ in = (struct scmi_clk_get_permissions_in *)msg->in_msg;
+ out = (struct scmi_clk_get_permissions_out *)msg->out_msg;
+
+ clk_state = get_scmi_clk_state(in->clock_id);
+ if (!clk_state) {
+ dev_err(dev, "Unexpected clock ID %u\n", in->clock_id);
+
+ out->status = SCMI_NOT_FOUND;
+ } else {
+ out->permissions = clk_state->perm;
+
+ out->status = SCMI_SUCCESS;
+ }
+
+ return 0;
+}
+
static int sandbox_scmi_rd_attribs(struct udevice *dev, struct scmi_msg *msg)
{
struct scmi_rd_attr_in *in = NULL;
@@ -1193,6 +1239,8 @@ static int sandbox_scmi_test_process_msg(struct udevice
*dev,
return sandbox_proto_not_supported(msg);
switch (msg->message_id) {
+ case SCMI_PROTOCOL_VERSION:
+ return sandbox_scmi_clock_protocol_version(dev, msg);
case SCMI_PROTOCOL_ATTRIBUTES:
return sandbox_scmi_clock_protocol_attribs(dev, msg);
case SCMI_CLOCK_ATTRIBUTES:
@@ -1203,6 +1251,8 @@ static int sandbox_scmi_test_process_msg(struct udevice
*dev,
return sandbox_scmi_clock_rate_get(dev, msg);
case SCMI_CLOCK_CONFIG_SET:
return sandbox_scmi_clock_gate(dev, msg);
+ case SCMI_CLOCK_GET_PERMISSIONS:
+ return sandbox_scmi_clock_permissions_get(dev, msg);
default:
break;
}
--
2.43.0
[PATCH v9 11/20] cpu: imx95: add i.MX95 support
From: Alice Guo This patch is used to add the imx type string of i.MX95 ao that the i.MX95 CPU info can be printed. Signed-off-by: Alice Guo --- drivers/cpu/imx8_cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 4e1eccaa5b0..4836bddd93b 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -111,6 +111,8 @@ static const char *get_imx_type_str(u32 imxtype) return "91(11)";/* iMX91 9x9 Reduced feature */ case MXC_CPU_IMX9101: return "91(01)";/* iMX91 9x9 Specific feature */ + case MXC_CPU_IMX95: + return "95"; default: return "??"; } -- 2.43.0
[PATCH v9 12/20] spl: imx: use trampoline buffer to load images to secure region
From: Ye Li
When SPL loading image to secure region, for example, ATF and tee to
DDR secure region. Because the USDHC controller is non-secure master,
it can't access this region and will cause loading issue.
So use a trampoline buffer in non-secure region, then use CPU to copy the
image from trampoline buffer to destination secure region.
Signed-off-by: Ye Li
Signed-off-by: Alice Guo
Reviewed-by: Peng Fan
---
arch/arm/mach-imx/imx9/scmi/soc.c | 18 ++
common/spl/Kconfig| 6 +
common/spl/spl_imx_container.c| 41 ++-
3 files changed, 59 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c
b/arch/arm/mach-imx/imx9/scmi/soc.c
index 3a5b785..d2b0455bff9 100644
--- a/arch/arm/mach-imx/imx9/scmi/soc.c
+++ b/arch/arm/mach-imx/imx9/scmi/soc.c
@@ -729,3 +729,21 @@ enum boot_device get_boot_device(void)
return boot_dev;
}
#endif
+
+bool arch_check_dst_in_secure(void *start, ulong size)
+{
+ ulong ns_end = CFG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE;
+#ifdef PHYS_SDRAM_2_SIZE
+ ns_end += PHYS_SDRAM_2_SIZE;
+#endif
+
+ if ((ulong)start < CFG_SYS_SDRAM_BASE || (ulong)start + size > ns_end)
+ return true;
+
+ return false;
+}
+
+void *arch_get_container_trampoline(void)
+{
+ return (void *)((ulong)CFG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE - SZ_16M);
+}
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index c08045f9c8d..1d46003fc5b 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -361,6 +361,12 @@ config SPL_LOAD_IMX_CONTAINER
Support booting U-Boot from an i.MX8 container image. If you are not
using i.MX8, say 'n'.
+config SPL_IMX_CONTAINER_USE_TRAMPOLINE
+ bool
+ depends on SPL
+ help
+ Enable SPL load reader to load data to a trampoline buffer.
+
config IMX_CONTAINER_CFG
string "i.MX8 Container config file"
depends on SPL && SPL_LOAD_IMX_CONTAINER
diff --git a/common/spl/spl_imx_container.c b/common/spl/spl_imx_container.c
index 2c31777fcd3..6e6afec1ff3 100644
--- a/common/spl/spl_imx_container.c
+++ b/common/spl/spl_imx_container.c
@@ -14,6 +14,16 @@
#include
#endif
+__weak bool arch_check_dst_in_secure(void *start, ulong size)
+{
+ return false;
+}
+
+__weak void *arch_get_container_trampoline(void)
+{
+ return NULL;
+}
+
static struct boot_img_t *read_auth_image(struct spl_image_info *spl_image,
struct spl_load_info *info,
struct container_hdr *container,
@@ -22,6 +32,7 @@ static struct boot_img_t *read_auth_image(struct
spl_image_info *spl_image,
{
struct boot_img_t *images;
ulong offset, overhead, size;
+ void *buf, *trampoline;
if (image_index > container->num_images) {
debug("Invalid image number\n");
@@ -42,12 +53,30 @@ static struct boot_img_t *read_auth_image(struct
spl_image_info *spl_image,
debug("%s: container: %p offset: %lu size: %lu\n", __func__,
container, offset, size);
- if (info->read(info, offset, size,
- map_sysmem(images[image_index].dst - overhead,
- images[image_index].size)) <
- images[image_index].size) {
- printf("%s wrong\n", __func__);
- return NULL;
+
+ buf = map_sysmem(images[image_index].dst - overhead,
images[image_index].size);
+ if (IS_ENABLED(CONFIG_SPL_IMX_CONTAINER_USE_TRAMPOLINE) &&
+ arch_check_dst_in_secure(buf, size)) {
+ trampoline = arch_get_container_trampoline();
+ if (!trampoline) {
+ printf("%s: trampoline size is zero\n", __func__);
+ return NULL;
+ }
+
+ if (info->read(info, offset, size, trampoline) <
images[image_index].size) {
+ printf("%s: failed to load image to a trampoline
buffer\n", __func__);
+ return NULL;
+ }
+
+ memcpy(buf, trampoline, images[image_index].size);
+ } else {
+ if (info->read(info, offset, size,
+ map_sysmem(images[image_index].dst - overhead,
+ images[image_index].size)) <
+ images[image_index].size) {
+ printf("%s: failed to load image to a
non-secure region\n", __func__);
+ return NULL;
+ }
}
#ifdef CONFIG_AHAB_BOOT
--
2.43.0
[PATCH v9 13/20] imx9: add i.MX95 Kconfig and Makefile
From: Ye Li This patch adds i.MX95 Kconfig and Makefile. i.MX95 uses SCMI. Signed-off-by: Ye Li Signed-off-by: Alice Guo Reviewed-by: Peng Fan --- arch/arm/mach-imx/imx9/Kconfig | 7 +++ arch/arm/mach-imx/imx9/Makefile | 9 +++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index 1ccdb1cf64f..f6a9a13e4c9 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -24,6 +24,13 @@ config IMX91 select IMX9 select ARMV8_SPL_EXCEPTION_VECTORS +config IMX95 + bool + select ARMV8_SPL_EXCEPTION_VECTORS + select IMX9 + select DM_MAILBOX + select SCMI_FIRMWARE + select SPL_IMX_CONTAINER_USE_TRAMPOLINE config SYS_SOC default "imx9" diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile index 45a9105a75a..53cc97c6b47 100644 --- a/arch/arm/mach-imx/imx9/Makefile +++ b/arch/arm/mach-imx/imx9/Makefile @@ -3,8 +3,13 @@ # Copyright 2022 NXP obj-y += lowlevel_init.o + +ifeq ($(CONFIG_SCMI_FIRMWARE),y) +obj-y += scmi/ +else obj-y += soc.o clock.o clock_root.o trdc.o +endif -#ifndef CONFIG_XPL_BUILD +ifneq ($(CONFIG_SPL_BUILD),y) obj-y += imx_bootaux.o -#endif +endif \ No newline at end of file -- 2.43.0
[PATCH v9 14/20] imx: Kconfig: IMX8_ROMAPI is not configured for i.MX95
From: Alice Guo i.MX95 only supports low power boot, which means A55 is kicked by M33. There is no ROM runs on A55 in such case so that deselect IMX8_ROMAPI for i.MX95. Signed-off-by: Alice Guo --- arch/arm/mach-imx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 134e42028c3..e4014226582 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -180,7 +180,7 @@ config DDRMC_VF610_CALIBRATION config IMX8_ROMAPI def_bool y - depends on IMX8MN || IMX8MP || IMX8ULP || IMX9 + depends on IMX8MN || IMX8MP || IMX8ULP || IMX91 || IMX93 config SPL_IMX_ROMAPI_LOADADDR hex "Default load address to load image through ROM API" -- 2.43.0
[PATCH v9 15/20] binman: add a new entry type for packing DDR PHY firmware images
From: Alice Guo
i.MX95 needs to combine DDR PHY firmware images and their byte counts
together, so add a new entry type nxp-header-ddrfw for this requirement.
Signed-off-by: Alice Guo
---
tools/binman/entries.rst | 10
tools/binman/etype/nxp_header_ddrfw.py| 29 +++
tools/binman/ftest.py | 11 +
tools/binman/test/346_nxp_ddrfw_imx95.dts | 24 +++
4 files changed, 74 insertions(+)
create mode 100644 tools/binman/etype/nxp_header_ddrfw.py
create mode 100644 tools/binman/test/346_nxp_ddrfw_imx95.dts
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 780e9817fb6..4f05aa0a323 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1663,6 +1663,16 @@ Properties / Entry arguments:
+.. _etype_nxp_header_ddrfw:
+
+Entry: nxp-header-ddrfw: add a header to DDR PHY firmware images
+
+
+This entry is used to combine DDR PHY firmware images and their byte counts
+together. See imx95_evk.rst for how to get DDR PHY Firmware Images.
+
+
+
.. _etype_opensbi:
Entry: opensbi: RISC-V OpenSBI fw_dynamic blob
diff --git a/tools/binman/etype/nxp_header_ddrfw.py
b/tools/binman/etype/nxp_header_ddrfw.py
new file mode 100644
index 000..655699e6ffa
--- /dev/null
+++ b/tools/binman/etype/nxp_header_ddrfw.py
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2025 NXP
+
+from binman.etype.section import Entry_section
+
+class Entry_nxp_header_ddrfw(Entry_section):
+"""Add a header to DDR PHY firmware images
+
+This entry is used for i.MX95 to combine DDR PHY firmware images and their
+byte counts together.
+
+See imx95_evk.rst for how to get DDR PHY Firmware Images.
+"""
+
+def __init__(self, section, etype, node):
+super().__init__(section, etype, node)
+
+def BuildSectionData(self, required):
+section_data = bytearray()
+header_data = bytearray()
+
+for entry in self._entries.values():
+entry_data = entry.GetData(required)
+
+section_data += entry_data
+header_data += entry.contents_size.to_bytes(4, 'little')
+
+return header_data + section_data
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 948fcc02259..d6209de873b 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -104,6 +104,8 @@ PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big')
PRE_LOAD_HDR_SIZE = 0x1000.to_bytes(4, 'big')
TI_BOARD_CONFIG_DATA =
b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
TI_UNSECURE_DATA = b'unsecuredata'
+IMX_LPDDR_IMEM_DATA = b'qwertyuiop1234567890'
+IMX_LPDDR_DMEM_DATA = b'asdfghjklzxcvbnm'
# Subdirectory of the input dir to use to put test FDTs
TEST_FDT_SUBDIR = 'fdts'
@@ -202,6 +204,8 @@ class TestFunctional(unittest.TestCase):
TestFunctional._MakeInputFile('fsp_m.bin', FSP_M_DATA)
TestFunctional._MakeInputFile('fsp_s.bin', FSP_S_DATA)
TestFunctional._MakeInputFile('fsp_t.bin', FSP_T_DATA)
+TestFunctional._MakeInputFile('lpddr5_imem.bin', IMX_LPDDR_IMEM_DATA)
+TestFunctional._MakeInputFile('lpddr5_dmem.bin', IMX_LPDDR_DMEM_DATA)
cls._elf_testdir = os.path.join(cls._indir, 'elftest')
elf_test.BuildElfTestFiles(cls._elf_testdir)
@@ -7845,6 +7849,13 @@ fdt fdtmapExtract the devicetree
blob from the fdtmap
"""Test that binman can produce an iMX8 image"""
self._DoTestFile('339_nxp_imx8.dts')
+def testNxpHeaderDdrfw(self):
+"""Test that binman can add a header to DDR PHY firmware images"""
+data = self._DoReadFile('346_nxp_ddrfw_imx95.dts')
+self.assertEqual(len(IMX_LPDDR_IMEM_DATA).to_bytes(4, 'little') +
+ len(IMX_LPDDR_DMEM_DATA).to_bytes(4, 'little') +
+ IMX_LPDDR_IMEM_DATA + IMX_LPDDR_DMEM_DATA, data)
+
def testFitSignSimple(self):
"""Test that image with FIT and signature nodes can be signed"""
if not elf.ELF_TOOLS:
diff --git a/tools/binman/test/346_nxp_ddrfw_imx95.dts
b/tools/binman/test/346_nxp_ddrfw_imx95.dts
new file mode 100644
index 000..889f6f29860
--- /dev/null
+++ b/tools/binman/test/346_nxp_ddrfw_imx95.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ imx-lpddr {
+ type = "nxp-header-ddrfw";
+
+ imx-lpddr-imem {
+ filename = "lpddr5_imem.bin";
+ type = "blob-ext";
+ };
+
+ imx-lpddr-dmem {
+ filename = "lpddr5_dmem.bin";
+ type = "blob-ext";
+ };
+ };
+
[PATCH v9 16/20] tools: imx8image: add i.MX95 support
From: Alice Guo
i.MX95 uses binman to invoke mkimage to create image container. 2 image
containers are needed currently. The first one is composed of
ahab-container.img, LPDDR firmware images, OEI images, System Manager
image and u-boot-spl.bin. The second one is consisted of ARM Trusted
firmware and u-boot.bin.
Because DDR OEI image and LPDDR firmware images have to be packaged
together and named as m33-oei-ddrfw.bin by binman, so imx9_image.sh does
not check if m33-oei-ddrfw.bin exists.
When using "make imx95_19x19_evk_defconfig; make", imx9_image.sh will
delete the line for u-boot.bin in container.cfg. In fact, binman is
always called after the u-boot.bin is built, so imx9_image.sh does not
check if u-boot.bin exists.
Signed-off-by: Alice Guo
---
include/imx8image.h | 19 +-
tools/imx8image.c | 147 +++-
tools/imx9_image.sh | 8 +++
3 files changed, 155 insertions(+), 19 deletions(-)
diff --git a/include/imx8image.h b/include/imx8image.h
index 6b95e93fb50..e0d25c5b6c9 100644
--- a/include/imx8image.h
+++ b/include/imx8image.h
@@ -157,7 +157,9 @@ enum imx8image_cmd {
CMD_SOC_TYPE,
CMD_CONTAINER,
CMD_IMAGE,
- CMD_DATA
+ CMD_DATA,
+ CMD_DUMMY_V2X,
+ CMD_HOLD,
};
enum imx8image_core_type {
@@ -169,7 +171,9 @@ enum imx8image_core_type {
CFG_A35,
CFG_A55,
CFG_A53,
- CFG_A72
+ CFG_A72,
+ CFG_M33,
+ CFG_OEI,
};
enum imx8image_fld_types {
@@ -208,7 +212,10 @@ typedef enum option_type {
FILEOFF,
MSG_BLOCK,
SENTINEL,
- UPOWER
+ UPOWER,
+ OEI,
+ DUMMY_V2X,
+ HOLD,
} option_type_t;
typedef struct {
@@ -227,12 +234,16 @@ typedef struct {
#define CORE_CA35 4
#define CORE_CA72 5
#define CORE_SECO 6
+#define CORE_M337
#define CORE_ULP_CM33 0x1
#define CORE_ULP_CA35 0x2
#define CORE_ULP_UPOWER0x4
#define CORE_ULP_SENTINEL 0x6
+#define CORE_IMX95_M33P0
+#define CORE_IMX95_A55C0 2
+
#define SC_R_OTP 357U
#define SC_R_DEBUG 354U
#define SC_R_ROM_0 236U
@@ -246,10 +257,12 @@ typedef struct {
#define IMG_TYPE_EXEC0x03 /* Executable image type */
#define IMG_TYPE_DATA0x04 /* Data image type */
#define IMG_TYPE_DCD_DDR 0x05 /* DCD/DDR image type */
+#define IMG_TYPE_OEI 0x05 /* Optional Executable image type */
#define IMG_TYPE_SECO0x06 /* SECO image type */
#define IMG_TYPE_SENTINEL 0x06 /* SENTINEL image type */
#define IMG_TYPE_PROV0x07 /* Provisioning image type */
#define IMG_TYPE_DEK 0x08 /* DEK validation type */
+#define IMG_TYPE_V2X_DUMMY 0x0E /* V2X Dummy image */
#define IMG_TYPE_SHIFT 0
#define IMG_TYPE_MASK0x1f
diff --git a/tools/imx8image.c b/tools/imx8image.c
index 0135b190951..a333ded46e2 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -7,6 +7,7 @@
#include "imx8image.h"
#include
+#include
static int p_idx;
static int sector_size;
@@ -54,7 +55,9 @@ static table_entry_t imx8image_cmds[] = {
{CMD_CONTAINER, "CONTAINER","new container", },
{CMD_IMAGE, "IMAGE","new image", },
{CMD_DATA, "DATA", "new data", },
- {-1,"", "", },
+ {CMD_DUMMY_V2X, "DUMMY_V2X","v2x",},
+ {CMD_HOLD, "HOLD", "hold", },
+ {-1,"", "", }
};
static table_entry_t imx8image_core_entries[] = {
@@ -66,7 +69,9 @@ static table_entry_t imx8image_core_entries[] = {
{CFG_A55, "A55", "A55 core", },
{CFG_A53, "A53", "A53 core", },
{CFG_A72, "A72", "A72 core", },
- {-1,"", "", },
+ {CFG_OEI, "OEI", "OEI", },
+ {CFG_M33, "M33", "M33 core", },
+ {-1,"", "", }
};
static table_entry_t imx8image_sector_size[] = {
@@ -144,6 +149,14 @@ static void parse_cfg_cmd(image_t *param_stack, int32_t
cmd, char *token,
exit(EXIT_FAILURE);
}
break;
+ case CMD_DUMMY_V2X:
+ param_stack[p_idx].option = DUMMY_V2X;
+ param_stack[p_idx++].entry = (uint32_t)strtoll(token, NULL, 0);
+ break;
+ case CMD_HOLD:
+ param_stack[p_idx].option = HOLD;
+ param_stack[p_idx].entry = (uint32_t)strtoll(token, NULL, 0);
+ param_stack[p_idx++].filename = NULL;
default:
break;
}
@@ -221,6 +234,16 @@ static void parse_cf
[PATCH v9 17/20] imx: container: add V2X container support for i.MX95
From: Ye Li
This patch adds V2X container support for i.MX95. Since V2X container
may not be included in ahab-container.img of i.MX95, check if V2X
container exists in order to get the correct image end.
Signed-off-by: Ye Li
Signed-off-by: Alice Guo
Reviewed-by: Peng Fan
---
arch/arm/mach-imx/image-container.c | 119 ++--
1 file changed, 95 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-imx/image-container.c
b/arch/arm/mach-imx/image-container.c
index 2afe9d38a06..f84e23f4b2a 100644
--- a/arch/arm/mach-imx/image-container.c
+++ b/arch/arm/mach-imx/image-container.c
@@ -41,6 +41,52 @@
#define FUSE_IMG_SET_OFF_WORD 720
#endif
+#define MAX_V2X_CTNR_IMG_NUM (4)
+#define MIN_V2X_CTNR_IMG_NUM (2)
+
+#define IMG_FLAGS_IMG_TYPE_SHIFT (0u)
+#define IMG_FLAGS_IMG_TYPE_MASK (0xfU)
+#define IMG_FLAGS_IMG_TYPE(x) (((x) & IMG_FLAGS_IMG_TYPE_MASK) >> \
+
IMG_FLAGS_IMG_TYPE_SHIFT)
+
+#define IMG_FLAGS_CORE_ID_SHIFT (4u)
+#define IMG_FLAGS_CORE_ID_MASK(0xf0U)
+#define IMG_FLAGS_CORE_ID(x) (((x) & IMG_FLAGS_CORE_ID_MASK) >> \
+
IMG_FLAGS_CORE_ID_SHIFT)
+
+#define IMG_TYPE_V2X_PRI_FW (0x0Bu) /* Primary V2X FW */
+#define IMG_TYPE_V2X_SND_FW (0x0Cu) /* Secondary V2X FW */
+
+#define CORE_V2X_PRI 9
+#define CORE_V2X_SND 10
+
+static bool is_v2x_fw_container(ulong addr)
+{
+ struct container_hdr *phdr;
+ struct boot_img_t *img_entry;
+
+ phdr = (struct container_hdr *)addr;
+ if (phdr->tag != 0x87 || phdr->version != 0x0) {
+ debug("Wrong container header\n");
+ return false;
+ }
+
+ if (phdr->num_images >= MIN_V2X_CTNR_IMG_NUM && phdr->num_images <=
MAX_V2X_CTNR_IMG_NUM) {
+ img_entry = (struct boot_img_t *)(addr + sizeof(struct
container_hdr));
+
+ if (IMG_FLAGS_IMG_TYPE(img_entry->hab_flags) ==
IMG_TYPE_V2X_PRI_FW &&
+ IMG_FLAGS_CORE_ID(img_entry->hab_flags) == CORE_V2X_PRI) {
+ img_entry++;
+
+ if (IMG_FLAGS_IMG_TYPE(img_entry->hab_flags) ==
IMG_TYPE_V2X_SND_FW &&
+ IMG_FLAGS_CORE_ID(img_entry->hab_flags) ==
CORE_V2X_SND)
+ return true;
+ }
+ }
+
+ return false;
+}
+
int get_container_size(ulong addr, u16 *header_length)
{
struct container_hdr *phdr;
@@ -83,7 +129,7 @@ int get_container_size(ulong addr, u16 *header_length)
return max_offset;
}
-static int get_dev_container_size(void *dev, int dev_type, unsigned long
offset, u16 *header_length)
+static int get_dev_container_size(void *dev, int dev_type, unsigned long
offset, u16 *header_length, bool *v2x_cntr)
{
u8 *buf = malloc(CONTAINER_HDR_ALIGNMENT);
int ret = 0;
@@ -150,6 +196,9 @@ static int get_dev_container_size(void *dev, int dev_type,
unsigned long offset,
ret = get_container_size((ulong)buf, header_length);
+ if (v2x_cntr)
+ *v2x_cntr = is_v2x_fw_container((ulong)buf);
+
free(buf);
return ret;
@@ -231,45 +280,67 @@ static unsigned long get_boot_device_offset(void *dev,
int dev_type)
return offset;
}
-static int get_imageset_end(void *dev, int dev_type)
+static ulong get_imageset_end(void *dev, int dev_type)
{
- unsigned long offset1 = 0, offset2 = 0;
- int value_container[2];
+ unsigned long offset[3] = {};
+ int value_container[3] = {};
u16 hdr_length;
+ bool v2x_fw = false;
- offset1 = get_boot_device_offset(dev, dev_type);
- offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
+ offset[0] = get_boot_device_offset(dev, dev_type);
- value_container[0] = get_dev_container_size(dev, dev_type, offset1,
&hdr_length);
+ value_container[0] = get_dev_container_size(dev, dev_type, offset[0],
&hdr_length, NULL);
if (value_container[0] < 0) {
printf("Parse seco container failed %d\n", value_container[0]);
- return value_container[0];
+ return 0;
}
debug("seco container size 0x%x\n", value_container[0]);
- value_container[1] = get_dev_container_size(dev, dev_type, offset2,
&hdr_length);
- if (value_container[1] < 0) {
- debug("Parse scu container failed %d, only seco container\n",
- value_container[1]);
- /* return seco container total size */
- return value_container[0] + offset1;
+ if (is_imx95()) {
+ offset[1] = ALIGN(hdr_length, CONTAINER_HDR_ALIGNMENT) +
offset[0];
+
+ value_container[1] = get_dev_container_size(dev, dev_type,
offset[1], &hdr_length, &v2x_fw);
+ if (value_container[1] < 0) {
+ printf("Parse v2x container failed %d\n",
value
[PATCH v9 18/20] doc: imx: add document for i.MX95 Image Container Format
From: Alice Guo This patch add a document for i.MX95 Image Container Format. Signed-off-by: Alice Guo --- doc/imx/imx95_container.txt | 136 1 file changed, 136 insertions(+) create mode 100644 doc/imx/imx95_container.txt diff --git a/doc/imx/imx95_container.txt b/doc/imx/imx95_container.txt new file mode 100644 index 000..05f223d962a --- /dev/null +++ b/doc/imx/imx95_container.txt @@ -0,0 +1,136 @@ +i.MX95 Image Container Format +- + +The image container set consists of some image containers, and image container +contains boot images. Each image container has its own container header which is +defined in Figure 1. All container headers are placed together in a continuous +8KB space at the beginning of the image container set - image container set header. + +ROM code addresses image containers in image container set one by one based on +their headers’ order in image container set header. + +If ELE container exists, its container header must be the 1st one in the image +container set header. + +If V2X container exists, its container header must be the 2nd one in the image +container set header. V2X must be combined with ELE container. + +The information of boot images are recorded in image container header. System +ROM code needs to retrieve the information from the image container header, like +the offset on boot source, the target address in RAM, the length of boot image. +The order of ROM code handling these boot images is based on the order of each +boot image information present in image container header. + +Figure 1: +--- +--+--+--+--+ + ^ |Tag |Length|Length|Version | + | +--+--+--+--+ + | | Flags | + | +--+--+--+--+ + | |# of Images |Fuse version |SW version | +Image | +--+--+--+--+ +Container | |Reserved |Signature Block Offset | +Header| --- +--+--+--+--+ + | ^ |Image0: Offset, Size, LoadAddr, EntryPoint, Flags, Hash, IV| + | | +--+--+--+--+ + | Image | |Image1: Offset, Size, LoadAddr, EntryPoint, Flags, Hash, IV| + | Array | +--+--+--+--+ + | | |... | + | | +--+--+--+--+ + v v |ImageN: Offset, Size, LoadAddr, EntryPoint, Flags, Hash, IV| +--- +--+--+--+--+ +|... | +--- +--+--+--+--+ <-- SignOffset + ^ |Tag |Length|Length|Version | + | +--+--+--+--+ + | |SRK table offset |Certificate Offset | + | +--+--+--+--+ + | |Blob Offset |Signature Offset | + | +--+--+--+--+ +Signature | | SRK Table | +Block | +--+--+--+--+ + | | Signature | + | +--+--+--+--+ + | | Certificate (optional) | + | +--+--+--+--+ + v | Blob (optional) | +--- +--+--+--+--+ +|... | + +--+--+--+--+ <-- Image0Offset +| Image0 | + +--+--+--+--+ +|... | + +--+--+--+--+ <-- ImageNOffset +|
[PATCH v9 19/20] imx95_evk: add i.MX95 19x19 EVK board basic support
From: Ye Li
This patch adds i.MX95 19x19 EVK board basic support.
Messaging unit for EdgeLock Secure Enclave, messaging unit for System
Manager, uSDHC for SD Card, gpio, lpuart are supported now.
Signed-off-by: Ye Li
Signed-off-by: Alice Guo
Reviewed-by: Peng Fan
---
arch/arm/dts/imx95-19x19-evk-u-boot.dtsi | 62 ++
arch/arm/dts/imx95-u-boot.dtsi| 188 ++
arch/arm/mach-imx/imx9/Kconfig| 8 +
arch/arm/mach-imx/imx9/scmi/container.cfg | 10 +
arch/arm/mach-imx/imx9/scmi/imximage.cfg | 15 ++
board/freescale/imx95_evk/Kconfig | 12 ++
board/freescale/imx95_evk/MAINTAINERS | 6 +
board/freescale/imx95_evk/Makefile| 11 +
board/freescale/imx95_evk/imx95_19x19_evk.env | 91 +
board/freescale/imx95_evk/imx95_evk.c | 36
board/freescale/imx95_evk/spl.c | 69 +++
configs/imx95_19x19_evk_defconfig | 152 ++
doc/board/nxp/imx95_evk.rst | 114 +++
doc/board/nxp/index.rst | 1 +
include/configs/imx95_evk.h | 24 +++
15 files changed, 799 insertions(+)
create mode 100644 arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
create mode 100644 arch/arm/dts/imx95-u-boot.dtsi
create mode 100644 arch/arm/mach-imx/imx9/scmi/container.cfg
create mode 100644 arch/arm/mach-imx/imx9/scmi/imximage.cfg
create mode 100644 board/freescale/imx95_evk/Kconfig
create mode 100644 board/freescale/imx95_evk/MAINTAINERS
create mode 100644 board/freescale/imx95_evk/Makefile
create mode 100644 board/freescale/imx95_evk/imx95_19x19_evk.env
create mode 100644 board/freescale/imx95_evk/imx95_evk.c
create mode 100644 board/freescale/imx95_evk/spl.c
create mode 100644 configs/imx95_19x19_evk_defconfig
create mode 100644 doc/board/nxp/imx95_evk.rst
create mode 100644 include/configs/imx95_evk.h
diff --git a/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
new file mode 100644
index 000..2d1f02baa5f
--- /dev/null
+++ b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 NXP
+ */
+
+#include "imx95-u-boot.dtsi"
+
+&lpuart1 {
+ bootph-pre-ram;
+};
+
+®_usdhc2_vmmc {
+ bootph-pre-ram;
+};
+
+&usdhc1 {
+ bootph-pre-ram;
+};
+
+&usdhc2 {
+ bootph-pre-ram;
+};
+
+&wdog3 {
+ status = "disabled";
+};
+
+&pinctrl_uart1 {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc1 {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc1_100mhz {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc1_200mhz {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2 {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_100mhz {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_200mhz {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+&pinctrl_reg_usdhc2_vmmc {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/imx95-u-boot.dtsi b/arch/arm/dts/imx95-u-boot.dtsi
new file mode 100644
index 000..5ec3b1c51d6
--- /dev/null
+++ b/arch/arm/dts/imx95-u-boot.dtsi
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 NXP
+ */
+
+/ {
+ binman {
+ multiple-images;
+
+ m33-oei-ddrfw {
+ pad-byte = <0x00>;
+ align-size = <0x8>;
+ filename = "m33-oei-ddrfw.bin";
+
+ oei-m33-ddr {
+ align-size = <0x4>;
+ filename = "oei-m33-ddr.bin";
+ type = "blob-ext";
+ };
+
+ imx-lpddr {
+ type = "nxp-header-ddrfw";
+
+ imx-lpddr-imem {
+ filename = "lpddr5_imem_v202311.bin";
+ type = "blob-ext";
+ };
+
+ imx-lpddr-dmem {
+ filename = "lpddr5_dmem_v202311.bin";
+ type = "blob-ext";
+ };
+ };
+
+ imx-lpddr-qb {
+ type = "nxp-header-ddrfw";
+
+ imx-lpddr-imem-qb {
+ filename = "lpddr5_imem_qb_v202311.bin";
+ type = "blob-ext";
+ };
+
+ imx-lpddr-dmem-qb {
+ filename = "lpddr5_dmem_qb_v202311.bin";
+ type = "blob-ext";
+ };
+ };
+ };
+
+ imx-boot {
+ filename = "flash.bin";
+ pad-byte = <0x00>;
+
+
[PATCH v9 20/20] Makefile: add some files to CLEAN_FILES
From: Alice Guo When building the flash.bin of i.MX95 with binman, mkimage.imx-boot.spl, mkimage.imx-boot.u-boot, mkimage-out.imx-boot.spl and mkimage-out.imx-boot.u-boot are created. Add these files to CLEAN_FILES so that they can be removed when running "make clean". Signed-off-by: Alice Guo --- Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 1024ac33be7..0bd2b962bc3 100644 --- a/Makefile +++ b/Makefile @@ -2231,7 +2231,8 @@ CLEAN_FILES += include/autoconf.mk* include/bmp_logo.h include/bmp_logo_data.h \ itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \ mkimage.rom.mkimage mkimage-in-simple-bin* rom.map simple-bin* \ idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb \ - Test* capsule*.*.efi-capsule capsule*.map + Test* capsule*.*.efi-capsule capsule*.map mkimage.imx-boot.spl \ + mkimage.imx-boot.u-boot mkimage-out.imx-boot.spl mkimage-out.imx-boot.u-boot # Directories & files removed with 'make mrproper' MRPROPER_DIRS += include/config include/generated spl tpl vpl \ -- 2.43.0
[PATCH v9 10/20] imx9: scmi: add i.MX95 SoC and clock related code
From: Peng Fan
This patch adds i.MX95 SoC and clock related code. Because they are
based on SCMI, put them in the scmi subfolder.
Signed-off-by: Alice Guo
Signed-off-by: Frank Li
Signed-off-by: Ji Luo
Signed-off-by: Jindong Yue
Signed-off-by: Peng Fan
Signed-off-by: Ranjani Vaidyanathan
Signed-off-by: Ye Li
---
arch/arm/include/asm/arch-imx/cpu.h| 2 +
arch/arm/include/asm/arch-imx9/clock.h | 10 +
arch/arm/include/asm/arch-imx9/imx-regs.h | 6 +
arch/arm/include/asm/arch-imx9/sys_proto.h | 1 +
arch/arm/include/asm/mach-imx/sys_proto.h | 39 ++
arch/arm/mach-imx/imx9/scmi/Makefile | 6 +
arch/arm/mach-imx/imx9/scmi/clock.c| 70 ++
arch/arm/mach-imx/imx9/scmi/clock_scmi.c | 133
arch/arm/mach-imx/imx9/scmi/soc.c | 731 +
arch/sandbox/include/asm/scmi_test.h | 2 +-
10 files changed, 999 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-imx/imx9/scmi/Makefile
create mode 100644 arch/arm/mach-imx/imx9/scmi/clock.c
create mode 100644 arch/arm/mach-imx/imx9/scmi/clock_scmi.c
create mode 100644 arch/arm/mach-imx/imx9/scmi/soc.c
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include/asm/arch-imx/cpu.h
index 0d7a5734616..1f669c72d00 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -76,6 +76,8 @@
#define MXC_CPU_IMX91110xCD /* dummy ID */
#define MXC_CPU_IMX91010xCE /* dummy ID */
+#define MXC_CPU_IMX95 0x1C1 /* dummy ID */
+
#define MXC_SOC_MX60x60
#define MXC_SOC_MX70x70
#define MXC_SOC_IMX8M 0x80
diff --git a/arch/arm/include/asm/arch-imx9/clock.h
b/arch/arm/include/asm/arch-imx9/clock.h
index 60d48b13b11..ffaf6b5f7d8 100644
--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -255,5 +255,15 @@ int ccm_shared_gpr_tz_access(u32 gpr, bool non_secure,
bool user_mode, bool lock
void enable_usboh3_clk(unsigned char enable);
int set_clk_enet(enum enet_freq type);
int set_clk_eqos(enum enet_freq type);
+
+int imx_clk_scmi_enable(u32 clock_id, bool enable);
+ulong imx_clk_scmi_set_rate(u32 clock_id, ulong rate);
+ulong imx_clk_scmi_get_rate(u32 clock_id);
+int imx_clk_scmi_set_parent(u32 clock_id, u32 parent_id);
void set_arm_clk(ulong freq);
+
+int imx_clk_scmi_enable(u32 clock_id, bool enable);
+ulong imx_clk_scmi_set_rate(u32 clock_id, ulong rate);
+ulong imx_clk_scmi_get_rate(u32 clock_id);
+int imx_clk_scmi_set_parent(u32 clock_id, u32 parent_id);
#endif
diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h
b/arch/arm/include/asm/arch-imx9/imx-regs.h
index ef9538bd42e..5127fe8f286 100644
--- a/arch/arm/include/asm/arch-imx9/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx9/imx-regs.h
@@ -13,6 +13,7 @@
#define CCM_BASE_ADDR 0x4445UL
#define CCM_CCGR_BASE_ADDR 0x44458000UL
#define SYSCNT_CTRL_BASE_ADDR 0x4429
+#define SYSCNT_CMP_BASE_ADDR (SYSCNT_CTRL_BASE_ADDR + 0x1)
#define ANATOP_BASE_ADDR0x4448UL
@@ -20,6 +21,11 @@
#define WDG4_BASE_ADDR 0x424aUL
#define WDG5_BASE_ADDR 0x424bUL
+#define GPIO2_BASE_ADDR0x4381UL
+#define GPIO3_BASE_ADDR0x4382UL
+#define GPIO4_BASE_ADDR0x4384UL
+#define GPIO5_BASE_ADDR0x4385UL
+
#define FSB_BASE_ADDR 0x4751UL
#define ANATOP_BASE_ADDR0x4448UL
diff --git a/arch/arm/include/asm/arch-imx9/sys_proto.h
b/arch/arm/include/asm/arch-imx9/sys_proto.h
index e4bf6a63424..df2148a53c7 100644
--- a/arch/arm/include/asm/arch-imx9/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx9/sys_proto.h
@@ -12,6 +12,7 @@ enum imx9_soc_voltage_mode {
VOLT_LOW_DRIVE = 0,
VOLT_NOMINAL_DRIVE,
VOLT_OVER_DRIVE,
+ VOLT_SUPER_OVER_DRIVE,
};
void soc_power_init(void);
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h
b/arch/arm/include/asm/mach-imx/sys_proto.h
index 109a806852a..0780f99b49a 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -97,6 +97,8 @@ struct bd_info;
#define is_imx9302() (is_cpu_type(MXC_CPU_IMX9302))
#define is_imx9301() (is_cpu_type(MXC_CPU_IMX9301))
+#define is_imx95() (is_cpu_type(MXC_CPU_IMX95))
+
#define is_imx9121() (is_cpu_type(MXC_CPU_IMX9121))
#define is_imx9111() (is_cpu_type(MXC_CPU_IMX9111))
#define is_imx9101() (is_cpu_type(MXC_CPU_IMX9101))
@@ -216,6 +218,43 @@ ulong spl_romapi_get_uboot_base(u32 image_offset, u32
rom_bt_dev);
u32 rom_api_download_image(u8 *dest, u32 offset, u32 size);
u32 rom_api_query_boot_infor(u32 info_type, u32 *info);
+#if IS_ENABLED(CONFIG_SCMI_FIRMWARE)
+typedef struct rom_passover {
+ u16 tag; // Tag
+ u8 len; // Fixed value of 0x80
+ u8 ver; // Version
+ u32 boot_mode; // Boot mode
+ u32 card_addr_mode;// S
[PATCH] net: dwc_eth_qos: add support of stm32mp2 platform
From: Christophe Roullier
Add compatible "st,stm32mp25-dwmac" to manage STM32MP2 boards
Signed-off-by: Christophe Roullier
Signed-off-by: Patrice Chotard
---
drivers/net/dwc_eth_qos.c | 4
drivers/net/dwc_eth_qos.h | 1 +
drivers/net/dwc_eth_qos_stm32.c | 11 +++
3 files changed, 16 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index b4ec3614696..6605de6e036 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1599,6 +1599,10 @@ static const struct udevice_id eqos_ids[] = {
.compatible = "st,stm32mp1-dwmac",
.data = (ulong)&eqos_stm32mp15_config
},
+ {
+ .compatible = "st,stm32mp25-dwmac",
+ .data = (ulong)&eqos_stm32mp25_config
+ },
#endif
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX)
{
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 403e8203974..c239a5c7aca 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -301,5 +301,6 @@ extern struct eqos_config eqos_rockchip_config;
extern struct eqos_config eqos_qcom_config;
extern struct eqos_config eqos_stm32mp13_config;
extern struct eqos_config eqos_stm32mp15_config;
+extern struct eqos_config eqos_stm32mp25_config;
extern struct eqos_config eqos_jh7110_config;
extern struct eqos_config eqos_adi_config;
diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
index f3a973f3774..7a28f2a3e83 100644
--- a/drivers/net/dwc_eth_qos_stm32.c
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -350,3 +350,14 @@ struct eqos_config __maybe_unused eqos_stm32mp15_config = {
.interface = dev_read_phy_mode,
.ops = &eqos_stm32_ops
};
+
+struct eqos_config __maybe_unused eqos_stm32mp25_config = {
+ .reg_access_always_ok = false,
+ .mdio_wait = 1,
+ .swr_wait = 50,
+ .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
+ .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+ .axi_bus_width = EQOS_AXI_WIDTH_64,
+ .interface = dev_read_phy_mode,
+ .ops = &eqos_stm32_ops
+};
--
2.25.1
base-commit: cb7555e93075114fe4af0adb806877ac4d4ef80d
branch: upstream_net_add_stm32mp25_support
Re: [PATCH] efi_loader: Print extra information from the bootmgr
On Fri, 11 Apr 2025 at 10:08, Heinrich Schuchardt wrote:
>
> On 3/28/25 13:58, Ilias Apalodimas wrote:
> > Instead of just printing the label, add information for the Device
> > path as well so it's easier to see if we are booting from disk, network
> > etc
> >
> > Signed-off-by: Ilias Apalodimas
> > ---
> > lib/efi_loader/efi_bootmgr.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
> > index f9534ef85edb..6b9d809ff618 100644
> > --- a/lib/efi_loader/efi_bootmgr.c
> > +++ b/lib/efi_loader/efi_bootmgr.c
> > @@ -690,7 +690,7 @@ static efi_status_t try_load_entry(u16 n, efi_handle_t
> > *handle,
> > goto error;
> > }
> >
> > - log_info("Booting: %ls\n", lo.label);
> > + log_info("Booting: Label: %ls Device path: %pD\n", lo.label,
> > lo.file_path);
>
> I think we can remove "Label:" and but "Device path:" on a new line.
>
> The output is truncated according to CONFIG_SYS_PBSIZE=276:
>
> Booting: Label: nvme 0 Device path:
> /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b,)/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b,6d00)/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b,55000200)/VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b,55000300
>
> In this case the filename is not shown at all.
>
> efi_dp_shorten() might help to provide a printable output.
>
> But I don't believe that a non-developer would have a benefit from an
> output like:
>
> HD(2,GPT,54e58a03-c1db-4c6b-afda-24340c39cda5,0x109000,0x32000)\EFI\ubuntu\bootriscv64.efi)
>
> I would not know the GUIDs for my partitions by heart.
>
> Isn't log_debug() more adequate here?
I dont have a strong opinion tbh. I was mostly driver by looking into
EDK2 which prints something along the lines of
URI: http:///image.img
I can either switch to log_debug or print a human readable form I guess.
Thanks
/Ilias
>
> Best regards
>
> Heinrich
>
> >
> > /* Ignore the optional data in auto-generated boot options */
> > if (size >= sizeof(efi_guid_t) &&
>
Re: [PATCH] efi: Fix efiboot for payloads loaded from memory
Thanks for the CC Heinrich
On Fri, 11 Apr 2025 at 09:31, Heinrich Schuchardt wrote:
>
> On 3/23/25 20:03, Christian Kohlschütter wrote:
> > Calling bootefi on an address that was loaded from memory (e.g., cramfs
> > or SPI flash via "sf read", etc.), currently results in the EFI binary
> > not being able to access the EFI image device path.
> >
> > For example, iPXE would fail with an error "EFI could not get loaded
> > image's device path: Error 0x7f39e082 (https://ipxe.org/7f39e082)".
> >
> > This is due to an incomplete special-case in efi_binary_run, where a new
> > device path was created but not used in all required places.
> >
> > Fix the in-memory special case, set the "bootefi_device_path" to the
> > generated "file_path".
> >
> > iPXE will now boot, and report the device path as
> > "/MemoryMapped(0x0,0xSTART,0xLEN)"
> >
> > Signed-off-by: Christian Kohlschütter
>
> Hello Christian,
>
> Thank you for the patch.
>
> For future submission, please, use scripts/get_maintainer.pl to identify
> mail recipients.
>
> Best regards
>
> Reviewed-by: Heinrich Schuchardt
>
>
> > ---
> > lib/efi_loader/efi_bootbin.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/lib/efi_loader/efi_bootbin.c b/lib/efi_loader/efi_bootbin.c
> > index 10ec5e9ada3..f78cf972228 100644
> > --- a/lib/efi_loader/efi_bootbin.c
> > +++ b/lib/efi_loader/efi_bootbin.c
> > @@ -268,6 +268,9 @@ efi_status_t efi_binary_run(void *image, size_t size,
> > void *fdt)
> > file_path,
> > NULL);
> > if (ret != EFI_SUCCESS)
> > goto out;
> > +
> > + bootefi_device_path = file_path;
> > + bootefi_image_path = NULL;
> > } else {
> > log_debug("Loaded from disk\n");
> > }
>
Reviewed-by: Ilias Apalodimas
Re: [PATCH 1/1] efi_selftest: check executing in EL2
Hi Heinrich,
[...]
> +
> +/**
> + * current_exception_level()
> + *
> + * Return: current exception level, 0 - 3
> + */
> +static unsigned int current_exception_level(void)
> +{
> + unsigned long el;
> +
> + asm volatile (
> + "MRS %0, CurrentEL"
> + : "=r" (el) : : );
> +
> + return (el >> 2) & 0x3;
> +}
> +
We have an identical function in arch/arm/include/asm/system.h, can we
use that? It's static inline so you may be able to just include the
header file directly. Also, that function adds a 'cc,' which tells the
compiler that the instruction might change the condition code flags. I
don't remember if this is needed, but it doesn't hurt to have it.
> +/**
> + * execute() - execute test
> + *
> + * Check that the exception level is not EL3.
> + */
> +static int execute(void)
> +{
> + unsigned int el = current_exception_level();
> +
> + efi_st_printf("Exception level EL%u\n", el);
> + if (el != 1 && el != 2) {
> + efi_st_error("EL1 or EL2 expected");
> + return EFI_ST_FAILURE;
> + }
> +
> + return EFI_ST_SUCCESS;
> +}
> +
> +EFI_UNIT_TEST(el) = {
> + .name = "exception level",
> + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT,
> + .execute = execute,
> +};
> --
> 2.48.1
>
Other than that LGTM
/Ilias
Re: [PATCH v2] efi: Make FDT extra space configurable
On Tue, 18 Mar 2025 at 11:23, Pawel Kochanowski wrote: > > U-Boot currently reserves only 0x3000 bytes when copying the FDT > in copy_fdt(), which may not be sufficient if additional nodes > (such as FMAN firmware) are added later. > > This patch uses the exisitng SYS_FDT_PAD to reserve space for FDT fixup > instead of hardcoded value. > > This change prevents potential corruption when resizing FDT after > EFI boot, especially when firmware like FMAN requires additional > space. > > Signed-off-by: Gabriel Nesteruk > Signed-off-by: Pawel Kochanowski > --- > Changes since version 1: > - Removed custom CONFIG_FDT_EXTRA_SPACE in favor of already present > SYS_FDT_PAD > - Use the define also in efi_dt_fixup.c > > lib/efi_loader/efi_dt_fixup.c | 2 +- > lib/efi_loader/efi_helper.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/lib/efi_loader/efi_dt_fixup.c b/lib/efi_loader/efi_dt_fixup.c > index 26928cfc454..544e1aa9808 100644 > --- a/lib/efi_loader/efi_dt_fixup.c > +++ b/lib/efi_loader/efi_dt_fixup.c > @@ -168,7 +168,7 @@ efi_dt_fixup(struct efi_dt_fixup_protocol *this, void > *dtb, > /* Check size */ > required_size = fdt_off_dt_strings(dtb) + > fdt_size_dt_strings(dtb) + > - 0x3000; > + CONFIG_SYS_FDT_PAD; > total_size = fdt_totalsize(dtb); > if (required_size < total_size) > required_size = total_size; > diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c > index 04b2efc4a3b..40e5d31575a 100644 > --- a/lib/efi_loader/efi_helper.c > +++ b/lib/efi_loader/efi_helper.c > @@ -477,7 +477,7 @@ static efi_status_t copy_fdt(void **fdtp) > * needs to be expanded later. > */ > fdt = *fdtp; > - fdt_pages = efi_size_in_pages(fdt_totalsize(fdt) + 0x3000); > + fdt_pages = efi_size_in_pages(fdt_totalsize(fdt) + > CONFIG_SYS_FDT_PAD); > fdt_size = fdt_pages << EFI_PAGE_SHIFT; > > ret = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, > -- > 2.43.0 > Reviewed-by: Ilias Apalodimas
Re: [PATCH] efi_selftest: use do_bootefi_exec()
On Fri, 11 Apr 2025 at 08:36, Heinrich Schuchardt wrote: > > The EFI selftest should match executing a real EFI binary > as closely as possible. > > Use do_bootefi_exec() to enter the EFI selftest. > > Signed-off-by: Heinrich Schuchardt > --- > cmd/bootefi.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/cmd/bootefi.c b/cmd/bootefi.c > index c1454ffb948..13479248999 100644 > --- a/cmd/bootefi.c > +++ b/cmd/bootefi.c > @@ -38,6 +38,9 @@ static efi_status_t bootefi_run_prepare(const char > *load_options_path, > if (ret != EFI_SUCCESS) > return ret; > > + (*image_objp)->auth_status = EFI_IMAGE_AUTH_PASSED; > + (*image_objp)->entry = efi_selftest; > + > /* Transfer environment variable as load options */ > return efi_env_set_load_options((efi_handle_t)*image_objp, > load_options_path, > @@ -106,8 +109,8 @@ static int do_efi_selftest(void) > return CMD_RET_FAILURE; > > /* Execute the test */ > - ret = EFI_CALL(efi_selftest(&image_obj->header, &systab)); > - free(loaded_image_info->load_options); > + ret = do_bootefi_exec(&image_obj->header, > + loaded_image_info->load_options); > efi_free_pool(test_device_path); > efi_free_pool(test_image_path); > if (ret != EFI_SUCCESS) > -- > 2.48.1 > Acked-by: Ilias Apalodimas
Re: [PATCH] x86: efi_loader: Ensure the SMBIOS tables are sent via EFI
Hi Simon
On Sat, 5 Apr 2025 at 23:46, Simon Glass wrote:
>
> The EFI-loader code has not been fully converted to use bloblist, so
> relies on the SMBIOS-table address being set in global_data.
Can you explain a bit more what this means? The SMBIOS tables for EFI
are supposed to be on EFI allocated memory
>
> Set this up in write_tables() so that the SMBIOS tables are actually
> available.
>
> Enable the command for x86 QEMU so that the SMBIOS tests actually run.
>
> Signed-off-by: Simon Glass
> Fixes: 83ce35d6ebb ("emulation: Use bloblist to hold tables")
> Reported-by: Niklas Sombert
> ---
>
> arch/x86/lib/tables.c| 2 ++
> board/emulation/qemu-x86/Kconfig | 1 +
> lib/efi_loader/efi_smbios.c | 1 +
> 3 files changed, 4 insertions(+)
>
> diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
> index ec52992209f..d7f183f95dc 100644
> --- a/arch/x86/lib/tables.c
> +++ b/arch/x86/lib/tables.c
> @@ -126,6 +126,8 @@ int write_tables(void)
> use_high = true;
> if (!gd->arch.table_start_high)
> gd->arch.table_start_high = rom_addr;
> + if (table->tag == BLOBLISTT_SMBIOS_TABLES)
> + gd_set_smbios_start(rom_addr);
> }
> rom_table_end = table->write(rom_addr);
> if (!rom_table_end) {
> diff --git a/board/emulation/qemu-x86/Kconfig
> b/board/emulation/qemu-x86/Kconfig
> index b2a4e0891a4..c1564fba7cd 100644
> --- a/board/emulation/qemu-x86/Kconfig
> +++ b/board/emulation/qemu-x86/Kconfig
> @@ -23,5 +23,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> imply VIRTIO_PCI
> imply VIRTIO_NET
> imply VIRTIO_BLK
> + imply CMD_SMBIOS
>
> endif
> diff --git a/lib/efi_loader/efi_smbios.c b/lib/efi_loader/efi_smbios.c
> index 8d2ef6deb51..5275e966dfe 100644
> --- a/lib/efi_loader/efi_smbios.c
> +++ b/lib/efi_loader/efi_smbios.c
> @@ -35,6 +35,7 @@ efi_status_t efi_smbios_register(void)
> void *buf;
>
> addr = gd_smbios_start();
> + printf("register %lx\n", addr);
I don't think this print is useful at all, why isn't the log_err()
right below enough?
> if (!addr) {
> log_err("No SMBIOS tables to install\n");
> return EFI_NOT_FOUND;
> --
> 2.43.0
>
Thanks
/Ilias
Re: [PATCH v5 1/7] rockchip: binman: Correct the OS prop for U-Boot
Hi Jonas,
On 4/10/25 11:44 PM, Jonas Karlman wrote:
From: Simon Glass
The U-Boot image is currently being identified as an invalid OS in
spl_fit_image_get_os() due to case sensitive compare.
Use the correct lower-case value to fix this.
Fixes: e0c0efff2a02 ("rockchip: Support building the all output files in
binman")
Signed-off-by: Simon Glass
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Reviewed-by: Quentin Schulz
Thanks!
Quentin
Re: [PATCH v5 7/7] rockchip: binman: Support use of crc32 hash for FIT images
Hi Jonas,
On 4/10/25 11:44 PM, Jonas Karlman wrote:
Use of SHA256 checksum validation on ARMv7 SoCs can be very time
consuming compared to when used on a ARMv8 SoC with Crypto Extensions.
Add support for use of the much faster CRC32 hash algo when SHA256 is
not supported in SPL. Also use a HAS_FIT_HASH to simplify the ifdefs
when no known hash algo has been compiled.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
---
Changes in v5:
- Update commit message and add comment that CRC32 hash algo should
only be used for basic checksum validation.
- Collect r-b tag
Changes in v4:
- New patch
This patch can be skipped in case there is any objection against adding
crc32 as a checksum fallback algo, something that will be usefull in a
future rk3228 related series.
---
arch/arm/dts/rockchip-u-boot.dtsi | 34 ++-
1 file changed, 24 insertions(+), 10 deletions(-)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index f60cc31fb1a6..18accef8bd44 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -19,10 +19,24 @@
#define FIT_UBOOT_COMP"none"
#endif
+/*
+ * SHA256 should be enabled in SPL when signature validation is involved,
+ * CRC32 should only be used for basic checksum validation of FIT images.
+ */
+#if defined(CONFIG_SPL_SHA256)
+#define FIT_HASH_ALGO "sha256"
+#elif defined(CONFIG_SPL_CRC32)
+#define FIT_HASH_ALGO "crc32"
+#endif
+
#if defined(CONFIG_SPL_FIT) && (defined(CONFIG_ARM64) ||
defined(CONFIG_SPL_OPTEE_IMAGE))
#define HAS_FIT
#endif
+#if defined(CONFIG_SPL_FIT_SIGNATURE) && defined(FIT_HASH_ALGO)
+#define HAS_FIT_HASH
+#endif
+
We could spare a constant (HAS_FIT_HASH) by simply reusing FIT_HASH_ALGO.
Something like:
"""
#if defined(CONFIG_SPL_FIT_SIGNATURE)
#if defined(CONFIG_SPL_SHA256)
#define FIT_HASH_ALGO "sha256"
#elif defined(CONFIG_SPL_CRC32)
#define FIT_HASH_ALGO "crc32"
#endif
#endif
[...]
#ifdef FIT_HASH_ALGO
hash {
algo = FIT_HASH_ALGO;
};
"""
In any case,
Reviewed-by: Quentin Schulz
Thanks!
Quentin
Re: [PATCH V2] firmware: ti_sci: Scan all device instances when releasing exclusive devices
On 11:04-20250411, Kumar, Udit wrote: > Hi Nishanth, > > Sorry for basic question > > On 4/7/2025 5:45 PM, Nishanth Menon wrote: > > [..] This creates a problem when Device Manager(DM) firmware starts up later > > on in the boot process and identifies that this instance of i2c is > > Do we need to do clean up, where DM is loaded as different binary . > > As I understand this cleanup is needed, where DM is running along with > SPL/R5 > > or I am missing something The cleanup makes sense whether we use split or unified DM. The resources R5SPL uses may or may not be used further down the chain of software (eeprom was an example where we read and cache the data for further downstream steps to use). We should never be leaving a messy system behind (and consequences as a result). This is the reason we cleanup the exclusively held devices during the boot phase before remote cores are started up. We already do this cleanup. which is good, the trouble with multi-DTB FIT image is that the cleanup is partial, which is what this patch attempts to solve. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Re: [PATCH 1/6] event: signal when livetree has been built
On 4/10/25 23:25, Simon Glass wrote:
Hi Caleb,
On Thu, 10 Apr 2025 at 09:41, Caleb Connolly wrote:
Hi Simon,
On 4/10/25 16:15, Simon Glass wrote:
Hi Caleb,
On Thu, 10 Apr 2025 at 08:04, Caleb Connolly wrote:
On 4/10/25 15:07, Simon Glass wrote:
Hi Caleb,
On Thu, 10 Apr 2025 at 07:00, Caleb Connolly wrote:
Hi Simon,
On 4/10/25 13:27, Simon Glass wrote:
Hi Caleb,
On Wed, 9 Apr 2025 at 11:17, Caleb Connolly wrote:
OF_LIVE offers a variety of benefits, one of them being that the live
tree can be modified without caring about the underlying FDT. This is
particularly valuable for working around U-Boot limitations like lacking
USB superspeed support on Qualcomm platforms, no runtime OTG, or
peripherals like the sdcard being broken (and displaying potentially
worrying error messages).
Add an event to signal when the live tree has been built so that we can
apply fixups to it directly before devices are bound.
Signed-off-by: Caleb Connolly
---
common/event.c | 3 +++
include/event.h | 9 +
lib/of_live.c | 3 +++
3 files changed, 15 insertions(+)
diff --git a/common/event.c b/common/event.c
index
dda569d447851f559a83f98fb7b1f3543156eab5..8d7513eb10b61919e1e784481dfdcc076be14986
100644
--- a/common/event.c
+++ b/common/event.c
@@ -47,8 +47,11 @@ const char *const type_name[] = {
"ft_fixup",
/* main loop events */
"main_loop",
+
+ /* livetree has been built */
+ "of_live_init",
};
_Static_assert(ARRAY_SIZE(type_name) == EVT_COUNT, "event type_name size");
#endif
diff --git a/include/event.h b/include/event.h
index
75141a192a48b0931667632f41be8ff4d6139f7c..3fc673ba635ed45467aae8587705d37bef1c2a3f
100644
--- a/include/event.h
+++ b/include/event.h
@@ -152,8 +152,17 @@ enum event_t {
* A non-zero return value causes the boot to fail.
*/
EVT_MAIN_LOOP,
+ /**
+* @EVT_OF_LIVE_INIT:
+* This event is triggered immediately after the live device tree has
been
+* built. This allows for machine specific fixups to be done to the
live tree
+* (like disabling known-unsupported devices) before DM init happens.
This
+* event is only available if OF_LIVE is enabled and is only used after
relocation.
+*/
+ EVT_OF_LIVE_INIT,
+
/**
* @EVT_COUNT:
* This constants holds the maximum event number + 1 and is used
when
* looping over all event classes.
diff --git a/lib/of_live.c b/lib/of_live.c
index
90b9459ede313e492e28c8556c730f3bd8aaa9df..e1962b8f1fb9d8c2c87d04ca4e238a1e4d00376a
100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -10,8 +10,9 @@
#define LOG_CATEGORY LOGC_DT
#include
+#include
#include
#include
#include
#include
@@ -334,8 +335,10 @@ int of_live_build(const void *fdt_blob, struct device_node
**rootp)
return ret;
}
debug("%s: stop\n", __func__);
+ event_notify_null(EVT_OF_LIVE_INIT);
+
This should go in initr_of_live() since the function you are dealing
with here is supposed to just do the live build.
Well, we only every call this function from one place right now, but if
it was called multiple times for some reason then I would want to be
able to re-apply fixups to the new live tree I guess it should
probably pass in *rootp to the event handler, let me rework that.>
There's no need to change the root, so what you have is find here.
Same for the EFI_STUB thing which I just noticed, actually
what EFI_STUB thing?>
Oh, it's your EFI stub patch which isn't in Tom's tree yet. Just for
when you get to it, then.
Also please check for error
Otherwise this seems OK to me. I do wonder why we can't use
EVT_FT_FIXUP though. Could you add mention of that to your comment in
event.h?
Because FT_FIXUP is for fixing up the flat tree before starting the OS?
these are obviously different things imo, im not sure how i could
clarify this.>
Well, what is the purpose of your code? Are you saying that it is used
within U-Boot, but not passed to the OS?
Yes, please read the cover letter and commit messages. FT_FIXUP allows
for the FDT that is about to be passed to the OS to be fixed up,
OF_LIVE_INIT signifies that U-Boot has finished building it's livetree.
The livetree is obviously not used outside of U-Boot, being a totally
custom in-memory representation of the DT.
Oh, I wondered what '(which is not passed on to further boot stages)' meant.
If you don't understand what my patch series does, it would save us both
a lot of time if you asked me to clarify some specific point than to
reply with your stream-of-consciousness ponderings about what perhaps I
might be doing.
I've tried -- again -- to explain what we're doing here, comments below.
Sorry, no, we can't do that.
We have been for months already
We are moving towards using livetree in U-Boot
Re: [PATCH v2 1/3] part: add part_get_info_cached() API
Hi Neil,
On Tue, 8 Apr 2025 at 12:13, Neil Armstrong wrote:
>
> Introduce a new part_get_info_cached() API that's used to
> get the part_info of a blk_desc allowing to use an eventual
> partition scanning cache to avoid rescanning the entire disk
> partition scheme for each partition number.
>
> The part_get_info_cached_free() is also added to hint the
> partition code to flush any cached data from this disk.
>
> The equivalent ops are added that directly maps to those
> added functions.
>
> This API is designed to be used as a direct replacement of
> part_get_info() in codes scanning all partitions for a same
> disk, like in blk-uclass. With this, a lot of unnecessary
> computation is saved, leading to a faster boot time when
> partitions are scanned, especially with storage medias
> with potentially multiple large hardware partitions like
> UFS, NVMe or eMMC.
>
> Signed-off-by: Neil Armstrong
> ---
> disk/part.c| 55 ---
> include/part.h | 44
> 2 files changed, 88 insertions(+), 11 deletions(-)
>
> diff --git a/disk/part.c b/disk/part.c
> index
> 303178161c083ec6e1b767b4f06ac5773576ca60..1d09c0511c75d457c81cab040c3f5caa924ee945
> 100644
> --- a/disk/part.c
> +++ b/disk/part.c
> @@ -335,8 +335,8 @@ void part_print(struct blk_desc *desc)
> drv->print(desc);
> }
>
> -int part_get_info_by_type(struct blk_desc *desc, int part, int part_type,
> - struct disk_partition *info)
> +static int _part_get_info_by_type(struct blk_desc *desc, int part, int
> part_type,
> + struct disk_partition *info, bool cached)
> {
> struct part_driver *drv;
>
> @@ -356,24 +356,57 @@ int part_get_info_by_type(struct blk_desc *desc, int
> part, int part_type,
> desc->part_type);
> return -EPROTONOSUPPORT;
> }
> - if (!drv->get_info) {
> - PRINTF("## Driver %s does not have the get_info()
> method\n",
> - drv->name);
> - return -ENOSYS;
> - }
> - if (drv->get_info(desc, part, info) == 0) {
> - PRINTF("## Valid %s partition found ##\n", drv->name);
> - return 0;
> + if (cached && drv->get_info_cached) {
> + if (drv->get_info_cached(desc, part, info) == 0) {
> + PRINTF("## Valid %s partition found ##\n",
> drv->name);
> + return 0;
> + }
> + } else {
> + if (!drv->get_info) {
> + PRINTF("## Driver %s does not have the
> get_info() method\n",
> + drv->name);
> + return -ENOSYS;
> + }
> + if (drv->get_info(desc, part, info) == 0) {
> + PRINTF("## Valid %s partition found ##\n",
> drv->name);
> + return 0;
> + }
> }
That's fine but since you'll send a v3 with a cleanup on top mind also
switching the logic around on this?
if (!blk_enabled())
return -ENOENT; etc
This will make it a bit more readable
> }
>
> return -ENOENT;
> }
>
> +int part_get_info_by_type(struct blk_desc *desc, int part, int part_type,
> + struct disk_partition *info)
> +{
> + return _part_get_info_by_type(desc, part, part_type, info, false);
> +}
> +
> +int part_get_info_cached(struct blk_desc *desc, int part,
> +struct disk_partition *info)
> +{
> + return _part_get_info_by_type(desc, part, PART_TYPE_UNKNOWN, info,
> true);
> +}
> +
> int part_get_info(struct blk_desc *desc, int part,
> struct disk_partition *info)
> {
> - return part_get_info_by_type(desc, part, PART_TYPE_UNKNOWN, info);
> + return _part_get_info_by_type(desc, part, PART_TYPE_UNKNOWN, info,
> false);
> +}
> +
> +void part_get_info_cached_free(struct blk_desc *desc)
> +{
> + struct part_driver *drv;
> +
> + if (blk_enabled()) {
Same here
if (!blk_enabled())
return;
etc
[...]
Other than that LGTM
Cheers
/Ilias
Re: [PATCH 1/1] efi_selftest: check executing in EL2
On 4/11/25 12:00, Ilias Apalodimas wrote:
Hi Heinrich,
[...]
+
+/**
+ * current_exception_level()
+ *
+ * Return: current exception level, 0 - 3
+ */
+static unsigned int current_exception_level(void)
+{
+ unsigned long el;
+
+ asm volatile (
+ "MRS %0, CurrentEL"
+ : "=r" (el) : : );
+
+ return (el >> 2) & 0x3;
+}
+
We have an identical function in arch/arm/include/asm/system.h, can we
use that? It's static inline so you may be able to just include the
header file directly. Also, that function adds a 'cc,' which tells the
compiler that the instruction might change the condition code flags. I
don't remember if this is needed, but it doesn't hurt to have it.
The function current_el() in arch/arm/include/asm/system.h is already
used in switch_to_non_secure_mode() when determining if U-Boot should
switch the exception state. Including the same function both in the code
under test and in the test should be avoided.
https://developer.arm.com/documentation/ddi0597/2025-03/Base-Instructions/MRS--Move-Special-register-to-general-purpose-register-
does not describe any side effects when reading the CurrentEL flags?
Best regards
Heinrich
+/**
+ * execute() - execute test
+ *
+ * Check that the exception level is not EL3.
+ */
+static int execute(void)
+{
+ unsigned int el = current_exception_level();
+
+ efi_st_printf("Exception level EL%u\n", el);
+ if (el != 1 && el != 2) {
+ efi_st_error("EL1 or EL2 expected");
+ return EFI_ST_FAILURE;
+ }
+
+ return EFI_ST_SUCCESS;
+}
+
+EFI_UNIT_TEST(el) = {
+ .name = "exception level",
+ .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT,
+ .execute = execute,
+};
--
2.48.1
Other than that LGTM
/Ilias
Re: [PATCH] doc: board: ti: Add optee rng support
Hi, > J722S has hw rng, which can be used by OPTEE. > So remove option to use SW TRNG by OPTEE. > > Signed-off-by: Udit Kumar > --- > reference discussion > https://lore.kernel.org/all/20250313144155.2382316-1-mwa...@kernel.org/ > > Bootlogs with optee trng > https://gist.github.com/uditkumarti/5f90210b23e67cd4eb6d06a024031ee8#file-gistfile1-txt-L1970 I can confirm the TRNG will work on u-boot as well as linux. Thanks! -michael signature.asc Description: PGP signature
Re: [EXT] [PATCH] crypto: fsl - Fix RNG generation for lengths greater than 16 bytes
On 4/9/2025 7:46 PM, Horia Geanta wrote:
> On 4/9/2025 9:19 AM, Gaurav Jain wrote:
>> Hi Pawel
>>
>>> From: Paweł Kochanowski
>>>
>> 5. The loop in
>>> caam_rng_read is called second time, this time the `priv->desc` contain
>>> swapped
>>> data.
>>>
>>> Interesting thing is that the job still succeeds and that some data are
>>> present in
>>> the buffers, but maybe swapped descriptor can also be a valid one?
>> I agree that the descriptor should be reinitialized for each RNG job.
> I would advise against this, considering what I said above.
> Handling endianness should be done only once.
>
Btw, looks like there's another issue.
jr_enqueue() (drivers/crypto/fsl/jr.c) is touching the descriptor:
for (i = 0; i < length; i++) {
desc_word = desc_addr[i];
sec_out32((uint32_t *)&desc_addr[i], desc_word);
}
however there's no cache flush after that.
This would affect platforms where CAAM is not HW-coherent.
LS1046A has a coherent CAAM, so we're not hitting the bug in this case.
Regards,
Horia
Re: [PATCH] doc: board: ti: Add optee rng support
On 14:17-20250411, Michael Walle wrote: > Hi, > > > J722S has hw rng, which can be used by OPTEE. > > So remove option to use SW TRNG by OPTEE. > > > > Signed-off-by: Udit Kumar > > --- > > reference discussion > > https://lore.kernel.org/all/20250313144155.2382316-1-mwa...@kernel.org/ > > > > Bootlogs with optee trng > > https://gist.github.com/uditkumarti/5f90210b23e67cd4eb6d06a024031ee8#file-gistfile1-txt-L1970 > > > I can confirm the TRNG will work on u-boot as well as linux. > Thanks! just curious: Did you have to change .configs for either? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
[PATCH v2 1/8] event: signal when livetree has been built
OF_LIVE offers a variety of benefits, one of them being that the live
tree can be modified without caring about the underlying FDT. This is
particularly valuable for working around U-Boot limitations like lacking
USB superspeed support on Qualcomm platforms, no runtime OTG, or
peripherals like the sdcard being broken (and displaying potentially
worrying error messages).
Add an event to signal when the live tree has been built so that we can
apply fixups to it directly before devices are bound.
Signed-off-by: Caleb Connolly
---
common/event.c | 3 +++
include/event.h | 18 ++
lib/of_live.c | 11 +++
3 files changed, 32 insertions(+)
diff --git a/common/event.c b/common/event.c
index
dda569d447851f559a83f98fb7b1f3543156eab5..8d7513eb10b61919e1e784481dfdcc076be14986
100644
--- a/common/event.c
+++ b/common/event.c
@@ -47,8 +47,11 @@ const char *const type_name[] = {
"ft_fixup",
/* main loop events */
"main_loop",
+
+ /* livetree has been built */
+ "of_live_init",
};
_Static_assert(ARRAY_SIZE(type_name) == EVT_COUNT, "event type_name size");
#endif
diff --git a/include/event.h b/include/event.h
index
75141a192a48b0931667632f41be8ff4d6139f7c..1d267f1d10547642d381fa287ab4981a2bf03543
100644
--- a/include/event.h
+++ b/include/event.h
@@ -152,8 +152,17 @@ enum event_t {
* A non-zero return value causes the boot to fail.
*/
EVT_MAIN_LOOP,
+ /**
+* @EVT_OF_LIVE_BUILT:
+* This event is triggered immediately after the live device tree has
been
+* built. This allows for machine specific fixups to be done to the
live tree
+* (like disabling known-unsupported devices) before it is used. This
+* event is only available if OF_LIVE is enabled and is only used after
relocation.
+*/
+ EVT_OF_LIVE_BUILT,
+
/**
* @EVT_COUNT:
* This constants holds the maximum event number + 1 and is used when
* looping over all event classes.
@@ -202,8 +211,17 @@ union event_data {
struct event_ft_fixup {
oftree tree;
struct bootm_headers *images;
} ft_fixup;
+
+ /**
+* struct event_of_live_built - livetree has been built
+*
+* @root: The root node of the live device tree
+*/
+ struct event_of_live_built {
+ struct device_node *root;
+ } of_live_built;
};
/**
* struct event - an event that can be sent and received
diff --git a/lib/of_live.c b/lib/of_live.c
index
90b9459ede313e492e28c8556c730f3bd8aaa9df..c1620616513c2e32448b4a6d156a9162d97c76b7
100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -10,8 +10,9 @@
#define LOG_CATEGORY LOGC_DT
#include
+#include
#include
#include
#include
#include
@@ -320,8 +321,9 @@ int unflatten_device_tree(const void *blob, struct
device_node **mynodes)
int of_live_build(const void *fdt_blob, struct device_node **rootp)
{
int ret;
+ union event_data evt;
debug("%s: start\n", __func__);
ret = unflatten_device_tree(fdt_blob, rootp);
if (ret) {
@@ -334,8 +336,17 @@ int of_live_build(const void *fdt_blob, struct device_node
**rootp)
return ret;
}
debug("%s: stop\n", __func__);
+ if (CONFIG_IS_ENABLED(EVENT)) {
+ evt.of_live_built.root = *rootp;
+ ret = event_notify(EVT_OF_LIVE_BUILT, &evt, sizeof(evt));
+ if (ret) {
+ log_debug("Failed to notify livetree build event:
err=%d\n", ret);
+ return ret;
+ }
+ }
+
return ret;
}
void of_live_free(struct device_node *root)
--
2.49.0
[PATCH v2 0/8] Qualcomm: cleanup OF_LIVE fixup and fix RB1/2
Introduce a new event to signal that the live tree has been built, allowing boards to perform fixups on the tree before devices are bound. Crucially this allows for devices to be enabled or disabled, but also allows for properties that are parsed during the bind stage to be modified (such as dr_mode for dwc3). With this in place, mach-snapdragon is switched over to use the event and some hacky U-Boot specific DT overrides (which had to be undone prior to booting an image) are removed in favour of fixing up the livetree (which is not passed on to further boot stages). Finally, some minor fixes are made for the QCM2290 RB1 board, the sdcard is enabled and it now uses USB host mode in U-Boot like it's bigger sibling the RB2. --- Changes in v2: - Rename EVT_OF_LIVE_INIT to EVT_OF_LIVE_BUILT - Pass the root node through as event data in EVT_OF_LIVE_BUILT - Handle errors from event_notify() - Additional minor fixes to mach-snapdragon/of_fixup.c - Link to v1: https://lore.kernel.org/r/20250409-livetree-fixup-v1-0-76dfea80b...@linaro.org --- Caleb Connolly (8): event: signal when livetree has been built mach-snapdragon: use EVT_OF_LIVE_INIT to apply DT fixups mach-snapdragon: of_fixup: skip disabled USB nodes mach-snapdragon: of_fixup: remove confusing log message mach-snapdragon: of_fixup: update comment mach-snapdragon: of_fixup: set dr_mode for RB1/2 boards clk/qcom: qcm2290: show clock name in set_rate() pinctrl: qcom: qcm2290: fix off by 1 in pin_count arch/arm/dts/qrb4210-rb2-u-boot.dtsi | 6 --- arch/arm/mach-snapdragon/board.c | 1 - arch/arm/mach-snapdragon/of_fixup.c| 71 +++--- arch/arm/mach-snapdragon/qcom-priv.h | 14 --- common/event.c | 3 ++ drivers/clk/qcom/clock-qcm2290.c | 2 +- drivers/pinctrl/qcom/pinctrl-qcm2290.c | 2 +- include/event.h| 18 + lib/of_live.c | 11 ++ 9 files changed, 74 insertions(+), 54 deletions(-) --- base-commit: 45acd9d2d4ec84775d09c73aab75a4fd989beb41 change-id: 20250409-livetree-fixup-0d7451cc3af3 Caleb Connolly
[PATCH v2 2/8] mach-snapdragon: use EVT_OF_LIVE_INIT to apply DT fixups
This will now apply fixups prior to devices being bound, which makes it
possible to enable/disable devices and adjust more properties that might
be read before devices probe.
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/board.c | 1 -
arch/arm/mach-snapdragon/of_fixup.c | 25 -
arch/arm/mach-snapdragon/qcom-priv.h | 14 --
3 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index
deae4d323789eab75d5fe735159b4cd820c02c45..3ab75f0fce02ecffd476ebe2aa606b1a9024bbec
100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -305,9 +305,8 @@ void __weak qcom_board_init(void)
int board_init(void)
{
show_psci_version();
- qcom_of_fixup_nodes();
qcom_board_init();
return 0;
}
diff --git a/arch/arm/mach-snapdragon/of_fixup.c
b/arch/arm/mach-snapdragon/of_fixup.c
index
1ea0c18c2f2789a8aa054cd95bb9e4308d6b3384..70399307bcbda1e067230f00af6ba859a98c7ac0
100644
--- a/arch/arm/mach-snapdragon/of_fixup.c
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -21,8 +21,9 @@
#include
#include
#include
+#include
#include
#include
#include
#include
@@ -31,9 +32,9 @@
* USB controllers. Rather than requiring source level DT changes, we fix up
* DT here. This improves compatibility with upstream DT and simplifies the
* porting process for new devices.
*/
-static int fixup_qcom_dwc3(struct device_node *glue_np)
+static int fixup_qcom_dwc3(struct device_node *root, struct device_node
*glue_np)
{
struct device_node *dwc3;
int ret, len, hsphy_idx = 1;
const __be32 *phandles;
@@ -100,11 +101,11 @@ static int fixup_qcom_dwc3(struct device_node *glue_np)
return 0;
}
-static void fixup_usb_nodes(void)
+static void fixup_usb_nodes(struct device_node *root)
{
- struct device_node *glue_np = NULL;
+ struct device_node *glue_np = root;
int ret;
while ((glue_np = of_find_compatible_node(glue_np, NULL, "qcom,dwc3")))
{
ret = fixup_qcom_dwc3(glue_np);
@@ -113,16 +114,16 @@ static void fixup_usb_nodes(void)
}
}
/* Remove all references to the rpmhpd device */
-static void fixup_power_domains(void)
+static void fixup_power_domains(struct device_node *root)
{
struct device_node *pd = NULL, *np = NULL;
struct property *prop;
const __be32 *val;
/* All Qualcomm platforms name the rpm(h)pd "power-controller" */
- for_each_of_allnodes(pd) {
+ for_each_of_allnodes_from(root, pd) {
if (pd->name && !strcmp("power-controller", pd->name))
break;
}
@@ -132,9 +133,9 @@ static void fixup_power_domains(void)
return;
}
/* Remove all references to the power domain controller */
- for_each_of_allnodes(np) {
+ for_each_of_allnodes_from(root, np) {
if (!(prop = of_find_property(np, "power-domains", NULL)))
continue;
val = prop->value;
@@ -149,14 +150,20 @@ static void fixup_power_domains(void)
func(__VA_ARGS__); \
debug(#func " took %lluus\n", timer_get_us() - start); \
} while (0)
-void qcom_of_fixup_nodes(void)
+static int qcom_of_fixup_nodes(void * __maybe_unused ctx, struct event *event)
{
- time_call(fixup_usb_nodes);
- time_call(fixup_power_domains);
+ struct device_node *root = event->data.of_live_built.root;
+
+ time_call(fixup_usb_nodes, root);
+ time_call(fixup_power_domains, root);
+
+ return 0;
}
+EVENT_SPY_FULL(EVT_OF_LIVE_BUILT, qcom_of_fixup_nodes);
+
int ft_board_setup(void *blob, struct bd_info __maybe_unused *bd)
{
struct fdt_header *fdt = blob;
int node;
diff --git a/arch/arm/mach-snapdragon/qcom-priv.h
b/arch/arm/mach-snapdragon/qcom-priv.h
index
74d39197b89f4e769299b06214c26ee829ecdce0..4f398e2ba374f27811afd2ccf6e72037d0f9ee7f
100644
--- a/arch/arm/mach-snapdragon/qcom-priv.h
+++ b/arch/arm/mach-snapdragon/qcom-priv.h
@@ -8,19 +8,5 @@ void qcom_configure_capsule_updates(void);
#else
void qcom_configure_capsule_updates(void) {}
#endif /* EFI_HAVE_CAPSULE_SUPPORT */
-#if CONFIG_IS_ENABLED(OF_LIVE)
-/**
- * qcom_of_fixup_nodes() - Fixup Qualcomm DT nodes
- *
- * Adjusts nodes in the live tree to improve compatibility with U-Boot.
- */
-void qcom_of_fixup_nodes(void);
-#else
-static inline void qcom_of_fixup_nodes(void)
-{
- log_debug("Unable to dynamically fixup USB nodes, please enable
CONFIG_OF_LIVE\n");
-}
-#endif /* OF_LIVE */
-
#endif /* __QCOM_PRIV_H__ */
--
2.49.0
[PATCH v2 3/8] mach-snapdragon: of_fixup: skip disabled USB nodes
There's no need to waste time fixing up nodes that aren't used on this
device. Skip them.
Reviewed-by: Sumit Garg
Reviewed-by: Neil Armstrong
Tested-by: Sumit Garg
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/of_fixup.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-snapdragon/of_fixup.c
b/arch/arm/mach-snapdragon/of_fixup.c
index
70399307bcbda1e067230f00af6ba859a98c7ac0..dcd09ee7cac3e02287647c9e6df5575651e18e85
100644
--- a/arch/arm/mach-snapdragon/of_fixup.c
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -107,9 +107,11 @@ static void fixup_usb_nodes(struct device_node *root)
struct device_node *glue_np = root;
int ret;
while ((glue_np = of_find_compatible_node(glue_np, NULL, "qcom,dwc3")))
{
- ret = fixup_qcom_dwc3(glue_np);
+ if (!of_device_is_available(glue_np))
+ continue;
+ ret = fixup_qcom_dwc3(root, glue_np);
if (ret)
log_warning("Failed to fixup node %s: %d\n",
glue_np->name, ret);
}
}
--
2.49.0
Re: [PATCH] doc: board: ti: Add optee rng support
Hi, > > > J722S has hw rng, which can be used by OPTEE. > > > So remove option to use SW TRNG by OPTEE. > > > > > > Signed-off-by: Udit Kumar > > > --- > > > reference discussion > > > https://lore.kernel.org/all/20250313144155.2382316-1-mwa...@kernel.org/ > > > > > > Bootlogs with optee trng > > > https://gist.github.com/uditkumarti/5f90210b23e67cd4eb6d06a024031ee8#file-gistfile1-txt-L1970 > > > > > > I can confirm the TRNG will work on u-boot as well as linux. > > Thanks! > > just curious: Did you have to change .configs for either? We are using the (arm64) defconfig in linux, so no. Regarding u-boot, I don't know because we are using our own config and I had to enable CONFIG_OPTEE there (as well as CONFIG_OPTEE_SERVICE_DISCOVERY, but that one is default y). -michael signature.asc Description: PGP signature
[PATCH v2 4/8] mach-snapdragon: of_fixup: remove confusing log message
The debug log here had the logic completely backwards, even though the
code is actually correct. Remove it since it's extraneous anyway.
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/of_fixup.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-snapdragon/of_fixup.c
b/arch/arm/mach-snapdragon/of_fixup.c
index
dcd09ee7cac3e02287647c9e6df5575651e18e85..a5515c02d3de05944dfb7c1b2a5542631b517497
100644
--- a/arch/arm/mach-snapdragon/of_fixup.c
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -72,13 +72,14 @@ static int fixup_qcom_dwc3(struct device_node *root, struct
device_node *glue_np
log_err("Failed to read second phy name: %d\n", ret);
return ret;
}
- if (!strncmp("usb3-phy", second_phy_name, strlen("usb3-phy"))) {
- log_debug("Second phy isn't superspeed (is '%s') assuming first
phy is SS\n",
- second_phy_name);
+ /*
+* Determine which phy is the superspeed phy by checking the name of
the second phy
+* since it is typically the superspeed one.
+*/
+ if (!strncmp("usb3-phy", second_phy_name, strlen("usb3-phy")))
hsphy_idx = 0;
- }
/* Overwrite the "phys" property to only contain the high-speed phy */
ret = of_write_prop(dwc3, "phys", sizeof(*phandles), phandles +
hsphy_idx);
if (ret) {
--
2.49.0
[PATCH v2 6/8] mach-snapdragon: of_fixup: set dr_mode for RB1/2 boards
The RB1 and RB2 have a single USB controller which is manually muxed
between a type-c port and an internal USB hub via a DIP switch. OTG is
supported in Linux, but the DWC3 driver in U-Boot can only handle a
single mode, and defaults to peripheral mode.
We did hack around this on the RB2, but the RB1 got left out.
Now that we can fix up the live tree before devices are bound, drop the
DTS hacks and do the fixup at runtime instead.
Reviewed-by: Sumit Garg
Reviewed-by: Neil Armstrong
Tested-by: Sumit Garg
Signed-off-by: Caleb Connolly
---
arch/arm/dts/qrb4210-rb2-u-boot.dtsi | 6 --
arch/arm/mach-snapdragon/of_fixup.c | 28 ++--
2 files changed, 14 insertions(+), 20 deletions(-)
diff --git a/arch/arm/dts/qrb4210-rb2-u-boot.dtsi
b/arch/arm/dts/qrb4210-rb2-u-boot.dtsi
deleted file mode 100644
index
7d1375f38c44d7bd54c022fa3d390f666a35d6ee..
--- a/arch/arm/dts/qrb4210-rb2-u-boot.dtsi
+++ /dev/null
@@ -1,6 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-
-/* This is usually OTG but U-Boot doesn't support that properly */
-&usb_dwc3 {
- dr_mode = "host";
-};
diff --git a/arch/arm/mach-snapdragon/of_fixup.c
b/arch/arm/mach-snapdragon/of_fixup.c
index
10053e48d88017d2179c96f2f3724c4d5dc4f3e2..b398c6b7b9fdaddc03324921e6b955919f9c7675
100644
--- a/arch/arm/mach-snapdragon/of_fixup.c
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -98,8 +98,21 @@ static int fixup_qcom_dwc3(struct device_node *root, struct
device_node *glue_np
log_err("Failed to set 'maximum-speed' property: %d\n", ret);
return ret;
}
+ /*
+* The RB1/2 boards only have a single USB controller and it's muxed
between the type-C port
+* and a USB hub. Since we can't do OTG in U-Boot properly we prefer to
put it into host mode.
+*/
+ if (of_device_is_compatible(root, "qcom,qrb4210-rb2", NULL, NULL) ||
+ of_device_is_compatible(root, "qcom,qrb2210-rb1", NULL, NULL)) {
+ ret = of_write_prop(dwc3, "dr_mode", sizeof("host"), "host");
+ if (ret) {
+ log_err("Failed to set 'dr_mode' property: %d\n", ret);
+ return ret;
+ }
+ }
+
return 0;
}
static void fixup_usb_nodes(struct device_node *root)
@@ -164,21 +177,8 @@ static int qcom_of_fixup_nodes(void * __maybe_unused ctx,
struct event *event)
}
EVENT_SPY_FULL(EVT_OF_LIVE_BUILT, qcom_of_fixup_nodes);
-int ft_board_setup(void *blob, struct bd_info __maybe_unused *bd)
+int ft_board_setup(void __maybe_unused *blob, struct bd_info __maybe_unused
*bd)
{
- struct fdt_header *fdt = blob;
- int node;
-
- /* On RB1/2 we need to fix-up the dr_mode */
- if (!fdt_node_check_compatible(fdt, 0, "qcom,qrb4210-rb2") ||
- !fdt_node_check_compatible(fdt, 0, "qcom,qrb2210-rb1")) {
- fdt_for_each_node_by_compatible(node, blob, 0, "snps,dwc3") {
- log_debug("%s: Setting 'dr_mode' to OTG\n",
fdt_get_name(blob, node, NULL));
- fdt_setprop_string(fdt, node, "dr_mode", "otg");
- break;
- }
- }
-
return 0;
}
--
2.49.0
[PATCH v2 5/8] mach-snapdragon: of_fixup: update comment
we don't rewrite the volume buttons any more. Signed-off-by: Caleb Connolly --- arch/arm/mach-snapdragon/of_fixup.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-snapdragon/of_fixup.c b/arch/arm/mach-snapdragon/of_fixup.c index a5515c02d3de05944dfb7c1b2a5542631b517497..10053e48d88017d2179c96f2f3724c4d5dc4f3e2 100644 --- a/arch/arm/mach-snapdragon/of_fixup.c +++ b/arch/arm/mach-snapdragon/of_fixup.c @@ -3,10 +3,9 @@ * OF_LIVE devicetree fixup. * * This file implements runtime fixups for Qualcomm DT to improve * compatibility with U-Boot. This includes adjusting the USB nodes - * to only use USB high-speed, as well as remapping volume buttons - * to behave as up/down for navigating U-Boot. + * to only use USB high-speed. * * We use OF_LIVE for this rather than early FDT fixup for a couple * of reasons: it has a much nicer API, is most likely more efficient, * and our changes are only applied to U-Boot. This allows us to use a -- 2.49.0
[PATCH v2 7/8] clk/qcom: qcm2290: show clock name in set_rate()
The device name is always clk_qcom... Not very useful.
Reviewed-by: Sumit Garg
Reviewed-by: Neil Armstrong
Tested-by: Sumit Garg
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-qcm2290.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clock-qcm2290.c b/drivers/clk/qcom/clock-qcm2290.c
index
1326b770c3ebd723120de4b6657aafac726023d6..fad104fb91aec8917de66b63dd546926c8856011
100644
--- a/drivers/clk/qcom/clock-qcm2290.c
+++ b/drivers/clk/qcom/clock-qcm2290.c
@@ -87,9 +87,9 @@ static ulong qcm2290_set_rate(struct clk *clk, ulong rate)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
const struct freq_tbl *freq;
- debug("%s: clk %s rate %lu\n", __func__, clk->dev->name, rate);
+ debug("%s: clk %s rate %lu\n", __func__, qcm2290_clks[clk->id].name,
rate);
switch (clk->id) {
case GCC_QUPV3_WRAP0_S4_CLK: /*UART2*/
freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
--
2.49.0
[PATCH v2 8/8] pinctrl: qcom: qcm2290: fix off by 1 in pin_count
There are 134 pins not 133, oops! This fixes the sdcard on the RB1 as
the pins now all get configured correctly.
Fixes: 0ecb8cfcb930 ("pinctrl: qcom: add qcm2290 pinctrl driver")
Reviewed-by: Sumit Garg
Reviewed-by: Neil Armstrong
Tested-by: Sumit Garg
Signed-off-by: Caleb Connolly
---
drivers/pinctrl/qcom/pinctrl-qcm2290.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c
b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
index
0cce663e6d584d229e7521f88fedf8aa19da..84f76b63b93ad78182524661dba561672feb4c85
100644
--- a/drivers/pinctrl/qcom/pinctrl-qcm2290.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
@@ -44,9 +44,9 @@ static int qcm2290_get_function_mux(__maybe_unused unsigned
int pin, unsigned in
}
struct msm_pinctrl_data qcm2290_data = {
.pin_data = {
- .pin_count = 133,
+ .pin_count = 134,
.special_pins_start = 127,
},
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = qcm2290_get_function_name,
--
2.49.0
Re: [PATCH RESEND] firmware: scmi: support to manage SCMI protocol drivers with a linker-genetated array
On Fri, Apr 11, 2025 at 9:59 AM Alice Guo (OSS) wrote: > Hi Fabio, > > Actual usage is in this patch. > https://patchwork.ozlabs.org/project/uboot/patch/20250411080707.602371-2-alice@oss.nxp.com/ Please make it part of the series, then.
[PATCH 1/1] Makefile: pass KEYDIR when set to sunxi-spl.bin mkimage
Currently we pass this for u-boot-spl.kwb targets, however when building sunxi-spl.bin in the TOC0 format we may also need to specify a KEYDIR, as such we should also pass this when set to mkimage for the sunxi-spl.bin target. Signed-off-by: James Hilliard --- scripts/Makefile.xpl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/scripts/Makefile.xpl b/scripts/Makefile.xpl index abc49fbe6c9..d1c1cea876a 100644 --- a/scripts/Makefile.xpl +++ b/scripts/Makefile.xpl @@ -445,7 +445,8 @@ MKIMAGEFLAGS_sunxi-spl.bin = \ -A $(ARCH) \ -T $(CONFIG_SPL_IMAGE_TYPE) \ -a $(CONFIG_SPL_TEXT_BASE) \ - -n $(CONFIG_DEFAULT_DEVICE_TREE) + -n $(CONFIG_DEFAULT_DEVICE_TREE) \ + $(if $(KEYDIR),-k $(KEYDIR)) OBJCOPYFLAGS_u-boot-spl-dtb.hex := -I binary -O ihex --change-address=$(CONFIG_SPL_TEXT_BASE) -- 2.34.1
Re: Gitlab runner timeout on evb-ast2600 ?
Hi,
On 4/11/25 01:14, Tom Rini wrote:
On Fri, Apr 11, 2025 at 08:07:15AM +0930, Joel Stanley wrote:
On Mon, 7 Apr 2025 at 23:25, Eugen Hristev wrote:
Hi everyone,
I keep getting an error on running the CI loop on -next on my tree :
https://source.denx.de/u-boot/custodians/u-boot-at91/-/jobs/1090517
Thanks for the report.
! _pytest.outcomes.Exit: Lab timeout: Marking connection bad - no other
tests will run !
Any clue ? It's been like this for few days. It doesn't look like a
faulty patch.
I can't see that link you sent me, it 403s.
Do you have any other traces or information to share?
It's been intermittent recently. I was able to put qemu + gdb together
and see it's one of the early initcalls that fails and hang()s but
didn't see why. You should be able to use commit 1f0281294d8b ("Merge
patch series "Annotate switch/case fallthrough cases"") as a starting
point of failure.
Do you have logs ?
Things look ok from the QEMU side (latest 10.0.0-rc and 9.1) :
uboot_build=/path/to/u-boot/
flashsize=65536
flash=./flash-ast2600-evb-uboot
dd of=$flash bs=1K if=/dev/zero count=$flashsize
dd of=$flash conv=notrunc bs=1K if=$uboot_build/spl/u-boot-spl.bin
dd of=$flash conv=notrunc bs=1K if=$uboot_build/u-boot.img seek=64
$ qemu-system-arm -M ast2600-evb -net nic,netdev=net0 -netdev user,id=net0 -nographic -snapshot -serial mon:stdio -drive file=flash-ast2600-evb-uboot,format=raw,if=mtd
qemu-system-arm: warning: nic ftgmac100.1 has no peer
qemu-system-arm: warning: nic ftgmac100.2 has no peer
qemu-system-arm: warning: nic ftgmac100.3 has no peer
U-Boot SPL 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 09:08:40 +0200)
Trying to boot from RAM
## Checking hash(es) for config conf-1 ... OK
## Checking hash(es) for Image firmware-1 ... crc32+ OK
## Checking hash(es) for Image fdt-1 ... crc32+ OK
U-Boot 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 09:08:40 +0200)
Model: Aspeed BMC
DRAM: already initialized, 1008 MiB (capacity:1024 MiB, VGA:64 MiB), ECC
off
Core: 266 devices, 24 uclasses, devicetree: separate
WDT: Started watchdog@1e785000 with servicing every 1000ms (60s timeout)
MMC: sdhci@1e750100: 0
Loading Environment from SPIFlash... SF: Detected mx25u51245g with page
size 256 Bytes, erase size 64 KiB, total 64 MiB
*** Warning - bad CRC, using default environment
In:serial@1e784000
Out: serial@1e784000
Err: serial@1e784000
Net: eth0: ftgmac@1e66, eth1: ftgmac@1e68, eth2: ftgmac@1e67,
eth3: ftgmac@1e69
Hit any key to stop autoboot: 0
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
Error loading kernel FIT image
=>
Thanks,
C.
RE: [resend v3 00/12] Add Synopsys MIPI I3C Driver support
> -Original Message- > From: Tom Rini > Sent: Tuesday, 8 April 2025 10:27 pm > To: Maniyam, Dinesh > Cc: u-boot@lists.denx.de; Marek ; Simon > ; Simon Glass ; Dario > Binacchi ; Ilias Apalodimas > ; Heinrich Schuchardt ; > Jerome Forissier ; Mattijs Korpershoek > ; Ibai Erkiaga ; > Michal Simek ; Dmitry Rokosov > ; Jonas Karlman ; Sebastian > Reichel ; Meng, Tingting > ; Chee, Tien Fong ; > Hea, Kok Kiang ; Ng, Boon Khai > ; Yuslaimi, Alif Zakuan > ; Zamri, Muhammad Hazim Izzat > ; Lim, Jit Loon > ; Tang, Sieu Mun > Subject: Re: [resend v3 00/12] Add Synopsys MIPI I3C Driver support > > On Tue, Apr 08, 2025 at 08:14:46AM +, Maniyam, Dinesh wrote: > > > Hi Tom Rini, > > > > > -Original Message- > > > From: Maniyam, Dinesh > > > Sent: Monday, 24 March 2025 4:40 pm > > > To: u-boot@lists.denx.de > > > Cc: Marek ; Simon ; > > > Simon Glass ; Tom Rini ; Dario > > > Binacchi ; Ilias Apalodimas > > > ; Heinrich Schuchardt > > > ; Jerome Forissier > > > ; Mattijs Korpershoek > > > ; Ibai Erkiaga > > > ; Michal Simek ; > > > Dmitry Rokosov ; Jonas Karlman > > > ; Sebastian Reichel > > > ; Meng, Tingting > > > ; Chee, Tien Fong > > > ; Hea, Kok Kiang > > > ; Maniyam, Dinesh > > > ; Ng, Boon Khai > > > ; Yuslaimi, Alif Zakuan > > > ; Zamri, Muhammad Hazim Izzat > > > ; Lim, Jit Loon > > > ; Tang, Sieu Mun > > > Subject: [resend v3 00/12] Add Synopsys MIPI I3C Driver support > > > > > > From: Dinesh Maniyam > > > > > > This patchset add Synopsys MIPI I3C Driver support for Intel Agilex5 > > > devices. > > > > > > The i3c driver is leveraged from the master/dw-i3c-master.c, > > > i3c/device.c and i3c/master.c Linux version 6.6.37 LTS And few > > > header files included to be part of the migration; i3c/internals.h, > > > include/linux/i3c/ccc.h, include/linux/i3c/device.h and > include/linux/i3c/master.h. > > > Additional i3c uclass driver and command files added to support i3c > > > read and write in U-Boot. > > > > > > Patch status: > > > > > > Detail changelog can find in commit message. > > > > > > v3->v2: > > > > > > - Squash commit 10 to commit 9 > > > - Resolve index for new files to pass the checkpatch > > > > > > Commit: sandbox_defconfig: Enable configs for sandbox i3c > > > Commit: agilex5_defconfig: Enable i3c configs for agilex5 > > > - use savedefconfig > > > > > > drivers: Enabled Kconfig and Makefile for i3c support > > > - Add maintainer for i3c > > > > > > drivers: i3c: Enabled Kconfig and Makefile for DWI3C > > > - Add empty lines for if/endif > > > > > > drivers: i3c: Add i3c sandbox simple test. > > > - Removed DECLARE_GLOBAL_DATA_PTR > > > > > > v1->v2: > > > > > > Reorder commits. > > > > > > Added commits: > > > - drivers: i3c: Add i3c sandbox simple test. > > > - test: cmd: Add simple test for i3c > > > - configs: sandbox_defconfig: Enable configs for sandbox i3c > > > - configs: agilex5_defconfig: Enable i3c configs for agilex5 > > > > > > History: > > > > > > [v1]: > > > https://patchwork.ozlabs.org/project/uboot/cover/20250218025705.5005 > > > 1-1- > > > dinesh.mani...@intel.com/ > > > [v2]: > > > https://patchwork.ozlabs.org/project/uboot/cover/20250314040902.4362 > > > 1-1- > > > dinesh.mani...@altera.com/ > > > > > > Dinesh Maniyam (12): > > > drivers: i3c: Add new i3c uclass id > > > drivers: i3c: Add driver for MIPI DWI3C > > > drivers: i3c: Add i3c uclass driver. > > > drivers: Enabled Kconfig and Makefile for i3c support > > > drivers: i3c: Enabled Kconfig and Makefile for DWI3C > > > drivers: i3c: Add i3c sandbox simple test. > > > drivers: i3c: master: Enable probe i3c without slave device > > > i3c: master: dw-i3c-master: Fix OD_TIMING for spike filter > > > cmd: Add i3c command support. > > > test: cmd: Add simple test for i3c > > > configs: sandbox_defconfig: Enable configs for sandbox i3c > > > configs: agilex5_defconfig: Enable i3c configs for agilex5 > > > > > > MAINTAINERS|7 + > > > arch/sandbox/dts/test.dts |8 + > > > cmd/Kconfig|6 + > > > cmd/Makefile |1 + > > > cmd/i3c.c | 193 +++ > > > configs/sandbox_defconfig |4 + > > > configs/socfpga_agilex5_defconfig |3 + > > > doc/usage/cmd/i3c.rst | 98 ++ > > > drivers/Kconfig|2 + > > > drivers/Makefile |1 + > > > drivers/i3c/Kconfig| 27 + > > > drivers/i3c/Makefile |5 + > > > drivers/i3c/device.c | 262 > > > drivers/i3c/i3c-uclass.c | 38 + > > > drivers/i3c/internals.h| 26 + > > > drivers/i3c/master.c | 2072 > > > drivers/i3c/master/Kconfig | 11 + > > > drivers/i3c/master/Makefile|3 + > > > drivers/i3c/master/dw-i3c-master.c | 1058 ++ > > > drivers/i3c/sandbox_i3c.c |
回复: [PATCH RESEND] firmware: scmi: support to manage SCMI protocol drivers with a linker-genetated array
> -邮件原件- > 发件人: Fabio Estevam > 发送时间: 2025年4月11日 21:02 > 收件人: Alice Guo (OSS) > 抄送: ma...@denx.de; tr...@konsulko.com; u-boot@lists.denx.de > 主题: Re: [PATCH RESEND] firmware: scmi: support to manage SCMI protocol > drivers with a linker-genetated array > > On Fri, Apr 11, 2025 at 9:59 AM Alice Guo (OSS) > wrote: > > > Hi Fabio, > > > > Actual usage is in this patch. > > > https://patchwork.ozlabs.org/project/uboot/patch/20250411080707.602371- > 2-alice@oss.nxp.com/ > > Please make it part of the series, then. It will be added to the series in the next version. Best Regards, Alice Guo
回复: [PATCH RESEND] firmware: scmi: support to manage SCMI protocol drivers with a linker-genetated array
> -邮件原件-
> 发件人: Fabio Estevam
> 发送时间: 2025年4月11日 20:46
> 收件人: Alice Guo (OSS)
> 抄送: ma...@denx.de; tr...@konsulko.com; u-boot@lists.denx.de
> 主题: Re: [PATCH RESEND] firmware: scmi: support to manage SCMI protocol
> drivers with a linker-genetated array
>
> On Wed, Apr 9, 2025 at 4:54 AM Alice Guo (OSS)
> wrote:
>
> > +static struct driver *scmi_proto_driver_get(unsigned int proto_id) {
> > + struct scmi_proto_driver *start, *entry;
> > + int n_ents;
> > +
> > + start = ll_entry_start(struct scmi_proto_driver, scmi_proto_driver);
> > + n_ents = ll_entry_count(struct scmi_proto_driver,
> > + scmi_proto_driver);
> > +
> > + for (entry = start; entry != start + n_ents; entry++) {
> > + if (entry->match->proto_id == proto_id)
> > + return entry->driver;
> > + }
> > +
> > + return NULL;
>
> Please send this with an actual usage. Otherwise, we get:
>
> sandbox: + sandbox
> 102+drivers/firmware/scmi/scmi_agent-uclass.c:355:23: error:
> ‘scmi_proto_driver_get’ defined but not used [-Werror=unused-function]
> 103+ 355 | static struct driver *scmi_proto_driver_get(unsigned int
> 103+ proto_id)
> 104+ | ^
> 105+cc1: all warnings being treated as errors
> 106+make[4]: *** [scripts/Makefile.build:256:
> drivers/firmware/scmi/scmi_agent-uclass.o] Error 1
> 107+make[3]: *** [scripts/Makefile.build:398: drivers/firmware/scmi]
> 107+Error 2
> 108+make[2]: *** [scripts/Makefile.build:398: drivers/firmware] Error 2
> 109+make[1]: *** [Makefile:1919: drivers] Error 2
> 110+make: *** [Makefile:177: sub-make] Error 2
Hi Fabio,
Actual usage is in this patch.
https://patchwork.ozlabs.org/project/uboot/patch/20250411080707.602371-2-alice@oss.nxp.com/
Best Regards,
Alice Guo
Re: [PATCH 0/2] gpio: msm: fix special pins handling
On Tue, 01 Apr 2025 09:45:18 +0200, Neil Armstrong wrote: > Fix special pins handling of get_value and get_function > to show correct state in gpio cmd. > > Applied, thanks! [1/2] gpio: msm: fix get_function return for special pins https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/0708bdd34d4f [2/2] gpio: msm: return correct value return for special output pins https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/8803cd6dd782 Best regards, -- Caleb Connolly
Re: [PATCH] mach-snapdragon: of_fixup: fix condition check in ft_board_setup()
On Mon, 31 Mar 2025 12:43:18 +0200, Caleb Connolly wrote: > The fdt_node_check_compatible() function returns 0 on success which is > pretty confusing, and we were using it wrong! > > Invert the condition check and refactor things to be more readable. > > Additionally, add the check for the RB1 which needs the same fixup as > the RB2. > > [...] Applied, thanks! [1/1] mach-snapdragon: of_fixup: fix condition check in ft_board_setup() https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/602ceb0c9279 Best regards, -- Caleb Connolly
Re: [PATCH v2 0/2] RB1 fixes
On Thu, 10 Apr 2025 13:30:25 +0530, Sumit Garg wrote: > The eMMC on RB1 boards supports HS200 mode but currently the msm_shdci > driver in U-Boot is missing DLL configuration required for HS200 mode to > work. Hence disable HS200 for now until proper support is in place. > > Apart from that, add a fix for USB PHY power on sequence which got > broken by recent addition for SM660 platform support. > > [...] Applied, thanks! [1/2] qcom_defconfig: Disable MMC HS200 mode support https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/49cf3b29134c [2/2] phy: phy-qcom-qusb2: Fix USB PHY power on sequence https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/45acd9d2d4ec Best regards, -- Caleb Connolly
Re: [PATCH v2] drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver
On 3/31/25 17:55, Alexey Minnekhanov via groups.io wrote:
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.
Correct pin configuration is required for working debug UART
and eMMC/SD cards.
SDM630 and SDM660 TLMM blocks are the same.
Signed-off-by: Alexey Minnekhanov
Reviewed-by: Caleb Connolly
Thanks, this got merged in
https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/b4420a0c9ed446a9dbb5439d543d7c74344a5099>
---
v2: Fixed sdm660_get_function_mux() signature to return an int
and check validity of the selector passed in.
---
drivers/pinctrl/qcom/Kconfig | 7 +
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-sdm660.c | 226 ++
3 files changed, 234 insertions(+)
create mode 100644 drivers/pinctrl/qcom/pinctrl-sdm660.c
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index d3eb6998551..29105301c74 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -41,6 +41,13 @@ config PINCTRL_QCOM_QCS404
Say Y here to enable support for pinctrl on the Snapdragon QCS404 SoC,
as well as the associated GPIO driver.
+config PINCTRL_QCOM_SDM660
+ bool "Qualcomm SDM630/660 Pinctrl"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon 630/636/660
+ SoCs, as well as the associated GPIO driver.
+
config PINCTRL_QCOM_SDM845
bool "Qualcomm SDM845 GCC"
select PINCTRL_QCOM
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 06d3c95f93a..c814e9dec0b 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o
obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o
obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o
obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o
+obj-$(CONFIG_PINCTRL_QCOM_SDM660) += pinctrl-sdm660.o
obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
obj-$(CONFIG_PINCTRL_QCOM_SM6115) += pinctrl-sm6115.o
obj-$(CONFIG_PINCTRL_QCOM_SM8150) += pinctrl-sm8150.o
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm660.c
b/drivers/pinctrl/qcom/pinctrl-sdm660.c
new file mode 100644
index 000..646d848ffa4
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sdm660.c
@@ -0,0 +1,226 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm SDM630/660 TLMM pinctrl
+ *
+ */
+
+#include
+#include "pinctrl-qcom.h"
+
+#define TLMM_BASE 0x0310
+#define SOUTH (0x0310 - TLMM_BASE) /* 0x0 */
+#define CENTER (0x0350 - TLMM_BASE) /* 0x40 */
+#define NORTH (0x0390 - TLMM_BASE) /* 0x80 */
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function sdm660_pinctrl_functions[] = {
+ { "gpio", 0 },
+ { "blsp_uart2", 3 }, /* gpio 4 and 5, used for debug uart */
+};
+
+static const unsigned int sdm660_pin_offsets[] = {
+ [0] = SOUTH,
+ [1] = SOUTH,
+ [2] = SOUTH,
+ [3] = SOUTH,
+ [4] = NORTH,
+ [5] = SOUTH,
+ [6] = SOUTH,
+ [7] = SOUTH,
+ [8] = NORTH,
+ [9] = NORTH,
+ [10] = NORTH,
+ [11] = NORTH,
+ [12] = NORTH,
+ [13] = NORTH,
+ [14] = NORTH,
+ [15] = NORTH,
+ [16] = CENTER,
+ [17] = CENTER,
+ [18] = CENTER,
+ [19] = CENTER,
+ [20] = SOUTH,
+ [21] = SOUTH,
+ [22] = CENTER,
+ [23] = CENTER,
+ [24] = NORTH,
+ [25] = NORTH,
+ [26] = NORTH,
+ [27] = NORTH,
+ [28] = CENTER,
+ [29] = CENTER,
+ [30] = CENTER,
+ [31] = CENTER,
+ [32] = SOUTH,
+ [33] = SOUTH,
+ [34] = SOUTH,
+ [35] = SOUTH,
+ [36] = SOUTH,
+ [37] = SOUTH,
+ [38] = SOUTH,
+ [39] = SOUTH,
+ [40] = SOUTH,
+ [41] = SOUTH,
+ [42] = SOUTH,
+ [43] = SOUTH,
+ [44] = SOUTH,
+ [45] = SOUTH,
+ [46] = SOUTH,
+ [47] = SOUTH,
+ [48] = SOUTH,
+ [49] = SOUTH,
+ [50] = SOUTH,
+ [51] = SOUTH,
+ [52] = SOUTH,
+ [53] = NORTH,
+ [54] = NORTH,
+ [55] = SOUTH,
+ [56] = SOUTH,
+ [57] = SOUTH,
+ [58] = SOUTH,
+ [59] = NORTH,
+ [60] = NORTH,
+ [61] = NORTH,
+ [62] = NORTH,
+ [63] = NORTH,
+ [64] = SOUTH,
+ [65] = SOUTH,
+ [66] = NORTH,
+ [67] = NORTH,
+ [68] = NORTH,
+ [69] = NORTH,
+ [70] = NORTH,
+ [71] = NORTH,
+ [72] = NORTH,
+ [73] = NORTH,
+ [74] = NORTH,
+ [75] = NORTH,
+ [76] = NORTH,
+ [77] = NORTH,
+ [78] = NORTH,
+ [79] = SOUTH,
+ [80] = SOUTH,
+ [81] = CENTER,
+ [82] = CENTER,
+ [83] = SOUTH,
+ [84] = SOUTH,
+
Re: [PATCH v4 0/6] Better smartphone support (Qualcomm)
On Mon, 31 Mar 2025 14:23:17 +0200, Caleb Connolly wrote: > Improve support for running U-Boot on [Qualcomm] smartphones, with: > > * A boot menu which can be entered by holding volume down during boot > * Hang on panic (so errors can be read on the display) > * Serial gadget which can be enabled by holding volume down or via > boot menu > > [...] Applied, thanks! [1/6] board/qualcomm: introduce phone config https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/fd775fb7aff8 [2/6] cli_hush: support running bootcmd on boot retry https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/657e19f8f2dd [3/6] bootretry: check for bootretry variable changes https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/aa5ef3c0a752 [4/6] doc: board/qualcomm: describe phone support and bringup https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/4509f8183970 [5/6] button: qcom-pmic: prettify and standardise button labels https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/8f5685d5d32f [6/6] button: make button_get_by_label() case insensitive https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/9c607005c519 Best regards, -- Caleb Connolly
Re: [PATCH RESEND] firmware: scmi: support to manage SCMI protocol drivers with a linker-genetated array
On Wed, Apr 9, 2025 at 4:54 AM Alice Guo (OSS) wrote:
> +static struct driver *scmi_proto_driver_get(unsigned int proto_id)
> +{
> + struct scmi_proto_driver *start, *entry;
> + int n_ents;
> +
> + start = ll_entry_start(struct scmi_proto_driver, scmi_proto_driver);
> + n_ents = ll_entry_count(struct scmi_proto_driver, scmi_proto_driver);
> +
> + for (entry = start; entry != start + n_ents; entry++) {
> + if (entry->match->proto_id == proto_id)
> + return entry->driver;
> + }
> +
> + return NULL;
Please send this with an actual usage. Otherwise, we get:
sandbox: + sandbox
102+drivers/firmware/scmi/scmi_agent-uclass.c:355:23: error:
‘scmi_proto_driver_get’ defined but not used [-Werror=unused-function]
103+ 355 | static struct driver *scmi_proto_driver_get(unsigned int proto_id)
104+ | ^
105+cc1: all warnings being treated as errors
106+make[4]: *** [scripts/Makefile.build:256:
drivers/firmware/scmi/scmi_agent-uclass.o] Error 1
107+make[3]: *** [scripts/Makefile.build:398: drivers/firmware/scmi] Error 2
108+make[2]: *** [scripts/Makefile.build:398: drivers/firmware] Error 2
109+make[1]: *** [Makefile:1919: drivers] Error 2
110+make: *** [Makefile:177: sub-make] Error 2
[GIT PULL] Please pull u-boot-imx-master-20250411
Hi Tom, Please pull from u-boot-imx/master, thanks. The following changes since commit cb7555e93075114fe4af0adb806877ac4d4ef80d: Merge patch series "*** Add Ethernet boot support for AM62Ax + phyCORE-AM62 SoMs ***" (2025-04-10 15:04:09 -0600) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-master-20250411 for you to fetch changes up to ba71e4ef4d3d3edc05c29e14f0ed84ecce4bb051: board: phycore-imx93: env: Add common RAUC boot logic (2025-04-11 10:00:59 -0300) u-boot-imx-master-20250411 -- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25652 - Add i.MX8MP LDB support. - Various phycore-imx93 environment improvements. - Add support for Toradex SMARC iMX8MP. Leonard Anderweit (1): board: phycore-imx93: env: Move bootcmd from defconfig to env Martin Schwan (1): board: phycore-imx93: env: Add common RAUC boot logic Miquel Raynal (12): core: ofnode_graph: Fix a comment dm: doc: Fix example dm: core: Add a helper to retrieve devices through graph endpoints test: dm: test-fdt: Add checks for uclass_get_device_by_endpoint() power-domain: Add refcounting clk: Ensure the parent clocks are enabled while reparenting clk: imx8mp: Add media related clocks imx: power-domain: Describe the i.MX8 MEDIAMIX domain imx: power-domain: Add support for the MEDIAMIX control block video: imx: Fix Makefile in order to be able to add other imx drivers video: imx: Add LDB driver video: imx: Add LCDIF driver Primoz Fiser (4): board: phycore-imx93: env: Move fdt and bootenv addresses board: phycore-imx93: env: Add optargs to environment board: phycore-imx93: env: Add prepare_mcore to environment board: phycore-imx93: env: Add option to disable bootenv.txt import Rafael Beims (1): toradex: apalis-imx6: Fix build failure when CONFIG_VIDEO_IPUV3 is enabled Viorel Suman (1): firmware: scmi: smt: Interrupt communication enable Vitor Soares (3): arm: dts: imx8mp: sync with Linux v6.15-rc1 toradex: tdx-cfg-block: add 0096 Toradex SMARC iMX95 board: toradex: add Toradex SMARC iMX8MP arch/arm/dts/imx8mp-toradex-smarc-dev-u-boot.dtsi | 80 + arch/arm/dts/imx8mp-toradex-smarc-dev.dts | 297 arch/arm/dts/imx8mp-toradex-smarc.dtsi| 1284 ++ arch/arm/dts/imx8mp.dtsi | 413 - arch/arm/mach-imx/imx8m/Kconfig |7 + board/phytec/phycore_imx93/phycore_imx93.env | 36 +- board/toradex/apalis_imx6/apalis_imx6.c | 14 +- board/toradex/common/tdx-cfg-block.c |2 + board/toradex/common/tdx-cfg-block.h |2 + board/toradex/smarc-imx8mp/Kconfig| 39 + board/toradex/smarc-imx8mp/MAINTAINERS| 10 + board/toradex/smarc-imx8mp/Makefile |9 + board/toradex/smarc-imx8mp/imximage.cfg |6 + board/toradex/smarc-imx8mp/lpddr4_timing.c| 1903 + board/toradex/smarc-imx8mp/lpddr4_timing.h|9 + board/toradex/smarc-imx8mp/smarc-imx8mp.c | 85 + board/toradex/smarc-imx8mp/smarc-imx8mp.env | 20 + board/toradex/smarc-imx8mp/spl.c | 130 ++ configs/imx93-phycore_defconfig |1 - configs/sandbox64_defconfig |2 + configs/sandbox_flattree_defconfig|2 + configs/toradex-smarc-imx8mp_defconfig| 184 ++ doc/board/toradex/index.rst |1 + doc/board/toradex/smarc-imx8mp.rst| 116 ++ doc/develop/driver-model/design.rst |2 +- drivers/clk/clk-uclass.c | 19 +- drivers/clk/imx/clk-imx8mp.c | 69 + drivers/core/ofnode_graph.c |2 +- drivers/core/uclass.c | 19 + drivers/firmware/scmi/sandbox-scmi_devices.c |1 + drivers/firmware/scmi/smt.c | 13 + drivers/power/domain/Kconfig |7 + drivers/power/domain/Makefile |1 + drivers/power/domain/imx8m-power-domain.c | 17 + drivers/power/domain/imx8mp-mediamix.c| 208 +++ drivers/power/domain/power-domain-uclass.c| 40 +- drivers/power/domain/sandbox-power-domain-test.c |1 + drivers/video/Makefile|2 +- drivers/video/imx/Kconfig |9 + drivers/video/imx/Makefile|4 +- drivers/video/imx/lcdif.c | 314 drivers/video/imx/ldb.c | 251 +++ include/configs/toradex-smarc-imx8mp.h| 28 + include/d
Re: [PATCH v2 2/8] mach-snapdragon: use EVT_OF_LIVE_INIT to apply DT fixups
Hi,
On 11/04/2025 14:47, Caleb Connolly wrote:
This will now apply fixups prior to devices being bound, which makes it
possible to enable/disable devices and adjust more properties that might
be read before devices probe.
Subject should be EVT_OF_LIVE_BUILT
Neil
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/board.c | 1 -
arch/arm/mach-snapdragon/of_fixup.c | 25 -
arch/arm/mach-snapdragon/qcom-priv.h | 14 --
3 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index
deae4d323789eab75d5fe735159b4cd820c02c45..3ab75f0fce02ecffd476ebe2aa606b1a9024bbec
100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -305,9 +305,8 @@ void __weak qcom_board_init(void)
int board_init(void)
{
show_psci_version();
- qcom_of_fixup_nodes();
qcom_board_init();
return 0;
}
diff --git a/arch/arm/mach-snapdragon/of_fixup.c b/arch/arm/mach-snapdragon/of_fixup.c
index
1ea0c18c2f2789a8aa054cd95bb9e4308d6b3384..70399307bcbda1e067230f00af6ba859a98c7ac0
100644
--- a/arch/arm/mach-snapdragon/of_fixup.c
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -21,8 +21,9 @@
#include
#include
#include
+#include
#include
#include
#include
#include
@@ -31,9 +32,9 @@
* USB controllers. Rather than requiring source level DT changes, we fix up
* DT here. This improves compatibility with upstream DT and simplifies the
* porting process for new devices.
*/
-static int fixup_qcom_dwc3(struct device_node *glue_np)
+static int fixup_qcom_dwc3(struct device_node *root, struct device_node
*glue_np)
{
struct device_node *dwc3;
int ret, len, hsphy_idx = 1;
const __be32 *phandles;
@@ -100,11 +101,11 @@ static int fixup_qcom_dwc3(struct device_node *glue_np)
return 0;
}
-static void fixup_usb_nodes(void)
+static void fixup_usb_nodes(struct device_node *root)
{
- struct device_node *glue_np = NULL;
+ struct device_node *glue_np = root;
int ret;
while ((glue_np = of_find_compatible_node(glue_np, NULL, "qcom,dwc3"))) {
ret = fixup_qcom_dwc3(glue_np);
@@ -113,16 +114,16 @@ static void fixup_usb_nodes(void)
}
}
/* Remove all references to the rpmhpd device */
-static void fixup_power_domains(void)
+static void fixup_power_domains(struct device_node *root)
{
struct device_node *pd = NULL, *np = NULL;
struct property *prop;
const __be32 *val;
/* All Qualcomm platforms name the rpm(h)pd "power-controller" */
- for_each_of_allnodes(pd) {
+ for_each_of_allnodes_from(root, pd) {
if (pd->name && !strcmp("power-controller", pd->name))
break;
}
@@ -132,9 +133,9 @@ static void fixup_power_domains(void)
return;
}
/* Remove all references to the power domain controller */
- for_each_of_allnodes(np) {
+ for_each_of_allnodes_from(root, np) {
if (!(prop = of_find_property(np, "power-domains", NULL)))
continue;
val = prop->value;
@@ -149,14 +150,20 @@ static void fixup_power_domains(void)
func(__VA_ARGS__); \
debug(#func " took %lluus\n", timer_get_us() - start); \
} while (0)
-void qcom_of_fixup_nodes(void)
+static int qcom_of_fixup_nodes(void * __maybe_unused ctx, struct event *event)
{
- time_call(fixup_usb_nodes);
- time_call(fixup_power_domains);
+ struct device_node *root = event->data.of_live_built.root;
+
+ time_call(fixup_usb_nodes, root);
+ time_call(fixup_power_domains, root);
+
+ return 0;
}
+EVENT_SPY_FULL(EVT_OF_LIVE_BUILT, qcom_of_fixup_nodes);
+
int ft_board_setup(void *blob, struct bd_info __maybe_unused *bd)
{
struct fdt_header *fdt = blob;
int node;
diff --git a/arch/arm/mach-snapdragon/qcom-priv.h
b/arch/arm/mach-snapdragon/qcom-priv.h
index
74d39197b89f4e769299b06214c26ee829ecdce0..4f398e2ba374f27811afd2ccf6e72037d0f9ee7f
100644
--- a/arch/arm/mach-snapdragon/qcom-priv.h
+++ b/arch/arm/mach-snapdragon/qcom-priv.h
@@ -8,19 +8,5 @@ void qcom_configure_capsule_updates(void);
#else
void qcom_configure_capsule_updates(void) {}
#endif /* EFI_HAVE_CAPSULE_SUPPORT */
-#if CONFIG_IS_ENABLED(OF_LIVE)
-/**
- * qcom_of_fixup_nodes() - Fixup Qualcomm DT nodes
- *
- * Adjusts nodes in the live tree to improve compatibility with U-Boot.
- */
-void qcom_of_fixup_nodes(void);
-#else
-static inline void qcom_of_fixup_nodes(void)
-{
- log_debug("Unable to dynamically fixup USB nodes, please enable
CONFIG_OF_LIVE\n");
-}
-#endif /* OF_LIVE */
-
#endif /* __QCOM_PRIV_H__ */
Re: [PATCH v2 1/8] event: signal when livetree has been built
On 11/04/2025 14:47, Caleb Connolly wrote:
OF_LIVE offers a variety of benefits, one of them being that the live
tree can be modified without caring about the underlying FDT. This is
particularly valuable for working around U-Boot limitations like lacking
USB superspeed support on Qualcomm platforms, no runtime OTG, or
peripherals like the sdcard being broken (and displaying potentially
worrying error messages).
Add an event to signal when the live tree has been built so that we can
apply fixups to it directly before devices are bound.
Signed-off-by: Caleb Connolly
---
common/event.c | 3 +++
include/event.h | 18 ++
lib/of_live.c | 11 +++
3 files changed, 32 insertions(+)
diff --git a/common/event.c b/common/event.c
index
dda569d447851f559a83f98fb7b1f3543156eab5..8d7513eb10b61919e1e784481dfdcc076be14986
100644
--- a/common/event.c
+++ b/common/event.c
@@ -47,8 +47,11 @@ const char *const type_name[] = {
"ft_fixup",
/* main loop events */
"main_loop",
+
+ /* livetree has been built */
+ "of_live_init",
"of_live_built" ?
};
_Static_assert(ARRAY_SIZE(type_name) == EVT_COUNT, "event type_name size");
#endif
diff --git a/include/event.h b/include/event.h
index
75141a192a48b0931667632f41be8ff4d6139f7c..1d267f1d10547642d381fa287ab4981a2bf03543
100644
--- a/include/event.h
+++ b/include/event.h
@@ -152,8 +152,17 @@ enum event_t {
* A non-zero return value causes the boot to fail.
*/
EVT_MAIN_LOOP,
+ /**
+* @EVT_OF_LIVE_BUILT:
+* This event is triggered immediately after the live device tree has
been
+* built. This allows for machine specific fixups to be done to the
live tree
+* (like disabling known-unsupported devices) before it is used. This
+* event is only available if OF_LIVE is enabled and is only used after
relocation.
+*/
+ EVT_OF_LIVE_BUILT,
+
/**
* @EVT_COUNT:
* This constants holds the maximum event number + 1 and is used when
* looping over all event classes.
@@ -202,8 +211,17 @@ union event_data {
struct event_ft_fixup {
oftree tree;
struct bootm_headers *images;
} ft_fixup;
+
+ /**
+* struct event_of_live_built - livetree has been built
+*
+* @root: The root node of the live device tree
+*/
+ struct event_of_live_built {
+ struct device_node *root;
+ } of_live_built;
};
/**
* struct event - an event that can be sent and received
diff --git a/lib/of_live.c b/lib/of_live.c
index
90b9459ede313e492e28c8556c730f3bd8aaa9df..c1620616513c2e32448b4a6d156a9162d97c76b7
100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -10,8 +10,9 @@
#define LOG_CATEGORY LOGC_DT
#include
+#include
#include
#include
#include
#include
@@ -320,8 +321,9 @@ int unflatten_device_tree(const void *blob, struct
device_node **mynodes)
int of_live_build(const void *fdt_blob, struct device_node **rootp)
{
int ret;
+ union event_data evt;
debug("%s: start\n", __func__);
ret = unflatten_device_tree(fdt_blob, rootp);
if (ret) {
@@ -334,8 +336,17 @@ int of_live_build(const void *fdt_blob, struct device_node
**rootp)
return ret;
}
debug("%s: stop\n", __func__);
+ if (CONFIG_IS_ENABLED(EVENT)) {
+ evt.of_live_built.root = *rootp;
+ ret = event_notify(EVT_OF_LIVE_BUILT, &evt, sizeof(evt));
+ if (ret) {
+ log_debug("Failed to notify livetree build event:
err=%d\n", ret);
+ return ret;
+ }
+ }
+
return ret;
}
void of_live_free(struct device_node *root)
Re: [PATCH v2 5/8] mach-snapdragon: of_fixup: update comment
On 11/04/2025 14:47, Caleb Connolly wrote: we don't rewrite the volume buttons any more. Signed-off-by: Caleb Connolly --- arch/arm/mach-snapdragon/of_fixup.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-snapdragon/of_fixup.c b/arch/arm/mach-snapdragon/of_fixup.c index a5515c02d3de05944dfb7c1b2a5542631b517497..10053e48d88017d2179c96f2f3724c4d5dc4f3e2 100644 --- a/arch/arm/mach-snapdragon/of_fixup.c +++ b/arch/arm/mach-snapdragon/of_fixup.c @@ -3,10 +3,9 @@ * OF_LIVE devicetree fixup. * * This file implements runtime fixups for Qualcomm DT to improve * compatibility with U-Boot. This includes adjusting the USB nodes - * to only use USB high-speed, as well as remapping volume buttons - * to behave as up/down for navigating U-Boot. + * to only use USB high-speed. * * We use OF_LIVE for this rather than early FDT fixup for a couple * of reasons: it has a much nicer API, is most likely more efficient, * and our changes are only applied to U-Boot. This allows us to use a Reviewed-by: Neil Armstrong
Re: [PATCH v1 3/3] board: toradex: add Toradex SMARC iMX8MP
On Mon, Apr 7, 2025 at 10:04 AM Vitor Soares wrote: > +Output:: > + > +U-Boot SPL 2025.04-rc5-00023-g34c31be81211 (Apr 04 2025 - 15:36:23 +0100) CI reported an error because of the lack of indentation. I fixed it and applied the series; thanks.
Re: [PATCH v6 00/12] Add imx8mp video support
On Thu, Apr 3, 2025 at 4:39 AM Miquel Raynal wrote: > Changes in v6: > - Another rebase on next. > - Fixed the clock 24M oscillator clock name due to recent changes. > - Fixed a subject prefix. > - Collected tags. > - Fixed the CI by adding two missing configuration items to secondary > sandbox defconfigs. > - Link to v5: > https://lore.kernel.org/r/20250326-ge-mainline-display-support-v5-0-ea4bc3fc9...@bootlin.com Applied the series, thanks.
Re: [PATCH] toradex: apalis-imx6: Fix build failure when CONFIG_VIDEO_IPUV3 is enabled
On Fri, Mar 28, 2025 at 9:43 AM wrote:
>
> From: Rafael Beims
>
> If CONFIG_VIDEO_IPUV3 is enabled without also having CONFIG_IMX_HDMI
> enabled, the build fails for the Apalis iMX6 board.
>
> Fixes: 592f4aed6db7 ("arm: imx: initial support for apalis imx6")
> Signed-off-by: Rafael Beims
Applied, thanks.
Re: [PATCH 0/6] Update phyCORE-i.MX93 environment
On Thu, Apr 10, 2025 at 5:52 AM Primoz Fiser wrote: > > Update PHYTEC phyCORE-i.MX93 environment in mainline U-Boot with changes > from the downstream fork to get back in sync. > > Leonard Anderweit (1): > board: phycore-imx93: env: Move bootcmd from defconfig to env > > Martin Schwan (1): > board: phycore-imx93: env: Add common RAUC boot logic > > Primoz Fiser (4): > board: phycore-imx93: env: Move fdt and bootenv addresses > board: phycore-imx93: env: Add optargs to environment > board: phycore-imx93: env: Add prepare_mcore to environment > board: phycore-imx93: env: Add option to disable bootenv.txt import Applied the series, thanks.
Re: [PATCH v1] arm: mach-k3: am62px: Fix MCU_CLKOUT0 parent clock mux
On April 8, 2025 thus sayeth Parth Pancholi: > From: Parth Pancholi > > CU_CLKOUT0 can be driven by two input clocks: a 25 MHz and a 50 MHz source. > Currently, the 25 MHz option is not selectable due to an incorrect mux > configuration where the 50 MHz clock is duplicated in the parent list. > > This patch fixes the mux setup, allowing proper selection of the 25 MHz > clock source for MCU_CLKOUT0. > > Similar configuration is already correctly implemented in AM62 clock > data for 'hsdiv4_16fft_main_2_hsdivout1_clk10', where MCU_CLKOUT0 > parent switching behaves as expected. > > Link: > http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62px/clocks.html#clocks-for-board0-device > Signed-off-by: Parth Pancholi > --- Good catch! Reviewed-by: Bryan Brattlof ~Bryan
Re: [PATCH] usb: dwc3: gadget: Fix match_ep callback for NXP UUU tool
On Tue, Apr 08, 2025 at 04:51:22PM +0200, Marek Vasut wrote: > On 4/8/25 11:06 AM, Francesco Dolcini wrote: > > On Mon, Mar 24, 2025 at 03:36:52PM +0100, Marek Vasut wrote: > > > On 3/24/25 3:16 PM, Francesco Dolcini wrote: > > > > On Mon, Mar 24, 2025 at 02:53:23PM +0100, Marek Vasut wrote: > > > > > On 3/24/25 1:30 PM, Francesco Dolcini wrote: > > > > > > On Mon, Mar 24, 2025 at 09:26:03AM +0100, Mattijs Korpershoek wrote: > > > > > > > Hi Francesco, > > > > > > > > > > > > > > On lun., mars 24, 2025 at 09:03, Francesco Dolcini > > > > > > > wrote: > > > > > > > > > > > > > > > Hello Mattijs, Marek > > > > > > > > > > > > > > > > On Thu, Mar 20, 2025 at 10:47:02AM +0100, Mattijs Korpershoek > > > > > > > > wrote: > > > > > > > > > On mer., mars 19, 2025 at 23:07, Marek Vasut > > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > The UUU tool excepts the interrupt-in endpoint to be ep1in, > > > > > > > > > > otherwise > > > > > > > > > > it crashes. This is a result of the previous hard-coded EP > > > > > > > > > > setup in > > > > > > > > > > drivers/usb/gadget/epautoconf.c which did special-case EP > > > > > > > > > > allocation > > > > > > > > > > for SPL builds, and which was since converted to this > > > > > > > > > > callback, but > > > > > > > > > > without the special-case EP allocation in SPL part. > > > > > > > > > > > > > > > > > > > > This reinstates the SPL part in an isolated manner, only > > > > > > > > > > for NXP iMX > > > > > > > > > > SoCs, only for SPL builds, and only for the ep1in > > > > > > > > > > interrupt-in endpoint. > > > > > > > > > > > > > > > > UUU can (and in our case is) used also on non-NXP i.MX > > > > > > > > platforms. > > > > > > > > What should we do? > > > > > > > > > > > > > > Do reproduce the problem (UUU tool crashes) on those platforms > > > > > > > with > > > > > > > recent U-Boot versions (v2024.10+) ? > > > > > > > > > > > > Not tested, my comment is purely based on the code and the commit > > > > > > message. > > > > > > Older U-Boot versions (up to v2024.04, included) are working fine, > > > > > > with UUU used > > > > > > with TI K3 SoCs (AM69, AM62, AM62P). > > > > > Are you talking about the NXP UUU ? > > > > > > > > yes, it works just fine on not-NXP SoC. > > > Then please test if it still works, and if not, this patch needs to be > > > expanded to cover TI ... or apply unconditionally in SPL (sigh). > > > > I just found the time to check some logs from our CI in which we execute > > such a > > workflow. We do use UUU only from U-Boot proper, so we are not going to be > > affected by this SPL specific change. > > > > However I found this error in the logs, on both a TI AM62 and an i.MX8MP > > > > ``` > > Starting download of 40524455 bytes > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > .. > > .. > > .. > > .. > > . > > downloading of 40524455 bytes finished > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > Starting download of 1675 bytes > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > downloading of 1675 bytes finished > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > Starting download of 82 bytes > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > downloading of 82 bytes finished > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > dwc3-generic-peripheral usb@3100: request 99f219c0 was not > > queued to ep1in-bulk > > ``` > > > > the download is successful however, despite those error messages. Any idea? > > Is > > this related to this topic? > I have a feeling it is the UUU which should be fixed to not depend on the > ep1-in , really. > > You could however quickly try and apply the change in this patch not only to > SPL, but to U-Boot on your board as well, and see if those warnings > disappear. So, I did a quick test and the issue is still there. And looking better at the error now, this is about ep1in-bulk, that is not affected by this change at all. diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 477ecd020985..55b248505de5 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1632,23 +1632,7 @@ usb_ep *dwc3_gadget_match_ep(struct
[PULL] Please pull qcom-for-2025.07
Hi Tom, There's been a surprising amount of activity lately on the Qualcomm side with the two oldest boards getting some fresh attention and a lot of cleanup and polish going on across the board. * SDM660 gets USB phy fixes and a pinctrl driver * The recently added SA8775P/QCS9100 SoC gets a pinctrl driver * The Qualcomm pinctrl driver now handles reserved pins correctly, fixing crashes on some boards when running "gpio status -a" * OF_UPSTREAM_BUILD_VENDOR is enabled in qcom_defconfig * SDM845 and SC7280 get missing clocks added (since we're now stricter about those). This gets USB working more reliably in more cases. * DM_USB_GADGET is enabled for all boards using DWC3 and fasbtoot is enabled too * A bug in the livetree fixup code is fixed (making USB work on a lot more platforms) * Button label lookup is made case insensitive * bootretry becomes more dynamic, allowing it to be hijacked to make a "persistent" boot menu that allows dropping to U-Boot shell later on * A new qcom-phone.config fragment is added along with a phone-specific default environment and phone-specific debugging/bringup docs. These make U-Boot more usable on devices without a serial port or keyboard. * The db820c gets fixed up and updated documentation * The db410c also gets some love and modernisation as well as a new reviewer. * A new driver is added for the USB VBUS regulator found on various Qualcomm PMICs * The Qualcomm SPMI driver gets some fixes and cleanup for SPMI v5 and v7 support. CI pipeline: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/25653 --- The following changes since commit 8a2cf6307a2ccc09c39dde486b6d9375b78c82c2: CI: Disable evb-ast2600 (2025-04-09 18:34:08 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-snapdragon.git tags/qcom-for-2025.07 for you to fetch changes up to f3563fc30356c8079527b90e532407050dff7c7b: board: dragonboard410c: Update maintainers (2025-04-11 15:34:12 +0200) Qualcomm changes for v2025.07 Alexey Minnekhanov (2): phy: Add SDM660 support to Qualcomm QUSB2 phy drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver Caleb Connolly (15): qcom_defconfig: enable OF_UPSTREAM_BUILD_VENDOR clk/stub: add sdm845 rpmh clock clk/qcom: sdm845: add GCC_AGGRE_UFS_PHY_AXI_CLK mach-snapdragon: enable DM_USB_GADGET by default qcom_defconfig: enable fastboot clk/qcom: sc7280: add missing UFS and MMC clocks mach-snapdragon: of_fixup: fix condition check in ft_board_setup() hmibsc_defconfig: disable DM_USB_GADGET board/qualcomm: introduce phone config cli_hush: support running bootcmd on boot retry bootretry: check for bootretry variable changes doc: board/qualcomm: describe phone support and bringup button: qcom-pmic: prettify and standardise button labels button: make button_get_by_label() case insensitive pinctrl: qcom: handle reserved ranges Jorge Ramirez-Ortiz (5): board: qualcomm: dragonboard820c: update readme clk/qcom: apq8096: fix set rate for the uart clock clk/qcom: apq8096: fix the sdhci clock clk: stub: add qcom,glink-smd-rpm configs: dragonboard820: updates Neil Armstrong (6): spmi: msm: use real number of channels for v5 & v7 spmi: msm: factor out channel mapping for v5 & v7 spmi: msm: introduce SPMI_CHANNEL_VALID flag spmi: msm: correctly handle multiple mapping entries gpio: msm: fix get_function return for special pins gpio: msm: return correct value return for special output pins Rui Miguel Silva (2): mach-snapdragon: of_fixup: fix property length at writing power: regulator: add qcom-usb-vbus Sam Day (1): clk/qcom: sdm845: add missing USB3 clocks Stephan Gerhold (13): mach-snapdragon: Fix EL2 boot on DragonBoard 410c board: dragonboard410c: Fix RAM size board: dragonboard410c: Fix BD address board: dragonboard410c: Drop UNSTUFF_BITS() macro board: dragonboard410c: Drop reflash functionality board: dragonboard410c: Drop unused linux_image board: dragonboard410c: Use dynamically allocated load addresses board: dragonboard410c: Fix counter frequency board: dragonboard410c: Enable RTL8152 ethernet board: dragonboard410c: Use BOOTSTD instead of DISTRO_DEFAULTS board: dragonboard410c: Enable support for Android boot images board: dragonboard410c: Use button_cmd instead of custom code board: dragonboard410c: Update maintainers Sumit Garg (2): qcom_defconfig: Disable MMC HS200 mode support phy: phy-qcom-qusb2: Fix USB PHY power on sequence Varadarajan Narayanan (3): regulator: qcom-rpmh-regulator: add support for pmm8654 regulators pinctrl: qcom: add driver for SA8775P SoC
Re: [PATCH 2/4] mach-snapdragon: CapsuleUpdate: support all boot methods
Hi Neil, The logic is complex but looks to be good. What would happen if we plug an eMMC with conflicting partitions names ? That would cause issues... Probably the more correct way to do things here would be to use part UUIDs, but it's not clear how consistent those are. Is there a way to get the boot media from xBL ? In the chainloaded case we could i think map some DT path from the kernel cmdline to the boot device, but I think just checking that if we have SCSI then the partition we find MUST be on a SCSI device would be enough. In the non-chainloaded case, we actually do get handed a pointer to a shared data structure from sbl1 which has all kinds of goodies in but the whole thing is proprietary :( Anyway, with the typo fix: Ack, seems like the 'z' is how U-Boot tends to do it, though it pains me so :P Reviewed-by: Neil Armstrong Thanks> Neil -- Caleb (they/them)
Re: [PATCH v2 1/2] image-fit-sig: skip in tools build if key is missing
On Sat, 29 Mar 2025 23:23:51 +, Daniel Golle wrote: > Skip signature verification in case no public key was given in order to > allow using fit_check_sign also to validate uImage.FIT images without > signatures. Guarded by USE_HOSTCC macro the behavior on target is > unchanged. > > Applied to u-boot/master, thanks! [1/2] image-fit-sig: skip in tools build if key is missing commit: 40dcd5088b7f64ee2841c233c8ab82ce9c188d73 [2/2] tools/fit_check_sign: make key optional commit: 9c79c8fe70da7cd05fa4c242197f14122f245d81 -- Tom
Re: [PATCH V2] firmware: ti_sci: Scan all device instances when releasing exclusive devices
On 4/11/2025 4:53 PM, Nishanth Menon wrote: On 11:04-20250411, Kumar, Udit wrote: Hi Nishanth, Sorry for basic question On 4/7/2025 5:45 PM, Nishanth Menon wrote: [..] This creates a problem when Device Manager(DM) firmware starts up later on in the boot process and identifies that this instance of i2c is Do we need to do clean up, where DM is loaded as different binary . As I understand this cleanup is needed, where DM is running along with SPL/R5 or I am missing something The cleanup makes sense whether we use split or unified DM. The Its good to do clean up. But IMO, problem you described mainly will be seen in unified DM case. resources R5SPL uses may or may not be used further down the chain of software (eeprom was an example where we read and cache the data for further downstream steps to use). We should never be leaving a messy system behind (and consequences as a result). This is the reason we cleanup the exclusively held devices during the boot phase before remote cores are started up. We already do this cleanup. which is good, the trouble with multi-DTB FIT image is that the cleanup is partial, which is what this patch attempts to solve. Anyway, patch LTGM irrespective of DM type Thanks
Re: [PATCH v2 1/2] dm: blk: Add 'erase' generic block device commands
On Tue, 01 Apr 2025 15:39:58 +0530, Varadarajan Narayanan wrote: > Add support for doing 'erase' using the generic block commands > framework. > > Applied to u-boot/master, thanks! [1/2] dm: blk: Add 'erase' generic block device commands commit: 6a5177a58cd481792a652bc7b5c34ed5e76381e0 [2/2] drivers: scsi: Add 'erase' support commit: 7dd49a9264a6de349343a873e465e1a5fcd459e3 -- Tom
Re: [PATCH v2] configs: set SPL_TEXT_BASE by default for k3 platforms
On Thu, Apr 10, 2025 at 07:23:59PM +0530, Anshul Dalal wrote: > SPL_TEXT_BASE is used as the load address for the main domain SPL on k3 > platforms. > > Since the config value is the same for every board, this patch sets the > value 0x8008 as default for all 64-bit ARCH_K3, 0x43c0 as > default for the R5 cores and deletes the instances of SPL_TEXT_BASE in > individual defconfigs. > > Signed-off-by: Anshul Dalal Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [PATCH] armv8: start.S: Subordinate CPUs psci setup vector
On Wed, 26 Mar 2025 09:44:12 +0800, Xu Zhang wrote: > As current design, only Manager CPU called armv8_setup_psci() before > jump to next stage(such as Linux Kernel), Subordinate CPUs also need > setup psci vector to handle trap request which comes from higher EL > level. > > Applied to u-boot/master, thanks! [1/1] armv8: start.S: Subordinate CPUs psci setup vector commit: 7c9f8680c16e7a0e1d2afc6c2542e2555eb6bb3c -- Tom
Re: [PATCH] bootm: Support load images when os is elf
On Tue, Apr 01, 2025 at 07:44:34AM +, ţ ־�� wrote: > This extends the bootm command to allow find images when os type is elf. > > Signed-off-by: Niu Zhihong Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [resend v3 00/12] Add Synopsys MIPI I3C Driver support
On Fri, Apr 11, 2025 at 07:00:16AM +, Maniyam, Dinesh wrote: > > > > -Original Message- > > From: Tom Rini > > Sent: Tuesday, 8 April 2025 10:27 pm > > To: Maniyam, Dinesh > > Cc: u-boot@lists.denx.de; Marek ; Simon > > ; Simon Glass ; Dario > > Binacchi ; Ilias Apalodimas > > ; Heinrich Schuchardt ; > > Jerome Forissier ; Mattijs Korpershoek > > ; Ibai Erkiaga ; > > Michal Simek ; Dmitry Rokosov > > ; Jonas Karlman ; Sebastian > > Reichel ; Meng, Tingting > > ; Chee, Tien Fong ; > > Hea, Kok Kiang ; Ng, Boon Khai > > ; Yuslaimi, Alif Zakuan > > ; Zamri, Muhammad Hazim Izzat > > ; Lim, Jit Loon > > ; Tang, Sieu Mun > > Subject: Re: [resend v3 00/12] Add Synopsys MIPI I3C Driver support > > > > On Tue, Apr 08, 2025 at 08:14:46AM +, Maniyam, Dinesh wrote: > > > > > Hi Tom Rini, > > > > > > > -Original Message- > > > > From: Maniyam, Dinesh > > > > Sent: Monday, 24 March 2025 4:40 pm > > > > To: u-boot@lists.denx.de > > > > Cc: Marek ; Simon ; > > > > Simon Glass ; Tom Rini ; Dario > > > > Binacchi ; Ilias Apalodimas > > > > ; Heinrich Schuchardt > > > > ; Jerome Forissier > > > > ; Mattijs Korpershoek > > > > ; Ibai Erkiaga > > > > ; Michal Simek ; > > > > Dmitry Rokosov ; Jonas Karlman > > > > ; Sebastian Reichel > > > > ; Meng, Tingting > > > > ; Chee, Tien Fong > > > > ; Hea, Kok Kiang > > > > ; Maniyam, Dinesh > > > > ; Ng, Boon Khai > > > > ; Yuslaimi, Alif Zakuan > > > > ; Zamri, Muhammad Hazim Izzat > > > > ; Lim, Jit Loon > > > > ; Tang, Sieu Mun > > > > Subject: [resend v3 00/12] Add Synopsys MIPI I3C Driver support > > > > > > > > From: Dinesh Maniyam > > > > > > > > This patchset add Synopsys MIPI I3C Driver support for Intel Agilex5 > > > > devices. > > > > > > > > The i3c driver is leveraged from the master/dw-i3c-master.c, > > > > i3c/device.c and i3c/master.c Linux version 6.6.37 LTS And few > > > > header files included to be part of the migration; i3c/internals.h, > > > > include/linux/i3c/ccc.h, include/linux/i3c/device.h and > > include/linux/i3c/master.h. > > > > Additional i3c uclass driver and command files added to support i3c > > > > read and write in U-Boot. > > > > > > > > Patch status: > > > > > > > > Detail changelog can find in commit message. > > > > > > > > v3->v2: > > > > > > > > - Squash commit 10 to commit 9 > > > > - Resolve index for new files to pass the checkpatch > > > > > > > > Commit: sandbox_defconfig: Enable configs for sandbox i3c > > > > Commit: agilex5_defconfig: Enable i3c configs for agilex5 > > > > - use savedefconfig > > > > > > > > drivers: Enabled Kconfig and Makefile for i3c support > > > > - Add maintainer for i3c > > > > > > > > drivers: i3c: Enabled Kconfig and Makefile for DWI3C > > > > - Add empty lines for if/endif > > > > > > > > drivers: i3c: Add i3c sandbox simple test. > > > > - Removed DECLARE_GLOBAL_DATA_PTR > > > > > > > > v1->v2: > > > > > > > > Reorder commits. > > > > > > > > Added commits: > > > > - drivers: i3c: Add i3c sandbox simple test. > > > > - test: cmd: Add simple test for i3c > > > > - configs: sandbox_defconfig: Enable configs for sandbox i3c > > > > - configs: agilex5_defconfig: Enable i3c configs for agilex5 > > > > > > > > History: > > > > > > > > [v1]: > > > > https://patchwork.ozlabs.org/project/uboot/cover/20250218025705.5005 > > > > 1-1- > > > > dinesh.mani...@intel.com/ > > > > [v2]: > > > > https://patchwork.ozlabs.org/project/uboot/cover/20250314040902.4362 > > > > 1-1- > > > > dinesh.mani...@altera.com/ > > > > > > > > Dinesh Maniyam (12): > > > > drivers: i3c: Add new i3c uclass id > > > > drivers: i3c: Add driver for MIPI DWI3C > > > > drivers: i3c: Add i3c uclass driver. > > > > drivers: Enabled Kconfig and Makefile for i3c support > > > > drivers: i3c: Enabled Kconfig and Makefile for DWI3C > > > > drivers: i3c: Add i3c sandbox simple test. > > > > drivers: i3c: master: Enable probe i3c without slave device > > > > i3c: master: dw-i3c-master: Fix OD_TIMING for spike filter > > > > cmd: Add i3c command support. > > > > test: cmd: Add simple test for i3c > > > > configs: sandbox_defconfig: Enable configs for sandbox i3c > > > > configs: agilex5_defconfig: Enable i3c configs for agilex5 > > > > > > > > MAINTAINERS|7 + > > > > arch/sandbox/dts/test.dts |8 + > > > > cmd/Kconfig|6 + > > > > cmd/Makefile |1 + > > > > cmd/i3c.c | 193 +++ > > > > configs/sandbox_defconfig |4 + > > > > configs/socfpga_agilex5_defconfig |3 + > > > > doc/usage/cmd/i3c.rst | 98 ++ > > > > drivers/Kconfig|2 + > > > > drivers/Makefile |1 + > > > > drivers/i3c/Kconfig| 27 + > > > > drivers/i3c/Makefile |5 + > > > > drivers/i3c/device.c | 262 > > > > drivers/i3c/i3c-uclass.c | 38 + > > >
[PATCH 0/2] ARM: meson: finally switch to livetree
Never late than never, finally try to land Beniamino's "pinctrl: meson: convert to livetree" from 2017 to finally be a modern platform with OF_LIVE ! Signed-off-by: Neil Armstrong --- Beniamino Galvani (1): pinctrl: meson: convert to livetree Neil Armstrong (1): ARM: mach-meson: use livetree by default arch/arm/mach-meson/Kconfig | 1 + drivers/pinctrl/meson/pinctrl-meson.c | 73 +++ 2 files changed, 40 insertions(+), 34 deletions(-) --- base-commit: f892a7f397a66d8d09f418d1e0e06dfb48bac27d change-id: 20250411-u-boot-meson-livetree-8fd1b0a18066 Best regards, -- Neil Armstrong
Re: [PATCH] Dockerfile: Update to gcc-14.2.0 and clang-18
On Fri, Apr 11, 2025 at 09:36:16AM +0200, Heinrich Schuchardt wrote:
> On 1/29/25 00:02, Tom Rini wrote:
> > Outside of changing versions here the other visible change is that we
> > tell grub that riscv64 does not have "large model" support. Without this
> > change the resulting mkimage is non-functional. This is known upstream
> > already.
> >
> > Link: https://savannah.gnu.org/bugs/?65909
> > Signed-off-by: Tom Rini
> > ---
> > .azure-pipelines.yml| 8
> > .gitlab-ci.yml | 6 +++---
> > tools/docker/Dockerfile | 8
> > 3 files changed, 11 insertions(+), 11 deletions(-)
> >
> > diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
> > index ba351b9802d1..4d3a5800beb3 100644
> > --- a/.azure-pipelines.yml
> > +++ b/.azure-pipelines.yml
> > @@ -2,7 +2,7 @@ variables:
> > windows_vm: windows-2022
> > ubuntu_vm: ubuntu-24.04
> > macos_vm: macOS-14
> > - ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20240911.1-08Dec2024
> > + ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20240911.1-28Jan2025
> > # Add '-u 0' options for Azure pipelines, otherwise we get "permission
> > # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
> > # since our $(ci_runner_image) user is not root.
> > @@ -324,16 +324,16 @@ stages:
> > TEST_PY_TEST_SPEC: "version"
> > sandbox_clang:
> > TEST_PY_BD: "sandbox"
> > - OVERRIDE: "-O clang-17"
> > + OVERRIDE: "-O clang-18"
> > sandbox_clang_asan:
> > TEST_PY_BD: "sandbox"
> > - OVERRIDE: "-O clang-17 -a ASAN"
> > + OVERRIDE: "-O clang-18 -a ASAN"
> > TEST_PY_TEST_SPEC: "version"
> > sandbox64:
> > TEST_PY_BD: "sandbox64"
> > sandbox64_clang:
> > TEST_PY_BD: "sandbox64"
> > - OVERRIDE: "-O clang-17"
> > + OVERRIDE: "-O clang-18"
> > sandbox_spl:
> > TEST_PY_BD: "sandbox_spl"
> > TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl"
> > diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> > index 74dc05d58a70..c3c38e24fd1d 100644
> > --- a/.gitlab-ci.yml
> > +++ b/.gitlab-ci.yml
> > @@ -20,7 +20,7 @@ workflow:
> >
> > # Grab our configured image. The source for this is found
> > # in the u-boot tree at tools/docker/Dockerfile
> > -image:
> > ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20240911.1-08Dec2024
> > +image:
> > ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20240911.1-28Jan2025
> >
> > # We run some tests in different order, to catch some failures quicker.
> > stages:
> > @@ -241,7 +241,7 @@ sandbox with clang test.py:
> > - ${DEFAULT_AMD64_TAG}
> > variables:
> > TEST_PY_BD: "sandbox"
> > -OVERRIDE: "-O clang-17"
> > +OVERRIDE: "-O clang-18"
> > <<: *buildman_and_testpy_dfn
> >
> > sandbox64 test.py:
> > @@ -256,7 +256,7 @@ sandbox64 with clang test.py:
> > - ${DEFAULT_AMD64_TAG}
> > variables:
> > TEST_PY_BD: "sandbox64"
> > -OVERRIDE: "-O clang-17"
> > +OVERRIDE: "-O clang-18"
> > <<: *buildman_and_testpy_dfn
> >
> > sandbox_spl test.py:
> > diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile
> > index d2848ab85f35..b72ed357fa36 100644
> > --- a/tools/docker/Dockerfile
> > +++ b/tools/docker/Dockerfile
> > @@ -23,7 +23,7 @@ ENV ARCHS="aarch64 arc i386 m68k mips microblaze nios2
> > powerpc riscv64 riscv32 s
> > ENV MIRROR=https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin
> >
> > # Toolchain version
> > -ENV TCVER=13.2.0
> > +ENV TCVER=14.2.0
> >
> > RUN echo "Building on $BUILDPLATFORM, for target $TARGETPLATFORM"
> >
> > @@ -32,7 +32,7 @@ RUN
> > --mount=type=cache,target=/var/cache/apt,sharing=locked \
> > --mount=type=cache,target=/var/lib/apt,sharing=locked \
> > apt-get update && apt-get install -y gnupg2 wget xz-utils
> > RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add -
> > -RUN echo deb http://apt.llvm.org/jammy/ llvm-toolchain-jammy-17 main | tee
> > /etc/apt/sources.list.d/llvm.list
> > +RUN echo deb http://apt.llvm.org/jammy/ llvm-toolchain-jammy-18 main | tee
> > /etc/apt/sources.list.d/llvm.list
> >
> > # Create a list of URLs to process, then pass them into a 'while read'
> > loop
> > RUN if [ "$TARGETPLATFORM" = "linux/amd64" ]; then HOSTARCH=x86_64; else
> > HOSTARCH=arm64; fi; ( \
> > @@ -65,7 +65,7 @@ RUN
> > --mount=type=cache,target=/var/cache/apt,sharing=locked \
> > bison \
> > build-essential \
> > cgpt \
> > - clang-17 \
> > + clang-18 \
> > coreutils \
> > cpio \
> > curl \
> > @@ -182,7 +182,7 @@ RUN git clone git://git.savannah.gnu.org/grub.git
> > /tmp/grub && \
> > search search_fs_file search_fs_uuid search_label serial sleep test \
> > true && \
> > make clean && \
> > - ./configure --target=riscv64 --with-platform=efi \
> > + grub_cv_c
Re: Gitlab runner timeout on evb-ast2600 ?
On Fri, Apr 11, 2025 at 09:23:59AM +0200, Cédric Le Goater wrote:
> Hi,
>
> On 4/11/25 01:14, Tom Rini wrote:
> > On Fri, Apr 11, 2025 at 08:07:15AM +0930, Joel Stanley wrote:
> > > On Mon, 7 Apr 2025 at 23:25, Eugen Hristev
> > > wrote:
> > > >
> > > > Hi everyone,
> > > >
> > > > I keep getting an error on running the CI loop on -next on my tree :
> > > >
> > > > https://source.denx.de/u-boot/custodians/u-boot-at91/-/jobs/1090517
> > >
> > > Thanks for the report.
> > >
> > > >
> > > > ! _pytest.outcomes.Exit: Lab timeout: Marking connection bad - no other
> > > > tests will run !
> > > >
> > > > Any clue ? It's been like this for few days. It doesn't look like a
> > > > faulty patch.
> > >
> > > I can't see that link you sent me, it 403s.
> > >
> > > Do you have any other traces or information to share?
> >
> > It's been intermittent recently. I was able to put qemu + gdb together
> > and see it's one of the early initcalls that fails and hang()s but
> > didn't see why. You should be able to use commit 1f0281294d8b ("Merge
> > patch series "Annotate switch/case fallthrough cases"") as a starting
> > point of failure.
> >
>
> Do you have logs ?
>
> Things look ok from the QEMU side (latest 10.0.0-rc and 9.1) :
> uboot_build=/path/to/u-boot/
> flashsize=65536
> flash=./flash-ast2600-evb-uboot
> dd of=$flash bs=1K if=/dev/zero count=$flashsize
> dd of=$flash conv=notrunc bs=1K if=$uboot_build/spl/u-boot-spl.bin
> dd of=$flash conv=notrunc bs=1K if=$uboot_build/u-boot.img seek=64
> $ qemu-system-arm -M ast2600-evb -net nic,netdev=net0 -netdev
> user,id=net0 -nographic -snapshot -serial mon:stdio -drive
> file=flash-ast2600-evb-uboot,format=raw,if=mtd
> qemu-system-arm: warning: nic ftgmac100.1 has no peer
> qemu-system-arm: warning: nic ftgmac100.2 has no peer
> qemu-system-arm: warning: nic ftgmac100.3 has no peer
> U-Boot SPL 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 09:08:40 +0200)
> Trying to boot from RAM
> ## Checking hash(es) for config conf-1 ... OK
> ## Checking hash(es) for Image firmware-1 ... crc32+ OK
> ## Checking hash(es) for Image fdt-1 ... crc32+ OK
> U-Boot 2025.04-00921-gcb7555e93075 (Apr 11 2025 - 09:08:40 +0200)
Please note that it's inconsistent about what commit fails. I would
expect 1f0281294d8b in U-Boot to fail but I don't know about
cb7555e93075.
Also can you please check QEMU v8.2.0? That's what we're on, and I can
try and test 9.1.3 or 10.0.0-rc and see if it's a QEMU problem instead.
Thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] x86: efi_loader: Ensure the SMBIOS tables are sent via EFI
On 11.04.25 12:04, Ilias Apalodimas wrote:
Hi Simon
On Sat, 5 Apr 2025 at 23:46, Simon Glass wrote:
The EFI-loader code has not been fully converted to use bloblist, so
relies on the SMBIOS-table address being set in global_data.
Can you explain a bit more what this means? The SMBIOS tables for EFI
are supposed to be on EFI allocated memory
Set this up in write_tables() so that the SMBIOS tables are actually
available.
Enable the command for x86 QEMU so that the SMBIOS tests actually run.
Signed-off-by: Simon Glass
Fixes: 83ce35d6ebb ("emulation: Use bloblist to hold tables")
Reported-by: Niklas Sombert
---
arch/x86/lib/tables.c| 2 ++
board/emulation/qemu-x86/Kconfig | 1 +
lib/efi_loader/efi_smbios.c | 1 +
3 files changed, 4 insertions(+)
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index ec52992209f..d7f183f95dc 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -126,6 +126,8 @@ int write_tables(void)
use_high = true;
if (!gd->arch.table_start_high)
gd->arch.table_start_high = rom_addr;
+ if (table->tag == BLOBLISTT_SMBIOS_TABLES)
+ gd_set_smbios_start(rom_addr);
}
rom_table_end = table->write(rom_addr);
if (!rom_table_end) {
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
index b2a4e0891a4..c1564fba7cd 100644
--- a/board/emulation/qemu-x86/Kconfig
+++ b/board/emulation/qemu-x86/Kconfig
@@ -23,5 +23,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
imply VIRTIO_PCI
imply VIRTIO_NET
imply VIRTIO_BLK
+ imply CMD_SMBIOS
endif
diff --git a/lib/efi_loader/efi_smbios.c b/lib/efi_loader/efi_smbios.c
index 8d2ef6deb51..5275e966dfe 100644
--- a/lib/efi_loader/efi_smbios.c
+++ b/lib/efi_loader/efi_smbios.c
@@ -35,6 +35,7 @@ efi_status_t efi_smbios_register(void)
void *buf;
addr = gd_smbios_start();
+ printf("register %lx\n", addr);
User will not know what "register" relates to.
log_debug() with a meaningful message in the else branch of the if
statement below would be acceptable.
Best regards
Heinrich
I don't think this print is useful at all, why isn't the log_err()
right below enough?
if (!addr) {
log_err("No SMBIOS tables to install\n");
return EFI_NOT_FOUND;
--
2.43.0
Thanks
/Ilias
[PATCH v2 0/4] Qualcomm: expand capsule update support
The initial capsule update support only worked on the RB3 Gen 2 and made a lot of assumptions specific to that board. Implement the logic necessary to update U-Boot no matter where it was flashed to, independent of any particular board. First, we keep track of how U-Boot was loaded, specifically if we had a valid external FDT (even if we didn't use it) this indicates that we were booted via the Android bootloader, in this case the target for capsule updates is the boot partition. Otherwise, we target the uefi partition (if it exists) or the xbl partition. We handle A/B support for all 3 (currently we always flash to the currently active partition with a minor exception for the uefi partition). We introduce two new fw_name strings to differentiate the GUIDs based on the target partition, this means one board can support multiple boot methods with capsule update support for all of them (typically this would be chainloading OR flashing U-Boot to XBL). Lastly, the call to scsi_scan() in dfu_scsi.c is removed. Since scsi_scan() unbinds all scsi devices it breaks device handles maintained in the EFI layer for the duration of the capsule update process and causes the EFI filesystem access to delete the capsule file after the update to fail. Boards should instead be responsible for calling scsi_scan() before initiating DFU. --- Changes in v2: - Restrict the partition hunt to either UFS storage or the first MMC device so that we never accidentally write to some external storage (like an sdcard) during a capsule update. - Fix typo - Link to v1: https://lore.kernel.org/r/20250326-b4-qcom-capsule-update-improvements-v1-0-afe2e3696...@linaro.org --- Caleb Connolly (4): mach-snapdragon: track boot source mach-snapdragon: CapsuleUpdate: support all boot methods dfu: scsi: don't call scsi_scan() qcom_defconfig: enable capsule update support arch/arm/mach-snapdragon/board.c | 26 +++ arch/arm/mach-snapdragon/capsule_update.c | 274 -- arch/arm/mach-snapdragon/qcom-priv.h | 14 ++ configs/qcm6490_defconfig | 6 - configs/qcom_defconfig| 3 + drivers/dfu/dfu_scsi.c| 5 - 6 files changed, 266 insertions(+), 62 deletions(-) --- base-commit: 885d68280c29b8011731b6a7cdac32b8d9a4e6fd change-id: 20250326-b4-qcom-capsule-update-improvements-16ff7bc2d1d2 Caleb Connolly
[PATCH v2 4/4] qcom_defconfig: enable capsule update support
We can now correctly identify which partition U-Boot is flashed to between uefi, xbl, and boot (including A/B support) so enable capsule update support for all boards. Reviewed-by: Ilias Apalodimas Signed-off-by: Caleb Connolly --- configs/qcm6490_defconfig | 6 -- configs/qcom_defconfig| 3 +++ 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/configs/qcm6490_defconfig b/configs/qcm6490_defconfig index ba26924da161b1c4b5378955185f314b05cb1006..5ddc5ab3ef8cfe8f9cc09eb573c1a8130b394b43 100644 --- a/configs/qcm6490_defconfig +++ b/configs/qcm6490_defconfig @@ -18,10 +18,4 @@ CONFIG_DEBUG_UART_CLOCK=14745600 CONFIG_TEXT_BASE=0x9fc0 CONFIG_REMAKE_ELF=y CONFIG_DEFAULT_DEVICE_TREE="qcom/qcs6490-rb3gen2" - -# Enable capsule updates -CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y -CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_IGNORE_OSINDICATIONS=y -CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 537806450dc4a61d3c617cdd2b0cfb8eab1c343c..36e2f45d22aeec6d8c4d904d22bfc466ca1f5b0d 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -5,8 +5,11 @@ CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 CONFIG_ARCH_SNAPDRAGON=y CONFIG_NR_DRAM_BANKS=24 CONFIG_DEFAULT_DEVICE_TREE="qcom/sdm845-db845c" CONFIG_SYS_LOAD_ADDR=0xA000 +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y CONFIG_BUTTON_CMD=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTSTD_FULL=y -- 2.49.0
[PATCH v2 2/4] mach-snapdragon: CapsuleUpdate: support all boot methods
Expand capsule update support to correctly identify which partition
U-Boot is flashed to (between xbl, uefi, and boot including A/B
variants).
Use qcom_boot_source to determine if we were chainloaded from ABL,
meaning U-Boot is on the boot partition, otherwise we assume uefi if
it's available, finally leaving the xbl partition.
Set a different fw_name based on the target partition to prevent GUID
collisions, since a board may support U-Boot flashed to boot or XBL we
need to differentiate them since the U-Boot binary must be built
differently.
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/capsule_update.c | 274 --
1 file changed, 223 insertions(+), 51 deletions(-)
diff --git a/arch/arm/mach-snapdragon/capsule_update.c
b/arch/arm/mach-snapdragon/capsule_update.c
index
bf75a9a1b24c714792bae3712b83b96353b1df8f..4dced4961b684be198d8f9b5e30d2264871ea163
100644
--- a/arch/arm/mach-snapdragon/capsule_update.c
+++ b/arch/arm/mach-snapdragon/capsule_update.c
@@ -19,24 +19,21 @@
#include "qcom-priv.h"
/*
- * NOTE: for now this implementation only supports the rb3gen2. Supporting
other
- * boards that boot in different ways (e.g. chainloaded from ABL) will require
- * additional complexity to properly create the dfu string and fw_images array.
- */
-
-/*
- * To handle different variants like chainloaded U-Boot here we'll need to
- * build the fw_images array dynamically at runtime. It looks like
- * mach-rockchip is a good example for how to do this.
- * Detecting which image types a board uses is TBD, hence for now we only
- * support the one new board that runs U-Boot as its primary bootloader.
+ * To handle different variants like chainloaded U-Boot here we need to
+ * build the fw_images array dynamically at runtime. These are the possible
+ * implementations:
+ *
+ * - Devices with U-Boot on the uefi_a/b partition
+ * - Devices with U-Boot on the boot (a/b) partition
+ * - Devices with U-Boot on the xbl (a/b) partition
+ *
+ * Which partition actually has U-Boot on it is determined based on the
+ * qcom_boot_source variable and additional logic in find_target_partition().
*/
struct efi_fw_image fw_images[] = {
{
- /* U-Boot flashed to the uefi_X partition (e.g. rb3gen2) */
- .fw_name = u"UBOOT_UEFI_PARTITION",
.image_index = 1,
},
};
@@ -46,8 +43,14 @@ struct efi_capsule_update_info update_info = {
.num_images = ARRAY_SIZE(fw_images),
.images = fw_images,
};
+enum target_part_type {
+ TARGET_PART_UEFI = 1,
+ TARGET_PART_XBL,
+ TARGET_PART_BOOT,
+};
+
/* LSB first */
struct part_slot_status {
u16: 2;
u16 active : 1;
@@ -56,37 +59,204 @@ struct part_slot_status {
u16 unbootable : 1;
u16 tries_remaining : 4;
};
-static int find_boot_partition(const char *partname, struct blk_desc *blk_dev,
char *name)
+enum ab_slot {
+ SLOT_NONE,
+ SLOT_A,
+ SLOT_B,
+};
+
+static enum ab_slot get_part_slot(const char *partname)
+{
+ int len = strlen(partname);
+
+ if (partname[len - 2] != '_')
+ return SLOT_NONE;
+ if (partname[len - 1] == 'a')
+ return SLOT_A;
+ if (partname[len - 1] == 'b')
+ return SLOT_B;
+
+ return SLOT_NONE;
+}
+
+/*
+ * Determine which partition U-Boot is flashed to based on the boot source
(ABL/XBL),
+ * the slot status, and prioritizing the uefi partition over xbl if found.
+ */
+static int find_target_partition(int *devnum, enum uclass_id *uclass,
+enum target_part_type *target_part_type)
{
int ret;
- int partnum;
+ int partnum, uefi_partnum = -1, xbl_partnum = -1;
struct disk_partition info;
struct part_slot_status *slot_status;
+ struct udevice *dev = NULL;
+ struct blk_desc *desc = NULL, *xbl_desc = NULL;
+ uchar ptn_name[32] = { 0 };
+ bool have_ufs = false;
- for (partnum = 1;; partnum++) {
- ret = part_get_info(blk_dev, partnum, &info);
- if (ret)
- return ret;
+ /*
+* Check to see if we have UFS storage, if so U-Boot MUST be on it and
we can skip
+* all non-UFS block devices
+*/
+ uclass_foreach_dev_probe(UCLASS_UFS, dev) {
+ have_ufs = true;
+ break;
+ }
- slot_status = (struct part_slot_status *)&info.type_flags;
- log_io("%16s: Active: %1d, Successful: %1d, Unbootable: %1d,
Tries left: %1d\n",
- info.name, slot_status->active,
- slot_status->successful, slot_status->unbootable,
- slot_status->tries_remaining);
+ uclass_foreach_dev_probe(UCLASS_BLK, dev) {
+ if (device_get_uclass_id(dev) != UCLASS_BLK)
+ continue;
+
+ /
[PATCH v2 3/4] dfu: scsi: don't call scsi_scan()
Calling scsi_scan() results in all the block devices (and EFI block
devices) being destroyed and re-created. This breaks the EFI filesystem
drivers during capsule update.
Remove the call, since boards really should be calling scsi_scan()
themselves during board_init().
Reviewed-by: Ilias Apalodimas
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
drivers/dfu/dfu_scsi.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/dfu/dfu_scsi.c b/drivers/dfu/dfu_scsi.c
index
9f95194784c1de00458843276872b1d23d023444..a234548ae46dc2a6ae1ca5770accb58f43782239
100644
--- a/drivers/dfu/dfu_scsi.c
+++ b/drivers/dfu/dfu_scsi.c
@@ -341,13 +341,8 @@ int dfu_fill_entity_scsi(struct dfu_entity *dfu, char
*devstr, char **argv, int
if (*s)
return -EINVAL;
}
- if (scsi_scan(false)) {
- pr_err("Couldn't init scsi device.\n");
- return -ENODEV;
- }
-
ret = find_scsi_device(dfu->data.scsi.lun, &scsi);
if (ret < 0) {
pr_err("Couldn't find scsi device no. %d.\n",
dfu->data.scsi.lun);
return -ENODEV;
--
2.49.0
[PATCH v2 1/4] mach-snapdragon: track boot source
Keep track of whether we were loaded via ABL or if U-Boot is running as
a first-stage bootloader.
For now we set this based on if we have a valid external FDT or not,
since it isn't possible to chainload U-Boot from ABL without there being
an external FDT.
This will be used to inform the capsule update logic which partition
U-Boot is flashed to.
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/board.c | 26 ++
arch/arm/mach-snapdragon/qcom-priv.h | 14 ++
2 files changed, 40 insertions(+)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index
deae4d323789eab75d5fe735159b4cd820c02c45..34e37ab083f20b70660f2ab90a2995a4dfb33f8e
100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -36,8 +36,10 @@
#include "qcom-priv.h"
DECLARE_GLOBAL_DATA_PTR;
+enum qcom_boot_source qcom_boot_source __section(".data") = 0;
+
static struct mm_region rbx_mem_map[CONFIG_NR_DRAM_BANKS + 2] = { { 0 } };
struct mm_region *mem_map = rbx_mem_map;
@@ -237,8 +239,14 @@ int board_fdt_blob_setup(void **fdtp)
if (ret < 0)
panic("No valid memory ranges found!\n");
+ /* If we have an external FDT, it can only have come from the Android
bootloader. */
+ if (external_valid)
+ qcom_boot_source = QCOM_BOOT_SOURCE_ANDROID;
+ else
+ qcom_boot_source = QCOM_BOOT_SOURCE_XBL;
+
debug("ram_base = %#011lx, ram_size = %#011llx\n",
gd->ram_base, gd->ram_size);
if (internal_valid) {
@@ -472,8 +480,25 @@ static void configure_env(void)
qcom_set_serialno();
}
+void qcom_show_boot_source(void)
+{
+ const char *name = "UNKNOWN";
+
+ switch (qcom_boot_source) {
+ case QCOM_BOOT_SOURCE_ANDROID:
+ name = "ABL";
+ break;
+ case QCOM_BOOT_SOURCE_XBL:
+ name = "XBL";
+ break;
+ }
+
+ log_info("U-Boot loaded from %s\n", name);
+ env_set("boot_source", name);
+}
+
void __weak qcom_late_init(void)
{
}
@@ -515,8 +540,9 @@ int board_late_init(void)
configure_env();
qcom_late_init();
+ qcom_show_boot_source();
/* Configure the dfu_string for capsule updates */
qcom_configure_capsule_updates();
return 0;
diff --git a/arch/arm/mach-snapdragon/qcom-priv.h
b/arch/arm/mach-snapdragon/qcom-priv.h
index
74d39197b89f4e769299b06214c26ee829ecdce0..e5eb4cfbc2b752de799b1407ede69683c81474c1
100644
--- a/arch/arm/mach-snapdragon/qcom-priv.h
+++ b/arch/arm/mach-snapdragon/qcom-priv.h
@@ -2,8 +2,22 @@
#ifndef __QCOM_PRIV_H__
#define __QCOM_PRIV_H__
+/**
+ * enum qcom_boot_source - Track where we got loaded from.
+ * Used for capsule update logic.
+ *
+ * @QCOM_BOOT_SOURCE_ANDROID: chainloaded (typically from ABL)
+ * @QCOM_BOOT_SOURCE_XBL: flashed to the XBL or UEFI partition
+ */
+enum qcom_boot_source {
+ QCOM_BOOT_SOURCE_ANDROID = 1,
+ QCOM_BOOT_SOURCE_XBL,
+};
+
+extern enum qcom_boot_source qcom_boot_source;
+
#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
void qcom_configure_capsule_updates(void);
#else
void qcom_configure_capsule_updates(void) {}
--
2.49.0
Re: [PATCH] bootm: Add support for passing arguments to elf app
On Mon, Mar 24, 2025 at 03:05:56AM +, ţ ־�� wrote: > This extends the bootm command to allow passing arguments to standalone > ELF applications. > > Signed-off-by: Niu Zhihong Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
RE: [EXT] [PATCH] crypto: fsl - Fix RNG generation for lengths greater than 16 bytes
Hi Horia,
> From: Horia Geanta
> Sent: Wednesday, April 9, 2025 6:47 PM
>
> On 4/9/2025 9:19 AM, Gaurav Jain wrote:
> > Hi Pawel
> >
> >> From: Paweł Kochanowski
> >>
> >> Hi Gaurav,
> >>
> >> What we see is that the jr_enqueue() called by run_descriptor_jr()
> >> swaps the endianness of the descriptor in place (by modifying the
> >> data pointed by
> >> desc_add):
> >>
> >> /* The descriptor must be submitted to SEC block as per endianness
> >> * of the SEC Block.
> >> * So, if the endianness of Core and SEC block is different, each
> >> word
> >> * of the descriptor will be byte-swapped.
> >> */
> >> for (i = 0; i < length; i++) {
> >> desc_word = desc_addr[i];
> >> sec_out32((uint32_t *)&desc_addr[i], desc_word);
> >> }
> >>
> >> So the sequence looks like this:
> >> 1. caam_rng_probe sets correct descriptor in ` caam_rng_priv *priv` 2.
> >> caam_rng_read is called with 32B 3.
> >> caam_rng_read_one->run_descriptor_jr() is called to generate 16B with
> >> `priv->desc` containing valid descriptor 4. The descriptor is swapped
> >> in jr_enqueue() before passing it to job ring
> >
> > I see you are right. In Linux, caam endianness is handled at the time of
> creating the descriptor.
> > But In Uboot, caam endianness is not handled at the time of descriptor
> creation.
> >
> IMO the U-Boot approach is broken.
> The handling of endianness must be done at creation time, only then we know
> how to interpret the data and perform adequate byteswaps.
> U-Boot makes the assumption that everything should be 4-byte swapped, but
> there are cases when the swap has to be done 8-byte wide (for example
> address pointers or 8-byte immediate data).
>
I think you are right, although it might not be strictly necessary in U-boot as
there seems to be no case where the 8-byte long data are used.
As I see the append_ptr() is already prepared for that as the `struct
ptr_addr_t` definition is different based on CAAM endianness (so words are
swapped).
The other place that could potentially cause a problem is append_u64() but I
can not find anyplace that it is used in and I would propose to remove it.
Do you see other places that I missed?
I also crosschecked with TF-A repository and it is done in very similar way
there (per word swap on usage and not on creation).
BR,
Pawel.
> > 5. The loop in
> >> caam_rng_read is called second time, this time the `priv->desc`
> >> contain swapped data.
> >>
> >> Interesting thing is that the job still succeeds and that some data
> >> are present in the buffers, but maybe swapped descriptor can also be a
> valid one?
> > I agree that the descriptor should be reinitialized for each RNG job.
> I would advise against this, considering what I said above.
> Handling endianness should be done only once.
>
> Regards,
> Horia
Re: [PATCH v2 4/8] mach-snapdragon: of_fixup: remove confusing log message
On 11/04/2025 14:47, Caleb Connolly wrote:
The debug log here had the logic completely backwards, even though the
code is actually correct. Remove it since it's extraneous anyway.
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/of_fixup.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-snapdragon/of_fixup.c
b/arch/arm/mach-snapdragon/of_fixup.c
index
dcd09ee7cac3e02287647c9e6df5575651e18e85..a5515c02d3de05944dfb7c1b2a5542631b517497
100644
--- a/arch/arm/mach-snapdragon/of_fixup.c
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -72,13 +72,14 @@ static int fixup_qcom_dwc3(struct device_node *root, struct
device_node *glue_np
log_err("Failed to read second phy name: %d\n", ret);
return ret;
}
- if (!strncmp("usb3-phy", second_phy_name, strlen("usb3-phy"))) {
- log_debug("Second phy isn't superspeed (is '%s') assuming first phy
is SS\n",
- second_phy_name);
+ /*
+* Determine which phy is the superspeed phy by checking the name of
the second phy
+* since it is typically the superspeed one.
+*/
+ if (!strncmp("usb3-phy", second_phy_name, strlen("usb3-phy")))
hsphy_idx = 0;
- }
/* Overwrite the "phys" property to only contain the high-speed phy */
ret = of_write_prop(dwc3, "phys", sizeof(*phandles), phandles +
hsphy_idx);
if (ret) {
Reviewed-by: Neil Armstrong
[RFC PATCH v1 0/7] Bootstage reports for CI
The BOOTSTAGE Kconfig symbol allows to record boot time information which can be consumed in several ways: 1) Printed to the console just before the OS is booted (when BOOTSTAGE_REPORT=y) 2) Printed to the console by the "bootstage report" command (when CMD_BOOTSTAGE=y) 3) Passed to the OS in the Device Tree (when BOOTSTAGE_FDT=y) 4) Written to some memory location in binary format before the OS is booted (when BOOTSTAGE_STASH=y) None of these options are convenient for use in CI. Suppose we want to monitor a set of boards for boot time regressions -- in other words, make sure the boot time does not degrade unexpectedly as the code evolves. For that, we'd like to be able to record the bootstage data in some kind of database or persistent storage and possibly draw graphs showing trends over time. This RFC is a step in that direction. It introduces two new output formats for the bootstage data. The two are independant, they are simply two options I considered: 1) JSON 2) InfluxDB v2 line protocol [1] Both depend on BOOTSTAGE_REPORT and are enabled by BOOTSTAGE_REPORT_JSON and BOOTSTAGE_REPORT_INFLUXDB respectively. Each format comes with its own test in test/py/tests. The InfluxDB test is special in that it is able to upload the data to a cloud database, provided the environment variables BOOTSTAGE_INFLUXDB_URI and BOOTSTAGE_INFLUXDB_TOKEN are set properly. I have been able to run a boot test on rpi4 in the sjg-lab with BOOTSTGE_REPORT_INFLUXDB enabled. The CI log [2] shows that the data were indeed uploaded to my InfluxDB Cloud test account. This is published as an RFC since it is just an investigation. If someone finds this useful I may folloow-up with a non-RFC series. Comments are welcome. [1] https://docs.influxdata.com/influxdb/v2/reference/syntax/line-protocol/ [2] https://source.denx.de/u-boot/custodians/u-boot-net/-/jobs/1097039#L116 Jerome Forissier (7): efi_loader: make efi_exit_boot_services() call bootstage_report() bootstage: add support for reporting in JSON format test/py/tests/test_bootstage.py: add test for JSON report bootstage: add support for reporting in InfluxDB v2 line format test/py/tests/test_bootstage.py: add test for InfluxDB report sandbox64_defconfig: enable bootstage report in JSON and InfluxDB formats test/py/tests/test_bootstage.py: upload bootstage data to InfluxDB cloud boot/Kconfig| 17 ++ common/bootstage.c | 289 +++- configs/sandbox64_defconfig | 2 + lib/efi_loader/efi_boottime.c | 7 + test/py/requirements.txt| 1 + test/py/tests/test_bootstage.py | 57 +++ 6 files changed, 372 insertions(+), 1 deletion(-) -- 2.43.0
[RFC PATCH v1 1/7] efi_loader: make efi_exit_boot_services() call bootstage_report()
CONFIG_BOOTSTAGE_REPORT is currently supported in the bootm command
only. Add support to the EFI boot.
Signed-off-by: Jerome Forissier
---
lib/efi_loader/efi_boottime.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index c8d9a6037f7..96da279afd4 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -8,6 +8,7 @@
#define LOG_CATEGORY LOGC_EFI
#include
+#include
#include
#include
#include
@@ -2179,6 +2180,12 @@ static efi_status_t EFIAPI
efi_exit_boot_services(efi_handle_t image_handle,
EFI_ENTRY("%p, %zx", image_handle, map_key);
+#if !defined(USE_HOSTCC)
+#if CONFIG_IS_ENABLED(BOOTSTAGE)
+ bootstage_report();
+#endif
+#endif
+
/* Check that the caller has read the current memory map */
if (map_key != efi_memory_map_key) {
ret = EFI_INVALID_PARAMETER;
--
2.43.0
[RFC PATCH v1 2/7] bootstage: add support for reporting in JSON format
Add a new Kconfig symbol: BOOTSTAGE_REPORT_JSON to report the bootstage
timing information in JSON format in addition to the human-readable
text format. JSON is easier to parse by machines and represent
graphically. The main goal is to be able to record boot statistics during
CI in order to detect performance regressions.
Signed-off-by: Jerome Forissier
---
boot/Kconfig | 7 ++
common/bootstage.c | 156 -
2 files changed, 162 insertions(+), 1 deletion(-)
diff --git a/boot/Kconfig b/boot/Kconfig
index f101200ba7a..5e90e20141a 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -1167,6 +1167,13 @@ config BOOTSTAGE_REPORT
29,916,167 26,005,792 bootm_start
30,361,327445,160 start_kernel
+config BOOTSTAGE_REPORT_JSON
+ bool "Display boot timing report in JSON format"
+ depends on BOOTSTAGE_REPORT
+ help
+ Enable output of the boot time report in JSON format in addition to
+ the human-readable text format.
+
config BOOTSTAGE_RECORD_COUNT
int "Number of boot stage records to store"
depends on BOOTSTAGE
diff --git a/common/bootstage.c b/common/bootstage.c
index 4532100acea..1ab55ecbe8f 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -11,6 +11,7 @@
#define LOG_CATEGORY LOGC_BOOT
#include
+#include
#include
#include
#include
@@ -19,6 +20,8 @@
#include
#include
#include
+#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -324,7 +327,7 @@ int bootstage_fdt_add_report(void)
}
#endif
-void bootstage_report(void)
+static void bootstage_report_text(void)
{
struct bootstage_data *data = gd->bootstage;
struct bootstage_record *rec = data->record;
@@ -353,6 +356,157 @@ void bootstage_report(void)
}
}
+/**
+ * Same as get_record_name() but with a % suffix if needed to make the name
a
+ * a unique key. More specifically, where get_record_name() would return "foo"
+ * twice for two distinct records, this function would return "foo" and
"foo%1".
+ *
+ * @param buf Buffer to put name if needed
+ * @param len Length of buffer
+ * @param rec Boot stage record to get the name from
+ * Return: pointer to name, either from the record or pointing to buf.
+ */
+static const char *get_unique_record_name(char *buf, int len,
+ const struct bootstage_record *rec)
+{
+ struct bootstage_data *data = gd->bootstage;
+ const char *name;
+ char tmpbuf1[20];
+ char tmpbuf2[20];
+ int idx = 0;
+ int i;
+
+ name = get_record_name(tmpbuf1, sizeof(tmpbuf1), rec);
+
+ /* Count records with an identical name before @rec in the array */
+ for (i = 0; i < data->rec_count; i++) {
+ struct bootstage_record *irec = data->record + i;
+ const char *iname = get_record_name(tmpbuf2, sizeof(tmpbuf2),
+ irec);
+
+ if (irec == rec)
+ break;
+ if (!strcmp(name, iname))
+ idx++;
+ }
+
+ if (idx)
+ snprintf(buf, len, "%s%%%d", name, idx);
+ else
+ strlcpy(buf, name, len);
+
+ return buf;
+}
+
+/**
+ * print_time_record_json() - print a time entry in JSON format for a bootstage
+ * record or a couple of bootstage records.
+ *
+ * The function prints "key_name": value
+ *
+ * - If @rec->start_us is non-zero, it means @rec holds accumulated time. In
+ * this case, key_name is the unique record name and value is @rec->time_us.
+ * - Otherwise, @rec represents a boot stage with an associated timestamp. The
+ * key name is obtained by concatenating the previous record name and the
+ * current record name, separated by a tilda. The value is the elapsed time
+ * between the two stages, that is: @rec->time_us - @prev->time_us.
+ *
+ * @rec: the record to print
+ * @prev: the previous timestamp record (used as a reference when @rec is a
+ * timestamp)
+ * Returns @rec if it is a timestamp, @prev otherwise
+ */
+static struct bootstage_record *
+print_time_record_json(struct bootstage_record *rec,
+ struct bootstage_record *prev)
+{
+ char buf1[24];
+ char buf2[24];
+
+ if (rec->start_us) {
+ /* An "Accumulated time" entry in the text report */
+ printf("\"%s\": %lu",
+ get_unique_record_name(buf1, sizeof(buf1), rec),
+ rec->time_us);
+ return prev;
+ }
+
+ /* Elapsed time between two consecutive stages */
+ printf("\"%s~%s\": %lu",
+ get_unique_record_name(buf1, sizeof(buf1), prev),
+ get_unique_record_name(buf2, sizeof(buf2), rec),
+ rec->time_us - prev->time_us);
+
+ return rec;
+}
+
+/**
+ * print_env_json() - print an environment variable in JSON format
+ *
+ * @env: the variable
[RFC PATCH v1 4/7] bootstage: add support for reporting in InfluxDB v2 line format
Add a new Kconfig symbol: BOOTSTAGE_REPORT_INFLUXDB to report the
bootstage timing information in InfluxDB v2 line protocol format in
addition to the human-readable text format. InfluxDB provides an easy
way to record boot statistics during CI in order to detect performance
regressions.
[1] https://docs.influxdata.com/influxdb/v2/reference/syntax/line-protocol/
Signed-off-by: Jerome Forissier
---
boot/Kconfig | 10
common/bootstage.c | 133 +
2 files changed, 143 insertions(+)
diff --git a/boot/Kconfig b/boot/Kconfig
index 5e90e20141a..6249f3bb0c9 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -1174,6 +1174,16 @@ config BOOTSTAGE_REPORT_JSON
Enable output of the boot time report in JSON format in addition to
the human-readable text format.
+config BOOTSTAGE_REPORT_INFLUXDB
+ bool "Display boot timing report in InfluxDB v2 line protocol"
+ depends on BOOTSTAGE_REPORT
+ help
+ Enable output of the boot time report in InfluxDB v2 line protocol
+ format in addition to the human-readable text format.
+ The report may be uploaded to the InfluxDB Cloud via an HTTPS POST.
+ See
https://docs.influxdata.com/influxdb/v2/reference/syntax/line-protocol/
+ and
https://docs.influxdata.com/influxdb/v2/write-data/developer-tools/api/.
+
config BOOTSTAGE_RECORD_COUNT
int "Number of boot stage records to store"
depends on BOOTSTAGE
diff --git a/common/bootstage.c b/common/bootstage.c
index 1ab55ecbe8f..9009882ef73 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -497,6 +497,137 @@ static void bootstage_report_json(void)
puts("=== End JSON bootstage report ===\n");
}
+/**
+ * puts_influxdb_escape() - Print a string, escaping the characters that have a
+ * special meaning in the InfluxDB v2 line protocol
+ *
+ * @str: the string to print
+ */
+static void puts_influxdb_escape(const char *str)
+{
+ const char *p = str;
+
+ while (p && *p) {
+ if (*p == ' ' || *p == ',' || *p == '=')
+ putc('\\');
+ putc(*p);
+ p++;
+ }
+}
+
+/**
+ * print_time_record_influxdb() - print a time entry in InfluxDB v2 line
+ * protocolformat for a bootstage record or a couple of bootstage records.
+ *
+ * The function prints [,]key_name=value
+ *
+ * - If @rec->start_us is non-zero, it means @rec holds accumulated time. In
+ * this case, key_name is the unique record name and value is @rec->time_us.
+ * - Otherwise, @rec represents a boot stage with an associated timestamp. The
+ * key name is obtained by concatenating the previous record name and the
+ * current record name, separated by a tilda. The value is the elapsed time
+ * between the two stages, that is: @rec->time_us - @prev->time_us.
+ *
+ * @rec: the record to print
+ * @prev: the previous timestamp record (used as a reference when @rec is a
+ * timestamp)
+ * @is_first: true if this is the first reported data (won't print a
+ * continuation comma first ',')
+ * Returns @rec if it is a timestamp, @prev otherwise
+ */
+static struct bootstage_record *
+print_time_record_influxdb(struct bootstage_record *rec,
+ struct bootstage_record *prev, bool is_first)
+{
+ char buf1[24];
+ char buf2[24];
+
+ if (!is_first)
+ puts(",");
+ if (rec->start_us) {
+ /* An "Accumulated time" entry in the text report */
+ printf("%s=%lu",
+ get_unique_record_name(buf1, sizeof(buf1), rec),
+ rec->time_us);
+ return prev;
+ }
+
+ /* Elapsed time between two consecutive stages */
+ printf("%s~%s=%lu",
+ get_unique_record_name(buf1, sizeof(buf1), prev),
+ get_unique_record_name(buf2, sizeof(buf2), rec),
+ rec->time_us - prev->time_us);
+
+ return rec;
+}
+
+/**
+ * print_env_influxdb() - print an environment variable in InfluxDB v2 line
+ * protocol format
+ *
+ * @env: the variable to print
+ * @cont: true if a continuation comma ', ' should be printed afterwards
+ */
+static void print_env_influxdb(const char *env, bool cont)
+{
+ char *val = env_get(env);
+
+ puts("env_");
+ puts(env);
+ puts("=\"");
+ if (val)
+ puts_influxdb_escape(val);
+ puts("\"");
+ if (cont)
+ puts(",");
+}
+
+/**
+ * bootstage_report_influxdb() - print the InfluxDB bootstage report
+ */
+static void bootstage_report_influxdb(void)
+{
+ struct bootstage_data *data = gd->bootstage;
+ struct bootstage_record *prev = data->record;
+ struct bootstage_record *rec = data->record;
+ struct bootstage_record *boot_end = NULL;
+ bool is_first = true;
+ int i;
+
+ puts("=== Begin InfluxDB v2 bootstage report ===\n");
+ puts("u-boot_bootstage_report,");
+
[RFC PATCH v1 5/7] test/py/tests/test_bootstage.py: add test for InfluxDB report
Add test for CONFIG_BOOTSTAGE_REPORT_INFLUXDB.
Signed-off-by: Jerome Forissier
---
test/py/tests/test_bootstage.py | 11 +++
1 file changed, 11 insertions(+)
diff --git a/test/py/tests/test_bootstage.py b/test/py/tests/test_bootstage.py
index 8d0afe2611b..5619eaf4676 100644
--- a/test/py/tests/test_bootstage.py
+++ b/test/py/tests/test_bootstage.py
@@ -39,6 +39,17 @@ def test_bootstage_report_json(ubman):
assert '"dm_r"' in output
assert '"reset~board_init_f"' in output
+@pytest.mark.buildconfigspec('bootstage')
+@pytest.mark.buildconfigspec('cmd_bootstage')
+@pytest.mark.buildconfigspec('bootstage_report_influxdb')
+def test_bootstage_report_influxdb(ubman):
+output = ubman.run_command('bootstage report')
+assert '=== Begin InfluxDB v2 bootstage report ===' in output
+assert 'u-boot_bootstage_report,' in output
+assert 'u_boot_version=' in output
+assert 'dm_r=' in output
+assert 'reset~board_init_f=' in output
+
@pytest.mark.buildconfigspec('bootstage')
@pytest.mark.buildconfigspec('cmd_bootstage')
@pytest.mark.buildconfigspec('bootstage_stash')
--
2.43.0
