[U-Boot] [PATCH] eth: mtk-eth: fix incorrect read of phy-handle

2019-04-28 Thread Weijie Gao
In mt7629-rfb.dts, the phy-handle is a reference to the node phy0, not the
node itself:

phy-handle = <&phy0>;

phy0: ethernet-phy@0 {
reg = <0>;
}

However the driver used ofnode_find_subnode("phy-handle") to read the node.
It will always fail.

This patch replaces ofnode_find_subnode with dev_read_phandle_with_args to
make sure the node can be read correctly.

Cc: Joe Hershberger 
Signed-off-by: Weijie Gao 
---
 drivers/net/mtk_eth.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c
index cc09404..0ef814c 100644
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -1130,13 +1130,14 @@ static int mtk_eth_ofdata_to_platdata(struct udevice 
*dev)
 &priv->rst_gpio, GPIOD_IS_OUT);
}
} else {
-   subnode = ofnode_find_subnode(dev_ofnode(dev), "phy-handle");
-   if (!ofnode_valid(subnode)) {
+   ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0,
+0, &args);
+   if (ret) {
printf("error: phy-handle is not specified\n");
return ret;
}
 
-   priv->phy_addr = ofnode_read_s32_default(subnode, "reg", -1);
+   priv->phy_addr = ofnode_read_s32_default(args.node, "reg", -1);
if (priv->phy_addr < 0) {
printf("error: phy address is not specified\n");
return ret;
-- 
1.9.1

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Re: [U-Boot] DE10 Nano U-Boot v2019.04 Issues

2019-04-28 Thread Simon Goldschmidt



On 27.04.19 19:59, rafael mello wrote:

Hello, I've attempted to build u-boot v2019.04 for the DE10 Nano board using 
the following commands:
make ARCH=arm CROSS_COMPILE=${CC} distclean


You probably should use mrproper here, not distclean?


make ARCH=arm CROSS_COMPILE=${CC} socfpga_de10_nano_defconfig
make ARCH=arm CROSS_COMPILE=${CC} u-boot-with-spl.sfp


So what's $CC set to? I don't think you need ARCH=arm, works without 
that for me.




It builds just fine but I'm not able to make the board load U-Boot correctly.


So SPL runs fine but it doesn't load U-Boot? Or does it fail running 
anything? Please send the console output, if any.



If I run the same commands using v2018.05 it builds and I'm able to boot the 
board.

After some attempts to find the issue, I was able to compile and boot the 
v2019.04 by changing the 
CONFIG_DEFAULT_DEVICE_TREE=“socfpga_cyclone5_de10_nano” to 
CONFIG_DEFAULT_DEVICE_TREE=“socfpga_cyclone5_de0_nano_soc” in the 
socfpga_de10_nano_defconfig file.
That lead me to belive that there was an issue with the 
socfpga_cyclone5_de10_nano.dts file.
After changing the socfpga_cyclone5_de10_nano.dts to be identical to the 
socfpga_cyclone5_de0_nano_soc.dts I wasn't able to boot the board, making me 
think that the issue is somewere else, since I'm also able to compile and boot 
the board if I rename the socfpga_cyclone5_de10_nano.dts to 
socfpga_cyclone5_de0_nano_soc.dts.


I don't see the file socfpga_cyclone5_de0_nano_soc.dts, where does it 
come from?


Unfortunately, I don't have that board, so I cannot test it myself.

Regards,
Simon
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[U-Boot] [PATCH v4 1/4] env: register erase command

2019-04-28 Thread Frank Wunderlich
this patch adds basic changes for adding a erase-subcommand to env

with this command the environment stored on non-volatile storage written
by saveenv can be cleared.

Signed-off-by: Frank Wunderlich 

squashed fixes
 - start message with "Erasing"
 - mark erase-function as optional
 - env: separate eraseenv from saveenv

Suggested-by: Simon Goldschmidt 
---
 cmd/Kconfig   |  8 
 cmd/nvedit.c  | 19 +++
 env/env.c | 30 ++
 include/environment.h | 17 +
 4 files changed, 74 insertions(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 0b07b3b9d7..e8a99cb5a3 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -397,6 +397,14 @@ config CMD_SAVEENV
  Save all environment variables into the compiled-in persistent
  storage.

+config CMD_ERASEENV
+   bool "eraseenv"
+   default n
+   depends on CMD_SAVEENV
+   help
+ Erase environment variables from the compiled-in persistent
+ storage.
+
 config CMD_ENV_EXISTS
bool "env exists"
default y
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 24a6cf7824..0cbd8e8984 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -761,6 +761,19 @@ U_BOOT_CMD(
"save environment variables to persistent storage",
""
 );
+
+#if defined(CONFIG_CMD_ERASEENV)
+static int do_env_erase(cmd_tbl_t *cmdtp, int flag, int argc,
+   char * const argv[])
+{
+   return env_erase() ? 1 : 0;
+}
+U_BOOT_CMD(
+   eraseenv, 1, 0, do_env_erase,
+   "erase environment variables from persistent storage",
+   ""
+);
+#endif
 #endif
 #endif /* CONFIG_SPL_BUILD */

@@ -1207,6 +1220,9 @@ static cmd_tbl_t cmd_env_sub[] = {
 #endif
 #if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
U_BOOT_CMD_MKENT(save, 1, 0, do_env_save, "", ""),
+#if defined(CONFIG_CMD_ERASEENV)
+   U_BOOT_CMD_MKENT(erase, 1, 0, do_env_erase, "", ""),
+#endif
 #endif
U_BOOT_CMD_MKENT(set, CONFIG_SYS_MAXARGS, 0, do_env_set, "", ""),
 #if defined(CONFIG_CMD_ENV_EXISTS)
@@ -1282,6 +1298,9 @@ static char env_help_text[] =
 #endif
 #if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE)
"env save - save environment\n"
+#if defined(CONFIG_CMD_ERASEENV)
+   "env erase - erase environment\n"
+#endif
 #endif
 #if defined(CONFIG_CMD_NVEDIT_EFI)
"env set -e name [arg ...] - set UEFI variable; unset if 'arg' not 
specified\n"
diff --git a/env/env.c b/env/env.c
index 4b417b90a2..d3cbe2f915 100644
--- a/env/env.c
+++ b/env/env.c
@@ -24,6 +24,8 @@ void env_fix_drivers(void)
entry->load += gd->reloc_off;
if (entry->save)
entry->save += gd->reloc_off;
+   if (entry->erase)
+   entry->erase += gd->reloc_off;
if (entry->init)
entry->init += gd->reloc_off;
}
@@ -254,6 +256,34 @@ int env_save(void)
return -ENODEV;
 }

+int env_erase(void)
+{
+   struct env_driver *drv;
+
+   drv = env_driver_lookup(ENVOP_ERASE, gd->env_load_prio);
+   if (drv) {
+   int ret;
+
+   if (!drv->erase)
+   return -ENODEV;
+
+   if (!env_has_inited(drv->location))
+   return -ENODEV;
+
+   printf("Erasing Environment on %s... ", drv->name);
+   ret = drv->erase();
+   if (ret)
+   printf("Failed (%d)\n", ret);
+   else
+   printf("OK\n");
+
+   if (!ret)
+   return 0;
+   }
+
+   return -ENODEV;
+}
+
 int env_init(void)
 {
struct env_driver *drv;
diff --git a/include/environment.h b/include/environment.h
index cd96676141..de67cf4f0e 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -200,6 +200,7 @@ enum env_operation {
ENVOP_INIT, /* we want to call the init function */
ENVOP_LOAD, /* we want to call the load function */
ENVOP_SAVE, /* we want to call the save function */
+   ENVOP_ERASE,/* we want to call the erase function */
 };

 struct env_driver {
@@ -225,6 +226,15 @@ struct env_driver {
 */
int (*save)(void);

+   /**
+* erase() - Erase the environment on storage
+*
+* This method is optional and required for 'eraseenv' to work.
+*
+* @return 0 if OK, -ve on error
+*/
+   int (*erase)(void);
+
/**
 * init() - Set up the initial pre-relocation environment
 *
@@ -303,6 +313,13 @@ int env_load(void);
  */
 int env_save(void);

+/**
+ * env_erase() - Erase the environment on storage
+ *
+ * @return 0 if OK, -ve on error
+ */
+int env_erase(void);
+
 /**
  * env_fix_drivers() - Updates envdriver as per relocation
  */
--
2.17.1

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[U-Boot] [PATCH v4 2/4] env: mmc: add erase-function

2019-04-28 Thread Frank Wunderlich
this adds erase environment for mmc storage

Signed-off-by: Frank Wunderlich 

squashed fixes:
 - fix bogus indent
 - add CONFIG_CMD_ERASEENV

Suggested-by: Simon Goldschmidt 
---
 env/mmc.c | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/env/mmc.c b/env/mmc.c
index c3cf35d01b..9ae9b1a66a 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -242,6 +242,34 @@ fini:
fini_mmc_for_env(mmc);
return ret;
 }
+
+#if defined(CONFIG_CMD_ERASEENV)
+static int env_mmc_erase(void)
+{
+   int dev = mmc_get_env_dev();
+   struct mmc *mmc = find_mmc_device(dev);
+   int n, blk, cnt;
+
+   if (!mmc)
+   return CMD_RET_FAILURE;
+
+   blk = CONFIG_ENV_OFFSET / mmc->read_bl_len;
+   cnt = CONFIG_ENV_SIZE / mmc->read_bl_len;
+
+   printf("\nMMC erase env: dev # %d, block # %d (0x%x), count %d 
(0x%x)\n",
+  dev, blk, blk * mmc->read_bl_len,
+  cnt, cnt * mmc->read_bl_len);
+
+   if (mmc_getwp(mmc) == 1) {
+   printf("Error: card is write protected!\n");
+   return CMD_RET_FAILURE;
+   }
+   n = blk_derase(mmc_get_blk_desc(mmc), blk, cnt);
+   printf("%d blocks erased: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+
+   return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+}
+#endif /* CONFIG_CMD_ERASEENV */
 #endif /* CONFIG_CMD_SAVEENV && !CONFIG_SPL_BUILD */

 static inline int read_env(struct mmc *mmc, unsigned long size,
@@ -351,5 +379,8 @@ U_BOOT_ENV_LOCATION(mmc) = {
.load   = env_mmc_load,
 #ifndef CONFIG_SPL_BUILD
.save   = env_save_ptr(env_mmc_save),
+#if defined(CONFIG_CMD_ERASEENV)
+   .erase  = env_mmc_erase,
+#endif
 #endif
 };
--
2.17.1

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[U-Boot] [PATCH v4 0/4] add command env erase

2019-04-28 Thread Frank Wunderlich
sometimes it is needed to erase the non-volatile environment
e.g. for boot-up with builtin-environment or after resizing env

this series add basic functionality for erasing environment from storage
as a first storage-driver mmc is introduced, other needs to be added later

changes since v3:
 - fixes
 - Kconfig-option as suggested by Simon Goldschmidt
 - including CONFIG_ENV_OFFSET_REDUND (4/4 is RFC)

Frank Wunderlich (4):
  env: register erase command
  env: mmc: add erase-function
  env: add option to use redundant offset
  [RFC] env: call env_erase twice if CONFIG_ENV_OFFSET_REDUND is set

 cmd/Kconfig   |  8 
 cmd/nvedit.c  | 26 ++
 env/env.c | 30 ++
 env/mmc.c | 36 
 include/environment.h | 17 +
 5 files changed, 117 insertions(+)

--
2.17.1

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[U-Boot] [PATCH v4 3/4] env: add option to use redundant offset

2019-04-28 Thread Frank Wunderlich
allow env erase on secondary offset using CONFIG_ENV_OFFSET_REDUND

Suggested-by: Simon Goldschmidt 
Signed-off-by: Frank Wunderlich 
---
 cmd/nvedit.c  | 2 +-
 env/env.c | 4 ++--
 env/mmc.c | 9 +++--
 include/environment.h | 4 ++--
 4 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 0cbd8e8984..2071bcf443 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -766,7 +766,7 @@ U_BOOT_CMD(
 static int do_env_erase(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
 {
-   return env_erase() ? 1 : 0;
+   return env_erase(false) ? 1 : 0;
 }
 U_BOOT_CMD(
eraseenv, 1, 0, do_env_erase,
diff --git a/env/env.c b/env/env.c
index d3cbe2f915..bf7f3b9684 100644
--- a/env/env.c
+++ b/env/env.c
@@ -256,7 +256,7 @@ int env_save(void)
return -ENODEV;
 }

-int env_erase(void)
+int env_erase(bool use_redund)
 {
struct env_driver *drv;

@@ -271,7 +271,7 @@ int env_erase(void)
return -ENODEV;

printf("Erasing Environment on %s... ", drv->name);
-   ret = drv->erase();
+   ret = drv->erase(use_redund);
if (ret)
printf("Failed (%d)\n", ret);
else
diff --git a/env/mmc.c b/env/mmc.c
index 9ae9b1a66a..647bc693fa 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -244,7 +244,7 @@ fini:
 }

 #if defined(CONFIG_CMD_ERASEENV)
-static int env_mmc_erase(void)
+static int env_mmc_erase(bool use_redund)
 {
int dev = mmc_get_env_dev();
struct mmc *mmc = find_mmc_device(dev);
@@ -253,7 +253,12 @@ static int env_mmc_erase(void)
if (!mmc)
return CMD_RET_FAILURE;

-   blk = CONFIG_ENV_OFFSET / mmc->read_bl_len;
+#ifdef CONFIG_ENV_OFFSET_REDUND
+   if (use_redund)
+   blk = CONFIG_ENV_OFFSET_REDUND / mmc->read_bl_len;
+   else
+#endif
+   blk = CONFIG_ENV_OFFSET / mmc->read_bl_len;
cnt = CONFIG_ENV_SIZE / mmc->read_bl_len;

printf("\nMMC erase env: dev # %d, block # %d (0x%x), count %d 
(0x%x)\n",
diff --git a/include/environment.h b/include/environment.h
index de67cf4f0e..a823948da2 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -233,7 +233,7 @@ struct env_driver {
 *
 * @return 0 if OK, -ve on error
 */
-   int (*erase)(void);
+   int (*erase)(bool use_redund);

/**
 * init() - Set up the initial pre-relocation environment
@@ -318,7 +318,7 @@ int env_save(void);
  *
  * @return 0 if OK, -ve on error
  */
-int env_erase(void);
+int env_erase(bool use_redund);

 /**
  * env_fix_drivers() - Updates envdriver as per relocation
--
2.17.1

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Re: [U-Boot] [PATCH v6 09/13] rockchip: rk3399: Add Nanopc T4 board support

2019-04-28 Thread Jagan Teki
On Sat, Apr 27, 2019 at 5:19 PM Jagan Teki  wrote:
>
> Add initial support for Nanopc T4 board.
>
> Specification
> - Rockchip RK3399
> - Dual-Channel 4GB LPDDR3-1866
> - SD card slot
> - 16GB eMMC
> - RTL8211E 1Gbps
> - AP6356S WiFI/BT
> - HDMI In/Out, DP, MIPI DSI/CSI, eDP
> - USB 3.0, 2.0
> - USB Type C power and data
> - GPIO expansion ports
> - DC 12V/2A
>
> Commit details of rk3399-nanopc-t4.dts sync from Linux 5.1-rc2:
> "arm64: dts: rockchip: Add NanoPC-T4 IR receiver"
> (sha1: 95658e21b1707ad7844f873db2fdaa295109a5a3)
>
> Tested-by: Daniel Gröber 
> Signed-off-by: Jagan Teki 
> ---
>  arch/arm/dts/Makefile |  1 +
>  arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi |  7 ++
>  arch/arm/dts/rk3399-nanopc-t4.dts | 91 +++
>  board/rockchip/evb_rk3399/MAINTAINERS |  6 ++
>  configs/nanopc-t4-rk3399_defconfig| 58 +++
>  5 files changed, 163 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
>  create mode 100644 arch/arm/dts/rk3399-nanopc-t4.dts
>  create mode 100644 configs/nanopc-t4-rk3399_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index d2ac26b556..e048565bb6 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -87,6 +87,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
> rk3399-evb.dtb \
> rk3399-firefly.dtb \
> rk3399-gru-bob.dtb \
> +   rk3399-nanopc-t4.dtb \
> rk3399-nanopi-m4.dtb \
> rk3399-orangepi.dtb \
> rk3399-puma-ddr1333.dtb \
> diff --git a/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi 
> b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
> new file mode 100644
> index 00..17201bcf41
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
> @@ -0,0 +1,7 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Jagan Teki 
> + */
> +
> +#include "rk3399-nanopi4-u-boot.dtsi"
> +#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
> diff --git a/arch/arm/dts/rk3399-nanopc-t4.dts 
> b/arch/arm/dts/rk3399-nanopc-t4.dts
> new file mode 100644
> index 00..84433cf02b
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-nanopc-t4.dts
> @@ -0,0 +1,91 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * FriendlyElec NanoPC-T4 board device tree source
> + *
> + * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
> + * (http://www.friendlyarm.com)
> + *
> + * Copyright (c) 2018 Collabora Ltd.
> + */
> +
> +/dts-v1/;
> +#include "rk3399-nanopi4.dtsi"
> +
> +/ {
> +   model = "FriendlyElec NanoPC-T4";
> +   compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399";
> +
> +   vcc12v0_sys: vcc12v0-sys {
> +   compatible = "regulator-fixed";
> +   regulator-always-on;
> +   regulator-boot-on;
> +   regulator-max-microvolt = <1200>;
> +   regulator-min-microvolt = <1200>;
> +   regulator-name = "vcc12v0_sys";
> +   };
> +
> +   vcc5v0_host0: vcc5v0-host0 {
> +   compatible = "regulator-fixed";
> +   regulator-always-on;
> +   regulator-boot-on;
> +   regulator-name = "vcc5v0_host0";
> +   vin-supply = <&vcc5v0_sys>;
> +   };
> +
> +   adc-keys {
> +   compatible = "adc-keys";
> +   io-channels = <&saradc 1>;
> +   io-channel-names = "buttons";
> +   keyup-threshold-microvolt = <180>;
> +   poll-interval = <100>;
> +
> +   recovery {
> +   label = "Recovery";
> +   linux,code = ;
> +   press-threshold-microvolt = <18000>;
> +   };
> +   };
> +
> +   ir-receiver {
> +   compatible = "gpio-ir-receiver";
> +   gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
> +   pinctrl-names = "default";
> +   pinctrl-0 = <&ir_rx>;
> +   };
> +};
> +
> +&pinctrl {
> +   ir {
> +   ir_rx: ir-rx {
> +   /* external pullup to VCC3V3_SYS, despite being 1.8V 
> :/ */
> +   rockchip,pins = <0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
> +   };
> +   };
> +};
> +
> +&sdhci {
> +   mmc-hs400-1_8v;
> +   mmc-hs400-enhanced-strobe;
> +};
> +
> +&u2phy0_host {
> +   phy-supply = <&vcc5v0_host0>;
> +};
> +
> +&u2phy1_host {
> +   phy-supply = <&vcc5v0_host0>;
> +};
> +
> +&vcc5v0_sys {
> +   vin-supply = <&vcc12v0_sys>;
> +};
> +
> +&vcc3v3_sys {
> +   vin-supply = <&vcc12v0_sys>;
> +};
> +
> +&vbus_typec {
> +   enable-active-high;
> +   gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
> +   vin-supply = <&vcc5v0_sys>;
> +};
> diff --git a/board/rockchip/evb_rk3399/MAINTAINERS 
> b/board/rockchip/evb_rk3399/MAINTAINERS
> index ae43805a6a..5917abb9c1 100644
> --- a/board/rockchip/evb_rk3399/MAINTAINERS
> +++ b/board/rockchip/evb_rk3399/MAINTAINERS
> @@ -6,6 +6,12 @@ F:

[U-Boot] [PATCH v4 4/4] [RFC] env: call env_erase twice if CONFIG_ENV_OFFSET_REDUND is set

2019-04-28 Thread Frank Wunderlich
erase also the redundant environment location if offset is defined

this is a possible implementation without adding additional parameter
to env erase command

Signed-off-by: Frank Wunderlich 
---
 cmd/nvedit.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 2071bcf443..f11972e8f1 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -766,8 +766,15 @@ U_BOOT_CMD(
 static int do_env_erase(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
 {
-   return env_erase(false) ? 1 : 0;
+   int ret;
+
+   ret = env_erase(false) ? 1 : 0;
+   #ifdef CONFIG_ENV_OFFSET_REDUND
+   ret = ret || (env_erase(true) ? 1 : 0);
+   #endif
+   return ret;
 }
+
 U_BOOT_CMD(
eraseenv, 1, 0, do_env_erase,
"erase environment variables from persistent storage",
--
2.17.1

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[U-Boot] is "autoconfig.mk" simply a misspelling of "autoconf.mk"?

2019-04-28 Thread Robert P. J. Day

  was going over README.kconfig and noticed these references:

$ grep -r autoconfig.mk *
doc/README.kconfig:  - spl/include/autoconfig.mk(generated by the old 
config for SPL)
doc/README.kconfig:  - tpl/include/autoconfig.mk(generated by the old 
config for TPL)
doc/README.kconfig:  macros used in makefiles, we can drop 
include/autoconfig.mk, which makes
$

  i see no historical references to anything named "autoconfig.mk" --
should i simply assume those are typos for "autoconf.mk"? can submit
patch if so.

rday
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[U-Boot] [PATCH v2 0/9] rk3399: make u-boot-rockchip-with-spl.bin

2019-04-28 Thread Jagan Teki
This is v2 for previous series[1] to create single bootable image
using binman for rk3399 platform.

This series resolved the travis-ci build issuesi[2] which were listed
in previous series.

Series introduce BL31 env for exporting bl31.elf, If the builds 
are not exporting BL31 env, the make_fit_atf.py explicitly 
create dummy bl31.elf in u-boot root directory.

patch 1, 2: clean targets for bl31_*.bin and image.map

patch 3: travis.yml for pyelftools

patch 4: add BL31 env for bl31.elf

patch 5: add BL31 env for bl31.bin, PMUM0 env for rk3399m0.bin

patch 6: BUILD_TARGET patch

patch 7: create u-boot-spl-rockchip.bin

patch 8: order dtb builds based on SoC type

patch 9: create u-boot-rockchip-with-spl.bin

Changes for v2:
- Add few clean target patches
- update bl31.elf env handling code, with logging
- support puma itb, via BL31 and PMUM0 env
- enable BUILD_TARGET for ROCKCHIP_RK3399
- add patch to build rockchip dtbs based on SoC types
- update binman patch

[1] https://patchwork.ozlabs.org/cover/1091542/
[2] https://travis-ci.org/openedev/u-boot-amarula/builds/525545316

Jagan Teki (9):
  Makefile: clean image.map
  Makefile: clean bl31_*.bin
  travis.yml: Add pyelftools install entry
  rockchip: rk3399: Get bl31.elf via BL31
  board: puma: Get bl31.bin via BL31 and rk3399m0.bin via PMUM0
  Kconfig: Add u-boot.itb BUILD_TARGET for Rockchip
  Makefile.spl: Create u-boot-spl-rockchip.bin for rk3399
  dts: Makefile: Build rockchip dtbs based on SoC types
  rockchip: rk3399: Create single image using BINMAN

 .travis.yml   |  1 +
 Kconfig   |  2 +-
 Makefile  | 16 ++-
 arch/arm/dts/Makefile | 35 ++
 arch/arm/dts/rk3399-ficus-u-boot.dtsi |  1 +
 arch/arm/dts/rk3399-rock960-u-boot.dtsi   |  1 +
 arch/arm/dts/rk3399-u-boot.dtsi   | 17 +++
 arch/arm/mach-rockchip/Kconfig|  9 
 arch/arm/mach-rockchip/make_fit_atf.py| 11 -
 .../{fit_spl_atf.its => fit_spl_atf.sh}   | 46 ---
 configs/puma-rk3399_defconfig |  2 +-
 doc/README.rockchip   | 23 --
 include/configs/rk3399_common.h   |  2 +
 scripts/Makefile.spl  | 21 +
 14 files changed, 153 insertions(+), 34 deletions(-)
 rename board/theobroma-systems/puma_rk3399/{fit_spl_atf.its => fit_spl_atf.sh} 
(50%)
 mode change 100644 => 100755

-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 1/9] Makefile: clean image.map

2019-04-28 Thread Jagan Teki
binman tools for creating single image build will create image.map
at the end, which has information about binman image node details.

current u-boot, is unable to clean this image.map so add a command
entry in clean target in Makefile.

Signed-off-by: Jagan Teki 
---
 Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 92e04dd689..54e8fedff0 100644
--- a/Makefile
+++ b/Makefile
@@ -1781,7 +1781,8 @@ clean: $(clean-dirs)
-o -name modules.builtin -o -name '.tmp_*.o.*' \
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
-   -type f -print | xargs rm -f
+   -type f -print | xargs rm -f \
+   image.map
 
 # mrproper - Delete all generated files, including .config
 #
-- 
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[U-Boot] [PATCH v2 3/9] travis.yml: Add pyelftools install entry

2019-04-28 Thread Jagan Teki
Currently rockchip platform is using explicit 'make u-boot.itb' for
building u-boot.itb but if we enable CONFIG_BUILD_TARGET as 'u-boot.itb'
then the resulting u-boot.itb directly will create by make.

But, that indeed make travis build fail since it require python-pyelftools
host package.

So add pyelftools install entry as 'pip install pyelftools', this would
create pyelftools on travis host which are required to build rk3399 itb.

Signed-off-by: Jagan Teki 
---
 .travis.yml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.travis.yml b/.travis.yml
index eb531f1e5b..6dbbb5dd02 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -49,6 +49,7 @@ install:
  - . /tmp/venv/bin/activate
  - pip install pytest==2.8.7
  - pip install python-subunit
+ - pip install pyelftools
  - grub-mkimage -o ~/grub_x86.efi -O i386-efi normal  echo lsefimmap lsefi 
lsefisystab efinet tftp minicmd
  - grub-mkimage -o ~/grub_x64.efi -O x86_64-efi normal  echo lsefimmap lsefi 
lsefisystab efinet tftp minicmd
  - mkdir ~/grub2-arm
-- 
2.18.0.321.gffc6fa0e3

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Re: [U-Boot] [PATCH] rockchip: make_fit_atf: Use BL31 environ variable for file location

2019-04-28 Thread Jagan Teki
On Sat, Apr 27, 2019 at 6:17 PM Emmanuel Vadot  wrote:
>
>
>  Hi Jagan,
>
> On Sun, 21 Apr 2019 22:42:45 +0530
> Jagan Teki  wrote:
>
> > On Tue, Feb 5, 2019 at 4:24 PM Emmanuel Vadot  wrote:
> > >
> > > Other make_fit script (like imx or sunxi) use the BL31 environment
> > > variable to indicate the location of the file.
> > > Also do that for rockchip so we don't need to copy the file in the source
> > > directory.
> > >
> > > Signed-off-by: Emmanuel Vadot 
> > > ---
> > >  arch/arm/mach-rockchip/make_fit_atf.py | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
> > > b/arch/arm/mach-rockchip/make_fit_atf.py
> > > index d1faff1957..7bf58e3dd1 100755
> > > --- a/arch/arm/mach-rockchip/make_fit_atf.py
> > > +++ b/arch/arm/mach-rockchip/make_fit_atf.py
> > > @@ -194,7 +194,7 @@ def get_bl31_segments_info(bl31_file_name):
> > >
> > >  def main():
> > >  uboot_elf="./u-boot"
> > > -bl31_elf="./bl31.elf"
> > > +bl31_elf=os.getenv("BL31", "./bl31.elf")
> >
> > Have similar change on my repo.
> >
> > Better through warning for non BL31 like
> >
> > if "BL31ELF" in os.environ:
> >bl31_elf=os.getenv("BL31ELF");
> >else:
> >   sys.exit("ERROR: Please export BL31ELF file, check
> > board/rockchip/evb_rk3399/README)
>
>  I didn't error for the same reason we don't on Allwinner, CI don't
> copy this file as part of the test. Yes this does result in a
> non-working u-boot but the goal of thoses test is just to compile.
>  mksunxi_fit_atf.sh prints a warning, maybe I should just do the same ?
>  Phillipp, what's your view on this ?

Yes, ie what I thought of. I have handle this in BINMAN series, please
have look and comment.

>
> > And BL31ELF would be proper env than BL31 since rockchip build would
> > require elf and other one has bin, IMHO.
>
>  This change is fine with me.

I think we can go with BL31 itself since we need to compatible with
existing platforms.

Jagan.
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[U-Boot] [PATCH v2 7/9] Makefile.spl: Create u-boot-spl-rockchip.bin for rk3399

2019-04-28 Thread Jagan Teki
Rockchip platform would require an explicit call to mkimage for
creating bootable images which indeed specific to SoC family
along with boot devices.

Example of creating bootable image for rk3399 family with SD
boot device as

₹ mkimage -n rk3399 -T rksd -d ./spl/u-boot-spl-dtb.bin u-boot-spl-rockchip.bin

This patch would do the same think via Makefile.spl for rk3399.

This would be an initial version and it can easily expand further to support
other families of SoC's with variety of boot stages like TPL, SPL.

Signed-off-by: Jagan Teki 
---
 arch/arm/mach-rockchip/Kconfig |  8 
 doc/README.rockchip|  3 +--
 scripts/Makefile.spl   | 21 +
 3 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index dbe7f11d39..286c870135 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -222,6 +222,14 @@ config ROCKCHIP_SPL_RESERVE_IRAM
 config ROCKCHIP_BROM_HELPER
bool
 
+config SPL_ROCKCHIP_IMG_NAME
+   string "SPL Rockchip image name"
+   default "rk3399" if ROCKCHIP_RK3399
+   help
+ To create SPL image for rockchip targets the image name would
+ depends on the SoC family that would pass as an argument as
+ '-n rk3399' to mkimage for creating Rockchip SPL boot image.
+
 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
diff --git a/doc/README.rockchip b/doc/README.rockchip
index c4e5f83da7..ccb9a7 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -421,11 +421,10 @@ Option 2: Package the image with SPL:
   - Prefix rk3399 header to SPL image
 
 => cd /path/to/u-boot
-=> ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
 
   - Write prefixed SPL at 64th sector
 
-=> sudo dd if=out of=/dev/sdc seek=64
+=> sudo dd if=spl/u-boot-spl-rockchip.bin of=/dev/sdc seek=64
 
   - Write U-Boot proper at 16384 sector
 
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 54b160d72b..49c0641aa2 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -235,6 +235,10 @@ ALL-$(CONFIG_ARCH_ZYNQMP)  += $(obj)/boot.bin
 
 ALL-$(CONFIG_ARCH_MEDIATEK)+= $(obj)/u-boot-spl-mtk.bin
 
+ifdef CONFIG_ROCKCHIP_RK3399
+ALL-$(CONFIG_ARCH_ROCKCHIP)+= $(obj)/u-boot-spl-rockchip.bin
+endif
+
 all:   $(ALL-y)
 
 quiet_cmd_cat = CAT $@
@@ -369,6 +373,23 @@ MKIMAGEFLAGS_u-boot-spl-mtk.bin = -T mtk_image \
 $(obj)/u-boot-spl-mtk.bin: $(obj)/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
 
+# Rockchip specific SPL build
+ifeq ($(CONFIG_ROCKCHIP_RK3399),y)
+
+ifeq ($(CONFIG_SPI_FLASH_SUPPORT),y)
+ROCKCHIP_IMG_TYPE := rkspi
+else
+ROCKCHIP_IMG_TYPE := rksd
+endif
+
+MKIMAGEFLAGS_u-boot-spl-rockchip.bin = -n $(CONFIG_SPL_ROCKCHIP_IMG_NAME) \
+   -T $(ROCKCHIP_IMG_TYPE) -d $(MKIMAGEOUTPUT)
+
+$(obj)/u-boot-spl-rockchip.bin: $(obj)/u-boot-spl.bin FORCE
+   $(call if_changed,mkimage)
+
+endif # CONFIG_ROCKCHIP_RK3399
+
 # Rule to link u-boot-spl
 # May be overridden by arch/$(ARCH)/config.mk
 quiet_cmd_u-boot-spl ?= LD  $@
-- 
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[U-Boot] [PATCH v2 4/9] rockchip: rk3399: Get bl31.elf via BL31

2019-04-28 Thread Jagan Teki
Right now rockchip platform need to copy bl31.elf into u-boot
source directory to make use of building u-boot.itb.

So, add environment variable BL31 like Allwinner SoC so-that the
bl31.elf would available via BL31.

If the builds are not exporting BL31 env, the make_fit_atf.py
explicitly create dummy bl31.elf in u-boot root directory to
satisfy travis builds and it will show the warning on console as

 WARNING: BL31 file bl31.elf NOT found, resulting binary is non-functional
 WARNING: Please read Building section in doc/README.rockchip

Note, that the dummy bl31 files were created during not exporting
BL31 case would be removed via clean target in Makefile.

Cc: Emmanuel Vadot  
Signed-off-by: Jagan Teki 
---
 Makefile   |  2 +-
 arch/arm/mach-rockchip/make_fit_atf.py | 11 ++-
 doc/README.rockchip|  4 ++--
 3 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index ba0cce9f33..2471340c71 100644
--- a/Makefile
+++ b/Makefile
@@ -1782,7 +1782,7 @@ clean: $(clean-dirs)
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
-type f -print | xargs rm -f \
-   bl31_*.bin image.map
+   bl31.c bl31.elf bl31_*.bin image.map
 
 # mrproper - Delete all generated files, including .config
 #
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
b/arch/arm/mach-rockchip/make_fit_atf.py
index d1faff1957..327875d87b 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -10,6 +10,7 @@ usage: $0  [ [ bl31.c")
+os.system("${CROSS_COMPILE}gcc -c bl31.c -o bl31.elf")
+bl31_elf="./bl31.elf"
+logging.basicConfig(format='%(levelname)s:%(message)s', 
level=logging.DEBUG)
+logging.warning(' BL31 file bl31.elf NOT found, resulting binary is 
non-functional')
+logging.warning(' Please read Building section in doc/README.rockchip')
 
 opts, args = getopt.getopt(sys.argv[1:], "o:u:b:h")
 for opt, val in opts:
diff --git a/doc/README.rockchip b/doc/README.rockchip
index ca4d6473b0..98a3824e2c 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -149,8 +149,8 @@ For example:
=> make realclean
=> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
 
-   (copy bl31.elf into U-Boot root dir)
-   => cp build/rk3399/release/bl31/bl31.elf /path/to/u-boot
+   (export bl31.elf)
+   => export 
BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf
 
- Compile PMU M0 firmware
 
-- 
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[U-Boot] [PATCH v2 5/9] board: puma: Get bl31.bin via BL31 and rk3399m0.bin via PMUM0

2019-04-28 Thread Jagan Teki
Right now puma rk3399 board need to copy bl31-rk3399.bin and
rk3399m0.bin into u-boot source directory to make use of building
u-boot.itb.

So, add environment variable
- BL31 for bl31.bin (instead of bl31-rk3399.bin to compatible with other
  platform BL31 env)
- PMUM0 for rk3399m0.bin

If the builds are not exporting BL31, PMUM0 env, the fit_spl_atf.sh will
notify with warning about which document to refer for more information
like this:

 WARNING: BL31 file bl31.bin NOT found, resulting binary is non-functional
 Please read Building section in doc/README.rockchip
 WARNING: PMUM0 file rk3399m0.bin NOT found, resulting binary is non-functional
 Please read Building section in doc/README.rockchip

Signed-off-by: Jagan Teki 
---
 .../{fit_spl_atf.its => fit_spl_atf.sh}   | 46 ---
 configs/puma-rk3399_defconfig |  2 +-
 doc/README.rockchip   |  8 ++--
 3 files changed, 45 insertions(+), 11 deletions(-)
 rename board/theobroma-systems/puma_rk3399/{fit_spl_atf.its => fit_spl_atf.sh} 
(50%)
 mode change 100644 => 100755

diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its 
b/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh
old mode 100644
new mode 100755
similarity index 50%
rename from board/theobroma-systems/puma_rk3399/fit_spl_atf.its
rename to board/theobroma-systems/puma_rk3399/fit_spl_atf.sh
index 530f059f3d..517fad40a1
--- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
+++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh
@@ -1,3 +1,31 @@
+#!/bin/sh
+#
+# Copyright (C) 2019 Jagan Teki 
+#
+# Based on the board/sunxi/mksunxi_fit_atf.sh
+#
+# Script to generate FIT image source for 64-bit puma boards with
+# U-Boot proper, ATF, PMU firmware and devicetree.
+#
+# usage: $0  [ [&2
+   echo "Please read Building section in doc/README.rockchip" >&2
+   BL31=/dev/null
+fi
+
+[ -z "$PMUM0" ] && PMUM0="rk3399m0.bin"
+
+if [ ! -f $PMUM0 ]; then
+   echo "WARNING: PMUM0 file $PMUM0 NOT found, resulting binary is 
non-functional" >&2
+   echo "Please read Building section in doc/README.rockchip" >&2
+   PMUM0=/dev/null
+fi
+
+cat << __HEADER_EOF
 /* SPDX-License-Identifier: GPL-2.0+ OR X11 */
 /*
  * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
@@ -14,16 +42,15 @@
images {
uboot {
description = "U-Boot (64-bit)";
-   data = /incbin/("../../../u-boot-nodtb.bin");
+   data = /incbin/("u-boot-nodtb.bin");
type = "standalone";
-   os = "U-Boot";
arch = "arm64";
compression = "none";
-   load = <0x0020>;
+   load = <0x4a00>;
};
atf {
description = "ARM Trusted Firmware";
-   data = /incbin/("../../../bl31-rk3399.bin");
+   data = /incbin/("$BL31");
type = "firmware";
arch = "arm64";
os = "arm-trusted-firmware";
@@ -33,17 +60,20 @@
};
pmu {
description = "Cortex-M0 firmware";
-   data = /incbin/("../../../rk3399m0.bin");
+   data = /incbin/("$PMUM0");
type = "pmu-firmware";
compression = "none";
load = <0x18>;
 };
fdt {
description = "RK3399-Q7 (Puma) flat device-tree";
-   data = /incbin/("../../../u-boot.dtb");
+   data = /incbin/("u-boot.dtb");
type = "flat_dt";
compression = "none";
};
+__HEADER_EOF
+
+cat << __CONF_HEADER_EOF
};
 
configurations {
@@ -54,5 +84,9 @@
loadables = "uboot", "pmu";
fdt = "fdt";
};
+__CONF_HEADER_EOF
+
+cat << __ITS_EOF
};
 };
+__ITS_EOF
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index e5ea2fe0b3..98b2dd6f02 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -15,7 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEBUG_UART=y
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/puma_rk3399/fit_spl_atf.its"
+CONFIG_SPL_FIT_GENERATOR="board/theobroma-systems/puma_rk3399/fit_spl_atf.sh"
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
 CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_CPUINFO is not set
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 98a3824e2c..88a4593392 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -137,8 +137,8 @@ For example:
=> cd arm-trusted-firmware
=> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk339

[U-Boot] [PATCH v2 2/9] Makefile: clean bl31_*.bin

2019-04-28 Thread Jagan Teki
Rockchip platform has its python script that would generate various
bl31_*bin for creating u-boot.itb file by taking bl31.elf as input.

These bl31_*.bin files are generated in u-boot root directory and
have no rule to clean it up. so add support for it by adding in
command entry of clean target in Makefile.

Signed-off-by: Jagan Teki 
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 54e8fedff0..ba0cce9f33 100644
--- a/Makefile
+++ b/Makefile
@@ -1782,7 +1782,7 @@ clean: $(clean-dirs)
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
-type f -print | xargs rm -f \
-   image.map
+   bl31_*.bin image.map
 
 # mrproper - Delete all generated files, including .config
 #
-- 
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[U-Boot] [PATCH v2 6/9] Kconfig: Add u-boot.itb BUILD_TARGET for Rockchip

2019-04-28 Thread Jagan Teki
Add u-boot.itb BUILD_TARGET for Rockchip platform when SPL_LOAD_FIT
is being used.

This can get rid of building itb explicitly with 'make u-boot.itb'
so, from now all required images will build just by make.

Signed-off-by: Jagan Teki 
---
 Kconfig | 2 +-
 doc/README.rockchip | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/Kconfig b/Kconfig
index 5679a288ec..7e918e5c37 100644
--- a/Kconfig
+++ b/Kconfig
@@ -230,7 +230,7 @@ config BUILD_TARGET
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
default "u-boot-elf.srec" if RCAR_GEN3
-   default "u-boot.itb" if SPL_LOAD_FIT && ARCH_SUNXI
+   default "u-boot.itb" if SPL_LOAD_FIT && (ROCKCHIP_RK3399 || ARCH_SUNXI)
default "u-boot.kwb" if KIRKWOOD
help
  Some SoCs need special image types (e.g. U-Boot binary
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 88a4593392..c4e5f83da7 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -103,7 +103,6 @@ For example:
  => cd /path/to/u-boot
  => make nanopi-neo4-rk3399_defconfig
  => make
- => make u-boot.itb
 
- Get the rkbin
 
@@ -170,7 +169,6 @@ For example:
  => cd /path/to/u-boot
  => make orangepi-rk3399_defconfig
  => make
- => make u-boot.itb
 
  (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
   spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL)
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 9/9] rockchip: rk3399: Create single image using BINMAN

2019-04-28 Thread Jagan Teki
RK3399 platform has two stage boot loaders like SPL and
U-Boot proper. For each stage we need to burn the image
on to flash with respective offsets.

This patch create a single image using binman, so that
user can get rid of burning different stage boot images.

without this patch:
--
₹ sudo dd if=spl/u-boot-spl-rockchip.bin of=/dev/sdc seek=64
₹ sudo dd if=u-boot.itb of=/dev/sdc seek=16384

with this patch:
---
₹ sudo dd if=u-boot-rockchip-with-spl.bin of=/dev/sdc seek=64

This would easily extend if other rockchip family SoC's would
make use of single image creation.

Signed-off-by: Jagan Teki 
---
 Makefile| 13 +
 arch/arm/dts/rk3399-ficus-u-boot.dtsi   |  1 +
 arch/arm/dts/rk3399-rock960-u-boot.dtsi |  1 +
 arch/arm/dts/rk3399-u-boot.dtsi | 17 +
 arch/arm/mach-rockchip/Kconfig  |  1 +
 doc/README.rockchip |  8 ++--
 include/configs/rk3399_common.h |  2 ++
 7 files changed, 37 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 2471340c71..0fe7ac3cc0 100644
--- a/Makefile
+++ b/Makefile
@@ -851,6 +851,11 @@ ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy)
 ALL-y += u-boot-sunxi-with-spl.bin
 endif
 
+# Build a combined spl + u-boot image for rockchip
+ifdef CONFIG_ROCKCHIP_RK3399
+ALL-$(CONFIG_ARCH_ROCKCHIP) += u-boot-rockchip-with-spl.bin
+endif
+
 # enable combined SPL/u-boot/dtb rules for tegra
 ifeq ($(CONFIG_TEGRA)$(CONFIG_SPL),yy)
 ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
@@ -1366,6 +1371,11 @@ u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb 
FORCE
 endif
 endif
 
+ifeq ($(CONFIG_ROCKCHIP_RK3399),y)
+u-boot-rockchip-with-spl.bin: spl/u-boot-spl-rockchip.bin u-boot.itb FORCE
+   @$(call if_changed,binman)
+endif # CONFIG_ROCKCHIP_RK3399
+
 ifneq ($(CONFIG_TEGRA),)
 ifneq ($(CONFIG_BINMAN),)
 # Makes u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin
@@ -1664,6 +1674,9 @@ spl/u-boot-spl: tools prepare \
 spl/sunxi-spl.bin: spl/u-boot-spl
@:
 
+spl/u-boot-spl-rockchip.bin: spl/u-boot-spl
+   @:
+
 spl/sunxi-spl-with-ecc.bin: spl/sunxi-spl.bin
@:
 
diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi 
b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
index eab86bdb30..67b63a8352 100644
--- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
@@ -3,4 +3,5 @@
  * Copyright (C) 2019 Jagan Teki 
  */
 
+#include "rk3399-u-boot.dtsi"
 #include "rk3399-sdram-ddr3-1600.dtsi"
diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi 
b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
index 5256f6d3f2..7fb5072a9b 100644
--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
@@ -3,4 +3,5 @@
  * Copyright (C) 2019 Jagan Teki 
  */
 
+#include "rk3399-u-boot.dtsi"
 #include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 0786c1193a..abd0b091ab 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -3,6 +3,23 @@
  * Copyright (C) 2019 Jagan Teki 
  */
 
+#include 
+
+/ {
+   binman {
+   filename = "u-boot-rockchip-with-spl.bin";
+   pad-byte = <0xff>;
+
+   blob {
+   filename = "spl/u-boot-spl-rockchip.bin";
+   };
+
+   u-boot-img {
+   offset = ;
+   };
+   };
+};
+
 &sdmmc {
u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 286c870135..7ac0ee3c2d 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -130,6 +130,7 @@ endif
 config ROCKCHIP_RK3399
bool "Support Rockchip RK3399"
select ARM64
+   select BINMAN
select SUPPORT_SPL
select SPL
select SPL_ATF
diff --git a/doc/README.rockchip b/doc/README.rockchip
index ccb9a7..4ceb383bb7 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -422,13 +422,9 @@ Option 2: Package the image with SPL:
 
 => cd /path/to/u-boot
 
-  - Write prefixed SPL at 64th sector
+  - Write single spl + u-boot at 64th sector
 
-=> sudo dd if=spl/u-boot-spl-rockchip.bin of=/dev/sdc seek=64
-
-  - Write U-Boot proper at 16384 sector
-
-=> sudo dd if=u-boot.itb of=/dev/sdc seek=16384
+=> sudo dd if=u-boot-rockchip-with-spl.bin of=/dev/sdc seek=64
 => sync
 
 Put this SD (or micro-SD) card into your board and reset it. You should see
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index b412012582..a658f03ade 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -38,6 +38,8 @@
 #define CONFIG_SYS_SDRAM_BASE  0
 #define SDRAM_MAX_SIZE 0xf800
 
+#define CONFIG_SPL_PAD_TO  8355840
+
 #ifndef CONFIG_SPL_BUILD
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-- 
2.18.0.321.gffc6fa0e

[U-Boot] [PATCH v2 8/9] dts: Makefile: Build rockchip dtbs based on SoC types

2019-04-28 Thread Jagan Teki
Sometimes u-boot specific dts nodes or properties can use
from config macros from respective rockchip family include/configs
files, example CONFIG_SPL_PAD_TO.

So, it's better to compile the dtbs based on the respective
rockchip family types rather than rockchip itself to avoid
compilation issues.

This patch organize the existing dtb's based on the rockchip
family types.

Signed-off-by: Jagan Teki 
---
 arch/arm/dts/Makefile | 35 ++-
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a2911fa2fd..0f9d6b7d0d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -60,11 +60,19 @@ dtb-$(CONFIG_KIRKWOOD) += \
 dtb-$(CONFIG_ARCH_OWL) += \
bubblegum_96.dtb
 
-dtb-$(CONFIG_ARCH_ROCKCHIP) += \
-   rk3036-sdk.dtb \
-   rk3128-evb.dtb \
-   rk3188-radxarock.dtb \
-   rk3229-evb.dtb \
+dtb-$(CONFIG_ROCKCHIP_RK3036) += \
+   rk3036-sdk.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3128) += \
+   rk3128-evb.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3188) += \
+   rk3188-radxarock.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK322X) += \
+   rk3229-evb.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3288) += \
rk3288-evb.dtb \
rk3288-fennec.dtb \
rk3288-firefly.dtb \
@@ -77,14 +85,20 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-veyron-mickey.dtb \
rk3288-veyron-minnie.dtb \
rk3288-veyron-speedy.dtb \
-   rk3288-vyasa.dtb \
-   rk3328-evb.dtb \
-   rk3399-ficus.dtb \
+   rk3288-vyasa.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3328) += \
+   rk3328-evb.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-lion.dtb \
rk3368-sheep.dtb \
rk3368-geekbox.dtb \
rk3368-px5-evb.dtb \
+
+dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-evb.dtb \
+   rk3399-ficus.dtb \
rk3399-firefly.dtb \
rk3399-gru-bob.dtb \
rk3399-nanopc-t4.dtb \
@@ -96,9 +110,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3399-puma-ddr1866.dtb \
rk3399-rock-pi-4.dtb \
rk3399-rock960.dtb \
-   rk3399-rockpro64.dtb \
+   rk3399-rockpro64.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
rv1108-evb.dtb
+
 dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-odroidc2.dtb \
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH] mips: rename arch mt7620 to mt7628

2019-04-28 Thread Weijie Gao
The MediaTek MT7620 and MT7628 SoCs are different.
Although they use the same memory controller, the lowlevel code (CPU PLL)
and other peripherals they use are totally different. Which means they
should use seperate mach directories.

Currently the mach mt7620 contains only architecture code of MT7628.
In case we add real arch support of MT7620 in the future, the arch should
be renamed to mt7628, including both Kconfig files and directories.
Other files affected are also modified.

Cc: Stefan Roese 
Cc: Daniel Schwierzeck 
Signed-off-by: Weijie Gao 
---
 arch/mips/Kconfig|  6 +++---
 arch/mips/Makefile   |  2 +-
 arch/mips/dts/Makefile   |  2 +-
 arch/mips/{mach-mt7620 => mach-mt7628}/Kconfig   | 16 
 arch/mips/{mach-mt7620 => mach-mt7628}/Makefile  |  0
 arch/mips/{mach-mt7620 => mach-mt7628}/cpu.c |  0
 .../{mach-mt7620 => mach-mt7628}/ddr_calibrate.c |  0
 .../{mach-mt7620 => mach-mt7628}/lowlevel_init.S |  0
 arch/mips/{mach-mt7620 => mach-mt7628}/mt76xx.h  |  0
 configs/linkit-smart-7688-ram_defconfig  |  2 +-
 configs/linkit-smart-7688_defconfig  |  2 +-
 drivers/gpio/Kconfig |  2 +-
 drivers/net/Kconfig  |  2 +-
 drivers/spi/Kconfig  |  2 +-
 drivers/watchdog/Kconfig |  2 +-
 15 files changed, 19 insertions(+), 19 deletions(-)
 rename arch/mips/{mach-mt7620 => mach-mt7628}/Kconfig (92%)
 rename arch/mips/{mach-mt7620 => mach-mt7628}/Makefile (100%)
 rename arch/mips/{mach-mt7620 => mach-mt7628}/cpu.c (100%)
 rename arch/mips/{mach-mt7620 => mach-mt7628}/ddr_calibrate.c (100%)
 rename arch/mips/{mach-mt7620 => mach-mt7628}/lowlevel_init.S (100%)
 rename arch/mips/{mach-mt7620 => mach-mt7628}/mt76xx.h (100%)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 194f4f349e..fc861c8273 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -74,8 +74,8 @@ config ARCH_BMIPS
select SYSRESET
imply CMD_DM
 
-config ARCH_MT7620
-   bool "Support MT7620/7688 SoCs"
+config ARCH_MT7628
+   bool "Support MediaTek MT7628/7688 SoCs"
imply CMD_DM
select DISPLAY_CPUINFO
select DM
@@ -153,7 +153,7 @@ source "arch/mips/mach-mscc/Kconfig"
 source "arch/mips/mach-bmips/Kconfig"
 source "arch/mips/mach-jz47xx/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
-source "arch/mips/mach-mt7620/Kconfig"
+source "arch/mips/mach-mt7628/Kconfig"
 
 if MIPS
 
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 029d290f1e..da5b9c0e74 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -15,7 +15,7 @@ machine-$(CONFIG_ARCH_ATH79) += ath79
 machine-$(CONFIG_ARCH_BMIPS) += bmips
 machine-$(CONFIG_ARCH_JZ47XX) += jz47xx
 machine-$(CONFIG_MACH_PIC32) += pic32
-machine-$(CONFIG_ARCH_MT7620) += mt7620
+machine-$(CONFIG_ARCH_MT7628) += mt7628
 machine-$(CONFIG_ARCH_MSCC) += mscc
 
 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 3522e6cdc8..1c4ad5207d 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 
-dtb-$(CONFIG_ARCH_MT7620) += \
+dtb-$(CONFIG_ARCH_MT7628) += \
gardena-smart-gateway-mt7688.dtb \
linkit-smart-7688.dtb
 dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
diff --git a/arch/mips/mach-mt7620/Kconfig b/arch/mips/mach-mt7628/Kconfig
similarity index 92%
rename from arch/mips/mach-mt7620/Kconfig
rename to arch/mips/mach-mt7628/Kconfig
index a983443999..6a46640479 100644
--- a/arch/mips/mach-mt7620/Kconfig
+++ b/arch/mips/mach-mt7628/Kconfig
@@ -1,20 +1,20 @@
-menu "MediaTek MIPS platforms"
-   depends on ARCH_MT7620
+menu "MediaTek MT7628/7688 platforms"
+   depends on ARCH_MT7628
 
 config SYS_MALLOC_F_LEN
default 0x1000
 
 config SYS_SOC
-   default "mt7620" if SOC_MT7620
+   default "mt7628" if SOC_MT7628
 
 choice
prompt "MediaTek MIPS SoC select"
 
-config SOC_MT7620
-   bool "MT7620/8"
+config SOC_MT7628
+   bool "MT7628/7688"
select MIPS_L1_CACHE_SHIFT_5
help
- This supports MediaTek MIPS MT7620 family.
+ This supports MediaTek MT7628/7688 SoCs.
 
 endchoice
 
@@ -23,7 +23,7 @@ choice
 
 config BOARD_GARDENA_SMART_GATEWAY_MT7688
bool "GARDENA smart Gateway"
-   depends on SOC_MT7620
+   depends on SOC_MT7628
select BOARD_LATE_INIT
select SUPPORTS_BOOT_RAM
help
@@ -32,7 +32,7 @@ config BOARD_GARDENA_SMART_GATEWAY_MT7688
 
 config BOARD_LINKIT_SMART_7688
bool "LinkIt Smart 7688"
-   depends on SOC_MT7620
+   depends on SOC_MT7628
select SUPPORTS_BOOT_RAM
help
  Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM
diff --git a/arch/mips/mach-mt7620/Makefile b/arch/mips/mach-mt7628/Makefile
similarity index 100%
rename fr

[U-Boot] [PATCH] drivers: core: use strcmp when find device by name

2019-04-28 Thread Peng Fan
`if (!strncmp(dev->name, name, strlen(name)))` might find out
the wrong device, it might find out `dram_pll_ref_sel`, when name is
`dram_pll`. So use strcmp to avoid such issue.

Signed-off-by: Peng Fan 
---
 drivers/core/uclass.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index fc3157de39..e2f35393a9 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -260,7 +260,7 @@ int uclass_find_device_by_name(enum uclass_id id, const 
char *name,
return ret;
 
uclass_foreach_dev(dev, uc) {
-   if (!strncmp(dev->name, name, strlen(name))) {
+   if (!strcmp(dev->name, name)) {
*devp = dev;
return 0;
}
-- 
2.16.4

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Re: [U-Boot] [PATCH] rockchip: make_fit_atf: Use BL31 environ variable for file location

2019-04-28 Thread Mark Kettenis
> From: Jagan Teki 
> Date: Sun, 28 Apr 2019 14:38:06 +0530
> 
> On Sat, Apr 27, 2019 at 6:17 PM Emmanuel Vadot  wrote:
> >
> >
> >  Hi Jagan,
> >
> > On Sun, 21 Apr 2019 22:42:45 +0530
> > Jagan Teki  wrote:
> >
> > > On Tue, Feb 5, 2019 at 4:24 PM Emmanuel Vadot  wrote:
> > > >
> > > > Other make_fit script (like imx or sunxi) use the BL31 environment
> > > > variable to indicate the location of the file.
> > > > Also do that for rockchip so we don't need to copy the file in the 
> > > > source
> > > > directory.
> > > >
> > > > Signed-off-by: Emmanuel Vadot 
> > > > ---
> > > >  arch/arm/mach-rockchip/make_fit_atf.py | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
> > > > b/arch/arm/mach-rockchip/make_fit_atf.py
> > > > index d1faff1957..7bf58e3dd1 100755
> > > > --- a/arch/arm/mach-rockchip/make_fit_atf.py
> > > > +++ b/arch/arm/mach-rockchip/make_fit_atf.py
> > > > @@ -194,7 +194,7 @@ def get_bl31_segments_info(bl31_file_name):
> > > >
> > > >  def main():
> > > >  uboot_elf="./u-boot"
> > > > -bl31_elf="./bl31.elf"
> > > > +bl31_elf=os.getenv("BL31", "./bl31.elf")
> > >
> > > Have similar change on my repo.
> > >
> > > Better through warning for non BL31 like
> > >
> > > if "BL31ELF" in os.environ:
> > >bl31_elf=os.getenv("BL31ELF");
> > >else:
> > >   sys.exit("ERROR: Please export BL31ELF file, check
> > > board/rockchip/evb_rk3399/README)
> >
> >  I didn't error for the same reason we don't on Allwinner, CI don't
> > copy this file as part of the test. Yes this does result in a
> > non-working u-boot but the goal of thoses test is just to compile.
> >  mksunxi_fit_atf.sh prints a warning, maybe I should just do the same ?
> >  Phillipp, what's your view on this ?
> 
> Yes, ie what I thought of. I have handle this in BINMAN series, please
> have look and comment.
> 
> >
> > > And BL31ELF would be proper env than BL31 since rockchip build would
> > > require elf and other one has bin, IMHO.
> >
> >  This change is fine with me.
> 
> I think we can go with BL31 itself since we need to compatible with
> existing platforms.

Right.  Consistency is good.
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Re: [U-Boot] [PATCH 3/5] spi: add spi-mem driver for MediaTek MT7629 SoC

2019-04-28 Thread Jagan Teki
On Sun, Apr 28, 2019 at 6:54 AM Weijie Gao  wrote:
>
> On Sat, 2019-04-27 at 21:38 +0530, Jagan Teki wrote:
> > On Fri, Apr 26, 2019 at 2:53 PM Weijie Gao  wrote:
> > >
> > > This patch adds spi-mem driver for MediaTek MT7629 SoC to access SPI-NOR
> > > and SPI-NAND flashes.
> > >
> > > Cc: Jagan Teki 
> > > Signed-off-by: Weijie Gao 
> > > ---
> > >  drivers/spi/Kconfig  |   9 ++
> > >  drivers/spi/Makefile |   1 +
> > >  drivers/spi/mtk_spimem.c | 325 
> > > +++
> >
> > Do we really need spimen on the name? I prefer spi as it is, what is
> > the notation used by Linux I think spi itself, please check it.
>
> This controller is originally designed for accessing SPI-NAND flashes.
> How about the name mtk-snfi, which means Serial NAND(NOR) flash
> interface?

is the same name used in Linux?
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Re: [U-Boot] [PATCH 2/4] mvebu: turris_omnia: remove redundant code

2019-04-28 Thread Baruch Siach
Hi Marek,

On Thu, Apr 25 2019, Marek Behún wrote:
> The i2c slave disabling is done by mvtwsi driver and is not needed here.
>
> Signed-off-by: Marek Behún 
> Cc: Baruch Siach 
> ---
>  board/CZ.NIC/turris_omnia/turris_omnia.c | 11 ---
>  1 file changed, 11 deletions(-)
>
> diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c 
> b/board/CZ.NIC/turris_omnia/turris_omnia.c
> index c21d2f3ffa..c446f471a6 100644
> --- a/board/CZ.NIC/turris_omnia/turris_omnia.c
> +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
> @@ -297,8 +297,6 @@ static int set_regdomain(void)
>  
>  int board_early_init_f(void)
>  {
> - u32 i2c_debug_reg;
> -
>   /* Configure MPP */
>   writel(0x, MVEBU_MPP_BASE + 0x00);
>   writel(0x, MVEBU_MPP_BASE + 0x04);
> @@ -321,15 +319,6 @@ int board_early_init_f(void)
>   writel(OMNIA_GPP_OUT_ENA_LOW, MVEBU_GPIO0_BASE + 0x04);
>   writel(OMNIA_GPP_OUT_ENA_MID, MVEBU_GPIO1_BASE + 0x04);
>  
> - /*
> -  * Disable I2C debug mode blocking 0x64 I2C address.
> -  * Note: that would be redundant once Turris Omnia migrates to DM_I2C,
> -  * because the mvtwsi driver includes equivalent code.
> -  */

As this comment notes, Turris Omnia needs to migrate to DM_I2C before
removing this code. The non DM code path in the mvtwsi driver does not
disable the debug I2C client.

Is there a pending patch that enables DM_I2C for Turris Omnia?

> - i2c_debug_reg = readl(MVEBU_TWSI_BASE + MVTWSI_ARMADA_DEBUG_REG);
> - i2c_debug_reg &= ~(1<<18);
> - writel(i2c_debug_reg, MVEBU_TWSI_BASE + MVTWSI_ARMADA_DEBUG_REG);
> -
>   return 0;
>  }

baruch

-- 
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=}ooO--U--Ooo{=
   - bar...@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -
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Re: [U-Boot] [REGRESSION] [PATCH] imx: add lowlevel init for ARM64

2019-04-28 Thread Stefano Babic


On 27/04/19 01:58, Peng Fan wrote:
> Hi Marcel,
> 
> Please apply this patch, Joe has not pick it up.
> https://patchwork.ozlabs.org/patch/1085432/
> 
> Stefano,
> 
> Would you pick it up?

It is acked by Joe, i assign the patch to me in patchwork and I pick it up.

Regards,
Stefano

> 
> 
>> Subject: [REGRESSION] [PATCH] imx: add lowlevel init for ARM64
>>
>> Hi Peng and Stefano
>>
>> Unfortunately, this seems to break Ethernet on Colibri iMX8X:
>>
>> => dhcp
>> "Error" handler, esr 0xbf02
>> elr: 80049664 lr : 8004964c (reloc)
>> elr: ffef6664 lr : ffef664c
>> x0 : 5b040288 x1 : 0001
>> x2 : fd6c5ff4 x3 : 0020
>> x4 : fd6c5ff0 x5 : 0020
>> x6 : ffef079c x7 : fd6f1600
>> x8 : 0044 x9 : 0008
>> x10: fd6d1620 x11: fd6d3a10
>> x12:  x13: 0200
>> x14: fd6c62cc x15: 0002
>> x16: 2080 x17: 
>> x18: fd6cada8 x19: fd6d1160
>> x20: 0200 x21: 5b040300
>> x22: fd6f1000 x23: fd6cfdf0
>> x24: 8000 x25: 
>> x26:  x27: 
>> x28: fd6d15c0 x29: fd6c6030
>>
>> Resetting CPU ...
>>
>> resetting ...
>>
>> Reverting commit 5955c6eeb453 ("imx: add lowlevel init for ARM64") makes
>> it work again.
>>
>> Unfortunately, I don't have a MEK in my home office but will check Ethernet
>> operation there on Monday as well.
>>
>> Anyway, does anybody know what exactly is going on?
> 
> Regards,
> Peng.
> 
>>
>> Cheers
>>
>> Marcel
>>
>> On Mon, 2019-04-15 at 05:20 +, Peng Fan wrote:
>>> Sometimes we met SERROR, but only to catch it when Linux boots up.
>>> Let's enable catching in U-Boot to catch it ealier and ease debug.
>>>
>>> Signed-off-by: Peng Fan 
>>> ---
>>>  arch/arm/mach-imx/Makefile   |  2 +-
>>>  arch/arm/mach-imx/lowlevel.S | 22 ++
>>>  2 files changed, 23 insertions(+), 1 deletion(-)  create mode 100644
>>> arch/arm/mach-imx/lowlevel.S
>>>
>>> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
>>> index c3ed62aed6..37675d0558 100644
>>> --- a/arch/arm/mach-imx/Makefile
>>> +++ b/arch/arm/mach-imx/Makefile
>>> @@ -204,7 +204,7 @@ endif
>>>
>>>  targets += $(addprefix ../../../,SPL spl/u-boot-spl.cfgout u-boot-
>>> dtb.cfgout u-boot.cfgout u-boot.uim spl/u-boot-nand-spl.imx)
>>>
>>> -obj-$(CONFIG_ARM64) += sip.o
>>> +obj-$(CONFIG_ARM64) += lowlevel.o sip.o
>>>
>>>  obj-$(CONFIG_MX5) += mx5/
>>>  obj-$(CONFIG_MX6) += mx6/
>>> diff --git a/arch/arm/mach-imx/lowlevel.S b/arch/arm/mach-
>>> imx/lowlevel.S new file mode 100644 index 00..158fdb7d87
>>> --- /dev/null
>>> +++ b/arch/arm/mach-imx/lowlevel.S
>>> @@ -0,0 +1,22 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ */
>>> +/*
>>> + * Copyright 2019 NXP
>>> + */
>>> +
>>> +#include 
>>> +
>>> +ENTRY(lowlevel_init)
>>> +   mrs x0, CurrentEL
>>> +   cmp x0, #8
>>> +   b.eq1f
>>> +   ret
>>> +1:
>>> +   msr daifclr, #4
>>> +
>>> +   /* set HCR_EL2.AMO to catch SERROR */
>>> +   mrs x0, hcr_el2
>>> +   orr x0, x0, #0x20
>>> +   msr hcr_el2, x0
>>> +   isb
>>> +   ret
>>> +ENDPROC(lowlevel_init)
>>> --
>>> 2.16.4
>>>
>>> ___
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>>>
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>> 1635%7C
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Re: [U-Boot] [PATCH 1/1] cmd: efidebug: rework "boot dump" sub-command using GetNextVariableName()

2019-04-28 Thread Heinrich Schuchardt

On 4/26/19 2:44 AM, AKASHI Takahiro wrote:

Currently in do_efi_boot_dump(), we directly read EFI variables from
related environment variables. To accommodate alternative storage
backends, we should switch to using the UEFI API instead.

Signed-off-by: AKASHI Takahiro 


Reviewed-by: Heinrich Schuchardt 
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Re: [U-Boot] [REGRESSION] [PATCH] imx: add lowlevel init for ARM64

2019-04-28 Thread Joe Hershberger


> On Apr 28, 2019, at 12:52 PM, Stefano Babic  wrote:
> 
> 
> 
>> On 27/04/19 01:58, Peng Fan wrote:
>> Hi Marcel,
>> 
>> Please apply this patch, Joe has not pick it up.
>> https://patchwork.ozlabs.org/patch/1085432/
>> 
>> Stefano,
>> 
>> Would you pick it up?
> 
> It is acked by Joe, i assign the patch to me in patchwork and I pick it up.
> 
> Regards,
> Stefano
> 
>> 
>> 
>>> Subject: [REGRESSION] [PATCH] imx: add lowlevel init for ARM64
>>> 
>>> Hi Peng and Stefano
>>> 
>>> Unfortunately, this seems to break Ethernet on Colibri iMX8X:

Has this been addressed?

>>> 
>>> => dhcp
>>> "Error" handler, esr 0xbf02
>>> elr: 80049664 lr : 8004964c (reloc)
>>> elr: ffef6664 lr : ffef664c
>>> x0 : 5b040288 x1 : 0001
>>> x2 : fd6c5ff4 x3 : 0020
>>> x4 : fd6c5ff0 x5 : 0020
>>> x6 : ffef079c x7 : fd6f1600
>>> x8 : 0044 x9 : 0008
>>> x10: fd6d1620 x11: fd6d3a10
>>> x12:  x13: 0200
>>> x14: fd6c62cc x15: 0002
>>> x16: 2080 x17: 
>>> x18: fd6cada8 x19: fd6d1160
>>> x20: 0200 x21: 5b040300
>>> x22: fd6f1000 x23: fd6cfdf0
>>> x24: 8000 x25: 
>>> x26:  x27: 
>>> x28: fd6d15c0 x29: fd6c6030
>>> 
>>> Resetting CPU ...
>>> 
>>> resetting ...
>>> 
>>> Reverting commit 5955c6eeb453 ("imx: add lowlevel init for ARM64") makes
>>> it work again.
>>> 
>>> Unfortunately, I don't have a MEK in my home office but will check Ethernet
>>> operation there on Monday as well.
>>> 
>>> Anyway, does anybody know what exactly is going on?
>> 
>> Regards,
>> Peng.
>> 
>>> 
>>> Cheers
>>> 
>>> Marcel
>>> 
 On Mon, 2019-04-15 at 05:20 +, Peng Fan wrote:
 Sometimes we met SERROR, but only to catch it when Linux boots up.
 Let's enable catching in U-Boot to catch it ealier and ease debug.
 
 Signed-off-by: Peng Fan 
 ---
 arch/arm/mach-imx/Makefile   |  2 +-
 arch/arm/mach-imx/lowlevel.S | 22 ++
 2 files changed, 23 insertions(+), 1 deletion(-)  create mode 100644
 arch/arm/mach-imx/lowlevel.S
 
 diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
 index c3ed62aed6..37675d0558 100644
 --- a/arch/arm/mach-imx/Makefile
 +++ b/arch/arm/mach-imx/Makefile
 @@ -204,7 +204,7 @@ endif
 
 targets += $(addprefix ../../../,SPL spl/u-boot-spl.cfgout u-boot-
 dtb.cfgout u-boot.cfgout u-boot.uim spl/u-boot-nand-spl.imx)
 
 -obj-$(CONFIG_ARM64) += sip.o
 +obj-$(CONFIG_ARM64) += lowlevel.o sip.o
 
 obj-$(CONFIG_MX5) += mx5/
 obj-$(CONFIG_MX6) += mx6/
 diff --git a/arch/arm/mach-imx/lowlevel.S b/arch/arm/mach-
 imx/lowlevel.S new file mode 100644 index 00..158fdb7d87
 --- /dev/null
 +++ b/arch/arm/mach-imx/lowlevel.S
 @@ -0,0 +1,22 @@
 +/* SPDX-License-Identifier: GPL-2.0+ */
 +/*
 + * Copyright 2019 NXP
 + */
 +
 +#include 
 +
 +ENTRY(lowlevel_init)
 +mrsx0, CurrentEL
 +cmpx0, #8
 +b.eq1f
 +ret
 +1:
 +msr daifclr, #4
 +
 +/* set HCR_EL2.AMO to catch SERROR */
 +mrsx0, hcr_el2
 +orrx0, x0, #0x20
 +msrhcr_el2, x0
 +isb
 +ret
 +ENDPROC(lowlevel_init)
 --
 2.16.4
 
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>>> MgOTXlFEA
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Re: [U-Boot] [PATCH] rockchip: add Kever Yang as co-custodian

2019-04-28 Thread Philipp Tomsich
> This updates MAINTAINERS and git-mailrc to add me as a
> co-custodian for rockchip
> 
> Signed-off-by: Kever Yang 
> Reviewed-by: Philipp Tomsich 
> Acked-by: Philipp Tomsich 
> Acked-by: Jagan Teki 
> Acked-by: Tom Rini 
> ---
> 
>  MAINTAINERS| 1 +
>  doc/git-mailrc | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 

Applied to u-boot-rockchip, thanks!
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Re: [U-Boot] [PATCH v2 01/10] rockchip: enable DEBUG_UART_BOARD_INIT by default

2019-04-28 Thread Philipp Tomsich
> All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board
> UART IOMUX, enable it by default.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/Kconfig   | 1 +
>  arch/arm/mach-rockchip/Kconfig | 4 
>  2 files changed, 1 insertion(+), 4 deletions(-)
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [PATCH v2 02/10] rockchip; kylin-rk3036: enabl DEBUG UART

2019-04-28 Thread Philipp Tomsich
> Enable debug uart for kylin board in defconfig.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  configs/kylin-rk3036_defconfig | 4 
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [PATCH v2 05/10] rockchip: rk322x: move board_debug_uart_init() to rk322x.c

2019-04-28 Thread Philipp Tomsich
> Move the function to soc file so
> that we can find all the soc/board setting in soc file and
> use a common board file later for all rockchip SoCs.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk322x-board-spl.c | 44 ++-
>  arch/arm/mach-rockchip/rk322x-board.c | 30 +---
>  arch/arm/mach-rockchip/rk322x/Makefile|  2 +-
>  arch/arm/mach-rockchip/rk322x/rk322x.c| 44 +++
>  4 files changed, 48 insertions(+), 72 deletions(-)
>  create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [PATCH v2 03/10] rockchip: rk3036: add board_debug_uart_init()

2019-04-28 Thread Philipp Tomsich
> Use board_debug_uart_init() for UART iomux init instead of
> do it in board_init_f, and move the function to soc file so
> that we can find all the soc/board setting in soc file and
> use a common board file.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk3036-board-spl.c | 20 +---
>  arch/arm/mach-rockchip/rk3036/Makefile|  1 +
>  arch/arm/mach-rockchip/rk3036/rk3036.c| 39 +++
>  3 files changed, 41 insertions(+), 19 deletions(-)
>  create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [PATCH v2 04/10] rockchip: rk3188: add board_debug_uart_init()

2019-04-28 Thread Philipp Tomsich
> Use board_debug_uart_init() for UART iomux init instead of
> do it in board_init_f, and move the function to soc file so
> that we can find all the soc/board setting in soc file and
> use a common board file.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk3188-board-spl.c | 28 +-
>  arch/arm/mach-rockchip/rk3188/Makefile|  1 +
>  arch/arm/mach-rockchip/rk3188/rk3188.c| 36 +++
>  3 files changed, 38 insertions(+), 27 deletions(-)
>  create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [PATCH v2 08/10] rockchip: rk3368: move board_debug_uart_init() to rk3368.c

2019-04-28 Thread Philipp Tomsich
> Move the function to soc file so
> that we can find all the soc/board setting in soc file and
> use a common board file later for all rockchip SoCs.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk3368-board-spl.c |  8 --
>  arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +--
>  arch/arm/mach-rockchip/rk3368/rk3368.c| 31 +
>  3 files changed, 32 insertions(+), 40 deletions(-)
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [PATCH v2 07/10] rockchip: rk3288: add board_debug_uart_init()

2019-04-28 Thread Philipp Tomsich
> Use board_debug_uart_init() for UART iomux init instead of
> do it in board_init_f, and move the function to soc file so
> that we can find all the soc/board setting in soc file and
> use a common board file for all rockchip SoCs later.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk3288-board-spl.c | 12 ++--
>  arch/arm/mach-rockchip/rk3288-board-tpl.c | 16 ++--
>  arch/arm/mach-rockchip/rk3288/rk3288.c| 13 +
>  3 files changed, 17 insertions(+), 24 deletions(-)
> 

Reviewed-by: Philipp Tomsich 
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[U-Boot] [PATCH v2 12/19] spi: mpc8xxx: Make code more readable

2019-04-28 Thread Jagan Teki
From: Mario Six 

Introduce the to_prescale_mod and set_char_len inline functions to make
the code more readable.

Note that the added "if (bitlen > 16)" check does not change the
semantics of the current code, and hence only preserves the current
error (this will be fixed in a later patch in the series).

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 27 +++
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 2a0f3cc06a..83fd8b3cc1 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -30,6 +30,16 @@ enum {
SPI_COM_LST = BIT(31 - 9),
 };
 
+static inline u32 to_prescale_mod(u32 val)
+{
+   return (min(val, (u32)15) << 16);
+}
+
+static void set_char_len(spi8xxx_t *spi, u32 val)
+{
+   clrsetbits_be32(&spi->mode, SPI_MODE_LEN_MASK, (val << 20));
+}
+
 #define SPI_TIMEOUT1000
 
 struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
@@ -66,7 +76,7 @@ void spi_init(void)
 */
out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
/* Use SYSCLK / 8 (16.67MHz typ.) */
-   clrsetbits_be32(&spi->mode, 0x000f, BIT(16));
+   clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
/* Clear all SPI events */
setbits_be32(&spi->event, 0x);
/* Mask  all SPI interrupts */
@@ -119,13 +129,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 
clrbits_be32(&spi->mode, SPI_MODE_EN);
 
-   if (bitlen <= 4) {
-   clrsetbits_be32(&spi->mode, 0x00f0, (3 << 20));
-   } else if (bitlen <= 16) {
-   clrsetbits_be32(&spi->mode, 0x00f0,
-   ((bitlen - 1) << 20));
-   } else {
-   clrbits_be32(&spi->mode, 0x00f0);
+   if (bitlen <= 4)
+   set_char_len(spi, 3);
+   else if (bitlen <= 16)
+   set_char_len(spi, bitlen - 1);
+   else
+   set_char_len(spi, 0);
+
+   if (bitlen > 16) {
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 09/19] spi: mpc8xxx: Get rid of is_read

2019-04-28 Thread Jagan Teki
From: Mario Six 

Get rid of the is_read variable, and just keep the state of the "not
empty" and "not full" events in two boolean variables within the loop
body.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index ca34570901..962ef710f8 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -90,7 +90,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
uint tmpdout, tmpdin, event;
int num_blks = DIV_ROUND_UP(bitlen, 32);
-   int tm, is_read = 0;
+   int tm;
uchar char_size = 32;
 
debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
@@ -144,12 +144,14 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * or time out (1 second = 1000 ms)
 * The NE event must be read and cleared first
 */
-   for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
+   for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
event = in_be32(&spi->event);
-   if (event & SPI_EV_NE) {
+   bool have_ne = event & SPI_EV_NE;
+   bool have_nf = event & SPI_EV_NF;
+
+   if (have_ne) {
tmpdin = in_be32(&spi->rx);
setbits_be32(&spi->event, SPI_EV_NE);
-   is_read = 1;
 
*(u32 *)din = (tmpdin << (32 - char_size));
if (char_size == 32) {
@@ -163,7 +165,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * in the future put an arbitrary delay after writing
 * the device.  Arbitrary delays suck, though...
 */
-   if (is_read && (event & SPI_EV_NF))
+   if (have_ne && have_nf)
break;
}
if (tm >= SPI_TIMEOUT)
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 00/19] spi: Convert MPC8XXX to DM

2019-04-28 Thread Jagan Teki
This would be next version mpc8xxx dm conversion.

No functional changes in v2 apart from rebase, and this would
merge soon.

Changes for v2:
- rebase on master
- patch for SPI MIGRATION status

Any inputs?
Jagan.

Jagan Teki (2):
  spi: mpc8xxx: Convert to DM
  dm: MIGRATION: Update migration status for SPI

Mario Six (17):
  spi: mpc8xxx: Use short type names
  spi: mpc8xxx: Fix comments
  spi: mpc8xxx: Rename camel-case variables
  spi: mpc8xxx: Fix space after cast
  spi: mpc8xxx: Fix function names in strings
  spi: mpc8xxx: Replace defines with enums
  spi: mpc8xxx: Use IO accessors
  spi: mpc8xxx: Simplify if
  spi: mpc8xxx: Get rid of is_read
  spi: mpc8xxx: Simplify logic a bit
  spi: mpc8xxx: Reduce scope of loop variables
  spi: mpc8xxx: Make code more readable
  spi: mpc8xxx: Rename variable
  spi: mpc8xxx: Document LEN setting better
  spi: mpc8xxx: Re-order transfer setup
  spi: mpc8xxx: Fix if check
  spi: mpc8xxx: Use get_timer

 doc/driver-model/MIGRATION.txt |   6 +-
 drivers/spi/Kconfig|  10 +-
 drivers/spi/mpc8xxx_spi.c  | 279 ++---
 3 files changed, 194 insertions(+), 101 deletions(-)

-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 13/19] spi: mpc8xxx: Rename variable

2019-04-28 Thread Jagan Teki
From: Mario Six 

The variable "char_size" holds the number of bits to be transferred in
the current loop iteration. A better name would be "xfer_bitlen", which
we rename this variable to.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 83fd8b3cc1..63d956a295 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -114,10 +114,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
while (num_blks--) {
int tm;
u32 tmpdout = 0;
-   uchar char_size = (bitlen >= 32 ? 32 : bitlen);
+   uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);
 
/* Shift data so it's msb-justified */
-   tmpdout = *(u32 *)dout >> (32 - char_size);
+   tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
 
/* The LEN field of the SPMODE register is set as follows:
 *
@@ -165,8 +165,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
tmpdin = in_be32(&spi->rx);
setbits_be32(&spi->event, SPI_EV_NE);
 
-   *(u32 *)din = (tmpdin << (32 - char_size));
-   if (char_size == 32) {
+   *(u32 *)din = (tmpdin << (32 - xfer_bitlen));
+   if (xfer_bitlen == 32) {
/* Advance output buffer by 32 bits */
din += 4;
}
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 03/19] spi: mpc8xxx: Rename camel-case variables

2019-04-28 Thread Jagan Teki
From: Mario Six 

There are three variables that have camel-case names, which is not the
preferred naming style.

Give those variables more compliant names instead.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 3016cfe2ca..0393765b6f 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -77,9 +77,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
 {
volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
uint tmpdout, tmpdin, event;
-   int numBlks = DIV_ROUND_UP(bitlen, 32);
-   int tm, isRead = 0;
-   uchar charSize = 32;
+   int num_blks = DIV_ROUND_UP(bitlen, 32);
+   int tm, is_read = 0;
+   uchar char_size = 32;
 
debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
  slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
@@ -91,12 +91,12 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
spi->event = 0x;
 
/* Handle data in 32-bit chunks */
-   while (numBlks--) {
+   while (num_blks--) {
tmpdout = 0;
-   charSize = (bitlen >= 32 ? 32 : bitlen);
+   char_size = (bitlen >= 32 ? 32 : bitlen);
 
/* Shift data so it's msb-justified */
-   tmpdout = *(u32 *) dout >> (32 - charSize);
+   tmpdout = *(u32 *) dout >> (32 - char_size);
 
/* The LEN field of the SPMODE register is set as follows:
 *
@@ -134,15 +134,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * or time out (1 second = 1000 ms)
 * The NE event must be read and cleared first
 */
-   for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) {
+   for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
event = spi->event;
if (event & SPI_EV_NE) {
tmpdin = spi->rx;
spi->event |= SPI_EV_NE;
-   isRead = 1;
+   is_read = 1;
 
-   *(u32 *) din = (tmpdin << (32 - charSize));
-   if (charSize == 32) {
+   *(u32 *) din = (tmpdin << (32 - char_size));
+   if (char_size == 32) {
/* Advance output buffer by 32 bits */
din += 4;
}
@@ -153,7 +153,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * in the future put an arbitrary delay after writing
 * the device.  Arbitrary delays suck, though...
 */
-   if (isRead && (event & SPI_EV_NF))
+   if (is_read && (event & SPI_EV_NF))
break;
}
if (tm >= SPI_TIMEOUT)
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 17/19] spi: mpc8xxx: Use get_timer

2019-04-28 Thread Jagan Teki
From: Mario Six 

The comment before the transmission loop in conjunction with the
definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to
have a timeout value of 1000 ms. But since there is no mdelay(1) or
similar in the loop body, the loop just runs 1000 times, without regard
for the time elapsed.

To correct this, use the standard get_timer functionality to properly
time out the loop after 1000 ms.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index e09e91c8e9..63e1a150f8 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -112,9 +112,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 
/* Handle data in 32-bit chunks */
while (num_blks--) {
-   int tm;
u32 tmpdout = 0;
uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);
+   ulong start;
 
clrbits_be32(&spi->mode, SPI_MODE_EN);
 
@@ -148,7 +148,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * or time out (1 second = 1000 ms)
 * The NE event must be read and cleared first
 */
-   for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
+   start = get_timer(0);
+   do {
u32 event = in_be32(&spi->event);
bool have_ne = event & SPI_EV_NE;
bool have_nf = event & SPI_EV_NF;
@@ -173,9 +174,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 */
if (have_nf)
break;
-   }
 
-   if (tm >= SPI_TIMEOUT)
+   mdelay(1);
+   } while (get_timer(start) < SPI_TIMEOUT);
+
+   if (get_timer(start) >= SPI_TIMEOUT)
debug("*** %s: Time out during SPI transfer\n",
  __func__);
 
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 10/19] spi: mpc8xxx: Simplify logic a bit

2019-04-28 Thread Jagan Teki
From: Mario Six 

We do nothing in the loop if the "not empty" event was not detected. To
simplify the logic, check if this is the case, and skip the execution of
the loop early to reduce the nesting level and flag checking.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 23 +--
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 962ef710f8..a2e698ea17 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -149,25 +149,28 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
bool have_ne = event & SPI_EV_NE;
bool have_nf = event & SPI_EV_NF;
 
-   if (have_ne) {
-   tmpdin = in_be32(&spi->rx);
-   setbits_be32(&spi->event, SPI_EV_NE);
-
-   *(u32 *)din = (tmpdin << (32 - char_size));
-   if (char_size == 32) {
-   /* Advance output buffer by 32 bits */
-   din += 4;
-   }
+   if (!have_ne)
+   continue;
+
+   tmpdin = in_be32(&spi->rx);
+   setbits_be32(&spi->event, SPI_EV_NE);
+
+   *(u32 *)din = (tmpdin << (32 - char_size));
+   if (char_size == 32) {
+   /* Advance output buffer by 32 bits */
+   din += 4;
}
+
/*
 * Only bail when we've had both NE and NF events.
 * This will cause timeouts on RO devices, so maybe
 * in the future put an arbitrary delay after writing
 * the device.  Arbitrary delays suck, though...
 */
-   if (have_ne && have_nf)
+   if (have_nf)
break;
}
+
if (tm >= SPI_TIMEOUT)
debug("*** %s: Time out during SPI transfer\n",
  __func__);
-- 
2.18.0.321.gffc6fa0e3

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Re: [U-Boot] [PATCH v2 10/10] rockchip: rk3399: add board_debug_uart_init()

2019-04-28 Thread Philipp Tomsich
> Use board_debug_uart_init() for UART iomux init instead of
> do it in board_init_f, and move the function to soc file so
> that we can find all the soc/board setting in soc file and
> use a common board file for all rockchip SoCs later.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk3399-board-spl.c | 50 +--
>  arch/arm/mach-rockchip/rk3399/rk3399.c| 50 +++
>  2 files changed, 51 insertions(+), 49 deletions(-)
> 

Reviewed-by: Philipp Tomsich 
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[U-Boot] [PATCH v2 06/19] spi: mpc8xxx: Replace defines with enums

2019-04-28 Thread Jagan Teki
From: Mario Six 

Replace pre-processor defines with proper enums, and use the BIT macro
where applicable.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 26 +++---
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 91b639f1e6..7b2ab1e4af 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -10,13 +10,25 @@
 #include 
 #include 
 
-#define SPI_EV_NE  (0x8000 >> 22)  /* Receiver Not Empty */
-#define SPI_EV_NF  (0x8000 >> 23)  /* Transmitter Not Full */
-
-#define SPI_MODE_LOOP  (0x8000 >> 1)   /* Loopback mode */
-#define SPI_MODE_REV   (0x8000 >> 5)   /* Reverse mode - MSB first */
-#define SPI_MODE_MS(0x8000 >> 6)   /* Always master */
-#define SPI_MODE_EN(0x8000 >> 7)   /* Enable interface */
+enum {
+   SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
+   SPI_EV_NF = BIT(31 - 23),   /* Transmitter Not Full */
+};
+
+enum {
+   SPI_MODE_LOOP  = BIT(31 - 1),   /* Loopback mode */
+   SPI_MODE_CI= BIT(31 - 2),   /* Clock invert */
+   SPI_MODE_CP= BIT(31 - 3),   /* Clock phase */
+   SPI_MODE_DIV16 = BIT(31 - 4),   /* Divide clock source by 16 */
+   SPI_MODE_REV   = BIT(31 - 5),   /* Reverse mode - MSB first */
+   SPI_MODE_MS= BIT(31 - 6),   /* Always master */
+   SPI_MODE_EN= BIT(31 - 7),   /* Enable interface */
+
+   SPI_MODE_LEN_MASK = 0xf0,
+   SPI_MODE_PM_MASK = 0xf,
+
+   SPI_COM_LST = BIT(31 - 9),
+};
 
 #define SPI_TIMEOUT1000
 
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 01/19] spi: mpc8xxx: Use short type names

2019-04-28 Thread Jagan Teki
From: Mario Six 

The function signatures in the driver are quite long as is. Use short
type names (uint etc.) to make them more readable.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 8d6d86d2b0..0c77f95159 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -20,8 +20,7 @@
 
 #define SPI_TIMEOUT1000
 
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
-   unsigned int max_hz, unsigned int mode)
+struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
 {
struct spi_slave *slave;
 
@@ -68,17 +67,16 @@ int spi_claim_bus(struct spi_slave *slave)
 
 void spi_release_bus(struct spi_slave *slave)
 {
-
 }
 
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
-   void *din, unsigned long flags)
+int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
+ulong flags)
 {
volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
-   unsigned int tmpdout, tmpdin, event;
+   uint tmpdout, tmpdin, event;
int numBlks = DIV_ROUND_UP(bitlen, 32);
int tm, isRead = 0;
-   unsigned char charSize = 32;
+   uchar charSize = 32;
 
debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
  slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
-- 
2.18.0.321.gffc6fa0e3

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Re: [U-Boot] [PATCH v2 09/10] rockchip: rk3399: use grf structure to access reg

2019-04-28 Thread Philipp Tomsich
> Prefer to use structure to access register if we could.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk3399/rk3399.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 

Reviewed-by: Philipp Tomsich 
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Re: [U-Boot] [PATCH v2 06/10] rockchip: rk3288: use grf structure to access soc_con2

2019-04-28 Thread Philipp Tomsich
> Prefer to use structure to access register if we can.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  arch/arm/mach-rockchip/rk3288/rk3288.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 

Reviewed-by: Philipp Tomsich 
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[U-Boot] [PATCH v2 11/19] spi: mpc8xxx: Reduce scope of loop variables

2019-04-28 Thread Jagan Teki
From: Mario Six 

The transmission loop starts with setting some variables, which are only
used inside the loop. Reduce the scope to the loop to make the
declaration and initialization of these variables coincide.

In the case of char_size this also always initializes the variable
immediately with the final value actually used in the loop (instead of
the placeholder value 32).

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index a2e698ea17..2a0f3cc06a 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -88,10 +88,8 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 ulong flags)
 {
spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
-   uint tmpdout, tmpdin, event;
+   u32 tmpdin;
int num_blks = DIV_ROUND_UP(bitlen, 32);
-   int tm;
-   uchar char_size = 32;
 
debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
  slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
@@ -104,8 +102,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 
/* Handle data in 32-bit chunks */
while (num_blks--) {
-   tmpdout = 0;
-   char_size = (bitlen >= 32 ? 32 : bitlen);
+   int tm;
+   u32 tmpdout = 0;
+   uchar char_size = (bitlen >= 32 ? 32 : bitlen);
 
/* Shift data so it's msb-justified */
tmpdout = *(u32 *)dout >> (32 - char_size);
@@ -145,7 +144,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * The NE event must be read and cleared first
 */
for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
-   event = in_be32(&spi->event);
+   u32 event = in_be32(&spi->event);
bool have_ne = event & SPI_EV_NE;
bool have_nf = event & SPI_EV_NF;
 
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 14/19] spi: mpc8xxx: Document LEN setting better

2019-04-28 Thread Jagan Teki
From: Mario Six 

Instead of having a table right before the code implementing the length
setting for documentation, have inline comments for the if branches
actually implementing the length setting described table's entries
(which is readable thanks to the set_char_len function).

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 16 +---
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 63d956a295..1dd5bd9799 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -119,21 +119,15 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
/* Shift data so it's msb-justified */
tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
 
-   /* The LEN field of the SPMODE register is set as follows:
-*
-* Bit length setting
-* len <= 4   3
-* 4 < len <= 16  len - 1
-* len > 16   0
-*/
-
clrbits_be32(&spi->mode, SPI_MODE_EN);
 
-   if (bitlen <= 4)
+   /* Set up length for this transfer */
+
+   if (bitlen <= 4) /* 4 bits or less */
set_char_len(spi, 3);
-   else if (bitlen <= 16)
+   else if (bitlen <= 16) /* at most 16 bits */
set_char_len(spi, bitlen - 1);
-   else
+   else /* more than 16 bits -> full 32 bit transfer */
set_char_len(spi, 0);
 
if (bitlen > 16) {
-- 
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[U-Boot] [PATCH v2 04/19] spi: mpc8xxx: Fix space after cast

2019-04-28 Thread Jagan Teki
From: Mario Six 

Fix all "superfluous space after case" style errors.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 0393765b6f..1424e7febe 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -82,7 +82,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
uchar char_size = 32;
 
debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
- slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen);
+ slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
 
if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);
@@ -96,7 +96,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
char_size = (bitlen >= 32 ? 32 : bitlen);
 
/* Shift data so it's msb-justified */
-   tmpdout = *(u32 *) dout >> (32 - char_size);
+   tmpdout = *(u32 *)dout >> (32 - char_size);
 
/* The LEN field of the SPMODE register is set as follows:
 *
@@ -141,7 +141,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
spi->event |= SPI_EV_NE;
is_read = 1;
 
-   *(u32 *) din = (tmpdin << (32 - char_size));
+   *(u32 *)din = (tmpdin << (32 - char_size));
if (char_size == 32) {
/* Advance output buffer by 32 bits */
din += 4;
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 18/19] spi: mpc8xxx: Convert to DM

2019-04-28 Thread Jagan Teki
Support DM in the MPC8xxx SPI driver, and remove the legacy SPI
interface.

Signed-off-by: Mario Six 
Signed-off-by: Jagan Teki 
---
 drivers/spi/Kconfig   |  10 +--
 drivers/spi/mpc8xxx_spi.c | 144 --
 2 files changed, 112 insertions(+), 42 deletions(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index fb794adae7..e196f64e2f 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -131,6 +131,11 @@ config MPC8XX_SPI
help
  Enable support for SPI on MPC8XX
 
+config MPC8XXX_SPI
+   bool "MPC8XXX SPI Driver"
+   help
+ Enable support for SPI on the MPC8XXX PowerPC SoCs.
+
 config MT7621_SPI
bool "MediaTek MT7621 SPI driver"
depends on ARCH_MT7620
@@ -364,11 +369,6 @@ config LPC32XX_SSP
help
  Enable support for SPI on LPC32xx
 
-config MPC8XXX_SPI
-   bool "MPC8XXX SPI Driver"
-   help
- Enable support for SPI on the MPC8XXX PowerPC SoCs.
-
 config MXC_SPI
bool "MXC SPI Driver"
help
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 63e1a150f8..1c7bf10f91 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -5,10 +5,12 @@
  */
 
 #include 
-
+#include 
+#include 
 #include 
 #include 
 #include 
+#include 
 
 enum {
SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
@@ -30,6 +32,12 @@ enum {
SPI_COM_LST = BIT(31 - 9),
 };
 
+struct mpc8xxx_priv {
+   spi8xxx_t *spi;
+   struct gpio_desc gpios[16];
+   int max_cs;
+};
+
 static inline u32 to_prescale_mod(u32 val)
 {
return (min(val, (u32)15) << 16);
@@ -42,70 +50,90 @@ static void set_char_len(spi8xxx_t *spi, u32 val)
 
 #define SPI_TIMEOUT1000
 
-struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
+static int __spi_set_speed(spi8xxx_t *spi, uint speed)
 {
-   struct spi_slave *slave;
+   /* TODO(mario@gdsys.cc): This only ever sets one fixed speed */
 
-   if (!spi_cs_is_valid(bus, cs))
-   return NULL;
-
-   slave = spi_alloc_slave_base(bus, cs);
-   if (!slave)
-   return NULL;
-
-   /*
-* TODO: Some of the code in spi_init() should probably move
-* here, or into spi_claim_bus() below.
-*/
+   /* Use SYSCLK / 8 (16.67MHz typ.) */
+   clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
 
-   return slave;
+   return 0;
 }
 
-void spi_free_slave(struct spi_slave *slave)
+static int mpc8xxx_spi_ofdata_to_platdata(struct udevice *dev)
 {
-   free(slave);
+   struct mpc8xxx_priv *priv = dev_get_priv(dev);
+   int ret;
+
+   priv->spi = (spi8xxx_t *)dev_read_addr(dev);
+
+   /* TODO(mario@gdsys.cc): Read clock and save the value */
+
+   ret = gpio_request_list_by_name(dev, "gpios", priv->gpios,
+   ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | 
GPIOD_ACTIVE_LOW);
+   if (ret < 0)
+   return -EINVAL;
+
+   priv->max_cs = ret;
+
+   return 0;
 }
 
-void spi_init(void)
+static int mpc8xxx_spi_probe(struct udevice *dev)
 {
-   spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
+   struct mpc8xxx_priv *priv = dev_get_priv(dev);
 
/*
 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
 * some registers
 */
-   out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
-   /* Use SYSCLK / 8 (16.67MHz typ.) */
-   clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
+   out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
+
+   __spi_set_speed(priv->spi, 1667);
+
/* Clear all SPI events */
-   setbits_be32(&spi->event, 0x);
+   setbits_be32(&priv->spi->event, 0x);
/* Mask  all SPI interrupts */
-   clrbits_be32(&spi->mask, 0x);
+   clrbits_be32(&priv->spi->mask, 0x);
/* LST bit doesn't do anything, so disregard */
-   out_be32(&spi->com, 0);
+   out_be32(&priv->spi->com, 0);
+
+   return 0;
 }
 
-int spi_claim_bus(struct spi_slave *slave)
+static void mpc8xxx_spi_cs_activate(struct udevice *dev)
 {
-   return 0;
+   struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
+   struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
+
+   dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT);
+   dm_gpio_set_value(&priv->gpios[platdata->cs], 0);
 }
 
-void spi_release_bus(struct spi_slave *slave)
+static void mpc8xxx_spi_cs_deactivate(struct udevice *dev)
 {
+   struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
+   struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
+
+   dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT);
+   dm_gpio_set_value(&priv->gpios[platdata->cs], 1);
 }
 
-int spi_xfer(struct spi_slave *slave, uint bit

[U-Boot] [PATCH v2 08/19] spi: mpc8xxx: Simplify if

2019-04-28 Thread Jagan Teki
From: Mario Six 

Instead of having a nested if block, just have two branches within the
overarching if block to eliminate one nesting level.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index da9e1e3f98..ca34570901 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -120,13 +120,11 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 
clrbits_be32(&spi->mode, SPI_MODE_EN);
 
-   if (bitlen <= 16) {
-   if (bitlen <= 4)
-   clrsetbits_be32(&spi->mode, 0x00f0,
-   (3 << 20));
-   else
-   clrsetbits_be32(&spi->mode, 0x00f0,
-   ((bitlen - 1) << 20));
+   if (bitlen <= 4) {
+   clrsetbits_be32(&spi->mode, 0x00f0, (3 << 20));
+   } else if (bitlen <= 16) {
+   clrsetbits_be32(&spi->mode, 0x00f0,
+   ((bitlen - 1) << 20));
} else {
clrbits_be32(&spi->mode, 0x00f0);
/* Set up the next iteration if sending > 32 bits */
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 19/19] dm: MIGRATION: Update migration status for SPI

2019-04-28 Thread Jagan Teki
Now, we have few driver are fully converted into dm and few
are partially converted.

So, update the migration status accordingly.

Signed-off-by: Jagan Teki 
---
 doc/driver-model/MIGRATION.txt | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/doc/driver-model/MIGRATION.txt b/doc/driver-model/MIGRATION.txt
index df659f3dd9..d38be3538a 100644
--- a/doc/driver-model/MIGRATION.txt
+++ b/doc/driver-model/MIGRATION.txt
@@ -59,10 +59,7 @@ No dm conversion yet:
drivers/spi/cf_spi.c
drivers/spi/fsl_espi.c
drivers/spi/lpc32xx_ssp.c
-   drivers/spi/mpc8xx_spi.c
-   drivers/spi/mpc8xxx_spi.c
drivers/spi/mxs_spi.c
-   drivers/spi/sh_qspi.c
drivers/spi/sh_spi.c
drivers/spi/soft_spi_legacy.c
 
@@ -70,13 +67,12 @@ No dm conversion yet:
Deadline: 2019.04
 
 Partially converted:
-   drivers/spi/atcspi200_spi.c
drivers/spi/davinci_spi.c
drivers/spi/fsl_dspi.c
-   drivers/spi/fsl_qspi.c
drivers/spi/kirkwood_spi.c
drivers/spi/mxc_spi.c
drivers/spi/omap3_spi.c
+   drivers/spi/sh_qspi.c
 
Status: In progress
Deadline: 2019.07
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 16/19] spi: mpc8xxx: Fix if check

2019-04-28 Thread Jagan Teki
From: Mario Six 

Decreasing the bit length and increasing the write data pointer should
be done when there are more than 32 bit of data, not 16 bit.

This did not produce incorrect behavior, because the only time where the
two checks produce different outcomes is the case of 16 < bitlen < 32,
and in this case the subsequent transmission is the last one regardless,
hence the additional bit length decrease and write data pointer increase
has no effect anyway.

Still, the correct check is the check for "bitlen > 32", so correct this
behavior.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 1e7c0144c2..e09e91c8e9 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -132,7 +132,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
/* Shift data so it's msb-justified */
tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
 
-   if (bitlen > 16) {
+   if (bitlen > 32) {
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 07/19] spi: mpc8xxx: Use IO accessors

2019-04-28 Thread Jagan Teki
From: Mario Six 

Accesses to the register map are currently done by directly reading and
writing the structure.

Switch to the appropriate IO accessors instead.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 38 +++---
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 7b2ab1e4af..da9e1e3f98 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -58,21 +58,21 @@ void spi_free_slave(struct spi_slave *slave)
 
 void spi_init(void)
 {
-   volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
+   spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
 
/*
 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
 * some registers
 */
-   spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
+   out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
/* Use SYSCLK / 8 (16.67MHz typ.) */
-   spi->mode = (spi->mode & 0xfff0) | BIT(16);
+   clrsetbits_be32(&spi->mode, 0x000f, BIT(16));
/* Clear all SPI events */
-   spi->event = 0x;
+   setbits_be32(&spi->event, 0x);
/* Mask  all SPI interrupts */
-   spi->mask = 0x;
+   clrbits_be32(&spi->mask, 0x);
/* LST bit doesn't do anything, so disregard */
-   spi->com = 0;
+   out_be32(&spi->com, 0);
 }
 
 int spi_claim_bus(struct spi_slave *slave)
@@ -87,7 +87,7 @@ void spi_release_bus(struct spi_slave *slave)
 int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
 ulong flags)
 {
-   volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
+   spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
uint tmpdout, tmpdin, event;
int num_blks = DIV_ROUND_UP(bitlen, 32);
int tm, is_read = 0;
@@ -100,7 +100,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
spi_cs_activate(slave);
 
/* Clear all SPI events */
-   spi->event = 0x;
+   setbits_be32(&spi->event, 0x);
 
/* Handle data in 32-bit chunks */
while (num_blks--) {
@@ -118,26 +118,26 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * len > 16   0
 */
 
-   spi->mode &= ~SPI_MODE_EN;
+   clrbits_be32(&spi->mode, SPI_MODE_EN);
 
if (bitlen <= 16) {
if (bitlen <= 4)
-   spi->mode = (spi->mode & 0xff0f) |
-   (3 << 20);
+   clrsetbits_be32(&spi->mode, 0x00f0,
+   (3 << 20));
else
-   spi->mode = (spi->mode & 0xff0f) |
-   ((bitlen - 1) << 20);
+   clrsetbits_be32(&spi->mode, 0x00f0,
+   ((bitlen - 1) << 20));
} else {
-   spi->mode = (spi->mode & 0xff0f);
+   clrbits_be32(&spi->mode, 0x00f0);
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
}
 
-   spi->mode |= SPI_MODE_EN;
+   setbits_be32(&spi->mode, SPI_MODE_EN);
 
/* Write the data out */
-   spi->tx = tmpdout;
+   out_be32(&spi->tx, tmpdout);
 
debug("*** %s: ... %08x written\n", __func__, tmpdout);
 
@@ -147,10 +147,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 * The NE event must be read and cleared first
 */
for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
-   event = spi->event;
+   event = in_be32(&spi->event);
if (event & SPI_EV_NE) {
-   tmpdin = spi->rx;
-   spi->event |= SPI_EV_NE;
+   tmpdin = in_be32(&spi->rx);
+   setbits_be32(&spi->event, SPI_EV_NE);
is_read = 1;
 
*(u32 *)din = (tmpdin << (32 - char_size));
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 02/19] spi: mpc8xxx: Fix comments

2019-04-28 Thread Jagan Teki
From: Mario Six 

There are some comments on the same line as the code they document. Put
comments above the code lines they document, so the line length is not
unnecessarily increased.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 22 ++
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 0c77f95159..3016cfe2ca 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -53,11 +53,14 @@ void spi_init(void)
 * some registers
 */
spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
-   spi->mode = (spi->mode & 0xfff0) | BIT(16); /* Use SYSCLK / 8
-(16.67MHz typ.) */
-   spi->event = 0x;/* Clear all SPI events */
-   spi->mask = 0x; /* Mask  all SPI interrupts */
-   spi->com = 0;   /* LST bit doesn't do anything, so disregard */
+   /* Use SYSCLK / 8 (16.67MHz typ.) */
+   spi->mode = (spi->mode & 0xfff0) | BIT(16);
+   /* Clear all SPI events */
+   spi->event = 0x;
+   /* Mask  all SPI interrupts */
+   spi->mask = 0x;
+   /* LST bit doesn't do anything, so disregard */
+   spi->com = 0;
 }
 
 int spi_claim_bus(struct spi_slave *slave)
@@ -84,9 +87,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);
 
-   spi->event = 0x;/* Clear all SPI events */
+   /* Clear all SPI events */
+   spi->event = 0x;
 
-   /* handle data in 32-bit chunks */
+   /* Handle data in 32-bit chunks */
while (numBlks--) {
tmpdout = 0;
charSize = (bitlen >= 32 ? 32 : bitlen);
@@ -120,7 +124,9 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
 
spi->mode |= SPI_MODE_EN;
 
-   spi->tx = tmpdout;  /* Write the data out */
+   /* Write the data out */
+   spi->tx = tmpdout;
+
debug("*** spi_xfer: ... %08x written\n", tmpdout);
 
/*
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 15/19] spi: mpc8xxx: Re-order transfer setup

2019-04-28 Thread Jagan Teki
From: Mario Six 

Minize the time the adapter is disabled (via SPI_MODE_EN
clearing/setting) to just the character length setting, and only set up
the temporary data writing variable right before we need it, so there is
a more clear distinction between setting up the SPI adapter, and setting
up the data to be written.

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 1dd5bd9799..1e7c0144c2 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -116,9 +116,6 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
u32 tmpdout = 0;
uchar xfer_bitlen = (bitlen >= 32 ? 32 : bitlen);
 
-   /* Shift data so it's msb-justified */
-   tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
-
clrbits_be32(&spi->mode, SPI_MODE_EN);
 
/* Set up length for this transfer */
@@ -130,14 +127,17 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
else /* more than 16 bits -> full 32 bit transfer */
set_char_len(spi, 0);
 
+   setbits_be32(&spi->mode, SPI_MODE_EN);
+
+   /* Shift data so it's msb-justified */
+   tmpdout = *(u32 *)dout >> (32 - xfer_bitlen);
+
if (bitlen > 16) {
/* Set up the next iteration if sending > 32 bits */
bitlen -= 32;
dout += 4;
}
 
-   setbits_be32(&spi->mode, SPI_MODE_EN);
-
/* Write the data out */
out_be32(&spi->tx, tmpdout);
 
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2 05/19] spi: mpc8xxx: Fix function names in strings

2019-04-28 Thread Jagan Teki
From: Mario Six 

Replace the function name with a "%s" format string and the __func__
variable in debug statements (as proposed by checkpatch).

Signed-off-by: Mario Six 
---
 drivers/spi/mpc8xxx_spi.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 1424e7febe..91b639f1e6 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -81,7 +81,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const void 
*dout, void *din,
int tm, is_read = 0;
uchar char_size = 32;
 
-   debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
+   debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
  slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
 
if (flags & SPI_XFER_BEGIN)
@@ -127,7 +127,7 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
/* Write the data out */
spi->tx = tmpdout;
 
-   debug("*** spi_xfer: ... %08x written\n", tmpdout);
+   debug("*** %s: ... %08x written\n", __func__, tmpdout);
 
/*
 * Wait for SPI transmit to get out
@@ -157,9 +157,10 @@ int spi_xfer(struct spi_slave *slave, uint bitlen, const 
void *dout, void *din,
break;
}
if (tm >= SPI_TIMEOUT)
-   puts("*** spi_xfer: Time out during SPI transfer");
+   debug("*** %s: Time out during SPI transfer\n",
+ __func__);
 
-   debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
+   debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin);
}
 
if (flags & SPI_XFER_END)
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 0/8] spi: Mark non-dm spi drivers as BROKEN

2019-04-28 Thread Jagan Teki
We have trigger a zap patches about the legacy spi driver
which are not converted into dm, but the seems like most
of the associated developers are unaware about the migration
plan for SPI.

So, as per Tom request and make the removal smooth mark 
these non-dm drivers into BROKEN. The configs which enabled 
these drivers are now getting warnings saying that the resulting 
.config has broken config enabled and more over the code associated
with these configs will be removed in v2019.07 release.

Any inputs?
Jagan.

Jagan Teki (8):
  Kconfig: Update CONFIG_BROKEN help text
  Makefile: Trigger a Warning if BROKEN defined
  Makefile: Trigger a warning for legcay spi drivers
  spi: Kconfig: Mark MXS_SPI has BROKEN
  spi: Kconfig: Mark SH_SPI has BROKEN
  spi: Kconfig: Mark SOFT_SPI has BROKEN
  spi: Kconfig: Mark FSL_ESPI has BROKEN
  spi: Kconfig: Mark LPC32XX_SSP has BROKEN

 Kconfig |  7 ++-
 Makefile| 19 ---
 drivers/spi/Kconfig |  5 +
 3 files changed, 19 insertions(+), 12 deletions(-)

-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 3/8] Makefile: Trigger a warning for legcay spi drivers

2019-04-28 Thread Jagan Teki
We have a warning text for non dm converted spi drivers,
but the plan is to mark all these respetive drivers into
CONFIG_BROKEN.

So, trigger a warning saying that these driver configurations
and associated code will remove in v2019.07 (earlier plan is
to remove it from v2019.04)

Signed-off-by: Jagan Teki 
---
 Makefile | 16 +---
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/Makefile b/Makefile
index 02c9a73d33..4971f211ff 100644
--- a/Makefile
+++ b/Makefile
@@ -920,6 +920,11 @@ cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \
 all:   $(ALL-y)
 ifeq ($(CONFIG_BROKEN),y)
$(warning "You have broken configuration in your .config! Please check 
your configuration.")
+ifeq ($(CONFIG_SPI),y)
+ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy)
+   $(warning "The relevant config item with associated code will remove in 
v2019.07 release.")
+endif
+endif
 endif # broken
 ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
@echo >&2 "= WARNING =="
@@ -997,17 +1002,6 @@ ifeq ($(CONFIG_OF_EMBED),y)
@echo >&2 "See doc/README.fdt-control for more info."
@echo >&2 ""
 endif
-ifeq ($(CONFIG_SPI),y)
-ifneq ($(CONFIG_DM_SPI)$(CONFIG_OF_CONTROL),yy)
-   @echo >&2 "= WARNING =="
-   @echo >&2 "This board does not use CONFIG_DM_SPI. Please update"
-   @echo >&2 "the board before v2019.04 for no dm conversion"
-   @echo >&2 "and v2019.07 for partially dm converted drivers."
-   @echo >&2 "Failure to update can lead to driver/board removal"
-   @echo >&2 "See doc/driver-model/MIGRATION.txt for more info."
-   @echo >&2 ""
-endif
-endif
 ifeq ($(CONFIG_SPI_FLASH),y)
 ifneq ($(CONFIG_DM_SPI_FLASH)$(CONFIG_OF_CONTROL),yy)
@echo >&2 "= WARNING =="
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 6/8] spi: Kconfig: Mark SOFT_SPI has BROKEN

2019-04-28 Thread Jagan Teki
Mark SOFT_SPI has BROKEN, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.

Cc: Vasily Khoruzhick 
Signed-off-by: Jagan Teki 
---
 drivers/spi/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index ad66e310e1..9e2eba47f7 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -308,6 +308,7 @@ endif # if DM_SPI
 
 config SOFT_SPI
bool "Soft SPI driver"
+   select BROKEN if !DM_SPI
help
 Enable Soft SPI driver. This driver is to use GPIO simulate
 the SPI protocol.
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 8/8] spi: Kconfig: Mark LPC32XX_SSP has BROKEN

2019-04-28 Thread Jagan Teki
Mark LPC32XX_SSP has BROKEN, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.

Cc: Vladimir Zapolskiy 
Cc: Albert ARIBAUD 
Signed-off-by: Jagan Teki 
---
 drivers/spi/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 55f0d6cf2b..5fbe17bb20 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -369,6 +369,7 @@ config KIRKWOOD_SPI
 
 config LPC32XX_SSP
bool "LPC32XX SPI Driver"
+   select BROKEN
help
  Enable support for SPI on LPC32xx
 
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 2/8] Makefile: Trigger a Warning if BROKEN defined

2019-04-28 Thread Jagan Teki
If configured target has broken config enabled, trigger a warning
saying that the desired .config has broken configuration.

Cc: Heinrich Schuchardt 
Signed-off-by: Jagan Teki 
---
 Makefile | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Makefile b/Makefile
index 66a09ac900..02c9a73d33 100644
--- a/Makefile
+++ b/Makefile
@@ -918,6 +918,9 @@ cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \
$(srctree)/scripts/config_whitelist.txt $(srctree)
 
 all:   $(ALL-y)
+ifeq ($(CONFIG_BROKEN),y)
+   $(warning "You have broken configuration in your .config! Please check 
your configuration.")
+endif # broken
 ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
@echo >&2 "= WARNING =="
@echo >&2 "This board uses CONFIG_DM_I2C_COMPAT. Please remove"
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 1/8] Kconfig: Update CONFIG_BROKEN help text

2019-04-28 Thread Jagan Teki
Add bool text to describe what configurations is this for.

Update help text to describe the example use-case configs
which comes under CONFIG_BROKEN, they are
- legacy driver that would need dm conversion.
- legacy driver that doesn't have proper update since
  from the releases.

Cc: Heinrich Schuchardt 
Signed-off-by: Jagan Teki 
---
 Kconfig | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Kconfig b/Kconfig
index 7a5491bd67..eb3c2d04d3 100644
--- a/Kconfig
+++ b/Kconfig
@@ -15,11 +15,16 @@ source "arch/Kconfig"
 menu "General setup"
 
 config BROKEN
-   bool
+   bool "Broken configuration"
help
  This option cannot be enabled. It is used as dependency
  for broken and incomplete features.
 
+ These broken configurations may comes under,
+ - legacy driver that would need dm conversion.
+ - legacy driver that doesn't have proper update since
+   from the releases.
+
 config LOCALVERSION
string "Local version - append to U-Boot release"
help
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 5/8] spi: Kconfig: Mark SH_SPI has BROKEN

2019-04-28 Thread Jagan Teki
Mark SH_SPI has BROKEN, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.

Signed-off-by: Jagan Teki 
---
 drivers/spi/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 393382fee2..ad66e310e1 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -348,6 +348,7 @@ config DAVINCI_SPI
 
 config SH_SPI
bool "SuperH SPI driver"
+   select BROKEN
help
  Enable the SuperH SPI controller driver. This driver can be used
  on various SuperH SoCs, such as SH7757.
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 7/8] spi: Kconfig: Mark FSL_ESPI has BROKEN

2019-04-28 Thread Jagan Teki
Mark FSL_ESPI has BROKEN, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.

Cc: Oleksandr Zhadan and Michael Durrant 
Signed-off-by: Jagan Teki 
---
 drivers/spi/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 9e2eba47f7..55f0d6cf2b 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -328,6 +328,7 @@ config CF_SPI
 
 config FSL_ESPI
bool "Freescale eSPI driver"
+   select BROKEN
help
  Enable the Freescale eSPI driver. This driver can be used to
  access the SPI interface and SPI NOR flash on platforms embedding
-- 
2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH 4/8] spi: Kconfig: Mark MXS_SPI has BROKEN

2019-04-28 Thread Jagan Teki
Mark MXS_SPI has BROKEN, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.

Cc: Marek Vasut 
Cc: Fabio Estevam 
Cc: Michael Trimarchi 
Signed-off-by: Jagan Teki 
---
 drivers/spi/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index e196f64e2f..393382fee2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -377,6 +377,7 @@ config MXC_SPI
 
 config MXS_SPI
bool "MXS SPI Driver"
+   select BROKEN
help
  Enable the MXS SPI controller driver. This driver can be used
  on the i.MX23 and i.MX28 SoCs.
-- 
2.18.0.321.gffc6fa0e3

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Re: [U-Boot] [PATCH 1/1] lib/display_options: avoid illegal memory access

2019-04-28 Thread Simon Glass
On Fri, 26 Apr 2019 at 10:39, Heinrich Schuchardt  wrote:
>
> display_options_get_banner_priv() overwrites bytes before the start of the
> buffer if the buffer size is less then 3. This case occurs in the Sandbox
> when executing the `ut_print` command.
>
> Correctly handle small buffer sizes. Adjust the print unit test to catch
> when bytes before the buffer are overwritten.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
> I will take the patch via the u-boot-efi repository.
> ---
>  lib/display_options.c |  4 +++-
>  test/print_ut.c   | 20 
>  2 files changed, 15 insertions(+), 9 deletions(-)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] rk8xx: implement poweroff

2019-04-28 Thread Simon Glass
Hi Urja,

On Fri, 26 Apr 2019 at 04:47, Urja Rannikko  wrote:
>
> Hi,
>
> On Wed, Apr 24, 2019 at 3:54 AM Simon Glass  wrote:
> >
> > Hi,
> >
> > On Wed, 3 Apr 2019 at 06:21, Urja Rannikko  wrote:
> > >
> > > Based on snooping around the linux kernel rk8xx driver, and
> > > tested to work on the ASUS C201.
> > >
> > > Signed-off-by: Urja Rannikko 
> > > ---
> > > This is really handy to be able to poweroff (without pressing power button
> > > for a long time) the C201 from u-boot, so i'm sending this as is.
> > > The thing that is bothering me is the pmic_get --- i checked that
> > > every rk8xx is named "pmic" in the device tree so it should work, but
> > > it just feels really weird that this seems to be the best way to access
> > > the driver...
> > >
> > >  drivers/power/pmic/rk8xx.c | 34 ++
> > >  include/power/rk8xx_pmic.h |  4 
> > >  2 files changed, 38 insertions(+)
> >
> > This should really use a sysreset driver.
> Thanks for the pointer since it wasnt very obvious because there isnt
> really any code that does this right now (nor does "sysreset" make one
> think of poweroff...).

Yes, and that was only recently added to the sysreset uclass.

See for example http://patchwork.ozlabs.org/patch/1091216/

>
> > You can make the PMIC have a child sysreset driver to implement this 
> > function.
> I looked for an example of this (even partial), and the only one i
> found was in drivers/power/pmic/stpmic1.c - so I assume like that but
> instead implement SYSRESET_POWER_OFF (could also implement
> SYSRESET_POWER, but that is kinda outside the scope of what i need
> right now...).

If in doubt sandbox is already a good thing to look for. E.g.
drivers/power/pmic/sandbox.c

>
> And then add a generic sysreset-based poweroff command implementation.

Sounds good - CONFIG_CMD_POWEROFF perhaps. Or maybe we should have a
'sysreset' command with sub-commands for warm, cold, power reset and
power off? We could make the existing 'reset' command use sysreset if
CONFIG_SYSRESET is enabled.

>
> (I'm just saying my ideas out loud before implementing them so that
> you have a chance to say if they're all wrong, regardless i'll be back
> with patches when i have a moment to work on this...)
>

Yes good idea. Whatever you do, sandbox is a great test environment
for new commands.

Regards,
Simon
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Re: [U-Boot] [PATCH 2/2] disk: efi: ignore 'IGNOREME' GPT header found on cros eMMCs

2019-04-28 Thread Simon Glass
Hi Urja,

On Fri, 26 Apr 2019 at 04:26, Urja Rannikko  wrote:
>
> Hi Simon,
>
> On Wed, Apr 24, 2019 at 3:54 AM Simon Glass  wrote:
> >
> > Hi Urja,
> 
> >
> > Could we add a Kconfig to control this? Other devices shouldn't have this 
> > code.
> I suppose i can do that... but I will need to know all the devices
> that do this -
> I'd assume atleast jerry, minnie and speedy but maybe also rk3399
> chromeos devices?
>
> I'm thinking basically an ifdef around the check in is_gpt_valid and
> let gcc optimize the rest of the code (test for 2) out, and then

How about a new 'SUPPORT_CHROMEOS' Kconfig which implies your new
CONFIG below? You could enable it on configs/*chrome*

See if you can use

   if (IS_ENABLED(CONFIG_xx))

instead of #ifdef.

> select the Kconfig (ummm maybe CONFIG_IGNORE_CROS_IGNOREME_GPT or do

Maybe just CONFIG_CROS_GPT.

> you have better ideas?) for the appropriate boards.
>
> --
> Urja Rannikko

Regards,
Simon
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Re: [U-Boot] uboot of platdata question

2019-04-28 Thread Simon Glass
Hi Peng,

On Thu, 25 Apr 2019 at 02:37, Peng Fan  wrote:
>
> Hi Simon,
>
> We have such piece dtb in device tree, however with SPL_OF_PLATDATA, it 
> failed to compile.
> It could not correct get address-cells/size-cells from cpus node. Actually
> It not find the address-cell/size-cell property from cpus node. Do you have
> any suggestions?
>
> /{
> cpus {
> #address-cells = <2>;
> #size-cells = <0>;
>
> /* We have 1 clusters having 4 Cortex-A35 cores */
> A35_0: cpu@0 {
> device_type = "cpu";
> compatible = "arm,cortex-a35";
> reg = <0x0 0x0>;
> enable-method = "psci";
> next-level-cache = <&A35_L2>;
> };
>
> Traceback (most recent call last):
>   File "./tools/dtoc/dtoc", line 109, in 
> options.output)
>   File 
> "/home/Freenix/work/sw-stash/uboot-upstream/u-boot/tools/dtoc/dtb_platdata.py",
>  line 566, in run_steps
> plat.scan_reg_sizes()
>   File 
> "/home/Freenix/work/sw-stash/uboot-upstream/u-boot/tools/dtoc/dtb_platdata.py",
>  line 326, in scan_reg_sizes
> (node.name, len(reg.value), na, ns))
> ValueError: Node 'cpu@0' reg property has 2 cells which is not a multiple of 
> na + ns = 2 + 2)
> make[1]: *** [scripts/Makefile.spl:301: spl/dts/dt-platdata.c] Error 1
> make: *** [Makefile:1678: spl/u-boot-spl] Error 2

It looks like it is expecting size cells to be 2 as well as address
cells. The code for this is in scan_reg_sizes() and see
get_num_cells() which uses 2, 2 by default if there is no parent.
Hopefully you can debug it by checking what that function actually
does.

Regards,
Simon
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[U-Boot] [PATCH 1/4] usb: ohci: Re-enable commented out delay

2019-04-28 Thread Adam Ford
There is a delay function that was commented out.  This patch
re-enables it, because it will be needed for da850 ohci support.

Signed-off-by: Adam Ford 

diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 3b6f889f7b..2b0df88f49 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1545,10 +1545,8 @@ static int submit_common_msg(ohci_t *ohci, struct 
usb_device *dev,
return -1;
}
 
-#if 0
mdelay(10);
/* ohci_dump_status(ohci); */
-#endif
 
timeout = USB_TIMEOUT_MS(pipe);
 
-- 
2.17.1

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[U-Boot] (no subject)

2019-04-28 Thread Adam Ford
From 323b5ea0eec7aac821eb2319ca0debda711e8bec Mon Sep 17 00:00:00 2001
From: Adam Ford 
Date: Sun, 28 Apr 2019 16:42:42 -0500
Subject: [PATCH 0/4] Enable Host OHCI USB controller wtih DM_USB 

This series enables some commented-out code, resurrects some older code
and enables DA850 OHCI USB Host controller on the da850evm

Adam Ford (4):
  usb: ohci:  Re-enable commented out delay
  ARM: davinci: Remove unused functions from header
  usb: ohci: ohci-da8xx: Enable da850-ohci driver with DM support
  ARM: da850evm: Enable da850-ohci USB host controller

 .../arm/mach-davinci/include/mach/da8xx-usb.h |   3 -
 configs/da850evm_defconfig|   7 +-
 drivers/usb/host/Kconfig  |   5 +
 drivers/usb/host/ohci-da8xx.c | 147 +-
 drivers/usb/host/ohci-hcd.c   |   2 -
 include/configs/da850evm.h|   8 +
 6 files changed, 165 insertions(+), 7 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH 2/4] ARM: davinci: Remove unused functions from header

2019-04-28 Thread Adam Ford
There are a few functions defined in the header file, but they are
not referenced by any Davinci code.  In order to make a general
function in the future with static function declarations, this
patch will remove the references all together.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/mach-davinci/include/mach/da8xx-usb.h 
b/arch/arm/mach-davinci/include/mach/da8xx-usb.h
index 42e1258225..215706e172 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx-usb.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx-usb.h
@@ -86,7 +86,4 @@ struct da8xx_usb_regs {
 
 #define DA8XX_USB_VBUS_GPIO(1 << 15)
 
-int usb_phy_on(void);
-void usb_phy_off(void);
-
 #endif /* __DA8XX_MUSB_H__ */
-- 
2.17.1

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[U-Boot] [PATCH 3/4] usb: ohci: ohci-da8xx: Enable da850-ohci driver with DM support

2019-04-28 Thread Adam Ford
This patch reuses some former code for the hawkboard, combines it
with some some similar DM_USB compatible code for the OHCI driver,
and enables the use of the da850's OHCI controller with DM_USB
compatibility.

Signed-off-by: Adam Ford 

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0fbc115801..0d8ab3b651 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -239,6 +239,11 @@ config USB_OHCI_GENERIC
---help---
  Enables support for generic OHCI controller.
 
+config USB_OHCI_DA8XX
+   bool "Support for da850 OHCI USB controller"
+   help
+ Enable support for the da850 USB controller.
+
 endif # USB_OHCI_HCD
 
 config USB_UHCI_HCD
diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c
index 47ad3f34d5..0f38791973 100644
--- a/drivers/usb/host/ohci-da8xx.c
+++ b/drivers/usb/host/ohci-da8xx.c
@@ -4,9 +4,63 @@
  */
 
 #include 
-
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "ohci.h"
 #include 
 
+struct da8xx_ohci {
+   ohci_t ohci;
+   struct clk *clocks; /* clock list */
+   struct phy phy;
+   int clock_count;/* number of clock in clock list */
+};
+
+static int usb_phy_on(void)
+{
+   u32 timeout;
+   u32 cfgchip2;
+
+   cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
+
+   cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
+ CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ |
+ CFGCHIP2_USB1PHYCLKMUX);
+   cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
+   CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX |
+   CFGCHIP2_USB1SUSPENDM;
+
+   writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
+
+   /* wait until the usb phy pll locks */
+   timeout = 0x7FF;
+
+   while (timeout--) {
+   if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
+   return 1;
+   }
+
+   /* USB phy was not turned on */
+   return 0;
+}
+
+static void usb_phy_off(void)
+{
+   u32 cfgchip2;
+
+   /*
+* Power down the on-chip PHY.
+*/
+   cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
+   cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM);
+   cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET;
+   writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
+}
+
 int usb_cpu_init(void)
 {
/* enable psc for usb2.0 */
@@ -37,3 +91,94 @@ int usb_cpu_init_fail(void)
 {
return usb_cpu_stop();
 }
+
+#if CONFIG_IS_ENABLED(DM_USB)
+static int ohci_da8xx_probe(struct udevice *dev)
+{
+   struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+   struct da8xx_ohci *priv = dev_get_priv(dev);
+   int i, err, ret, clock_nb;
+
+   err = 0;
+   priv->clock_count = 0;
+   clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+   if (clock_nb > 0) {
+   priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+   GFP_KERNEL);
+   if (!priv->clocks)
+   return -ENOMEM;
+
+   for (i = 0; i < clock_nb; i++) {
+   err = clk_get_by_index(dev, i, &priv->clocks[i]);
+   if (err < 0)
+   break;
+
+   err = clk_enable(&priv->clocks[i]);
+   if (err) {
+   dev_err(dev, "failed to enable clock %d\n", i);
+   clk_free(&priv->clocks[i]);
+   goto clk_err;
+   }
+   priv->clock_count++;
+   }
+   } else if (clock_nb != -ENOENT) {
+   dev_err(dev, "failed to get clock phandle(%d)\n", clock_nb);
+   return clock_nb;
+   }
+
+   err = usb_cpu_init();
+
+   if (err)
+   goto clk_err;
+
+   err = ohci_register(dev, regs);
+   if (err)
+   goto phy_err;
+
+   return 0;
+
+phy_err:
+   ret = usb_cpu_stop();
+   if (ret)
+   dev_err(dev, "failed to shutdown usb phy\n");
+
+clk_err:
+   ret = clk_release_all(priv->clocks, priv->clock_count);
+   if (ret)
+   dev_err(dev, "failed to disable all clocks\n");
+
+   return err;
+}
+
+static int ohci_da8xx_remove(struct udevice *dev)
+{
+   struct da8xx_ohci *priv = dev_get_priv(dev);
+   int ret;
+
+   ret = ohci_deregister(dev);
+   if (ret)
+   return ret;
+
+   ret = usb_cpu_stop();
+   if (ret)
+   return ret;
+
+   return clk_release_all(priv->clocks, priv->clock_count);
+}
+
+static const struct udevice_id da8xx_ohci_ids[] = {
+   { .compatible = "ti,da830-ohci" },
+   { }
+};
+
+U_BOOT_DRIVER(ohci_generic) = {
+   .name   = "ohci-

[U-Boot] [PATCH 4/4] ARM: da850evm: Enable da850-ohci USB host controller

2019-04-28 Thread Adam Ford
The DA850 EVM has one USB 1.1 OHCI Host controller.  With the
host controller now support DM_USB, this patch enables
the respective functions for the da850evm.

Signed-off-by: Adam Ford 

diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index ee39b0b1bc..1845813b2e 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -8,8 +8,8 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
@@ -67,5 +67,10 @@ CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_DAVINCI_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_DA8XX=y
 # CONFIG_FAT_WRITE is not set
 CONFIG_USE_TINY_PRINTF=y
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 94848f5128..9aaecdd1d5 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -267,6 +267,14 @@
 #define CONFIG_ENV_SIZE(16 << 10)
 #endif
 
+/* USB Configs */
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_OHCI_REGS_BASE  0x01E25000
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME  "da850evm"
+
 #ifndef CONFIG_DIRECT_NOR_BOOT
 /* defines for SPL */
 #define CONFIG_SYS_SPL_MALLOC_START(CONFIG_SYS_TEXT_BASE - \
-- 
2.17.1

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Re: [U-Boot] DE10 Nano U-Boot v2019.04 Issues

2019-04-28 Thread rafael mello
Hello Simon,
Thank you for the repply.
>> You probably should use mrproper here, not distclean?
I do agree, mrproper should be used.

>> So what's $CC set to? I don't think you need ARCH=arm, works without that 
>> for me.
Sorry, I forgot to say that ${CC} is pointig to Linaro gcc folder.

>>So SPL runs fine but it doesn't load U-Boot? Or does it fail running  
>>anything? Please send the console output, if any.
Reggarding the console output, there is none when I set 
CONFIG_DEFAULT_DEVICE_TREE=“socfpga_cyclone5_de10_nano”.

>>I don't see the file socfpga_cyclone5_de0_nano_soc.dts, where does it come 
>>from?
I'm relating to the original files from the U-Boot source, the path is 
arch/arm/dts/, but I can attach the files if it's needded.

Is there any other info that would help?

Best regards,
Rafael Villatore


De: Simon Goldschmidt 
Enviado: domingo, 28 de abril de 2019 05:13
Para: rafael mello
Cc: u-boot@lists.denx.de
Assunto: Re: [U-Boot] DE10 Nano U-Boot v2019.04 Issues



On 27.04.19 19:59, rafael mello wrote:
> Hello, I've attempted to build u-boot v2019.04 for the DE10 Nano board using 
> the following commands:
> make ARCH=arm CROSS_COMPILE=${CC} distclean

You probably should use mrproper here, not distclean?

> make ARCH=arm CROSS_COMPILE=${CC} socfpga_de10_nano_defconfig
> make ARCH=arm CROSS_COMPILE=${CC} u-boot-with-spl.sfp

So what's $CC set to? I don't think you need ARCH=arm, works without
that for me.

>
> It builds just fine but I'm not able to make the board load U-Boot correctly.

So SPL runs fine but it doesn't load U-Boot? Or does it fail running
anything? Please send the console output, if any.

> If I run the same commands using v2018.05 it builds and I'm able to boot the 
> board.
>
> After some attempts to find the issue, I was able to compile and boot the 
> v2019.04 by changing the 
> CONFIG_DEFAULT_DEVICE_TREE=“socfpga_cyclone5_de10_nano” to 
> CONFIG_DEFAULT_DEVICE_TREE=“socfpga_cyclone5_de0_nano_soc” in the 
> socfpga_de10_nano_defconfig file.
> That lead me to belive that there was an issue with the 
> socfpga_cyclone5_de10_nano.dts file.
> After changing the socfpga_cyclone5_de10_nano.dts to be identical to the 
> socfpga_cyclone5_de0_nano_soc.dts I wasn't able to boot the board, making me 
> think that the issue is somewere else, since I'm also able to compile and 
> boot the board if I rename the socfpga_cyclone5_de10_nano.dts to 
> socfpga_cyclone5_de0_nano_soc.dts.

I don't see the file socfpga_cyclone5_de0_nano_soc.dts, where does it
come from?

Unfortunately, I don't have that board, so I cannot test it myself.

Regards,
Simon
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Re: [U-Boot] [REGRESSION] [PATCH] imx: add lowlevel init for ARM64

2019-04-28 Thread Marcel Ziswiler
On Sun, 2019-04-28 at 14:24 -0400, Joe Hershberger wrote:
> > On Apr 28, 2019, at 12:52 PM, Stefano Babic  wrote:
> > 
> > 
> > 
> > > On 27/04/19 01:58, Peng Fan wrote:
> > > Hi Marcel,
> > > 
> > > Please apply this patch, Joe has not pick it up.
> > > https://patchwork.ozlabs.org/patch/1085432/
> > > 
> > > Stefano,
> > > 
> > > Would you pick it up?
> > 
> > It is acked by Joe, i assign the patch to me in patchwork and I
> > pick it up.
> > 
> > Regards,
> > Stefano
> > 
> > > 
> > > > Subject: [REGRESSION] [PATCH] imx: add lowlevel init for ARM64
> > > > 
> > > > Hi Peng and Stefano
> > > > 
> > > > Unfortunately, this seems to break Ethernet on Colibri iMX8X:
> 
> Has this been addressed?

Yes, sorry. The following patch as suggested by Peng does fix it:

https://patchwork.ozlabs.org/patch/1085432/

Thanks!

> > > > => dhcp
> > > > "Error" handler, esr 0xbf02
> > > > elr: 80049664 lr : 8004964c (reloc)
> > > > elr: ffef6664 lr : ffef664c
> > > > x0 : 5b040288 x1 : 0001
> > > > x2 : fd6c5ff4 x3 : 0020
> > > > x4 : fd6c5ff0 x5 : 0020
> > > > x6 : ffef079c x7 : fd6f1600
> > > > x8 : 0044 x9 : 0008
> > > > x10: fd6d1620 x11: fd6d3a10
> > > > x12:  x13: 0200
> > > > x14: fd6c62cc x15: 0002
> > > > x16: 2080 x17: 
> > > > x18: fd6cada8 x19: fd6d1160
> > > > x20: 0200 x21: 5b040300
> > > > x22: fd6f1000 x23: fd6cfdf0
> > > > x24: 8000 x25: 
> > > > x26:  x27: 
> > > > x28: fd6d15c0 x29: fd6c6030
> > > > 
> > > > Resetting CPU ...
> > > > 
> > > > resetting ...
> > > > 
> > > > Reverting commit 5955c6eeb453 ("imx: add lowlevel init for
> > > > ARM64") makes
> > > > it work again.
> > > > 
> > > > Unfortunately, I don't have a MEK in my home office but will
> > > > check Ethernet
> > > > operation there on Monday as well.
> > > > 
> > > > Anyway, does anybody know what exactly is going on?
> > > 
> > > Regards,
> > > Peng.
> > > 
> > > > Cheers
> > > > 
> > > > Marcel
> > > > 
> > > > > On Mon, 2019-04-15 at 05:20 +, Peng Fan wrote:
> > > > > Sometimes we met SERROR, but only to catch it when Linux
> > > > > boots up.
> > > > > Let's enable catching in U-Boot to catch it ealier and ease
> > > > > debug.
> > > > > 
> > > > > Signed-off-by: Peng Fan 
> > > > > ---
> > > > > arch/arm/mach-imx/Makefile   |  2 +-
> > > > > arch/arm/mach-imx/lowlevel.S | 22 ++
> > > > > 2 files changed, 23 insertions(+), 1 deletion(-)  create mode
> > > > > 100644
> > > > > arch/arm/mach-imx/lowlevel.S
> > > > > 
> > > > > diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-
> > > > > imx/Makefile
> > > > > index c3ed62aed6..37675d0558 100644
> > > > > --- a/arch/arm/mach-imx/Makefile
> > > > > +++ b/arch/arm/mach-imx/Makefile
> > > > > @@ -204,7 +204,7 @@ endif
> > > > > 
> > > > > targets += $(addprefix ../../../,SPL spl/u-boot-spl.cfgout u-
> > > > > boot-
> > > > > dtb.cfgout u-boot.cfgout u-boot.uim spl/u-boot-nand-spl.imx)
> > > > > 
> > > > > -obj-$(CONFIG_ARM64) += sip.o
> > > > > +obj-$(CONFIG_ARM64) += lowlevel.o sip.o
> > > > > 
> > > > > obj-$(CONFIG_MX5) += mx5/
> > > > > obj-$(CONFIG_MX6) += mx6/
> > > > > diff --git a/arch/arm/mach-imx/lowlevel.S b/arch/arm/mach-
> > > > > imx/lowlevel.S new file mode 100644 index
> > > > > 00..158fdb7d87
> > > > > --- /dev/null
> > > > > +++ b/arch/arm/mach-imx/lowlevel.S
> > > > > @@ -0,0 +1,22 @@
> > > > > +/* SPDX-License-Identifier: GPL-2.0+ */
> > > > > +/*
> > > > > + * Copyright 2019 NXP
> > > > > + */
> > > > > +
> > > > > +#include 
> > > > > +
> > > > > +ENTRY(lowlevel_init)
> > > > > +mrsx0, CurrentEL
> > > > > +cmpx0, #8
> > > > > +b.eq1f
> > > > > +ret
> > > > > +1:
> > > > > +msr daifclr, #4
> > > > > +
> > > > > +/* set HCR_EL2.AMO to catch SERROR */
> > > > > +mrsx0, hcr_el2
> > > > > +orrx0, x0, #0x20
> > > > > +msrhcr_el2, x0
> > > > > +isb
> > > > > +ret
> > > > > +ENDPROC(lowlevel_init)
> > > > > --
> > > > > 2.16.4
> > > > > 
> > > > > ___
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> > > > > U-Boot@lists.denx.de
> > > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> > > > > 
> > > > s.denx.de%2Flistinfo%2Fu-
> > > > boot&data=02%7C01%7Cpeng.fan%40nxp.co
> > > > m%7C
> > > > d671eca9f1cc4d06a7d008d6ca7661b1%7C686ea1d3bc2b4c6fa92cd99c5c30
> > > > 1635%7C
> > > > 0%7C0%7C636919007134459412&sdata=R6xBpoVJHL7meQkRkBi1I8vg
> > > > MgOTXlFEA
> > > > > QfMePrDdSc%3D&reserved=0
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Re: [U-Boot] [PATCH 2/3] rockchip: use 'arch-rockchip' as header file path

2019-04-28 Thread Philipp Tomsich
> Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
> header file path, so that we can get the correct path directly.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  .../include/asm/arch-rockchip/ddr_rk3188.h|  2 +-
>  arch/arm/mach-rockchip/Kconfig|  2 +-
>  arch/arm/mach-rockchip/boot_mode.c|  2 +-
>  arch/arm/mach-rockchip/bootrom.c  |  4 ++--
>  arch/arm/mach-rockchip/rk3036-board-spl.c | 12 +--
>  arch/arm/mach-rockchip/rk3036-board.c | 10 +-
>  arch/arm/mach-rockchip/rk3036/clk_rk3036.c|  4 ++--
>  arch/arm/mach-rockchip/rk3036/sdram_rk3036.c  | 12 +--
>  arch/arm/mach-rockchip/rk3036/syscon_rk3036.c |  2 +-
>  arch/arm/mach-rockchip/rk3128-board.c | 10 +-
>  arch/arm/mach-rockchip/rk3128/clk_rk3128.c|  4 ++--
>  arch/arm/mach-rockchip/rk3128/syscon_rk3128.c |  2 +-
>  arch/arm/mach-rockchip/rk3188-board-spl.c | 16 +++
>  arch/arm/mach-rockchip/rk3188-board.c | 10 +-
>  arch/arm/mach-rockchip/rk3188/clk_rk3188.c|  4 ++--
>  arch/arm/mach-rockchip/rk3188/syscon_rk3188.c |  2 +-
>  arch/arm/mach-rockchip/rk322x-board-spl.c | 12 +--
>  arch/arm/mach-rockchip/rk322x-board.c | 10 +-
>  arch/arm/mach-rockchip/rk322x/clk_rk322x.c|  4 ++--
>  arch/arm/mach-rockchip/rk322x/syscon_rk322x.c |  2 +-
>  arch/arm/mach-rockchip/rk3288-board-spl.c | 20 +--
>  arch/arm/mach-rockchip/rk3288-board-tpl.c | 14 ++---
>  arch/arm/mach-rockchip/rk3288-board.c | 12 +--
>  arch/arm/mach-rockchip/rk3288/clk_rk3288.c|  4 ++--
>  arch/arm/mach-rockchip/rk3288/rk3288.c|  2 +-
>  arch/arm/mach-rockchip/rk3288/syscon_rk3288.c |  2 +-
>  arch/arm/mach-rockchip/rk3328/clk_rk3328.c|  4 ++--
>  arch/arm/mach-rockchip/rk3328/rk3328.c|  2 +-
>  arch/arm/mach-rockchip/rk3328/syscon_rk3328.c |  2 +-
>  arch/arm/mach-rockchip/rk3368-board-spl.c | 10 +-
>  arch/arm/mach-rockchip/rk3368-board-tpl.c | 12 +--
>  arch/arm/mach-rockchip/rk3368/clk_rk3368.c|  4 ++--
>  arch/arm/mach-rockchip/rk3368/rk3368.c|  6 +++---
>  arch/arm/mach-rockchip/rk3368/syscon_rk3368.c |  2 +-
>  arch/arm/mach-rockchip/rk3399-board-spl.c | 12 +--
>  arch/arm/mach-rockchip/rk3399-board.c |  2 +-
>  arch/arm/mach-rockchip/rk3399/clk_rk3399.c|  4 ++--
>  arch/arm/mach-rockchip/rk3399/rk3399.c|  2 +-
>  arch/arm/mach-rockchip/rk3399/syscon_rk3399.c |  2 +-
>  arch/arm/mach-rockchip/rk_timer.c |  2 +-
>  arch/arm/mach-rockchip/rv1108/clk_rv1108.c|  4 ++--
>  arch/arm/mach-rockchip/rv1108/syscon_rv1108.c |  2 +-
>  arch/arm/mach-rockchip/sdram_common.c |  2 +-
>  board/elgin/elgin_rv1108/elgin_rv1108.c   |  4 ++--
>  board/rockchip/evb_rk3036/evb_rk3036.c|  4 ++--
>  board/rockchip/evb_rk3229/evb_rk3229.c|  2 +-
>  board/rockchip/evb_rk3399/evb-rk3399.c|  2 +-
>  board/rockchip/evb_rv1108/evb_rv1108.c|  4 ++--
>  board/rockchip/kylin_rk3036/kylin_rk3036.c|  4 ++--
>  board/rockchip/sheep_rk3368/sheep_rk3368.c|  4 ++--
>  .../lion_rk3368/lion_rk3368.c |  6 +++---
>  .../puma_rk3399/puma-rk3399.c | 10 +-
>  board/vamrs/rock960_rk3399/rock960-rk3399.c   |  2 +-
>  cmd/rockusb.c |  2 +-
>  drivers/clk/rockchip/clk_rk3036.c |  6 +++---
>  drivers/clk/rockchip/clk_rk3128.c |  6 +++---
>  drivers/clk/rockchip/clk_rk3188.c |  8 
>  drivers/clk/rockchip/clk_rk322x.c |  6 +++---
>  drivers/clk/rockchip/clk_rk3288.c |  8 
>  drivers/clk/rockchip/clk_rk3328.c |  8 
>  drivers/clk/rockchip/clk_rk3368.c |  6 +++---
>  drivers/clk/rockchip/clk_rk3399.c |  6 +++---
>  drivers/clk/rockchip/clk_rv1108.c |  6 +++---
>  drivers/gpio/rk_gpio.c|  3 ++-
>  drivers/i2c/rk_i2c.c  |  6 +++---
>  drivers/mmc/rockchip_dw_mmc.c |  4 ++--
>  drivers/net/gmac_rockchip.c   | 18 -
>  drivers/pwm/rk_pwm.c  |  2 +-
>  drivers/ram/rockchip/dmc-rk3368.c | 12 +--
>  drivers/ram/rockchip/sdram_rk3128.c   |  6 +++---
>  drivers/ram/rockchip/sdram_rk3188.c   | 14 ++---
>  drivers/ram/rockchip/sdram_rk322x.c   | 16 +++
>  drivers/ram/rockchip/sdram_rk3288.c   | 14 ++---
>  drivers/ram/rockchip/sdram_rk3328.c   |  6 +++---
>  drivers/ram/rockchip/sdram_rk3399.c   | 12 +--
>  drivers/reset/reset-rockchip.c|  2 +-
>  drivers/serial/serial_rockchip.c  |  2 +-
>  drivers/sound/rockchip_sound.c|  2 +-
>  drivers/spi/rk_spi.c  |  4 ++--
>  drivers/sysres

[U-Boot] [PATCH v5 2/2] board: toradex: add colibri imx8qxp 2gb wb it v1.0b module support

2019-04-28 Thread Marcel Ziswiler
From: Marcel Ziswiler 

This commit adds initial support for the Toradex Colibri iMX8QXP 2GB WB
IT V1.0B module. Unlike the V1.0A early access samples exclusively
booting from SD card, they are now strapped to boot from eFuses which
are factory fused to properly boot from their on-module eMMC. U-Boot
supports either booting from the on-module eMMC or may be used for
recovery purpose using the universal update utility (uuu) aka mfgtools
3.0.

Functionality wise the following is known to be working:
- eMMC and MMC/SD card
- Ethernet
- GPIOs
- I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

Signed-off-by: Marcel Ziswiler 
Reviewed-by: Igor Opaniuk 

---

Changes in v5:
- Keep alphabetical order of device trees in Makefile.
- Order targets in Kconfig alphabetically.
- Fix indentation in SPDX.
- Remove stale includes from board file.
- Take into account ahab-container being platform specific.
- Use vidargs instead of multiple discrete video= in configuration.
- Fix console baudrate specification.
- Remove redundant CONFIG_SYS_MMC_ENV_DEV define and add some clarifying
  comment.
- Fix product name being Colibri iMX8X in a comment.
- Remove obsolete CONFIG_NR_DRAM_BANKS.

Changes in v4:
- Fixed SPDX as well as using SZ_ macros where applicable as suggested
  by Igor.
- Fixed superfluous trailing line continuation introduced by commit
  0d331c035a09 ("imx: support i.MX8QM MEK board") in the Makefile plus
  sorted stuff alphabetically again.
- Applied changes similar to commit 3b9ac5415084 ("imx: 8qxp_mek: fix
  fdt_file and console"). However, note that using ${baudrate} in
  console= like that won't actually work!
- Applied changes similar to commit e5b8f7e665aa ("imx8qxp: mek: enable
  dm-spl for pm").

Changes in v3:
- Added Igor's reviewed-by tag.

Changes in v2:
- Changed imx-atf git clone command to include initial branch
  information as suggested by Igor.
- Sorted board file includes alphabetically as suggested by Igor.
- Got rid of SPL configuration in legacy header file as suggested by
  Igor and the whole use of SPL on i.MX 8X anyway neither works well
  nor makes any much sense at all.

 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi  | 117 +++
 arch/arm/dts/fsl-imx8qxp-colibri.dts  | 328 ++
 arch/arm/mach-imx/imx8/Kconfig|  12 +-
 board/toradex/colibri-imx8qxp/Kconfig |  30 ++
 board/toradex/colibri-imx8qxp/MAINTAINERS |   9 +
 board/toradex/colibri-imx8qxp/Makefile|   6 +
 board/toradex/colibri-imx8qxp/README  |  66 
 .../toradex/colibri-imx8qxp/colibri-imx8qxp.c | 202 +++
 board/toradex/colibri-imx8qxp/imximage.cfg|  24 ++
 configs/colibri-imx8qxp_defconfig |  53 +++
 include/configs/colibri-imx8qxp.h | 210 +++
 12 files changed, 1056 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
 create mode 100644 arch/arm/dts/fsl-imx8qxp-colibri.dts
 create mode 100644 board/toradex/colibri-imx8qxp/Kconfig
 create mode 100644 board/toradex/colibri-imx8qxp/MAINTAINERS
 create mode 100644 board/toradex/colibri-imx8qxp/Makefile
 create mode 100644 board/toradex/colibri-imx8qxp/README
 create mode 100644 board/toradex/colibri-imx8qxp/colibri-imx8qxp.c
 create mode 100644 board/toradex/colibri-imx8qxp/imximage.cfg
 create mode 100644 configs/colibri-imx8qxp_defconfig
 create mode 100644 include/configs/colibri-imx8qxp.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index cf77a4dce6..e1f18c2833 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -567,8 +567,9 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
 
 dtb-$(CONFIG_ARCH_IMX8) += \
-   fsl-imx8qxp-mek.dtb \
fsl-imx8qm-mek.dtb \
+   fsl-imx8qxp-colibri.dtb \
+   fsl-imx8qxp-mek.dtb
 
 dtb-$(CONFIG_ARCH_IMX8M) += fsl-imx8mq-evk.dtb
 
diff --git a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi 
b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
new file mode 100644
index 00..5b061f94ba
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Copyright 2019 Toradex AG
+ */
+
+&{/imx8qx-pm} {
+
+   u-boot,dm-spl;
+};
+
+&mu {
+   u-boot,dm-spl;
+};
+
+&clk {
+   u-boot,dm-spl;
+};
+
+&iomuxc {
+   u-boot,dm-spl;
+};
+
+&pd_lsio {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio0 {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio1 {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio2 {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio3 {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio4 {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio5 {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio6 {
+   u-boot,dm-spl;
+};
+
+&pd_lsio_gpio7 {
+   u-boot,dm-spl;
+};
+
+&pd_conn {
+   u-boot,dm-spl;
+};
+
+&pd_conn_sdch0 {
+   u-boot,dm-spl;
+};
+
+&pd_conn_sdch1 {
+ 

[U-Boot] [PATCH v5 1/2] imx: fix building for i.mx8 without spl

2019-04-28 Thread Marcel Ziswiler
From: Marcel Ziswiler 

Building with Travis CI complained and stopped with the following error:
+cc1: fatal error: opening output file spl/u-boot-spl.cfgout: No such
file or directory
+compilation terminated.

This fixes commit caceb739ea07 ("imx: build flash.bin for i.MX8") which
took SPL being enabled on i.MX8 for granted.

Reported-by: Stefano Babic 
Signed-off-by: Marcel Ziswiler 

---

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-imx/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 37675d0558..6531c67fc6 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -107,7 +107,9 @@ IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%)
 ifeq ($(CONFIG_ARCH_IMX8), y)
 CNTR_DEPFILES := $(srctree)/tools/imx_cntr_image.sh
 IMAGE_TYPE := imx8image
+ifeq ($(CONFIG_SPL_BUILD),y)
 SPL_DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o 
spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG); if [ -f spl/u-boot-spl.cfgout 
]; then $(CNTR_DEPFILES) spl/u-boot-spl.cfgout; echo $$?; fi)
+endif
 DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout 
$(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) 
u-boot-dtb.cfgout; echo $$?; fi)
 else ifeq ($(CONFIG_ARCH_IMX8M), y)
 IMAGE_TYPE := imx8mimage
-- 
2.20.1

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[U-Boot] [PATCH v5 0/2] colibri imx8qxp 2gb wb it v1.0b module support

2019-04-28 Thread Marcel Ziswiler

This series fixes building for i.MX8 without SPL and adds support for
more lpuart instances, cleans-up and extends the Toradex SKU handling
and last but not least introduces support for the Toradex Colibri
iMX8QXP 2GB WB IT V1.0B module.

This series is available together with the last few clean-up patches
on our git server [1] as well.

[1] http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next

Changes in v5:
- Keep alphabetical order of device trees in Makefile.
- Order targets in Kconfig alphabetically.
- Fix indentation in SPDX.
- Remove stale includes from board file.
- Take into account ahab-container being platform specific.
- Use vidargs instead of multiple discrete video= in configuration.
- Fix console baudrate specification.
- Remove redundant CONFIG_SYS_MMC_ENV_DEV define and add some clarifying
  comment.
- Fix product name being Colibri iMX8X in a comment.
- Remove obsolete CONFIG_NR_DRAM_BANKS.

Changes in v4:
- Fixed SPDX as well as using SZ_ macros where applicable as suggested
  by Igor.
- Fixed superfluous trailing line continuation introduced by commit
  0d331c035a09 ("imx: support i.MX8QM MEK board") in the Makefile plus
  sorted stuff alphabetically again.
- Applied changes similar to commit 3b9ac5415084 ("imx: 8qxp_mek: fix
  fdt_file and console"). However, note that using ${baudrate} in
  console= like that won't actually work!
- Applied changes similar to commit e5b8f7e665aa ("imx8qxp: mek: enable
  dm-spl for pm").

Changes in v3:
- Added Igor's reviewed-by tag.

Changes in v2:
- Changed imx-atf git clone command to include initial branch
  information as suggested by Igor.
- Sorted board file includes alphabetically as suggested by Igor.
- Got rid of SPL configuration in legacy header file as suggested by
  Igor and the whole use of SPL on i.MX 8X anyway neither works well
  nor makes any much sense at all.

Marcel Ziswiler (2):
  imx: fix building for i.mx8 without spl
  board: toradex: add colibri imx8qxp 2gb wb it v1.0b module support

 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi  | 117 +++
 arch/arm/dts/fsl-imx8qxp-colibri.dts  | 328 ++
 arch/arm/mach-imx/Makefile|   2 +
 arch/arm/mach-imx/imx8/Kconfig|  12 +-
 board/toradex/colibri-imx8qxp/Kconfig |  30 ++
 board/toradex/colibri-imx8qxp/MAINTAINERS |   9 +
 board/toradex/colibri-imx8qxp/Makefile|   6 +
 board/toradex/colibri-imx8qxp/README  |  66 
 .../toradex/colibri-imx8qxp/colibri-imx8qxp.c | 202 +++
 board/toradex/colibri-imx8qxp/imximage.cfg|  24 ++
 configs/colibri-imx8qxp_defconfig |  53 +++
 include/configs/colibri-imx8qxp.h | 210 +++
 13 files changed, 1058 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
 create mode 100644 arch/arm/dts/fsl-imx8qxp-colibri.dts
 create mode 100644 board/toradex/colibri-imx8qxp/Kconfig
 create mode 100644 board/toradex/colibri-imx8qxp/MAINTAINERS
 create mode 100644 board/toradex/colibri-imx8qxp/Makefile
 create mode 100644 board/toradex/colibri-imx8qxp/README
 create mode 100644 board/toradex/colibri-imx8qxp/colibri-imx8qxp.c
 create mode 100644 board/toradex/colibri-imx8qxp/imximage.cfg
 create mode 100644 configs/colibri-imx8qxp_defconfig
 create mode 100644 include/configs/colibri-imx8qxp.h

-- 
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Re: [U-Boot] [PATCH] spi: Zap lpc32xx_ssp driver-related code

2019-04-28 Thread Tom Rini
On Sat, Apr 27, 2019 at 10:08:34PM +0200, Simon Goldschmidt wrote:
> 
> 
> On 22.04.19 23:00, Tom Rini wrote:
> >On Mon, Apr 22, 2019 at 11:50:22PM +0300, Vladimir Zapolskiy wrote:
> >>Hi Jagan, Tom,
> >>
> >>On 04/19/2019 09:48 AM, Jagan Teki wrote:
> >>>Dropped
> >>>- lpc32xx_ssp driver
> >>>- CONFIG_LPC32XX_SSP, LPC32XX_SSP_TIMEOUT items
> >>>
> >>>Dropped due to:
> >>>- no active updates
> >>>- no dm conversion
> >>>- multiple pings for asking dm-conversion
> >>
> >>I really don't want to rush into moaning, however let me ask you to drop
> >>the reason given above as invalid, otherwise please clarify who were
> >>the addressees of these 'multiple pings'.
> >
> >Indeed.  Since it was only last month or so that I setup a low-traffic
> >list for maintainers / custodians for important issues like this, [..]
> 
> Wait, which list are you talking about? Should I be monitoring anything else
> than this one?

Ah, OK, so a new thing for my own mental checklist (which I ought to
write down), there's now u-boot-custodians and u-boot-maintainers AT
lists.denx.de, which are low volume custodian / maintainers only lists
(they are public) to try and help avoid these "Hey, I maintain a board
and just now found out I need to convert things for the next
release?!?!?" problems, and similar.

> 
> Regards,
> Simon

-- 
Tom


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Re: [U-Boot] [PATCH 3/5] spi: add spi-mem driver for MediaTek MT7629 SoC

2019-04-28 Thread Weijie Gao
On Sun, 2019-04-28 at 17:30 +0530, Jagan Teki wrote:
> On Sun, Apr 28, 2019 at 6:54 AM Weijie Gao  wrote:
> >
> > On Sat, 2019-04-27 at 21:38 +0530, Jagan Teki wrote:
> > > On Fri, Apr 26, 2019 at 2:53 PM Weijie Gao  
> > > wrote:
> > > >
> > > > This patch adds spi-mem driver for MediaTek MT7629 SoC to access SPI-NOR
> > > > and SPI-NAND flashes.
> > > >
> > > > Cc: Jagan Teki 
> > > > Signed-off-by: Weijie Gao 
> > > > ---
> > > >  drivers/spi/Kconfig  |   9 ++
> > > >  drivers/spi/Makefile |   1 +
> > > >  drivers/spi/mtk_spimem.c | 325 
> > > > +++
> > >
> > > Do we really need spimen on the name? I prefer spi as it is, what is
> > > the notation used by Linux I think spi itself, please check it.
> >
> > This controller is originally designed for accessing SPI-NAND flashes.
> > How about the name mtk-snfi, which means Serial NAND(NOR) flash
> > interface?
> 
> is the same name used in Linux?

This driver currently doesn't exist in Linux.

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Re: [U-Boot] [PATCH v5 1/2] imx: fix building for i.mx8 without spl

2019-04-28 Thread Peng Fan
> Subject: [PATCH v5 1/2] imx: fix building for i.mx8 without spl
> 
> From: Marcel Ziswiler 
> 
> Building with Travis CI complained and stopped with the following error:
> +cc1: fatal error: opening output file spl/u-boot-spl.cfgout: No such
> file or directory
> +compilation terminated.
> 
> This fixes commit caceb739ea07 ("imx: build flash.bin for i.MX8") which took
> SPL being enabled on i.MX8 for granted.
> 
> Reported-by: Stefano Babic 
> Signed-off-by: Marcel Ziswiler 
> 
> ---
> 
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  arch/arm/mach-imx/Makefile | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index 37675d0558..6531c67fc6 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -107,7 +107,9 @@ IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%)
> ifeq ($(CONFIG_ARCH_IMX8), y)  CNTR_DEPFILES :=
> $(srctree)/tools/imx_cntr_image.sh
>  IMAGE_TYPE := imx8image
> +ifeq ($(CONFIG_SPL_BUILD),y)
>  SPL_DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o
> spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG); if [ -f spl/u-boot-spl.cfgout 
> ];
> then $(CNTR_DEPFILES) spl/u-boot-spl.cfgout; echo $$?; fi)
> +endif
>  DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout
> $(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES)
> u-boot-dtb.cfgout; echo $$?; fi)  else ifeq ($(CONFIG_ARCH_IMX8M), y)
> IMAGE_TYPE := imx8mimage

Reviewed-by: Peng Fan 

> --
> 2.20.1

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Re: [U-Boot] [PATCH] riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit system

2019-04-28 Thread Rick Chen
Hi Karsten

> From: Karsten Merker [mailto:mer...@debian.org]
> Sent: Friday, April 26, 2019 5:35 PM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Anup Patel; Bin Meng; Lukas Auer; Tom Rini; U-Boot Mailing List; Palmer
> Dabbelt
> Subject: Re: [U-Boot] [PATCH] riscv: qemu: Use correct SYS_TEXT_BASE for
> S-mode on 32bit system
>
> On Thu, Apr 11, 2019 at 06:52:12AM +, Anup Patel wrote:
> > For 32bit system, the OpenSBI (or BBL) will jump to 0x8040 address
> > in S-mode whereas for 64bit system it will jump to 0x8020 address
> > in S-mode.
> >
> > Currently, the S-mode U-Boot sets SYS_TEXT_BASE to 0x8020 for both
> > 32bit and 64bit system. This breaks S-mode U-Boot for 32bit system.
> >
> > This patch sets different SYS_TEXT_BASE for 32bit and 64bit system so
> > that S-mode U-Boot works fine for both.
> >
> > Signed-off-by: Anup Patel 
> > ---
> >  board/emulation/qemu-riscv/Kconfig | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/board/emulation/qemu-riscv/Kconfig
> > b/board/emulation/qemu-riscv/Kconfig
> > index cf057e7de6..20ea6dc59b 100644
> > --- a/board/emulation/qemu-riscv/Kconfig
> > +++ b/board/emulation/qemu-riscv/Kconfig
> > @@ -14,7 +14,8 @@ config SYS_CONFIG_NAME
> >
> >  config SYS_TEXT_BASE
> > default 0x8000 if !RISCV_SMODE
> > -   default 0x8020 if RISCV_SMODE
> > +   default 0x8020 if RISCV_SMODE && ARCH_RV64I
> > +   default 0x8040 if RISCV_SMODE && ARCH_RV32I
> >
> >  config BOARD_SPECIFIC_OPTIONS # dummy
> > def_bool y
>
> Hello Rick,
>
> may I kindly ping you regarding this patch (patchwork entry at
> http://patchwork.ozlabs.org/patch/1083725/)?  It would be great if you could
> commit it soonish as without it the qemu RV32 target is currently 
> non-functional.
>
> The patch has received two reviews and a tested-by and doesn't touch any
> generic code, so it should be safe to apply.
>

I have applied to u-boot-riscv/master

Thanks
Rick

> Regards,
> Karsten
> --
> Ich widerspreche hiermit ausdrücklich der Nutzung sowie der Weitergabe meiner
> personenbezogenen Daten für Zwecke der Werbung sowie der Markt- oder
> Meinungsforschung.
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Re: [U-Boot] [PATCH v2 1/4] riscv: hart_lottery and available harts features can be selectable

2019-04-28 Thread Rick Chen
Hi Lukas

Auer, Lukas  於 2019年4月26日 週五 上午4:55寫道:
>
> Hi Rick,
>
> Bin already included excellent feedback, I have just one more small nit
> below.
>
> On Wed, 2019-04-24 at 14:33 +0800, Andes wrote:
> > From: Rick Chen 
> >
> > In smp flow these two features only can be enabled when U-Boot
> > booting from ram. It shall be disabled when U-Boot booting from
> > flash.
> >
> > Add CONFIG_XIP to NOT select this two features. It's default value
> > will say NO for booting from ram.
> >
> > AE350 will encounter the the write failure problem since
> > hart_lottery and available_harts_lock was not in ram address but
> > in flash address when booing from flash.
> >
> > This patch can help to fix the write failure problem when AE350
> > booting from flash by disabling this two features.
> >
> > Signed-off-by: Rick Chen 
> > Cc: Greentime Hu 
> > ---
> >  arch/riscv/Kconfig   | 10 ++
> >  arch/riscv/cpu/cpu.c |  3 ++-
> >  arch/riscv/cpu/start.S   |  7 ++-
> >  arch/riscv/include/asm/global_data.h |  2 ++
> >  arch/riscv/lib/asm-offsets.c |  2 ++
> >  arch/riscv/lib/smp.c |  2 ++
> >  6 files changed, 24 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index ae8ff7b..fb9a8c6 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -162,6 +162,16 @@ config SBI_IPI
> >   default y if RISCV_SMODE
> >   depends on SMP
> >
> > +config XIP
> > + bool "XIP mode"
> > + default n
> > + help
> > +   XIP (eXecute In Place) is a method for executing code directly
> > +   from a serial NOR flash memory without copying the code to ram.
> > +   This must NOT support hart lottery and available harts features.
> > +   These two feature only can be enabled when U-Boot booting from
> > +   ram, but shall be disabled when booting from flash.
> > +
> >  config STACK_SIZE_SHIFT
> >   int
> >   default 13
> > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> > index c32de8a..768c44c 100644
> > --- a/arch/riscv/cpu/cpu.c
> > +++ b/arch/riscv/cpu/cpu.c
> > @@ -16,13 +16,14 @@
> >   * before the bss section is available.
> >   */
> >  phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
> > +#ifndef CONFIG_XIP
> >  u32 hart_lottery __attribute__((section(".data"))) = 0;
> > -
>
> Please keep the blank line here.

OK

Thnaks
Rick

>
> Thanks,
> Lukas
>
> >  /*
> >   * The main hart running U-Boot has acquired available_harts_lock until it 
> > has
> >   * finished initialization of global data.
> >   */
> >  u32 available_harts_lock = 1;
> > +#endif
> >
> >  static inline bool supports_extension(char ext)
> >  {
> > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> > index a4433fb..41d9a32 100644
> > --- a/arch/riscv/cpu/start.S
> > +++ b/arch/riscv/cpu/start.S
> > @@ -98,6 +98,7 @@ call_board_init_f_0:
> >   mv  sp, a0
> >  #endif
> >
> > +#ifndef CONFIG_XIP
> >   /*
> >* Pick hart to initialize global data and run U-Boot. The other harts
> >* wait for initialization to complete.
> > @@ -106,6 +107,9 @@ call_board_init_f_0:
> >   li  s2, 1
> >   amoswap.w s2, t1, 0(t0)
> >   bnezs2, wait_for_gd_init
> > +#else
> > + bneztp, secondary_hart_loop
> > +#endif
> >
> >   la  t0, prior_stage_fdt_address
> >   SREGs1, 0(t0)
> > @@ -115,6 +119,7 @@ call_board_init_f_0:
> >   /* save the boot hart id to global_data */
> >   SREGtp, GD_BOOT_HART(gp)
> >
> > +#ifndef CONFIG_XIP
> >   la  t0, available_harts_lock
> >   fence   rw, w
> >   amoswap.w zero, zero, 0(t0)
> > @@ -141,7 +146,7 @@ wait_for_gd_init:
> >* secondary_hart_loop.
> >*/
> >   bnezs2, secondary_hart_loop
> > -
> > +#endif
> >   /* Enable cache */
> >   jal icache_enable
> >   jal dcache_enable
> > diff --git a/arch/riscv/include/asm/global_data.h 
> > b/arch/riscv/include/asm/global_data.h
> > index dffcd45..b74bd7e 100644
> > --- a/arch/riscv/include/asm/global_data.h
> > +++ b/arch/riscv/include/asm/global_data.h
> > @@ -27,7 +27,9 @@ struct arch_global_data {
> >  #ifdef CONFIG_SMP
> >   struct ipi_data ipi[CONFIG_NR_CPUS];
> >  #endif
> > +#ifndef CONFIG_XIP
> >   ulong available_harts;
> > +#endif
> >  };
> >
> >  #include 
> > diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
> > index f998402..4fa4fd3 100644
> > --- a/arch/riscv/lib/asm-offsets.c
> > +++ b/arch/riscv/lib/asm-offsets.c
> > @@ -14,7 +14,9 @@
> >  int main(void)
> >  {
> >   DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
> > +#ifndef CONFIG_XIP
> >   DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
> > +#endif
> >
> >   return 0;
> >  }
> > diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
> > index caa292c..cc66f15 100644
> > --- a/arch/riscv/lib/smp.c
> > +++ b/arch/riscv/lib

Re: [U-Boot] [PATCH 3/5] spi: add spi-mem driver for MediaTek MT7629 SoC

2019-04-28 Thread Weijie Gao
On Mon, 2019-04-29 at 08:50 +0800, Weijie Gao wrote:
> On Sun, 2019-04-28 at 17:30 +0530, Jagan Teki wrote:
> > On Sun, Apr 28, 2019 at 6:54 AM Weijie Gao  wrote:
> > >
> > > On Sat, 2019-04-27 at 21:38 +0530, Jagan Teki wrote:
> > > > On Fri, Apr 26, 2019 at 2:53 PM Weijie Gao  
> > > > wrote:
> > > > >
> > > > > This patch adds spi-mem driver for MediaTek MT7629 SoC to access 
> > > > > SPI-NOR
> > > > > and SPI-NAND flashes.
> > > > >
> > > > > Cc: Jagan Teki 
> > > > > Signed-off-by: Weijie Gao 
> > > > > ---
> > > > >  drivers/spi/Kconfig  |   9 ++
> > > > >  drivers/spi/Makefile |   1 +
> > > > >  drivers/spi/mtk_spimem.c | 325 
> > > > > +++
> > > >
> > > > Do we really need spimen on the name? I prefer spi as it is, what is
> > > > the notation used by Linux I think spi itself, please check it.
> > >
> > > This controller is originally designed for accessing SPI-NAND flashes.
> > > How about the name mtk-snfi, which means Serial NAND(NOR) flash
> > > interface?
> > 
> > is the same name used in Linux?
> 
> This driver currently doesn't exist in Linux.

Linux kernel still uses the original mtk_qspi driver (mtk-quadspi),
because the spi-nor framework in kernel provides abstract interfaces
(not spi-mem) for high-level spi flash controllers.

Before u-boot switched to the spi-nor framework from kernel, the
mtk_qspi was able to work only with the old spi flash driver, with some
hacks.

We have to introduce new spi-mem driver to replace mtk_qspi for u-boot
because its spi-nor framework doesn't provide abstract interfaces and
uses only spi-mem interface. mtk_qspi can no longer work and can not be
modified for spi-mem framework.

For MT7629, the spi-nor controller (mtk_qspi) and spi-nand controller
(mtk-snfi) share the same spi pins controlled by a pinmux. This is the
reason we choose the snfi to control the spi-nor flash, by implementing
it as a spi-mem driver.

This new driver switches pinmux to snfi before transmission and back to
snor after transmission. So there's no side effects on other modules.

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Re: [U-Boot] [PATCH v2 2/4] riscv: configs: Support AE350 SMP booting from flash flow

2019-04-28 Thread Rick Chen
Hi Lukas

Auer, Lukas  於 2019年4月26日 週五 上午4:56寫道:
>
> Hi Rick,
>
> On Wed, 2019-04-24 at 14:33 +0800, Andes wrote:
> > From: Rick Chen 
> >
> > Add two defconfigs to support AE350 SMP booting from flash.
> >
> > Signed-off-by: Rick Chen 
> > Cc: Greentime Hu 
> > ---
> >  configs/ae350_rv32_xip_defconfig | 36 
> >  configs/ae350_rv64_xip_defconfig | 37 +
> >  2 files changed, 73 insertions(+)
> >  create mode 100644 configs/ae350_rv32_xip_defconfig
> >  create mode 100644 configs/ae350_rv64_xip_defconfig
> >
> > diff --git a/configs/ae350_rv32_xip_defconfig 
> > b/configs/ae350_rv32_xip_defconfig
> > new file mode 100644
> > index 000..7c46769
> > --- /dev/null
> > +++ b/configs/ae350_rv32_xip_defconfig
> > @@ -0,0 +1,36 @@
> > +CONFIG_RISCV=y
> > +CONFIG_SYS_TEXT_BASE=0x8000
> > +CONFIG_XIP=y
> > +CONFIG_TARGET_AX25_AE350=y
> > +CONFIG_DISTRO_DEFAULTS=y
> > +CONFIG_NR_DRAM_BANKS=2
> > +CONFIG_FIT=y
> > +CONFIG_BOOTDELAY=3
> > +CONFIG_BOARD_EARLY_INIT_F=y
> > +CONFIG_SYS_PROMPT="RISC-V # "
> > +CONFIG_CMD_IMLS=y
> > +CONFIG_CMD_MMC=y
> > +CONFIG_CMD_SF=y
> > +CONFIG_CMD_SF_TEST=y
> > +# CONFIG_CMD_SETEXPR is not set
> > +CONFIG_BOOTP_PREFER_SERVERIP=y
> > +CONFIG_CMD_CACHE=y
> > +CONFIG_OF_BOARD=y
> > +CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
> > +CONFIG_ENV_IS_IN_SPI_FLASH=y
> > +CONFIG_NET_RANDOM_ETHADDR=y
> > +CONFIG_MMC=y
> > +CONFIG_FTSDC010=y
> > +CONFIG_FTSDC010_SDIO=y
> > +CONFIG_MTD_NOR_FLASH=y
> > +CONFIG_FLASH_CFI_DRIVER=y
> > +CONFIG_CFI_FLASH=y
> > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
> > +CONFIG_SYS_FLASH_CFI=y
> > +CONFIG_SPI_FLASH=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > +CONFIG_FTMAC100=y
> > +CONFIG_BAUDRATE=38400
> > +CONFIG_SYS_NS16550=y
> > +CONFIG_SPI=y
> > +CONFIG_ATCSPI200_SPI=y
> > diff --git a/configs/ae350_rv64_xip_defconfig 
> > b/configs/ae350_rv64_xip_defconfig
> > new file mode 100644
> > index 000..67633d6
> > --- /dev/null
> > +++ b/configs/ae350_rv64_xip_defconfig
> > @@ -0,0 +1,37 @@
> > +CONFIG_RISCV=y
> > +CONFIG_SYS_TEXT_BASE=0x8000
> > +CONFIG_XIP=y
> > +CONFIG_TARGET_AX25_AE350=y
> > +CONFIG_ARCH_RV64I=y
> > +CONFIG_DISTRO_DEFAULTS=y
> > +CONFIG_NR_DRAM_BANKS=2
> > +CONFIG_FIT=y
> > +CONFIG_BOOTDELAY=3
> > +CONFIG_BOARD_EARLY_INIT_F=y
> > +CONFIG_SYS_PROMPT="RISC-V # "
> > +CONFIG_CMD_IMLS=y
> > +CONFIG_CMD_MMC=y
> > +CONFIG_CMD_SF=y
> > +CONFIG_CMD_SF_TEST=y
> > +# CONFIG_CMD_SETEXPR is not set
> > +CONFIG_BOOTP_PREFER_SERVERIP=y
> > +CONFIG_CMD_CACHE=y
> > +CONFIG_OF_BOARD=y
> > +CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
> > +CONFIG_ENV_IS_IN_SPI_FLASH=y
> > +CONFIG_NET_RANDOM_ETHADDR=y
> > +CONFIG_MMC=y
> > +CONFIG_FTSDC010=y
> > +CONFIG_FTSDC010_SDIO=y
> > +CONFIG_MTD_NOR_FLASH=y
> > +CONFIG_FLASH_CFI_DRIVER=y
> > +CONFIG_CFI_FLASH=y
> > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
> > +CONFIG_SYS_FLASH_CFI=y
> > +CONFIG_SPI_FLASH=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > +CONFIG_FTMAC100=y
> > +CONFIG_BAUDRATE=38400
> > +CONFIG_SYS_NS16550=y
> > +CONFIG_SPI=y
> > +CONFIG_ATCSPI200_SPI=y
>
> The non-xip defconfigs also define CONFIG_SF_DEFAULT_MODE as 0. Is this
> missing here or not needed in the xip configuration?
>

Yes.
I shall keep this.

Thanks
Rick

> Looks good otherwise.
> Reviewed-by: Lukas Auer 
>
> Thanks,
> Lukas
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Re: [U-Boot] [PATCH v2 3/4] riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled

2019-04-28 Thread Rick Chen
Auer, Lukas  於 2019年4月26日 週五 上午4:58寫道:
>
> On Thu, 2019-04-25 at 09:00 +0800, Rick Chen wrote:
> > Bin Meng  於 2019年4月24日 週三 下午3:02寫道:
> > > On Wed, Apr 24, 2019 at 2:38 PM Andes  wrote:
> > > > From: Rick Chen 
> > > >
> > > > This patch will fix prior_stage_fdt_address write failure problem, when
> > > > AE350 was booting from flash.
> > >
> > > was -> is
> >
> > OK
> >
> > > > When AE350 was booting from falsh, prior_stage_fdt_address will be in
> > >
> > > was -> is
> >
> > OK
> >
> > > > flash address, we shall avoid it to be written.
> > > >
> > > > Signed-off-by: Rick Chen 
> > > > Cc: Greentime Hu 
> > > > ---
> > > >  arch/riscv/cpu/cpu.c   | 2 ++
> > > >  arch/riscv/cpu/start.S | 2 ++
> > > >  2 files changed, 4 insertions(+)
> > > >
> > > > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> > > > index 768c44c..a17d37f 100644
> > > > --- a/arch/riscv/cpu/cpu.c
> > > > +++ b/arch/riscv/cpu/cpu.c
> > > > @@ -15,7 +15,9 @@
> > > >   * The variables here must be stored in the data section since they 
> > > > are used
> > > >   * before the bss section is available.
> > > >   */
> > > > +#  if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> > >
> > > Should this be: ifdef CONFIG_OF_PRIOR_STAGE, because the next a few of
> > > lines you wrote: #ifndef CONFIG_XIP
> >
> > I just refer to fdtdesc.c and imitate it.
> > But it is no problem to modify it as ifdef CONFIG_OF_PRIOR_STAGE as you 
> > said.
> >
>
> It might also makes sense to use #if CONFIG_IS_ENABLED() for both
> CONFIG_OF_PRIOR_STAGE and CONFIG_XIP. This way, once we support SPL for
> RISC-V, we won't have to make any additional changes.
> With SPL support, SPL would likely enable XIP while U-Boot proper would
> not (SPL running from flash and U-Boot proper from RAM). To support
> this we would have to use CONFIG_IS_ENABLED.
>
> If you choose to keep CONFIG_IS_ENABLED, please remove the spaces
> between # and if.
>

Thanks for explanation.
I will use #ifdef CONFIG_OF_PRIOR_STAGE

Thanks
Rick

> Thanks,
> Lukas
>
> > > >  phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
> > > > +#endif
> > > >  #ifndef CONFIG_XIP
> > > >  u32 hart_lottery __attribute__((section(".data"))) = 0;
> > > >  /*
> > > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> > > > index 41d9a32..9ede1a7 100644
> > > > --- a/arch/riscv/cpu/start.S
> > > > +++ b/arch/riscv/cpu/start.S
> > > > @@ -111,7 +111,9 @@ call_board_init_f_0:
> > > > bneztp, secondary_hart_loop
> > > >  #endif
> > > >
> > > > +#  if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
> > >
> > > #ifdef CONFIG_OF_PRIOR_STAGE ?
> >
> > OK
> >
> > > > la  t0, prior_stage_fdt_address
> > > > +#endif
> > > > SREGs1, 0(t0)
> > > >
> > > > jal board_init_f_init_reserve
> > > > --
> > >
> > > Regards,
> > > Bin
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Re: [U-Boot] [PATCH v1 1/2] spl: fit: Always enable tracking of os-type if SPL_OS_BOOT is enabled

2019-04-28 Thread Lokesh Vutla


On 26/04/19 6:51 PM, Jean-Jacques Hiblot wrote:
> FIT_IMAGE_TINY is used to reduce the size of the SPL by removing os-type
> tracking and recording the loadables into the loaded FDT. When this option
> is enabled, it is assumed that the next stage firmware is u-boot.
> However this does not play well with the SPL_OS_BOOT option that enables
> loading different type of next stage firmware, like the OS itself.
> 
> When SPL_OS_BOOT is used, do not disable os-tracking. The added footprint
> is about 300 Bytes.
> 
> Signed-off-by: Jean-Jacques Hiblot 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH v1 2/2] configs: am335x_evm: enable SPL_FIT_IMAGE_TINY

2019-04-28 Thread Lokesh Vutla


On 26/04/19 6:51 PM, Jean-Jacques Hiblot wrote:
> The size of the SPL for the am335x_evm is constrained. There is no need
> to have advanced SPL FIT features, so keep the SPL FIT support tiny.
> 
> Signed-off-by: Jean-Jacques Hiblot 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh

> 
> ---
> 
>  configs/am335x_evm_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
> index 105ff01d14..81fee7bcb0 100644
> --- a/configs/am335x_evm_defconfig
> +++ b/configs/am335x_evm_defconfig
> @@ -11,6 +11,7 @@ CONFIG_LOGLEVEL=3
>  CONFIG_SYS_CONSOLE_INFO_QUIET=y
>  CONFIG_VERSION_VARIABLE=y
>  CONFIG_ARCH_MISC_INIT=y
> +CONFIG_SPL_FIT_IMAGE_TINY=y
>  CONFIG_SPL_ETH_SUPPORT=y
>  # CONFIG_SPL_FS_EXT4 is not set
>  CONFIG_SPL_MTD_SUPPORT=y
> 
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[U-Boot] [PATCH v2 4/6] arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately before hw leveling

2019-04-28 Thread Keerthy
From: Brad Griffis 

In case of RTC+DDR resume, need to restore EMIF context
before initiating hardware leveling.

Signed-off-by: Brad Griffis 
[j-keer...@ti.com Fixed the am335x build issues]
Signed-off-by: Keerthy 
---

Changes in v2:

  * Added the am43xx specific changes under #ifdef

 arch/arm/mach-omap2/am33xx/board.c |  3 ---
 arch/arm/mach-omap2/am33xx/ddr.c   | 14 ++
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx/board.c 
b/arch/arm/mach-omap2/am33xx/board.c
index fe7b8e1e55..5507348981 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -481,9 +481,6 @@ static void rtc_only(void)
rtc_only_prcm_init();
sdram_init();
 
-   /* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
-   writel(0, &prm_device->emif_ctrl);
-
/* Check EMIF4D_SDRAM_CONFIG[31:29] SDRAM_TYPE */
/* Only perform leveling if SDRAM_TYPE = 3 (DDR3) */
sdrc = readl(AM43XX_EMIF_BASE + AM43XX_SDRAM_CONFIG_OFFSET);
diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index 5d947a68c3..c70b6fe31b 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -80,6 +80,11 @@ static void configure_mr(int nr, u32 cs)
  */
 void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
 {
+#ifdef CONFIG_AM43XX
+   struct prm_device_inst *prm_device =
+   (struct prm_device_inst *)PRM_DEVICE_INST;
+#endif
+
writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl);
writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl_shdw);
writel(regs->zq_config, &emif_reg[nr]->emif_zq_config);
@@ -126,6 +131,15 @@ void config_sdram_emif4d5(const struct emif_regs *regs, 
int nr)
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
 
+#ifdef CONFIG_AM43XX
+   /*
+* Disable EMIF_DEVOFF
+* -> Cold Boot: This is just rewriting the default register value.
+* -> RTC Resume: Must disable DEVOFF before leveling.
+*/
+   writel(0, &prm_device->emif_ctrl);
+#endif
+
/* Perform hardware leveling for DDR3 */
if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) {
writel(readl(&emif_reg[nr]->emif_ddr_ext_phy_ctrl_36) |
-- 
2.17.1

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[U-Boot] [PATCH v2 3/6] arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr path

2019-04-28 Thread Keerthy
From: Brad Griffis 

Enable HW leveling in RTC+DDR path. The mandate is to enable
HW leveling bit and then wait for 1 ms before accessing any
register.

Signed-off-by: Brad Griffis 
Signed-off-by: Keerthy 
---
 arch/arm/mach-omap2/am33xx/board.c | 30 +-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/am33xx/board.c 
b/arch/arm/mach-omap2/am33xx/board.c
index 62158a9592..fe7b8e1e55 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -38,6 +38,14 @@
 #include 
 #include 
 
+#define AM43XX_EMIF_BASE   0x4C00
+#define AM43XX_SDRAM_CONFIG_OFFSET 0x8
+#define AM43XX_SDRAM_TYPE_MASK 0xE000
+#define AM43XX_SDRAM_TYPE_SHIFT29
+#define AM43XX_SDRAM_TYPE_DDR3 3
+#define AM43XX_READ_WRITE_LEVELING_CTRL_OFFSET 0xDC
+#define AM43XX_RDWRLVLFULL_START   0x8000
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init(void)
@@ -435,7 +443,7 @@ static void rtc_only(void)
struct prm_device_inst *prm_device =
(struct prm_device_inst *)PRM_DEVICE_INST;
 
-   u32 scratch1;
+   u32 scratch1, sdrc;
void (*resume_func)(void);
 
scratch1 = readl(&rtc->scratch1);
@@ -476,6 +484,26 @@ static void rtc_only(void)
/* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
writel(0, &prm_device->emif_ctrl);
 
+   /* Check EMIF4D_SDRAM_CONFIG[31:29] SDRAM_TYPE */
+   /* Only perform leveling if SDRAM_TYPE = 3 (DDR3) */
+   sdrc = readl(AM43XX_EMIF_BASE + AM43XX_SDRAM_CONFIG_OFFSET);
+
+   sdrc &= AM43XX_SDRAM_TYPE_MASK;
+   sdrc >>= AM43XX_SDRAM_TYPE_SHIFT;
+
+   if (sdrc == AM43XX_SDRAM_TYPE_DDR3) {
+   writel(AM43XX_RDWRLVLFULL_START,
+  AM43XX_EMIF_BASE +
+  AM43XX_READ_WRITE_LEVELING_CTRL_OFFSET);
+   mdelay(1);
+
+am43xx_wait:
+   sdrc = readl(AM43XX_EMIF_BASE +
+AM43XX_READ_WRITE_LEVELING_CTRL_OFFSET);
+   if (sdrc == AM43XX_RDWRLVLFULL_START)
+   goto am43xx_wait;
+   }
+
resume_func = (void *)readl(&rtc->scratch0);
if (resume_func)
resume_func();
-- 
2.17.1

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[U-Boot] [PATCH v2 0/6] board: ti: am43xx: Enable hardware leveling

2019-04-28 Thread Keerthy
The series adds the support for hardware leveling. This needs the
kernel to be patched with hardware leveling support and the
kernel support is already in linux-next:

https://patchwork.kernel.org/project/linux-omap/list/?series=100273

Match recommended values from EMIF Tools app note:
http://www.ti.com/lit/an/sprac70/sprac70.pdf

The patch series is tested for AM437x-gp-evm DS0 and RTC+DRR mode
on linux-next in kernel.

Changes in v2:

  * Fixed am335x build issue.

Tested on AM437x-gp-evm for rtc+ddr mode and DS0
Tested on am335x-evm and beaglebone black for DS0 and rtcwake from DS0
Compile tested omap3 and omap4 defconfigs as well.

Brad Griffis (6):
  arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and
EXT_PHY_CTRL1_SHADOW
  arm: mach-omap2: am33xx: ddr: Add 1ms delay to avoid L3 error
  arm: mach-omap2: am33xx: Enable HW Leveling in the rtc+ddr path
  arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36
  board: ti: am43xx: Enable hardware leveling
  arm: mach-omap2: am33xx: Disable EMIF_DEVOFF immediately  before hw
leveling

 arch/arm/mach-omap2/am33xx/board.c | 31 +---
 arch/arm/mach-omap2/am33xx/ddr.c   | 33 ++
 board/ti/am43xx/board.c|  2 +-
 3 files changed, 58 insertions(+), 8 deletions(-)

-- 
2.17.1

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[U-Boot] [PATCH v2 2/6] arm: mach-omap2: am33xx: ddr: Add 1ms delay to avoid L3 error

2019-04-28 Thread Keerthy
From: Brad Griffis 

Add 1ms delay to avoid L3 timeout error during suspend resume.

Signed-off-by: Brad Griffis 
Signed-off-by: Keerthy 
---
 arch/arm/mach-omap2/am33xx/ddr.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index 816d4e8e05..5d947a68c3 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -138,6 +138,9 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int 
nr)
/* Enable read leveling */
writel(0x8000, &emif_reg[nr]->emif_rd_wr_lvl_ctl);
 
+   /* Wait 1ms because of L3 timeout error */
+   udelay(1000);
+
/*
 * Enable full read and write leveling.  Wait for read and write
 * leveling bit to clear RDWRLVLFULL_START bit 31
-- 
2.17.1

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[U-Boot] [PATCH v2 6/6] board: ti: am43xx: Enable hardware leveling

2019-04-28 Thread Keerthy
From: Brad Griffis 

Remove the RDLVL_MASK, RDLVLGATE_MASK, WRLVL_MASK & enable
PHY_INVERT_CLKOUT to enable Hardware leveling for am437x
as recommended by EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis 
Signed-off-by: Keerthy 
---
 board/ti/am43xx/board.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 536c5b88ed..d29a22cf05 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -244,7 +244,7 @@ const struct emif_regs ddr3_emif_regs_400Mhz_production = {
.read_idle_ctrl = 0x0005,
.zq_config  = 0x50074BE4,
.temp_alert_config  = 0x0,
-   .emif_ddr_phy_ctlr_1= 0x0E004008,
+   .emif_ddr_phy_ctlr_1= 0x00048008,
.emif_ddr_ext_phy_ctrl_1= 0x08020080,
.emif_ddr_ext_phy_ctrl_2= 0x0066,
.emif_ddr_ext_phy_ctrl_3= 0x0091,
-- 
2.17.1

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[U-Boot] [PATCH v2 1/6] arm: mach-omap2: am33xx: ddr: programming of EXT_PHY_CTRL1 and EXT_PHY_CTRL1_SHADOW

2019-04-28 Thread Keerthy
From: Brad Griffis 

Adjust DQS skew in case where invert_clkout=1 is used.
Match recommended values from EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis 
Signed-off-by: Keerthy 
---
 arch/arm/mach-omap2/am33xx/ddr.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index be6f4d72cc..816d4e8e05 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -256,8 +256,16 @@ static void ext_phy_settings_hwlvl(const struct emif_regs 
*regs, int nr)
 * Enable hardware leveling on the EMIF.  For details about these
 * magic values please see the EMIF registers section of the TRM.
 */
-   writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
-   writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
+   if (regs->emif_ddr_phy_ctlr_1 & 0x0004) {
+   /* PHY_INVERT_CLKOUT = 1 */
+   writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
+   writel(0x00040100, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
+   } else {
+   /* PHY_INVERT_CLKOUT = 0 */
+   writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1);
+   writel(0x08020080, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_1_shdw);
+   }
+
writel(0x, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22);
writel(0x, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_22_shdw);
writel(0x00600020, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_23);
-- 
2.17.1

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[U-Boot] [PATCH v2 5/6] arm: mach-omap2: am33xx: ddr: update value for ext_phy_ctrl_36

2019-04-28 Thread Keerthy
From: Brad Griffis 

for suspend/resume robustness

update value for ext_phy_ctrl_36 for suspend/resume robustness
with hardware leveling enabled.

Match recommended values from EMIF Tools app note:

http://www.ti.com/lit/an/sprac70/sprac70.pdf

Signed-off-by: Brad Griffis 
Signed-off-by: Keerthy 
---
 arch/arm/mach-omap2/am33xx/ddr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index c70b6fe31b..3fd1d086ff 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -311,8 +311,8 @@ static void ext_phy_settings_hwlvl(const struct emif_regs 
*regs, int nr)
writel(0x, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_34_shdw);
writel(0x, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35);
writel(0x, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_35_shdw);
-   writel(0x00FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
-   writel(0x00FF, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
+   writel(0x0077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36);
+   writel(0x0077, &emif_reg[nr]->emif_ddr_ext_phy_ctrl_36_shdw);
 
/*
 * Sequence to ensure that the PHY is again in a known state after
-- 
2.17.1

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