[U-Boot] [PATCH v4 1/8] armv8: enable BLK code configuration

[Yinbo Zhu]

This patch is to enable BLK code configuration for SD boot.

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.   

 include/mmc.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/mmc.h b/include/mmc.h
index 534c317..66e69b7 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -604,7 +604,7 @@ struct mmc {
u64 enh_user_start;
u64 enh_user_size;
 #endif
-#if !CONFIG_IS_ENABLED(BLK)
+#if CONFIG_IS_ENABLED(BLK)
struct blk_desc block_dev;
 #endif
char op_cond_pending;   /* 1 if we are waiting on an op_cond command */
-- 
1.7.1

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[U-Boot] [PATCH v4 2/8] armv8/ls1088a/ls2088a: esdhc: Add esdhc clock support

[Yinbo Zhu]

This patch adds esdhc clock support for ls1088a and ls2088a.

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.

 .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c |   14 ++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index 653c6dd..bc268e2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -192,6 +192,16 @@ int get_dspi_freq(ulong dummy)
return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
 }
 
+#ifdef CONFIG_FSL_ESDHC
+int get_sdhc_freq(ulong dummy)
+{
+   if (!gd->arch.sdhc_clk)
+   get_clocks();
+
+   return gd->arch.sdhc_clk;
+}
+#endif
+
 int get_serial_clock(void)
 {
return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@@ -202,6 +212,10 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_I2C_CLK:
return get_i2c_freq(0);
+#if defined(CONFIG_FSL_ESDHC)
+   case MXC_ESDHC_CLK:
+   return get_sdhc_freq(0);
+#endif
case MXC_DSPI_CLK:
return get_dspi_freq(0);
default:
-- 
1.7.1

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[U-Boot] [PATCH v4 3/8] Enable CONFIG_BLK and CONFIG_DM_MMC to Kconfig

[Yinbo Zhu]

This enables the folowing to Kconfig:
CONFIG_BLK
CONFIG_DM_MMC

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.   

 configs/ls1021atwr_nor_SECURE_BOOT_defconfig   |2 ++
 configs/ls1021atwr_nor_defconfig   |2 ++
 configs/ls1021atwr_nor_lpuart_defconfig|2 ++
 configs/ls1021atwr_qspi_defconfig  |2 ++
 .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig|2 ++
 configs/ls1021atwr_sdcard_ifc_defconfig|2 ++
 configs/ls1021atwr_sdcard_qspi_defconfig   |2 ++
 configs/ls1043aqds_defconfig   |2 ++
 configs/ls1043aqds_lpuart_defconfig|2 ++
 configs/ls1043aqds_nand_defconfig  |2 ++
 configs/ls1043aqds_nor_ddr3_defconfig  |2 ++
 configs/ls1043aqds_qspi_defconfig  |2 ++
 configs/ls1043aqds_sdcard_ifc_defconfig|2 ++
 configs/ls1043aqds_sdcard_qspi_defconfig   |2 ++
 configs/ls1043ardb_SECURE_BOOT_defconfig   |2 ++
 configs/ls1043ardb_defconfig   |2 ++
 configs/ls1043ardb_nand_SECURE_BOOT_defconfig  |2 ++
 configs/ls1043ardb_nand_defconfig  |2 ++
 configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig|2 ++
 configs/ls1043ardb_sdcard_defconfig|2 ++
 configs/ls1046aqds_SECURE_BOOT_defconfig   |2 ++
 configs/ls1046aqds_defconfig   |2 ++
 configs/ls1046aqds_lpuart_defconfig|2 ++
 configs/ls1046aqds_nand_defconfig  |2 ++
 configs/ls1046aqds_qspi_defconfig  |2 ++
 configs/ls1046aqds_sdcard_ifc_defconfig|2 ++
 configs/ls1046aqds_sdcard_qspi_defconfig   |2 ++
 configs/ls1046ardb_emmc_defconfig  |2 ++
 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls1046ardb_qspi_defconfig  |2 ++
 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig|2 ++
 configs/ls1046ardb_sdcard_defconfig|2 ++
 configs/ls1088aqds_defconfig   |2 ++
 configs/ls1088aqds_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls1088aqds_qspi_defconfig  |2 ++
 configs/ls1088aqds_sdcard_ifc_defconfig|2 ++
 configs/ls1088aqds_sdcard_qspi_defconfig   |2 ++
 configs/ls1088ardb_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls1088ardb_qspi_defconfig  |2 ++
 .../ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig   |2 ++
 configs/ls1088ardb_sdcard_qspi_defconfig   |2 ++
 configs/ls2080a_emu_defconfig  |2 ++
 configs/ls2080a_simu_defconfig |2 ++
 configs/ls2080aqds_SECURE_BOOT_defconfig   |2 ++
 configs/ls2080aqds_defconfig   |2 ++
 configs/ls2080aqds_nand_defconfig  |2 ++
 configs/ls2080aqds_qspi_defconfig  |2 ++
 configs/ls2080aqds_sdcard_defconfig|2 ++
 configs/ls2080ardb_SECURE_BOOT_defconfig   |2 ++
 configs/ls2080ardb_defconfig   |2 ++
 configs/ls2080ardb_nand_defconfig  |2 ++
 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls2088ardb_qspi_defconfig  |2 ++
 53 files changed, 106 insertions(+), 0 deletions(-)

diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig 
b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 17a202d..4d85983 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -48,3 +48,5 @@ CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index a18426e..f4f7998 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -48,3 +48,5 @@ CONFIG_USB_STORAGE=y
 CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig 
b/configs/ls1021atwr_nor_lpuart_defconfig
index 83ffa19..037f56c 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -49,3 +49,5 @@ CONFIG_USB_STORAGE=y
 CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_qspi_defconfig 
b/configs/ls1021atwr_qspi_defconfig
index 46d8dbb..084bd27 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -55,3 +55,5 @@ CONFIG_USB_STORAGE=y
 CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECU

[U-Boot] [PATCH v4 5/8] armv8: ls1088a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls1088a.

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.

 arch/arm/dts/fsl-ls1088a.dtsi |9 +
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 077caf3..72d755a 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -74,6 +74,15 @@
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
};
+
+   esdhc: esdhc@214 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x214 0x0 0x1>;
+   interrupts = <0 28 0x4>; /* Level high type */
+   little-endian;
+   bus-width = <4>;
+   };
+
ifc: ifc@153 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x224 0x0 0x2>;
-- 
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[U-Boot] [PATCH v4 6/8] armv8: ls1043a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls1043a.

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.

 arch/arm/dts/fsl-ls1043a.dtsi |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index ff40122..a804f51 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -70,6 +70,14 @@
status = "disabled";
};
 
+   esdhc: esdhc@156 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x156 0x0 0x1>;
+   interrupts = <0 62 0x4>;
+   big-endian;
+   bus-width = <4>;
+   };
+
ifc: ifc@153 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x153 0x0 0x1>;
-- 
1.7.1

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[U-Boot] [PATCH v4 7/8] armv8: ls1046a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls1046a.

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.

 arch/arm/dts/fsl-ls1046a.dtsi |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 4acbaf7..7687d12 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -70,6 +70,14 @@
status = "disabled";
};
 
+   esdhc: esdhc@156 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x156 0x0 0x1>;
+   interrupts = <0 62 0x4>;
+   big-endian;
+   bus-width = <4>;
+   };
+
ifc: ifc@153 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x153 0x0 0x1>;
-- 
1.7.1

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[U-Boot] [v2 patch] net: fman: Support both new and legacy FMan Compatibles

[Zhao Qiang]

Recently  the FMan Port and MAC compatibles were changed.
This patch aligns the FMan Port and MAC compatibles
to the new FMan device tree binding document.
The FMan device tree binding document can be found in the Linux
kernel:
version 3.18.0
commit 297d35fd2a7d3fbd4e5c0f0c1c18213117ba11ba
./Documentation/devicetree/bindings/powerpc/fsl/fman.txt

This patch doesn't affect legacy compatibles support.

Signed-off-by: Zhao Qiang 
---
Changes for v2
- add kernel version and commit id modifing the binding

 drivers/net/fm/init.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
index 71c3abe..48344f0 100644
--- a/drivers/net/fm/init.c
+++ b/drivers/net/fm/init.c
@@ -329,7 +329,8 @@ void fdt_fixup_fman_ethernet(void *blob)
ft_fixup_port(blob, &fm_info[i],
  "fsl,fman-1g-mac");
} else {
-   if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-tgec"))
+   if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-tgec") &&
+   ft_fixup_port(blob, &fm_info[i], "fsl,fman-xgec"))
ft_fixup_port(blob, &fm_info[i],
  "fsl,fman-10g-mac");
}
-- 
1.7.1

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[U-Boot] [PATCH v4 4/8] armv8: ls2088a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls2088a.

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.

 arch/arm/dts/fsl-ls2080a.dtsi |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index b0f8517..2d537ae 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -75,6 +75,14 @@
num-cs = <4>;
};
 
+   esdhc: esdhc@0 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x214 0x0 0x1>;
+   interrupts = <0 28 0x4>; /* Level high type */
+   little-endian;
+   bus-width = <4>;
+   };
+
usb0: usb3@310 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x310 0x0 0x1>;
-- 
1.7.1

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[U-Boot] [PATCH v4 8/8] armv7: ls1021a: enable esdhc

[Yinbo Zhu]

This patch is to enable eSDHC for ls1021a.

Signed-off-by: Yinbo Zhu 
---
Change in v4:
keep the same revision v4 for the entire set.

 arch/arm/dts/ls1021a.dtsi |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 5b3fc6a..59c97d5 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -96,7 +96,6 @@
sdhci,auto-cmd12;
big-endian;
bus-width = <4>;
-   status = "disabled";
};
 
scfg: scfg@157 {
-- 
1.7.1

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[U-Boot] [PATCH v1 2/2] colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support

[Stefan Agner]

From: Stefan Agner 

This commit adds support for the Toradex Colibri iMX7D 1GB Computer
on Module. The module is very similar to the Colibri iMX7D 512MB
but uses eMMC instead of raw NAND. This patch introduces a new
board specific Kconfig symbol to select between the two flash
options.

Signed-off-by: Stefan Agner 
---

 board/toradex/colibri_imx7/Kconfig| 42 ++-
 board/toradex/colibri_imx7/MAINTAINERS|  4 +
 board/toradex/colibri_imx7/colibri_imx7.c | 41 ++-
 include/configs/colibri_imx7.h| 90 ++-
 4 files changed, 154 insertions(+), 23 deletions(-)

diff --git a/board/toradex/colibri_imx7/Kconfig 
b/board/toradex/colibri_imx7/Kconfig
index 414a600eef..d33ec63523 100644
--- a/board/toradex/colibri_imx7/Kconfig
+++ b/board/toradex/colibri_imx7/Kconfig
@@ -1,5 +1,24 @@
 if TARGET_COLIBRI_IMX7
 
+choice
+   prompt "Colibri iMX7S/D variant"
+
+config TARGET_COLIBRI_IMX7_NAND
+   bool "Support Colibri iMX7 Solo 256MB/Dual 512MB (raw NAND) modules"
+   imply NAND_MXS
+   help
+ Choose this option if you build for a Toradex Colibri iMX7S
+ 256MB or Colibri iMX7D 512MB module which do have raw NAND
+ on-module.
+
+config TARGET_COLIBRI_IMX7_EMMC
+   bool "Support Colibri iMX7 Dual 1GB (eMMC) modules"
+   help
+ Choose this option if you build for a Toradex Colibri iMX7D
+ 1GB module which does have eMMC on-module.
+
+endchoice
+
 config SYS_BOARD
default "colibri_imx7"
 
@@ -19,6 +38,11 @@ config COLIBRI_IMX7_EXT_PHYCLK
 config TDX_CFG_BLOCK
default y
 
+config TDX_CFG_BLOCK_2ND_ETHADDR
+   default y
+
+if TARGET_COLIBRI_IMX7_NAND
+
 config TDX_HAVE_NAND
default y
 
@@ -28,9 +52,25 @@ config TDX_CFG_BLOCK_OFFSET
 config TDX_CFG_BLOCK_OFFSET2
default "133120"
 
-config TDX_CFG_BLOCK_2ND_ETHADDR
+endif
+
+if TARGET_COLIBRI_IMX7_EMMC
+
+config TDX_HAVE_MMC
default y
 
+config TDX_CFG_BLOCK_DEV
+   default "0"
+
+config TDX_CFG_BLOCK_PART
+   default "1"
+
+# Toradex config block in eMMC, at the end of 1st "boot sector"
+config TDX_CFG_BLOCK_OFFSET
+   default "-512"
+
+endif
+
 source "board/toradex/common/Kconfig"
 
 endif
diff --git a/board/toradex/colibri_imx7/MAINTAINERS 
b/board/toradex/colibri_imx7/MAINTAINERS
index 5ffb2417aa..9c1d42aa8c 100644
--- a/board/toradex/colibri_imx7/MAINTAINERS
+++ b/board/toradex/colibri_imx7/MAINTAINERS
@@ -1,6 +1,10 @@
 Colibri iMX7
 M: Stefan Agner 
+M: Toradex ARM Support 
+W: http://developer.toradex.com/software/linux/linux-software
+W: https://www.toradex.com/community
 S: Maintained
 F: board/toradex/colibri_imx7/
 F: include/configs/colibri_imx7.h
 F: configs/colibri_imx7_defconfig
+F: configs/colibri_imx7_emmc_defconfig
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c 
b/board/toradex/colibri_imx7/colibri_imx7.c
index 2210095d7a..2b7591eb00 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2016 Toradex AG
+ * Copyright (C) 2016-2018 Toradex AG
  */
 
 #include 
@@ -81,7 +81,7 @@ static iomux_v3_cfg_t const usb_cdet_pads[] = {
 };
 #endif
 
-#ifdef CONFIG_NAND_MXS
+#ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND
 static iomux_v3_cfg_t const gpmi_pads[] = {
MX7D_PAD_SD3_DATA0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL),
MX7D_PAD_SD3_DATA1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL),
@@ -109,6 +109,24 @@ static void setup_gpmi_nand(void)
 }
 #endif
 
+#ifdef CONFIG_TARGET_COLIBRI_IMX7_EMMC
+static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
+   MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD3_STROBE__SD3_STROBE  | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+
+   MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+#endif
+
 #ifdef CONFIG_VIDEO_MXS
 static iomux_v3_cfg_t const lcd_pads[] = {
MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
@@ -198,6 +216,9 @@ static void setup_iomux_uart(void)
 #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 0)
 
 static struct fsl_esdhc_cfg usdhc_cfg[] = {
+#ifdef CONFIG_TARGET_COLIBRI_IMX7_EMMC
+   {USDHC3_BASE_ADDR},
+#endif
{USDHC1_BASE_ADDR, 0, 4},
 };
 
@@ -210,6 +231,11 @@ int board_mmc_getcd(struct mmc *mmc)
   

[U-Boot] [PATCH v1 1/2] board: toradex: common: fail gracefully on missing NAND chip

[Stefan Agner]

From: Stefan Agner 

If the NAND chip is missing get_nand_dev_by_index() returns NULL. Fail
gracefully in this case.

Signed-off-by: Stefan Agner 
---

 board/toradex/common/tdx-cfg-block.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/board/toradex/common/tdx-cfg-block.c 
b/board/toradex/common/tdx-cfg-block.c
index 57edb6c5c9..d4f5b1803a 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -156,10 +156,13 @@ out:
 static int read_tdx_cfg_block_from_nand(unsigned char *config_block)
 {
size_t size = TDX_CFG_BLOCK_MAX_SIZE;
+   struct mtd_info *mtd = get_nand_dev_by_index(0);
+
+   if (!mtd)
+   return -ENODEV;
 
/* Read production parameter config block from NAND page */
-   return nand_read_skip_bad(get_nand_dev_by_index(0),
- CONFIG_TDX_CFG_BLOCK_OFFSET,
+   return nand_read_skip_bad(mtd, CONFIG_TDX_CFG_BLOCK_OFFSET,
  &size, NULL, TDX_CFG_BLOCK_MAX_SIZE,
  config_block);
 }
-- 
2.18.0

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Re: [U-Boot] [U-Boot, v4, 9/9] ARM: dts: stm32: remove cd-inverted for stm32f746-disco

[Patrice CHOTARD]

Hi Tom

On 08/05/2018 01:39 AM, Tom Rini wrote:
> On Wed, Jul 25, 2018 at 05:49:12PM +0200, Patrice Chotard wrote:
> 
>> As cd-inverted property is no more used by arm_pl180_mmci driver,
>> remove it. Update cd-gpios active level accordingly.
>>
>> Reported-by: Tuomas Tynkkynen 
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2: None
>>
>>   arch/arm/dts/stm32f746-disco.dts | 3 +--
>>   1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/dts/stm32f746-disco.dts 
>> b/arch/arm/dts/stm32f746-disco.dts
>> index e47f762e54dc..187c94b99bfa 100644
>> --- a/arch/arm/dts/stm32f746-disco.dts
>> +++ b/arch/arm/dts/stm32f746-disco.dts
>> @@ -307,8 +307,7 @@
>>   
>>   &sdio {
>>  status = "okay";
>> -cd-gpios = <&gpioc 13 0>;
>> -cd-inverted;
>> +cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
>>  pinctrl-names = "default", "opendrain";
>>  pinctrl-0 = <&sdio_pins>;
>>  pinctrl-1 = <&sdio_pins_od>;
> 
> So I can't apply this one as it breaks the build for stm32f746-disco as
> dt-bindings/gpio/gpio.h isn't being included by this dts tree.

Sorry, i will resend patches 8 and 9 with the correct fix.

Patrice

Thanks

> 
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[U-Boot] [PATCH 1/2] ARM: dts: stm32: remove cd-inverted for stm32f769-disco

[Patrice Chotard]

As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen 
Signed-off-by: Patrice Chotard 
---

 arch/arm/dts/stm32f769-disco.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 59c9d31c213b..1e8ef742cead 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -43,6 +43,7 @@
 /dts-v1/;
 #include "stm32f746.dtsi"
 #include 
+#include 
 
 / {
model = "STMicroelectronics STM32F769-DISCO board";
@@ -256,8 +257,7 @@
 
 &sdio2 {
status = "okay";
-   cd-gpios = <&gpioi 15 0>;
-   cd-inverted;
+   cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "opendrain";
pinctrl-0 = <&sdio_pins_b>;
pinctrl-1 = <&sdio_pins_od_b>;
-- 
1.9.1

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[U-Boot] [PATCH 2/2] ARM: dts: stm32: remove cd-inverted for stm32f746-disco

[Patrice Chotard]

As cd-inverted property is no more used by arm_pl180_mmci driver,
remove it. Update cd-gpios active level accordingly.

Reported-by: Tuomas Tynkkynen 
Signed-off-by: Patrice Chotard 

---

 arch/arm/dts/stm32f746-disco.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index e47f762e54dc..7ef33d638130 100644
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -48,6 +48,7 @@
 /dts-v1/;
 #include "stm32f746.dtsi"
 #include 
+#include 
 
 / {
model = "STMicroelectronics STM32F746-DISCO board";
@@ -307,8 +308,7 @@
 
 &sdio {
status = "okay";
-   cd-gpios = <&gpioc 13 0>;
-   cd-inverted;
+   cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "opendrain";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_pins_od>;
-- 
1.9.1

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[U-Boot] [PATCH 0/2] Remove DT cd-inverted property for stm32f7

[Patrice Chotard]

This series :
  - removes DT cd-inverted property for stm32f746 and stm32f769
discovery boards


Patrice Chotard (2):
  ARM: dts: stm32: remove cd-inverted for stm32f769-disco
  ARM: dts: stm32: remove cd-inverted for stm32f746-disco

 arch/arm/dts/stm32f746-disco.dts | 4 ++--
 arch/arm/dts/stm32f769-disco.dts | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

-- 
1.9.1

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Re: [U-Boot] [U-Boot,v2,6/6] ARM: dts: stm32mp157: Add ADC DT node

[Patrice CHOTARD]

Hi Tom

On 08/05/2018 01:39 AM, Tom Rini wrote:
> On Tue, Jul 24, 2018 at 04:31:33PM +0200, Fabrice Gasnier wrote:
> 
>> Add ADC device tree node. This allows to get analog conversions on
>> stm32mp157.
>>
>> Signed-off-by: Fabrice Gasnier 
>> Reviewed-by: Simon Glass 
> 
> This doesn't apply currently, please rebase, thanks!
> 

As Fabrice is out of office, i will resend this patch 6.

Thanks

Patrice
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[U-Boot] [PATCH] ARM: dts: stm32mp157: Add ADC DT node

[Patrice Chotard]

Add ADC device tree node. This allows to get analog conversions on
stm32mp157.

Signed-off-by: Fabrice Gasnier 
Signed-off-by: Patrice Chotard 
---

 arch/arm/dts/stm32mp157c.dtsi | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi
index 8df9f09dc6c3..cdf294696882 100644
--- a/arch/arm/dts/stm32mp157c.dtsi
+++ b/arch/arm/dts/stm32mp157c.dtsi
@@ -608,6 +608,38 @@
clocks = <&rcc DMAMUX>;
};
 
+   adc: adc@48003000 {
+   compatible = "st,stm32mp1-adc-core";
+   reg = <0x48003000 0x400>;
+   interrupts = ,
+;
+   clocks = <&rcc ADC12>, <&rcc ADC12_K>;
+   clock-names = "bus", "adc";
+   interrupt-controller;
+   #interrupt-cells = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   adc1: adc@0 {
+   compatible = "st,stm32mp1-adc";
+   #io-channel-cells = <1>;
+   reg = <0x0>;
+   interrupt-parent = <&adc>;
+   interrupts = <0>;
+   status = "disabled";
+   };
+
+   adc2: adc@100 {
+   compatible = "st,stm32mp1-adc";
+   #io-channel-cells = <1>;
+   reg = <0x100>;
+   interrupt-parent = <&adc>;
+   interrupts = <1>;
+   status = "disabled";
+   };
+   };
+
sdmmc3: sdmmc@48004000 {
compatible = "st,stm32-sdmmc2";
reg = <0x48004000 0x400>, <0x48005000 0x400>;
-- 
1.9.1

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Re: [U-Boot] [U-Boot, u-boot, 2/2] clk: clk_meson: Add mux and div support for reparent and rate setting

[Neil Armstrong]

Hi Tom,

On 05/08/2018 01:39, Tom Rini wrote:
> On Thu, Jul 26, 2018 at 03:54:04PM +0200, Neil Armstrong wrote:
> 
>> This patch adds support for :
>> - Rate calculation through muxes and generic dividers
>> - Basic gate setting propagation
>> - Reparenting for muxes
>> - Clock rate setting through generic dividers without reparenting
>>
>> Support is only added to the Composite VPU and VAPB clocks in order
>> to support the Video Processing Unit Power Domain clock setup.
>>
>> Signed-off-by: Neil Armstrong 
>> Reviewed-by: Simon Glass 
> 
> I get:
> Building current source for 1 boards (1 thread, 16 jobs per thread)
>aarch64:  +   khadas-vim
> +(khadas-vim) In file included from include/linux/bug.h:7:0,
> +(khadas-vim)  from include/common.h:25,
> +(khadas-vim)  from drivers/clk/clk_meson.c:8:
> +(khadas-vim)   debug("%s: %sabling %d\n", __func__, on ? "en" : "dis", id);
> +(khadas-vim) ^
> +(khadas-vim) include/linux/printk.h:37:21: note: in definition of macro 
> 'pr_fmt'
> +(khadas-vim)  #define pr_fmt(fmt) fmt
> +(khadas-vim)  ^~~
> +(khadas-vim) include/log.h:141:2: note: in expansion of macro 'debug_cond'
> +(khadas-vim)   debug_cond(_DEBUG, fmt, ##args)
> +(khadas-vim)   ^~
> +(khadas-vim) drivers/clk/clk_meson.c:198:2: note: in expansion of macro 
> 'debug'
> +(khadas-vim)   ^
> +(khadas-vim)   debug("%s: really %sabling %d\n", __func__, on ? "en" : 
> "dis", id);
> +(khadas-vim) drivers/clk/clk_meson.c:218:2: note: in expansion of macro 
> 'debug'
> +(khadas-vim) arch/arm/dts/meson-gxl-s905x-khadas-vim.dtb: Warning 
> (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary 
> #address-cells/#size-cells without "ranges" or child "reg" property
> w+(khadas-vim) drivers/clk/clk_meson.c: In function 'meson_set_gate_by_id':
> w+(khadas-vim) drivers/clk/clk_meson.c:198:8: warning: format '%d' expects 
> argument of type 'int', but argument 4 has type 'long unsigned int' 
> [-Wformat=]
> w+(khadas-vim) drivers/clk/clk_meson.c:218:8: warning: format '%d' expects 
> argument of type 'int', but argument 4 has type 'long unsigned int' 
> [-Wformat=]
>  

Thanks for pointing me these, I missed these...

I'll repost a fixed version ASAP.

Neil




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[U-Boot] [PATCH v4 02/17] powerpc: Add read*_*/write*_* macros

[Mario Six]

Define the read*_*/write*_* macros for the PowerPC platform to be able
to use the macros in wait_bit.h.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
New in v4

 arch/powerpc/include/asm/io.h | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 34fbfdf1cf0..6d76e3e99cc 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -282,6 +282,24 @@ static inline void out_be32(volatile unsigned __iomem 
*addr, u32 val)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
+#define readb_be(addr) \
+   __raw_readb((__force unsigned *)(addr))
+#define readw_be(addr) \
+   be16_to_cpu(__raw_readw((__force unsigned *)(addr)))
+#define readl_be(addr) \
+   be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
+#define readq_be(addr) \
+   be64_to_cpu(__raw_readq((__force unsigned *)(addr)))
+
+#define writeb_be(val, addr)   \
+   __raw_writeb((val), (__force unsigned *)(addr))
+#define writew_be(val, addr)   \
+   __raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr))
+#define writel_be(val, addr)   \
+   __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))
+#define writeq_be(val, addr)   \
+   __raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr))
+
 static inline void *phys_to_virt(phys_addr_t paddr)
 {
 #ifdef CONFIG_ADDR_MAP
-- 
2.11.0

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[U-Boot] [PATCH v4 03/17] sysreset: Add get_status method

[Mario Six]

It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).

As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
No changes

v2 -> v3:
No changes

v1 -> v2:
New in v2

 drivers/sysreset/sysreset-uclass.c | 10 ++
 include/sysreset.h | 17 +
 2 files changed, 27 insertions(+)

diff --git a/drivers/sysreset/sysreset-uclass.c 
b/drivers/sysreset/sysreset-uclass.c
index b918365e73a..06ef0ed96c7 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -24,6 +24,16 @@ int sysreset_request(struct udevice *dev, enum sysreset_t 
type)
return ops->request(dev, type);
 }
 
+int sysreset_get_status(struct udevice *dev, char *buf, int size)
+{
+   struct sysreset_ops *ops = sysreset_get_ops(dev);
+
+   if (!ops->get_status)
+   return -ENOSYS;
+
+   return ops->get_status(dev, buf, size);
+}
+
 int sysreset_walk(enum sysreset_t type)
 {
struct udevice *dev;
diff --git a/include/sysreset.h b/include/sysreset.h
index 81318bdbf5d..a5c0b74a473 100644
--- a/include/sysreset.h
+++ b/include/sysreset.h
@@ -28,6 +28,14 @@ struct sysreset_ops {
 *  (in which case this method will not actually return)
 */
int (*request)(struct udevice *dev, enum sysreset_t type);
+   /**
+* get_status() - get printable reset status information
+*
+* @buf:Buffer to receive the textual reset information
+* @size:   Size of the passed buffer
+* @return 0 if OK, -ve on error
+*/
+   int (*get_status)(struct udevice *dev, char *buf, int size);
 };
 
 #define sysreset_get_ops(dev)((struct sysreset_ops 
*)(dev)->driver->ops)
@@ -41,6 +49,15 @@ struct sysreset_ops {
 int sysreset_request(struct udevice *dev, enum sysreset_t type);
 
 /**
+ * get_status() - get printable reset status information
+ *
+ * @buf:   Buffer to receive the textual reset information
+ * @size:  Size of the passed buffer
+ * @return 0 if OK, -ve on error
+ */
+int sysreset_get_status(struct udevice *dev, char *buf, int size);
+
+/**
  * sysreset_walk() - cause a system reset
  *
  * This works through the available sysreset devices until it finds one that 
can
-- 
2.11.0

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[U-Boot] [PATCH v4 04/17] test: Add tests for sysreset_get_status

[Mario Six]

Add some tests for sysreset_get_status.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Switched to usage of strlcpy

v2 -> v3:
New in v3.

 drivers/sysreset/sysreset_sandbox.c | 16 
 test/dm/sysreset.c  | 20 
 2 files changed, 36 insertions(+)

diff --git a/drivers/sysreset/sysreset_sandbox.c 
b/drivers/sysreset/sysreset_sandbox.c
index f12c4e84198..75004d9f774 100644
--- a/drivers/sysreset/sysreset_sandbox.c
+++ b/drivers/sysreset/sysreset_sandbox.c
@@ -29,6 +29,13 @@ static int sandbox_warm_sysreset_request(struct udevice *dev,
return -EINPROGRESS;
 }
 
+int sandbox_warm_sysreset_get_status(struct udevice *dev, char *buf, int size)
+{
+   strlcpy(buf, "Reset Status: WARM", size);
+
+   return 0;
+}
+
 static int sandbox_sysreset_request(struct udevice *dev, enum sysreset_t type)
 {
struct sandbox_state *state = state_get_current();
@@ -60,8 +67,16 @@ static int sandbox_sysreset_request(struct udevice *dev, 
enum sysreset_t type)
return -EINPROGRESS;
 }
 
+int sandbox_sysreset_get_status(struct udevice *dev, char *buf, int size)
+{
+   strlcpy(buf, "Reset Status: COLD", size);
+
+   return 0;
+}
+
 static struct sysreset_ops sandbox_sysreset_ops = {
.request= sandbox_sysreset_request,
+   .get_status = sandbox_sysreset_get_status,
 };
 
 static const struct udevice_id sandbox_sysreset_ids[] = {
@@ -78,6 +93,7 @@ U_BOOT_DRIVER(sysreset_sandbox) = {
 
 static struct sysreset_ops sandbox_warm_sysreset_ops = {
.request= sandbox_warm_sysreset_request,
+   .get_status = sandbox_warm_sysreset_get_status,
 };
 
 static const struct udevice_id sandbox_warm_sysreset_ids[] = {
diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c
index 33a8bfb33c4..04d4621d9e1 100644
--- a/test/dm/sysreset.c
+++ b/test/dm/sysreset.c
@@ -45,6 +45,26 @@ static int dm_test_sysreset_base(struct unit_test_state *uts)
 }
 DM_TEST(dm_test_sysreset_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 
+static int dm_test_sysreset_get_status(struct unit_test_state *uts)
+{
+   struct udevice *dev;
+   char msg[64];
+
+   /* Device 1 is the warm sysreset device */
+   ut_assertok(uclass_get_device(UCLASS_SYSRESET, 1, &dev));
+   ut_assertok(sysreset_get_status(dev, msg, sizeof(msg)));
+   ut_asserteq_str("Reset Status: WARM", msg);
+
+   /* Device 2 is the cold sysreset device */
+   ut_assertok(uclass_get_device(UCLASS_SYSRESET, 2, &dev));
+   ut_assertok(sysreset_get_status(dev, msg, sizeof(msg)));
+   ut_asserteq_str("Reset Status: COLD", msg);
+
+   return 0;
+}
+
+DM_TEST(dm_test_sysreset_get_status, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
 /* Test that we can walk through the sysreset devices */
 static int dm_test_sysreset_walk(struct unit_test_state *uts)
 {
-- 
2.11.0

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[U-Boot] [PATCH v4 10/17] common: board_f: Sort includes

[Mario Six]

Includes should be sorted.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
No changes

v2 -> v3:
No changes

v1 -> v2:
New in v2

 common/board_f.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/board_f.c b/common/board_f.c
index 3871839a2db..afafec5e4d0 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -11,8 +11,8 @@
 
 #include 
 #include 
-#include 
 #include 
+#include 
 #include 
 #include 
 #include 
-- 
2.11.0

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[U-Boot] [PATCH v4 05/17] board_f: Add reset status printing

[Mario Six]

To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
No changes

v2 -> v3:
* Improved behavior and error handling

v1 -> v2:
New in v2

 common/board_f.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/common/board_f.c b/common/board_f.c
index 88d770071c3..3871839a2db 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -140,6 +141,30 @@ static int display_text_info(void)
return 0;
 }
 
+#ifdef CONFIG_SYSRESET
+static int print_resetinfo(void)
+{
+   struct udevice *dev;
+   char status[256];
+   int ret;
+
+   ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
+   if (ret) {
+   debug("%s: No sysreset device found (error: %d)\n",
+ __func__, ret);
+   /* Not all boards have sysreset drivers available during early
+* boot, so don't fail if one can't be found.
+*/
+   return 0;
+   }
+
+   if (!sysreset_get_status(dev, status, sizeof(status)))
+   printf("%s", status);
+
+   return 0;
+}
+#endif
+
 static int announce_dram_init(void)
 {
puts("DRAM:  ");
@@ -790,6 +815,9 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
checkcpu,
 #endif
+#if defined(CONFIG_SYSRESET)
+   print_resetinfo,
+#endif
 #if defined(CONFIG_DISPLAY_CPUINFO)
print_cpuinfo,  /* display cpu info (and speed) */
 #endif
-- 
2.11.0

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[U-Boot] [PATCH v4 06/17] mpc83xx: Add sysreset driver

[Mario Six]

Add a sysreset driver for the MPC83xx platform.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Fixed style violation
* Added full documentation
* Switched to wait_for_bit_be32 usage
* Improved error handling and debug printing
* Minimized usage of preprocessor

v2 -> v3:
* Added driver file to MAINTAINERS

v1 -> v2:
New in v2

 MAINTAINERS |   2 +
 arch/powerpc/cpu/mpc83xx/cpu.c  |   3 +-
 drivers/sysreset/Kconfig|   5 +
 drivers/sysreset/Makefile   |   9 +-
 drivers/sysreset/sysreset_mpc83xx.c | 212 
 drivers/sysreset/sysreset_mpc83xx.h | 103 ++
 6 files changed, 329 insertions(+), 5 deletions(-)
 create mode 100644 drivers/sysreset/sysreset_mpc83xx.c
 create mode 100644 drivers/sysreset/sysreset_mpc83xx.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 57329e878ae..801e47897f6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -497,6 +497,8 @@ S:  Maintained
 T: git git://git.denx.de/u-boot-mpc83xx.git
 F: drivers/ram/mpc83xx_sdram.c
 F: include/dt-bindings/memory/mpc83xx-sdram.h
+F: drivers/sysreset/sysreset_mpc83xx.c
+F: drivers/sysreset/sysreset_mpc83xx.h
 F: arch/powerpc/cpu/mpc83xx/
 F: arch/powerpc/include/asm/arch-mpc83xx/
 
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 82370b54301..e1d2f2f07cb 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -115,6 +115,7 @@ int checkcpu(void)
return 0;
 }
 
+#ifndef CONFIG_SYSRESET
 int
 do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 {
@@ -169,7 +170,7 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * 
const argv[])
 
return 1;
 }
-
+#endif
 
 /*
  * Get timebase clock frequency (like cpu_clk in Hz)
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 9b2fda4d251..ca03d165a52 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -57,4 +57,9 @@ config SYSRESET_X86
help
  Reboot support for generic x86 processor reset.
 
+config SYSRESET_MCP83XX
+   bool "Enable support MPC83xx SoC family reboot driver"
+   help
+ Reboot support for NXP MPC83xx SoCs.
+
 endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 707f1d74691..3a2ddf4cd73 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -3,14 +3,15 @@
 # (C) Copyright 2016 Cadence Design Systems Inc.
 
 obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
+obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
+obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
+obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
+obj-$(CONFIG_SYSRESET_MCP83XX) += sysreset_mpc83xx.o
 obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 obj-$(CONFIG_SYSRESET_X86) += sysreset_x86.o
-obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
-obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
-obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
-obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
diff --git a/drivers/sysreset/sysreset_mpc83xx.c 
b/drivers/sysreset/sysreset_mpc83xx.c
new file mode 100644
index 000..9092764e0b1
--- /dev/null
+++ b/drivers/sysreset/sysreset_mpc83xx.c
@@ -0,0 +1,212 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "sysreset_mpc83xx.h"
+
+/* Magic 4-byte word to enable reset ('RSTE' in ASCII) */
+static const u32 RPR_MAGIC = 0x52535445;
+/* Wait at most 2000ms for reset control enable bit */
+static const uint RESET_WAIT_TIMEOUT = 2000;
+
+/**
+ * __do_reset() - Execute the system reset
+ *
+ * Return: The functions resets the system, and never returns.
+ */
+static int __do_reset(void)
+{
+   ulong msr;
+   int res;
+
+   immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
+
+   puts("Resetting the board.\n");
+
+   /* Interrupts and MMU off */
+   msr = mfmsr();
+   msr &= ~(MSR_EE | MSR_IR | MSR_DR);
+   mtmsr(msr);
+
+   /* Enable Reset Control Reg */
+   out_be32(&immap->reset.rpr, RPR_MAGIC);
+   sync();
+   isync();
+
+   /* Confirm Reset Control Reg is enabled */
+   res = wait_for_bit_be32(&immap->reset.rcer, RCER_CRE, true,
+   RESET_WAIT_TIMEOUT, false);
+   if (res) {
+   debug("%s: Timed out waiting for reset control to be set\n",
+ __func__);
+   return res;
+   }
+
+   udelay(200);
+
+   /* Perform reset, only one bit */
+   out_be32(&immap->res

[U-Boot] [PATCH v4 08/17] timer: Sort Makefile entries

[Mario Six]

Makefile entries should be sorted.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
New in v4

 drivers/timer/Makefile | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index ee2fcb1fa71..71c54048540 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -3,16 +3,16 @@
 # Copyright (C) 2015 Thomas Chou 
 
 obj-y += timer-uclass.o
+obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
 obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
-obj-$(CONFIG_CADENCE_TTC_TIMER)+= cadence-ttc.o
-obj-$(CONFIG_SANDBOX_TIMER)+= sandbox_timer.o
-obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
-obj-$(CONFIG_OMAP_TIMER)   += omap-timer.o
-obj-$(CONFIG_AST_TIMER)+= ast_timer.o
-obj-$(CONFIG_STI_TIMER)+= sti-timer.o
 obj-$(CONFIG_ARC_TIMER)+= arc_timer.o
-obj-$(CONFIG_AG101P_TIMER) += ag101p_timer.o
+obj-$(CONFIG_AST_TIMER)+= ast_timer.o
 obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
-obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
 obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
+obj-$(CONFIG_CADENCE_TTC_TIMER)+= cadence-ttc.o
+obj-$(CONFIG_OMAP_TIMER)   += omap-timer.o
+obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o
+obj-$(CONFIG_SANDBOX_TIMER)+= sandbox_timer.o
+obj-$(CONFIG_STI_TIMER)+= sti-timer.o
 obj-$(CONFIG_STM32_TIMER)  += stm32_timer.o
+obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
-- 
2.11.0

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[U-Boot] [PATCH v4 11/17] init: Fix documentation

[Mario Six]

The documentation in init.h is not in kernel-doc format. Fix this.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
New in v4

 include/init.h | 27 ++-
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/include/init.h b/include/init.h
index f114a889631..a58d7a6917f 100644
--- a/include/init.h
+++ b/include/init.h
@@ -27,7 +27,7 @@ void board_init_f(ulong dummy);
  * board_f.c for where it is called. If this is not provided, a default
  * version (which does nothing) will be used.
  *
- * @return: 0 on success, otherwise error
+ * Return: 0 on success, otherwise error
  */
 int arch_cpu_init(void);
 
@@ -38,7 +38,7 @@ int arch_cpu_init(void);
  * relocation. This is similar to arch_cpu_init() but is able to reference
  * devices
  *
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
  */
 int arch_cpu_init_dm(void);
 
@@ -50,7 +50,7 @@ int arch_cpu_init_dm(void);
  * board_f.c for where it is called. If this is not provided, a default
  * version (which does nothing) will be used.
  *
- * @return: 0 on success, otherwise error
+ * Return: 0 on success, otherwise error
  */
 int mach_cpu_init(void);
 
@@ -60,6 +60,8 @@ int mach_cpu_init(void);
  * Where U-Boot relies on binary blobs to handle part of the system init, this
  * function can be used to set up the blobs. This is used on some Intel
  * platforms.
+ *
+ * Return: 0
  */
 int arch_fsp_init(void);
 
@@ -78,12 +80,12 @@ int dram_init(void);
  * CONFIG_SYS_SDRAM_BASE and the size will be determined by a call to
  * get_effective_memsize().
  *
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
  */
 int dram_init_banksize(void);
 
 /**
- * Reserve all necessary stacks
+ * arch_reserve_stacks() - Reserve all necessary stacks
  *
  * This is used in generic board init sequence in common/board_f.c. Each
  * architecture could provide this function to tailor the required stacks.
@@ -96,14 +98,14 @@ int dram_init_banksize(void);
  * positions of the stack. The stack pointer(s) will be set to this later.
  * gd->irq_sp is only required, if the architecture needs it.
  *
- * @return 0 if no error
+ * Return: 0 if no error
  */
 int arch_reserve_stacks(void);
 
 /**
  * init_cache_f_r() - Turn on the cache in preparation for relocation
  *
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
  */
 int init_cache_f_r(void);
 
@@ -111,6 +113,7 @@ int print_cpuinfo(void);
 int timer_init(void);
 int reserve_mmu(void);
 int misc_init_f(void);
+
 #if defined(CONFIG_DTB_RESELECT)
 int embedded_dtb_select(void);
 #endif
@@ -120,28 +123,28 @@ extern ulong monitor_flash_len;
 
 /**
  * ulong board_init_f_alloc_reserve - allocate reserved area
+ * @top: top of the reserve area, growing down.
  *
  * This function is called by each architecture very early in the start-up
  * code to allow the C runtime to reserve space on the stack for writable
  * 'globals' such as GD and the malloc arena.
  *
- * @top:   top of the reserve area, growing down.
- * @return:bottom of reserved area
+ * Return: bottom of reserved area
  */
 ulong board_init_f_alloc_reserve(ulong top);
 
 /**
  * board_init_f_init_reserve - initialize the reserved area(s)
+ * @base:  top from which reservation was done
  *
  * This function is called once the C runtime has allocated the reserved
  * area on the stack. It must initialize the GD at the base of that area.
- *
- * @base:  top from which reservation was done
  */
 void board_init_f_init_reserve(ulong base);
 
 /**
  * arch_setup_gd() - Set up the global_data pointer
+ * @gd_ptr: Pointer to global data
  *
  * This pointer is special in some architectures and cannot easily be assigned
  * to. For example on x86 it is implemented by adding a specific record to its
@@ -149,8 +152,6 @@ void board_init_f_init_reserve(ulong base);
  * For most architectures this can simply be:
  *
  *gd = gd_ptr;
- *
- * @gd_ptr:Pointer to global data
  */
 void arch_setup_gd(gd_t *gd_ptr);
 
-- 
2.11.0

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[U-Boot] [PATCH v4 09/17] timer: Add MPC83xx timer driver

[Mario Six]

Add a timer driver for the MPC83xx architecture.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Removed superfluous get_timer (switched to usage of standard function)
* Improved error handling and debug reporting
* Added full documentation

v2 -> v3:
* Got rid of the static variables
* Added driver files to MAINTAINERS

v1 -> v2:
* Removed now-superfluous comments
* Removed usage of uclass_{first,next}_device_compat
* Switched to usage of new board uclass (instead of devinfo)

 .../bindings/timer/fsl,mpc83xx-timer.txt   |  21 ++
 MAINTAINERS|   1 +
 arch/powerpc/cpu/mpc83xx/cpu.c |   4 +-
 arch/powerpc/lib/Makefile  |   4 +
 arch/powerpc/lib/interrupts.c  |   5 +-
 drivers/timer/Kconfig  |   7 +
 drivers/timer/Makefile |   1 +
 drivers/timer/mpc83xx_timer.c  | 249 +
 8 files changed, 289 insertions(+), 3 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt
 create mode 100644 drivers/timer/mpc83xx_timer.c

diff --git a/Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt 
b/Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt
new file mode 100644
index 000..608d24110ba
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt
@@ -0,0 +1,21 @@
+MPC83xx timer devices
+
+MPC83xx SoCs offer a decrementer interrupt that can be used to implement delay
+functionality, and periodically triggered actions.
+
+Required properties:
+- compatible: must be "fsl,mpc83xx-timer"
+- clocks: must be a reference to the system's CSB (coherent system bus) clock,
+  provided by one of the "fsl,mpc83xx-clk" devices
+
+Example:
+
+socclocks: clocks {
+   compatible = "fsl,mpc832x-clk";
+   #clock-cells = <1>;
+};
+
+timer {
+   compatible = "fsl,mpc83xx-timer";
+   clocks = <&socclocks MPC83XX_CLK_CSB>;
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 7710989ea4f..58a8f8da7ba 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -502,6 +502,7 @@ F:  drivers/sysreset/sysreset_mpc83xx.h
 F: drivers/clk/mpc83xx_clk.c
 F: drivers/clk/mpc83xx_clk.h
 F: include/dt-bindings/clk/mpc83xx-clk.h
+F: drivers/timer/mpc83xx_timer.c
 F: arch/powerpc/cpu/mpc83xx/
 F: arch/powerpc/include/asm/arch-mpc83xx/
 
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index e1d2f2f07cb..ffb42415feb 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -175,12 +175,12 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * 
const argv[])
 /*
  * Get timebase clock frequency (like cpu_clk in Hz)
  */
-
+#ifndef CONFIG_TIMER
 unsigned long get_tbclk(void)
 {
return (gd->bus_clk + 3L) / 4L;
 }
-
+#endif
 
 #if defined(CONFIG_WATCHDOG)
 void watchdog_reset (void)
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index c3acefaea7e..8ac49bdd060 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -17,13 +17,17 @@ endif
 
 ifdef MINIMAL
 obj-y += cache.o time.o
+ifndef CONFIG_TIMER
 obj-y += ticks.o
+endif
 else
 
 obj-y  += ppcstring.o
 
 obj-y  += ppccache.o
+ifndef CONFIG_TIMER
 obj-y  += ticks.o
+endif
 obj-y  += reloc.o
 
 obj-$(CONFIG_BAT_RW) += bat_rw.o
diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index f63e5cf799b..19682cfcfad 100644
--- a/arch/powerpc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
@@ -14,6 +14,7 @@
 #include 
 #endif
 
+#ifndef CONFIG_MPC83XX_TIMER
 #ifdef CONFIG_SHOW_ACTIVITY
 void board_show_activity (ulong) __attribute__((weak, 
alias("__board_show_activity")));
 
@@ -44,7 +45,7 @@ static __inline__ void set_dec (unsigned long val)
if (val)
asm volatile ("mtdec %0"::"r" (val));
 }
-
+#endif /* !CONFIG_MPC83XX_TIMER */
 
 void enable_interrupts (void)
 {
@@ -60,6 +61,7 @@ int disable_interrupts (void)
return ((msr & MSR_EE) != 0);
 }
 
+#ifndef CONFIG_MPC83XX_TIMER
 int interrupt_init (void)
 {
/* call cpu specific function from $(CPU)/interrupts.c */
@@ -102,3 +104,4 @@ ulong get_timer (ulong base)
 {
return (timestamp - base);
 }
+#endif /* !CONFIG_MPC83XX_TIMER */
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 8a31397553d..c7909bd6e52 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -133,4 +133,11 @@ config STM32_TIMER
  Select this to enable support for the timer found on
  STM32 devices.
 
+config MPC83XX_TIMER
+bool "MPC83xx timer support"
+   depends on TIMER
+   help
+ Select this to enable support for the timer found on
+ devices based on the MPC83xx family of SoCs.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 71c54048540..bcc14342b1a 100644
--- a/

[U-Boot] [PATCH v4 14/17] cpu: Add cpu_probe_all method

[Mario Six]

Add a method to probe all CPUs of the board.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
New in v4

 drivers/cpu/cpu-uclass.c | 23 +++
 include/cpu.h|  7 +++
 2 files changed, 30 insertions(+)

diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
index f362eb11e72..457f77b7c89 100644
--- a/drivers/cpu/cpu-uclass.c
+++ b/drivers/cpu/cpu-uclass.c
@@ -11,6 +11,29 @@
 #include 
 #include 
 
+int cpu_probe_all(void)
+{
+   struct udevice *cpu;
+   int ret;
+
+   ret = uclass_first_device(UCLASS_CPU, &cpu);
+   if (ret) {
+   debug("%s: No CPU found (err = %d)\n", __func__, ret);
+   return ret;
+   }
+
+   while (cpu) {
+   ret = uclass_next_device(&cpu);
+   if (ret) {
+   debug("%s: Error while probing CPU (err = %d)\n",
+ __func__, ret);
+   return ret;
+   }
+   }
+
+   return 0;
+}
+
 int cpu_get_desc(struct udevice *dev, char *buf, int size)
 {
struct cpu_ops *ops = cpu_get_ops(dev);
diff --git a/include/cpu.h b/include/cpu.h
index 22467cb9b3a..367c5f46a00 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -125,4 +125,11 @@ int cpu_get_count(struct udevice *dev);
  */
 int cpu_get_vendor(struct udevice *dev, char *buf, int size);
 
+/**
+ * cpu_probe_all() - Probe all available CPUs
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int cpu_probe_all(void);
+
 #endif
-- 
2.11.0

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[U-Boot] [PATCH v4 13/17] cpu: Fix cpu.h documentation

[Mario Six]

Documentation in cpu.h is not in kernel-doc format. Change it to comply
with it.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
New in v4

 include/cpu.h | 28 +++-
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/include/cpu.h b/include/cpu.h
index 5cc7c5abd72..22467cb9b3a 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -9,19 +9,21 @@
 
 /**
  * struct cpu_platdata - platform data for a CPU
+ * @cpu_id:   Platform-specific way of identifying the CPU.
+ * @ucode_version: Microcode version, if CPU_FEAT_UCODE is set
+ * @device_id: Driver-defined device identifier
+ * @family:DMTF CPU Family identifier
+ * @id:DMTF CPU Processor identifier
  *
  * This can be accessed with dev_get_parent_platdata() for any UCLASS_CPU
  * device.
- *
- * @cpu_id:Platform-specific way of identifying the CPU.
- * @ucode_version: Microcode version, if CPU_FEAT_UCODE is set
  */
 struct cpu_platdata {
int cpu_id;
int ucode_version;
ulong device_id;
-   u16 family; /* DMTF CPU Family */
-   u32 id[2];  /* DMTF CPU Processor IDs */
+   u16 family;
+   u32 id[2];
 };
 
 /* CPU features - mostly just a placeholder for now */
@@ -88,38 +90,38 @@ struct cpu_ops {
 
 /**
  * cpu_get_desc() - Get a description string for a CPU
- *
  * @dev:   Device to check (UCLASS_CPU)
  * @buf:   Buffer to place string
  * @size:  Size of string space
- * @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error
+ *
+ * Return: 0 if OK, -ENOSPC if buffer is too small, other -ve on error
  */
 int cpu_get_desc(struct udevice *dev, char *buf, int size);
 
 /**
  * cpu_get_info() - Get information about a CPU
- *
  * @dev:   Device to check (UCLASS_CPU)
  * @info:  Returns CPU info
- * @return 0 if OK, -ve on error
+ *
+ * Return: 0 if OK, -ve on error
  */
 int cpu_get_info(struct udevice *dev, struct cpu_info *info);
 
 /**
  * cpu_get_count() - Get number of CPUs
- *
  * @dev:   Device to check (UCLASS_CPU)
- * @return CPU count if OK, -ve on error
+ *
+ * Return: CPU count if OK, -ve on error
  */
 int cpu_get_count(struct udevice *dev);
 
 /**
  * cpu_get_vendor() - Get vendor name of a CPU
- *
  * @dev:   Device to check (UCLASS_CPU)
  * @buf:   Buffer to place string
  * @size:  Size of string space
- * @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error
+ *
+ * Return: 0 if OK, -ENOSPC if buffer is too small, other -ve on error
  */
 int cpu_get_vendor(struct udevice *dev, char *buf, int size);
 
-- 
2.11.0

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[U-Boot] [PATCH v4 01/17] ram: Add driver for MPC83xx

[Mario Six]

Add a RAM driver for the MPC83xx architecture.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Switched preprocessor constants to C constants
* Improved error reporting
* Added driver binding file
* Added full documentation

v2 -> v3:
* Converted some #ifdefs to if (IS_ENABLED(...))
* Added driver files to MAINTAINERS

v1 -> v2:
No changes

 .../bindings/ram/fsl,mpc83xx-mem-controller.txt|  314 ++
 MAINTAINERS|2 +
 arch/powerpc/cpu/mpc83xx/spd_sdram.c   |4 +
 drivers/ram/Kconfig|9 +
 drivers/ram/Makefile   |1 +
 drivers/ram/mpc83xx_sdram.c| 1096 
 include/dt-bindings/memory/mpc83xx-sdram.h |  161 +++
 include/mpc83xx.h  |6 +
 8 files changed, 1593 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/ram/fsl,mpc83xx-mem-controller.txt
 create mode 100644 drivers/ram/mpc83xx_sdram.c
 create mode 100644 include/dt-bindings/memory/mpc83xx-sdram.h

diff --git 
a/Documentation/devicetree/bindings/ram/fsl,mpc83xx-mem-controller.txt 
b/Documentation/devicetree/bindings/ram/fsl,mpc83xx-mem-controller.txt
new file mode 100644
index 000..da01fe908de
--- /dev/null
+++ b/Documentation/devicetree/bindings/ram/fsl,mpc83xx-mem-controller.txt
@@ -0,0 +1,314 @@
+MPC83xx RAM controller
+
+This driver supplies support for the embedded RAM controller on MCP83xx-series
+SoCs.
+
+For static configuration mode, each controller node should have child nodes
+describing the actual RAM modules installed.
+
+Controller node
+===
+
+Required properties:
+- compatible:Must be "fsl,mpc83xx-mem-controller"
+- reg:   The address of the RAM controller's register space
+- #address-cells:Must be 2
+- #size-cells:   Must be 1
+- driver_software_override:  DDR driver software override is enabled (1) or
+ disabled (0)
+- p_impedance_override:  DDR driver software p-impedance override; possible
+ values:
+  * DSO_P_IMPEDANCE_HIGHEST_Z
+  * DSO_P_IMPEDANCE_MUCH_HIGHER_Z
+  * DSO_P_IMPEDANCE_HIGHER_Z
+  * DSO_P_IMPEDANCE_NOMINAL
+  * DSO_P_IMPEDANCE_LOWER_Z
+- n_impedance_override:  DDR driver software n-impedance override; possible
+ values:
+  * DSO_N_IMPEDANCE_HIGHEST_Z
+  * DSO_N_IMPEDANCE_MUCH_HIGHER_Z
+  * DSO_N_IMPEDANCE_HIGHER_Z
+  * DSO_N_IMPEDANCE_NOMINAL
+  * DSO_N_IMPEDANCE_LOWER_Z
+- odt_termination_value: ODT termination value for I/Os; possible values:
+  * ODT_TERMINATION_75_OHM
+  * ODT_TERMINATION_150_OHM
+- ddr_type:  Selects voltage level for DDR pads; possible
+ values:
+  * DDR_TYPE_DDR2_1_8_VOLT
+  * DDR_TYPE_DDR1_2_5_VOLT
+- mvref_sel: Determine where MVREF_SEL signal is generated;
+ possible values:
+  * MVREF_SEL_EXTERNAL
+  * MVREF_SEL_INTERNAL_GVDD
+- m_odr: Disable memory transaction reordering; possible
+ values:
+  * M_ODR_ENABLE
+  * M_ODR_DISABLE
+- clock_adjust:  Clock adjust; possible values:
+  * CLOCK_ADJUST_025
+  * CLOCK_ADJUST_05
+  * CLOCK_ADJUST_075
+  * CLOCK_ADJUST_1
+- ext_refresh_rec:   Extended refresh recovery time; possible values:
+  0, 16, 32, 48, 64, 80, 96, 112
+- read_to_write: Read-to-write turnaround; possible values:
+  0, 1, 2, 3
+- write_to_read: Write-to-read turnaround; possible values:
+  0, 1, 2, 3
+- read_to_read:  Read-to-read turnaround; possible values:
+  0, 1, 2, 3
+- write_to_write:Write-to-write turnaround; possible values:
+  0, 1, 2, 3
+- active_powerdown_exit: Active powerdown exit timing; possible values:
+  1, 2, 3, 4, 5, 6, 7
+- precharge_powerdown_exit:  Precharge powerdown exit timing; possible values:
+  1, 2, 3, 4, 5, 6, 7
+- odt_powerdown_exit:ODT powerdown exit timing; possib

[U-Boot] [PATCH v4 16/17] cpu: Add MPC83xx CPU driver

[Mario Six]

Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Fixed style violations
* Switched to using cpu_probe_all method
* Switched to bitfield macros
* Moved mpc83xx_cpu_info fields into mpc83xx_cpu_priv
* Fixed CPU family determination
* Improved error checking and debug reporting
* Added forgotten compatible strings
* Added full documentation
* Simplified revid determination

v2 -> v3:
* Added driver files to MAINTAINERS

v1 -> v2:
* Removed cpu_print_info
* Fixed CPU info printing
* Removed usage of uclass_{first,next}_device_compat
* Removed printing of reset status

 .../devicetree/bindings/cpu/fsl,mpc83xx.txt|  34 ++
 MAINTAINERS|   2 +
 arch/powerpc/cpu/mpc83xx/cpu.c |   2 +
 arch/powerpc/cpu/mpc83xx/cpu_init.c|   2 +
 arch/powerpc/include/asm/processor.h   |   2 +
 drivers/cpu/Kconfig|   7 +
 drivers/cpu/Makefile   |   1 +
 drivers/cpu/mpc83xx_cpu.c  | 349 +
 drivers/cpu/mpc83xx_cpu.h  | 126 
 9 files changed, 525 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/cpu/fsl,mpc83xx.txt
 create mode 100644 drivers/cpu/mpc83xx_cpu.c
 create mode 100644 drivers/cpu/mpc83xx_cpu.h

diff --git a/Documentation/devicetree/bindings/cpu/fsl,mpc83xx.txt 
b/Documentation/devicetree/bindings/cpu/fsl,mpc83xx.txt
new file mode 100644
index 000..ac563d906ac
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpu/fsl,mpc83xx.txt
@@ -0,0 +1,34 @@
+MPC83xx CPU devices
+
+MPC83xx SoCs contain a e300 core as their main processor.
+
+Required properties:
+- compatible: must be one of "fsl,mpc83xx",
+ "fsl,mpc8308",
+ "fsl,mpc8309",
+ "fsl,mpc8313",
+ "fsl,mpc8315",
+ "fsl,mpc832x",
+ "fsl,mpc8349",
+ "fsl,mpc8360",
+ "fsl,mpc8379"
+- clocks: has to have two entries, which must be the core clock at index 0 and
+  the CSB (Coherent System Bus) clock at index 1. Both are given by a suitable
+  "fsl,mpc83xx-clk" device
+
+Example:
+
+socclocks: clocks {
+   compatible = "fsl,mpc8315-clk";
+   #clock-cells = <1>;
+};
+
+cpus {
+   compatible = "cpu_bus";
+
+   PowerPC,8315@0 {
+   compatible = "fsl,mpc8315";
+   clocks = <&socclocks MPC83XX_CLK_CORE
+ &socclocks MPC83XX_CLK_CSB>;
+   };
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 58a8f8da7ba..a502b0bbf4e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -503,6 +503,8 @@ F:  drivers/clk/mpc83xx_clk.c
 F: drivers/clk/mpc83xx_clk.h
 F: include/dt-bindings/clk/mpc83xx-clk.h
 F: drivers/timer/mpc83xx_timer.c
+F: drivers/cpu/mpc83xx_cpu.c
+F: drivers/cpu/mpc83xx_cpu.h
 F: arch/powerpc/cpu/mpc83xx/
 F: arch/powerpc/include/asm/arch-mpc83xx/
 
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index ffb42415feb..b29f271e9bc 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -25,6 +25,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_CPU_MPC83XX
 int checkcpu(void)
 {
volatile immap_t *immr;
@@ -114,6 +115,7 @@ int checkcpu(void)
 
return 0;
 }
+#endif
 
 #ifndef CONFIG_SYSRESET
 int
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c 
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index fcac9f63a81..1555205e069 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -464,6 +464,7 @@ static int print_83xx_arb_event(int force)
 }
 #endif /* CONFIG_DISPLAY_AER_ */
 
+#ifndef CONFIG_CPU_MPC83XX
 /*
  * Figure out the cause of the reset
  */
@@ -505,3 +506,4 @@ int prt_83xx_rsr(void)
 
return 0;
 }
+#endif
diff --git a/arch/powerpc/include/asm/processor.h 
b/arch/powerpc/include/asm/processor.h
index 6fbe8c46b31..f97ce48cc27 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1325,7 +1325,9 @@ void ll_puts(const char *);
 /* In misc.c */
 void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
 
+#ifndef CONFIG_CPU_MPC83XX
 int prt_83xx_rsr(void);
+#endif
 
 #endif /* ndef ASSEMBLY*/
 
diff --git a/drivers/cpu/Kconfig b/drivers/cpu/Kconfig
index 0d1424d38e9..d4052005e24 100644
--- a/drivers/cpu/Kconfig
+++ b/drivers/cpu/Kconfig
@@ -6,3 +6,10 @@ config CPU
  multiple CPUs, then normally have to be set up in U-Boot so that
  they can work correctly in the OS. This provides a framework for
  finding out information about available CPUs and making changes.
+
+config CPU_MPC83XX
+   bool "Enable MPC83xx CPU driver"

[U-Boot] [PATCH v4 07/17] clk: Add MPC83xx clock driver

[Mario Six]

Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Gotten rid of all #ifdefs (SoC is now determined by compatible string)
* Added MPC83xx-wide functions to get properties of SoCs
* Gotten rid of most clock variables in global data
* Marked more files as static
* Improved error handling and debug reporting
* Simplified bitmask handling
* Added binding file
* Added full documentation

v2 -> v3:
* Added driver files to MAINTAINERS

v1 -> v2:
* Added binding of sysreset driver

 .../devicetree/bindings/clk/fsl,mpc83xx-clk.txt|  23 ++
 MAINTAINERS|   3 +
 arch/powerpc/cpu/mpc83xx/speed.c   |   4 +
 arch/powerpc/include/asm/arch-mpc83xx/soc.h|  74 
 arch/powerpc/include/asm/config.h  |   2 +-
 arch/powerpc/include/asm/global_data.h |   4 +
 drivers/clk/Kconfig|   6 +
 drivers/clk/Makefile   |   1 +
 drivers/clk/mpc83xx_clk.c  | 410 +
 drivers/clk/mpc83xx_clk.h  | 379 +++
 include/dt-bindings/clk/mpc83xx-clk.h  |  33 ++
 11 files changed, 938 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/clk/fsl,mpc83xx-clk.txt
 create mode 100644 arch/powerpc/include/asm/arch-mpc83xx/soc.h
 create mode 100644 drivers/clk/mpc83xx_clk.c
 create mode 100644 drivers/clk/mpc83xx_clk.h
 create mode 100644 include/dt-bindings/clk/mpc83xx-clk.h

diff --git a/Documentation/devicetree/bindings/clk/fsl,mpc83xx-clk.txt 
b/Documentation/devicetree/bindings/clk/fsl,mpc83xx-clk.txt
new file mode 100644
index 000..8313da85076
--- /dev/null
+++ b/Documentation/devicetree/bindings/clk/fsl,mpc83xx-clk.txt
@@ -0,0 +1,23 @@
+MPC83xx system clock devices
+
+MPC83xx SoCs supply a variety of clocks to drive various components of a
+system.
+
+Required properties:
+- compatible: must be one of "fsl,mpc8308-clk",
+ "fsl,mpc8309-clk",
+ "fsl,mpc8313-clk",
+ "fsl,mpc8315-clk",
+ "fsl,mpc832x-clk",
+ "fsl,mpc8349-clk",
+ "fsl,mpc8360-clk",
+ "fsl,mpc8379-clk"
+  depending on which SoC is employed
+- #clock-cells: Must be 1
+
+Example:
+
+socclocks: clocks {
+   compatible = "fsl,mpc832x-clk";
+   #clock-cells = <1>;
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 801e47897f6..7710989ea4f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -499,6 +499,9 @@ F:  drivers/ram/mpc83xx_sdram.c
 F: include/dt-bindings/memory/mpc83xx-sdram.h
 F: drivers/sysreset/sysreset_mpc83xx.c
 F: drivers/sysreset/sysreset_mpc83xx.h
+F: drivers/clk/mpc83xx_clk.c
+F: drivers/clk/mpc83xx_clk.h
+F: include/dt-bindings/clk/mpc83xx-clk.h
 F: arch/powerpc/cpu/mpc83xx/
 F: arch/powerpc/include/asm/arch-mpc83xx/
 
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index f0945281cd2..39bc1c53406 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -6,6 +6,8 @@
  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  */
 
+#ifndef CONFIG_CLK_MPC83XX
+
 #include 
 #include 
 #include 
@@ -590,3 +592,5 @@ U_BOOT_CMD(clocks, 1, 0, do_clocks,
"print clock configuration",
"clocks"
 );
+
+#endif
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/soc.h 
b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
new file mode 100644
index 000..39bf7d5a7f9
--- /dev/null
+++ b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#ifndef _MPC83XX_SOC_H_
+#define _MPC83XX_SOC_H_
+
+enum soc_type {
+   SOC_MPC8308,
+   SOC_MPC8309,
+   SOC_MPC8313,
+   SOC_MPC8315,
+   SOC_MPC832X,
+   SOC_MPC8349,
+   SOC_MPC8360,
+   SOC_MPC8379,
+};
+
+bool mpc83xx_has_sdhc(int type)
+{
+   return (type == SOC_MPC8308) ||
+  (type == SOC_MPC8309) ||
+  (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_tsec(int type)
+{
+   return (type == SOC_MPC8308) ||
+  (type == SOC_MPC8313) ||
+  (type == SOC_MPC8315) ||
+  (type == SOC_MPC8349) ||
+  (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pcie1(int type)
+{
+   return (type == SOC_MPC8308) ||
+  (type == SOC_MPC8315) ||
+  (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_pcie2(int type)
+{
+   return (type == SOC_MPC8315) ||
+  (type == SOC_MPC8379);
+}
+
+bool mpc83xx_has_sata(int type)
+{
+   return (type == SOC_MPC8315) ||
+  (type == SOC_MPC8379);
+}
+

[U-Boot] [PATCH v4 12/17] board_f: Use static print_cpuinfo if CONFIG_CPU is active

[Mario Six]

When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.

Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Print error if CPU description could not be retrieved
* Improved error handling and debug reporting
* Added documentation

v2 -> v3:
No changes

v1 -> v2:
New in v2

 common/board_f.c | 28 
 include/init.h   |  7 +++
 2 files changed, 35 insertions(+)

diff --git a/common/board_f.c b/common/board_f.c
index afafec5e4d0..fcc89df8160 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -11,6 +11,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -165,6 +166,33 @@ static int print_resetinfo(void)
 }
 #endif
 
+#if defined(CONFIG_DISPLAY_CPUINFO) && defined(CONFIG_CPU)
+static int print_cpuinfo(void)
+{
+   struct udevice *dev;
+   char desc[512];
+   int ret;
+
+   ret = uclass_first_device_err(UCLASS_CPU, &dev);
+   if (ret) {
+   debug("%s: Could not get CPU device (err = %d)\n",
+ __func__, ret);
+   return ret;
+   }
+
+   ret = cpu_get_desc(dev, desc, sizeof(desc));
+   if (ret) {
+   debug("%s: Could not get CPU description (err = %d)\n",
+ dev->name, ret);
+   return ret;
+   }
+
+   printf("%s", desc);
+
+   return 0;
+}
+#endif
+
 static int announce_dram_init(void)
 {
puts("DRAM:  ");
diff --git a/include/init.h b/include/init.h
index a58d7a6917f..a76d747b035 100644
--- a/include/init.h
+++ b/include/init.h
@@ -109,7 +109,14 @@ int arch_reserve_stacks(void);
  */
 int init_cache_f_r(void);
 
+#ifndef CONFIG_CPU
+/**
+ * print_cpuinfo() - Display information about the CPU
+ *
+ * Return: 0 if OK, -ve on error
+ */
 int print_cpuinfo(void);
+#endif
 int timer_init(void);
 int reserve_mmu(void);
 int misc_init_f(void);
-- 
2.11.0

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[U-Boot] [PATCH v4 15/17] test: Add tests for CPU uclass

[Mario Six]

Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
New in v4

 arch/sandbox/dts/test.dts | 12 ++
 drivers/cpu/Makefile  |  1 +
 drivers/cpu/cpu_sandbox.c | 61 +++
 test/dm/Makefile  |  1 +
 test/dm/cpu.c | 45 ++
 5 files changed, 120 insertions(+)
 create mode 100644 drivers/cpu/cpu_sandbox.c
 create mode 100644 test/dm/cpu.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 137679abea9..527af1aee11 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -283,6 +283,18 @@
mbox-names = "other", "test";
};
 
+   cpu-test1 {
+   compatible = "sandbox,cpu_sandbox";
+   };
+
+   cpu-test2 {
+   compatible = "sandbox,cpu_sandbox";
+   };
+
+   cpu-test3 {
+   compatible = "sandbox,cpu_sandbox";
+   };
+
mmc2 {
compatible = "sandbox,mmc";
};
diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile
index db515f6f177..980c68f44d0 100644
--- a/drivers/cpu/Makefile
+++ b/drivers/cpu/Makefile
@@ -7,3 +7,4 @@
 obj-$(CONFIG_CPU) += cpu-uclass.o
 
 obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
+obj-$(CONFIG_SANDBOX) += cpu_sandbox.o
diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c
new file mode 100644
index 000..ff87e8adca3
--- /dev/null
+++ b/drivers/cpu/cpu_sandbox.c
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include 
+#include 
+#include 
+
+int cpu_sandbox_get_desc(struct udevice *dev, char *buf, int size)
+{
+   snprintf(buf, size, "LEG Inc. SuperMegaUltraTurbo CPU No. 1");
+
+   return 0;
+}
+
+int cpu_sandbox_get_info(struct udevice *dev, struct cpu_info *info)
+{
+   info->cpu_freq = 42 * 42 * 42 * 42 * 42;
+   info->features = 0x42424242;
+
+   return 0;
+}
+
+int cpu_sandbox_get_count(struct udevice *dev)
+{
+   return 42;
+}
+
+int cpu_sandbox_get_vendor(struct udevice *dev, char *buf, int size)
+{
+   snprintf(buf, size, "Languid Example Garbage Inc.");
+
+   return 0;
+}
+
+static const struct cpu_ops cpu_sandbox_ops = {
+   .get_desc = cpu_sandbox_get_desc,
+   .get_info = cpu_sandbox_get_info,
+   .get_count = cpu_sandbox_get_count,
+   .get_vendor = cpu_sandbox_get_vendor,
+};
+
+int cpu_sandbox_probe(struct udevice *dev)
+{
+   return 0;
+}
+
+static const struct udevice_id cpu_sandbox_ids[] = {
+   { .compatible = "sandbox,cpu_sandbox" },
+   { }
+};
+
+U_BOOT_DRIVER(cpu_sandbox) = {
+   .name   = "cpu_sandbox",
+   .id = UCLASS_CPU,
+   .ops= &cpu_sandbox_ops,
+   .of_match   = cpu_sandbox_ids,
+   .probe  = cpu_sandbox_probe,
+};
diff --git a/test/dm/Makefile b/test/dm/Makefile
index d2ed96c6153..c3bb26bb974 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -44,4 +44,5 @@ obj-$(CONFIG_DM_VIDEO) += video.o
 obj-$(CONFIG_ADC) += adc.o
 obj-$(CONFIG_SPMI) += spmi.o
 obj-$(CONFIG_WDT) += wdt.o
+obj-$(CONFIG_CPU) += cpu.o
 endif
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
new file mode 100644
index 000..f5f1caef716
--- /dev/null
+++ b/test/dm/cpu.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int dm_test_cpu(struct unit_test_state *uts)
+{
+   struct udevice *dev;
+   char text[128];
+   struct cpu_info info;
+
+   ut_assertok(cpu_probe_all());
+
+   /* Check that cpu_probe_all really activated all CPUs */
+   for (uclass_find_first_device(UCLASS_CPU, &dev);
+dev;
+uclass_find_next_device(&dev))
+   ut_assert(dev->flags & DM_FLAG_ACTIVATED);
+
+   ut_assertok(uclass_get_device_by_name(UCLASS_CPU, "cpu-test1", &dev));
+
+   ut_assertok(cpu_get_desc(dev, text, sizeof(text)));
+   ut_assertok(strcmp(text, "LEG Inc. SuperMegaUltraTurbo CPU No. 1"));
+
+   ut_assertok(cpu_get_info(dev, &info));
+   ut_asserteq(info.cpu_freq, 42 * 42 * 42 * 42 * 42);
+   ut_asserteq(info.features, 0x42424242);
+
+   ut_asserteq(cpu_get_count(dev), 42);
+
+   ut_assertok(cpu_get_vendor(dev, text, sizeof(text)));
+   ut_assertok(strcmp(text, "Languid Example Garbage Inc."));
+
+   return 0;
+}
+
+DM_TEST(dm_test_cpu, DM_TESTF_SCAN_FDT);
-- 
2.11.0

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[U-Boot] [PATCH v4 17/17] misc: Add MPC83xx serdes driver

[Mario Six]

Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
---

Notes:
v3 -> v4:
* Added full documentation
* Introduced separate local header file
* Added error debug output

v2 -> v3:
* Added driver file to MAINTAINERS

v1 -> v2:
No changes

 .../bindings/misc/fsl,mpc83xx-serdes.txt   |  24 +++
 MAINTAINERS|   1 +
 arch/powerpc/cpu/mpc83xx/serdes.c  |   4 +
 arch/powerpc/include/asm/fsl_mpc83xx_serdes.h  |   4 +
 drivers/misc/Kconfig   |   7 +
 drivers/misc/Makefile  |   1 +
 drivers/misc/mpc83xx_serdes.c  | 185 
 drivers/misc/mpc83xx_serdes.h  | 232 +
 8 files changed, 458 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt
 create mode 100644 drivers/misc/mpc83xx_serdes.c
 create mode 100644 drivers/misc/mpc83xx_serdes.h

diff --git a/Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt 
b/Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt
new file mode 100644
index 000..64a9b5b154b
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/fsl,mpc83xx-serdes.txt
@@ -0,0 +1,24 @@
+MPC83xx SerDes controller devices
+
+MPC83xx SoCs contain a built-in SerDes controller that determines which
+protocols (SATA, PCI Express, SGMII, ...) are used on the system's serdes lines
+and how the lines are configured.
+
+Required properties:
+- compatible: must be "fsl,mpc83xx-serdes"
+- reg: must point to the serdes controller's register map
+- proto: selects for which protocol the serdes lines are configured. One of
+  "sata", "pex", "pex-x2", "sgmii"
+- serdes-clk: determines the frequency the serdes lines are configured for. One
+  of 100, 125, 150.
+- vdd: determines whether 1.0V core VDD is used or not
+
+Example:
+
+SERDES: serdes@e3000 {
+   reg = <0xe3000 0x200>;
+   compatible = "fsl,mpc83xx-serdes";
+   proto = "pex";
+   serdes-clk = <100>;
+   vdd;
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index a502b0bbf4e..5540b140137 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -505,6 +505,7 @@ F:  include/dt-bindings/clk/mpc83xx-clk.h
 F: drivers/timer/mpc83xx_timer.c
 F: drivers/cpu/mpc83xx_cpu.c
 F: drivers/cpu/mpc83xx_cpu.h
+F: drivers/misc/mpc83xx_serdes.c
 F: arch/powerpc/cpu/mpc83xx/
 F: arch/powerpc/include/asm/arch-mpc83xx/
 
diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c 
b/arch/powerpc/cpu/mpc83xx/serdes.c
index 982a4475f00..8242f952653 100644
--- a/arch/powerpc/cpu/mpc83xx/serdes.c
+++ b/arch/powerpc/cpu/mpc83xx/serdes.c
@@ -8,6 +8,8 @@
  * Author: Li Yang 
  */
 
+#ifndef CONFIG_MPC83XX_SERDES
+
 #include 
 #include 
 #include 
@@ -148,3 +150,5 @@ void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, 
char vdd)
tmp |= FSL_SRDSRSTCTL_RST;
out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
 }
+
+#endif /* !CONFIG_MPC83XX_SERDES */
diff --git a/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h 
b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
index e51d060d6a7..a02b5992654 100644
--- a/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
+++ b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h
@@ -6,6 +6,8 @@
 #ifndef __FSL_MPC83XX_SERDES_H
 #define __FSL_MPC83XX_SERDES_H
 
+#ifndef CONFIG_MPC83XX_SERDES
+
 #include 
 
 #define FSL_SERDES_CLK_100 (0 << 28)
@@ -19,4 +21,6 @@
 
 extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
 
+#endif /* !CONFIG_MPC83XX_SERDES */
+
 #endif /* __FSL_MPC83XX_SERDES_H */
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c031dfde9d4..a479e4eec56 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -277,4 +277,11 @@ config GDSYS_RXAUI_CTRL
depends on MISC
help
  Support gdsys FPGA's RXAUI control.
+
+config MPC83XX_SERDES
+   bool "Enable MPC83xx serdes driver"
+   depends on MISC
+   help
+ Support for serdes found on MPC83xx SoCs.
+
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 4ce9d213f06..e2c2b763b7a 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,3 +54,4 @@ obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
 obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o
 obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
diff --git a/drivers/misc/mpc83xx_serdes.c b/drivers/misc/mpc83xx_serdes.c
new file mode 100644
index 000..d572dda3c19
--- /dev/null
+++ b/drivers/misc/mpc83xx_serdes.c
@@ -0,0 +1,185 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * base on the MPC83xx serdes initialization, which is
+ *
+ * Copyright 2007,201

[U-Boot] [PATCH] mmc: sdhci-of-arasan: Do now show error message in case of deffered probe

[Michal Simek]

When mmc-pwrseq property is passed mmc_pwrseq_alloc() can return
-EPROBE_DEFER because driver for power sequence provider is not probed
yet. Do not show error message when this situation happens.

Signed-off-by: Michal Simek 
---

 drivers/mmc/host/sdhci-of-arasan.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c 
b/drivers/mmc/host/sdhci-of-arasan.c
index e3332a522a5d..e65f3bce3643 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -772,7 +772,8 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
 
ret = mmc_of_parse(host->mmc);
if (ret) {
-   dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret);
+   if (ret != -EPROBE_DEFER)
+   dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret);
goto unreg_clk;
}
 
-- 
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Re: [U-Boot] [PATCH V2 1/4] power-domain: add dummy functions when CONFIG_POWER_DOMAIN not defined

[Anatolij Gustschin]

Hi Peng,

On Fri, 27 Jul 2018 10:20:36 +0800
Peng Fan peng@nxp.com wrote:

> Add dummy functions when CONFIG_POWER_DOMAIN not defined.
> 
> Signed-off-by: Peng Fan 
> ---
> 
> V2: Use CONFIG_IS_ENABLED
> 
>  include/power-domain.h | 28 
>  1 file changed, 28 insertions(+)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH V2 2/4] power: Add CONFIG_SPL_POWER_DOMAIN config

[Anatolij Gustschin]

On Fri, 27 Jul 2018 10:20:37 +0800
Peng Fan peng@nxp.com wrote:

> Add CONFIG_SPL_POWER_DOMAIN config entry.
> Build drivers/power/domain if this config is selected.
> 
> Signed-off-by: Peng Fan 
> Cc: Simon Glass 
> ---
> 
> V2: New
> 
>  common/spl/Kconfig| 9 +
>  drivers/Makefile  | 1 +
>  drivers/power/domain/Makefile | 2 +-
>  3 files changed, 11 insertions(+), 1 deletion(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH V2 3/4] dm: core: device: enable power domain in probe

[Anatolij Gustschin]

On Fri, 27 Jul 2018 10:20:38 +0800
Peng Fan peng@nxp.com wrote:

> Enable power domain associated with the device when probe.
> 
> Signed-off-by: Peng Fan 
> Reviewed-by: Simon Glass 
> ---
> 
> V2:
>  Add review tag
> 
>  drivers/core/device.c | 7 +++
>  1 file changed, 7 insertions(+)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH V2 4/4] dm: power-domain: query power domain after get device

[Anatolij Gustschin]

On Fri, 27 Jul 2018 10:20:39 +0800
Peng Fan peng@nxp.com wrote:

> This is to test power_domain_on in device_probe.
> If the device has a power-domain property, enable it
> when probe the device. So add the test to check
> whether it is powered on or not.
> 
> Signed-off-by: Peng Fan 
> Reviewed-by: Simon Glass 
> ---
> 
> V2: Add review tag
> 
>  test/dm/power-domain.c | 2 ++
>  1 file changed, 2 insertions(+)

Applied to u-boot-staging/ag...@denx.de, thanks!

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[U-Boot] [PATCH] ARM: dts: stm32f4: Fix DT dtc warnings

[Patrice Chotard]

From: Patrick Delaunay 

This patch fix the following warnings for for stm32f429
evaluation and discovery boards:

unnecessary #address-cells/#size-cells without "ranges" or
child "reg" property

Signed-off-by: Patrick Delaunay 
Signed-off-by: Patrice Chotard 
---

 arch/arm/dts/stm32429i-eval.dts  | 1 -
 arch/arm/dts/stm32f429-disco.dts | 1 -
 arch/arm/dts/stm32f429.dtsi  | 4 
 3 files changed, 6 deletions(-)

diff --git a/arch/arm/dts/stm32429i-eval.dts b/arch/arm/dts/stm32429i-eval.dts
index f6753a4d1a1c..1eec95118891 100644
--- a/arch/arm/dts/stm32429i-eval.dts
+++ b/arch/arm/dts/stm32429i-eval.dts
@@ -72,7 +72,6 @@
 
gpio_keys {
compatible = "gpio-keys";
-   #address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
diff --git a/arch/arm/dts/stm32f429-disco.dts b/arch/arm/dts/stm32f429-disco.dts
index e914b6b74e15..106db68b5b99 100644
--- a/arch/arm/dts/stm32f429-disco.dts
+++ b/arch/arm/dts/stm32f429-disco.dts
@@ -76,7 +76,6 @@
 
gpio_keys {
compatible = "gpio-keys";
-   #address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi
index 6bcf9863e0f6..046aeff7ccca 100644
--- a/arch/arm/dts/stm32f429.dtsi
+++ b/arch/arm/dts/stm32f429.dtsi
@@ -259,7 +259,6 @@
};
 
timers13: timers@40001c00 {
-   #address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>;
@@ -274,7 +273,6 @@
};
 
timers14: timers@40002000 {
-   #address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
@@ -542,7 +540,6 @@
};
 
timers10: timers@40014400 {
-   #address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
@@ -557,7 +554,6 @@
};
 
timers11: timers@40014800 {
-   #address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
-- 
1.9.1

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Re: [U-Boot] [PATCH 1/2] i2c-mux: pca954x: support pca9646 i2c switch

[Peng Fan]

Hi,

Ping.

> -Original Message-
> From: Peng Fan
> Sent: 2018年7月17日 20:39
> To: h...@denx.de
> Cc: u-boot@lists.denx.de; Peng Fan 
> Subject: [PATCH 1/2] i2c-mux: pca954x: support pca9646 i2c switch
> 
> Add the PCA9646 support, which is 2-wire bus switch and buffered 4-channel.
> 
> Signed-off-by: Peng Fan 
> ---
>  drivers/i2c/muxes/pca954x.c | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c index
> 4debc03957..ab8b4000af 100644
> --- a/drivers/i2c/muxes/pca954x.c
> +++ b/drivers/i2c/muxes/pca954x.c
> @@ -17,7 +17,8 @@ DECLARE_GLOBAL_DATA_PTR;  enum pca_type {
>   PCA9544,
>   PCA9547,
> - PCA9548
> + PCA9548,
> + PCA9646
>  };
> 
>  struct chip_desc {
> @@ -51,6 +52,11 @@ static const struct chip_desc chips[] = {
>   .muxtype = pca954x_isswi,
>   .width = 8,
>   },
> + [PCA9646] = {
> + .enable = 0x0,
> + .muxtype = pca954x_isswi,
> + .width = 4,
> + },
>  };
> 
>  static int pca954x_deselect(struct udevice *mux, struct udevice *bus, @@
> -86,6 +92,7 @@ static const struct udevice_id pca954x_ids[] = {
>   { .compatible = "nxp,pca9544", .data = PCA9544 },
>   { .compatible = "nxp,pca9547", .data = PCA9547 },
>   { .compatible = "nxp,pca9548", .data = PCA9548 },
> + { .compatible = "nxp,pca9646", .data = PCA9646 },
>   { }
>  };
> 
> --
> 2.14.1

Thanks,
Peng
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[U-Boot] [PATCH] MAINTAINERS: Update STM32MP fragments

[Patrice Chotard]

Add new drivers
Add Christophe Kerello and myself as maintainers

Signed-off-by: Patrice Chotard 
---

 MAINTAINERS | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1bd583c9753d..a3548e2c8044 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -224,11 +224,21 @@ F:arch/arm/include/asm/arch-spear/
 
 ARM STM STM32MP
 M: Patrick Delaunay 
+M: Christophe Kerello 
+M: Patrice Chotard 
 S: Maintained
 F: arch/arm/mach-stm32mp
 F: drivers/clk/clk_stm32mp1.c
+F: drivers/i2c/stm32f7_i2c.c
 F: drivers/misc/stm32mp_fuse.c
+F: drivers/mmc/stm32_sdmmc2.c
+F: drivers/phy/phy-stm32-usbphyc.c
+F: drivers/pinctrl/pinctrl_stm32.c
+F: drivers/power/regulator/stm32-vrefbuf.c
 F: drivers/ram/stm32mp1/
+F: drivers/misc/stm32_rcc.c
+F: drivers/reset/stm32-reset.c
+F: drivers/spi/stm32_qspi.c
 
 ARM STM STV0991
 M: Vikas Manocha 
-- 
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[U-Boot] [PATCH v3 1/4] power-domain: add dummy functions when CONFIG_POWER_DOMAIN not defined

[Anatolij Gustschin]

From: Peng Fan 

Add dummy functions when CONFIG_POWER_DOMAIN not defined.

Signed-off-by: Peng Fan 
Reviewed-by: Simon Glass 
Signed-off-by: Anatolij Gustschin 
---

V3:
 - add 'static inline' to fix build breakage
 - use -ENOSYS as we do elsewhere to indicate not implemented functionality

V2: Use CONFIG_IS_ENABLED

 include/power-domain.h | 29 +
 1 file changed, 29 insertions(+)

diff --git a/include/power-domain.h b/include/power-domain.h
index aba8c0f65c..a558fbbdb2 100644
--- a/include/power-domain.h
+++ b/include/power-domain.h
@@ -87,7 +87,15 @@ struct power_domain {
  * @power_domain   A pointer to a power domain struct to initialize.
  * @return 0 if OK, or a negative error code.
  */
+#if CONFIG_IS_ENABLED(POWER_DOMAIN)
 int power_domain_get(struct udevice *dev, struct power_domain *power_domain);
+#else
+static inline
+int power_domain_get(struct udevice *dev, struct power_domain *power_domain)
+{
+   return -ENOSYS;
+}
+#endif
 
 /**
  * power_domain_free - Free a previously requested power domain.
@@ -96,7 +104,14 @@ int power_domain_get(struct udevice *dev, struct 
power_domain *power_domain);
  * requested by power_domain_get().
  * @return 0 if OK, or a negative error code.
  */
+#if CONFIG_IS_ENABLED(POWER_DOMAIN)
 int power_domain_free(struct power_domain *power_domain);
+#else
+static inline int power_domain_free(struct power_domain *power_domain)
+{
+   return -ENOSYS;
+}
+#endif
 
 /**
  * power_domain_on - Enable power to a power domain.
@@ -105,7 +120,14 @@ int power_domain_free(struct power_domain *power_domain);
  * requested by power_domain_get().
  * @return 0 if OK, or a negative error code.
  */
+#if CONFIG_IS_ENABLED(POWER_DOMAIN)
 int power_domain_on(struct power_domain *power_domain);
+#else
+static inline int power_domain_on(struct power_domain *power_domain)
+{
+   return -ENOSYS;
+}
+#endif
 
 /**
  * power_domain_off - Disable power ot a power domain.
@@ -114,6 +136,13 @@ int power_domain_on(struct power_domain *power_domain);
  * requested by power_domain_get().
  * @return 0 if OK, or a negative error code.
  */
+#if CONFIG_IS_ENABLED(POWER_DOMAIN)
 int power_domain_off(struct power_domain *power_domain);
+#else
+static inline int power_domain_off(struct power_domain *power_domain)
+{
+   return -ENOSYS;
+}
+#endif
 
 #endif
-- 
2.14.1

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Re: [U-Boot] [PATCH V2 1/4] power-domain: add dummy functions when CONFIG_POWER_DOMAIN not defined

[Anatolij Gustschin]

On Mon, 6 Aug 2018 11:09:27 +0200
Anatolij Gustschin ag...@denx.de wrote:
...
> Applied to u-boot-staging/ag...@denx.de, thanks!

Dropped, it breaks building.

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Re: [U-Boot] Unable to boot evb-ast2500

[Cédric Le Goater]

On 08/06/2018 05:25 AM, Joel Stanley wrote:
> Hello,
> 
> I am attempting to boot evb-ast2500 in Qemu before flashing it to a
> system. It doesn't get past the DRAM step, due to getting stuck
> endlessly looping in some libfdt code.
> 
> With some debugging turned on, I get this:
> 
> OF: translating address: 0040781e
> OF: parent translation for: 
> OF: one level translation: 0040781e
> OF: parent translation for: 
> OF: one level translation: 0040781e
> OF: translating address: 00206e1e
> 
> 
> U-Boot 2018.09-rc1-00096-gbb694d4e898b-dirty (Aug 06 2018 - 12:27:22 +0930)
> 
> Model: Aspeed BMC
> DRAM:  OF: translating address: 6e1e
> OF: translating address: 00026e1e
> OF: translating address: 0050781e
> OF: parent translation for: 
> OF: one level translation: 0050781e
> OF: parent translation for: 
> OF: one level translation: 0050781e
> Watchdog timer expired.
> 
> And then the watchdog causes the system to reboot. The build is master
> as of gbb694d4e898b, with the addition of some #define DEBUG.
> 
> I don't think this is a qemu issue. If it is, I can work on fixing
> qemu, but I need some help on understanding what u-boot is doing.

The sdram driver in U-Boot uses the watchdog1 and the SCU power 
reset register to reset the SDRAM controller. Our QEMU emulation
is not precise enough I think.

C.

> 
> There's a big pause before the U-Boot banner, and again after showing
> 'DRAM: 'before getting any of the OF messages. If I get gdb to show me
> a backtrace at this point:
> 
> #0  0x0001e858 in __fswab32 (x=) at
> include/linux/byteorder/swab.h:114
> #1  fdt_offset_ptr (fdt=fdt@entry=0x39370, offset=offset@entry=6444,
> len=len@entry=4)
> at lib/libfdt/../../scripts/dtc/libfdt/fdt.c:86
> #2  0x0001e9b4 in fdt_next_tag (fdt=fdt@entry=0x39370,
> startoffset=startoffset@entry=6440,
> nextoffset=0x1e726d44, nextoffset@entry=0x1e726d3c)
> at lib/libfdt/../../scripts/dtc/libfdt/fdt.c:120
> #3  0x0001eae4 in fdt_next_node (fdt=fdt@entry=0x39370, offset=6440,
> depth=0x1e726d5c,
> depth@entry=0x1e726d54) at lib/libfdt/../../scripts/dtc/libfdt/fdt.c:176
> #4  0x000205cc in fdt_supernode_atdepth_offset (fdt=0x39370,
> nodeoffset=14748, supernodedepth=0,
> nodedepth=0x0 <_start>) at lib/libfdt/fdt_ro.c:443
> #5  0x00011608 in ofnode_get_parent (node=..., node@entry=...) at
> include/dm/ofnode.h:94
> #6  0x000113dc in regmap_init_mem (node=..., mapp=0x0 <_start>,
> mapp@entry=0x1e726dbc)
> at drivers/core/regmap.c:63
> #7  0x14e0 in ast2500_sdrammc_ofdata_to_platdata (dev=0x1e7273c4)
> at include/dm/read.h:38
> #8  0xfc88 in device_probe (dev=dev@entry=0x1e7273c4) at
> drivers/core/device.c:399
> #9  0x000108c0 in uclass_get_device_tail (dev=0x1e7273c4,
> ret=, devp=0x1e726e0c)
> at drivers/core/uclass.c:397
> #10 0x00010900 in uclass_get_device (id=id@entry=UCLASS_RAM,
> index=index@entry=0,
> devp=0x1e726e0c, devp@entry=0x1e726e04) at drivers/core/uclass.c:413
> #11 0x1ab0 in dram_init () at arch/arm/mach-aspeed/ast2500-board.c:69
> #12 0x0001b834 in initcall_run_list
> (init_sequence=init_sequence@entry=0x29344 )
> at lib/initcall.c:30
> #13 0x854c in board_init_f (boot_flags=) at
> common/board_f.c:900
> #14 0x0664 in _main () at arch/arm/lib/crt0.S:86
> 
> Cheers,
> 
> Joel
> 
> --
> 
> To reproduce in qemu, build qemu master for ARM:
> 
> git://git.qemu-project.org/qemu && cd qemu
> ./configure --target-list=arm-softmmu
> make
> 
> build a 32MB image from u-boot.bin:
> 
> dd if=/dev/zero of=test.img bs=1M count=32
> dd if=u-boot.bin of=test.img conv=notrunc
> 
> boot it:
> 
> arm-softmmu/qemu-system-arm -M ast2500-evb -m 512 -nographic -drive
> file=test.img,format=raw,if=mtd -serial stdio -monitor pty
> 

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Re: [U-Boot] Unable to boot evb-ast2500

[Joel Stanley]

On Mon, 6 Aug 2018 at 19:39, Cédric Le Goater  wrote:
>
> On 08/06/2018 05:25 AM, Joel Stanley wrote:
> > Hello,
> >
> > I am attempting to boot evb-ast2500 in Qemu before flashing it to a
> > system. It doesn't get past the DRAM step, due to getting stuck
> > endlessly looping in some libfdt code.
> >
> > With some debugging turned on, I get this:
> >
> > OF: translating address: 0040781e
> > OF: parent translation for: 
> > OF: one level translation: 0040781e
> > OF: parent translation for: 
> > OF: one level translation: 0040781e
> > OF: translating address: 00206e1e
> >
> >
> > U-Boot 2018.09-rc1-00096-gbb694d4e898b-dirty (Aug 06 2018 - 12:27:22 +0930)
> >
> > Model: Aspeed BMC
> > DRAM:  OF: translating address: 6e1e
> > OF: translating address: 00026e1e
> > OF: translating address: 0050781e
> > OF: parent translation for: 
> > OF: one level translation: 0050781e
> > OF: parent translation for: 
> > OF: one level translation: 0050781e
> > Watchdog timer expired.
> >
> > And then the watchdog causes the system to reboot. The build is master
> > as of gbb694d4e898b, with the addition of some #define DEBUG.
> >
> > I don't think this is a qemu issue. If it is, I can work on fixing
> > qemu, but I need some help on understanding what u-boot is doing.
>
> The sdram driver in U-Boot uses the watchdog1 and the SCU power
> reset register to reset the SDRAM controller. Our QEMU emulation
> is not precise enough I think.

Thanks for the pointer.

I was able to get u-boot to load to the prompt after some hacks to get
rid of the watchdog requirement. It was a surprise to find out that
the watchdog is used to reset the SDRAM controller!

I have some patches to send to the qemu list that will allow it to run.

Cheers,

Joel
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Re: [U-Boot] [PATCH 4/6] mvebu: select boot device at SoC level

[Baruch Siach]

Hi Dennis,

Thanks for taking the time to look into this series.

Dennis Gilmore writes:
> this patch needs to be rebased on git master as it does not apply.

The conflict is trivial for git to handle automatically on rebase
(remove, remove). I assume 'git am -3' can do the same. Would you like
me to send v2 of this series for that?

baruch

> El lun, 18-06-2018 a las 21:56 +0300, Baruch Siach escribió:
>> Move the gdsys Controlcenter DC specific build time kwbimage.cfg
>> generation code into the mach-mvebu/ directory to be shared by all
>> 32bit
>> mvebu platforms.
>>
>> Remove board specific kwbimage.cfg files, and use the generated one
>> instead. These files are all identical, with two exceptions. Clearfog
>> and Helios4 use the sdio boot device, whereas all others use spi.
>> Update
>> the defconfigs for the exceptional boards to generate the same
>> kwbimage.cfg as before.
>>
>> Signed-off-by: Baruch Siach 
>> ---

[...]

>> diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
>> index b72428555d37..27e661debe0b 100644
>> --- a/configs/helios4_defconfig
>> +++ b/configs/helios4_defconfig
>> @@ -5,9 +5,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
>>  CONFIG_SPL_LIBGENERIC_SUPPORT=y
>>  CONFIG_SYS_MALLOC_F_LEN=0x2000
>>  CONFIG_TARGET_HELIOS4=y
>> +CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
>>  CONFIG_SPL_MMC_SUPPORT=y
>>  CONFIG_SPL_SERIAL_SUPPORT=y
>> -CONFIG_SPL_LIBDISK_SUPPORT=y
>>  CONFIG_SPL=y
>>  CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4"
>>  CONFIG_DEBUG_UART=y

--
 http://baruch.siach.name/blog/  ~. .~   Tk Open Systems
=}ooO--U--Ooo{=
   - bar...@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -
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Re: [U-Boot] Unable to boot evb-ast2500

[Cédric Le Goater]

On 08/06/2018 12:11 PM, Joel Stanley wrote:
> On Mon, 6 Aug 2018 at 19:39, Cédric Le Goater  wrote:
>>
>> On 08/06/2018 05:25 AM, Joel Stanley wrote:
>>> Hello,
>>>
>>> I am attempting to boot evb-ast2500 in Qemu before flashing it to a
>>> system. It doesn't get past the DRAM step, due to getting stuck
>>> endlessly looping in some libfdt code.
>>>
>>> With some debugging turned on, I get this:
>>>
>>> OF: translating address: 0040781e
>>> OF: parent translation for: 
>>> OF: one level translation: 0040781e
>>> OF: parent translation for: 
>>> OF: one level translation: 0040781e
>>> OF: translating address: 00206e1e
>>>
>>>
>>> U-Boot 2018.09-rc1-00096-gbb694d4e898b-dirty (Aug 06 2018 - 12:27:22 +0930)
>>>
>>> Model: Aspeed BMC
>>> DRAM:  OF: translating address: 6e1e
>>> OF: translating address: 00026e1e
>>> OF: translating address: 0050781e
>>> OF: parent translation for: 
>>> OF: one level translation: 0050781e
>>> OF: parent translation for: 
>>> OF: one level translation: 0050781e
>>> Watchdog timer expired.
>>>
>>> And then the watchdog causes the system to reboot. The build is master
>>> as of gbb694d4e898b, with the addition of some #define DEBUG.
>>>
>>> I don't think this is a qemu issue. If it is, I can work on fixing
>>> qemu, but I need some help on understanding what u-boot is doing.
>>
>> The sdram driver in U-Boot uses the watchdog1 and the SCU power
>> reset register to reset the SDRAM controller. Our QEMU emulation
>> is not precise enough I think.
> 
> Thanks for the pointer.
> 
> I was able to get u-boot to load to the prompt after some hacks to get
> rid of the watchdog requirement. It was a surprise to find out that
> the watchdog is used to reset the SDRAM controller!

The SDK also does but it uses wdt3 and only sets the enable reset SDRAM 
bit in the reset register mask. May be u-boot needs some improvements on
that part. 

> I have some patches to send to the qemu list that will allow it to run.

OK. we can add them to our QEMU branch

Thanks,

C. 


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Re: [U-Boot] [PATCH v3 1/4] power-domain: add dummy functions when CONFIG_POWER_DOMAIN not defined

[Anatolij Gustschin]

On Mon,  6 Aug 2018 12:02:45 +0200
Anatolij Gustschin ag...@denx.de wrote:

> From: Peng Fan 
> 
> Add dummy functions when CONFIG_POWER_DOMAIN not defined.
> 
> Signed-off-by: Peng Fan 
> Reviewed-by: Simon Glass 
> Signed-off-by: Anatolij Gustschin 
> ---
> 
> V3:
>  - add 'static inline' to fix build breakage
>  - use -ENOSYS as we do elsewhere to indicate not implemented functionality
> 
> V2: Use CONFIG_IS_ENABLED
> 
>  include/power-domain.h | 29 +
>  1 file changed, 29 insertions(+)

Applied to u-boot-staging/ag...@denx.de, thanks!

--
Anatolij
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Re: [U-Boot] [PATCH v2 3/8] test/py: Import 'configparser' lower case to be python 3.x safe

[Michal Simek]

On 14.9.2017 23:34, Paul Burton wrote:
> In python 3.x the configparser module is named with all lower case.
> Import it as such in order to avoid errors when running on python 3.x,
> and fall back to the CamelCase version in order to keep working with
> python 2.x.
> 
> Signed-off-by: Paul Burton 
> Reviewed-by: Stephen Warren 
> 
> ---
> 
> Changes in v2:
> - Import python 2.x ConfigParser as the python 3.x style configparser, rather 
> than the other way around.
> 
>  test/py/conftest.py | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/test/py/conftest.py b/test/py/conftest.py
> index ced96f1006..bf55bd3d13 100644
> --- a/test/py/conftest.py
> +++ b/test/py/conftest.py
> @@ -19,11 +19,15 @@ import os
>  import os.path
>  import pytest
>  from _pytest.runner import runtestprotocol
> -import ConfigParser
>  import re
>  import StringIO
>  import sys
>  
> +try:
> +import configparser
> +except:
> +import ConfigParser as configparser
> +
>  # Globals: The HTML log file, and the connection to the U-Boot console.
>  log = None
>  console = None
> @@ -167,7 +171,7 @@ def pytest_configure(config):
>  with open(dot_config, 'rt') as f:
>  ini_str = '[root]\n' + f.read()
>  ini_sio = StringIO.StringIO(ini_str)
> -parser = ConfigParser.RawConfigParser()
> +parser = configparser.RawConfigParser()
>  parser.readfp(ini_sio)
>  ubconfig.buildconfig.update(parser.items('root'))
>  
> 

I have bisect issue with test/py framework on my PC and I end up on this
patch.

Below is the issue I am getting.

And here are my python version.
[u-boot](test)$ python3 --version
Python 3.4.3
[u-boot](test)$ python --version
Python 2.7.6
[u-boot](test)$ which python
/usr/bin/python


Do you know what could be the issue?

Thanks,
Michal


=
FAILURES
==
_
test_help
_

u_boot_console = 

def test_help(u_boot_console):
"""Test that the "help" command can be executed."""

>   u_boot_console.run_command('help')

test/py/tests/test_help.py:8:
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
test/py/u_boot_console_base.py:181: in run_command
self.logstream.write(self.prompt, implicit=True)
test/py/multiplexed_log.py:65: in write
self.logfile.write(self, data, implicit)
test/py/multiplexed_log.py:688: in write
self.f.write(self._escape(data))
test/py/multiplexed_log.py:335: in _escape
c for c in data)
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

.0 = 

data = ''.join((c in self._nonprint) and ('%%%02x' % ord(c)) or
>  c for c in data)
E   UnicodeDecodeError: 'ascii' codec can't decode byte 0x80 in position
32: ordinal not in range(128)

test/py/multiplexed_log.py:335: UnicodeDecodeError
===
130 tests deselected

=
1 failed, 130 deselected in 7.32 seconds
==


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[U-Boot] [PATCH] Kirkwood: NAS220: remove bootdelay from CONFIG_EXTRA_ENV_SETTINGS

[Evgeni Dobrev]

The default bootdelay of 3 seconds is good enough and there is no need
to duplicate it in CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Evgeni Dobrev 
---
 include/configs/nas220.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/nas220.h b/include/configs/nas220.h
index b37705e26e..9738d96ca9 100644
--- a/include/configs/nas220.h
+++ b/include/configs/nas220.h
@@ -69,7 +69,6 @@
"0x50@0xc(uimage),"\
"0x1a4@0x5c(rootfs)\0" \
"mtdids=nand0=orion_nand\0"\
-   "bootdelay=-1\0"\
"autostart=no\0"\
"autoload=no\0"
 
-- 
2.11.0

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[U-Boot] [PATCH 3/3] Remove includes and PRI* usages in printf() entirely

[Masahiro Yamada]

In int-ll64.h, we always use the following typedefs:

  typedef unsigned int u32;
  typedef unsigned longuintptr_t;
  typedef unsigned long long   u64;

This does not need to match to the compiler's .
Do not include it.

The use of PRI* makes the code super-ugly.  You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.

Signed-off-by: Masahiro Yamada 
---

 arch/x86/lib/relocate.c  |  12 +-
 board/raspberrypi/rpi/rpi.c  |   3 +-
 cmd/mem.c|   6 +-
 common/fdt_support.c |  17 +--
 common/usb_storage.c |  16 +--
 disk/part_efi.c  |   1 -
 drivers/pci/pci-uclass.c |   6 +-
 drivers/pci/pci_sandbox.c|   1 -
 drivers/scsi/scsi.c  |   9 +-
 fs/ext4/ext4_common.c|   3 +-
 include/common.h |   3 -
 include/inttypes.h   | 276 ---
 lib/display_options.c|   5 +-
 lib/efi_loader/efi_boottime.c|   7 +-
 lib/efi_loader/efi_device_path.c |   1 -
 lib/efi_loader/efi_disk.c|   7 +-
 lib/efi_loader/efi_gop.c |   1 -
 lib/efi_loader/efi_memory.c  |   3 +-
 lib/efi_loader/efi_net.c |   1 -
 lib/efi_loader/efi_smbios.c  |   1 -
 lib/fdtdec.c |   8 +-
 test/stdint/int-types.c  |   7 +-
 22 files changed, 43 insertions(+), 351 deletions(-)
 delete mode 100644 include/inttypes.h

diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 050f9d0..ed10755 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -15,7 +15,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -70,8 +69,7 @@ static void do_elf_reloc_fixups64(unsigned int text_base, 
uintptr_t size,
*offset_ptr_ram = gd->reloc_off +
re_src->r_addend;
} else {
-   debug("   %p: %lx: rom reloc %lx, ram %p, value 
%lx, limit %"
- PRIXPTR "\n",
+   debug("   %p: %lx: rom reloc %lx, ram %p, value 
%lx, limit %lX\n",
  re_src, (ulong)re_src->r_info,
  (ulong)re_src->r_offset, offset_ptr_ram,
  (ulong)*offset_ptr_ram, text_base + size);
@@ -109,11 +107,9 @@ static void do_elf_reloc_fixups32(unsigned int text_base, 
uintptr_t size,
*offset_ptr_ram <= text_base + size) {
*offset_ptr_ram += gd->reloc_off;
} else {
-   debug("   %p: rom reloc %x, ram %p, value %x,"
-   " limit %" PRIXPTR "\n", re_src,
-   re_src->r_offset, offset_ptr_ram,
-   *offset_ptr_ram,
-   text_base + size);
+   debug("   %p: rom reloc %x, ram %p, value %x, 
limit %lX\n",
+ re_src, re_src->r_offset, offset_ptr_ram,
+ *offset_ptr_ram, text_base + size);
}
} else {
debug("   %p: rom reloc %x, last %p\n", re_src,
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 35f5939..649127c 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -4,7 +4,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -384,7 +383,7 @@ static void set_serial_number(void)
return;
}
 
-   snprintf(serial_string, sizeof(serial_string), "%016" PRIx64,
+   snprintf(serial_string, sizeof(serial_string), "%016llx",
 msg->get_board_serial.body.resp.serial);
env_set("serial#", serial_string);
 }
diff --git a/cmd/mem.c b/cmd/mem.c
index 509b400..392ed17 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -17,7 +17,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -275,8 +274,7 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (word1 != word2) {
ulong offset = buf1 - base;
 #ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
-   printf("%s at 0x%p (%#0*"PRIx64") != %s at 0x%p (%#0*"
-  PRIx64 ")\n",
+   printf("%s at 0x%p (%#0*llx) != %s at 0x%p (%#0*llx)\n",
   type, (void *)(addr1 + offset), size, word1,
   type, (void *)(addr2 + offset), size, word2);
 #else
@@ -1000,7 +998,7 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int 
argc, char * const argv[])
printf(" %08x", *((u32 *)ptr));
 #ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
  

[U-Boot] [PATCH 1/3] Remove CONFIG_USE_STDINT

[Masahiro Yamada]

You do not need to use the typedefs provided by compiler.

Our compilers are either IPL32 or LP64.  Hence, U-Boot can/should
always use int-ll64.h typedefs like Linux kernel, whatever the
typedefs the compiler internally uses.

Signed-off-by: Masahiro Yamada 
---

 README   |  5 -
 arch/sandbox/include/asm/types.h |  5 -
 arch/x86/include/asm/types.h |  5 -
 config.mk|  5 -
 include/compiler.h   |  5 -
 include/inttypes.h   | 10 --
 include/linux/types.h|  9 +
 scripts/config_whitelist.txt |  1 -
 test/stdint/test-includes.sh |  2 --
 tools/buildman/func_test.py  |  2 +-
 10 files changed, 2 insertions(+), 47 deletions(-)

diff --git a/README b/README
index aee0f73..58594f3 100644
--- a/README
+++ b/README
@@ -3018,11 +3018,6 @@ Configuration Settings:
If defined, don't allow the -f switch to env set override variable
access flags.
 
-- CONFIG_USE_STDINT
-   If stdint.h is available with your toolchain you can define this
-   option to enable it. You can provide option 'USE_STDINT=1' when
-   building U-Boot to enable this.
-
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
 following configurations:
diff --git a/arch/sandbox/include/asm/types.h b/arch/sandbox/include/asm/types.h
index a10b455..79c85aa 100644
--- a/arch/sandbox/include/asm/types.h
+++ b/arch/sandbox/include/asm/types.h
@@ -41,13 +41,8 @@ typedef unsigned short u16;
 typedef signed int s32;
 typedef unsigned int u32;
 
-#if !defined(CONFIG_USE_STDINT) || !defined(__INT64_TYPE__)
 typedef signed long long s64;
 typedef unsigned long long u64;
-#else
-typedef __INT64_TYPE__ s64;
-typedef __UINT64_TYPE__ u64;
-#endif
 
 /*
  * Number of bits in a C 'long' on this architecture.
diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/asm/types.h
index a47e581..7649c2b 100644
--- a/arch/x86/include/asm/types.h
+++ b/arch/x86/include/asm/types.h
@@ -36,13 +36,8 @@ typedef unsigned short u16;
 typedef signed int s32;
 typedef unsigned int u32;
 
-#if !defined(CONFIG_USE_STDINT) || !defined(__INT64_TYPE__)
 typedef signed long long s64;
 typedef unsigned long long u64;
-#else
-typedef __INT64_TYPE__ s64;
-typedef __UINT64_TYPE__ u64;
-#endif
 
 #if CONFIG_IS_ENABLED(X86_64)
 #define BITS_PER_LONG 64
diff --git a/config.mk b/config.mk
index 78748cc..b4e4618 100644
--- a/config.mk
+++ b/config.mk
@@ -62,11 +62,6 @@ ifdef FTRACE
 PLATFORM_CPPFLAGS += -finstrument-functions -DFTRACE
 endif
 
-# Allow use of stdint.h if available
-ifneq ($(USE_STDINT),)
-PLATFORM_CPPFLAGS += -DCONFIG_USE_STDINT
-endif
-
 #
 
 RELFLAGS := $(PLATFORM_RELFLAGS)
diff --git a/include/compiler.h b/include/compiler.h
index 957f4b5..29507f9 100644
--- a/include/compiler.h
+++ b/include/compiler.h
@@ -120,13 +120,8 @@ typedef unsigned int uint;
 
 #else /* !USE_HOSTCC */
 
-#ifdef CONFIG_USE_STDINT
-/* Provided by gcc. */
-#include 
-#else
 /* Type for `void *' pointers. */
 typedef unsigned long int uintptr_t;
-#endif
 
 #include 
 #include 
diff --git a/include/inttypes.h b/include/inttypes.h
index ea731ec..b86ad04 100644
--- a/include/inttypes.h
+++ b/include/inttypes.h
@@ -34,19 +34,9 @@ typedef wchar_t __gwchar_t;
defined if explicitly requested.  */
 #if !defined __cplusplus || defined __STDC_FORMAT_MACROS
 
-#ifdef CONFIG_USE_STDINT
-# if __WORDSIZE == 64
-#  define __PRI64_PREFIX   "l"
-#  define __PRIPTR_PREFIX  "l"
-# else
-#  define __PRI64_PREFIX   "ll"
-#  define __PRIPTR_PREFIX
-# endif
-#else
 /* linux/types.h always uses long long for 64-bit and long for uintptr_t */
 # define __PRI64_PREFIX"ll"
 # define __PRIPTR_PREFIX   "l"
-#endif
 
 /* Macros for printing format specifiers.  */
 
diff --git a/include/linux/types.h b/include/linux/types.h
index 7c33e7a..1f3cd63 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -106,8 +106,7 @@ typedef __u8uint8_t;
 typedef__u16   uint16_t;
 typedef__u32   uint32_t;
 
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__) && \
-   (!defined(CONFIG_USE_STDINT) || !defined(__INT64_TYPE__))
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
 typedef__u64   uint64_t;
 typedef__u64   u_int64_t;
 typedef__s64   int64_t;
@@ -120,12 +119,6 @@ typedef__s64   int64_t;
 #define aligned_be64 __be64 __aligned(8)
 #define aligned_le64 __le64 __aligned(8)
 
-#if defined(CONFIG_USE_STDINT) && defined(__INT64_TYPE__)
-typedef__UINT64_TYPE__ uint64_t;
-typedef__UINT64_TYPE__ u_int64_t;
-typedef__INT64_TYPE__  int64_t;
-#endif
-
 #ifdef __KERNEL__
 typedef phys_ad

Re: [U-Boot] [PATCH 1/1] distro_bootcmd: Switch bootefi to use loadaddr by default.

[Kristian Amlie]

Ping. Any objections to this change?

-- 
Kristian

On 10/07/18 15:29, Kristian Amlie wrote:
> loadaddr is configurable in Kconfig using CONFIG_LOADADDR, while
> kernel_addr_r is not. Hence, loadaddr is the future. Provide the
> existing kernel_addr_r as a fallback if loadaddr is not set.
> 
> Signed-off-by: Kristian Amlie 
> ---
>  include/config_distro_bootcmd.h | 18 --
>  1 file changed, 12 insertions(+), 6 deletions(-)
> 
> diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
> index d672e8e..839afcc 100644
> --- a/include/config_distro_bootcmd.h
> +++ b/include/config_distro_bootcmd.h
> @@ -129,12 +129,15 @@
>   "else "   \
>   "bootefi bootmgr ${fdtcontroladdr};"  \
>   "fi;" \
> + "if test -z \"${loadaddr}\"; then "   \
> + "setenv loadaddr ${kernel_addr_r};"   \
> + "fi;" \
>   "load ${devtype} ${devnum}:${distro_bootpart} "   \
> - "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; "  \
> + "${loadaddr} efi/boot/"BOOTEFI_NAME"; "   \
>   "if fdt addr ${fdt_addr_r}; then "\
> - "bootefi ${kernel_addr_r} ${fdt_addr_r};" \
> + "bootefi ${loadaddr} ${fdt_addr_r};"  \
>   "else "   \
> - "bootefi ${kernel_addr_r} ${fdtcontroladdr};" \
> + "bootefi ${loadaddr} ${fdtcontroladdr};"  \
>   "fi\0"\
>   \
>   "load_efi_dtb="   \
> @@ -277,12 +280,15 @@
>   "setenv efi_old_arch ${bootp_arch};"  \
>   "setenv bootp_vci " BOOTENV_EFI_PXE_VCI ";"   \
>   "setenv bootp_arch " BOOTENV_EFI_PXE_ARCH ";" \
> - "if dhcp ${kernel_addr_r}; then " \
> + "if test -z \"${loadaddr}\"; then "   \
> + "setenv loadaddr ${kernel_addr_r};"   \
> + "fi;" \
> + "if dhcp ${loadaddr}; then "  \
>   "tftpboot ${fdt_addr_r} dtb/${efi_fdtfile};"  \
>   "if fdt addr ${fdt_addr_r}; then "\
> - "bootefi ${kernel_addr_r} ${fdt_addr_r}; "\
> + "bootefi ${loadaddr} ${fdt_addr_r}; " \
>   "else "   \
> - "bootefi ${kernel_addr_r} ${fdtcontroladdr};" \
> + "bootefi ${loadaddr} ${fdtcontroladdr};"  \
>   "fi;" \
>   "fi;" \
>   "setenv bootp_vci ${efi_old_vci};"\
> 

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[U-Boot] [PATCH 2/3] arch: types.h: factor out fixed width typedefs to int-ll64.h

[Masahiro Yamada]

All architectures have the same definition for s8/16/32/64
and u8/16/32/64.

Factor out the duplicated code into .

BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").

Signed-off-by: Masahiro Yamada 
---

 arch/arc/include/asm/types.h| 36 ++--
 arch/arm/include/asm/types.h| 33 ++
 arch/m68k/include/asm/types.h   | 30 ++-
 arch/microblaze/include/asm/types.h | 33 ++
 arch/mips/include/asm/types.h   | 36 ++--
 arch/nds32/include/asm/types.h  | 33 ++
 arch/powerpc/include/asm/types.h| 30 ++-
 arch/riscv/include/asm/types.h  | 33 ++
 arch/sandbox/include/asm/types.h| 33 ++
 arch/sh/include/asm/types.h | 34 ++-
 arch/x86/include/asm/types.h| 33 ++
 arch/xtensa/include/asm/types.h | 33 ++
 include/asm-generic/int-ll64.h  | 47 +
 include/asm-generic/types.h |  9 +++
 14 files changed, 80 insertions(+), 373 deletions(-)
 create mode 100644 include/asm-generic/int-ll64.h
 create mode 100644 include/asm-generic/types.h

diff --git a/arch/arc/include/asm/types.h b/arch/arc/include/asm/types.h
index 3e37781..f31dcdf 100644
--- a/arch/arc/include/asm/types.h
+++ b/arch/arc/include/asm/types.h
@@ -6,41 +6,9 @@
 #ifndef __ASM_ARC_TYPES_H
 #define __ASM_ARC_TYPES_H
 
-typedef unsigned short umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
+#include 
 
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#endif
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
+typedef unsigned short umode_t;
 
 #define BITS_PER_LONG 32
 
diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
index 9af7353..900b261 100644
--- a/arch/arm/include/asm/types.h
+++ b/arch/arm/include/asm/types.h
@@ -1,44 +1,15 @@
 #ifndef __ASM_ARM_TYPES_H
 #define __ASM_ARM_TYPES_H
 
-typedef unsigned short umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
+#include 
 
-#if defined(__GNUC__)
-__extension__ typedef __signed__ long long __s64;
-__extension__ typedef unsigned long long __u64;
-#endif
+typedef unsigned short umode_t;
 
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
 #ifdef __KERNEL__
 
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
 #ifdef CONFIG_ARM64
 #define BITS_PER_LONG 64
 #else  /* CONFIG_ARM64 */
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
index 3ffcab2..5d39b97 100644
--- a/arch/m68k/include/asm/types.h
+++ b/arch/m68k/include/asm/types.h
@@ -1,43 +1,17 @@
 #ifndef _M68K_TYPES_H
 #define _M68K_TYPES_H
 
+#include 
+
 #ifndef __ASSEMBLY__
 
 typedef unsigned short umode_t;
 
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__)
-__extension__ typedef __signed__ long long __s64;
-__extension__ typedef unsigned long long __u64;
-#endif
-
 typedef struct {
__u32 u[4];
 } __attribute__((aligned(16))) vector128;
 
 #ifdef __KERNEL__
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
 
 #define BITS_PER_LONG 32
 
diff --git a/arch/microblaze/include/asm/types.h 
b/arch/microblaze/include/asm/types.h
index 77094f6..056a313 100644
--- a/arch/microblaze/include/asm/types.h
+++ b/arch/microblaze

Re: [U-Boot] [PATCH] ARM: dts: stm32f4: Fix DT dtc warnings

[Tom Rini]

On Mon, Aug 06, 2018 at 11:25:42AM +0200, Patrice Chotard wrote:
> From: Patrick Delaunay 
> 
> This patch fix the following warnings for for stm32f429
> evaluation and discovery boards:
> 
> unnecessary #address-cells/#size-cells without "ranges" or
> child "reg" property
> 
> Signed-off-by: Patrick Delaunay 
> Signed-off-by: Patrice Chotard 
> ---
> 
>  arch/arm/dts/stm32429i-eval.dts  | 1 -
>  arch/arm/dts/stm32f429-disco.dts | 1 -
>  arch/arm/dts/stm32f429.dtsi  | 4 
>  3 files changed, 6 deletions(-)

All of these are files we sync in from Linux, so have they been fixed
upstream?  Thanks!

-- 
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Re: [U-Boot] [PATCH 1/2] i2c-mux: pca954x: support pca9646 i2c switch

[Anatolij Gustschin]

On Tue, 17 Jul 2018 20:38:32 +0800
Peng Fan peng@nxp.com wrote:

> Add the PCA9646 support, which is 2-wire bus switch and buffered 4-channel.
> 
> Signed-off-by: Peng Fan 

Reviewed-by: Anatolij Gustschin 

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[U-Boot] MMC_DAVINCI not compliant with CONFIG_BLK

[Adam Ford]

From what I gathered over the weekend, the MMC_DAVINCI hasn't migrated
to DM_MMC nor does CONFIG_BLK successfully build on ARCH_DAVINCI
boards that enable MMC_DAVINCI.

I started work to attempt to make it DM_MMC and OF_CONTROL compliant
using the da850evm.

Before I go too far, I just want to make sure nobody else is doing
this work.  I don't want to duplicate an effort or waste time if it's
been done or is in the works.

If someone is interesting in testing the patch when I am done, it
would be very helpful, because I only have the da850evm.  If someone
has a patch and wants me to test it, I would also be willing to try
it.

adam
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Re: [U-Boot] [PATCH v2 3/3] configs: kirkwood: Move RTC_MV to DM and Kconfig

[Stefan Roese]

Hi Chris,

On 29.06.2018 00:38, Chris Packham wrote:

Now that there is DM support in the RTC_MV driver update board configs
to use it.

Signed-off-by: Chris Packham 


I'm a bit late this time in the release cycle. This one does not apply
any more to master. Could you please rebase this patch and send a new
version (or the series)?

Thanks,
Stefan
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Re: [U-Boot] [PATCH 4/6] mvebu: select boot device at SoC level

[Stefan Roese]

Hi Baruch,

On 06.08.2018 12:12, Baruch Siach wrote:

Hi Dennis,

Thanks for taking the time to look into this series.

Dennis Gilmore writes:

this patch needs to be rebased on git master as it does not apply.


The conflict is trivial for git to handle automatically on rebase
(remove, remove). I assume 'git am -3' can do the same. Would you like
me to send v2 of this series for that?


Seems to be fine. I just tried it and it applies fine, resolving
the conflicts automatically. No new version necessary.

Thanks,
Stefan
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Re: [U-Boot] [PATCH 2/2] i2c: imx_lpi2c: add uclass api support

[Anatolij Gustschin]

On Tue, 17 Jul 2018 20:38:33 +0800
Peng Fan peng@nxp.com wrote:

> Use uclass clk api to get per clk when CONFIG_CLK enabled.
> 
> Signed-off-by: Peng Fan 
> ---
>  drivers/i2c/imx_lpi2c.c | 47 ---
>  include/imx_lpi2c.h |  3 +++
>  2 files changed, 43 insertions(+), 7 deletions(-)

Reviewed-by: Anatolij Gustschin 

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Re: [U-Boot] [PATCH] ARM: dts: stm32f4: Fix DT dtc warnings

[Patrice CHOTARD]

Hi Tom

On 08/06/2018 02:07 PM, Tom Rini wrote:
> On Mon, Aug 06, 2018 at 11:25:42AM +0200, Patrice Chotard wrote:
>> From: Patrick Delaunay 
>>
>> This patch fix the following warnings for for stm32f429
>> evaluation and discovery boards:
>>
>> unnecessary #address-cells/#size-cells without "ranges" or
>> child "reg" property
>>
>> Signed-off-by: Patrick Delaunay 
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>>   arch/arm/dts/stm32429i-eval.dts  | 1 -
>>   arch/arm/dts/stm32f429-disco.dts | 1 -
>>   arch/arm/dts/stm32f429.dtsi  | 4 
>>   3 files changed, 6 deletions(-)
> 
> All of these are files we sync in from Linux, so have they been fixed
> upstream?  Thanks!

On linux side, these files are not fixed yet. We intend to do it for 
linux v4.20.

When linux v4.20 first RC will be available, i will resync all STM32 MCU 
dt files in U-boot.

Thanks

Patrice

> 
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[U-Boot] DM_SPI, DM_SPI_FLASH due 2018.09

[Adam Ford]

Tom / Jagan,

Per MIGRATION.txt, (dated 14 March 2018) it shows the deadline for
CONFIG_DM_SPI and CONFIG_DM_SPI_FLASH to be 2018.09 which is already
in RC1 status.

This document also lists some boards which were partially converted
and some boards which have not yet started.

Is there an update on what's left for the partially converted boards,
and are the remaining boards going to be removed?

I  know some people are scrambling to hit the CONFIG_BLK requirement.

thanks,

adam
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Re: [U-Boot] [PATCH 1/2] i2c-mux: pca954x: support pca9646 i2c switch

[Anatolij Gustschin]

On Tue, 17 Jul 2018 20:38:32 +0800
Peng Fan peng@nxp.com wrote:

> Add the PCA9646 support, which is 2-wire bus switch and buffered 4-channel.
> 
> Signed-off-by: Peng Fan 
> ---
>  drivers/i2c/muxes/pca954x.c | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH 2/2] i2c: imx_lpi2c: add uclass api support

[Anatolij Gustschin]

On Tue, 17 Jul 2018 20:38:33 +0800
Peng Fan peng@nxp.com wrote:

> Use uclass clk api to get per clk when CONFIG_CLK enabled.
> 
> Signed-off-by: Peng Fan 
> ---
>  drivers/i2c/imx_lpi2c.c | 47 ---
>  include/imx_lpi2c.h |  3 +++
>  2 files changed, 43 insertions(+), 7 deletions(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH u-boot 1/2] power: domain: Add the VPU Power Domain driver

[Neil Armstrong]

On 02/08/2018 22:36, Simon Glass wrote:
> Hi Neil,
> 
> On 26 July 2018 at 07:54, Neil Armstrong  wrote:
>> The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
>> Video Processing Unit.
>> This patch implements support for this power domain in preparation of the
>> future support for the Video display support in U-Boot.
>>
>> This driver will depend on changes in the clock driver to handle the setup
>> of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
>>
>> Signed-off-by: Neil Armstrong 
>> ---
>>  drivers/power/domain/Kconfig |   7 ++
>>  drivers/power/domain/Makefile|   1 +
>>  drivers/power/domain/meson-gx-pwrc-vpu.c | 198 
>> +++
>>  3 files changed, 206 insertions(+)
>>  create mode 100644 drivers/power/domain/meson-gx-pwrc-vpu.c
>>
> 
> Reviewed-by: Simon Glass 
> 
> Are the delays documented in a datasheet? I suggest adding a comment
> about them. People will otherwise forever wonder how the values were
> chosen.

These delays are taken from the vendor source code and are the same in the linux
driver, I would have loved to have some documentation about it

> 
> Also it seems odd that you can't power everything up at once.

Yeah, it's quite a huge power domain.

> 
> Regards,
> Simon
> 

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[U-Boot] [PATCH v2 u-boot 0/2] Add the VPU Power Domain support

[Neil Armstrong]

The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
Video Processing Unit.
The first patch implements support for this power domain in preparation of the
future support for the Video display support in U-Boot.

The second patch adds changes in the clock driver to handle the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.

Changes since v1:
- Fixed "format '%d' expects argument of type 'int', but argument 4 has type 
'long unsigned int'" in clk_meson.c

Neil Armstrong (2):
  power: domain: Add the VPU Power Domain driver
  clk: clk_meson: Add mux and div support for reparent and rate setting

 drivers/clk/clk_meson.c  | 533 ++-
 drivers/power/domain/Kconfig |   7 +
 drivers/power/domain/Makefile|   1 +
 drivers/power/domain/meson-gx-pwrc-vpu.c | 198 
 4 files changed, 734 insertions(+), 5 deletions(-)
 create mode 100644 drivers/power/domain/meson-gx-pwrc-vpu.c

-- 
2.7.4

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[U-Boot] [PATCH v2 u-boot 1/2] power: domain: Add the VPU Power Domain driver

[Neil Armstrong]

The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
Video Processing Unit.
This patch implements support for this power domain in preparation of the
future support for the Video display support in U-Boot.

This driver will depend on changes in the clock driver to handle the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.

Reviewed-by: Simon Glass 
Signed-off-by: Neil Armstrong 
---
 drivers/power/domain/Kconfig |   7 ++
 drivers/power/domain/Makefile|   1 +
 drivers/power/domain/meson-gx-pwrc-vpu.c | 198 +++
 3 files changed, 206 insertions(+)
 create mode 100644 drivers/power/domain/meson-gx-pwrc-vpu.c

diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
index 7cfa761..4618847 100644
--- a/drivers/power/domain/Kconfig
+++ b/drivers/power/domain/Kconfig
@@ -16,6 +16,13 @@ config BCM6328_POWER_DOMAIN
  Enable support for manipulating BCM6345 power domains via MMIO
  mapped registers.
 
+config MESON_GX_VPU_POWER_DOMAIN
+   bool "Enable Amlogic Meson GX VPU power domain driver"
+   depends on ARCH_MESON
+   help
+ Enable support for manipulating Amlogic Meson GX Video Processing
+ Unit power domain.
+
 config SANDBOX_POWER_DOMAIN
bool "Enable the sandbox power domain test driver"
depends on POWER_DOMAIN && SANDBOX
diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
index c7d7644..4a3282b 100644
--- a/drivers/power/domain/Makefile
+++ b/drivers/power/domain/Makefile
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_POWER_DOMAIN) += power-domain-uclass.o
 obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
+obj-$(CONFIG_MESON_GX_VPU_POWER_DOMAIN) += meson-gx-pwrc-vpu.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o
 obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o
 obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
diff --git a/drivers/power/domain/meson-gx-pwrc-vpu.c 
b/drivers/power/domain/meson-gx-pwrc-vpu.c
new file mode 100644
index 000..d631d3e
--- /dev/null
+++ b/drivers/power/domain/meson-gx-pwrc-vpu.c
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Amlogic Meson VPU Power Domain Controller driver
+ *
+ * Copyright (c) 2018 BayLibre, SAS.
+ * Author: Neil Armstrong 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* AO Offsets */
+
+#define AO_RTI_GEN_PWR_SLEEP0  (0x3a << 2)
+
+#define GEN_PWR_VPU_HDMI   BIT(8)
+#define GEN_PWR_VPU_HDMI_ISO   BIT(9)
+
+/* HHI Offsets */
+
+#define HHI_MEM_PD_REG0(0x40 << 2)
+#define HHI_VPU_MEM_PD_REG0(0x41 << 2)
+#define HHI_VPU_MEM_PD_REG1(0x42 << 2)
+
+struct meson_gx_pwrc_vpu_priv {
+   struct regmap *regmap_ao;
+   struct regmap *regmap_hhi;
+   struct reset_ctl_bulk resets;
+   struct clk_bulk clks;
+};
+
+static int meson_gx_pwrc_vpu_request(struct power_domain *power_domain)
+{
+   return 0;
+}
+
+static int meson_gx_pwrc_vpu_free(struct power_domain *power_domain)
+{
+   return 0;
+}
+
+static int meson_gx_pwrc_vpu_on(struct power_domain *power_domain)
+{
+   struct meson_gx_pwrc_vpu_priv *priv = dev_get_priv(power_domain->dev);
+   int i, ret;
+
+   regmap_update_bits(priv->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
+  GEN_PWR_VPU_HDMI, 0);
+   udelay(20);
+
+   /* Power Up Memories */
+   for (i = 0; i < 32; i += 2) {
+   regmap_update_bits(priv->regmap_hhi, HHI_VPU_MEM_PD_REG0,
+  0x3 << i, 0);
+   udelay(5);
+   }
+
+   for (i = 0; i < 32; i += 2) {
+   regmap_update_bits(priv->regmap_hhi, HHI_VPU_MEM_PD_REG1,
+  0x3 << i, 0);
+   udelay(5);
+   }
+
+   for (i = 8; i < 16; i++) {
+   regmap_update_bits(priv->regmap_hhi, HHI_MEM_PD_REG0,
+  BIT(i), 0);
+   udelay(5);
+   }
+   udelay(20);
+
+   ret = reset_assert_bulk(&priv->resets);
+   if (ret)
+   return ret;
+
+   regmap_update_bits(priv->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
+  GEN_PWR_VPU_HDMI_ISO, 0);
+
+   ret = reset_deassert_bulk(&priv->resets);
+   if (ret)
+   return ret;
+
+   ret = clk_enable_bulk(&priv->clks);
+   if (ret)
+   return ret;
+
+   return 0;
+}
+
+static int meson_gx_pwrc_vpu_off(struct power_domain *power_domain)
+{
+   struct meson_gx_pwrc_vpu_priv *priv = dev_get_priv(power_domain->dev);
+   int i;
+
+   regmap_update_bits(priv->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
+  GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO);
+   udelay(20);
+
+   /* Power Down Memories */
+   for (i = 0; i < 32; i += 2) {
+   regmap_update_bi

[U-Boot] [PATCH v2 u-boot 2/2] clk: clk_meson: Add mux and div support for reparent and rate setting

[Neil Armstrong]

This patch adds support for :
- Rate calculation through muxes and generic dividers
- Basic gate setting propagation
- Reparenting for muxes
- Clock rate setting through generic dividers without reparenting

Support is only added to the Composite VPU and VAPB clocks in order
to support the Video Processing Unit Power Domain clock setup.

Reviewed-by: Simon Glass 
Signed-off-by: Neil Armstrong 
---
 drivers/clk/clk_meson.c | 533 +++-
 1 file changed, 528 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/clk_meson.c b/drivers/clk/clk_meson.c
index 3850128..236d734 100644
--- a/drivers/clk/clk_meson.c
+++ b/drivers/clk/clk_meson.c
@@ -14,12 +14,69 @@
 #include 
 #include "clk_meson.h"
 
+/* This driver support only basic clock tree operations :
+ * - Can calculate clock frequency on a limited tree
+ * - Can Read muxes and basic dividers (0-based only)
+ * - Can enable/disable gates with limited propagation
+ * - Can reparent without propagation, only on muxes
+ * - Can set rates without reparenting
+ * This driver is adapted to what is actually supported by U-Boot
+ */
+
+/* Only the clocks ids we don't want to expose, such as the internal muxes
+ * and dividers of composite clocks, will remain defined here.
+ */
+#define CLKID_MPEG_SEL   10
+#define CLKID_MPEG_DIV   11
+#define CLKID_SAR_ADC_DIV99
+#define CLKID_MALI_0_DIV 101
+#define CLKID_MALI_1_DIV 104
+#define CLKID_CTS_AMCLK_SEL  108
+#define CLKID_CTS_AMCLK_DIV  109
+#define CLKID_CTS_MCLK_I958_SEL  111
+#define CLKID_CTS_MCLK_I958_DIV  112
+#define CLKID_32K_CLK_SEL115
+#define CLKID_32K_CLK_DIV116
+#define CLKID_SD_EMMC_A_CLK0_SEL  117
+#define CLKID_SD_EMMC_A_CLK0_DIV  118
+#define CLKID_SD_EMMC_B_CLK0_SEL  120
+#define CLKID_SD_EMMC_B_CLK0_DIV  121
+#define CLKID_SD_EMMC_C_CLK0_SEL  123
+#define CLKID_SD_EMMC_C_CLK0_DIV  124
+#define CLKID_VPU_0_DIV  127
+#define CLKID_VPU_1_DIV  130
+#define CLKID_VAPB_0_DIV 134
+#define CLKID_VAPB_1_DIV 137
+#define CLKID_HDMI_PLL_PRE_MULT  141
+#define CLKID_MPLL0_DIV  142
+#define CLKID_MPLL1_DIV  143
+#define CLKID_MPLL2_DIV  144
+#define CLKID_MPLL_PREDIV145
+#define CLKID_FCLK_DIV2_DIV  146
+#define CLKID_FCLK_DIV3_DIV  147
+#define CLKID_FCLK_DIV4_DIV  148
+#define CLKID_FCLK_DIV5_DIV  149
+#define CLKID_FCLK_DIV7_DIV  150
+#define CLKID_VDEC_1_SEL 151
+#define CLKID_VDEC_1_DIV 152
+#define CLKID_VDEC_HEVC_SEL  154
+#define CLKID_VDEC_HEVC_DIV  155
+
 #define XTAL_RATE 2400
 
 struct meson_clk {
void __iomem *addr;
 };
 
+static ulong meson_div_get_rate(struct clk *clk, unsigned long id);
+static ulong meson_div_set_rate(struct clk *clk, unsigned long id, ulong rate,
+   ulong current_rate);
+static ulong meson_mux_set_parent(struct clk *clk, unsigned long id,
+ unsigned long parent_id);
+static ulong meson_mux_get_rate(struct clk *clk, unsigned long id);
+static ulong meson_clk_set_rate_by_id(struct clk *clk, unsigned long id,
+ ulong rate, ulong current_rate);
+static ulong meson_mux_get_parent(struct clk *clk, unsigned long id);
 static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id);
 
 struct meson_gate gates[] = {
@@ -126,34 +183,387 @@ struct meson_gate gates[] = {
MESON_GATE(CLKID_SD_EMMC_A_CLK0, HHI_SD_EMMC_CLK_CNTL, 7),
MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23),
MESON_GATE(CLKID_SD_EMMC_C_CLK0, HHI_NAND_CLK_CNTL, 7),
+   MESON_GATE(CLKID_VPU_0, HHI_VPU_CLK_CNTL, 8),
+   MESON_GATE(CLKID_VPU_1, HHI_VPU_CLK_CNTL, 24),
+   MESON_GATE(CLKID_VAPB_0, HHI_VAPBCLK_CNTL, 8),
+   MESON_GATE(CLKID_VAPB_1, HHI_VAPBCLK_CNTL, 24),
+   MESON_GATE(CLKID_VAPB, HHI_VAPBCLK_CNTL, 30),
 };
 
-static int meson_set_gate(struct clk *clk, bool on)
+static int meson_set_gate_by_id(struct clk *clk, unsigned long id, bool on)
 {
struct meson_clk *priv = dev_get_priv(clk->dev);
struct meson_gate *gate;
 
-   if (clk->id >= ARRAY_SIZE(gates))
+   debug("%s: %sabling %ld\n", __func__, on ? "en" : "dis", id);
+
+   /* Propagate through muxes */
+   switch (id) {
+   case CLKID_VPU:
+   return meson_set_gate_by_id(clk,
+   meson_mux_get_parent(clk, CLKID_VPU), on);
+   case CLKID_VAPB_SEL:
+   return meson_set_gate_by_id(clk,
+   meson_mux_get_parent(clk, CLKID_VAPB_SEL), on);
+   }
+
+   if (id >= ARRAY_SIZE(gates))
return -ENOENT;
 
-   gate = &gates[clk->id];
+   gate = &gates[id];
 
if (gate->reg == 0)
return 0;
 
+   debug("%s: really %sabling %ld\n", __func__, on ? "en" : "dis", id

Re: [U-Boot] [PATCH v4 01/13] test: regmap: Increase size of syscon0 memory

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:06 +0200
Mario Six mario@gdsys.cc wrote:

> The upcoming changes to the regmap interface will contain a proper check
> for plausibility when reading/writing from/to a register map. To still
> have the current tests pass, increase the size of the memory region for
> the syscon0 device, since one of the tests reads and writes beyond this
> range.
> 
> Reviewed-by: Anatolij Gustschin 
> Reviewed-by: Simon Glass 
> Signed-off-by: Mario Six 
> 
> ---
> 
> v3 -> v4:
> No changes
> 
> v2 -> v3:
> New in v3
> 
> ---
>  arch/sandbox/dts/test.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

--
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[U-Boot] [PATCH] EMDK: Enable bootelf

[Alexey Brodkin]

Signed-off-by: Alexey Brodkin 
---
 configs/emdk_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/configs/emdk_defconfig b/configs/emdk_defconfig
index e3bccd234fcd..f283a9c9b3c6 100644
--- a/configs/emdk_defconfig
+++ b/configs/emdk_defconfig
@@ -10,7 +10,6 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="emdk# "
 # CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
-- 
2.17.1

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Re: [U-Boot] [PATCH v4 02/13] regmap: Fix documentation

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:07 +0200
Mario Six mario@gdsys.cc wrote:

> The documentation in regmap.h is not in kernel-doc format. Correct this.
> 
> Reviewed-by: Anatolij Gustschin 
> Reviewed-by: Simon Glass 
> Signed-off-by: Mario Six 
> 
> ---
> 
> v3 -> v4:
> No changes
> 
> v2 -> v3:
> New in v3
> 
> ---
>  include/regmap.h | 48 +++-
>  1 file changed, 39 insertions(+), 9 deletions(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH v4 03/13] regmap: Add documentation

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:08 +0200
Mario Six mario@gdsys.cc wrote:

> Document the regmap_alloc() function.
> 
> Reviewed-by: Anatolij Gustschin 
> Reviewed-by: Simon Glass 
> Signed-off-by: Mario Six 
> 
> ---
> 
> v3 -> v4:
> No changes
> 
> v2 -> v3:
> New in v3
> 
> ---
>  drivers/core/regmap.c | 6 ++
>  1 file changed, 6 insertions(+)

Applied to u-boot-staging/ag...@denx.de, thanks!

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[U-Boot] [PATCH] arm: socfpga: make socfpga_socrates_defconfig boot from QSPI

[Simon Goldschmidt]

This fixes the board's dts to supply SPL with QSPI info.

The EBV Socrates board has DIP switches to boot from SD card or
QSPI, so let's fix its defconfig to work for both cases.

Signed-off-by: Simon Goldschmidt 

---

 arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts 
b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index 0d452ae300..46d7eabdc8 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -63,6 +63,7 @@
 
 &qspi {
status = "okay";
+   u-boot,dm-pre-reloc;
 
flash0: n25q00@0 {
#address-cells = <1>;
@@ -77,6 +78,7 @@
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
+   u-boot,dm-pre-reloc;
};
 };
 
-- 
2.17.1

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Re: [U-Boot] [PATCH v4 04/13] regmap: Improve error handling

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:09 +0200
Mario Six mario@gdsys.cc wrote:

> ofnode_read_simple_addr_cells may fail and return a negative error code.
> Check for this when initializing regmaps.
> 
> Also check if both_len is zero, since this is perfectly possible, and
> would lead to a division-by-zero further down the line.
> 
> Reviewed-by: Anatolij Gustschin 
> Reviewed-by: Simon Glass 
> Signed-off-by: Mario Six 
> 
> ---
> 
> v3 -> v4:
> No changes
> 
> v2 -> v3:
> New in v3
> 
> ---
>  drivers/core/regmap.c | 17 +
>  1 file changed, 17 insertions(+)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH v4 05/13] regmap: Introduce init_range

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:10 +0200
Mario Six mario@gdsys.cc wrote:

> Both fdtdec_get_addr_size_fixed and of_address_to_resource can fail with
> an error, which is not currently checked during regmap initialization.
> 
> Since the indentation depth is already quite deep, extract a new
> 'init_range' method to do the initialization.
> 
> Reviewed-by: Anatolij Gustschin 
> Reviewed-by: Simon Glass 
> Signed-off-by: Mario Six 
> 
> ---
> 
> v3 -> v4:
> * Introduced else clause in of_live_active() if statement to make the
>   distinction between live and non-live cases clearer
> 
> v2 -> v3:
> New in v3
> 
> ---
>  drivers/core/regmap.c | 68 
> ++-
>  1 file changed, 56 insertions(+), 12 deletions(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH v4 06/13] regmap: Add error output

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:11 +0200
Mario Six mario@gdsys.cc wrote:

> Add some debug output in cases where the initialization of a regmap
> fails.
> 
> Reviewed-by: Anatolij Gustschin 
> Reviewed-by: Simon Glass 
> Signed-off-by: Mario Six 
> 
> ---
> 
> v3 -> v4:
> No changes
> 
> v2 -> v3:
> New in v3
> 
> ---
>  drivers/core/regmap.c | 10 --
>  1 file changed, 8 insertions(+), 2 deletions(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH v4 07/13] regmap: Add raw read/write functions

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:12 +0200
Mario Six mario@gdsys.cc wrote:

> The regmap functions currently assume that all register map accesses
> have a data width of 32 bits, but there are maps that have different
> widths.
> 
> To rectify this, implement the regmap_raw_read and regmap_raw_write
> functions from the Linux kernel API that specify the width of a desired
> read or write operation on a regmap.
> 
> Implement the regmap_read and regmap_write functions using these raw
> functions in a backwards-compatible manner.
> 
> Reviewed-by: Anatolij Gustschin 
> Signed-off-by: Mario Six 
> 
> ---
> 
> v3 -> v4:
> * Switched 'ranges[0] + offset' to 'ranges[0].start + offset'
> * Explained the difference between the raw and non-raw read/write
>   functions better in the docs
> 
> v2 -> v3:
> * Implement the "raw" functions from Linux instead of adding a size
>   parameter to the regmap_{read,write} functions
> * Fixed style violation
> * Improved error handling
> 
> v1 -> v2:
> New in v2
> 
> ---
>  drivers/core/regmap.c | 54 ++---
>  include/regmap.h  | 56 
> +++
>  2 files changed, 103 insertions(+), 7 deletions(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH v4 08/13] regmap: Support reading from specific range

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:13 +0200
Mario Six mario@gdsys.cc wrote:
...
> ---
>  drivers/core/regmap.c | 49 -
>  include/regmap.h  | 31 +++
>  2 files changed, 75 insertions(+), 5 deletions(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH v4 08/13] regmap: Support reading from specific range

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:13 +0200
Mario Six mario@gdsys.cc wrote:
...
> ---
>  drivers/core/regmap.c | 49 -
>  include/regmap.h  | 31 +++
>  2 files changed, 75 insertions(+), 5 deletions(-)

Applied to u-boot-staging/ag...@denx.de, thanks!

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Re: [U-Boot] [PATCH 1/5] arm: socfpga: fix SPL on gen5 after moving to DM serial

[Marek Vasut]

On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> There were some NULL pointers dereferenced because DM was used
> too early without correct initialization.

This needs better explanation, really.

> This fixes commit 73172753f4f3 ("ARM: socfpga: Convert to DM serial")
> 
> Signed-off-by: Simon Goldschmidt 
> ---
> 
>  arch/arm/mach-socfpga/spl_gen5.c | 10 +++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/spl_gen5.c 
> b/arch/arm/mach-socfpga/spl_gen5.c
> index d6fe7d35af..0d5526656d 100644
> --- a/arch/arm/mach-socfpga/spl_gen5.c
> +++ b/arch/arm/mach-socfpga/spl_gen5.c
> @@ -86,6 +86,7 @@ void board_init_f(ulong dummy)
>   const struct cm_config *cm_default_cfg = cm_get_default_config();
>   unsigned long sdram_size;
>   unsigned long reg;
> + int ret;
>  
>   /*
>* First C code to run. Clear fake OCRAM ECC first as SBE
> @@ -152,6 +153,12 @@ void board_init_f(ulong dummy)
>   /* unfreeze / thaw all IO banks */
>   sys_mgr_frzctrl_thaw_req();
>  
> + ret = spl_early_init();
> + if (ret) {
> + debug("spl_early_init() failed: %d\n", ret);
> + hang();
> + }
> +
>   /* enable console uart printing */
>   preloader_console_init();
>  
> @@ -177,7 +184,4 @@ void board_init_f(ulong dummy)
>   }
>  
>   socfpga_bridges_reset(1);
> -
> - /* Configure simple malloc base pointer into RAM. */
> - gd->malloc_base = CONFIG_SYS_TEXT_BASE + (1024 * 1024);
>  }
> 


-- 
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Re: [U-Boot] [PATCH 3/5] arm: socfpga: cyclone5: handle debug uart

[Marek Vasut]

On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> If CONFIG_DEBUG_UART is enabled, correctly initialize
> the debug uart before console is initialized to debug
> early boot problems in SPL.
> 
> This also changes a printf in reset_manager_gen5 to
> a debug to prevent calling into debug uart before it
> is initialized.
> 
> Signed-off-by: Simon Goldschmidt 
> ---
> 
>  arch/arm/mach-socfpga/reset_manager_gen5.c | 5 +++--
>  arch/arm/mach-socfpga/spl_gen5.c   | 6 ++
>  2 files changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c 
> b/arch/arm/mach-socfpga/reset_manager_gen5.c
> index 25baef79bc..3dfa09b742 100644
> --- a/arch/arm/mach-socfpga/reset_manager_gen5.c
> +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
> @@ -89,8 +89,9 @@ void socfpga_bridges_reset(int enable)
>   /* Check signal from FPGA. */
>   if (!fpgamgr_test_fpga_ready()) {
>   /* FPGA not ready, do nothing. We allow system to boot
> -  * without FPGA ready. So, return 0 instead of error. */
> - printf("%s: FPGA not ready, aborting.\n", __func__);
> +  * without FPGA ready.
> +  */
> + debug("%s: FPGA not ready, aborting.\n", __func__);

This seems to be papering over some sort of problem with the debug UART.
I'd like to keep the print here, since it's a valid error, not a debug
print.

>   return;
>   }
>  
> diff --git a/arch/arm/mach-socfpga/spl_gen5.c 
> b/arch/arm/mach-socfpga/spl_gen5.c
> index 0d5526656d..0e685f6ee5 100644
> --- a/arch/arm/mach-socfpga/spl_gen5.c
> +++ b/arch/arm/mach-socfpga/spl_gen5.c
> @@ -20,6 +20,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -153,6 +154,11 @@ void board_init_f(ulong dummy)
>   /* unfreeze / thaw all IO banks */
>   sys_mgr_frzctrl_thaw_req();
>  
> +#ifdef CONFIG_DEBUG_UART
> + socfpga_per_reset(SOCFPGA_RESET(UART0), 0);
> + debug_uart_init();
> +#endif
> +
>   ret = spl_early_init();
>   if (ret) {
>   debug("spl_early_init() failed: %d\n", ret);
> 


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Re: [U-Boot] [PATCH] arm: socfpga: make socfpga_socrates_defconfig boot from QSPI

[Marek Vasut]

On 08/06/2018 03:05 PM, Simon Goldschmidt wrote:
> This fixes the board's dts to supply SPL with QSPI info.
> 
> The EBV Socrates board has DIP switches to boot from SD card or
> QSPI, so let's fix its defconfig to work for both cases.
> 
> Signed-off-by: Simon Goldschmidt 
> 
> ---
> 
>  arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts 
> b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> index 0d452ae300..46d7eabdc8 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> @@ -63,6 +63,7 @@
>  
>  &qspi {
>   status = "okay";
> + u-boot,dm-pre-reloc;
>  
>   flash0: n25q00@0 {
>   #address-cells = <1>;
> @@ -77,6 +78,7 @@
>   cdns,tsd2d-ns = <50>;
>   cdns,tchsh-ns = <4>;
>   cdns,tslch-ns = <4>;
> + u-boot,dm-pre-reloc;
>   };
>  };
>  
> 
But the SoCrates boots from SDMMC :-)

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Re: [U-Boot] [PATCH 2/5] arm: socfpga: fix device trees to work with DM serial

[Marek Vasut]

On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> Device trees need to have the serial console device available
> before relocation and require a stdout-path in chosen at least
> for SPL to have a console.
> 
> Signed-off-by: Simon Goldschmidt 

This should be upstreamed to Linux too ?

> ---
> 
>  arch/arm/dts/socfpga.dtsi  | 1 +
>  arch/arm/dts/socfpga_arria5_socdk.dts  | 1 +
>  arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts | 1 +
>  arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 1 +
>  arch/arm/dts/socfpga_cyclone5_de10_nano.dts| 1 +
>  arch/arm/dts/socfpga_cyclone5_de1_soc.dts  | 1 +
>  arch/arm/dts/socfpga_cyclone5_is1.dts  | 1 +
>  arch/arm/dts/socfpga_cyclone5_socdk.dts| 1 +
>  arch/arm/dts/socfpga_cyclone5_sockit.dts   | 1 +
>  arch/arm/dts/socfpga_cyclone5_socrates.dts | 6 ++
>  arch/arm/dts/socfpga_cyclone5_sr1500.dts   | 1 +
>  arch/arm/dts/socfpga_cyclone5_vining_fpga.dts  | 1 +
>  12 files changed, 17 insertions(+)
> 
> diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> index 314449478d..0e5445cd1b 100644
> --- a/arch/arm/dts/socfpga.dtsi
> +++ b/arch/arm/dts/socfpga.dtsi
> @@ -738,6 +738,7 @@
>   reg-io-width = <4>;
>   clocks = <&l4_sp_clk>;
>   clock-frequency = <1>;
> + u-boot,dm-pre-reloc;
>   };
>  
>   uart1: serial1@ffc03000 {
> diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts 
> b/arch/arm/dts/socfpga_arria5_socdk.dts
> index 449ba9cbb9..128f0c9762 100644
> --- a/arch/arm/dts/socfpga_arria5_socdk.dts
> +++ b/arch/arm/dts/socfpga_arria5_socdk.dts
> @@ -11,6 +11,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   memory {
> diff --git a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts 
> b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> index aeb327dd5b..8e01a27320 100644
> --- a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> @@ -11,6 +11,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   aliases {
> diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts 
> b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> index f4a98e4bb0..16b86ce631 100644
> --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> @@ -11,6 +11,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   aliases {
> diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts 
> b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> index 7da2d8b043..9d40ce912e 100644
> --- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> @@ -13,6 +13,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   aliases {
> diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts 
> b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> index e6fadb4fc9..d7dd809162 100644
> --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> @@ -11,6 +11,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   aliases {
> diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts 
> b/arch/arm/dts/socfpga_cyclone5_is1.dts
> index aa1ce2c3e2..e6306fb285 100644
> --- a/arch/arm/dts/socfpga_cyclone5_is1.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
> @@ -11,6 +11,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   memory {
> diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts 
> b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> index 55c70abb02..b24c39e1a3 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> @@ -11,6 +11,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   memory {
> diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts 
> b/arch/arm/dts/socfpga_cyclone5_sockit.dts
> index 08d8356d80..734e682ed2 100644
> --- a/arch/arm/dts/socfpga_cyclone5_sockit.dts
> +++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts
> @@ -11,6 +11,7 @@
>  
>   chosen {
>   bootargs = "console=ttyS0,115200";
> + stdout-path = "serial0:115200n8";
>   };
>  
>   aliases {
> diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts 
> b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> index 0d452ae300..7f9b48a839 100644
> --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> +++ b/arch/a

Re: [U-Boot] [PATCH 5/5] malloc_simple: calloc: don't call memset if malloc failed

[Marek Vasut]

On 08/05/2018 09:35 PM, Simon Goldschmidt wrote:
> malloc_simple() can return 0 if out of memory. Don't call memset
> from calloc() in this case but rely on the caller checking
> the return value.
> 
> Signed-off-by: Simon Goldschmidt 
> ---
> 
>  common/malloc_simple.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/common/malloc_simple.c b/common/malloc_simple.c
> index c14f8b59c1..871b5444bd 100644
> --- a/common/malloc_simple.c
> +++ b/common/malloc_simple.c
> @@ -57,7 +57,8 @@ void *calloc(size_t nmemb, size_t elem_size)
>   void *ptr;
>  
>   ptr = malloc(size);
> - memset(ptr, '\0', size);
> + if (ptr)
> + memset(ptr, '\0', size);
>  
>   return ptr;
>  }
> 
Reviewed-by: Marek Vasut 

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Re: [U-Boot] [PATCH 3/3] Remove includes and PRI* usages in printf() entirely

[Andy Shevchenko]

On Mon, Aug 6, 2018 at 2:47 PM, Masahiro Yamada
 wrote:

> The use of PRI* makes the code super-ugly.  You can simply use
> "l" for printing uintptr_t, "ll" for u64, and no modifier for u32.

This is not always the case. I dunno what exact usage of PRIx in
U-Boot, but this is correct way for some size-variable types.
So, if U-Boot is known of not using something like off_t, then we are fine.
In any case the commit message should better justify this part (PRIu64
is specified in standard).

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Andy Shevchenko
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Re: [U-Boot] [PATCH 4/5] board_init.c: fix simple malloc by storing malloc_limit

[Marek Vasut]

On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> board_init_f_init_reserve() sets gd->malloc_base but does
> not set gd->malloc_limit. This results in malloc_simple()
> failing, so let's set this here.
> 
> Signed-off-by: Simon Goldschmidt 
> ---
> 
>  common/init/board_init.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/common/init/board_init.c b/common/init/board_init.c
> index 526fee35ff..a9b21a7111 100644
> --- a/common/init/board_init.c
> +++ b/common/init/board_init.c
> @@ -123,6 +123,7 @@ void board_init_f_init_reserve(ulong base)
>  #if CONFIG_VAL(SYS_MALLOC_F_LEN)
>   /* go down one 'early malloc arena' */
>   gd->malloc_base = base;
> + gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);
>   /* next alloc will be higher by one 'early malloc arena' size */
>   base += CONFIG_VAL(SYS_MALLOC_F_LEN);
>  #endif

+CC Simon, I'd like at least one A-B/R-B on this since this is quite
intrusive change.

This should be a separate patch from this series too.

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Re: [U-Boot] [PATCHv2 2/2] Convert all of CONFIG_CONS_INDEX to Kconfig

[Adam Ford]

On Tue, Mar 6, 2018 at 6:02 PM Tom Rini  wrote:
>
> This converts the following to Kconfig:
>CONFIG_CONS_INDEX
>
> We have existing entries for this option in a number of places, with
> different guards on them.  They're also sometimes used for things not
> directly inside of the serial driver.  First, introduce a new symbol to
> guard the use of CONFIG_CONS_INDEX, so that in the case where we don't
> need this for the serial driver, but for some other use, we can still do
> it.  Next, consolidate all of these into the single entry in
> drivers/serial/Kconfig.  Finally, introduce CONS_INDEX_[023456] so that
> we can imply a correct value here to make the defconfig side of this
> smaller.
>

It looks like there are still some left-over usage of CONFIG_SERIALx

Is it safe for me to go through and remove all these CONFIG_SERIALx
references now that we have CONS_INDEX?  If you think so, I'll submit
a patch to remove these and their corresponding whitelist entries.

adam

> Signed-off-by: Adam Ford 
> [trini: Rework a lot of the logic here, such that I took authorship from
> Adam, but kept his S-o-B line]
> Signed-off-by: Tom Rini 
> ---
>  arch/arm/Kconfig   |  2 +
>  arch/arm/include/asm/arch-bcmcygnus/configs.h  |  1 -
>  arch/arm/include/asm/arch-bcmnsp/configs.h |  1 -
>  arch/arm/include/asm/arch-lpc32xx/config.h |  6 ---
>  arch/arm/mach-omap2/Kconfig|  4 ++
>  arch/arm/mach-sunxi/Kconfig|  3 ++
>  board/birdland/bav335x/Kconfig | 10 -
>  board/eets/pdu001/Kconfig  | 16 
>  board/hisilicon/hikey/Kconfig  |  7 
>  board/tcl/sl50/Kconfig | 10 -
>  board/ti/am335x/Kconfig| 10 -
>  board/ti/am57xx/Kconfig|  9 
>  board/ti/dra7xx/Kconfig|  9 
>  board/vscom/baltos/Kconfig |  9 
>  configs/A10s-OLinuXino-M_defconfig |  1 +
>  configs/A13-OLinuXinoM_defconfig   |  1 +
>  configs/A13-OLinuXino_defconfig|  1 +
>  configs/A33-OLinuXino_defconfig|  1 -
>  configs/Ampe_A76_defconfig |  1 +
>  configs/Auxtek-T003_defconfig  |  1 +
>  configs/Auxtek-T004_defconfig  |  1 +
>  configs/Bananapi_m2m_defconfig |  1 -
>  configs/CHIP_defconfig |  1 +
>  configs/CHIP_pro_defconfig |  1 +
>  configs/Empire_electronix_d709_defconfig   |  1 +
>  configs/Empire_electronix_m712_defconfig   |  1 +
>  configs/MPC8541CDS_defconfig   |  1 +
>  configs/MPC8541CDS_legacy_defconfig|  1 +
>  configs/MPC8548CDS_36BIT_defconfig |  1 +
>  configs/MPC8548CDS_defconfig   |  1 +
>  configs/MPC8548CDS_legacy_defconfig|  1 +
>  configs/MPC8555CDS_defconfig   |  1 +
>  configs/MPC8555CDS_legacy_defconfig|  1 +
>  configs/Nintendo_NES_Classic_Edition_defconfig |  1 +
>  configs/Sinlinx_SinA33_defconfig   |  1 -
>  configs/UTOO_P66_defconfig |  1 +
>  configs/Wobo_i5_defconfig  |  1 +
>  configs/am335x_pdu001_defconfig|  1 +
>  configs/am3517_crane_defconfig |  1 +
>  configs/am3517_evm_defconfig   |  1 +
>  configs/apx4devkit_defconfig   |  1 +
>  configs/bcm911360_entphn-ns_defconfig  |  1 +
>  configs/bcm911360_entphn_defconfig |  1 +
>  configs/bcm911360k_defconfig   |  1 +
>  configs/bcm958300k-ns_defconfig|  1 +
>  configs/bcm958300k_defconfig   |  1 +
>  configs/bcm958305k_defconfig   |  1 +
>  configs/bcm958712k_defconfig   |  1 +
>  configs/bg0900_defconfig   |  1 +
>  configs/cairo_defconfig|  1 +
>  configs/cl-som-am57x_defconfig |  1 +
>  configs/cm_t3517_defconfig |  1 +
>  configs/cm_t35_defconfig   |  1 +
>  configs/cm_t54_defconfig   |  1 +
>  .../controlcenterd_36BIT_SDCARD_DEVELOP_defconfig  |  1 +
>  configs/controlcenterd_36BIT_SDCARD_defconfig  |  1 +
>  .../controlcenterd_TRAILBLAZER_DEVELOP_defconfig   |  1 +
>  configs/controlcenterd_TRAILBLAZER_defconfig   |  1 +
>  configs/corvus_defconfig   |  1 -
>  configs/devkit8000_defconfig   |  1 +
>  configs/difrnce_dit4350_defconfig  |  1 +
>  configs/display5_defconfig |  1 -
>  configs/display5_factory

Re: [U-Boot] [PATCH v4 10/13] test: regmap: Add test for regmap_{set, get}

[Anatolij Gustschin]

On Fri,  3 Aug 2018 10:01:15 +0200
Mario Six mario@gdsys.cc wrote:
...
> ---
>  test/dm/regmap.c | 28 
>  1 file changed, 28 insertions(+)

Applied to u-boot-staging/ag...@denx.de, thanks!

--
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Re: [U-Boot] [PATCH 4/5] board_init.c: fix simple malloc by storing malloc_limit

[Simon Goldschmidt]

Marek Vasut  schrieb am Mo., 6. Aug. 2018, 15:19:

> On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> > board_init_f_init_reserve() sets gd->malloc_base but does
> > not set gd->malloc_limit. This results in malloc_simple()
> > failing, so let's set this here.
> >
> > Signed-off-by: Simon Goldschmidt 
> > ---
> >
> >  common/init/board_init.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/common/init/board_init.c b/common/init/board_init.c
> > index 526fee35ff..a9b21a7111 100644
> > --- a/common/init/board_init.c
> > +++ b/common/init/board_init.c
> > @@ -123,6 +123,7 @@ void board_init_f_init_reserve(ulong base)
> >  #if CONFIG_VAL(SYS_MALLOC_F_LEN)
> >   /* go down one 'early malloc arena' */
> >   gd->malloc_base = base;
> > + gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);
> >   /* next alloc will be higher by one 'early malloc arena' size */
> >   base += CONFIG_VAL(SYS_MALLOC_F_LEN);
> >  #endif
>
> +CC Simon, I'd like at least one A-B/R-B on this since this is quite
> intrusive change.
>
> This should be a separate patch from this series too.
>

Ok, after changing board_init_f() for gen5 spl to call spl_early_init(),
this should not be required for me any more. I only wanted to keep others
from running into this.

I don't rally get why this assignment is here though. Maybe it can be
removed? But I guess that's hard to tell for all boards our there...

Simon Goldschmidt
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Re: [U-Boot] [PATCH 3/5] arm: socfpga: cyclone5: handle debug uart

[Simon Goldschmidt]

Marek Vasut  schrieb am Mo., 6. Aug. 2018, 15:19:

> On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> > If CONFIG_DEBUG_UART is enabled, correctly initialize
> > the debug uart before console is initialized to debug
> > early boot problems in SPL.
> >
> > This also changes a printf in reset_manager_gen5 to
> > a debug to prevent calling into debug uart before it
> > is initialized.
> >
> > Signed-off-by: Simon Goldschmidt 
> > ---
> >
> >  arch/arm/mach-socfpga/reset_manager_gen5.c | 5 +++--
> >  arch/arm/mach-socfpga/spl_gen5.c   | 6 ++
> >  2 files changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c
> b/arch/arm/mach-socfpga/reset_manager_gen5.c
> > index 25baef79bc..3dfa09b742 100644
> > --- a/arch/arm/mach-socfpga/reset_manager_gen5.c
> > +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
> > @@ -89,8 +89,9 @@ void socfpga_bridges_reset(int enable)
> >   /* Check signal from FPGA. */
> >   if (!fpgamgr_test_fpga_ready()) {
> >   /* FPGA not ready, do nothing. We allow system to
> boot
> > -  * without FPGA ready. So, return 0 instead of
> error. */
> > - printf("%s: FPGA not ready, aborting.\n",
> __func__);
> > +  * without FPGA ready.
> > +  */
> > + debug("%s: FPGA not ready, aborting.\n", __func__);
>
> This seems to be papering over some sort of problem with the debug UART.
>

You're right, it is papering over ns16550 debut uart staying in a tight
loop when printf is called before the debut uart is initialized.

This might be fixed by keeping & checking the init state of debut uart, but
does a global bool work for this in SPL?

I'd like to keep the print here, since it's a valid error, not a debug
> print.
>

As I see it, it's not a real error: my SPL always goes down this path as
the fpga is never initialized for me.

Note that booting from fpga doesn't work for me. That's a to-do on my
list...

Simon Goldschmidt


> >   return;
> >   }
> >
> > diff --git a/arch/arm/mach-socfpga/spl_gen5.c
> b/arch/arm/mach-socfpga/spl_gen5.c
> > index 0d5526656d..0e685f6ee5 100644
> > --- a/arch/arm/mach-socfpga/spl_gen5.c
> > +++ b/arch/arm/mach-socfpga/spl_gen5.c
> > @@ -20,6 +20,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >
> > @@ -153,6 +154,11 @@ void board_init_f(ulong dummy)
> >   /* unfreeze / thaw all IO banks */
> >   sys_mgr_frzctrl_thaw_req();
> >
> > +#ifdef CONFIG_DEBUG_UART
> > + socfpga_per_reset(SOCFPGA_RESET(UART0), 0);
> > + debug_uart_init();
> > +#endif
> > +
> >   ret = spl_early_init();
> >   if (ret) {
> >   debug("spl_early_init() failed: %d\n", ret);
> >
>
>
> --
> Best regards,
> Marek Vasut
>
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Re: [U-Boot] [PATCH 1/5] arm: socfpga: fix SPL on gen5 after moving to DM serial

[Simon Goldschmidt]

Marek Vasut  schrieb am Mo., 6. Aug. 2018, 15:18:

> On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> > There were some NULL pointers dereferenced because DM was used
> > too early without correct initialization.
>
> This needs better explanation, really.
>

Ok.

> This fixes commit 73172753f4f3 ("ARM: socfpga: Convert to DM serial")
> >
> > Signed-off-by: Simon Goldschmidt 
> > ---
> >
> >  arch/arm/mach-socfpga/spl_gen5.c | 10 +++---
> >  1 file changed, 7 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/spl_gen5.c
> b/arch/arm/mach-socfpga/spl_gen5.c
> > index d6fe7d35af..0d5526656d 100644
> > --- a/arch/arm/mach-socfpga/spl_gen5.c
> > +++ b/arch/arm/mach-socfpga/spl_gen5.c
> > @@ -86,6 +86,7 @@ void board_init_f(ulong dummy)
> >   const struct cm_config *cm_default_cfg = cm_get_default_config();
> >   unsigned long sdram_size;
> >   unsigned long reg;
> > + int ret;
> >
> >   /*
> >* First C code to run. Clear fake OCRAM ECC first as SBE
> > @@ -152,6 +153,12 @@ void board_init_f(ulong dummy)
> >   /* unfreeze / thaw all IO banks */
> >   sys_mgr_frzctrl_thaw_req();
> >
> > + ret = spl_early_init();
> > + if (ret) {
> > + debug("spl_early_init() failed: %d\n", ret);
> > + hang();
> > + }
> > +
> >   /* enable console uart printing */
> >   preloader_console_init();
> >
> > @@ -177,7 +184,4 @@ void board_init_f(ulong dummy)
> >   }
> >
> >   socfpga_bridges_reset(1);
> > -
> > - /* Configure simple malloc base pointer into RAM. */
> > - gd->malloc_base = CONFIG_SYS_TEXT_BASE + (1024 * 1024);
> >  }
> >
>
>
> --
> Best regards,
> Marek Vasut
>
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Re: [U-Boot] [PATCH 2/5] arm: socfpga: fix device trees to work with DM serial

[Simon Goldschmidt]

Marek Vasut  schrieb am Mo., 6. Aug. 2018, 15:19:

> On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> > Device trees need to have the serial console device available
> > before relocation and require a stdout-path in chosen at least
> > for SPL to have a console.
> >
> > Signed-off-by: Simon Goldschmidt 
>
> This should be upstreamed to Linux too ?
>

Hmm, I'm not sure. Does Linux use the stdout-path too? I always use
bootargs only...


> > ---
> >
> >  arch/arm/dts/socfpga.dtsi  | 1 +
> >  arch/arm/dts/socfpga_arria5_socdk.dts  | 1 +
> >  arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts | 1 +
> >  arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 1 +
> >  arch/arm/dts/socfpga_cyclone5_de10_nano.dts| 1 +
> >  arch/arm/dts/socfpga_cyclone5_de1_soc.dts  | 1 +
> >  arch/arm/dts/socfpga_cyclone5_is1.dts  | 1 +
> >  arch/arm/dts/socfpga_cyclone5_socdk.dts| 1 +
> >  arch/arm/dts/socfpga_cyclone5_sockit.dts   | 1 +
> >  arch/arm/dts/socfpga_cyclone5_socrates.dts | 6 ++
> >  arch/arm/dts/socfpga_cyclone5_sr1500.dts   | 1 +
> >  arch/arm/dts/socfpga_cyclone5_vining_fpga.dts  | 1 +
> >  12 files changed, 17 insertions(+)
> >
> > diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> > index 314449478d..0e5445cd1b 100644
> > --- a/arch/arm/dts/socfpga.dtsi
> > +++ b/arch/arm/dts/socfpga.dtsi
> > @@ -738,6 +738,7 @@
> >   reg-io-width = <4>;
> >   clocks = <&l4_sp_clk>;
> >   clock-frequency = <1>;
> > + u-boot,dm-pre-reloc;
> >   };
> >
> >   uart1: serial1@ffc03000 {
> > diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts
> b/arch/arm/dts/socfpga_arria5_socdk.dts
> > index 449ba9cbb9..128f0c9762 100644
> > --- a/arch/arm/dts/socfpga_arria5_socdk.dts
> > +++ b/arch/arm/dts/socfpga_arria5_socdk.dts
> > @@ -11,6 +11,7 @@
> >
> >   chosen {
> >   bootargs = "console=ttyS0,115200";
> > + stdout-path = "serial0:115200n8";
> >   };
> >
> >   memory {
> > diff --git a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> > index aeb327dd5b..8e01a27320 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> > @@ -11,6 +11,7 @@
> >
> >   chosen {
> >   bootargs = "console=ttyS0,115200";
> > + stdout-path = "serial0:115200n8";
> >   };
> >
> >   aliases {
> > diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > index f4a98e4bb0..16b86ce631 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > @@ -11,6 +11,7 @@
> >
> >   chosen {
> >   bootargs = "console=ttyS0,115200";
> > + stdout-path = "serial0:115200n8";
> >   };
> >
> >   aliases {
> > diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> > index 7da2d8b043..9d40ce912e 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> > @@ -13,6 +13,7 @@
> >
> >   chosen {
> >   bootargs = "console=ttyS0,115200";
> > + stdout-path = "serial0:115200n8";
> >   };
> >
> >   aliases {
> > diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> > index e6fadb4fc9..d7dd809162 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> > @@ -11,6 +11,7 @@
> >
> >   chosen {
> >   bootargs = "console=ttyS0,115200";
> > + stdout-path = "serial0:115200n8";
> >   };
> >
> >   aliases {
> > diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts
> b/arch/arm/dts/socfpga_cyclone5_is1.dts
> > index aa1ce2c3e2..e6306fb285 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_is1.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
> > @@ -11,6 +11,7 @@
> >
> >   chosen {
> >   bootargs = "console=ttyS0,115200";
> > + stdout-path = "serial0:115200n8";
> >   };
> >
> >   memory {
> > diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts
> b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> > index 55c70abb02..b24c39e1a3 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
> > @@ -11,6 +11,7 @@
> >
> >   chosen {
> >   bootargs = "console=ttyS0,115200";
> > + stdout-path = "serial0:115200n8";
> >   };
> >
> >   memory {
> > diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts
> b/arch/arm/dts/socfpga_cyclone5_sockit.dts
> > index 08d8356d80..734e682ed2 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_sockit.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts
> > @@ -11,6 +11,7 @@
> >
> >   ch

Re: [U-Boot] [PATCH] arm: socfpga: make socfpga_socrates_defconfig boot from QSPI

[Simon Goldschmidt]

Marek Vasut  schrieb am Mo., 6. Aug. 2018, 15:19:

> On 08/06/2018 03:05 PM, Simon Goldschmidt wrote:
> > This fixes the board's dts to supply SPL with QSPI info.
> >
> > The EBV Socrates board has DIP switches to boot from SD card or
> > QSPI, so let's fix its defconfig to work for both cases.
> >
> > Signed-off-by: Simon Goldschmidt 
> >
> > ---
> >
> >  arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > index 0d452ae300..46d7eabdc8 100644
> > --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
> > @@ -63,6 +63,7 @@
> >
> >  &qspi {
> >   status = "okay";
> > + u-boot,dm-pre-reloc;
> >
> >   flash0: n25q00@0 {
> >   #address-cells = <1>;
> > @@ -77,6 +78,7 @@
> >   cdns,tsd2d-ns = <50>;
> >   cdns,tchsh-ns = <4>;
> >   cdns,tslch-ns = <4>;
> > + u-boot,dm-pre-reloc;
> >   };
> >  };
> >
> >
> But the SoCrates boots from SDMMC :-)
>

Yours might :-)

As written above, the board has an 8 digit dip switch to control both hps
and fpga boot sources. And I use this board to verify that mainline U-Boot
(without our private board configs, which boot from qspi) works on the
architecture.

Simon Goldschmidt
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[U-Boot] [PATCH v5 11/13] misc: Sort Makefile entries

[Anatolij Gustschin]

From: Mario Six 

Makefile entries should be sorted.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 
Signed-off-by: Anatolij Gustschin 
---
v4 -> v5:
Drop re-ordered entries that are not in mainline
(e.g. CONFIG_GDSYS_IOEP, CONFIG_MPC83XX_SERDES, misc_sandbox.o)

v3 -> v4:
No changes

v2 -> v3:
New in v3

 drivers/misc/Makefile | 56 +++
 1 file changed, 30 insertions(+), 26 deletions(-)

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 4ce9d213f0..677a230ab4 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -4,11 +4,7 @@
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
 
 obj-$(CONFIG_MISC) += misc-uclass.o
-obj-$(CONFIG_ALI152X) += ali512x.o
-obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
-obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
-obj-$(CONFIG_DS4510)  += ds4510.o
-obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
+
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_CROS_EC) += cros_ec.o
 obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
@@ -16,41 +12,49 @@ obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
 obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 endif
-obj-$(CONFIG_FSL_IIM) += fsl_iim.o
-obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
-obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
-obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
-obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
-obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
-obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
-obj-$(CONFIG_NS87308) += ns87308.o
-obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
+
 ifdef CONFIG_DM_I2C
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
 endif
 endif
-obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
-obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
-obj-$(CONFIG_LED_STATUS) += status_led.o
-obj-$(CONFIG_SANDBOX) += swap_case.o
+
 ifdef CONFIG_SPL_OF_PLATDATA
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SANDBOX) += spltest_sandbox.o
 endif
 endif
-obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
-obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
-obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
-obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
+
+obj-$(CONFIG_ALI152X) += ali512x.o
+obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
+obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
+obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
+obj-$(CONFIG_DS4510)  += ds4510.o
+obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
+obj-$(CONFIG_FSL_IIM) += fsl_iim.o
+obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
+obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_LED_STATUS) += status_led.o
+obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
+obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
+obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
+obj-$(CONFIG_NS87308) += ns87308.o
+obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
 obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
-obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
-obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
+obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
-obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
+obj-$(CONFIG_SANDBOX) += swap_case.o
+obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
+obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
+obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
 obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o
+obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
 obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
-obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
+obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
+obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
+obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
-- 
2.14.1

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Re: [U-Boot] [PATCH v4 11/13] misc: Sort Makefile entries

[Anatolij Gustschin]

Hi Mario,

On Fri,  3 Aug 2018 10:01:16 +0200
Mario Six mario@gdsys.cc wrote:
...
> ---
>  drivers/misc/Makefile | 60 
> +++
>  1 file changed, 32 insertions(+), 28 deletions(-)

this one doesn't apply on git/master, I've sent rebased patch v5.

--
Anatolij
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[U-Boot] [PATCH] sf: Add XMC xm25qh64a and xm25qh128a entries

[Stefan Roese]

This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
Manufacturing Corp) SPI NOR chips.

This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
option.

Signed-off-by: Stefan Roese 
Cc: Jagan Teki 
---
 drivers/mtd/spi/Kconfig | 6 ++
 drivers/mtd/spi/spi_flash_ids.c | 4 
 2 files changed, 10 insertions(+)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 5738cd66e8..a76154232a 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -100,6 +100,12 @@ config SPI_FLASH_WINBOND
help
  Add support for various Winbond SPI flash chips (W25xxx)
 
+config SPI_FLASH_XMC
+   bool "XMC SPI flash support"
+   help
+ Add support for various XMC (Wuhan Xinxin Semiconductor
+ Manufacturing Corp.) SPI flash chips (XM25xxx)
+
 endif
 
 config SPI_FLASH_USE_4K_SECTORS
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index e662e4b42e..ad0a0c8150 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -188,6 +188,10 @@ const struct spi_flash_info spi_flash_ids[] = {
{"w25q128jv",  INFO(0xef7018, 0x0,  64 * 1024,   256, RD_FULL | 
WR_QPP | SECT_4K) },
{"w25q256fw",  INFO(0xef6019, 0x0,  64 * 1024,   512, RD_FULL | 
WR_QPP | SECT_4K) },
{"w25q256jw",  INFO(0xef7019, 0x0,  64 * 1024,   512, RD_FULL | 
WR_QPP | SECT_4K) },
+#endif
+#ifdef CONFIG_SPI_FLASH_XMC /* Wuhan Xinxin Semiconductor Manufacturing Corp */
+   { "xm25qh64a", INFO(0x207017, 0x0, 64 * 1024,128, SECT_4K | 
RD_DUAL | RD_QUAD) },
+   { "xm25qh128a",INFO(0x207018, 0x0, 64 * 1024,256, SECT_4K | 
RD_DUAL | RD_QUAD) },
 #endif
{}, /* Empty entry to terminate the list */
/*
-- 
2.18.0

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[U-Boot] [PATCH] sf: Add SPI_FLASH_4BYTE_MODE_ONLY option to support 4-byte mode

[Stefan Roese]

Some SPI NOR chips only support 4-byte mode addressing. Here the default
3-byte mode does not work and leads to incorrect accesses. Setting this
option enables the use of such SPI NOR chips, that only support this
4-byte mode.

This was noticed on the LinkIt Smart 7688 modul, which is equipped with
an Macronix MX25L25635F device. But this device does *NOT* support
switching to 3-byte mode via the EX4B command.

Signed-off-by: Stefan Roese 
Cc: Jagan Teki 
---
 drivers/mtd/spi/Kconfig   | 9 +
 drivers/mtd/spi/sf_internal.h | 5 +
 drivers/mtd/spi/spi_flash.c   | 7 +++
 3 files changed, 21 insertions(+)

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 4484cf8195..5738cd66e8 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -49,6 +49,15 @@ config SF_DUAL_FLASH
  Enable this option to support two flash memories connected to a single
  controller. Currently Xilinx Zynq qspi supports this.
 
+config SPI_FLASH_4BYTE_MODE_ONLY
+   bool "SPI 4-byte mode only supported"
+   depends on SPI_FLASH
+   help
+ Some SPI NOR chips only support 4-byte mode addressing. Here
+ the default 3-byte mode does not work and leads to incorrect
+ accesses. Setting this option enables the use of such SPI
+ NOR chips, that only support this 4-byte mode.
+
 if SPI_FLASH
 
 config SPI_FLASH_ATMEL
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 4f63cacc64..78be6e442f 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -26,7 +26,12 @@ enum spi_nor_option_flags {
 };
 
 #define SPI_FLASH_3B_ADDR_LEN  3
+#define SPI_FLASH_4B_ADDR_LEN  4
+#ifdef CONFIG_SPI_FLASH_4BYTE_MODE_ONLY
+#define SPI_FLASH_CMD_LEN  (1 + SPI_FLASH_4B_ADDR_LEN)
+#else
 #define SPI_FLASH_CMD_LEN  (1 + SPI_FLASH_3B_ADDR_LEN)
+#endif
 #define SPI_FLASH_16MB_BOUN0x100
 
 /* CFI Manufacture ID's */
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index c159124259..3b26d8ca88 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -23,9 +23,16 @@
 static void spi_flash_addr(u32 addr, u8 *cmd)
 {
/* cmd[0] is actual command */
+#ifdef CONFIG_SPI_FLASH_4BYTE_MODE_ONLY
+   cmd[1] = addr >> 24;
+   cmd[2] = addr >> 16;
+   cmd[3] = addr >> 8;
+   cmd[4] = addr >> 0;
+#else
cmd[1] = addr >> 16;
cmd[2] = addr >> 8;
cmd[3] = addr >> 0;
+#endif
 }
 
 static int read_sr(struct spi_flash *flash, u8 *rs)
-- 
2.18.0

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Re: [U-Boot] [PATCH 2/5] arm: socfpga: fix device trees to work with DM serial

[Simon Goldschmidt]

Emmanuel Vadot  schrieb am Mo., 6. Aug. 2018, 15:48:

> On Mon, 6 Aug 2018 15:42:01 +0200
> Simon Goldschmidt  wrote:
>
> > Marek Vasut  schrieb am Mo., 6. Aug. 2018, 15:19:
> >
> > > On 08/05/2018 09:34 PM, Simon Goldschmidt wrote:
> > > > Device trees need to have the serial console device available
> > > > before relocation and require a stdout-path in chosen at least
> > > > for SPL to have a console.
> > > >
> > > > Signed-off-by: Simon Goldschmidt 
> > >
> > > This should be upstreamed to Linux too ?
> > >
> >
> > Hmm, I'm not sure. Does Linux use the stdout-path too? I always use
> > bootargs only...
>
>  Linux is the standard repo where other project (like FreeBSD) pull the
> DTS and stdout-path is standard, so it should be upstreamed.
>

Ok then, I can upstream them. How is the workflow, via which repository or
list so socfpga device trees get pushed?

Simon


> >
> > > > ---
> > > >
> > > >  arch/arm/dts/socfpga.dtsi  | 1 +
> > > >  arch/arm/dts/socfpga_arria5_socdk.dts  | 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts | 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_de10_nano.dts| 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_de1_soc.dts  | 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_is1.dts  | 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_socdk.dts| 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_sockit.dts   | 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_socrates.dts | 6 ++
> > > >  arch/arm/dts/socfpga_cyclone5_sr1500.dts   | 1 +
> > > >  arch/arm/dts/socfpga_cyclone5_vining_fpga.dts  | 1 +
> > > >  12 files changed, 17 insertions(+)
> > > >
> > > > diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> > > > index 314449478d..0e5445cd1b 100644
> > > > --- a/arch/arm/dts/socfpga.dtsi
> > > > +++ b/arch/arm/dts/socfpga.dtsi
> > > > @@ -738,6 +738,7 @@
> > > >   reg-io-width = <4>;
> > > >   clocks = <&l4_sp_clk>;
> > > >   clock-frequency = <1>;
> > > > + u-boot,dm-pre-reloc;
> > > >   };
> > > >
> > > >   uart1: serial1@ffc03000 {
> > > > diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts
> > > b/arch/arm/dts/socfpga_arria5_socdk.dts
> > > > index 449ba9cbb9..128f0c9762 100644
> > > > --- a/arch/arm/dts/socfpga_arria5_socdk.dts
> > > > +++ b/arch/arm/dts/socfpga_arria5_socdk.dts
> > > > @@ -11,6 +11,7 @@
> > > >
> > > >   chosen {
> > > >   bootargs = "console=ttyS0,115200";
> > > > + stdout-path = "serial0:115200n8";
> > > >   };
> > > >
> > > >   memory {
> > > > diff --git a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> > > b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> > > > index aeb327dd5b..8e01a27320 100644
> > > > --- a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> > > > +++ b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
> > > > @@ -11,6 +11,7 @@
> > > >
> > > >   chosen {
> > > >   bootargs = "console=ttyS0,115200";
> > > > + stdout-path = "serial0:115200n8";
> > > >   };
> > > >
> > > >   aliases {
> > > > diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > > index f4a98e4bb0..16b86ce631 100644
> > > > --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > > +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
> > > > @@ -11,6 +11,7 @@
> > > >
> > > >   chosen {
> > > >   bootargs = "console=ttyS0,115200";
> > > > + stdout-path = "serial0:115200n8";
> > > >   };
> > > >
> > > >   aliases {
> > > > diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> > > b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> > > > index 7da2d8b043..9d40ce912e 100644
> > > > --- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> > > > +++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts
> > > > @@ -13,6 +13,7 @@
> > > >
> > > >   chosen {
> > > >   bootargs = "console=ttyS0,115200";
> > > > + stdout-path = "serial0:115200n8";
> > > >   };
> > > >
> > > >   aliases {
> > > > diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> > > b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> > > > index e6fadb4fc9..d7dd809162 100644
> > > > --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> > > > +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts
> > > > @@ -11,6 +11,7 @@
> > > >
> > > >   chosen {
> > > >   bootargs = "console=ttyS0,115200";
> > > > + stdout-path = "serial0:115200n8";
> > > >   };
> > > >
> > > >   aliases {
> > > > diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts
> > > b/arch/arm/dts/socfpga_cyclone5_is1.dts
> > > > index aa1ce2c3e2..e6306fb285 100644
> > > > --- a/arch/arm/dts/socfpga_cyclone5_is1.dts
> > > > +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
> > > > @@ -11,6 +11,7 @@
> > > >
> > > >   chosen {
> >