Re: [U-Boot] [U-Boot-DM] Enable ENET clocks on IMX6ULL
On 07/31/2018 09:01 AM, Sven Schwermer wrote: > Hi, Hi, (fixing the ML address) > I’m creating a new board in u-boot and I want to use as much driver model / > device tree as possible. I noticed, that my clocks don’t seem to be set up > correctly: The Ethernet PLL is not active and the clock is not muxed to the > CLK pin of the RMII interface. Some of the boards using the IMX6UL(L) run the > setup of the clocks as part of their board code, e.g. here: > https://github.com/u-boot/u-boot/blob/master/arch/arm/mach-imx/mx6/opos6ul.c#L70 > > What is the preferred way to do this now? Is the clock framework supported in > driver model / device tree for iMX? If not, I’d need to create a minimal init > function in my board code. What hook is the correct one so that it gets > executed before the Ethernet driver is probed? > > I’m new to u-boot, so I hope my questions make sense :) I don't think the MX6 has clock driver yet, you can either implement it or enable the clock by hand in the board file. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot-DM] Enable ENET clocks on IMX6ULL
On Tue, Jul 31, 2018 at 12:31 PM, Sven Schwermer wrote: > Hi, > > I’m creating a new board in u-boot and I want to use as much driver model / > device tree as possible. I noticed, that my clocks don’t seem to be set up > correctly: The Ethernet PLL is not active and the clock is not muxed to the > CLK pin of the RMII interface. Some of the boards using the IMX6UL(L) run the > setup of the clocks as part of their board code, e.g. here: > https://github.com/u-boot/u-boot/blob/master/arch/arm/mach-imx/mx6/opos6ul.c#L70 > > What is the preferred way to do this now? Is the clock framework supported in > driver model / device tree for iMX? If not, I’d need to create a minimal init > function in my board code. What hook is the correct one so that it gets > executed before the Ethernet driver is probed? We have added recently, try to test in on master. https://patchwork.ozlabs.org/cover/950886/ https://patchwork.ozlabs.org/cover/950964/ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] arm: exynos4: fix warning of dts
remove this warning: avoid_unnecessary_addr_size
Signed-off-by: Minkyu Kang
---
arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 4
arch/arm/dts/exynos4210-universal_c210.dts | 2 --
arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 4
3 files changed, 10 deletions(-)
diff --git a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
index ba0fd4d..aeeecd6 100644
--- a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
@@ -7,8 +7,6 @@
/{
pinctrl_0: pinctrl@1140 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "samsung,exynos4210-pinctrl";
};
@@ -21,8 +19,6 @@
};
pinctrl_2: pinctrl@0386 {
- #address-cells = <1>;
- #size-cells = <1>;
};
};
diff --git a/arch/arm/dts/exynos4210-universal_c210.dts
b/arch/arm/dts/exynos4210-universal_c210.dts
index 59ea5a6..610a8ad 100644
--- a/arch/arm/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/dts/exynos4210-universal_c210.dts
@@ -25,8 +25,6 @@
gpio-mosi = <&gpy3 3 0>;
gpio-miso = <&gpy3 0 0>;
spi-delay-us = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
cs@0 {
};
};
diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
index 7409e76..955e14e 100644
--- a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -32,13 +32,9 @@
};
pinctrl_2: pinctrl@0386 {
- #address-cells = <1>;
- #size-cells = <1>;
};
pinctrl_3: pinctrl@106E {
- #address-cells = <1>;
- #size-cells = <1>;
};
};
--
1.9.1
--
Thanks,
Minkyu Kang.
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[U-Boot] [PATCH 2/3] arm: exynos5: fix warning of dts
remove this warning: avoid_unnecessary_addr_size
Signed-off-by: Minkyu Kang
---
arch/arm/dts/exynos5.dtsi | 2 --
arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 4
arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 8
3 files changed, 14 deletions(-)
diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi
index 6102978..cdc965d 100644
--- a/arch/arm/dts/exynos5.dtsi
+++ b/arch/arm/dts/exynos5.dtsi
@@ -147,8 +147,6 @@
dp: dp@145b {
compatible = "samsung,exynos5-dp";
reg = <0x145b 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
};
xhci0: xhci@1200 {
diff --git a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
index f19ce47..b414805 100644
--- a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
@@ -18,8 +18,6 @@
};
pinctrl_1: pinctrl@1340 {
- #address-cells = <1>;
- #size-cells = <1>;
};
pinctrl_2: pinctrl@10d1 {
@@ -34,8 +32,6 @@
};
pinctrl_3: pinctrl@0386 {
- #address-cells = <1>;
- #size-cells = <1>;
};
};
diff --git a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
index 7265387..4fcbe71 100644
--- a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
+++ b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
@@ -12,8 +12,6 @@
* numbers are not needed in U-Boot for exynos.
*/
pinctrl@1401 {
- #address-cells = <1>;
- #size-cells = <1>;
};
pinctrl@1340 {
#address-cells = <1>;
@@ -26,16 +24,10 @@
};
};
pinctrl@1341 {
- #address-cells = <1>;
- #size-cells = <1>;
};
pinctrl@1400 {
- #address-cells = <1>;
- #size-cells = <1>;
};
pinctrl@0386 {
- #address-cells = <1>;
- #size-cells = <1>;
};
};
--
1.9.1
--
Thanks,
Minkyu Kang.
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[U-Boot] [PATCH 3/3] arm: spring: fix alias of mmc correctly
Signed-off-by: Minkyu Kang --- arch/arm/dts/exynos5250-spring.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index b73b572..7633d36 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -31,7 +31,7 @@ spi2 = "/spi@12d4"; spi3 = "/spi@131a"; spi4 = "/spi@131b"; - mmc0 = "/mmc@1200"; + mmc0 = "/mmc@1220"; serial0 = "/serial@12C3"; console = "/serial@12C3"; i2s = "/sound@383"; -- 1.9.1 -- Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 20/27] mtd: declare MTD_PARTITIONS symbol in Kconfig
On Mon, Jul 30, 2018 at 9:16 PM, Miquel Raynal wrote: > UBI selects MTD_PARTITIONS which is the symbol to compile > drivers/mtd/mtdpart.c. Unfortunately, the symbol was not defined in > Kconfig and this worked only with board files defining it. Fix this by > adding a boolean in Kconfig so boards defined by defconfig files only > will work as expected. > > Signed-off-by: Miquel Raynal > --- > drivers/mtd/Kconfig | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig > index 9341d518f3..d98457e223 100644 > --- a/drivers/mtd/Kconfig > +++ b/drivers/mtd/Kconfig > @@ -1,5 +1,8 @@ > menu "MTD Support" > > +config MTD_PARTITIONS > + bool > + Reviewed-by: Jagan Teki ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 21/27] cmd: ubi: delete useless and misleading definitions
On Mon, Jul 30, 2018 at 9:16 PM, Miquel Raynal wrote: > These definitions are simply not used and are misleading because similar > definitions exist in jffs2/load_kernel.h and are used widely to define > MTD device types (which is, by the way, totally redundant with what the > MTD core does). Remove these definitions. > > Signed-off-by: Miquel Raynal > --- Acked-by: Jagan Teki ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/27] SPI-NAND support
On Mon, Jul 30, 2018 at 9:16 PM, Miquel Raynal
wrote:
> During the last months, Boris Brezillon shared his work to support
> serial flashes within Linux. First, he delivered (and merged) a new
> layer called spi-mem. He also initiated in Linux MTD subsystem the move
> of all 'raw' NAND related code to a raw/ subdirectory, adding at the
> same time a NAND core that would be shared with all NAND devices. Then,
> he contributed a generic SPI-NAND driver, making use of this NAND core,
> as well as some vendor code to drive a few chips.
>
> On top of this work, I added an 'mtd' U-Boot command to handle all sort
> of MTD devices. This should become the default command instead of having
> one per flash flavor ('sf', 'nand', 'spi-nand' ?).
>
> The series has been tested on an Ocelot board PCB123 (VSC7514),
> featuring a Macronix SPI NAND chip.
>
> TL;DR: the series contains:
> - A few patches from Linux to resynchronize some areas of the MTD layer.
> - Various fixes and re-organization of the MTD subsystem.
> - The introduction of the SPI-mem interface.
> - The addition of the generic SPI-NAND driver (and its bindings).
> - Several SPI NAND chip drivers (Macronix, Micron, Winbond).
> - A new 'mtd' command.
> - Support for spi-nand devices in mtdparts.
>
> To test your SPI-NAND device with U-Boot simply follow these lines:
>
>> setenv mtdparts mtdparts=spi-nand0:1m(foo),-(bar)
>> setenv mtdids spi-nand0=spi-nand0
>> mtdparts # show the spi-nand device partitions
>> ubi part bar # create a static UBI volume in the bar partition
>
> Thanks,
> Miquèl
>
> Changes since v4:
> -
> * Added Jagan's Acked-by tags to every patch related to the
> SPI-mem/SPI-NAND addition.
> * Rebased on top of master.
>
> Changes since v3:
> -
> * Fixed the debug messages in spi-mem to print either Rx or Tx data.
> * Fixed a Kconfig error that prevented to build mtdparts with plain
> defconfig.
> * Fixed a compilation error due to the above error that prevented one
> file to be compiled.
> * Adapted the mtd command to probe MTD partitions also.
> * Declared mtd_probe_devices() in a header so mtdparts or UBI could
> use it too (to probe all devices and MTD partitions in a clean way).
> * As I worked on mtdparts, I found annoying and completely useless the
> fact that we need to prefix the environment variable with
> "mtdparts=". Canceled this obligation.
> * Added one patch to allow spi-nand devices to be recognized by mtdparts
> (this is purely useless but needed to be done in order to use this
> command).
> * Removed useless definitions of MTD device types in UBI code.
> * Wrote a generic mtdparts environment variable parser, used by the mtd
> command.
> * Used the mtd_probe_devices() function from get_mtd_info() in
> cmd/mtdparts.c to be sure the desired partition really does not exist
> (otherwise it will be probed and then found).
>
> Changes since v2:
> -
> * Rebased on u-boot master branch.
> * Removed extra-parenthesis in
> "mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing"
> * s/fiels/files/ in "mtd: move NAND fiels into a raw/ subdirectory"
> * Do not describe generic SPI device properties in SPI NAND bindings.
> * Changes in the mtd command:
> * Printing more information in 'mtd list' (device type, device
> characteristics)
> * Switch to do_div() instead of '(u32)value64b % value32b' which only
> worked because value32b was a power of 2.
> * Removed erase.chip option.
> * By default, erase/read/write happen on the full MTD device while a
> dump will only work on a single page.
>
> Changes since v1:
> -
> * Fixed the nand_memorg structure of the MX35LF2GE4AB chip.
> * Added Reviewed-by tags from Jagan.
> * Backported and squashed two patches fixing things in the SPI NAND core
> received on the Linux ML.
> * Backported more changes in mtdcore.c from Linux.
> * Added a patch to add a fallback on mtd->_read/_write() in mtdcore.c
> when mtd->_read/write_oob() is not supported.
> * Removed the DT changes, useless as the DTs are not available in
> mainline yet.
> * Addressed Boris/Stefan comments on the 'mtd' command.
> * Added support for multi-pages OOB read/write.
>
>
> Boris Brezillon (7):
> mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
> mtd: Add sanity checks in mtd_write/read_oob()
> mtd: nand: Add core infrastructure to deal with NAND devices
> mtd: nand: Pass mode information to nand_page_io_req
> spi: Extend the core to ease integration of SPI memory controllers
> mtd: spinand: Add initial support for the MX35LF1GE4AB chip
> dt-bindings: Add bindings for SPI NAND devices
>
> Brian Norris (1):
> mtd: add get/set of_node/flash_node helpers
>
> Ezequiel Garcia (1):
> mtd: Uninline mtd_write_oob and move it to mtdcore.c
>
> Frieder Schrempf (1):
> mtd: spinand: Add initial support for Winbond W25M02GV
>
> Miquel Raynal (15):
> mtd: Fall
Re: [U-Boot] [PATCH v3] mtd: add spi flash id s25fl128l
On Thu, Jul 26, 2018 at 1:01 PM, Clément Laigle wrote: > Add support for SPANSION s25fl128l > > Changes for v2: > - Fix EXT_ID > > Changes for v3: > - s25fl128l have only one version and no EXT_ID These changes log not in commit body, please take care next time. > > Signed-off-by: Clément Laigle > Cc: Jagan Teki > --- Applied to u-boot-spi/master ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 00/27] SPI-NAND support
Hi Jagan, Stefan Roese wrote on Tue, 31 Jul 2018 07:50:54 +0200: > Hi Jagan, > > On 31.07.2018 07:36, Jagan Teki wrote: > > > > Acked--by: Jagan Teki > > >>> > >>> Thanks! > >>> > Can you rebase on master and send the needed patches or whole? Look > like some changes been added in drivers/mtd/nand/Kconfig > >>> > >>> > >>> I'll wait a bit for Stefan review also and I think I missed something > >>> in mtdparts: old partitions are not freed when creating new ones. > > > Is this resolved with v5? Absolutely not, but I will fix it in a next series during the stabilization cycle. Maybe I will rework a bit mtdparts too, to trash the thin layer that handles the partitions to use in a much more consistent way the MTD core. > > >> > >> I'm back from vacation and am starting to work on this SPI NAND > >> support again. Right now, I'm facing a problem with 32 Bytes > >> missing when written to NAND and read back. Most likely a problem > >> with my SPI driver which supports a maximum of 32 Bytes per SPI > >> message (I'm using adjust_op_size() to adjust the max xfer size). > > > Is it with kirkwood? > > No. Its with a new platform I'm currently working on (MediaTek > MT7688 MIPS) - custom board. The platform and board port will be > posted in a few days / weeks (once its ready). > > >> As for waiting for my review comments, I would suggest to pull > >> this patchset (once updated onto TOT) soon, as the merge window > >> closes just today. We can fix issues later in this release cycle. > >> Otherwise we need to postpone this series to the next release, which > >> is of course also on option. > > > If the issue is generic and it changed the current behavior on mtd or > > any other related areas, it's better to hold. > > AFAICT its not generic. The SPI NAND seems to be working for Miquel > and its a new infrastructure. So chances for breaking an existing > board / platform are pretty low. I totally agree on this. > By pulling this patchset now, we > enable the possibility for implementing and testing it on other > platforms sooner. Tom also seems to be willing to do so. Jagan, I just saw your answer to the cover letter of the v5, thanks for applying it. Regards, Miquèl ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 17/17] fs-test: fix false positive error at Test Case 12
On Sun, Jul 29, 2018 at 09:02:00AM +0200, Heinrich Schuchardt wrote:
> On 07/20/2018 04:57 AM, AKASHI Takahiro wrote:
> > The error message to be matched is wrong. Fix it.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > test/fs/fs-test.sh | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh
> > index 2e8d5ee4df..7b0c5ea56f 100755
> > --- a/test/fs/fs-test.sh
> > +++ b/test/fs/fs-test.sh
> > @@ -522,7 +522,7 @@ function check_results() {
> > "TC11: 1MB write to $3.w - content verified"
> >
> > # Check lookup of 'dot' directory
> > - grep -A4 "Test Case 12 " "$1" | grep -q 'Unable to write file'
> > + grep -A4 "Test Case 12 " "$1" | grep -q 'Unable to write'
> > pass_fail "TC12: 1MB write to . - write denied"
> >
> > # Check directory traversal
> >
>
> Tom suggested in
> https://lists.denx.de/pipermail/u-boot/2018-July/336378.html that the
> comment headers in test/fs/fs-test.sh should be updated to reflect the
> total number of passes and fails.
Thank you for this heads-up.
I'm now trying to rewrite fs-test.sh (at least part of it) on top of
py.test framework.
It will take some time as I'm still learning how to write tests for py.test.
-Takahiro AKASHI
> Best regards
>
> Heinrich
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Re: [U-Boot] [PULL] efi patch queue 2018-07-25
On 07/31/2018 03:36 AM, Tom Rini wrote: On Sat, Jul 28, 2018 at 11:55:08AM -0400, Tom Rini wrote: On Wed, Jul 25, 2018 at 03:04:27PM +0200, Alexander Graf wrote: Hi Tom, This is my current patch queue for efi. Please pull. Alex The following changes since commit 323a73adc9a1bf2de43fe03bdd9c3038ce7c2784: mtd: nand: add new enum for storing ECC algorithm (2018-07-23 14:33:21 -0400) are available in the git repository at: git://github.com/agraf/u-boot.git tags/signed-efi-next for you to fetch changes up to 0b8a88ab6aa24de0ef2bf1e8109409f71e770a8e: MAINTAINERS: assign lib/charset.c (2018-07-25 15:00:24 +0200) NAK, this breaks one of the filesystem tests. Specifically: commit 0dc1bfb7302d220a48364263d5632d6d572b069b Author: Heinrich Schuchardt Date: Mon Jul 2 02:41:23 2018 +0200 fs: fat: cannot write to subdirectories Breaks TC13: 1MB write to ./1MB.file.w2 I've applied this PR along with a patch that changes the expected results of fs-test.sh as we've changed from writing an illegal file to not allowing a valid path + file to be written, which is a step in the right general direction at least. Thanks :) Alex ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] drivers: Add board uclass
Hi Simon, On Wed, Jun 27, 2018 at 11:03 PM, Simon Glass wrote: > Hi Mario, > > On 27 June 2018 at 00:03, Mario Six wrote: >> >> Since there is no canonical "board device" that can be used in board >> files, it is difficult to use DM function for board initialization in >> these cases. >> >> Hence, add a uclass that implements a simple "board device", which can >> hold devices not suitable anywhere else in the device tree, and is also >> able to read encoded information, e.g. hard-wired GPIOs on a GPIO >> expander, read-only memory ICs, etc. that carry information about the >> hardware. >> >> The devices of this uclass expose methods to read generic data types >> (integers, strings, booleans) to encode the information provided by the >> hardware. >> >> Signed-off-by: Mario Six >> >> --- >> >> v2 -> v3: >> * Expanded comment on detect() >> * Added error handling in example >> * Renamed get_board() to board_get() >> * Fixed style violations >> * Documented board_get >> * Made comments conform with kernel-doc >> * Fixed SPDC-License-Identifier position >> >> v1 -> v2: >> * Corrected description of dev parameter of devinfo_detect >> * Added size parameter to devinfo_get_str >> * Expanded uclass documentation >> * Added function to get devinfo instance >> * Renamed the uclass from devinfo to board >> >> --- >> drivers/Kconfig | 2 + >> drivers/Makefile | 1 + >> drivers/board/Kconfig| 17 ++ >> drivers/board/Makefile | 6 ++ >> drivers/board/board-uclass.c | 60 +++ >> include/board.h | 139 >> +++ >> include/dm/uclass-id.h | 1 + >> 7 files changed, 226 insertions(+) >> create mode 100644 drivers/board/Kconfig >> create mode 100644 drivers/board/Makefile >> create mode 100644 drivers/board/board-uclass.c >> create mode 100644 include/board.h > > Reviewed-by: Simon Glass > > But please see below. > >> >> diff --git a/drivers/Kconfig b/drivers/Kconfig >> index 9e21b28750..48f7302506 100644 >> --- a/drivers/Kconfig >> +++ b/drivers/Kconfig >> @@ -22,6 +22,8 @@ source "drivers/ddr/Kconfig" >> >> source "drivers/demo/Kconfig" >> >> +source "drivers/board/Kconfig" >> + >> source "drivers/ddr/fsl/Kconfig" >> >> source "drivers/dfu/Kconfig" >> diff --git a/drivers/Makefile b/drivers/Makefile >> index a213ea9671..c2a363a66f 100644 >> --- a/drivers/Makefile >> +++ b/drivers/Makefile >> @@ -68,6 +68,7 @@ obj-y += ata/ >> obj-$(CONFIG_DM_DEMO) += demo/ >> obj-$(CONFIG_BIOSEMU) += bios_emulator/ >> obj-y += block/ >> +obj-y += board/ >> obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/ >> obj-$(CONFIG_CPU) += cpu/ >> obj-y += crypto/ >> diff --git a/drivers/board/Kconfig b/drivers/board/Kconfig >> new file mode 100644 >> index 00..cc1cf27205 >> --- /dev/null >> +++ b/drivers/board/Kconfig >> @@ -0,0 +1,17 @@ >> +menuconfig BOARD >> + bool "Device Information" >> + help >> + Support methods to query hardware configurations from internal >> + mechanisms (e.g. reading GPIO values, determining the presence of >> + devices on busses, etc.). This enables the usage of U-Boot with >> + modular board architectures. >> + >> +if BOARD >> + >> + >> +config BOARD_GAZERBEAM >> + bool "Enable device information for the Gazerbeam board" >> + help >> + Support querying device information for the gdsys Gazerbeam board. >> + > > This should go in your board-specific patch, not the uclass. > [..] > Indeed, that should be in the other patch. Will be fixed in v4. > Regards, > Simon Best regards, Mario ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/3] linux/if_ether.h: Add VLAN related macros
There are VLAN related macros defined in include/linux/if_vlan.h in Linux kernel, as well as some kernel useful structures and inline functions. Instead of a complete import from kernel, let's add these VLAN macros to U-Boot's include/linux/if_ether.h. Signed-off-by: Bin Meng --- include/linux/if_ether.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h index 181a54e..4b01c37 100644 --- a/include/linux/if_ether.h +++ b/include/linux/if_ether.h @@ -155,5 +155,24 @@ #define ETH_P_MAP 0x00F9 /* Qualcomm multiplexing and*/ /* aggregation protocol */ +/* The following macros come from Linux kernel include/linux/if_vlan.h */ + +#define VLAN_HLEN 4 /* The additional bytes required by VLAN */ + /* (in addition to the Ethernet header) */ +#define VLAN_ETH_HLEN 18 /* Total octets in header. */ +#define VLAN_ETH_ZLEN 64 /* Min. octets in frame sans FCS */ + +/* + * According to 802.3ac, the packet can be 4 bytes longer. --Klika Jan + */ +#define VLAN_ETH_DATA_LEN 1500/* Max. octets in payload*/ +#define VLAN_ETH_FRAME_LEN 1518/* Max. octets in frame sans FCS */ + +#define VLAN_PRIO_MASK 0xe000 /* Priority Code Point */ +#define VLAN_PRIO_SHIFT13 +#define VLAN_CFI_MASK 0x1000 /* Canonical Format Indicator*/ +#define VLAN_TAG_PRESENT VLAN_CFI_MASK +#define VLAN_VID_MASK 0x0fff /* VLAN Identifier */ +#define VLAN_N_VID 4096 #endif /* _UAPI_LINUX_IF_ETHER_H */ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/3] net.h: Include linux/if_ether.h to avoid duplication
There are plenty of existing drivers that have macros like ETH_ALEN
defined in their own source files. Now that we imported the kernel's
if_ether.h to U-Boot we can reduce some duplication.
Signed-off-by: Bin Meng
---
board/Synology/ds414/cmd_syno.c | 1 -
drivers/net/dc2114x.c | 1 -
drivers/net/eepro100.c | 2 --
drivers/net/mvpp2.c | 3 ---
drivers/net/natsemi.c | 1 -
drivers/net/ns8382x.c | 1 -
drivers/net/rtl8139.c | 4
drivers/net/rtl8169.c | 4
drivers/usb/eth/lan7x.h | 2 +-
drivers/usb/gadget/ether.c | 9 ++---
drivers/usb/gadget/rndis.c | 6 --
include/net.h | 1 +
include/usb_ether.h | 10 --
13 files changed, 4 insertions(+), 41 deletions(-)
diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c
index 34643ff..59e6fe0 100644
--- a/board/Synology/ds414/cmd_syno.c
+++ b/board/Synology/ds414/cmd_syno.c
@@ -14,7 +14,6 @@
#include
#include "../drivers/ddr/marvell/axp/ddr3_init.h"
-#define ETH_ALEN 6
#define ETHADDR_MAX4
#define SYNO_SN_TAG"SN="
#define SYNO_CHKSUM_TAG"CHK="
diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 8d7c271..e3c403c 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -123,7 +123,6 @@
#define TOUT_LOOP 100
#define SETUP_FRAME_LEN 192
-#define ETH_ALEN 6
struct de4x5_desc {
volatile s32 status;
diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c
index ae65b64..2fe0ba6 100644
--- a/drivers/net/eepro100.c
+++ b/drivers/net/eepro100.c
@@ -193,8 +193,6 @@ struct descriptor { /* A generic
descriptor. */
#define TOUT_LOOP 100
-#define ETH_ALEN 6
-
static struct RxFD rx_ring[NUM_RX_DESC]; /* RX descriptor ring */
static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */
static int rx_next;/* RX descriptor ring pointer */
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 5c1f5fc..f34245b 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -35,8 +35,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define ETH_ALEN 6 /* Octets in one ethernet addr */
-
#define __verify_pcpu_ptr(ptr) \
do { \
const void __percpu *__vpp_verify = (typeof((ptr) + 0))NULL;\
@@ -58,7 +56,6 @@ do {
\
#define NET_SKB_PADmax(32, MVPP2_CPU_D_CACHE_LINE_SIZE)
#define CONFIG_NR_CPUS 1
-#define ETH_HLEN ETHER_HDR_SIZE /* Total octets in header */
/* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */
#define WRAP (2 + ETH_HLEN + 4 + 32)
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index 0ed9bb5..86f6898 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -61,7 +61,6 @@
#define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/
#define DSIZE 0x0FFF
-#define ETH_ALEN 6
#define CRC_SIZE 4
#define TOUT_LOOP 50
#define TX_BUF_SIZE1536
diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index f941c15..ea7ece5 100644
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -59,7 +59,6 @@
/* defines */
#define DSIZE 0x0FFF
-#define ETH_ALEN 6
#define CRC_SIZE 4
#define TOUT_LOOP 50
#define TX_BUF_SIZE1536
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index ea52343..590f8ce 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -80,10 +80,6 @@
#define RTL_TIMEOUT10
-#define ETH_FRAME_LEN 1514
-#define ETH_ALEN 6
-#define ETH_ZLEN 60
-
/* PCI Tuning Parameters
Threshold is bytes transferred to chip before transmission starts. */
#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index e0e3a6d..a78f3d2 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -102,10 +102,6 @@ static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1,
-1, -1 };
#define RTL_R16(reg) readw(ioaddr + (reg))
#define RTL_R32(reg) readl(ioaddr + (reg))
-#define ETH_FRAME_LEN MAX_ETH_FRAME_SIZE
-#define ETH_ALEN MAC_ADDR_LEN
-#define ETH_ZLEN 60
-
#define bus_to_phys(a) pci_mem_to_phys((pci_dev_t)(unsigned long)dev->priv, \
(pci_addr_t)(unsigned long)a)
#define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)(unsigned long)dev->priv, \
diff --git a/drivers/usb/eth/lan7x.h b/drivers/usb/eth/lan7x.h
index d1b1047..7af610b 100644
--- a/drivers/usb/eth/lan7x.h
+++ b/drivers/usb/eth/lan7x.h
@@ -94,7 +94,7 @@
#define LAN7X_MAC_RX_MAX_SIZE(
[U-Boot] [PATCH 1/3] linux/if_ether.h: Initial import from Linux kernel v4.17
This imports include/uapi/linux/if_ether.h from Linux kernel v4.17. It can be very helpful When porting Linux ethernet driver to U-Boot. Note it is not exactly the same as the kernel one, as checkpatch issues are fixed. Signed-off-by: Bin Meng --- include/linux/if_ether.h | 159 +++ 1 file changed, 159 insertions(+) create mode 100644 include/linux/if_ether.h diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h new file mode 100644 index 000..181a54e --- /dev/null +++ b/include/linux/if_ether.h @@ -0,0 +1,159 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* + * INETAn implementation of the TCP/IP protocol suite for the LINUX + * operating system. INET is implemented using the BSD Socket + * interface as the means of communication with the user level. + * + * Global definitions for the Ethernet IEEE 802.3 interface. + * + * Version:@(#)if_ether.h 1.0.1a 02/08/94 + * + * Author: Fred N. van Kempen, + * Donald Becker, + * Alan Cox, + * Steve Whitehouse, + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _UAPI_LINUX_IF_ETHER_H +#define _UAPI_LINUX_IF_ETHER_H + +#include + +/* + * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble + * and FCS/CRC (frame check sequence). + */ + +#define ETH_ALEN 6 /* Octets in one ethernet addr */ +#define ETH_TLEN 2 /* Octets in ethernet type field */ +#define ETH_HLEN 14 /* Total octets in header. */ +#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ +#define ETH_DATA_LEN 1500/* Max. octets in payload*/ +#define ETH_FRAME_LEN 1514/* Max. octets in frame sans FCS */ +#define ETH_FCS_LEN4 /* Octets in the FCS */ + +#define ETH_MIN_MTU68 /* Min IPv4 MTU per RFC791 */ +#define ETH_MAX_MTU0xU /* 65535, same as IP_MAX_MTU */ + +/* + * These are the defined Ethernet Protocol ID's. + */ + +#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ +#define ETH_P_PUP 0x0200 /* Xerox PUP packet */ +#define ETH_P_PUPAT0x0201 /* Xerox PUP Addr Trans packet */ +#define ETH_P_TSN 0x22F0 /* TSN (IEEE 1722) packet */ +#define ETH_P_ERSPAN2 0x22EB /* ERSPAN version 2 (type III) */ +#define ETH_P_IP 0x0800 /* Internet Protocol packet */ +#define ETH_P_X25 0x0805 /* CCITT X.25 */ +#define ETH_P_ARP 0x0806 /* Address Resolution packet*/ +#defineETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ +#define ETH_P_IEEEPUPAT0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ +#define ETH_P_BATMAN 0x4305 /* B.A.T.M.A.N.-Advanced packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_DEC 0x6000 /* DEC Assigned proto */ +#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load*/ +#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ +#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ +#define ETH_P_LAT 0x6004 /* DEC LAT */ +#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ +#define ETH_P_CUST 0x6006 /* DEC Customer use */ +#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ +#define ETH_P_TEB 0x6558 /* Trans Ether Bridging */ +#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ +#define ETH_P_ATALK0x809B /* Appletalk DDP*/ +#define ETH_P_AARP 0x80F3 /* Appletalk AARP */ +#define ETH_P_8021Q0x8100 /* 802.1Q VLAN Extended Header */ +#define ETH_P_ERSPAN 0x88BE /* ERSPAN type II */ +#define ETH_P_IPX 0x8137 /* IPX over DIX */ +#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ +#define ETH_P_PAUSE0x8808 /* IEEE Pause frames. See 802.3 31B */ +#define ETH_P_SLOW 0x8809 /* Slow Protocol. See 802.3ad 43B */ +#define ETH_P_WCCP 0x883E /* Web-cache coordination */ + /* protocol defined in */ + /* draft-wilson-wrec-wccp-v2-00.txt */ +#define ETH_P_MPLS_UC 0x8847 /* MPLS Unicast traffic */ +#define ETH_P_MPLS_MC 0x8848 /* MPLS Multicast traffic */ +#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ +#define ETH_P_PPP_DISC 0x8863 /* PPPoE discove
[U-Boot] [PATCH v4 1/3] drivers: Add board uclass
Since there is no canonical "board device" that can be used in board
files, it is difficult to use DM function for board initialization in
these cases.
Hence, add a uclass that implements a simple "board device", which can
hold devices not suitable anywhere else in the device tree, and is also
able to read encoded information, e.g. hard-wired GPIOs on a GPIO
expander, read-only memory ICs, etc. that carry information about the
hardware.
The devices of this uclass expose methods to read generic data types
(integers, strings, booleans) to encode the information provided by the
hardware.
Reviewed-by: Simon Glass
Signed-off-by: Mario Six
---
v3 -> v4:
* Fixed botched Kconfig entry
v2 -> v3:
* Expanded comment on detect()
* Added error handling in example
* Renamed get_board() to board_get()
* Fixed style violations
* Documented board_get
* Made comments conform with kernel-doc
* Fixed SPDC-License-Identifier position
v1 -> v2:
* Corrected description of dev parameter of devinfo_detect
* Added size parameter to devinfo_get_str
* Expanded uclass documentation
* Added function to get devinfo instance
* Renamed the uclass from devinfo to board
---
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/board/Kconfig| 7 +++
drivers/board/Makefile | 6 ++
drivers/board/board-uclass.c | 60 +++
include/board.h | 139 +++
include/dm/uclass-id.h | 1 +
7 files changed, 216 insertions(+)
create mode 100644 drivers/board/Kconfig
create mode 100644 drivers/board/Makefile
create mode 100644 drivers/board/board-uclass.c
create mode 100644 include/board.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index c72abf89329..e10731e88e1 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -22,6 +22,8 @@ source "drivers/ddr/Kconfig"
source "drivers/demo/Kconfig"
+source "drivers/board/Kconfig"
+
source "drivers/ddr/fsl/Kconfig"
source "drivers/dfu/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 276e5ee4d7e..de65125fe35 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -68,6 +68,7 @@ obj-y += ata/
obj-$(CONFIG_DM_DEMO) += demo/
obj-$(CONFIG_BIOSEMU) += bios_emulator/
obj-y += block/
+obj-y += board/
obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/
obj-$(CONFIG_CPU) += cpu/
obj-y += crypto/
diff --git a/drivers/board/Kconfig b/drivers/board/Kconfig
new file mode 100644
index 000..c9a52dc20e0
--- /dev/null
+++ b/drivers/board/Kconfig
@@ -0,0 +1,7 @@
+menuconfig BOARD
+ bool "Device Information"
+ help
+ Support methods to query hardware configurations from internal
+ mechanisms (e.g. reading GPIO values, determining the presence of
+ devices on busses, etc.). This enables the usage of U-Boot with
+ modular board architectures.
diff --git a/drivers/board/Makefile b/drivers/board/Makefile
new file mode 100644
index 000..12dd2030cfa
--- /dev/null
+++ b/drivers/board/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2017
+# Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+obj-$(CONFIG_BOARD) += board-uclass.o
+obj-$(CONFIG_BOARD_GAZERBEAM) += gazerbeam.o
diff --git a/drivers/board/board-uclass.c b/drivers/board/board-uclass.c
new file mode 100644
index 000..a516ba49629
--- /dev/null
+++ b/drivers/board/board-uclass.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include
+#include
+#include
+
+int board_get(struct udevice **devp)
+{
+ return uclass_first_device_err(UCLASS_BOARD, devp);
+}
+
+int board_detect(struct udevice *dev)
+{
+ struct board_ops *ops = board_get_ops(dev);
+
+ if (!ops->detect)
+ return -ENOSYS;
+
+ return ops->detect(dev);
+}
+
+int board_get_bool(struct udevice *dev, int id, bool *val)
+{
+ struct board_ops *ops = board_get_ops(dev);
+
+ if (!ops->get_bool)
+ return -ENOSYS;
+
+ return ops->get_bool(dev, id, val);
+}
+
+int board_get_int(struct udevice *dev, int id, int *val)
+{
+ struct board_ops *ops = board_get_ops(dev);
+
+ if (!ops->get_int)
+ return -ENOSYS;
+
+ return ops->get_int(dev, id, val);
+}
+
+int board_get_str(struct udevice *dev, int id, size_t size, char *val)
+{
+ struct board_ops *ops = board_get_ops(dev);
+
+ if (!ops->get_str)
+ return -ENOSYS;
+
+ return ops->get_str(dev, id, size, val);
+}
+
+UCLASS_DRIVER(board) = {
+ .id = UCLASS_BOARD,
+ .name = "board",
+ .post_bind = dm_scan_fdt_dev,
+};
diff --git a/include/board.h b/include/board.h
new file mode 100644
index 000..9dc78684f8e
--- /dev/null
+++ b/include/board.h
@@ -0,0 +1,139 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2017
+ * Mario Six, Gunterm
[U-Boot] [PATCH v4 2/3] board: Add gazerbeam driver
Add a board driver for the upcoming gdsys Gazerbeam board.
Signed-off-by: Mario Six
---
v3 -> v4:
* Fixed misplaced Kconfig lines
v2 -> v3:
* Set startup-finished GPIOs during probe
* Added driver binding file for gazerbeam board
* Improved error handling
* Improved error/debug output
* Improved documentation
* Turned magic numbers into named constants
v1 -> v2:
* Improved error handling
* Renamed DT properties
* Moved the driver over to the board uclass
---
.../bindings/board/gdsys,board_gazerbeam.txt | 46
drivers/board/Kconfig | 10 +
drivers/board/gazerbeam.c | 262 +
drivers/board/gazerbeam.h | 18 ++
4 files changed, 336 insertions(+)
create mode 100644
Documentation/devicetree/bindings/board/gdsys,board_gazerbeam.txt
create mode 100644 drivers/board/gazerbeam.c
create mode 100644 drivers/board/gazerbeam.h
diff --git a/Documentation/devicetree/bindings/board/gdsys,board_gazerbeam.txt
b/Documentation/devicetree/bindings/board/gdsys,board_gazerbeam.txt
new file mode 100644
index 000..28c1080d904
--- /dev/null
+++ b/Documentation/devicetree/bindings/board/gdsys,board_gazerbeam.txt
@@ -0,0 +1,46 @@
+gdsys Gazerbeam board driver
+
+This driver provides capabilities to access the gdsys Gazerbeam board's device
+information. Furthermore, phandles to some internal devices are provided for
+the board files.
+
+Required properties:
+- compatible: should be "gdsys,board_gazerbeam"
+- csb: phandle to the board's coherent system bus (CSB) device node
+- rxaui[0-3]: phandles to the rxaui control device nodes
+- fpga[0-1]: phandles to the board's gdsys FPGA device nodes
+- ioep[0-1]: phandles to the board's IO endpoint device nodes
+- ver-gpios: GPIO list to read the hardware version from
+- var-gpios: GPIO list to read the hardware variant information from
+- reset-gpios: GPIO list for the board's reset GPIOs
+
+Example:
+
+
+board {
+ compatible = "gdsys,board_gazerbeam";
+ csb = <&board_soc>;
+ serdes = <&SERDES>;
+ rxaui0 = <&RXAUI0>;
+ rxaui1 = <&RXAUI1>;
+ rxaui2 = <&RXAUI2>;
+ rxaui3 = <&RXAUI3>;
+ fpga0 = <&FPGA0>;
+ fpga1 = <&FPGA1>;
+ ioep0 = <&IOEP0>;
+ ioep1 = <&IOEP1>;
+
+ ver-gpios = <&PPCPCA 12 0
+&PPCPCA 13 0
+&PPCPCA 14 0
+&PPCPCA 15 0>;
+
+ /* MC2/SC-Board */
+ var-gpios-mc2 = <&GPIO_VB0 0 0/* VAR-MC_SC */
+&GPIO_VB0 11 0>; /* VAR-CON */
+ /* MC4-Board */
+ var-gpios-mc4 = <&GPIO_VB1 0 0/* VAR-MC_SC */
+&GPIO_VB1 11 0>; /* VAR-CON */
+
+ reset-gpios = <&gpio0 1 0 &gpio0 2 1>;
+};
diff --git a/drivers/board/Kconfig b/drivers/board/Kconfig
index c9a52dc20e0..cc1cf272055 100644
--- a/drivers/board/Kconfig
+++ b/drivers/board/Kconfig
@@ -5,3 +5,13 @@ menuconfig BOARD
mechanisms (e.g. reading GPIO values, determining the presence of
devices on busses, etc.). This enables the usage of U-Boot with
modular board architectures.
+
+if BOARD
+
+
+config BOARD_GAZERBEAM
+ bool "Enable device information for the Gazerbeam board"
+ help
+ Support querying device information for the gdsys Gazerbeam board.
+
+endif
diff --git a/drivers/board/gazerbeam.c b/drivers/board/gazerbeam.c
new file mode 100644
index 000..481cce8e809
--- /dev/null
+++ b/drivers/board/gazerbeam.c
@@ -0,0 +1,262 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "gazerbeam.h"
+
+/* Sequence number of I2C bus that holds the GPIO expanders */
+static const int I2C_BUS_SEQ_NO = 1;
+
+/* I2C address of SC/MC2 expander */
+static const int MC2_EXPANDER_ADDR = 0x20;
+/* I2C address of MC4 expander */
+static const int MC4_EXPANDER_ADDR = 0x22;
+
+/* Number of the GPIO to read the SC data from */
+static const int SC_GPIO_NO;
+/* Number of the GPIO to read the CON data from */
+static const int CON_GPIO_NO = 1;
+
+/**
+ * struct board_gazerbeam_priv - Private data structure for the gazerbeam board
+ * driver.
+ * @reset_gpios: GPIOs for the board's reset GPIOs.
+ * @var_gpios: GPIOs for the board's hardware variant GPIOs
+ * @ver_gpios: GPIOs for the board's hardware version GPIOs
+ * @variant: Container for the board's hardware variant (CON/CPU)
+ * @multichannel: Container for the board's multichannel variant (MC4/MC2/SC)
+ * @hwversion: Container for the board's hardware version
+ */
+struct board_gazerbeam_priv {
+ struct gpio_desc reset_gpios[2];
+ struct gpio_desc var_gpios[2];
+ struct gpio_desc ver_gpios[4];
+ int variant;
+ int multichannel;
+ int hwversion;
+};
+
+/**
+ * _read_board_variant_data
[U-Boot] [PATCH v4 3/3] test: Add tests for board uclass
Add tests for the new board uclass.
Reviewed-by: Simon Glass
Signed-off-by: Mario Six
---
v3 -> v4:
No changes
v2 -> v3:
* Accomodated get_board() rename
* Fixed style violations
v1 -> v2:
New in v2
---
arch/sandbox/dts/test.dts | 4 ++
configs/sandbox64_defconfig| 2 +
configs/sandbox_defconfig | 2 +
configs/sandbox_flattree_defconfig | 2 +
configs/sandbox_noblk_defconfig| 2 +
configs/sandbox_spl_defconfig | 2 +
drivers/board/Kconfig | 7 ++-
drivers/board/Makefile | 1 +
drivers/board/sandbox.c| 107 +
drivers/board/sandbox.h| 12 +
test/dm/Makefile | 1 +
test/dm/board.c| 57
12 files changed, 198 insertions(+), 1 deletion(-)
create mode 100644 drivers/board/sandbox.c
create mode 100644 drivers/board/sandbox.h
create mode 100644 test/dm/board.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index c41375ac225..e941cea3e5c 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -571,6 +571,10 @@
};
};
};
+
+ board {
+ compatible = "sandbox,board_sandbox";
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 1fa85a819c9..a531451c58d 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -86,6 +86,8 @@ CONFIG_CPU=y
CONFIG_DM_DEMO=y
CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
+CONFIG_BOARD=y
+CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 61302909191..265355dc321 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -86,6 +86,8 @@ CONFIG_CPU=y
CONFIG_DM_DEMO=y
CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
+CONFIG_BOARD=y
+CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
diff --git a/configs/sandbox_flattree_defconfig
b/configs/sandbox_flattree_defconfig
index e922c4b38ff..10b9967b94a 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -69,6 +69,8 @@ CONFIG_CPU=y
CONFIG_DM_DEMO=y
CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
+CONFIG_BOARD=y
+CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 8bdd4edcda6..5e8a4485477 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -76,6 +76,8 @@ CONFIG_CPU=y
CONFIG_DM_DEMO=y
CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
+CONFIG_BOARD=y
+CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index fb6bb4baa2b..aadff7943fb 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -90,6 +90,8 @@ CONFIG_CPU=y
CONFIG_DM_DEMO=y
CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
+CONFIG_BOARD=y
+CONFIG_BOARD_SANDBOX=y
CONFIG_PM8916_GPIO=y
CONFIG_SANDBOX_GPIO=y
CONFIG_DM_I2C_COMPAT=y
diff --git a/drivers/board/Kconfig b/drivers/board/Kconfig
index cc1cf272055..2a3fc9c049b 100644
--- a/drivers/board/Kconfig
+++ b/drivers/board/Kconfig
@@ -10,8 +10,13 @@ if BOARD
config BOARD_GAZERBEAM
- bool "Enable device information for the Gazerbeam board"
+ bool "Enable board driver for the Gazerbeam board"
help
Support querying device information for the gdsys Gazerbeam board.
+config BOARD_SANDBOX
+ bool "Enable board driver for the Sandbox board"
+ help
+ Support querying device information for the Sandbox boards.
+
endif
diff --git a/drivers/board/Makefile b/drivers/board/Makefile
index 12dd2030cfa..22243380af8 100644
--- a/drivers/board/Makefile
+++ b/drivers/board/Makefile
@@ -4,3 +4,4 @@
# Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
obj-$(CONFIG_BOARD) += board-uclass.o
obj-$(CONFIG_BOARD_GAZERBEAM) += gazerbeam.o
+obj-$(CONFIG_BOARD_SANDBOX) += sandbox.o
diff --git a/drivers/board/sandbox.c b/drivers/board/sandbox.c
new file mode 100644
index 000..50621e47a4f
--- /dev/null
+++ b/drivers/board/sandbox.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include
+#include
+#include
+
+#include "sandbox.h"
+
+struct board_sandbox_priv {
+ bool called_detect;
+ int test_i1;
+ int test_i2;
+};
+
+char vacation_spots[][64] = {"R'lyeh", "Dreamlands", "Plateau of Leng",
+"Carcosa", "Yuggoth", "The Nameless City"};
+
+int board_sandbox_detect(struct udevice *dev)
+{
+ struct board_sandbox_priv *priv = dev_get_priv(dev);
+
+
[U-Boot] [PATCH v2 1/3] linux/if_ether.h: Initial import from Linux kernel v4.17
This imports include/uapi/linux/if_ether.h from Linux kernel v4.17. It can be very helpful When porting Linux ethernet driver to U-Boot. Note it is not exactly the same as the kernel one, as checkpatch issues are fixed. Signed-off-by: Bin Meng --- Changes in v2: - correct one indention to use space include/linux/if_ether.h | 159 +++ 1 file changed, 159 insertions(+) create mode 100644 include/linux/if_ether.h diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h new file mode 100644 index 000..9144ad7 --- /dev/null +++ b/include/linux/if_ether.h @@ -0,0 +1,159 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* + * INETAn implementation of the TCP/IP protocol suite for the LINUX + * operating system. INET is implemented using the BSD Socket + * interface as the means of communication with the user level. + * + * Global definitions for the Ethernet IEEE 802.3 interface. + * + * Version:@(#)if_ether.h 1.0.1a 02/08/94 + * + * Author: Fred N. van Kempen, + * Donald Becker, + * Alan Cox, + * Steve Whitehouse, + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#ifndef _UAPI_LINUX_IF_ETHER_H +#define _UAPI_LINUX_IF_ETHER_H + +#include + +/* + * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble + * and FCS/CRC (frame check sequence). + */ + +#define ETH_ALEN 6 /* Octets in one ethernet addr */ +#define ETH_TLEN 2 /* Octets in ethernet type field */ +#define ETH_HLEN 14 /* Total octets in header. */ +#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ +#define ETH_DATA_LEN 1500/* Max. octets in payload*/ +#define ETH_FRAME_LEN 1514/* Max. octets in frame sans FCS */ +#define ETH_FCS_LEN4 /* Octets in the FCS */ + +#define ETH_MIN_MTU68 /* Min IPv4 MTU per RFC791 */ +#define ETH_MAX_MTU0xU /* 65535, same as IP_MAX_MTU */ + +/* + * These are the defined Ethernet Protocol ID's. + */ + +#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ +#define ETH_P_PUP 0x0200 /* Xerox PUP packet */ +#define ETH_P_PUPAT0x0201 /* Xerox PUP Addr Trans packet */ +#define ETH_P_TSN 0x22F0 /* TSN (IEEE 1722) packet */ +#define ETH_P_ERSPAN2 0x22EB /* ERSPAN version 2 (type III) */ +#define ETH_P_IP 0x0800 /* Internet Protocol packet */ +#define ETH_P_X25 0x0805 /* CCITT X.25 */ +#define ETH_P_ARP 0x0806 /* Address Resolution packet*/ +#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ +#define ETH_P_IEEEPUPAT0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ +#define ETH_P_BATMAN 0x4305 /* B.A.T.M.A.N.-Advanced packet */ + /* [ NOT AN OFFICIALLY REGISTERED ID ] */ +#define ETH_P_DEC 0x6000 /* DEC Assigned proto */ +#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load*/ +#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ +#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ +#define ETH_P_LAT 0x6004 /* DEC LAT */ +#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ +#define ETH_P_CUST 0x6006 /* DEC Customer use */ +#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ +#define ETH_P_TEB 0x6558 /* Trans Ether Bridging */ +#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ +#define ETH_P_ATALK0x809B /* Appletalk DDP*/ +#define ETH_P_AARP 0x80F3 /* Appletalk AARP */ +#define ETH_P_8021Q0x8100 /* 802.1Q VLAN Extended Header */ +#define ETH_P_ERSPAN 0x88BE /* ERSPAN type II */ +#define ETH_P_IPX 0x8137 /* IPX over DIX */ +#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ +#define ETH_P_PAUSE0x8808 /* IEEE Pause frames. See 802.3 31B */ +#define ETH_P_SLOW 0x8809 /* Slow Protocol. See 802.3ad 43B */ +#define ETH_P_WCCP 0x883E /* Web-cache coordination */ + /* protocol defined in */ + /* draft-wilson-wrec-wccp-v2-00.txt */ +#define ETH_P_MPLS_UC 0x8847 /* MPLS Unicast traffic */ +#define ETH_P_MPLS_MC 0x8848 /* MPLS Multicast traffic */ +#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ +#
[U-Boot] [PATCH v2 3/3] linux/if_ether.h: Add VLAN related macros
There are VLAN related macros defined in include/linux/if_vlan.h in Linux kernel, as well as some kernel useful structures and inline functions. Instead of a complete import from kernel, let's add these VLAN macros to U-Boot's include/linux/if_ether.h. Signed-off-by: Bin Meng --- Changes in v2: None include/linux/if_ether.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h index 9144ad7..0d62aef 100644 --- a/include/linux/if_ether.h +++ b/include/linux/if_ether.h @@ -155,5 +155,24 @@ #define ETH_P_MAP 0x00F9 /* Qualcomm multiplexing and*/ /* aggregation protocol */ +/* The following macros come from Linux kernel include/linux/if_vlan.h */ + +#define VLAN_HLEN 4 /* The additional bytes required by VLAN */ + /* (in addition to the Ethernet header) */ +#define VLAN_ETH_HLEN 18 /* Total octets in header. */ +#define VLAN_ETH_ZLEN 64 /* Min. octets in frame sans FCS */ + +/* + * According to 802.3ac, the packet can be 4 bytes longer. --Klika Jan + */ +#define VLAN_ETH_DATA_LEN 1500/* Max. octets in payload*/ +#define VLAN_ETH_FRAME_LEN 1518/* Max. octets in frame sans FCS */ + +#define VLAN_PRIO_MASK 0xe000 /* Priority Code Point */ +#define VLAN_PRIO_SHIFT13 +#define VLAN_CFI_MASK 0x1000 /* Canonical Format Indicator*/ +#define VLAN_TAG_PRESENT VLAN_CFI_MASK +#define VLAN_VID_MASK 0x0fff /* VLAN Identifier */ +#define VLAN_N_VID 4096 #endif /* _UAPI_LINUX_IF_ETHER_H */ -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/3] net.h: Include linux/if_ether.h to avoid duplication
There are plenty of existing drivers that have macros like ETH_ALEN
defined in their own source files. Now that we imported the kernel's
if_ether.h to U-Boot we can reduce some duplication.
Signed-off-by: Bin Meng
---
Changes in v2: None
board/Synology/ds414/cmd_syno.c | 1 -
drivers/net/dc2114x.c | 1 -
drivers/net/eepro100.c | 2 --
drivers/net/mvpp2.c | 3 ---
drivers/net/natsemi.c | 1 -
drivers/net/ns8382x.c | 1 -
drivers/net/rtl8139.c | 4
drivers/net/rtl8169.c | 4
drivers/usb/eth/lan7x.h | 2 +-
drivers/usb/gadget/ether.c | 9 ++---
drivers/usb/gadget/rndis.c | 6 --
include/net.h | 1 +
include/usb_ether.h | 10 --
13 files changed, 4 insertions(+), 41 deletions(-)
diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c
index 34643ff..59e6fe0 100644
--- a/board/Synology/ds414/cmd_syno.c
+++ b/board/Synology/ds414/cmd_syno.c
@@ -14,7 +14,6 @@
#include
#include "../drivers/ddr/marvell/axp/ddr3_init.h"
-#define ETH_ALEN 6
#define ETHADDR_MAX4
#define SYNO_SN_TAG"SN="
#define SYNO_CHKSUM_TAG"CHK="
diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 8d7c271..e3c403c 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -123,7 +123,6 @@
#define TOUT_LOOP 100
#define SETUP_FRAME_LEN 192
-#define ETH_ALEN 6
struct de4x5_desc {
volatile s32 status;
diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c
index ae65b64..2fe0ba6 100644
--- a/drivers/net/eepro100.c
+++ b/drivers/net/eepro100.c
@@ -193,8 +193,6 @@ struct descriptor { /* A generic
descriptor. */
#define TOUT_LOOP 100
-#define ETH_ALEN 6
-
static struct RxFD rx_ring[NUM_RX_DESC]; /* RX descriptor ring */
static struct TxFD tx_ring[NUM_TX_DESC]; /* TX descriptor ring */
static int rx_next;/* RX descriptor ring pointer */
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 5c1f5fc..f34245b 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -35,8 +35,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define ETH_ALEN 6 /* Octets in one ethernet addr */
-
#define __verify_pcpu_ptr(ptr) \
do { \
const void __percpu *__vpp_verify = (typeof((ptr) + 0))NULL;\
@@ -58,7 +56,6 @@ do {
\
#define NET_SKB_PADmax(32, MVPP2_CPU_D_CACHE_LINE_SIZE)
#define CONFIG_NR_CPUS 1
-#define ETH_HLEN ETHER_HDR_SIZE /* Total octets in header */
/* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */
#define WRAP (2 + ETH_HLEN + 4 + 32)
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index 0ed9bb5..86f6898 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -61,7 +61,6 @@
#define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/
#define DSIZE 0x0FFF
-#define ETH_ALEN 6
#define CRC_SIZE 4
#define TOUT_LOOP 50
#define TX_BUF_SIZE1536
diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index f941c15..ea7ece5 100644
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -59,7 +59,6 @@
/* defines */
#define DSIZE 0x0FFF
-#define ETH_ALEN 6
#define CRC_SIZE 4
#define TOUT_LOOP 50
#define TX_BUF_SIZE1536
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index ea52343..590f8ce 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -80,10 +80,6 @@
#define RTL_TIMEOUT10
-#define ETH_FRAME_LEN 1514
-#define ETH_ALEN 6
-#define ETH_ZLEN 60
-
/* PCI Tuning Parameters
Threshold is bytes transferred to chip before transmission starts. */
#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index e0e3a6d..a78f3d2 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -102,10 +102,6 @@ static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1,
-1, -1 };
#define RTL_R16(reg) readw(ioaddr + (reg))
#define RTL_R32(reg) readl(ioaddr + (reg))
-#define ETH_FRAME_LEN MAX_ETH_FRAME_SIZE
-#define ETH_ALEN MAC_ADDR_LEN
-#define ETH_ZLEN 60
-
#define bus_to_phys(a) pci_mem_to_phys((pci_dev_t)(unsigned long)dev->priv, \
(pci_addr_t)(unsigned long)a)
#define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)(unsigned long)dev->priv, \
diff --git a/drivers/usb/eth/lan7x.h b/drivers/usb/eth/lan7x.h
index d1b1047..7af610b 100644
--- a/drivers/usb/eth/lan7x.h
+++ b/drivers/usb/eth/lan7x.h
@@ -94,7 +94,7 @@
#define L
Re: [U-Boot] [RFC] usb: musb-new: omap2430: Enable DM_USB and OF support
On Sun, Jul 22, 2018 at 3:31 PM Lukasz Majewski wrote:
>
> Hi Adam,
>
> > On Sun, Jul 22, 2018 at 11:45 AM Adam Ford wrote:
> > >
> > > With upcoming changes that require CONFIG_BLK, this broke
> > > USB Mass Storage on the OMAP3 boards because if CONFIG_BLK is
> > > enabled, it assumes that DM_USB is enabled, but it wasn't yet
> > > available on omap3 and omap4 boards.
> > >
> > > This patch converts the OMAP2430 MUSB glue to support DM_USB and
> > > extracts the necessary information based on the device tree.
> > >
> > > It's based on the ti-musb driver, but there are enough significant
> > > differences in both the architecture and device tree entires between
> > > am33xx and OMAP3/OMAP4, that I think it makes sense to continue to
> > > keep the separate.
> > >
> >
> > I forgot to mention that, I based this patch on top of an existing
> > patch, that hasn't yet been reviewed which strips out a bunch of dead
> > code
> > https://patchwork.ozlabs.org/patch/943813/
> >
> > I did it to make it easier for me to read.
> >
> > > This RFC has functional USB Host working, but it's hard coded to be
> > > host or peripheral based on the config file. Unfortunately,
> > > USB Peripherals like fastboot, etc don't appear to be
> > > working at all. At least on omap3_logic (DM3730/OMAP35xx).
> > > Any suggestions are appreciated in how to setup the MUSB in OTG mode
> > > and get it to start USB in either host or gadget mode.
>
> Has it been working from the outset? Is the old musb driver working
> correctly with gadget infrastructure?
Currently, the omap3_logic board selects the USB_MUSB_GADGET using the
new MUSB driver. Host is disabled, but when I do usb start, the
device enumerates.
When I enact fastboot usb 0, my host PC shows
[307816.691237] usb 3-2: USB disconnect, device number 39
[307866.180431] usb 3-2: new high-speed USB device number 41 using xhci_hcd
[307866.328908] usb 3-2: New USB device found, idVendor=0451, idProduct=d022
[307866.328912] usb 3-2: New USB device strings: Mfr=1, Product=2,
SerialNumber=0
[307866.328914] usb 3-2: Product: USB download gadget
[307866.328916] usb 3-2: Manufacturer: TI
>
> > >
> > > Unless an OTG adapter is connected with a USB device, the only
> > > message I get when issing 'usb start' is
> > >
> > > USB0: Port not available.
>
> I assume that without your patches it works? It was not clear from your
> commit message.
>
In gadget mode, yet, see above.
> > >
> > > Signed-off-by: Adam Ford
> > >
> > > diff --git a/drivers/usb/musb-new/omap2430.c
> > > b/drivers/usb/musb-new/omap2430.c index fd63c07789..8b56e1a42a
> > > 100644 --- a/drivers/usb/musb-new/omap2430.c
> > > +++ b/drivers/usb/musb-new/omap2430.c
> > > @@ -9,14 +9,18 @@
> > > * This file is part of the Inventra Controller Driver for Linux.
> > > */
> > > #include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > #include
> > > #include
> > > #include
> > > #include
> > > #include "linux-compat.h"
> > > -
> > > #include "musb_core.h"
> > > #include "omap2430.h"
> > > +#include "musb_uboot.h"
> > >
> > > static inline void omap2430_low_level_exit(struct musb *musb)
> > > {
> > > @@ -43,6 +47,7 @@ static int omap2430_musb_init(struct musb *musb)
> > > u32 l;
> > > int status = 0;
> > > unsigned long int start;
> > > +
> > > struct omap_musb_board_data *data =
> > > (struct omap_musb_board_data *)musb->controller;
> > >
> > > @@ -129,3 +134,144 @@ const struct musb_platform_ops omap2430_ops =
> > > { .enable = omap2430_musb_enable,
> > > .disable= omap2430_musb_disable,
> > > };
> > > +
> > > +#if defined(CONFIG_DM_USB)
> > > +
> > > +struct omap2430_musb_platdata {
> > > + void *base;
> > > + void *ctrl_mod_base;
> > > + struct musb_hdrc_platform_data plat;
> > > + struct musb_hdrc_config musb_config;
> > > + struct omap_musb_board_data otg_board_data;
> > > +};
> > > +
> > > +static int omap2430_musb_ofdata_to_platdata(struct udevice *dev)
> > > +{
> > > + struct omap2430_musb_platdata *platdata =
> > > dev_get_platdata(dev);
> > > + const void *fdt = gd->fdt_blob;
> > > + int node = dev_of_offset(dev);
> > > +
> > > + platdata->base = (void *)dev_read_addr_ptr(dev);
> > > +
> > > + platdata->musb_config.multipoint = fdtdec_get_int(fdt, node,
> > > +
> > > "multipoint",
> > > + -1);
> > > + if (platdata->musb_config.multipoint < 0) {
> > > + pr_err("MUSB multipoint DT entry missing\n");
> > > + return -ENOENT;
> > > + }
> > > +
> > > + platdata->musb_config.dyn_fifo = 1;
> > > + platdata->musb_config.num_eps = fdtdec_get_int(fdt, node,
> > > + "num-eps",
> > > -1);
> > > + if (platdata->musb_config.num_eps < 0) {
> > > + pr_err("MUSB num-eps DT
[U-Boot] [PATCH v3 02/13] regmap: Fix documentation
The documentation in regmap.h is not in kernel-doc format. Correct this.
Signed-off-by: Mario Six
---
v2 -> v3:
New in v3
---
include/regmap.h | 48 +++-
1 file changed, 39 insertions(+), 9 deletions(-)
diff --git a/include/regmap.h b/include/regmap.h
index 6a574eaa412..32f75e06f59 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -21,8 +21,8 @@ struct regmap_range {
/**
* struct regmap - a way of accessing hardware/bus registers
*
- * @range_count: Number of ranges available within the map
- * @ranges:Array of ranges
+ * @range_count: Number of ranges available within the map
+ * @ranges:Array of ranges
*/
struct regmap {
int range_count;
@@ -33,7 +33,28 @@ struct regmap {
* Interface to provide access to registers either through a direct memory
* bus or through a peripheral bus like I2C, SPI.
*/
+
+/**
+ * regmap_write() - Write a 32-bit value to a regmap
+ *
+ * @map: Regmap to write to
+ * @offset:Offset in the regmap to write to
+ * @val: Data to write to the regmap at the specified offset
+ *
+ * Return: 0 if OK, -ve on error
+ */
int regmap_write(struct regmap *map, uint offset, uint val);
+
+/**
+ * regmap_read() - Read a 32-bit value from a regmap
+ *
+ * @map: Regmap to read from
+ * @offset:Offset in the regmap to read from
+ * @valp: Pointer to the buffer to receive the data read from the regmap
+ * at the specified offset
+ *
+ * Return: 0 if OK, -ve on error
+ */
int regmap_read(struct regmap *map, uint offset, uint *valp);
#define regmap_write32(map, ptr, member, val) \
@@ -49,31 +70,36 @@ int regmap_read(struct regmap *map, uint offset, uint
*valp);
* @offset:Offset of the memory
* @mask: Mask to apply to the read value
* @val: Value to apply to the value to write
+ * Return: 0 if OK, -ve on error
*/
int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val);
/**
* regmap_init_mem() - Set up a new register map that uses memory access
*
- * Use regmap_uninit() to free it.
- *
* @node: Device node that uses this map
* @mapp: Returns allocated map
+ * Return: 0 if OK, -ve on error
+ *
+ * Use regmap_uninit() to free it.
*/
int regmap_init_mem(ofnode node, struct regmap **mapp);
/**
- * regmap_init_mem_platdata() - Set up a new memory register map for
of-platdata
+ * regmap_init_mem_platdata() - Set up a new memory register map for
+ * of-platdata
+ *
+ * @dev: Device that uses this map
+ * @reg: List of address, size pairs
+ * @count: Number of pairs (e.g. 1 if the regmap has a single entry)
+ * @mapp: Returns allocated map
+ * Return: 0 if OK, -ve on error
*
* This creates a new regmap with a list of regions passed in, rather than
* using the device tree. It only supports 32-bit machines.
*
* Use regmap_uninit() to free it.
*
- * @dev: Device that uses this map
- * @reg: List of address, size pairs
- * @count: Number of pairs (e.g. 1 if the regmap has a single entry)
- * @mapp: Returns allocated map
*/
int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
struct regmap **mapp);
@@ -83,11 +109,15 @@ int regmap_init_mem_platdata(struct udevice *dev,
fdt_val_t *reg, int count,
*
* @map: Regmap to query
* @range_num: Range to look up
+ * Return: Pointer to the range in question if OK, NULL on error
*/
void *regmap_get_range(struct regmap *map, unsigned int range_num);
/**
* regmap_uninit() - free a previously inited regmap
+ *
+ * @map: Regmap to free
+ * Return: 0 if OK, -ve on error
*/
int regmap_uninit(struct regmap *map);
--
2.11.0
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[U-Boot] [PATCH v3 05/13] regmap: Introduce init_range
Both fdtdec_get_addr_size_fixed and of_address_to_resource can fail with
an error, which is not currently checked during regmap initialization.
Since the indentation depth is already quite deep, extract a new
'init_range' method to do the initialization.
Signed-off-by: Mario Six
---
v2 -> v3:
New in v3
---
drivers/core/regmap.c | 68 ++-
1 file changed, 56 insertions(+), 12 deletions(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 4ebab233490..51d9cadc510 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -56,6 +56,58 @@ int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t
*reg, int count,
return 0;
}
#else
+/**
+ * init_range() - Initialize a single range of a regmap
+ * @node: Device node that will use the map in question
+ * @range:Pointer to a regmap_range structure that will be initialized
+ * @addr_len: The length of the addr parts of the reg property
+ * @size_len: The length of the size parts of the reg property
+ * @index:The index of the range to initialize
+ *
+ * This function will read the necessary 'reg' information from the device tree
+ * (the 'addr' part, and the 'length' part), and initialize the range in
+ * quesion.
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static int init_range(ofnode node, struct regmap_range *range, int addr_len,
+ int size_len, int index)
+{
+ fdt_size_t sz;
+ struct resource r;
+
+ if (of_live_active()) {
+ int ret;
+
+ ret = of_address_to_resource(ofnode_to_np(node),
+index, &r);
+ if (ret) {
+ debug("%s: Could not read resource of range %d (ret =
%d)\n",
+ ofnode_get_name(node), index, ret);
+ return ret;
+ }
+
+ range->start = r.start;
+ range->size = r.end - r.start + 1;
+
+ return 0;
+ }
+
+ range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob,
+ ofnode_to_offset(node),
+ "reg", index, addr_len,
+ size_len, &sz, true);
+ if (range->start == FDT_ADDR_T_NONE) {
+ debug("%s: Could not read start of range %d\n",
+ ofnode_get_name(node), index);
+ return -EINVAL;
+ }
+
+ range->size = sz;
+
+ return 0;
+}
+
int regmap_init_mem(ofnode node, struct regmap **mapp)
{
struct regmap_range *range;
@@ -64,7 +116,6 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
int addr_len, size_len, both_len;
int len;
int index;
- struct resource r;
addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
if (addr_len < 0) {
@@ -101,17 +152,10 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
for (range = map->ranges, index = 0; count > 0;
count--, range++, index++) {
- fdt_size_t sz;
- if (of_live_active()) {
- of_address_to_resource(ofnode_to_np(node), index, &r);
- range->start = r.start;
- range->size = r.end - r.start + 1;
- } else {
- range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob,
- ofnode_to_offset(node), "reg", index,
- addr_len, size_len, &sz, true);
- range->size = sz;
- }
+ int ret = init_range(node, range, addr_len, size_len, index);
+
+ if (ret)
+ return ret;
}
*mapp = map;
--
2.11.0
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[U-Boot] [PATCH v3 03/13] regmap: Add documentation
Document the regmap_alloc() function.
Signed-off-by: Mario Six
---
v2 -> v3:
New in v3
---
drivers/core/regmap.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 8e5c3bcf61b..77f6f520a06 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -17,6 +17,12 @@
DECLARE_GLOBAL_DATA_PTR;
+/**
+ * regmap_alloc() - Allocate a regmap with a given number of ranges.
+ *
+ * @count: Number of ranges to be allocated for the regmap.
+ * Return: A pointer to the newly allocated regmap, or NULL on error.
+ */
static struct regmap *regmap_alloc(int count)
{
struct regmap *map;
--
2.11.0
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[U-Boot] [PATCH v3 01/13] test: regmap: Increase size of syscon0 memory
The upcoming changes to the regmap interface will contain a proper check
for plausibility when reading/writing from/to a register map. To still
have the current tests pass, increase the size of the memory region for
the syscon0 device, since one of the tests reads and writes beyond this
range.
Signed-off-by: Mario Six
---
v2 -> v3:
New in v3
---
arch/sandbox/dts/test.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e941cea3e5c..47cc961890f 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -406,7 +406,7 @@
syscon@0 {
compatible = "sandbox,syscon0";
- reg = <0x10 4>;
+ reg = <0x10 16>;
};
syscon@1 {
--
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[U-Boot] [PATCH v3 10/13] test: regmap: Add test for regmap_{set, get}
Add test for regmap_{set,get} functions.
Signed-off-by: Mario Six
---
v2 -> v3:
New in v3
---
test/dm/regmap.c | 28
1 file changed, 28 insertions(+)
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index d4b86b3b03c..152b3a4b800 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -116,3 +116,31 @@ static int dm_test_regmap_rw(struct unit_test_state *uts)
}
DM_TEST(dm_test_regmap_rw, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Get/Set test */
+static int dm_test_regmap_getset(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ struct regmap *map;
+ uint reg;
+ struct layout {
+ u32 val0;
+ u32 val1;
+ u32 val2;
+ u32 val3;
+ };
+
+ ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
+ map = syscon_get_regmap(dev);
+ ut_assertok_ptr(map);
+
+ regmap_set(map, struct layout, val0, 0xcacafafa);
+ regmap_set(map, struct layout, val3, 0x55aa2211);
+
+ ut_assertok(regmap_get(map, struct layout, val0, ®));
+ ut_assertok(regmap_get(map, struct layout, val3, ®));
+
+ return 0;
+}
+
+DM_TEST(dm_test_regmap_getset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
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[U-Boot] [PATCH v3 11/13] misc: Sort Makefile entries
Makefile entries should be sorted. Signed-off-by: Mario Six --- v2 -> v3: New in v3 --- drivers/misc/Makefile | 60 +++ 1 file changed, 32 insertions(+), 28 deletions(-) diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index b0ef97b6b31..3ab110a1aaa 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -4,11 +4,7 @@ # Wolfgang Denk, DENX Software Engineering, w...@denx.de. obj-$(CONFIG_MISC) += misc-uclass.o -obj-$(CONFIG_ALI152X) += ali512x.o -obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o -obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o -obj-$(CONFIG_DS4510) += ds4510.o -obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o + ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CROS_EC) += cros_ec.o obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o @@ -16,43 +12,51 @@ obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o endif -obj-$(CONFIG_FSL_IIM) += fsl_iim.o -obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o -obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o -obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o -obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o -obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o -obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o -obj-$(CONFIG_NS87308) += ns87308.o -obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o + ifdef CONFIG_DM_I2C ifndef CONFIG_SPL_BUILD obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o endif endif -obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o -obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o -obj-$(CONFIG_LED_STATUS) += status_led.o -obj-$(CONFIG_SANDBOX) += swap_case.o + ifdef CONFIG_SPL_OF_PLATDATA ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SANDBOX) += spltest_sandbox.o endif endif -obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o -obj-$(CONFIG_TEGRA_CAR) += tegra_car.o -obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o -obj-$(CONFIG_TWL4030_LED) += twl4030_led.o + +obj-$(CONFIG_ALI152X) += ali512x.o +obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o +obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o +obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o +obj-$(CONFIG_DS4510) += ds4510.o +obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o obj-$(CONFIG_FSL_IFC) += fsl_ifc.o +obj-$(CONFIG_FSL_IIM) += fsl_iim.o +obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o +obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o +obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o +obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o +obj-$(CONFIG_LED_STATUS) += status_led.o +obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o +obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o +obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o +obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o +obj-$(CONFIG_NS87308) += ns87308.o +obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o obj-$(CONFIG_PCA9551_LED) += pca9551_led.o -obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o -obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o +obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o obj-$(CONFIG_QFW) += qfw.o obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o -obj-$(CONFIG_STM32_RCC) += stm32_rcc.o +obj-$(CONFIG_SANDBOX) += swap_case.o +obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o +obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o +obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o +obj-$(CONFIG_STM32_RCC) += stm32_rcc.o obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o -obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o -obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o -obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o +obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o +obj-$(CONFIG_TEGRA_CAR) += tegra_car.o +obj-$(CONFIG_TWL4030_LED) += twl4030_led.o +obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 08/13] regmap: Support reading from specific range
It is useful to be able to treat the different ranges of a regmap
separately to be able to use distinct offset for them, but this is
currently not implemented in the regmap API.
To preserve backwards compatibility, add regmap_read_range and
regmap_write_range functions that take an additional parameter
'range_num' that identifies the range to operate on.
Reviewed-by: Simon Glass
Signed-off-by: Mario Six
---
v2 -> v3:
* Renamed the functions to regmap_{write,read}_range
* Added function comments
* Fixed style violations
* Improved error handling
v1 -> v2:
New in v2
---
drivers/core/regmap.c | 49 -
include/regmap.h | 31 +++
2 files changed, 75 insertions(+), 5 deletions(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 83ca19a08a4..2beca31fa4b 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -188,11 +188,25 @@ int regmap_uninit(struct regmap *map)
return 0;
}
-int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t
val_len)
+int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
+ void *valp, size_t val_len)
{
+ struct regmap_range *range;
void *ptr;
- ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
+ if (range_num >= map->range_count) {
+ debug("%s: range index %d larger than range count\n",
+ __func__, range_num);
+ return -ERANGE;
+ }
+ range = &map->ranges[range_num];
+
+ ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
+
+ if (offset + val_len > range->size) {
+ debug("%s: offset/size combination invalid\n", __func__);
+ return -ERANGE;
+ }
switch (val_len) {
case REGMAP_SIZE_8:
@@ -208,20 +222,39 @@ int regmap_raw_read(struct regmap *map, uint offset, void
*valp, size_t val_len)
debug("%s: regmap size %u unknown\n", __func__, val_len);
return -EINVAL;
}
+
return 0;
}
+int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t
val_len)
+{
+ return regmap_raw_read_range(map, 0, offset, valp, val_len);
+}
+
int regmap_read(struct regmap *map, uint offset, uint *valp)
{
return regmap_raw_read(map, offset, valp, REGMAP_SIZE_32);
}
-int regmap_raw_write(struct regmap *map, uint offset, const void *val,
-size_t val_len)
+int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset,
+ const void *val, size_t val_len)
{
+ struct regmap_range *range;
void *ptr;
- ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
+ if (range_num >= map->range_count) {
+ debug("%s: range index %d larger than range count\n",
+ __func__, range_num);
+ return -ERANGE;
+ }
+ range = &map->ranges[range_num];
+
+ ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
+
+ if (offset + val_len > range->size) {
+ debug("%s: offset/size combination invalid\n", __func__);
+ return -ERANGE;
+ }
switch (val_len) {
case REGMAP_SIZE_8:
@@ -241,6 +274,12 @@ int regmap_raw_write(struct regmap *map, uint offset,
const void *val,
return 0;
}
+int regmap_raw_write(struct regmap *map, uint offset, const void *val,
+size_t val_len)
+{
+ return regmap_raw_write_range(map, 0, offset, val, val_len);
+}
+
int regmap_write(struct regmap *map, uint offset, uint val)
{
return regmap_raw_write(map, offset, &val, REGMAP_SIZE_32);
diff --git a/include/regmap.h b/include/regmap.h
index 352851c715b..e157910cfd7 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -97,6 +97,37 @@ int regmap_raw_write(struct regmap *map, uint offset, const
void *val,
int regmap_raw_read(struct regmap *map, uint offset, void *valp,
size_t val_len);
+/**
+ * regmap_raw_write_range() - Write a value of specified length to a range of a
+ * regmap
+ *
+ * @map: Regmap to write to
+ * @range_num: Number of the range in the regmap to write to
+ * @offset:Offset in the regmap to write to
+ * @val: Value to write to the regmap at the specified offset
+ * @val_len: Length of the data to be written to the regmap
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset,
+ const void *val, size_t val_len);
+
+/**
+ * regmap_raw_read_range() - Read a value of specified length from a range of a
+ * regmap
+ *
+ * @map: Regmap to read from
+ * @range_num: Number of the range in the regmap to write to
+ * @offset:Offset in the regmap to read from
+ * @valp: Pointer to the b
[U-Boot] [PATCH v3 04/13] regmap: Improve error handling
ofnode_read_simple_addr_cells may fail and return a negative error code.
Check for this when initializing regmaps.
Also check if both_len is zero, since this is perfectly possible, and
would lead to a division-by-zero further down the line.
Signed-off-by: Mario Six
---
v2 -> v3:
New in v3
---
drivers/core/regmap.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 77f6f520a06..4ebab233490 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -67,8 +67,25 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
struct resource r;
addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
+ if (addr_len < 0) {
+ debug("%s: Error while reading the addr length (ret = %d)\n",
+ ofnode_get_name(node), addr_len);
+ return addr_len;
+ }
+
size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
+ if (size_len < 0) {
+ debug("%s: Error while reading the size length: (ret = %d)\n",
+ ofnode_get_name(node), size_len);
+ return size_len;
+ }
+
both_len = addr_len + size_len;
+ if (!both_len) {
+ debug("%s: Both addr and size length are zero\n",
+ ofnode_get_name(node));
+ return -EINVAL;
+ }
len = ofnode_read_size(node, "reg");
if (len < 0)
--
2.11.0
___
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[U-Boot] [PATCH v3 12/13] misc: Add gdsys_soc driver
This patch adds a driver for the bus associated with a IHS FPGA.
Signed-off-by: Mario Six
---
v2 -> v3:
* Fixed style violations
* Added bindings file
* Added more debug output in case of errors
* Switched all printfs to debug
* Documented the private data structure
* Formatted documentation as proper kernel-doc
* Expanded Kconfig description
v1 -> v2:
* Switched to correct uclass for IHS FPGA driver (now in MISC uclass)
---
.../devicetree/bindings/misc/gdsys,soc.txt | 16 +
drivers/misc/Kconfig | 9 +++
drivers/misc/Makefile | 1 +
drivers/misc/gdsys_soc.c | 74 ++
drivers/misc/gdsys_soc.h | 23 +++
5 files changed, 123 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/gdsys,soc.txt
create mode 100644 drivers/misc/gdsys_soc.c
create mode 100644 drivers/misc/gdsys_soc.h
diff --git a/Documentation/devicetree/bindings/misc/gdsys,soc.txt
b/Documentation/devicetree/bindings/misc/gdsys,soc.txt
new file mode 100644
index 000..278e935b166
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,soc.txt
@@ -0,0 +1,16 @@
+gdsys soc bus driver
+
+This driver provides a simple interface for the busses associated with gdsys
+IHS FPGAs. The bus itself contains devices whose register maps are contained
+within the FPGA's register space.
+
+Required properties:
+- fpga: A phandle to the controlling IHS FPGA
+
+Example:
+
+FPGA0BUS: fpga0bus {
+ compatible = "gdsys,soc";
+ ranges = <0x0 0xe060 0x4000>;
+ fpga = <&FPGA0>;
+};
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 89854a4941b..535be1491e3 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -289,4 +289,13 @@ config GDSYS_IOEP
depends on MISC
help
Support gdsys FPGA's IO endpoint driver.
+
+config GDSYS_SOC
+ bool "Enable gdsys SOC driver"
+ depends on MISC
+ help
+ Support for gdsys IHS SOC, a simple bus associated with each gdsys
+ IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
+ register maps are contained within the FPGA's register map.
+
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 3ab110a1aaa..b1f9ce7ed39 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
obj-$(CONFIG_LED_STATUS) += status_led.o
obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c
new file mode 100644
index 000..94a21e08af7
--- /dev/null
+++ b/drivers/misc/gdsys_soc.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include
+#include
+#include
+
+#include "gdsys_soc.h"
+
+/**
+ * struct gdsys_soc_priv - Private data for gdsys soc bus
+ * @fpga: The gdsys IHS FPGA this bus is associated with
+ */
+struct gdsys_soc_priv {
+ struct udevice *fpga;
+};
+
+static const struct udevice_id gdsys_soc_ids[] = {
+ { .compatible = "gdsys,soc" },
+ { /* sentinel */ }
+};
+
+int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga)
+{
+ struct gdsys_soc_priv *bus_priv;
+
+ if (!child->parent) {
+ debug("%s: Invalid parent\n", child->name);
+ return -EINVAL;
+ }
+
+ if (!device_is_compatible(child->parent, "gdsys,soc")) {
+ debug("%s: Not child of a gdsys soc\n", child->name);
+ return -EINVAL;
+ }
+
+ bus_priv = dev_get_priv(child->parent);
+
+ *fpga = bus_priv->fpga;
+
+ return 0;
+}
+
+static int gdsys_soc_probe(struct udevice *dev)
+{
+ struct gdsys_soc_priv *priv = dev_get_priv(dev);
+ struct udevice *fpga;
+ int res = uclass_get_device_by_phandle(UCLASS_MISC, dev, "fpga",
+ &fpga);
+ if (res == -ENOENT) {
+ debug("%s: Could not find 'fpga' phandle\n", dev->name);
+ return -EINVAL;
+ }
+
+ if (res == -ENODEV) {
+ debug("%s: Could not get FPGA device\n", dev->name);
+ return -EINVAL;
+ }
+
+ priv->fpga = fpga;
+
+ return 0;
+}
+
+U_BOOT_DRIVER(gdsys_soc_bus) = {
+ .name = "gdsys_soc_bus",
+ .id = UCLASS_SIMPLE_BUS,
+ .of_match = gdsys_soc_ids,
+ .probe = gdsys_soc_probe,
+ .priv_auto_alloc_size = sizeof(struct gdsys_soc_priv),
+};
diff --git a/drivers/misc/gdsys_soc.h b/drivers/misc/gdsys_soc.h
new file mode 100644
index 0
[U-Boot] [PATCH v3 07/13] regmap: Add raw read/write functions
The regmap functions currently assume that all register map accesses
have a data width of 32 bits, but there are maps that have different
widths.
To rectify this, implement the regmap_raw_read and regmap_raw_write
functions from the Linux kernel API that specify the width of a desired
read or write operation on a regmap.
Implement the regmap_read and regmap_write functions using these raw
functions in a backwards-compatible manner.
Signed-off-by: Mario Six
---
v2 -> v3:
* Implement the "raw" functions from Linux instead of adding a size
parameter to the regmap_{read,write} functions
* Fixed style violation
* Improved error handling
v1 -> v2:
New in v2
---
drivers/core/regmap.c | 54 ---
include/regmap.h | 40 ++
2 files changed, 87 insertions(+), 7 deletions(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 3488361ee14..83ca19a08a4 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -188,22 +188,62 @@ int regmap_uninit(struct regmap *map)
return 0;
}
+int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t
val_len)
+{
+ void *ptr;
+
+ ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
+
+ switch (val_len) {
+ case REGMAP_SIZE_8:
+ *((u8 *)valp) = in_8((u8 *)ptr);
+ break;
+ case REGMAP_SIZE_16:
+ *((u16 *)valp) = in_le16((u16 *)ptr);
+ break;
+ case REGMAP_SIZE_32:
+ *((u32 *)valp) = in_le32((u32 *)ptr);
+ break;
+ default:
+ debug("%s: regmap size %u unknown\n", __func__, val_len);
+ return -EINVAL;
+ }
+ return 0;
+}
+
int regmap_read(struct regmap *map, uint offset, uint *valp)
{
- u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, MAP_NOCACHE);
+ return regmap_raw_read(map, offset, valp, REGMAP_SIZE_32);
+}
- *valp = le32_to_cpu(readl(ptr));
+int regmap_raw_write(struct regmap *map, uint offset, const void *val,
+size_t val_len)
+{
+ void *ptr;
+
+ ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
+
+ switch (val_len) {
+ case REGMAP_SIZE_8:
+ out_8((u8 *)ptr, *((u8 *)val));
+ break;
+ case REGMAP_SIZE_16:
+ out_le16((u16 *)ptr, *((u16 *)val));
+ break;
+ case REGMAP_SIZE_32:
+ out_le32((u32 *)ptr, *((u32 *)val));
+ break;
+ default:
+ debug("%s: regmap size %u unknown\n", __func__, val_len);
+ return -EINVAL;
+ }
return 0;
}
int regmap_write(struct regmap *map, uint offset, uint val)
{
- u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, MAP_NOCACHE);
-
- writel(cpu_to_le32(val), ptr);
-
- return 0;
+ return regmap_raw_write(map, offset, &val, REGMAP_SIZE_32);
}
int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val)
diff --git a/include/regmap.h b/include/regmap.h
index 32f75e06f59..352851c715b 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -8,6 +8,19 @@
#define __REGMAP_H
/**
+ * enum regmap_size_t - Access sizes for fpgamap reads and writes
+ *
+ * @REGMAP_SIZE_8: 8-bit read/write access size
+ * @REGMAP_SIZE_16: 16-bit read/write access size
+ * @REGMAP_SIZE_32: 32-bit read/write access size
+ */
+enum regmap_size_t {
+ REGMAP_SIZE_8 = 1,
+ REGMAP_SIZE_16 = 2,
+ REGMAP_SIZE_32 = 4,
+};
+
+/**
* struct regmap_range - a register map range
*
* @start: Start address
@@ -57,6 +70,33 @@ int regmap_write(struct regmap *map, uint offset, uint val);
*/
int regmap_read(struct regmap *map, uint offset, uint *valp);
+/**
+ * regmap_raw_write() - Write a value of specified length to a regmap
+ *
+ * @map: Regmap to write to
+ * @offset:Offset in the regmap to write to
+ * @val: Value to write to the regmap at the specified offset
+ * @val_len: Length of the data to be written to the regmap
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int regmap_raw_write(struct regmap *map, uint offset, const void *val,
+size_t val_len);
+
+/**
+ * regmap_raw_read() - Read a value of specified length from a regmap
+ *
+ * @map: Regmap to read from
+ * @offset:Offset in the regmap to read from
+ * @valp: Pointer to the buffer to receive the data read from the regmap
+ * at the specified offset
+ * @val_len: Length of the data to be read from the regmap
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int regmap_raw_read(struct regmap *map, uint offset, void *valp,
+ size_t val_len);
+
#define regmap_write32(map, ptr, member, val) \
regmap_write(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), val)
--
2.11.0
___
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U
[U-Boot] [PATCH v3 09/13] regmap: Define regmap_{get,set}
It would be convenient if one could use the regmap API in conjunction
with register maps defined as structs (i.e. structs that directly mirror
the memory layout of the registers in question). A similar approach was
planned with the regmap_write32/regmap_read32 macros, but was never
used.
Hence, implement regmap_set/regmap_range_set and
regmap_get/regmap_range_get macros, which, given a register map, a
struct describing the layout of the register map, and a member name
automatically produce regmap_read/regmap_write calls that access the
specified member in the register map.
Signed-off-by: Mario Six
Reviewed-by: Simon Glass
---
v2 -> v3:
* Fixed style violations
* Added documentation
v1 -> v2:
New in v2
---
include/regmap.h | 54 ++
1 file changed, 50 insertions(+), 4 deletions(-)
diff --git a/include/regmap.h b/include/regmap.h
index e157910cfd7..6c774d735b8 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -128,11 +128,57 @@ int regmap_raw_write_range(struct regmap *map, uint
range_num, uint offset,
int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
void *valp, size_t val_len);
-#define regmap_write32(map, ptr, member, val) \
- regmap_write(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), val)
+/**
+ * regmap_range_set() - Set a value in a regmap range described by a struct
+ * @map:Regmap in which a value should be set
+ * @range: Range of the regmap in which a value should be set
+ * @type: Structure type that describes the memory layout of the regmap range
+ * @member: Member of the describing structure that should be set in the regmap
+ * range
+ * @val:Value which should be written to the regmap range
+ */
+#define regmap_range_set(map, range, type, member, val) \
+ do { \
+ typeof(((type *)0)->member) __tmp = val; \
+ regmap_raw_write_range(map, range, offsetof(type, member), \
+ &__tmp, sizeof(((type *)0)->member)); \
+ } while (0)
+
+/**
+ * regmap_set() - Set a value in a regmap described by a struct
+ * @map:Regmap in which a value should be set
+ * @type: Structure type that describes the memory layout of the regmap
+ * @member: Member of the describing structure that should be set in the regmap
+ * @val:Value which should be written to the regmap
+ */
+#define regmap_set(map, type, member, val) \
+ regmap_range_set(map, 0, type, member, val)
-#define regmap_read32(map, ptr, member, valp) \
- regmap_read(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), valp)
+/**
+ * regmap_range_get() - Get a value from a regmap range described by a struct
+ * @map:Regmap from which a value should be read
+ * @range: Range of the regmap from which a value should be read
+ * @type: Structure type that describes the memory layout of the regmap
+ * range
+ * @member: Member of the describing structure that should be read in the
+ * regmap range
+ * @valp: Variable that receives the value read from the regmap range
+ */
+#define regmap_range_get(map, range, type, member, valp) \
+ regmap_raw_read_range(map, range, offsetof(type, member), \
+ (void *)valp, sizeof(((type *)0)->member))
+
+/**
+ * regmap_get() - Get a value from a regmap described by a struct
+ * @map:Regmap from which a value should be read
+ * @type: Structure type that describes the memory layout of the regmap
+ * range
+ * @member: Member of the describing structure that should be read in the
+ * regmap
+ * @valp: Variable that receives the value read from the regmap
+ */
+#define regmap_get(map, type, member, valp) \
+ regmap_range_get(map, 0, type, member, valp)
/**
* regmap_update_bits() - Perform a read/modify/write using a mask
--
2.11.0
___
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[U-Boot] [PATCH v3 13/13] misc: Add IHS FPGA driver
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.
Signed-off-by: Mario Six
---
v2 -> v3:
* Fixed style violations
* Added full documentation
* Extracted some magic numbers to constants
* Removed unnecessary includes
* Extracted wait_for_fpga_done
* Improved error handling and reporting
* Added device-tree-binding files
* Improved Kconfig entry
v1 -> v2:
New in v2
---
.../devicetree/bindings/misc/gdsys,iocon_fpga.txt | 19 +
.../devicetree/bindings/misc/gdsys,iocpu_fpga.txt | 19 +
drivers/misc/Kconfig | 9 +
drivers/misc/Makefile | 1 +
drivers/misc/ihs_fpga.c| 867 +
drivers/misc/ihs_fpga.h| 49 ++
6 files changed, 964 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
create mode 100644 Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
create mode 100644 drivers/misc/ihs_fpga.c
create mode 100644 drivers/misc/ihs_fpga.h
diff --git a/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
b/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
new file mode 100644
index 000..acd466fdc6d
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CON devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CON devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocon_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+ done
+
+Example:
+
+FPGA0 {
+ compatible = "gdsys,iocon_fpga";
+ reset-gpios = <&PPCPCA 26 0>;
+ done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
b/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
new file mode 100644
index 000..819db22bf7d
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CPU devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CPU devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocpu_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+ done
+
+Example:
+
+FPGA0 {
+ compatible = "gdsys,iocpu_fpga";
+ reset-gpios = <&PPCPCA 26 0>;
+ done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 535be1491e3..09d3a6d75ea 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -298,4 +298,13 @@ config GDSYS_SOC
IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
register maps are contained within the FPGA's register map.
+config IHS_FPGA
+ bool "Enable IHS FPGA driver"
+ depends on MISC
+ help
+ Support IHS (Integrated Hardware Systems) FPGA, the main FPGAs on
+ gdsys devices, which supply the majority of the functionality offered
+ by the devices. This driver supports both CON and CPU variants of the
+ devices, depending on the device tree entry.
+
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b1f9ce7ed39..710475c9419 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
obj-$(CONFIG_LED_STATUS) += status_led.o
obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
diff --git a/drivers/misc/ihs_fpga.c b/drivers/misc/ihs_fpga.c
new file mode 100644
index 000..43a8b61604a
--- /dev/null
+++ b/drivers/misc/ihs_fpga.c
@@ -0,0 +1,867 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the ioep-fpga driver, which is
+ *
+ * (C) Copyright 2014
+ * Dirk Eibach, Guntermann & Drunck GmbH, eib...@gdsys.de
+ */
+
+#include
+#include
+#include
+#include
+
+#include "ihs_fpga.h"
+
+/**
+ * struct ihs_fpga_priv - Private data structure for IHS FPGA driver
+ * @map:Register map for the FPGA's own register space
+ * @reset_gpio: GPIO to start FPGA reconfiguration
+ * @done_gpio: GPOI to read the 'ready' status of the FPGA
+ */
+struct ihs_fpga_priv {
+ struct regmap *map;
+ struct gpio_desc reset_gpio;
+ struct gpio_des
[U-Boot] [PATCH v3 06/13] regmap: Add error output
Add some debug output in cases where the initialization of a regmap
fails.
Signed-off-by: Mario Six
---
v2 -> v3:
New in v3
---
drivers/core/regmap.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 51d9cadc510..3488361ee14 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -139,12 +139,18 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
}
len = ofnode_read_size(node, "reg");
- if (len < 0)
+ if (len < 0) {
+ debug("%s: Error while reading reg size (ret = %d)\n",
+ ofnode_get_name(node), len);
return len;
+ }
len /= sizeof(fdt32_t);
count = len / both_len;
- if (!count)
+ if (!count) {
+ debug("%s: Not enough data in reg property\n",
+ ofnode_get_name(node));
return -EINVAL;
+ }
map = regmap_alloc(count);
if (!map)
--
2.11.0
___
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Re: [U-Boot] [ANN] U-Boot v2018.09-rc1 released
Hi Tom, On 31.7.2018 03:49, Tom Rini wrote: > Hey all, > > So it's release day and I've put up v2018.09-rc1. The merge window is > now closed and I've updated git and the tarballs are also up now. > > That said, there's a few things that I expect to come in and I hope > soon. There's the SPI-NAND series. There's EFI support to Sandbox. > And there may be at least some amount of the FAT improvement series. > > There's also some amount of cleaning up of my patch queue that's still > needed. > > I will follow the usual rule of an -rc every other Monday > and we're looking at release on September 10th, 2018. > > Thanks all! FYI: Just wanted to let you know that tag name and tag description is correct but the Makefile patch subject you have created contains 2017 year instead of 2018. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC] usb: musb-new: omap2430: Enable DM_USB and OF support
On Tue, Jul 31, 2018 at 4:57 AM Adam Ford wrote:
>
> On Sun, Jul 22, 2018 at 3:31 PM Lukasz Majewski wrote:
> >
> > Hi Adam,
> >
> > > On Sun, Jul 22, 2018 at 11:45 AM Adam Ford wrote:
> > > >
> > > > With upcoming changes that require CONFIG_BLK, this broke
> > > > USB Mass Storage on the OMAP3 boards because if CONFIG_BLK is
> > > > enabled, it assumes that DM_USB is enabled, but it wasn't yet
> > > > available on omap3 and omap4 boards.
> > > >
> > > > This patch converts the OMAP2430 MUSB glue to support DM_USB and
> > > > extracts the necessary information based on the device tree.
> > > >
> > > > It's based on the ti-musb driver, but there are enough significant
> > > > differences in both the architecture and device tree entires between
> > > > am33xx and OMAP3/OMAP4, that I think it makes sense to continue to
> > > > keep the separate.
> > > >
> > >
> > > I forgot to mention that, I based this patch on top of an existing
> > > patch, that hasn't yet been reviewed which strips out a bunch of dead
> > > code
> > > https://patchwork.ozlabs.org/patch/943813/
> > >
> > > I did it to make it easier for me to read.
> > >
> > > > This RFC has functional USB Host working, but it's hard coded to be
> > > > host or peripheral based on the config file. Unfortunately,
> > > > USB Peripherals like fastboot, etc don't appear to be
> > > > working at all. At least on omap3_logic (DM3730/OMAP35xx).
> > > > Any suggestions are appreciated in how to setup the MUSB in OTG mode
> > > > and get it to start USB in either host or gadget mode.
It appears as if USB gadget mode doesn't support DM yet per
doc/driver-model/usb-info.txt
I think I'll respin this a bit with some additional #ifdef's to check
for gadget and host mode with DM.
It would still be nice to get this working in DM_USB mode as much as
possible. Hopefully the Gadget mode won't take long, but looking at
the date doc/driver-model/usb-info.txt, it may not happen soon.
> >
> > Has it been working from the outset? Is the old musb driver working
> > correctly with gadget infrastructure?
>
> Currently, the omap3_logic board selects the USB_MUSB_GADGET using the
> new MUSB driver. Host is disabled, but when I do usb start, the
> device enumerates.
>
> When I enact fastboot usb 0, my host PC shows
>
> [307816.691237] usb 3-2: USB disconnect, device number 39
> [307866.180431] usb 3-2: new high-speed USB device number 41 using xhci_hcd
> [307866.328908] usb 3-2: New USB device found, idVendor=0451, idProduct=d022
> [307866.328912] usb 3-2: New USB device strings: Mfr=1, Product=2,
> SerialNumber=0
> [307866.328914] usb 3-2: Product: USB download gadget
> [307866.328916] usb 3-2: Manufacturer: TI
>
>
> >
> > > >
> > > > Unless an OTG adapter is connected with a USB device, the only
> > > > message I get when issing 'usb start' is
> > > >
> > > > USB0: Port not available.
> >
> > I assume that without your patches it works? It was not clear from your
> > commit message.
> >
>
> In gadget mode, yet, see above.
> > > >
> > > > Signed-off-by: Adam Ford
> > > >
> > > > diff --git a/drivers/usb/musb-new/omap2430.c
> > > > b/drivers/usb/musb-new/omap2430.c index fd63c07789..8b56e1a42a
> > > > 100644 --- a/drivers/usb/musb-new/omap2430.c
> > > > +++ b/drivers/usb/musb-new/omap2430.c
> > > > @@ -9,14 +9,18 @@
> > > > * This file is part of the Inventra Controller Driver for Linux.
> > > > */
> > > > #include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +#include
> > > > #include
> > > > #include
> > > > #include
> > > > #include
> > > > #include "linux-compat.h"
> > > > -
> > > > #include "musb_core.h"
> > > > #include "omap2430.h"
> > > > +#include "musb_uboot.h"
> > > >
> > > > static inline void omap2430_low_level_exit(struct musb *musb)
> > > > {
> > > > @@ -43,6 +47,7 @@ static int omap2430_musb_init(struct musb *musb)
> > > > u32 l;
> > > > int status = 0;
> > > > unsigned long int start;
> > > > +
> > > > struct omap_musb_board_data *data =
> > > > (struct omap_musb_board_data *)musb->controller;
> > > >
> > > > @@ -129,3 +134,144 @@ const struct musb_platform_ops omap2430_ops =
> > > > { .enable = omap2430_musb_enable,
> > > > .disable= omap2430_musb_disable,
> > > > };
> > > > +
> > > > +#if defined(CONFIG_DM_USB)
> > > > +
> > > > +struct omap2430_musb_platdata {
> > > > + void *base;
> > > > + void *ctrl_mod_base;
> > > > + struct musb_hdrc_platform_data plat;
> > > > + struct musb_hdrc_config musb_config;
> > > > + struct omap_musb_board_data otg_board_data;
> > > > +};
> > > > +
> > > > +static int omap2430_musb_ofdata_to_platdata(struct udevice *dev)
> > > > +{
> > > > + struct omap2430_musb_platdata *platdata =
> > > > dev_get_platdata(dev);
> > > > + const void *fdt = gd->fdt_blob;
> > > > + int node = dev_of_offset(dev);
> > > > +
> > > > + platdata->base = (void *)dev_read
[U-Boot] Uboot for STM32F411xx
Hi kamil, I have spent the whole weekend to get the Uboot run on my STM32F4xC/E, I was able to derive changes for the board( dts and board file), basically my board doesn't require any DRAM initialization. Compiled successfully, but after flashing the system ends in Hard-fault, any help will be appreciated. Best Regards, Saurabh Saxena ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] U-Boot: Verified Boot: signed configuration and mix and match attack
Dear U-Boot devs,
I've setup verified boot on a imx6 board and want to protect my device against
the "mix and match" attacks mentioned in "doc/uImage.FIT/signature.txt".
That's why I have only implemented signed configurations and no signed images
as in doc/uImage.FIT/signed-configs.its.
My public key in my embedded fdt has the property required = "conf";
Booting a signed config with "bootm ${loadaddr}#conf@1" and an embedded public
key required for configurations does work as expected and do fail to boot if I
modify the config, image, hash, signature and so on.
If I boot any fit image(signed and unsigned) for example with "bootm
${loadaddr}:kernel@1 - fdt@1" to select the subimages directly, I could boot
every image combination without signature verification although a signature is
enforced for a configuration.
Is this the expected behavior?
I thought if I had set the public key in in the embedded fdt as required for
configurations, bootm does only boot signed configurations and no subimages
directly...
Best regards
Johann Neuhauser
DH electronics GmbH
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[U-Boot] Verified Boot: Mix and match attack
Hello developers,
I've setup verified boot on a imx6 board and want to protect my device against
the "mix and match" attacks mentioned in "doc/uImage.FIT/signature.txt".
That's why, as in doc/uImage.FIT/signed-configs.its, I have only implemented
signed configurations and no signed images.
My public key in my embedded fdt has the property required = "conf";.
Booting a signed config with "bootm ${loadaddr}#conf@1" and an embedded public
key required for configurations does work as expected and do fail to boot if I
modify the config, image, hash, signature and so on.
If I boot any fit image(signed and unsigned) with "bootm ${loadaddr}:kernel@1 -
fdt@1" to select the subimages directly, I could boot every image combination
without signature verification.
Is this the expected behavior?
I thought if I had set the public key in in the embedded fdt as required for
configurations, bootm does only boot configurations and no subimages directly...
Regards
Johann Neuhauser
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[U-Boot] boot a bios/uefi with x86_64, without grub
Hi, I am working with a board called "up board" ( http://www.aaeon.com/en/p/up-board-computer-board-for-professional-makers) from aaeon. This card is as tiny as a credit card or a raspberry pi running with a x86_64 processor. It buildin an UEFI BIOS and a MMC memory (no sdcard, no ssd, no sata, no rom). I know this is not really adapt to an embedded usage but i would like to let my u-boot bootloader loading my gnu/linux kernel (using the bootefi command) then my linux rootfs (generated by yocto) : (UEFI / BIOS) -> (uboot uefi) -> (GNU/Linux kernel) --> (linux rootfs) I do not want to use grub or grub uefi if possible. My idea is to make a uefi partition on the eMMC memory. I am looking for an uboot configuration i can use to compile my bootloader. I have make tests with the u-boot-app.efi that i have compiled and set into an efi paritiion ; i am booting into an usb key first. This is not working and always stop at the uefi shell... Maybe my u-boot-app.efi need to be signed ? Is there a documentation that describe all steps required ? Any help welcome in order to solve my use case. Thanks in advance. Regards Thierry ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] usb: musb-new: omap2430: Enable DM_USB and OF support
With upcoming changes that require CONFIG_BLK, this broke
USB Mass Storage on the OMAP3 boards because if CONFIG_BLK is
enabled, it assumes that DM_USB is enabled, but it wasn't yet
available on omap3 and omap4 boards.
This patch converts the OMAP2430 MUSB glue to support DM_USB and
extracts the necessary information based on the device tree.
It's based on the ti-musb driver, but there are enough significant
differences in both the architecture and device tree entires between
am33xx and OMAP3/OMAP4, that I think it makes sense to continue to
keep the separate.
Per doc/driver-model/usb-info.txt, the USB gadget stuff hasn't
migrated to DM_USB yet, so this only supports USB Host for now.
Users wanting USB Gadgets will need to disable DM_USB and leave
it the old way for now.
Signed-off-by: Adam Ford
diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index fd63c07789..342d76bd6f 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -9,14 +9,18 @@
* This file is part of the Inventra Controller Driver for Linux.
*/
#include
+#include
+#include
+#include
+#include
#include
#include
#include
#include
#include "linux-compat.h"
-
#include "musb_core.h"
#include "omap2430.h"
+#include "musb_uboot.h"
static inline void omap2430_low_level_exit(struct musb *musb)
{
@@ -43,6 +47,7 @@ static int omap2430_musb_init(struct musb *musb)
u32 l;
int status = 0;
unsigned long int start;
+
struct omap_musb_board_data *data =
(struct omap_musb_board_data *)musb->controller;
@@ -129,3 +134,146 @@ const struct musb_platform_ops omap2430_ops = {
.enable = omap2430_musb_enable,
.disable= omap2430_musb_disable,
};
+
+#if defined(CONFIG_DM_USB)
+
+struct omap2430_musb_platdata {
+ void *base;
+ void *ctrl_mod_base;
+ struct musb_hdrc_platform_data plat;
+ struct musb_hdrc_config musb_config;
+ struct omap_musb_board_data otg_board_data;
+};
+
+static int omap2430_musb_ofdata_to_platdata(struct udevice *dev)
+{
+ struct omap2430_musb_platdata *platdata = dev_get_platdata(dev);
+ const void *fdt = gd->fdt_blob;
+ int node = dev_of_offset(dev);
+
+ platdata->base = (void *)dev_read_addr_ptr(dev);
+
+ platdata->musb_config.multipoint = fdtdec_get_int(fdt, node,
+ "multipoint",
+ -1);
+ if (platdata->musb_config.multipoint < 0) {
+ pr_err("MUSB multipoint DT entry missing\n");
+ return -ENOENT;
+ }
+
+ platdata->musb_config.dyn_fifo = 1;
+ platdata->musb_config.num_eps = fdtdec_get_int(fdt, node,
+ "num-eps", -1);
+ if (platdata->musb_config.num_eps < 0) {
+ pr_err("MUSB num-eps DT entry missing\n");
+ return -ENOENT;
+ }
+
+ platdata->musb_config.ram_bits = fdtdec_get_int(fdt, node,
+ "ram-bits", -1);
+ if (platdata->musb_config.ram_bits < 0) {
+ pr_err("MUSB ram-bits DT entry missing\n");
+ return -ENOENT;
+ }
+
+ platdata->plat.power = fdtdec_get_int(fdt, node,
+ "power", -1);
+ if (platdata->plat.power < 0) {
+ pr_err("MUSB power DT entry missing\n");
+ return -ENOENT;
+ }
+
+ platdata->otg_board_data.interface_type = fdtdec_get_int(fdt, node,
+
"interface-type", -1);
+ if (platdata->otg_board_data.interface_type < 0) {
+ pr_err("MUSB interface-type DT entry missing\n");
+ return -ENOENT;
+ }
+
+#if 0 /* In a perfect world, mode would be set to OTG, mode 3 from DT */
+ platdata->plat.mode = fdtdec_get_int(fdt, node,
+
"mode", -1);
+ if (platdata->plat.mode < 0) {
+ pr_err("MUSB mode DT entry missing\n");
+ return -ENOENT;
+ }
+#else /* MUSB_OTG, it doesn't work */
+#ifdef CONFIG_USB_MUSB_HOST /* Host seems to be the only option that works */
+ platdata->plat.mode = MUSB_HOST;
+#else /* For that matter, MUSB_PERIPHERAL doesn't either */
+ platdata->plat.mode = MUSB_PERIPHERAL;
+#endif
+#endif
+ platdata->otg_board_data.dev = dev;
+ platdata->plat.config = &platdata->musb_config;
+ platdata->plat.platform_ops = &omap2430_ops;
+ platdata->plat.board_data = &platdata->otg_board_data;
+ return 0;
+}
+
+static int omap2430_musb_probe(struct udevice *dev)
+{
+#ifdef CONFIG_USB_MUSB_HOST
+ struct musb_host_data *host = dev_get_priv(dev);
+#endif
+ struct omap2430_musb_p
Re: [U-Boot] [PATCH 1/2] smbios: fix checkstyle error
On 30 July 2018 at 05:22, Christian Gmeiner wrote: > Fixes the following chechpatch -f error: > > ERROR: "(foo*)" should be "(foo *)" > + strncpy((char*)t->uuid, serial_str, sizeof(t->uuid)); > > Signed-off-by: Christian Gmeiner > --- > lib/smbios.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 1/2] dm: serial: Replace setparity by setconfig
Hi Patrice,
On 30 July 2018 at 09:23, Patrice Chotard wrote:
> From: Patrick Delaunay
>
> Replace setparity by more generic setconfig ops
> to allow uart parity, bits word length and stop bits
> number change.
>
> Adds SERIAL_GET_PARITY/BITS/STOP macros.
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrice Chotard
> ---
>
> drivers/serial/serial-uclass.c | 14 ++
> include/serial.h | 42
> +++---
> 2 files changed, 53 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
> index 321d23ee93bf..9f523751ce17 100644
> --- a/drivers/serial/serial-uclass.c
> +++ b/drivers/serial/serial-uclass.c
> @@ -287,6 +287,18 @@ void serial_setbrg(void)
> ops->setbrg(gd->cur_serial_dev, gd->baudrate);
> }
>
> +void serial_setconfig(u8 config)
> +{
> + struct dm_serial_ops *ops;
> +
> + if (!gd->cur_serial_dev)
> + return;
> +
> + ops = serial_get_ops(gd->cur_serial_dev);
> + if (ops->setconfig)
> + ops->setconfig(gd->cur_serial_dev, config);
> +}
> +
> void serial_stdio_init(void)
> {
> }
> @@ -398,6 +410,8 @@ static int serial_post_probe(struct udevice *dev)
> ops->pending += gd->reloc_off;
> if (ops->clear)
> ops->clear += gd->reloc_off;
> + if (ops->setconfig)
> + ops->setconfig += gd->reloc_off;
> #if CONFIG_POST & CONFIG_SYS_POST_UART
> if (ops->loop)
> ops->loop += gd->reloc_off
> diff --git a/include/serial.h b/include/serial.h
> index b9ef6d91c9c5..61c1362e9e32 100644
> --- a/include/serial.h
> +++ b/include/serial.h
> @@ -73,6 +73,39 @@ enum serial_par {
> SERIAL_PAR_EVEN
> };
>
> +#define SERIAL_PAR_MASK0x03
> +#define SERIAL_PAR_SHIFT 0
> +#define SERIAL_GET_PARITY(config) \
> + ((config & SERIAL_PAR_MASK) >> SERIAL_PAR_SHIFT)
> +
> +enum serial_bits {
> + SERIAL_5_BITS,
> + SERIAL_6_BITS,
> + SERIAL_7_BITS,
> + SERIAL_8_BITS
> +};
> +
> +#define SERIAL_BITS_MASK 0x0C
> +#define SERIAL_BITS_SHIFT 2
For consistency:
#define SERIAL_BITS_SHIFT 2
#define SERIAL_BITS_MASK (0x3 << SERIAL_BITS_SHIFT)
> +#define SERIAL_GET_BITS(config) \
> + ((config & SERIAL_BITS_MASK) >> SERIAL_BITS_SHIFT)
> +
> +enum serial_stop {
> + SERIAL_HALF_STOP, /* 0.5 stop bit */
> + SERIAL_ONE_STOP,/* 1 stop bit */
> + SERIAL_ONE_HALF_STOP, /* 1.5 stop bit */
> + SERIAL_TWO_STOP /* 2 stop bit */
> +};
> +
> +#define SERIAL_STOP_MASK 0x30
> +#define SERIAL_STOP_SHIFT 4
same here
> +#define SERIAL_GET_STOP(config) \
> + ((config & SERIAL_STOP_MASK) >> SERIAL_STOP_SHIFT)
> +
> +#define SERIAL_DEFAULT_CONFIG SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \
> + SERIAL_8_BITS << SERIAL_BITS_SHIFT | \
> + SERIAL_ONE_STOP << SERIAL_STOP_SHIFT
> +
> /**
> * struct struct dm_serial_ops - Driver model serial operations
> *
> @@ -150,15 +183,18 @@ struct dm_serial_ops {
> int (*loop)(struct udevice *dev, int on);
> #endif
> /**
> -* setparity() - Set up the parity
> +* setconfig() - Set up the uart configuration
> +* (parity, 5/6/7/8 bits word length, stop bits)
> *
> -* Set up a new parity for this device.
> +* Set up a new config for this device.
> *
> * @dev: Device pointer
> * @parity: parity to use
> +* @bits: bits number to use
> +* @stop: stop bits number to use
> * @return 0 if OK, -ve on error
> */
> - int (*setparity)(struct udevice *dev, enum serial_par parity);
> + int (*setconfig)(struct udevice *dev, u8 serial_config);
Please make this uint instead of u8. There is no point in using u8
since the compiler will use a register anyway. It can only make code
size worse, if the compile add masking, etc.
> };
>
> /**
> --
> 1.9.1
>
Also you need a serial_setconfig() function call in the uclass so
people can call it.
Perhaps that could have separate parameters for each setting, so that
the caller does not have to make up a mask? I'm not sure if that is
better or not.
Also we need to call this from sandbox code for testing purposes,
Regards,
Simon
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Re: [U-Boot] [PATCH] sata: fix sata_Probe return value check
On 27 July 2018 at 17:45, Troy Kisky wrote: > > sata_probe returns 1 for failure, so don't checkout for < 0 > > fixes: f19f1ecb6025 dm: sata: Support driver model with the 'sata' command > > Signed-off-by: Troy Kisky > Thanks! Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 2/2] serial: stm32: Replace setparity by setconfig
Hi Patrice, On 30 July 2018 at 09:23, Patrice Chotard wrote: > Replace stm32_serial_setparity by stm32_serial_setconfig > which allows to set serial bits number, parity and stop > bits number. > Only parity setting is implemented. > > Signed-off-by: Patrick Delaunay > Signed-off-by: Patrice Chotard > --- > > drivers/serial/serial_stm32.c | 21 +++-- > 1 file changed, 15 insertions(+), 6 deletions(-) Looks OK, apart from changes requested in the first patch. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] smbios: fix checkstyle warning
On 30 July 2018 at 05:22, Christian Gmeiner wrote: > Fixes the following checkstyle warning: > > WARNING: Missing a blank line after declarations > + int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++); > + max_struct_size = max(max_struct_size, tmp); > > Signed-off-by: Christian Gmeiner > --- > lib/smbios.c | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [ANN] U-Boot v2018.09-rc1 released
On Tue, Jul 31, 2018 at 12:48:03PM +0200, Michal Simek wrote: > Hi Tom, > > On 31.7.2018 03:49, Tom Rini wrote: > > Hey all, > > > > So it's release day and I've put up v2018.09-rc1. The merge window is > > now closed and I've updated git and the tarballs are also up now. > > > > That said, there's a few things that I expect to come in and I hope > > soon. There's the SPI-NAND series. There's EFI support to Sandbox. > > And there may be at least some amount of the FAT improvement series. > > > > There's also some amount of cleaning up of my patch queue that's still > > needed. > > > > I will follow the usual rule of an -rc every other Monday > > and we're looking at release on September 10th, 2018. > > > > Thanks all! > > FYI: Just wanted to let you know that tag name and tag description is > correct but the Makefile patch subject you have created contains 2017 > year instead of 2018. Bah. I'm just glad I only typo the year once every few years. Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 1/4] misc: docs: Fix comments in misc.h
The comments in misc.h are not in kernel-doc format. Correct the format.
Signed-off-by: Mario Six
---
v3 -> v4:
No changes
v2 -> v3:
New in v3
---
include/misc.h | 84 ++
1 file changed, 44 insertions(+), 40 deletions(-)
diff --git a/include/misc.h b/include/misc.h
index 68f8e64d61a..ce2f05dfd4c 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -6,38 +6,47 @@
#ifndef _MISC_H_
#define _MISC_H_
-/*
- * Read the device to buffer, optional.
- *
+/**
+ * misc_read() - Read the device to buffer, optional.
* @dev: the device
* @offset: offset to read the device
* @buf: pointer to data buffer
* @size: data size in bytes to read the device
- * @return: 0 if OK, -ve on error
+ *
+ * Return: 0 if OK, -ve on error
*/
int misc_read(struct udevice *dev, int offset, void *buf, int size);
-/*
- * Write buffer to the device, optional.
- *
+
+/**
+ * misc_write() - Write buffer to the device, optional.
* @dev: the device
* @offset: offset to write the device
* @buf: pointer to data buffer
* @size: data size in bytes to write the device
- * @return: 0 if OK, -ve on error
+ *
+ * Return: 0 if OK, -ve on error
*/
int misc_write(struct udevice *dev, int offset, void *buf, int size);
-/*
- * Assert command to the device, optional.
- *
+
+/**
+ * misc_ioctl() - Assert command to the device, optional.
* @dev: the device
* @request: command to be sent to the device
* @buf: pointer to buffer related to the request
- * @return: 0 if OK, -ve on error
+ *
+ * Return: 0 if OK, -ve on error
*/
int misc_ioctl(struct udevice *dev, unsigned long request, void *buf);
-/*
- * Send a message to the device and wait for a response.
+/**
+ * misc_call() - Send a message to the device and wait for a response.
+ * @dev: the device.
+ * @msgid: the message ID/number to send.
+ * @tx_msg: the request/transmit message payload.
+ * @tx_size: the size of the buffer pointed at by tx_msg.
+ * @rx_msg: the buffer to receive the response message payload. May be NULL if
+ * the caller only cares about the error code.
+ * @rx_size: the size of the buffer pointed at by rx_msg.
*
* The caller provides the message type/ID and payload to be sent.
* The callee constructs any message header required, transmits it to the
@@ -45,66 +54,61 @@ int misc_ioctl(struct udevice *dev, unsigned long request,
void *buf);
* strips any message header from the response, and returns the error code
* (or a parsed version of it) and the response message payload.
*
- * @dev: the device.
- * @msgid: the message ID/number to send.
- * tx_msg: the request/transmit message payload.
- * tx_size: the size of the buffer pointed at by tx_msg.
- * rx_msg: the buffer to receive the response message payload. May be NULL if
- * the caller only cares about the error code.
- * rx_size: the size of the buffer pointed at by rx_msg.
- * @return the response message size if OK, -ve on error
+ * Return: the response message size if OK, -ve on error
*/
int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
void *rx_msg, int rx_size);
-/*
+/**
* struct misc_ops - Driver model Misc operations
*
* The uclass interface is implemented by all miscellaneous devices which
* use driver model.
*/
struct misc_ops {
- /*
+ /**
* Read the device to buffer, optional.
-*
* @dev: the device
* @offset: offset to read the device
* @buf: pointer to data buffer
* @size: data size in bytes to read the device
-* @return: 0 if OK, -ve on error
+*
+* Return: 0 if OK, -ve on error
*/
int (*read)(struct udevice *dev, int offset, void *buf, int size);
- /*
+
+ /**
* Write buffer to the device, optional.
-*
* @dev: the device
* @offset: offset to write the device
* @buf: pointer to data buffer
* @size: data size in bytes to write the device
-* @return: 0 if OK, -ve on error
+*
+* Return: 0 if OK, -ve on error
*/
int (*write)(struct udevice *dev, int offset, const void *buf,
int size);
- /*
+ /**
* Assert command to the device, optional.
-*
* @dev: the device
* @request: command to be sent to the device
* @buf: pointer to buffer related to the request
-* @return: 0 if OK, -ve on error
+*
+* Return: 0 if OK, -ve on error
*/
int (*ioctl)(struct udevice *dev, unsigned long request, void *buf);
- /*
+
+ /**
* Send a message to the device and wait for a response.
-*
* @dev: the device
* @msgid: the message ID/number to send
-* tx_msg: the request/transmit message payload
-* tx_size: the size of the buffer pointed at by tx_msg
-* rx_msg: the buffer to receive the respons
[U-Boot] [PATCH v4 2/4] misc: uclass: Add enable/disable function
Add generic enable/disable function to the misc uclass.
Reviewed-by: Simon Glass
Signed-off-by: Mario Six
---
v3 -> v4:
No changes
v2 -> v3:
* Now return old state from misc_set_enabled
v1 -> v2:
* Merged the two functions into one function
* Explained the semantics of enabling/disabling more throughly
---
drivers/misc/misc-uclass.c | 10 ++
include/misc.h | 27 +++
2 files changed, 37 insertions(+)
diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
index 0dc62d00344..f240cda5c05 100644
--- a/drivers/misc/misc-uclass.c
+++ b/drivers/misc/misc-uclass.c
@@ -55,6 +55,16 @@ int misc_call(struct udevice *dev, int msgid, void *tx_msg,
int tx_size,
return ops->call(dev, msgid, tx_msg, tx_size, rx_msg, rx_size);
}
+int misc_set_enabled(struct udevice *dev, bool val)
+{
+ const struct misc_ops *ops = device_get_ops(dev);
+
+ if (!ops->set_enabled)
+ return -ENOSYS;
+
+ return ops->set_enabled(dev, val);
+}
+
UCLASS_DRIVER(misc) = {
.id = UCLASS_MISC,
.name = "misc",
diff --git a/include/misc.h b/include/misc.h
index ce2f05dfd4c..50515852b25 100644
--- a/include/misc.h
+++ b/include/misc.h
@@ -60,6 +60,23 @@ int misc_call(struct udevice *dev, int msgid, void *tx_msg,
int tx_size,
void *rx_msg, int rx_size);
/**
+ * misc_set_enabled() - Enable or disable a device.
+ * @dev: the device to enable or disable.
+ * @val: the flag that tells the driver to either enable or disable the device.
+ *
+ * The semantics of "disable" and "enable" should be understood here as
+ * activating or deactivating the device's primary function, hence a "disabled"
+ * device should be dormant, but still answer to commands and queries.
+ *
+ * A probed device may start in a disabled or enabled state, depending on the
+ * driver and hardware.
+ *
+ * Return: -ve on error, 0 if the previous state was "disabled", 1 if the
+ *previous state was "enabled"
+ */
+int misc_set_enabled(struct udevice *dev, bool val);
+
+/*
* struct misc_ops - Driver model Misc operations
*
* The uclass interface is implemented by all miscellaneous devices which
@@ -112,6 +129,16 @@ struct misc_ops {
*/
int (*call)(struct udevice *dev, int msgid, void *tx_msg, int tx_size,
void *rx_msg, int rx_size);
+ /**
+* Enable or disable a device, optional.
+* @dev: the device to enable.
+* @val: the flag that tells the driver to either enable or disable the
+* device.
+*
+* Return: -ve on error, 0 if the previous state was "disabled", 1 if
+* the previous state was "enabled"
+*/
+ int (*set_enabled)(struct udevice *dev, bool val);
};
#endif /* _MISC_H_ */
--
2.11.0
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[U-Boot] [PATCH v4 3/4] test: Add tests for misc uclass
Add a set of tests for the misc uclass.
Signed-off-by: Mario Six
---
v3 -> v4:
New in v4
---
arch/sandbox/dts/test.dts | 4 ++
drivers/misc/Makefile | 2 +-
drivers/misc/misc_sandbox.c | 133
test/dm/Makefile| 1 +
test/dm/misc.c | 83 +++
5 files changed, 222 insertions(+), 1 deletion(-)
create mode 100644 drivers/misc/misc_sandbox.c
create mode 100644 test/dm/misc.c
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 137679abea9..c41375ac225 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -283,6 +283,10 @@
mbox-names = "other", "test";
};
+ misc-test {
+ compatible = "sandbox,misc_sandbox";
+ };
+
mmc2 {
compatible = "sandbox,mmc";
};
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index e2c2b763b7a..5d2336d915f 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -39,7 +39,7 @@ ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SANDBOX) += spltest_sandbox.o
endif
endif
-obj-$(CONFIG_SANDBOX) += syscon_sandbox.o
+obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
diff --git a/drivers/misc/misc_sandbox.c b/drivers/misc/misc_sandbox.c
new file mode 100644
index 000..e4164f76fba
--- /dev/null
+++ b/drivers/misc/misc_sandbox.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include
+#include
+#include
+
+struct misc_sandbox_priv {
+ u8 mem[128];
+ ulong last_ioctl;
+ bool enabled;
+};
+
+int misc_sandbox_read(struct udevice *dev, int offset, void *buf, int size)
+{
+ struct misc_sandbox_priv *priv = dev_get_priv(dev);
+
+ memcpy(buf, priv->mem + offset, size);
+
+ return 0;
+}
+
+int misc_sandbox_write(struct udevice *dev, int offset, const void *buf,
+ int size)
+{
+ struct misc_sandbox_priv *priv = dev_get_priv(dev);
+
+ memcpy(priv->mem + offset, buf, size);
+
+ return 0;
+}
+
+int misc_sandbox_ioctl(struct udevice *dev, unsigned long request, void *buf)
+{
+ struct misc_sandbox_priv *priv = dev_get_priv(dev);
+
+ priv->last_ioctl = request;
+
+ return 0;
+}
+
+int misc_sandbox_call(struct udevice *dev, int msgid, void *tx_msg,
+ int tx_size, void *rx_msg, int rx_size)
+{
+ struct misc_sandbox_priv *priv = dev_get_priv(dev);
+
+ if (msgid == 0) {
+ int num = *(int *)tx_msg;
+
+ switch (num) {
+ case 0:
+ strncpy(rx_msg, "Zero", rx_size);
+ break;
+ case 1:
+ strncpy(rx_msg, "One", rx_size);
+ break;
+ case 2:
+ strncpy(rx_msg, "Two", rx_size);
+ break;
+ default:
+ return -EINVAL;
+ }
+ }
+
+ if (msgid == 1) {
+ int num = *(int *)tx_msg;
+
+ switch (num) {
+ case 0:
+ strncpy(rx_msg, "Forty", rx_size);
+ break;
+ case 1:
+ strncpy(rx_msg, "Forty-one", rx_size);
+ break;
+ case 2:
+ strncpy(rx_msg, "Forty-two", rx_size);
+ break;
+ default:
+ return -EINVAL;
+ }
+ }
+
+ if (msgid == 2)
+ memcpy(rx_msg, &priv->last_ioctl, sizeof(priv->last_ioctl));
+
+ if (msgid == 3)
+ memcpy(rx_msg, &priv->enabled, sizeof(priv->enabled));
+
+ return 0;
+}
+
+int misc_sandbox_set_enabled(struct udevice *dev, bool val)
+{
+ struct misc_sandbox_priv *priv = dev_get_priv(dev);
+
+ priv->enabled = !priv->enabled;
+
+ return 0;
+}
+
+static const struct misc_ops misc_sandbox_ops = {
+ .read = misc_sandbox_read,
+ .write = misc_sandbox_write,
+ .ioctl = misc_sandbox_ioctl,
+ .call = misc_sandbox_call,
+ .set_enabled = misc_sandbox_set_enabled,
+};
+
+int misc_sandbox_probe(struct udevice *dev)
+{
+ struct misc_sandbox_priv *priv = dev_get_priv(dev);
+
+ priv->enabled = true;
+
+ return 0;
+}
+
+static const struct udevice_id misc_sandbox_ids[] = {
+ { .compatible = "sandbox,misc_sandbox" },
+ { }
+};
+
+U_BOOT_DRIVER(misc_sandbox) = {
+ .name = "misc_sandbox",
+ .id = UCLASS_MISC,
+ .ops= &misc_sandbox_ops,
+ .of_match = misc_sandbox_ids,
+ .probe = misc_sandbox_probe,
+ .priv_auto_alloc
[U-Boot] [PATCH v4 4/4] misc: Add gdsys_ioep driver
Add driver for the IHS IO endpoint on IHS FPGAs.
Signed-off-by: Mario Six
---
v3 -> v4:
* Fixed style violations
* Added full documentation
* Added binding file
* Made res/ret variable names consistent
* Improved error checking and error debug output
v2 -> v3:
No changes
v1 -> v2:
* Switched to regmap usage (instead of fpgamap)
---
.../devicetree/bindings/misc/gdsys,io-endpoint.txt | 20 ++
drivers/misc/Kconfig | 5 +
drivers/misc/Makefile | 1 +
drivers/misc/gdsys_ioep.c | 209 +
drivers/misc/gdsys_ioep.h | 137 ++
5 files changed, 372 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt
create mode 100644 drivers/misc/gdsys_ioep.c
create mode 100644 drivers/misc/gdsys_ioep.h
diff --git a/Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt
b/Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt
new file mode 100644
index 000..db2ff8ca128
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt
@@ -0,0 +1,20 @@
+gdsys IO endpoint of IHS FPGA devices
+
+The IO endpoint of IHS FPGA devices is a packet-based transmission interface
+that allows interconnected gdsys devices to send and receive data over the
+FPGA's main ethernet connection.
+
+Required properties:
+- compatible: must be "gdsys,io-endpoint"
+- reg: describes the address and length of the endpoint's register map (within
+ the FPGA's register space)
+
+Example:
+
+fpga0_ep0 {
+ compatible = "gdsys,io-endpoint";
+ reg = <0x020 0x10
+ 0x320 0x10
+ 0x340 0x10
+ 0x360 0x10>;
+};
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index a479e4eec56..89854a4941b 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -284,4 +284,9 @@ config MPC83XX_SERDES
help
Support for serdes found on MPC83xx SoCs.
+config GDSYS_IOEP
+ bool "Enable gdsys IOEP driver"
+ depends on MISC
+ help
+ Support gdsys FPGA's IO endpoint driver.
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 5d2336d915f..b0ef97b6b31 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -55,3 +55,4 @@ obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o
obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
+obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
diff --git a/drivers/misc/gdsys_ioep.c b/drivers/misc/gdsys_ioep.c
new file mode 100644
index 000..7f17095cc58
--- /dev/null
+++ b/drivers/misc/gdsys_ioep.c
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the cmd_ioloop driver/command, which is
+ *
+ * (C) Copyright 2014
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+
+#include "gdsys_ioep.h"
+
+/**
+ * struct gdsys_ioep_priv - Private data structure for IOEP devices
+ * @map: Register map to be used for the device
+ * @state: Flag to keep the current status of the RX control (enabled/disabled)
+ */
+struct gdsys_ioep_priv {
+ struct regmap *map;
+ bool state;
+};
+
+/**
+ * enum last_spec - Convenience enum for read data sanity check
+ * @READ_DATA_IS_LAST: The data to be read should be the final data of the
+ *current packet
+ * @READ_DATA_IS_NOT_LAST: The data to be read should not be the final data of
+ *the current packet
+ */
+enum last_spec {
+ READ_DATA_IS_LAST,
+ READ_DATA_IS_NOT_LAST,
+};
+
+static int gdsys_ioep_set_receive(struct udevice *dev, bool val)
+{
+ struct gdsys_ioep_priv *priv = dev_get_priv(dev);
+ u16 state;
+
+ priv->state = !priv->state;
+
+ if (val)
+ state = CTRL_PROC_RECEIVE_ENABLE;
+ else
+ state = ~CTRL_PROC_RECEIVE_ENABLE;
+
+ gdsys_ioep_set(priv->map, tx_control, state);
+
+ if (val) {
+ /* Set device address to dummy 1 */
+ gdsys_ioep_set(priv->map, device_address, 1);
+ }
+
+ return !priv->state;
+}
+
+static int gdsys_ioep_send(struct udevice *dev, int offset,
+ const void *buf, int size)
+{
+ struct gdsys_ioep_priv *priv = dev_get_priv(dev);
+ int k;
+ u16 *p = (u16 *)buf;
+
+ for (k = 0; k < size; ++k)
+ gdsys_ioep_set(priv->map, transmit_data, *(p++));
+
+ gdsys_ioep_set(priv->map, tx_control, CTRL_PROC_RECEIVE_ENABLE |
+ CTRL_FLUSH_TRANSMIT_BUFFER);
+
+ return 0;
+}
+
+/**
+ * receive_byte_buffer() - Read data from a IOEP device
+ * @dev: The IOEP device to r
[U-Boot] [PATCH] common: fdt: Make fdt_del_subnodes/fdt_del_partition static
These functions are only called in this file that's why make them static
to keep static analysers happy.
Signed-off-by: Michal Simek
---
common/fdt_support.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 1bdd03fddab1..34d2bd59c485 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -725,7 +725,7 @@ struct reg_cell {
unsigned int r1;
};
-int fdt_del_subnodes(const void *blob, int parent_offset)
+static int fdt_del_subnodes(const void *blob, int parent_offset)
{
int off, ndepth;
int ret;
@@ -750,7 +750,7 @@ int fdt_del_subnodes(const void *blob, int parent_offset)
return 0;
}
-int fdt_del_partitions(void *blob, int parent_offset)
+static int fdt_del_partitions(void *blob, int parent_offset)
{
const void *prop;
int ndepth = 0;
--
1.9.1
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Re: [U-Boot] Please pull u-boot-dm
On Mon, Jul 30, 2018 at 02:10:44PM -0600, Simon Glass wrote: > Hi Tom, > > Here are the binman changes, with the rename of the 'pos' property to > 'offset'. > > > The following changes since commit 0e8a8a311020d317fcfcf594e8e3fb1598134593: > > Merge git://git.denx.de/u-boot-fsl-qoriq (2018-07-27 13:09:30 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-dm.git > > for you to fetch changes up to e824c2422356cc9656d714335fc9b7907c3dace7: > > binman: Adjust _GetPropTree() parameters (2018-07-30 10:28:07 -0600) > NAK, this seems to be introducing some failures: binman: Section '/binman/image1': Symbol '_binman_u_boot_any_prop_pos' in entry '/binman/image1/u-boot-spl': No such property 'pos' /home/trini/work/u-boot/u-boot/Makefile:1240: recipe for target 'u-boot-tegra.bin' failed make[1]: *** [u-boot-tegra.bin] Error 1 make[1]: Leaving directory '/tmp/colibri_t30' Makefile:148: recipe for target 'sub-make' failed make: *** [sub-make] Error 2 -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] pico-pi: Add Otavio as maintainer
Update the MAINTAINERS file to list Otavio Salvador as the maintainer for this board. Cc: Otavio Salvador Signed-off-by: Tom Rini --- board/technexion/pico-imx7d/MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/board/technexion/pico-imx7d/MAINTAINERS b/board/technexion/pico-imx7d/MAINTAINERS index 3ab1aa6381c3..0755bd836663 100644 --- a/board/technexion/pico-imx7d/MAINTAINERS +++ b/board/technexion/pico-imx7d/MAINTAINERS @@ -4,3 +4,8 @@ S: Maintained F: board/technexion/pico-imx7d/ F: include/configs/pico-imx7d.h F: configs/pico-imx7d_defconfig + +Technexion PICO-PI-IMX7 +M: Otavio Salvador +S: Maintained +F: configs/pico-pi-imx7d_defconfig -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ls1046ardb: Add qspi_spl variant to the MAINTAINERS file
Signed-off-by: Tom Rini --- board/freescale/ls1046ardb/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS index 79a2290974f4..e4312c7cb2fd 100644 --- a/board/freescale/ls1046ardb/MAINTAINERS +++ b/board/freescale/ls1046ardb/MAINTAINERS @@ -5,6 +5,7 @@ F: board/freescale/ls1046ardb/ F: board/freescale/ls1046ardb/ls1046ardb.c F: include/configs/ls1046ardb.h F: configs/ls1046ardb_qspi_defconfig +F: configs/ls1046ardb_qspi_spl_config F: configs/ls1046ardb_sdcard_defconfig F: configs/ls1046ardb_emmc_defconfig -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] arm: exynos4: fix warning of dts
On Tue, Jul 31, 2018 at 04:12:42PM +0900, Minkyu Kang wrote: > remove this warning: avoid_unnecessary_addr_size > > Signed-off-by: Minkyu Kang > --- > arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 4 > arch/arm/dts/exynos4210-universal_c210.dts | 2 -- > arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 4 > 3 files changed, 10 deletions(-) Here and the rest of the series, have you sent the non -uboot.dtsi portions upstream so that we'll not get them back when we re-sync with Linux? Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 1/2] dm: serial: Replace setparity by setconfig
Hi Simon
On 07/31/2018 01:52 PM, Simon Glass wrote:
> Hi Patrice,
>
> On 30 July 2018 at 09:23, Patrice Chotard wrote:
>> From: Patrick Delaunay
>>
>> Replace setparity by more generic setconfig ops
>> to allow uart parity, bits word length and stop bits
>> number change.
>>
>> Adds SERIAL_GET_PARITY/BITS/STOP macros.
>>
>> Signed-off-by: Patrick Delaunay
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> drivers/serial/serial-uclass.c | 14 ++
>> include/serial.h | 42
>> +++---
>> 2 files changed, 53 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
>> index 321d23ee93bf..9f523751ce17 100644
>> --- a/drivers/serial/serial-uclass.c
>> +++ b/drivers/serial/serial-uclass.c
>> @@ -287,6 +287,18 @@ void serial_setbrg(void)
>> ops->setbrg(gd->cur_serial_dev, gd->baudrate);
>> }
>>
>> +void serial_setconfig(u8 config)
>> +{
>> + struct dm_serial_ops *ops;
>> +
>> + if (!gd->cur_serial_dev)
>> + return;
>> +
>> + ops = serial_get_ops(gd->cur_serial_dev);
>> + if (ops->setconfig)
>> + ops->setconfig(gd->cur_serial_dev, config);
>> +}
>> +
>> void serial_stdio_init(void)
>> {
>> }
>> @@ -398,6 +410,8 @@ static int serial_post_probe(struct udevice *dev)
>> ops->pending += gd->reloc_off;
>> if (ops->clear)
>> ops->clear += gd->reloc_off;
>> + if (ops->setconfig)
>> + ops->setconfig += gd->reloc_off;
>> #if CONFIG_POST & CONFIG_SYS_POST_UART
>> if (ops->loop)
>> ops->loop += gd->reloc_off
>> diff --git a/include/serial.h b/include/serial.h
>> index b9ef6d91c9c5..61c1362e9e32 100644
>> --- a/include/serial.h
>> +++ b/include/serial.h
>> @@ -73,6 +73,39 @@ enum serial_par {
>> SERIAL_PAR_EVEN
>> };
>>
>> +#define SERIAL_PAR_MASK0x03
>> +#define SERIAL_PAR_SHIFT 0
>> +#define SERIAL_GET_PARITY(config) \
>> + ((config & SERIAL_PAR_MASK) >> SERIAL_PAR_SHIFT)
>> +
>> +enum serial_bits {
>> + SERIAL_5_BITS,
>> + SERIAL_6_BITS,
>> + SERIAL_7_BITS,
>> + SERIAL_8_BITS
>> +};
>> +
>> +#define SERIAL_BITS_MASK 0x0C
>> +#define SERIAL_BITS_SHIFT 2
>
> For consistency:
>
> #define SERIAL_BITS_SHIFT 2
> #define SERIAL_BITS_MASK (0x3 << SERIAL_BITS_SHIFT)
Ok
>
>> +#define SERIAL_GET_BITS(config) \
>> + ((config & SERIAL_BITS_MASK) >> SERIAL_BITS_SHIFT)
>> +
>> +enum serial_stop {
>> + SERIAL_HALF_STOP, /* 0.5 stop bit */
>> + SERIAL_ONE_STOP,/* 1 stop bit */
>> + SERIAL_ONE_HALF_STOP, /* 1.5 stop bit */
>> + SERIAL_TWO_STOP /* 2 stop bit */
>> +};
>> +
>> +#define SERIAL_STOP_MASK 0x30
>> +#define SERIAL_STOP_SHIFT 4
>
> same here
ok
>
>> +#define SERIAL_GET_STOP(config) \
>> + ((config & SERIAL_STOP_MASK) >> SERIAL_STOP_SHIFT)
>> +
>> +#define SERIAL_DEFAULT_CONFIG SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \
>> + SERIAL_8_BITS << SERIAL_BITS_SHIFT | \
>> + SERIAL_ONE_STOP << SERIAL_STOP_SHIFT
>> +
>> /**
>>* struct struct dm_serial_ops - Driver model serial operations
>>*
>> @@ -150,15 +183,18 @@ struct dm_serial_ops {
>> int (*loop)(struct udevice *dev, int on);
>> #endif
>> /**
>> -* setparity() - Set up the parity
>> +* setconfig() - Set up the uart configuration
>> +* (parity, 5/6/7/8 bits word length, stop bits)
>> *
>> -* Set up a new parity for this device.
>> +* Set up a new config for this device.
>> *
>> * @dev: Device pointer
>> * @parity: parity to use
>> +* @bits: bits number to use
>> +* @stop: stop bits number to use
>> * @return 0 if OK, -ve on error
>> */
>> - int (*setparity)(struct udevice *dev, enum serial_par parity);
>> + int (*setconfig)(struct udevice *dev, u8 serial_config);
>
> Please make this uint instead of u8. There is no point in using u8
> since the compiler will use a register anyway. It can only make code
> size worse, if the compile add masking, etc.
ok
>
>> };
>>
>> /**
>> --
>> 1.9.1
>>
>
> Also you need a serial_setconfig() function call in the uclass so
> people can call it.
I already add serial_setconfig() function call in serial-uclass at the
beginning of this patch ;-)
>
> Perhaps that could have separate parameters for each setting, so that
> the caller does not have to make up a mask? I'm not sure if that is
> better or not.
Don't know what is better, currently only STM32 platforms will use it,
internally we already use this API.
>
> Also we need to call this from sandbox code for testing purposes,
Ok i will add a test for this.
Thanks
Patrice
>
> Regards,
> Simon
>
__
Re: [U-Boot] [PATCH] dm: Fix CMD_DM enabling
On Tue, Jul 31, 2018 at 1:11 AM, Michal Simek wrote: > The patch "dm: Change CMD_DM enabling" > (sha1: 08a00cba06a7e608ae65e3d7ea225cf8c639429d) was incorrectly updated > and PICO_IMX7D is missing imply CMD_DM and WARP7 has it twice. > This patch is fixing it. > > Signed-off-by: Michal Simek Reviewed-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/27] SPI-NAND support
On Tue, Jul 31, 2018 at 12:59 PM, Jagan Teki wrote:
> On Mon, Jul 30, 2018 at 9:16 PM, Miquel Raynal
> wrote:
>> During the last months, Boris Brezillon shared his work to support
>> serial flashes within Linux. First, he delivered (and merged) a new
>> layer called spi-mem. He also initiated in Linux MTD subsystem the move
>> of all 'raw' NAND related code to a raw/ subdirectory, adding at the
>> same time a NAND core that would be shared with all NAND devices. Then,
>> he contributed a generic SPI-NAND driver, making use of this NAND core,
>> as well as some vendor code to drive a few chips.
>>
>> On top of this work, I added an 'mtd' U-Boot command to handle all sort
>> of MTD devices. This should become the default command instead of having
>> one per flash flavor ('sf', 'nand', 'spi-nand' ?).
>>
>> The series has been tested on an Ocelot board PCB123 (VSC7514),
>> featuring a Macronix SPI NAND chip.
>>
>> TL;DR: the series contains:
>> - A few patches from Linux to resynchronize some areas of the MTD layer.
>> - Various fixes and re-organization of the MTD subsystem.
>> - The introduction of the SPI-mem interface.
>> - The addition of the generic SPI-NAND driver (and its bindings).
>> - Several SPI NAND chip drivers (Macronix, Micron, Winbond).
>> - A new 'mtd' command.
>> - Support for spi-nand devices in mtdparts.
>>
>> To test your SPI-NAND device with U-Boot simply follow these lines:
>>
>>> setenv mtdparts mtdparts=spi-nand0:1m(foo),-(bar)
>>> setenv mtdids spi-nand0=spi-nand0
>>> mtdparts # show the spi-nand device partitions
>>> ubi part bar # create a static UBI volume in the bar partition
>>
>> Thanks,
>> Miquèl
>>
>> Changes since v4:
>> -
>> * Added Jagan's Acked-by tags to every patch related to the
>> SPI-mem/SPI-NAND addition.
>> * Rebased on top of master.
>>
>> Changes since v3:
>> -
>> * Fixed the debug messages in spi-mem to print either Rx or Tx data.
>> * Fixed a Kconfig error that prevented to build mtdparts with plain
>> defconfig.
>> * Fixed a compilation error due to the above error that prevented one
>> file to be compiled.
>> * Adapted the mtd command to probe MTD partitions also.
>> * Declared mtd_probe_devices() in a header so mtdparts or UBI could
>> use it too (to probe all devices and MTD partitions in a clean way).
>> * As I worked on mtdparts, I found annoying and completely useless the
>> fact that we need to prefix the environment variable with
>> "mtdparts=". Canceled this obligation.
>> * Added one patch to allow spi-nand devices to be recognized by mtdparts
>> (this is purely useless but needed to be done in order to use this
>> command).
>> * Removed useless definitions of MTD device types in UBI code.
>> * Wrote a generic mtdparts environment variable parser, used by the mtd
>> command.
>> * Used the mtd_probe_devices() function from get_mtd_info() in
>> cmd/mtdparts.c to be sure the desired partition really does not exist
>> (otherwise it will be probed and then found).
>>
>> Changes since v2:
>> -
>> * Rebased on u-boot master branch.
>> * Removed extra-parenthesis in
>> "mtd: Fallback to ->_read/write() when ->_read/write_oob() is missing"
>> * s/fiels/files/ in "mtd: move NAND fiels into a raw/ subdirectory"
>> * Do not describe generic SPI device properties in SPI NAND bindings.
>> * Changes in the mtd command:
>> * Printing more information in 'mtd list' (device type, device
>> characteristics)
>> * Switch to do_div() instead of '(u32)value64b % value32b' which only
>> worked because value32b was a power of 2.
>> * Removed erase.chip option.
>> * By default, erase/read/write happen on the full MTD device while a
>> dump will only work on a single page.
>>
>> Changes since v1:
>> -
>> * Fixed the nand_memorg structure of the MX35LF2GE4AB chip.
>> * Added Reviewed-by tags from Jagan.
>> * Backported and squashed two patches fixing things in the SPI NAND core
>> received on the Linux ML.
>> * Backported more changes in mtdcore.c from Linux.
>> * Added a patch to add a fallback on mtd->_read/_write() in mtdcore.c
>> when mtd->_read/write_oob() is not supported.
>> * Removed the DT changes, useless as the DTs are not available in
>> mainline yet.
>> * Addressed Boris/Stefan comments on the 'mtd' command.
>> * Added support for multi-pages OOB read/write.
>>
>>
>> Boris Brezillon (7):
>> mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing
>> mtd: Add sanity checks in mtd_write/read_oob()
>> mtd: nand: Add core infrastructure to deal with NAND devices
>> mtd: nand: Pass mode information to nand_page_io_req
>> spi: Extend the core to ease integration of SPI memory controllers
>> mtd: spinand: Add initial support for the MX35LF1GE4AB chip
>> dt-bindings: Add bindings for SPI NAND devices
>>
>> Brian Norris (1):
>> mtd: add get/set of_node/flash_node helpers
>>
>> Ezequiel Garcia (1):
>> mtd: Uninl
[U-Boot] [PATCH v6 0/8] NXP LS1046A SMMU enabling patches
From: Laurentiu Tudor
This patch series adds the required devices setup and device tree
fixups for SMMU enablement on NXP LS1046A chips. The approach taken
tries to mimic the implementation of PAMU LIODN setup on booke powerpc.
First 4 patches contain some fixes and add some missing bits & pieces.
Last 4 patches add the actual infrastructure for ICID setup, qman
portals, fman ICID and SEC configuration.
Changes in v6:
- distinct ICIDs for all SEC blocks (Horia, Bharat)
Changes in v5:
- use distinct ICID for SEC JRs (Horia, Bharat)
- moved an #include in the file it's used (Horia)
- fix broken compilation of multiple targets due to removal of SEC
related config (Horia)
- add a missing #include in qds board file
- drop few uses of CONFIG_SYS_FMAN_V3 and consistently use
CONFIG_SYS_DPAA_FMAN everywhere
Changes in v4:
- added missing SEC ICID config
- updated macro params to match arguments
- supplemental comments
Changes in v3:
- cleaner QMAN_BAR setup
- moved SoC specific bits from generic ICID arch setup to board code
Changes in v2:
- drop CONFIG_SYS_ prefix from newly introduced defines in patch [1/8]
Laurentiu Tudor (8):
armv8: fsl-layerscape: add missing register blocks base address
defines
armv8: ls1046a: advertise QMan v3 in configuration
misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
armv8: fsl-layerscape: add missing debug stream ID
armv8: ls1046a: initial icid setup support
armv8: ls1046a: add icid setup for qman portals
armv8: ls1046a: setup fman ports ICIDs and device tree
armv8: ls1046a: setup SEC ICIDs and fix up device tree
arch/arm/cpu/armv8/fsl-layerscape/Makefile| 1 +
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 192 ++
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 89
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 3 +
.../include/asm/arch-fsl-layerscape/config.h | 1 +
.../asm/arch-fsl-layerscape/fsl_icid.h| 115 +++
.../asm/arch-fsl-layerscape/fsl_portals.h | 24 +++
.../asm/arch-fsl-layerscape/immap_lsch2.h | 15 +-
.../asm/arch-fsl-layerscape/stream_id_lsch2.h | 1 +
board/freescale/ls1046aqds/ls1046aqds.c | 3 +
board/freescale/ls1046ardb/ls1046ardb.c | 3 +
drivers/misc/fsl_portals.c| 45 +++-
12 files changed, 480 insertions(+), 12 deletions(-)
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/icid.c
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
--
2.17.1
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[U-Boot] [PATCH v6 1/8] armv8: fsl-layerscape: add missing register blocks base address defines
From: Laurentiu Tudor Add defines for the edma and qdma register block base addresses. Signed-off-by: Laurentiu Tudor --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 5b4767e0fe..644a16dd30 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -88,8 +88,12 @@ #define LPUART_BASE(CONFIG_SYS_IMMR + 0x0195) +#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c0) + #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x0220) +#define QDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x0738) + #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x40ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x48ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x50ULL -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 3/8] misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
From: Laurentiu Tudor
QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.
Signed-off-by: Laurentiu Tudor
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 3 +--
drivers/misc/fsl_portals.c | 2 --
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 644a16dd30..d22ec70aa5 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -57,8 +57,7 @@
#define CONFIG_SYS_BMAN_SWP_ISDR_REG0x3E80
#define CONFIG_SYS_QMAN_NUM_PORTALS10
#define CONFIG_SYS_QMAN_MEM_BASE 0x5
-#define CONFIG_SYS_QMAN_MEM_PHYS (0xfull + \
- CONFIG_SYS_QMAN_MEM_BASE)
+#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_SYS_QMAN_MEM_SIZE 0x0800
#define CONFIG_SYS_QMAN_SP_CENA_SIZE0x1
#define CONFIG_SYS_QMAN_SP_CINH_SIZE0x1
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 7c22b8d209..22faf16751 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -24,7 +24,6 @@ void setup_qbman_portals(void)
CONFIG_SYS_BMAN_SWP_ISDR_REG;
void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
CONFIG_SYS_QMAN_SWP_ISDR_REG;
-#ifdef CONFIG_PPC
struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
@@ -32,7 +31,6 @@ void setup_qbman_portals(void)
out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
#endif
out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
-#endif
#ifdef CONFIG_FSL_CORENET
int i;
--
2.17.1
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[U-Boot] [PATCH v6 2/8] armv8: ls1046a: advertise QMan v3 in configuration
From: Laurentiu Tudor The QMan IP block in this SoC is version 3.2 so advertise this in the SoC configuration header. Signed-off-by: Laurentiu Tudor --- arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 23faffd9fc..8a05148136 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -257,6 +257,7 @@ #elif defined(CONFIG_ARCH_LS1046A) #define CONFIG_SYS_FMAN_V3 +#define CONFIG_SYS_FSL_QMAN_V3 #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 2 -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 5/8] armv8: ls1046a: initial icid setup support
From: Laurentiu Tudor
Add infrastructure for ICID setup and device tree fixup on ARM
platforms. This include basic ICID setup for several devices.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/Makefile| 1 +
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 110 ++
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 29 +
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 3 +
.../asm/arch-fsl-layerscape/fsl_icid.h| 80 +
board/freescale/ls1046aqds/ls1046aqds.c | 3 +
board/freescale/ls1046ardb/ls1046ardb.c | 3 +
7 files changed, 229 insertions(+)
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/icid.c
create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index 1e9e4680fe..5d6f68aad6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -37,6 +37,7 @@ endif
ifneq ($(CONFIG_ARCH_LS1046A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
+obj-y += icid.o ls1046_ids.o
endif
ifneq ($(CONFIG_ARCH_LS1088A),)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
new file mode 100644
index 00..ae3b8daa95
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+static void set_icid(struct icid_id_table *tbl, int size)
+{
+ int i;
+
+ for (i = 0; i < size; i++)
+ out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
+}
+
+void set_icids(void)
+{
+ /* setup general icid offsets */
+ set_icid(icid_tbl, icid_tbl_sz);
+}
+
+int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids)
+{
+ int i, ret;
+ u32 prop[8];
+
+ /*
+* Note: The "iommus" property definition mentions Stream IDs while
+* this code handles ICIDs. The current implementation assumes that
+* ICIDs and Stream IDs are equal.
+*/
+ for (i = 0; i < num_ids; i++) {
+ prop[i * 2] = cpu_to_fdt32(smmu_ph);
+ prop[i * 2 + 1] = cpu_to_fdt32(ids[i]);
+ }
+ ret = fdt_setprop(blob, off, "iommus",
+ prop, sizeof(u32) * num_ids * 2);
+ if (ret) {
+ printf("WARNING unable to set iommus: %s\n", fdt_strerror(ret));
+ return ret;
+ }
+
+ return 0;
+}
+
+int fdt_fixup_icid_tbl(void *blob, int smmu_ph,
+ struct icid_id_table *tbl, int size)
+{
+ int i, err, off;
+
+ for (i = 0; i < size; i++) {
+ if (!tbl[i].compat)
+ continue;
+
+ off = fdt_node_offset_by_compat_reg(blob,
+ tbl[i].compat,
+ tbl[i].compat_addr);
+ if (off > 0) {
+ err = fdt_set_iommu_prop(blob, off, smmu_ph,
+&tbl[i].id, 1);
+ if (err)
+ return err;
+ } else {
+ printf("WARNING could not find node %s: %s.\n",
+ tbl[i].compat, fdt_strerror(off));
+ }
+ }
+
+ return 0;
+}
+
+int fdt_get_smmu_phandle(void *blob)
+{
+ int noff, smmu_ph;
+
+ noff = fdt_node_offset_by_compatible(blob, -1, "arm,mmu-500");
+ if (noff < 0) {
+ printf("WARNING failed to get smmu node: %s\n",
+ fdt_strerror(noff));
+ return noff;
+ }
+
+ smmu_ph = fdt_get_phandle(blob, noff);
+ if (!smmu_ph) {
+ smmu_ph = fdt_create_phandle(blob, noff);
+ if (!smmu_ph) {
+ printf("WARNING failed to get smmu phandle\n");
+ return -1;
+ }
+ }
+
+ return smmu_ph;
+}
+
+void fdt_fixup_icid(void *blob)
+{
+ int smmu_ph;
+
+ smmu_ph = fdt_get_smmu_phandle(blob);
+ if (smmu_ph < 0)
+ return;
+
+ fdt_fixup_icid_tbl(blob, smmu_ph, icid_tbl, icid_tbl_sz);
+}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
new file mode 100644
index 00..1c528ab751
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include
+#include
+#include
+
+struct icid_id_table icid_tbl[] = {
+#ifdef CONFIG_SYS_DPAA_QBMAN
+ SET_QMAN_ICID(FSL_DPAA1_STREAM_ID_START),
+ SET_BMAN_ICID(FSL_DPAA1_STREAM_ID_START + 1),
+#endif
+
+
[U-Boot] [PATCH v6 4/8] armv8: fsl-layerscape: add missing debug stream ID
From: Laurentiu Tudor Add a define with a value for the missing debug stream ID. Signed-off-by: Laurentiu Tudor --- arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h index 61c6e533c6..1b02d484d9 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h @@ -50,6 +50,7 @@ #define FSL_QDMA_STREAM_ID 7 #define FSL_EDMA_STREAM_ID 8 #define FSL_ETR_STREAM_ID 9 +#define FSL_DEBUG_STREAM_ID10 /* PCI - programmed in PEXn_LUT */ #define FSL_PEX_STREAM_ID_START11 -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 6/8] armv8: ls1046a: add icid setup for qman portals
From: Laurentiu Tudor
Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.
Signed-off-by: Laurentiu Tudor
---
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 16 +++
.../asm/arch-fsl-layerscape/fsl_portals.h | 24 +++
drivers/misc/fsl_portals.c| 43 +++
3 files changed, 75 insertions(+), 8 deletions(-)
create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 1c528ab751..80e1ceadc0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -6,6 +6,22 @@
#include
#include
#include
+#include
+
+#ifdef CONFIG_SYS_DPAA_QBMAN
+struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+ SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
+};
+#endif
struct icid_id_table icid_tbl[] = {
#ifdef CONFIG_SYS_DPAA_QBMAN
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
new file mode 100644
index 00..1577e935a6
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef _FSL_PORTALS_H_
+#define _FSL_PORTALS_H_
+
+struct qportal_info {
+ u16 dicid; /* DQRR ICID */
+ u16 ficid; /* frame data ICID */
+ u16 icid;
+ u8 sdest;
+};
+
+#define SET_QP_INFO(streamid, dest) \
+ { .dicid = (streamid), .ficid = (streamid), .icid = (streamid), \
+ .sdest = (dest) }
+
+extern struct qportal_info qp_info[];
+void fdt_portal(void *blob, const char *compat, const char *container,
+ u64 addr, u32 size);
+
+#endif
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 22faf16751..a524510707 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -13,6 +13,9 @@
#ifdef CONFIG_PPC
#include
#include
+#else
+#include
+#include
#endif
#include
@@ -45,6 +48,22 @@ void setup_qbman_portals(void)
/* set frame liodn */
out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
}
+#else
+#ifdef CONFIG_ARM
+ int i;
+
+ for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
+ u8 sdest = qp_info[i].sdest;
+ u16 ficid = qp_info[i].ficid;
+ u16 dicid = qp_info[i].dicid;
+ u16 icid = qp_info[i].icid;
+
+ out_be32(&qman->qcsp[i].qcsp_lio_cfg, (icid << 16) |
+ dicid);
+ /* set frame icid */
+ out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid);
+ }
+#endif
#endif
/* Change default state of BMan ISDR portals to all 1s */
@@ -178,6 +197,10 @@ void fdt_fixup_qportals(void *blob)
char compat[64];
int compat_len;
+#ifndef CONFIG_PPC
+ int smmu_ph = fdt_get_smmu_phandle(blob);
+#endif
+
maj = (rev_1 >> 8) & 0xff;
min = rev_1 & 0xff;
ip_cfg = rev_2 & 0xff;
@@ -188,7 +211,6 @@ void fdt_fixup_qportals(void *blob)
off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
while (off != -FDT_ERR_NOTFOUND) {
-#ifdef CONFIG_PPC
#ifdef CONFIG_FSL_CORENET
u32 liodns[2];
#endif
@@ -198,12 +220,7 @@ void fdt_fixup_qportals(void *blob)
if (!ci)
goto err;
- i = *ci;
-#ifdef CONFIG_SYS_DPAA_FMAN
- int j;
-#endif
-
-#endif /* CONFIG_PPC */
+ i = fdt32_to_cpu(*ci);
err = fdt_setprop(blob, off, "compatible", compat, compat_len);
if (err < 0)
goto err;
@@ -235,7 +252,7 @@ void fdt_fixup_qportals(void *blob)
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
- for (j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
+ for (int j = 0; j < CONFIG_SYS_NUM_FMAN; j++) {
char name[] = "fman@0";
name[sizeof(name) - 2] = '0' + j;
@@ -251,6 +268,16 @@ void fdt_fixup_qportals(void *blob)
if (err < 0)
goto err;
#endif
+#else
+ if (smmu_ph >= 0) {
+ u32 icids[3];
+
+ icids[0] = qp_info[i].icid;
+ icids[1] = qp_inf
[U-Boot] [PATCH v6 7/8] armv8: ls1046a: setup fman ports ICIDs and device tree
From: Laurentiu Tudor
Add support for ICID setting of fman ports and the required device
tree fixups.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 82 +++
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 30 +++
.../asm/arch-fsl-layerscape/fsl_icid.h| 10 +++
3 files changed, 122 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
index ae3b8daa95..b1a950e7f9 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
static void set_icid(struct icid_id_table *tbl, int size)
{
@@ -19,10 +20,27 @@ static void set_icid(struct icid_id_table *tbl, int size)
out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg);
}
+#ifdef CONFIG_SYS_DPAA_FMAN
+void set_fman_icids(struct fman_icid_id_table *tbl, int size)
+{
+ int i;
+ ccsr_fman_t *fm = (void *)CONFIG_SYS_FSL_FM1_ADDR;
+
+ for (i = 0; i < size; i++) {
+ out_be32(&fm->fm_bmi_common.fmbm_ppid[tbl[i].port_id - 1],
+tbl[i].icid);
+ }
+}
+#endif
+
void set_icids(void)
{
/* setup general icid offsets */
set_icid(icid_tbl, icid_tbl_sz);
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+ set_fman_icids(fman_icid_tbl, fman_icid_tbl_sz);
+#endif
}
int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids)
@@ -75,6 +93,66 @@ int fdt_fixup_icid_tbl(void *blob, int smmu_ph,
return 0;
}
+#ifdef CONFIG_SYS_DPAA_FMAN
+int get_fman_port_icid(int port_id, struct fman_icid_id_table *tbl,
+ const int size)
+{
+ int i;
+
+ for (i = 0; i < size; i++) {
+ if (tbl[i].port_id == port_id)
+ return tbl[i].icid;
+ }
+
+ return -1;
+}
+
+void fdt_fixup_fman_port_icid_by_compat(void *blob, int smmu_ph,
+ const char *compat)
+{
+ int noff, len, icid;
+ const u32 *prop;
+
+ noff = fdt_node_offset_by_compatible(blob, -1, compat);
+ while (noff > 0) {
+ prop = fdt_getprop(blob, noff, "cell-index", &len);
+ if (!prop) {
+ printf("WARNING missing cell-index for fman port\n");
+ continue;
+ }
+ if (len != 4) {
+ printf("WARNING bad cell-index size for fman port\n");
+ continue;
+ }
+
+ icid = get_fman_port_icid(fdt32_to_cpu(*prop),
+ fman_icid_tbl, fman_icid_tbl_sz);
+ if (icid < 0) {
+ printf("WARNING unknown ICID for fman port %d\n",
+ *prop);
+ continue;
+ }
+
+ fdt_set_iommu_prop(blob, noff, smmu_ph, (u32 *)&icid, 1);
+
+ noff = fdt_node_offset_by_compatible(blob, noff, compat);
+ }
+}
+
+void fdt_fixup_fman_icids(void *blob, int smmu_ph)
+{
+ static const char * const compats[] = {
+ "fsl,fman-v3-port-oh",
+ "fsl,fman-v3-port-rx",
+ "fsl,fman-v3-port-tx",
+ };
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(compats); i++)
+ fdt_fixup_fman_port_icid_by_compat(blob, smmu_ph, compats[i]);
+}
+#endif
+
int fdt_get_smmu_phandle(void *blob)
{
int noff, smmu_ph;
@@ -107,4 +185,8 @@ void fdt_fixup_icid(void *blob)
return;
fdt_fixup_icid_tbl(blob, smmu_ph, icid_tbl, icid_tbl_sz);
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+ fdt_fixup_fman_icids(blob, smmu_ph);
+#endif
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 80e1ceadc0..30c7d8d28a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -43,3 +43,33 @@ struct icid_id_table icid_tbl[] = {
};
int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+struct fman_icid_id_table fman_icid_tbl[] = {
+ /* port id, icid */
+ SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0b, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0c, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x0d, FSL_DPAA1_STREAM_ID_END),
+ SET_FMAN_ICID_ENTRY(0x28, FSL_DPAA1_STR
[U-Boot] [PATCH v6 8/8] armv8: ls1046a: setup SEC ICIDs and fix up device tree
From: Laurentiu Tudor
Add support for SEC ICID configuration and apply it for ls1046a.
Also add code to make the necessary device tree fixups.
Signed-off-by: Laurentiu Tudor
---
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 14 +++
.../asm/arch-fsl-layerscape/fsl_icid.h| 25 +++
.../asm/arch-fsl-layerscape/immap_lsch2.h | 8 ++
3 files changed, 47 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 30c7d8d28a..2da9adab5b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -40,6 +40,20 @@ struct icid_id_table icid_tbl[] = {
SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
SET_ETR_ICID(FSL_ETR_STREAM_ID),
SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
+#ifdef CONFIG_FSL_CAAM
+ SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
+ SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
+ SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
+ SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
+ SET_SEC_JR_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 6),
+ SET_SEC_RTIC_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 7),
+ SET_SEC_RTIC_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 8),
+ SET_SEC_RTIC_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 9),
+ SET_SEC_RTIC_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 10),
+ SET_SEC_DECO_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 11),
+ SET_SEC_DECO_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 12),
+ SET_SEC_DECO_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 13),
+#endif
};
int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index 5be50a17ab..a70c866651 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -8,6 +8,7 @@
#include
#include
+#include
struct icid_id_table {
const char *compat;
@@ -82,6 +83,30 @@ void fdt_fixup_icid(void *blob);
#define SET_FMAN_ICID_ENTRY(_port_id, streamid) \
{ .port_id = (_port_id), .icid = (streamid) }
+#define SET_SEC_QI_ICID(streamid) \
+ SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
+ (((streamid) << 16) | (streamid)), \
+ offsetof(ccsr_sec_t, qilcr_ls) + \
+ CONFIG_SYS_FSL_SEC_ADDR, \
+ CONFIG_SYS_FSL_SEC_ADDR)
+
+#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
+ SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \
+ (((streamid) << 16) | (streamid)), \
+ offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
+ CONFIG_SYS_FSL_SEC_ADDR, \
+ FSL_SEC_JR##jr_num##_BASE_ADDR)
+
+#define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \
+ SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
+ offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \
+ CONFIG_SYS_FSL_SEC_ADDR, 0)
+
+#define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \
+ SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \
+ offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \
+ CONFIG_SYS_FSL_SEC_ADDR, 0)
+
extern struct icid_id_table icid_tbl[];
extern struct fman_icid_id_table fman_icid_tbl[];
extern int icid_tbl_sz;
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index d22ec70aa5..be0a6ae363 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -200,10 +200,18 @@ struct sys_info {
#define CONFIG_SYS_FSL_SEC_OFFSET 0x70ull
#define CONFIG_SYS_FSL_JR0_OFFSET 0x71ull
+#define FSL_SEC_JR0_OFFSET CONFIG_SYS_FSL_JR0_OFFSET
+#define FSL_SEC_JR1_OFFSET 0x72ull
+#define FSL_SEC_JR2_OFFSET 0x73ull
+#define FSL_SEC_JR3_OFFSET 0x74ull
#define CONFIG_SYS_FSL_SEC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
#define CONFIG_SYS_FSL_JR0_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
+#define FSL_SEC_JR0_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR0_OFFSET)
+#define FSL_SEC_JR1_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR1_OFFSET)
+#define FSL_SEC_JR2_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR2_OFFSET)
+#define FSL_SEC_JR3_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR3_OFFSET)
/* Device Configuration and Pin Control */
#define DCFG_DCSR_PORCR1 0x0
--
2.17.1
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Re: [U-Boot] boot a bios/uefi with x86_64, without grub
Hi Thierry, On Tue, Jul 31, 2018 at 6:18 PM, Thierry Gayet wrote: > Hi, > > I am working with a board called "up board" ( > http://www.aaeon.com/en/p/up-board-computer-board-for-professional-makers) > from aaeon. > > This card is as tiny as a credit card or a raspberry pi running with a > x86_64 processor. > > It buildin an UEFI BIOS and a MMC memory (no sdcard, no ssd, no sata, no > rom). > > I know this is not really adapt to an embedded usage but i would like to > let my u-boot bootloader loading my gnu/linux kernel (using the bootefi > command) then my linux rootfs (generated by yocto) : > > (UEFI / BIOS) -> (uboot uefi) -> (GNU/Linux kernel) --> (linux rootfs) > > I do not want to use grub or grub uefi if possible. > > My idea is to make a uefi partition on the eMMC memory. > > I am looking for an uboot configuration i can use to compile my bootloader. > > I have make tests with the u-boot-app.efi that i have compiled and set into > an efi paritiion ; i am booting into an usb key first. This is not working > and always stop at the uefi shell... > > Maybe my u-boot-app.efi need to be signed ? No. Since you mentioned the x86 processor is 64-bit, it's hightly possible that you have a 64-bit EFI BIOS. That means you cannot use u-boot-app.efi with this EFI BIOS since u-boot-app.efi is 32-bit. > > Is there a documentation that describe all steps required ? > > Any help welcome in order to solve my use case. Thanks in advance. > You will need try efi-x86_payload64, and boot from there. Note currently there are issues to boot Linux kernel from the U-Boot payload. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to switch QSPI bank
On 04/19/2018 06:53 PM, Calvin Johnson wrote: >> >>> would be better. What this patch currently does can be done with >>> simple env vars, like : >>> >>> setenv boot_bank_1 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf5' >>> setenv boot_bank_2 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf4' >> >> ...if the user knows to env reset those variables after the update (versus >> something that shows up in help), and if they don't get corrupted in a multi- >> user board farm environment, etc. > > Make sense. Thanks! > Calvin, Do you want to stay with env, or still want this patch, or standardize the command? York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] mtd: nand: nand_base: Convert EINVAL into ENOTSUPP
On Fri, Jul 13, 2018 at 9:40 PM, Mylène Josserand wrote: > Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES > is not supported. > > Signed-off-by: Mylène Josserand > --- Applied both. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] board: sun50i: h6: Add OrangePi One Plus initial support
On Mon, Jul 30, 2018 at 2:31 PM, Maxime Ripard wrote: > On Sun, Jul 29, 2018 at 12:03:31AM +0530, Jagan Teki wrote: >> OrangePi One Plus is Allwinner H6 based open-source SBC, >> which support: >> - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 >> - GPU Mali-T720 >> - 1GB LPDDR3 RAM >> - AXP805 PMIC >> - 1Gbps GMAC via RTL8211 >> - USB 2.0 Host, OTG >> - HDMI port >> - 5V/2A DC power supply >> >> Signed-off-by: Jagan Teki > > Acked-by: Maxime Ripard Applied to u-boot-sunxi/master ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to switch QSPI bank
Hi York, > -Original Message- > From: York Sun > Sent: Tuesday, July 31, 2018 8:37 PM > To: Calvin Johnson ; Scott Wood > ; Calvin Johnson > Cc: Jagdish Gediya ; U-Boot Mailing List b...@lists.denx.de> > Subject: Re: [U-Boot] [PATCH] board: freescale: ls1012ardb: Add command to > switch QSPI bank > > On 04/19/2018 06:53 PM, Calvin Johnson wrote: > >> > >>> would be better. What this patch currently does can be done with > >>> simple env vars, like : > >>> > >>> setenv boot_bank_1 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf5' > >>> setenv boot_bank_2 'i2c mw 0x24 0x7 0xfc; i2c mw 0x24 0x3 0xf4' > >> > >> ...if the user knows to env reset those variables after the update > >> (versus something that shows up in help), and if they don't get > >> corrupted in a multi- user board farm environment, etc. > > > > Make sense. Thanks! > > > > Calvin, > > Do you want to stay with env, or still want this patch, or standardize the > command? Ideally, a fully standardized generic command interface supporting all similar platforms with multiple banks as well as other boot sources such as NAND and MMC, is the best option. This patch looks good as an interim solution. Regards Calvin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 8/8] armv8: ls1046a: setup SEC ICIDs and fix up device tree
On 7/31/2018 5:53 PM, laurentiu.tu...@nxp.com wrote: > From: Laurentiu Tudor > > Add support for SEC ICID configuration and apply it for ls1046a. > Also add code to make the necessary device tree fixups. > > Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă [snip] > +#define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \ > + SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \ > + offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \ > + CONFIG_SYS_FSL_SEC_ADDR, 0) > + RTIC nodes have a binding doc in Linux kernel: Documentation/devicetree/bindings/crypto/fsl-sec4.txt Thus, in theory, "fsl,sec-v4.0-rtic-memory" could be used instead of NULL for the compat string. PPC code in arch/powerpc/include/asm/fsl_liodn.h does this. In practice, this won't make any difference until a RTIC kernel driver is added. Regards, Horia ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Latest u-boot-spi.git master branch build breaks
Jagan,
The following Tegra/sandbox builds fail with the latest u-boot-spi.git
master branch:
sandbox:
drivers/mtd/spi/spi_flash_ids.c:113:2: error: expected ‘}’ before ‘{’ token
{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP) },
^
plutux:
medcom-wide:
harmony:
tec:
colibri_t20:
seaboard:
cmd/built-in.o: In function `set_dev':
cmd/nand.c:118: undefined reference to `get_nand_dev_by_index'
cmd/nand.c:121: undefined reference to `nand_curr_device'
(and many other link errors)
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Re: [U-Boot] Latest u-boot-spi.git master branch build breaks
On Tue, Jul 31, 2018 at 9:51 PM, Stephen Warren wrote:
> Jagan,
>
> The following Tegra/sandbox builds fail with the latest u-boot-spi.git
> master branch:
>
> sandbox:
>>
>> drivers/mtd/spi/spi_flash_ids.c:113:2: error: expected ‘}’ before ‘{’
>> token
>> {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
>> WR_QPP) },
>> ^
Yeah, just know i found, fixed the same. thanks for the notice.
Jagan.
--
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] Latest u-boot-spi.git master branch build breaks
On 07/31/2018 10:34 AM, Jagan Teki wrote:
On Tue, Jul 31, 2018 at 9:51 PM, Stephen Warren wrote:
Jagan,
The following Tegra/sandbox builds fail with the latest u-boot-spi.git
master branch:
sandbox:
drivers/mtd/spi/spi_flash_ids.c:113:2: error: expected ‘}’ before ‘{’
token
{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP) },
^
Yeah, just know i found, fixed the same. thanks for the notice.
The Tegra link problems too?
BTW, your email address in doc/git-emailrc (at least in u-boot.git
master branch) bounces.
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Re: [U-Boot] Latest u-boot-spi.git master branch build breaks
On Tue, Jul 31, 2018 at 10:15 PM, Stephen Warren wrote:
> On 07/31/2018 10:34 AM, Jagan Teki wrote:
>>
>> On Tue, Jul 31, 2018 at 9:51 PM, Stephen Warren
>> wrote:
>>>
>>> Jagan,
>>>
>>> The following Tegra/sandbox builds fail with the latest u-boot-spi.git
>>> master branch:
>>>
>>> sandbox:
drivers/mtd/spi/spi_flash_ids.c:113:2: error: expected ‘}’ before ‘{’
token
{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL
|
WR_QPP) },
^
>>
>>
>> Yeah, just know i found, fixed the same. thanks for the notice.
>
>
> The Tegra link problems too?
>
> BTW, your email address in doc/git-emailrc (at least in u-boot.git master
> branch) bounces.
in doc/git-mailrc? about this jt...@openedev.com mail? It's already
updated to jag...@openedev.com
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[U-Boot] Please pull u-boot-mpc85xx master
Tom, The following changes since commit 2547e91dc15e5203e15d4ebde9172174743b14a7: tegra: Indicate that binman makes all three output files (2018-07-26 15:49:40 -0400) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git for you to fetch changes up to 7c176ce687bb35ccdcec123768d235db08674891: Revert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization" (2018-07-27 08:52:13 -0700) Ran Wang (2): Revert "powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization" Revert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization" include/configs/T104xRDB.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - 2 files changed, 2 deletions(-) Travis build passed, log https://travis-ci.org/yorksun/u-boot/builds/409003975 Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] Revert "powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization"
On 06/13/2018 07:46 PM, Ran Wang wrote:
> There was an EHCI endian accessor issue. Now it's fixed by
> commit 9829ce2ff25c ("usb: ehci: Fix accessors for big-endian platforms and
> descriptors").
> Revert commit 0f2296bab141 ("powerpc/p1_p2_rdb_pc: Fix endian access issue on
> EHCI intinalization")
> due to it fix that issue in a wrong way. Actually, on P1 P2 platforms,
> USB EHCI register use little endian.
>
> Signed-off-by: Ran Wang
> ---
Applied to mpc85xx, awaiting upstream. Thanks.
York
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Re: [U-Boot] [PATCH 2/2] Revert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization"
On 06/13/2018 07:46 PM, Ran Wang wrote:
> There was an EHCI endian accessor issue. Now it's fixed by
> commit 9829ce2ff25c ("usb: ehci: Fix accessors for big-endian platforms and
> descriptors")
> Revert commit e6a727fffec7b2002e ("powerpc/T104xRDB: Fix endian access issue
> on EHCI intinalization")
> due to it fix that issue in a wrong way. Actually, on T104x platform,
> USB EHCI register use little endian.
>
> Signed-off-by: Ran Wang
> ---
Applied to mpc85xx, awaiting upstream. Thanks.
York
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Re: [U-Boot] Please pull u-boot-mpc85xx master
Scratch that. I realized I didn't fix the commit messages. Will push another one. York On 07/31/2018 10:12 AM, York Sun wrote: > Tom, > > The following changes since commit 2547e91dc15e5203e15d4ebde9172174743b14a7: > > tegra: Indicate that binman makes all three output files (2018-07-26 > 15:49:40 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-mpc85xx.git > > for you to fetch changes up to 7c176ce687bb35ccdcec123768d235db08674891: > > Revert "powerpc/T104xRDB: Fix endian access issue on EHCI > intinalization" (2018-07-27 08:52:13 -0700) > > > Ran Wang (2): > Revert "powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI > intinalization" > Revert "powerpc/T104xRDB: Fix endian access issue on EHCI > intinalization" > > include/configs/T104xRDB.h | 1 - > include/configs/p1_p2_rdb_pc.h | 1 - > 2 files changed, 2 deletions(-) > > Travis build passed, log > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftravis-ci.org%2Fyorksun%2Fu-boot%2Fbuilds%2F409003975&data=02%7C01%7Cyork.sun%40nxp.com%7C14c12c421deb4d8a7b3308d5f708daba%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636686539764348347&sdata=Viuv5jhwUr4rrCTUOSimz7xlMXGLlKQV%2F%2FLOD1kkojQ%3D&reserved=0 > > Thanks. > > York > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.denx.de%2Flistinfo%2Fu-boot&data=02%7C01%7Cyork.sun%40nxp.com%7C14c12c421deb4d8a7b3308d5f708daba%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636686539764348347&sdata=egsorvmJRUfElsGVoNsb%2Fa4cBABDYv02gnzv4LbImV8%3D&reserved=0 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Please pull u-boot-mpc85xx master
Tom, The following changes since commit 2547e91dc15e5203e15d4ebde9172174743b14a7: tegra: Indicate that binman makes all three output files (2018-07-26 15:49:40 -0400) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git for you to fetch changes up to 9dcb9d763d328da903194d0f14f97d9620a6f52d: Revert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization" (2018-07-31 10:19:42 -0700) Ran Wang (2): Revert "powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization" Revert "powerpc/T104xRDB: Fix endian access issue on EHCI intinalization" include/configs/T104xRDB.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - 2 files changed, 2 deletions(-) Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 4/6] mvebu: select boot device at SoC level
Hi Baruch,
this patch needs to be rebased on git master as it does not apply.
Thanks
Dennis
El lun, 18-06-2018 a las 21:56 +0300, Baruch Siach escribió:
> Move the gdsys Controlcenter DC specific build time kwbimage.cfg
> generation code into the mach-mvebu/ directory to be shared by all
> 32bit
> mvebu platforms.
>
> Remove board specific kwbimage.cfg files, and use the generated one
> instead. These files are all identical, with two exceptions. Clearfog
> and Helios4 use the sdio boot device, whereas all others use spi.
> Update
> the defconfigs for the exceptional boards to generate the same
> kwbimage.cfg as before.
>
> Signed-off-by: Baruch Siach
> ---
> .../a38x => arch/arm/mach-mvebu}/.gitignore | 0
> arch/arm/mach-mvebu/Makefile | 30
> ++
> arch/arm/mach-mvebu/include/mach/config.h | 4 +--
> .../arm/mach-mvebu}/kwbimage.cfg.in | 0
> board/CZ.NIC/turris_omnia/kwbimage.cfg| 12 ---
> board/Marvell/db-88f6720/kwbimage.cfg | 12 ---
> board/Marvell/db-88f6820-amc/kwbimage.cfg | 12 ---
> board/Marvell/db-88f6820-gp/kwbimage.cfg | 12 ---
> board/Marvell/db-mv784mp-gp/kwbimage.cfg | 12 ---
> board/Synology/ds414/kwbimage.cfg | 12 ---
> board/gdsys/a38x/Makefile | 31 ---
>
> board/kobol/helios4/kwbimage.cfg | 13
> board/maxbcm/kwbimage.cfg | 12 ---
> board/solidrun/clearfog/kwbimage.cfg | 12 ---
> board/theadorable/kwbimage.cfg| 12 ---
> configs/clearfog_defconfig| 2 +-
> configs/helios4_defconfig | 2 +-
> 17 files changed, 34 insertions(+), 156 deletions(-)
> rename {board/gdsys/a38x => arch/arm/mach-mvebu}/.gitignore (100%)
> rename {board/gdsys/a38x => arch/arm/mach-mvebu}/kwbimage.cfg.in
> (100%)
> delete mode 100644 board/CZ.NIC/turris_omnia/kwbimage.cfg
> delete mode 100644 board/Marvell/db-88f6720/kwbimage.cfg
> delete mode 100644 board/Marvell/db-88f6820-amc/kwbimage.cfg
> delete mode 100644 board/Marvell/db-88f6820-gp/kwbimage.cfg
> delete mode 100644 board/Marvell/db-mv784mp-gp/kwbimage.cfg
> delete mode 100644 board/Synology/ds414/kwbimage.cfg
> delete mode 100644 board/kobol/helios4/kwbimage.cfg
> delete mode 100644 board/maxbcm/kwbimage.cfg
> delete mode 100644 board/solidrun/clearfog/kwbimage.cfg
> delete mode 100644 board/theadorable/kwbimage.cfg
>
> diff --git a/board/gdsys/a38x/.gitignore b/arch/arm/mach-
> mvebu/.gitignore
> similarity index 100%
> rename from board/gdsys/a38x/.gitignore
> rename to arch/arm/mach-mvebu/.gitignore
> diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-
> mvebu/Makefile
> index ade7b870646f..d907fac3752d 100644
> --- a/arch/arm/mach-mvebu/Makefile
> +++ b/arch/arm/mach-mvebu/Makefile
> @@ -25,6 +25,36 @@ obj-$(CONFIG_ARMADA_375) +=
> ../../../drivers/ddr/marvell/axp/xor.o
> obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o
> obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
> obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
> +
> +extra-y += kwbimage.cfg
> +
> +KWB_REPLACE += BOOT_FROM
> +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),)
> + KWB_CFG_BOOT_FROM=spi
> +endif
> +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),)
> + KWB_CFG_BOOT_FROM=sdio
> +endif
> +
> +ifneq ($(CONFIG_SECURED_MODE_IMAGE),)
> +KWB_REPLACE += CSK_INDEX
> +KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX)
> +
> +KWB_REPLACE += SEC_BOOT_DEV
> +KWB_CFG_SEC_BOOT_DEV=$(patsubst "%",%, \
> + $(if $(findstring
> BOOT_SPI_NOR_FLASH,$(CONFIG_SPL_BOOT_DEVICE)),0x34) \
> + $(if $(findstring
> BOOT_SDIO_MMC_CARD,$(CONFIG_SPL_BOOT_DEVICE)),0x31) \
> + )
> +
> +KWB_REPLACE += SEC_FUSE_DUMP
> +KWB_CFG_SEC_FUSE_DUMP = a38x
> +endif
> +
> +$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \
> + include/config/auto.conf
> + $(Q)sed -ne '$(foreach V,$(KWB_REPLACE),s/^#@$(V)/$(V)
> $(KWB_CFG_$(V))/;)p' \
> + <$< >$(dir $<)$(@F)
> +
> endif # CONFIG_SPL_BUILD
> obj-y+= gpio.o
> obj-y+= mbus.o
> diff --git a/arch/arm/mach-mvebu/include/mach/config.h
> b/arch/arm/mach-mvebu/include/mach/config.h
> index 2acfd3314a68..9f51411e43f1 100644
> --- a/arch/arm/mach-mvebu/include/mach/config.h
> +++ b/arch/arm/mach-mvebu/include/mach/config.h
> @@ -32,12 +32,12 @@
> #endif
>
> /*
> - * By default kwbimage.cfg from board specific folder is used
> + * By default the generated mvebu kwbimage.cfg is used
> * If for some board, different configuration file need to be used,
> * CONFIG_SYS_KWD_CONFIG should be defined in board specific header
> file
> */
> #ifndef CONFIG_SYS_KWD_CONFIG
> -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.c
> fg
> +#define CONFIG_SYS_KWD_CONFIG arch/arm/mach-
> mvebu/kwbimage.cfg
> #endif /* CONFIG_SYS_KWD_CONFIG */
>
> /* Add target to build it au
Re: [U-Boot] [PATCH v2 1/8] Enable CONFIG_BLK and CONFIG_DM_MMC to Kconfig
On 07/26/2018 12:09 AM, Yinbo Zhu wrote: >> >> Thanks your feedback! And the patch 1 is applied then that it reported some >> compiled error, so add patch > >> 2 to fix compile error, and I will only put the patch 3 in front of patch 1, >> Do you think that's okay? > >> Every single patch must be successfully compiled. U-Boot must be functional, >> too. Otherwise, you will face > >> problem when you try to bisect an issue. > >> York > > Hi York > > I had updated the patch order, Could you give me a feedback? > http://patchwork.ozlabs.org/project/uboot/list/?series=&submitter=71513&state=*&q=&archive=both&delegate= > This link doesn't work. It gives me other unrelated patches as well. Please send a new set. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] scsi: ceva: add ls1043a soc support
On 07/09/2018 03:42 AM, peng...@nxp.com wrote:
> From: Peng Ma
>
> Add ahci compatible support for ls1043a soc.
>
> Signed-off-by: Peng Ma
> ---
> depend on:
> patchwork.ozlabs.org/patch/924896/
>
> drivers/ata/sata_ceva.c | 16 +---
> 1 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c
> index 4c9ebe4..39269fe 100644
> --- a/drivers/ata/sata_ceva.c
> +++ b/drivers/ata/sata_ceva.c
> @@ -7,7 +7,6 @@
> #include
> #include
> #include
> -#include
>
> #include
>
> @@ -90,6 +89,7 @@
> enum ceva_soc {
> CEVA_1V84,
> CEVA_LS1012A,
> + CEVA_LS1043A,
> };
>
> struct ceva_sata_priv {
> @@ -98,6 +98,13 @@ struct ceva_sata_priv {
> ulong flag;
> };
>
> +static const struct udevice_id sata_ceva_ids[] = {
> + { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 },
> + { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A },
> + { .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A },
> + { }
> +};
> +
> static int ceva_init_sata(struct ceva_sata_priv *priv)
> {
> ulong base = priv->base;
> @@ -116,6 +123,7 @@ static int ceva_init_sata(struct ceva_sata_priv *priv)
> break;
>
> case CEVA_LS1012A:
> + case CEVA_LS1043A:
> writel(ECC_DIS_ADDR_CH2, ECC_DIS_VAL_CH2);
> writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG);
> writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
> @@ -143,12 +151,6 @@ static int sata_ceva_probe(struct udevice *dev)
> return ahci_probe_scsi(dev, priv->base);
> }
>
> -static const struct udevice_id sata_ceva_ids[] = {
> - { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 },
> - { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A },
> - { }
> -};
> -
Why do you move this structure?
York
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Re: [U-Boot] [PATCH] pico-pi: Add Otavio as maintainer
On Tue, Jul 31, 2018 at 9:49 AM, Tom Rini wrote: > Update the MAINTAINERS file to list Otavio Salvador as the maintainer > for this board. > > Cc: Otavio Salvador > Signed-off-by: Tom Rini Acked-by: Otavio Salvador -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9 9981-7854 Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 9/9] ARM: Odroid XU3: Modify Odroid XU3 config to boot by default from SD card
Hi Lukasz, On 27 July 2018 at 15:26, Lukasz Majewski wrote: > On Fri, 27 Jul 2018 14:42:32 +0530 > Anand Moon wrote: > >> Hi Lukasz, >> >> On 27 July 2018 at 13:54, Lukasz Majewski wrote: >> > On Fri, 27 Jul 2018 08:34:15 +0530 >> > Anand Moon wrote: >> > >> >> Hi Lukasz, >> >> >> >> On 26 July 2018 at 21:23, Lukasz Majewski wrote: >> >> > Hi Anand, >> >> > >> >> >> Hi Lukasz, >> >> >> >> >> >> On 26 July 2018 at 03:55, Lukasz Majewski >> >> >> wrote: >> >> >> > This commit allows by default booting Odroid XU3 from the SD >> >> >> > card (when e.g. eMMC module is not present). >> >> >> > >> >> >> > Signed-off-by: Lukasz Majewski >> >> >> > >> >> >> > --- >> >> >> > >> >> >> > include/configs/odroid_xu3.h | 7 +-- >> >> >> > 1 file changed, 5 insertions(+), 2 deletions(-) >> >> >> > >> >> >> > diff --git a/include/configs/odroid_xu3.h >> >> >> > b/include/configs/odroid_xu3.h index >> >> >> > f495f6219ba9..818a06515cb2 100644 --- >> >> >> > a/include/configs/odroid_xu3.h +++ >> >> >> > b/include/configs/odroid_xu3.h @@ -94,6 +94,9 @@ >> >> >> > #undef CONFIG_SYS_BOARD >> >> >> > #define CONFIG_SYS_BOARD "odroid" >> >> >> > >> >> >> > +#undef CONFIG_SYS_MMC_ENV_DEV >> >> >> > +#define CONFIG_SYS_MMC_ENV_DEV 2 >> >> >> > + >> >> >> > /* Define new extra env settings, including DFU settings */ >> >> >> > #undef CONFIG_EXTRA_ENV_SETTINGS >> >> >> > #define CONFIG_EXTRA_ENV_SETTINGS \ >> >> >> > @@ -105,8 +108,8 @@ >> >> >> > "console=" CONFIG_DEFAULT_CONSOLE "\0"\ >> >> >> > "fdtfile=exynos5422-odroidxu3.dtb\0" \ >> >> >> > "boardname=odroidxu3\0" \ >> >> >> > - "mmcbootdev=0\0" \ >> >> >> > - "mmcrootdev=0\0" \ >> >> >> > + "mmcbootdev=2\0" \ >> >> >> > + "mmcrootdev=1\0" \ >> >> >> > "mmcbootpart=1\0" \ >> >> >> > "mmcrootpart=2\0" \ >> >> >> > "dfu_alt_system="CONFIG_DFU_ALT_SYSTEM \ >> >> >> > -- >> >> >> > 2.11.0 >> >> >> > >> >> >> >> >> >> This changes probably breaks the booting from eMMC on >> >> >> Odroid-XU4 >> >> > >> >> > I suppose, that XU4 is also equipped with SD card slot as XU3. >> >> > >> >> > Nonetheless, as I don't have eMMC card for mine XU3, the only >> >> > way to boot my device is SD card. >> >> > >> >> > If you believe that this may be a problem, then I can drop this >> >> > patch. >> >> > >> >> > Have you checked patches from 1-8? >> >> > Does it work for you? If yes, please send tested-by tag. >> >> > >> >> >> >> Yes you probably need to drop this patch, >> >> I had some tough time recovering my eMMC back to flash new u-boot. >> >> >> >> I have tested my eMMC with default boot.scr its boot good. >> >> Need to modify the boot.scr to boot into SD card. >> > >> > SD card has different layout than eMMC. >> > >> > Despite above - you just shall need to apply patch 9/9 to get the >> > board running from SD card. >> > >> >> Actually SD card are easy to modify and tune with just adding >> setenv mmcrootdev "1" to autoboot.cmd from sdcard. >> >> but with eMMC module it's bit difficult to make this work, > > Ach Ok, I see > > The problem is when you have both attached - the eMMC and SD card. > > In that case I always thought that one shall boot from eMMC and the SD > card shall be used as an extra storage space. > > Also, please keep in mind that IIRC the ROM first tries to boot from > eMMC, so you need BL1, u-boot placed there if it is present. > Can we create a different board initialization file to fine tune the odroid xu3 platform. for example Odroid U3 has # board/samsung/odroid/odroid.c where we can initialize for Odroid XU3 platform boards with following features. board_clock_init board_gpio_init exynos_power_init board_usb_init board_leds Best Regards -Anand ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-sunxi/master
Hi Tom, Please pull this PR. thanks, Jagan. The following changes since commit 5a0007d481c0fcd2d422dd48b2a129dd8e8a272a: Prepare v2017.09-rc1 (2018-07-30 21:47:29 -0400) are available in the Git repository at: git://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to 89a897fc4d78e31332e5899e977d8bf3c82abafa: board: sun50i: h6: Add OrangePi One Plus initial support (2018-07-31 20:50:01 +0530) Icenowy Zheng (14): sunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESS sunxi: add basic memory map definitions of H6 SoC sunxi: change RMR64's RVBAR address for H6 sunxi: change ATF position for H6 sunxi: add config for SPL at 0x2 on H6 sunxi: change GIC address on H6 sunxi: add clock code for H6 sunxi: use sun6i-style watchdog for H6 sunxi: add UART0 setup for H6 sunxi: add MMC support for H6 sunxi: add DRAM support to H6 sunxi: add support for Allwinner H6 SoC sunxi: add support for Pine H64 board video: sunxi: de2: fix SimpleFB node creation when DE2 not probed Jagan Teki (5): phy: sun4i-usb: Call phy_passby even for PHY#0 phy: sun4i-usb: Remove usb_clk_cfg set in probe phy: sun4i-usb: Update PHY#3 rst_mask only for H3_H5 configs: sunxi: Drop CONFIG_SUNXI_USB_PHYS board: sun50i: h6: Add OrangePi One Plus initial support Mylène Josserand (2): mtd: nand: nand_base: Convert EINVAL into ENOTSUPP mtd: nand: sunxi: Return on set_feature only when not ENOTSUPP Simon Baatz (1): sunxi: enable SATA on Banana Pi M2 Berry arch/arm/dts/Makefile | 3 + arch/arm/dts/sun50i-h6-orangepi-one-plus.dts | 150 + arch/arm/dts/sun50i-h6-pine-h64.dts | 185 ++ arch/arm/dts/sun50i-h6.dtsi | 288 + arch/arm/include/asm/arch-sunxi/boot0.h | 4 + arch/arm/include/asm/arch-sunxi/clock.h | 2 + arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h | 320 + arch/arm/include/asm/arch-sunxi/cpu.h | 2 + arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 73 +++ arch/arm/include/asm/arch-sunxi/dram.h| 2 + arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h | 297 + arch/arm/include/asm/arch-sunxi/gpio.h| 1 + arch/arm/include/asm/arch-sunxi/mmc.h | 2 +- arch/arm/include/asm/arch-sunxi/spl.h | 6 +- arch/arm/include/asm/arch-sunxi/timer.h | 2 +- arch/arm/mach-sunxi/Kconfig | 37 +- arch/arm/mach-sunxi/Makefile | 2 + arch/arm/mach-sunxi/board.c | 6 +- arch/arm/mach-sunxi/clock_sun50i_h6.c | 94 +++ arch/arm/mach-sunxi/cpu_info.c| 2 + arch/arm/mach-sunxi/dram_sun50i_h6.c | 755 ++ arch/arm/mach-sunxi/rmr_switch.S | 6 + board/sunxi/MAINTAINERS | 10 + board/sunxi/board.c | 7 + board/sunxi/mksunxi_fit_atf.sh| 10 +- common/spl/Kconfig| 2 +- configs/bananapi_m2_berry_defconfig | 3 + configs/orangepi_one_plus_defconfig | 14 + configs/pine_h64_defconfig| 15 + drivers/mmc/sunxi_mmc.c | 13 +- drivers/mtd/nand/nand_base.c | 4 +- drivers/mtd/nand/sunxi_nand.c | 2 +- drivers/phy/allwinner/phy-sun4i-usb.c | 10 +- drivers/video/sunxi/sunxi_de2.c | 3 + include/configs/sun4i.h | 2 - include/configs/sun50i.h | 7 +- include/configs/sun5i.h | 2 - include/configs/sun6i.h | 2 - include/configs/sun7i.h | 2 - include/configs/sun8i.h | 10 - include/configs/sunxi-common.h| 24 +- include/dt-bindings/clock/sun50i-h6-ccu.h | 125 include/dt-bindings/clock/sun50i-h6-r-ccu.h | 24 + include/dt-bindings/reset/sun50i-h6-ccu.h | 73 +++ include/dt-bindings/reset/sun50i-h6-r-ccu.h | 17 + scripts/config_whitelist.txt | 1 - 46 files changed, 2560 insertions(+), 61 deletions(-) create mode 100644 arch/arm/dts/sun50i-h6-orangepi-one-plus.dts create mode 100644 arch/arm/dts/sun50i-h6-pine-h64.dts create mode 100644 arch/arm/dts/sun50i-h6.dtsi create mode 100644 arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h create mode 100644 arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h create mode 100644 arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h create mode 100644 arch/arm/mach-sunxi/clock_sun50i_h6.c create mode 100644 arch/arm/mach-sunxi/dram_sun50i_
[U-Boot] [PATCH] ARM: tegra: align carveout size
From: Stephen Warren Align the size of the carveout region to 2M. This ensures that the size can be accurately represented by an LPAE page table that uses sections. This solves a bug (hang at boot time soon after printing the DRAM size) that only shows up when the following two commits are merged together: d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported 6e584e633d10 ARM: tegra: avoid using secure carveout RAM Cc: Mark Kettenis Cc: Alexander Graf Signed-off-by: Stephen Warren --- This should be applied quickly since it fixes a regression that causes all boots to fail, which in turn causes test/py to reset and "reflash" the target board for each test, which causes the test to take eons. arch/arm/mach-tegra/board2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 5ecadf705e7e..421a71b3014d 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -252,7 +252,7 @@ static ulong carveout_size(void) #elif defined(CONFIG_ARMV7_SECURE_RESERVE_SIZE) // BASE+SIZE might not == 4GB. If so, we want the carveout to cover // from BASE to 4GB, not BASE to BASE+SIZE. - return (0 - CONFIG_ARMV7_SECURE_BASE); + return (0 - CONFIG_ARMV7_SECURE_BASE) & ~(SZ_2M - 1); #else return 0; #endif -- 2.18.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ARM: tegra: avoid more operations in non-secure world
From: Stephen Warren
A secure monitor that runs before U-Boot, and hence causes U-Boot to run
in non-secure world, must implement a few operations that U-Boot
otherwise implements when running in secure world. Fix U-Boot to skip
these operations when running in non-secure world. In particular:
- The secure monitor must provide the LP0 resume code and own LP0
configuration in order to maintain security, so must initialize all
the PMC scratch registers used by the boot ROM during LP0 resume.
Consequently, U-Boot should not attempt to clear those registers,
since the register accesses will fail or cause an error.
- The secure monitor owns system security, and so is responsible for
configuring security-related items such as the VPR.
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/ap.c | 9 +++--
arch/arm/mach-tegra/gpu.c | 18 --
2 files changed, 19 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index bf8001d9db09..84c20a48ad4d 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -155,8 +155,13 @@ static void init_pmc_scratch(void)
int i;
/* SCRATCH0 is initialized by the boot ROM and shouldn't be cleared */
- for (i = 0; i < 23; i++)
- writel(0, &pmc->pmc_scratch1+i);
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+ if (!tegra_cpu_is_non_secure())
+#endif
+ {
+ for (i = 0; i < 23; i++)
+ writel(0, &pmc->pmc_scratch1 + i);
+ }
/* ODMDATA is for kernel use to determine RAM size, LP config, etc. */
odmdata = get_odmdata();
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
index 2e203f735bf3..e047f678211d 100644
--- a/arch/arm/mach-tegra/gpu.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
@@ -18,12 +19,17 @@ void tegra_gpu_config(void)
{
struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
- /* Turn VPR off */
- writel(0, &mc->mc_video_protect_size_mb);
- writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
- &mc->mc_video_protect_reg_ctrl);
- /* read back to ensure the write went through */
- readl(&mc->mc_video_protect_reg_ctrl);
+#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+ if (!tegra_cpu_is_non_secure())
+#endif
+ {
+ /* Turn VPR off */
+ writel(0, &mc->mc_video_protect_size_mb);
+ writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
+ &mc->mc_video_protect_reg_ctrl);
+ /* read back to ensure the write went through */
+ readl(&mc->mc_video_protect_reg_ctrl);
+ }
debug("configured VPR\n");
--
2.18.0
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[U-Boot] [PATCH] openrd: Mark as Orphaned
After talking with Albert, mark these boards as orphaned as he no longer has one. Cc: Albert ARIBAUD Cc: Vagrant Cascadian Cc: Chris Packham Signed-off-by: Tom Rini --- board/Marvell/openrd/MAINTAINERS | 10 +++--- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/board/Marvell/openrd/MAINTAINERS b/board/Marvell/openrd/MAINTAINERS index 3789a04c8917..b24fff0a783e 100644 --- a/board/Marvell/openrd/MAINTAINERS +++ b/board/Marvell/openrd/MAINTAINERS @@ -1,12 +1,8 @@ -OPENRD BOARD -M: Albert ARIBAUD -S: Maintained +OPENRD / OPENRD_CLIENT BOARD +#M:Albert ARIBAUD +S: Orphaned (Since 2018-09) F: board/Marvell/openrd/ F: include/configs/openrd.h F: configs/openrd_base_defconfig - -OPENRD_CLIENT BOARD -M: Albert ARIBAUD -S: Maintained F: configs/openrd_client_defconfig F: configs/openrd_ultimate_defconfig -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] .travis.yml: Exclude kirkwood machines from the arm926ejs job
We have a specific job for kirkwood platforms so exclude them from this job. Signed-off-by: Tom Rini --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 7b0eb6e4f6b5..9c53c4fe219d 100644 --- a/.travis.yml +++ b/.travis.yml @@ -153,7 +153,7 @@ matrix: - BUILDMAN="arm11 arm7 arm920t arm946es" - env: - JOB="arm926ejs" - BUILDMAN="arm926ejs -x mx,siemens,atmel" + BUILDMAN="arm926ejs -x mx,siemens,atmel,kirkwood" - env: - BUILDMAN="atmel" - env: -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Regression due to "efi_loader: efi_allocate_pages is too restrictive"
Commit aa909462d018 "efi_loader: efi_allocate_pages is too restrictive" causes a failure (synchronous abort) in the command "dhcp zImage" on board p2371-2180 (Jetson TX1). Reverting this commit alone solves the problem. According to the exception dump, elr/pc is in efi_allocate_pages(), which makes sense given the content of the patch. Do you have any ideas? Thanks. Failure log: U-Boot 2018.07-00378-gaa909462d018 (Jul 31 2018 - 13:06:57 -0600) TEGRA210 Model: NVIDIA P2371-2180 Board: NVIDIA P2371-2180 DRAM: 3.5 GiB MMC: sdhci@700b: 1, sdhci@700b0600: 0 Loading Environment from MMC... *** Warning - bad CRC, using default environment Failed (-5) In:serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Tegra210 (P2371-2180) # pci enum Tegra210 (P2371-2180) # dhcp zImage Warning: eth_rtl8169 using MAC address from ROM BOOTP broadcast 1 DHCP client bound to address 10.20.204.52 (2 ms) Using eth_rtl8169 device TFTP from server 10.20.204.51; our IP address is 10.20.204.52 Filename 'zImage'. Load address: 0x8008 Loading: "Synchronous Abort" handler, esr 0x9644 elr: 8015a8b0 lr : 8015a8a8 (reloc) elr: dff6f8b0 lr : dff6f8a8 x0 : x1 : 00017000 x2 : dda2dc20 x3 : 8000 x4 : x5 : x6 : 0015 x7 : dda1cf58 x8 : dda36030 x9 : 0008 x10: x11: dda1c774 x12: x13: dda1c768 x14: 0004 x15: x16: 2080 x17: 0001 x18: dda22dd0 x19: 0001 x20: dda1d048 x21: dff8dcae x22: dff97823 x23: dff9c000 x24: dffed000 x25: dffed5b4 x26: x27: dffef000 x28: dffef000 x29: dda1cff0 Resetting CPU ... ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/27] SPI-NAND support
Hi Jagan, On Tue, 31 Jul 2018 20:03:47 +0530 Jagan Teki wrote: > > Applied to u-boot-spi/master > > Look like we have some build issues [1]? Yep, I reproduced the issue. Looks like u-boot Makefile hierarchy is a bit different from Linux one, and patch is breaking raw/parallel NAND build. I fixed it up (see below diff). This diff should be merged in patch 9, and you'll have to fix a few conflicts when rebasing. Here is a branch [1] containing this fixup commit (placed just after the offending one) in case you want to check the end result. Regards, Boris [1]https://github.com/bbrezillon/u-boot/commits/wip-spi --->8--- diff --git a/Makefile b/Makefile index 884b7d943cf7..a38146003d77 100644 --- a/Makefile +++ b/Makefile @@ -685,7 +685,7 @@ libs-y += drivers/dma/ libs-y += drivers/gpio/ libs-y += drivers/i2c/ libs-y += drivers/mtd/ -libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/ +libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/raw/ libs-y += drivers/mtd/onenand/ libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/ libs-y += drivers/mtd/spi/ diff --git a/drivers/Makefile b/drivers/Makefile index 276e5ee4d7ee..ccd1b648d058 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/ obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/ obj-$(CONFIG_$(SPL_TPL_)LED) += led/ obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/ -obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/ +obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/raw/ obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/ obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/ obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/ diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 8b2d0e118d1c..69f40d15635d 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -1,3 +1,2 @@ # SPDX-License-Identifier: GPL-2.0+ -obj-$(CONFIG_MTD_NAND) += raw/ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] efi_loader: don't allocate unusable RAM
From: Stephen Warren
Some boards define a maximum usable RAM top that's more restrictive than
the ranges defined by U-Boot's memory bank definitions[1]. In this case,
the unusable RAM isn't mapped in the page tables, and so the EFI code must
not attempt to allocate RAM from outside the usable regions. Fix
efi_find_free_memory() to detect when max_addr is unconstrained or out of
range, and substitue a valid value.
[1] For example, when some peripherals can't access RAM above 4GiB, it's
simplest to force U-Boot's ram_top to a smaller value to avoid dealing
with this issue more explicitly. However, the RAM bank definitions still
describe the unusable RAM so that the booted OS has access to it, since
the OS can typically deal with such restrictions in a more complex
manner.
Fixes: aa909462d018 "efi_loader: efi_allocate_pages is too restrictive"
Cc: Heinrich Schuchardt
Cc: Alexander Graf
Signed-off-by: Stephen Warren
---
lib/efi_loader/efi_memory.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 967c3f733e4c..5064ff2ccbe8 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -251,6 +251,9 @@ static uint64_t efi_find_free_memory(uint64_t len, uint64_t
max_addr)
{
struct list_head *lhandle;
+ if ((max_addr == -1ULL) || (max_addr > gd->ram_top))
+ max_addr = gd->ram_top;
+
list_for_each(lhandle, &efi_mem) {
struct efi_mem_list *lmem = list_entry(lhandle,
struct efi_mem_list, link);
--
2.18.0
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Re: [U-Boot] [PATCH v5 00/27] SPI-NAND support
On Tue, 31 Jul 2018 21:25:53 +0200 Boris Brezillon wrote: > Hi Jagan, > > On Tue, 31 Jul 2018 20:03:47 +0530 > Jagan Teki wrote: > > > > Applied to u-boot-spi/master > > > > Look like we have some build issues [1]? > > Yep, I reproduced the issue. Looks like u-boot Makefile hierarchy is a > bit different from Linux one, and patch is breaking raw/parallel NAND > build. I fixed it up (see below diff). This diff should be merged in > patch 9, and you'll have to fix a few conflicts when rebasing. Here is > a branch [1] containing this fixup commit (placed just after the > offending one) in case you want to check the end result. > New diff, this time with all tree-wide s/drivers\/mtd\/nand/drivers\/mtd\/nand\/raw/ My branch has been updated accordingly. --->8--- diff --git a/MAINTAINERS b/MAINTAINERS index fe8423530c10..db3db2ec8a43 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -281,7 +281,7 @@ F: drivers/i2c/i2c-cdns.c F: drivers/i2c/muxes/pca954x.c F: drivers/i2c/zynq_i2c.c F: drivers/mmc/zynq_sdhci.c -F: drivers/mtd/nand/zynq_nand.c +F: drivers/mtd/nand/raw/zynq_nand.c F: drivers/net/phy/xilinx_phy.c F: drivers/net/zynq_gem.c F: drivers/serial/serial_zynq.c @@ -305,7 +305,7 @@ F: drivers/i2c/i2c-cdns.c F: drivers/i2c/muxes/pca954x.c F: drivers/i2c/zynq_i2c.c F: drivers/mmc/zynq_sdhci.c -F: drivers/mtd/nand/zynq_nand.c +F: drivers/mtd/nand/raw/zynq_nand.c F: drivers/net/phy/xilinx_phy.c F: drivers/net/zynq_gem.c F: drivers/serial/serial_zynq.c @@ -441,7 +441,7 @@ NAND FLASH #M:Scott Wood S: Orphaned (Since 2018-07) T: git git://git.denx.de/u-boot-nand-flash.git -F: drivers/mtd/nand/ +F: drivers/mtd/nand/raw/ NDS32 M: Macpaul Lin diff --git a/Makefile b/Makefile index 884b7d943cf7..a38146003d77 100644 --- a/Makefile +++ b/Makefile @@ -685,7 +685,7 @@ libs-y += drivers/dma/ libs-y += drivers/gpio/ libs-y += drivers/i2c/ libs-y += drivers/mtd/ -libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/ +libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/raw/ libs-y += drivers/mtd/onenand/ libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/ libs-y += drivers/mtd/spi/ diff --git a/README b/README index aee0f7371c42..fd5034ce91f2 100644 --- a/README +++ b/README @@ -3264,8 +3264,8 @@ Low Level (hardware related) configuration options: a 16 bit bus. Not all NAND drivers use this symbol. Example of drivers that use it: - - drivers/mtd/nand/ndfc.c - - drivers/mtd/nand/mxc_nand.c + - drivers/mtd/nand/raw/ndfc.c + - drivers/mtd/nand/raw/mxc_nand.c - CONFIG_SYS_NDFC_EBC0_CFG Sets the EBC0_CFG register for the NDFC. If not defined @@ -3382,7 +3382,7 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_NAND_NO_SUBPAGE_WRITE Option to disable subpage write in NAND driver driver that uses this: - drivers/mtd/nand/davinci_nand.c + drivers/mtd/nand/raw/davinci_nand.c Freescale QE/FMAN Firmware Support: --- diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 8ffb9a8d3c2c..1b871c62ced2 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -12,7 +12,7 @@ #include #include #include -#include <../drivers/mtd/nand/denali.h> +#include <../drivers/mtd/nand/raw/denali.h> #include "init.h" diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 2af26a881af0..7bf7a2354221 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -479,7 +479,7 @@ config SPL_NAND_SUPPORT help Enable support for NAND (Negative AND) flash in SPL. NAND flash can be used to allow SPL to load U-Boot from supported devices. - This enables the drivers in drivers/mtd/nand as part of an SPL + This enables the drivers in drivers/mtd/nand/raw as part of an SPL build. config SPL_NET_SUPPORT diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index ba60a3a3c505..0016d4973905 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -2,7 +2,7 @@ /* * Copyright (C) 2011 OMICRON electronics GmbH * - * based on drivers/mtd/nand/nand_spl_load.c + * based on drivers/mtd/nand/raw/nand_spl_load.c * * Copyright (C) 2011 * Heiko Schocher, DENX Software Engineering, h...@denx.de. diff --git a/doc/README.SPL b/doc/README.SPL index 3ba313caa8f7..fc1ca1ad4f51 100644 --- a/doc/README.SPL +++ b/doc/README.SPL @@ -57,11 +57,11 @@ CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o) CONFIG_SPL_EXT_SUPPORT CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o) CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o) -CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o) +CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/raw/libnand.o) CONFIG_SPL_DRIVERS_MISC_SUPPORT (drivers/misc
Re: [U-Boot] [PATCH] efi_loader: don't allocate unusable RAM
> Am 31.07.2018 um 21:44 schrieb Stephen Warren :
>
> From: Stephen Warren
>
> Some boards define a maximum usable RAM top that's more restrictive than
> the ranges defined by U-Boot's memory bank definitions[1]. In this case,
> the unusable RAM isn't mapped in the page tables, and so the EFI code must
> not attempt to allocate RAM from outside the usable regions. Fix
> efi_find_free_memory() to detect when max_addr is unconstrained or out of
> range, and substitue a valid value.
>
> [1] For example, when some peripherals can't access RAM above 4GiB, it's
> simplest to force U-Boot's ram_top to a smaller value to avoid dealing
> with this issue more explicitly. However, the RAM bank definitions still
> describe the unusable RAM so that the booted OS has access to it, since
> the OS can typically deal with such restrictions in a more complex
> manner.
That's what we have the efi bounce buffers for. Can't we just enable those for
tegra?
Alex
>
> Fixes: aa909462d018 "efi_loader: efi_allocate_pages is too restrictive"
> Cc: Heinrich Schuchardt
> Cc: Alexander Graf
> Signed-off-by: Stephen Warren
> ---
> lib/efi_loader/efi_memory.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
> index 967c3f733e4c..5064ff2ccbe8 100644
> --- a/lib/efi_loader/efi_memory.c
> +++ b/lib/efi_loader/efi_memory.c
> @@ -251,6 +251,9 @@ static uint64_t efi_find_free_memory(uint64_t len,
> uint64_t max_addr)
> {
>struct list_head *lhandle;
>
> +if ((max_addr == -1ULL) || (max_addr > gd->ram_top))
> +max_addr = gd->ram_top;
> +
>list_for_each(lhandle, &efi_mem) {
>struct efi_mem_list *lmem = list_entry(lhandle,
>struct efi_mem_list, link);
> --
> 2.18.0
>
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