Re: [U-Boot] Patman - Submitting to mailing list
Hi Duncan, On Fri, Sep 29, 2017 at 10:05 AM, Duncan Hare wrote: > Get the following message from running tools/patman/pathan.py > git: 'send-email' is not a git command. See 'git --help'. > > What do I need to do? Duncan Hare (I'm assuming your using some variant of GNU/Linux) For Ubuntu (not sure about other Debian derivatives) most of the git commands are in the 'git-core' package but send-email is part of the 'git-email' package so it could be an apt-get install git-email away. Failing that is git installed at an odd path? Or did you install git from source? I know git-send-email is implemented in perl so it automagically drops send-email out when perl is not present at build time. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA programming interface
On Isn, 2017-09-25 at 11:03 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add code necessary into the FPGA driver framework in U-Boot
> > so it can be used via the 'fpga' command for programing Arria 10
> > SoCFPGA.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> [...]
>
> >
> > +#if defined(CONFIG_CMD_FPGA_LOADFS)
> > +int altera_loadfs(Altera_desc *desc, const void *buf, size_t
> > bsize,
> > + fpga_fs_info *fpga_fsinfo)
> > +{
> > + const struct altera_fpga *fpga = altera_desc_to_fpga(desc,
> > __func__);
> > +
> > + if (!fpga)
> > + return FPGA_FAIL;
> > +
> > + debug_cond(FPGA_DEBUG, "%s: Launching the %s FS
> > Loader...\n",
> > + __func__, fpga->name);
> > + if (fpga->loadfs)
> > + return fpga->loadfs(desc, buf, bsize,
> > fpga_fsinfo);
> > + return 0;
> return -EINVAL , since the loader could not be started ?
>
Okay.
> >
> > +}
> > +#endif
> [...]
>
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Re: [U-Boot] [PATCH v3 4/7] armv8: ls1043ardb: Use static DDR setting for SPL boot
Hi York,
This board has soldered DDR chips. To reduce the SPL image size,
use static DDR setting instead of dynamic DDR driver.
I'm just wondering - since your board supports FIT in SPL, maybe it
would be good to have a binary blob with DDR RAM settings embedded into it?
Then you would be able to provide "hardcoded" SDRAM setup via it?
In this way it could be easily replaceable?
Signed-off-by: York Sun
---
Changes in v3:
Minor cosmetic fix.
Changes in v2:
Drop checking secure boot in this patch after rebasing to latest mater.
Recent change in SPL makes the image size bigger.
board/freescale/ls1043ardb/ddr.c | 46 +++
board/freescale/ls1043ardb/ddr.h | 69
include/configs/ls1043ardb.h | 6 ++--
3 files changed, 118 insertions(+), 3 deletions(-)
diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c
index 354b864..fc0c1f6 100644
--- a/board/freescale/ls1043ardb/ddr.c
+++ b/board/freescale/ls1043ardb/ddr.c
@@ -169,18 +169,64 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
return 0;
}
+#else
+
+phys_size_t fixed_sdram(void)
+{
+ int i;
+ char buf[32];
+ fsl_ddr_cfg_regs_t ddr_cfg_regs;
+ phys_size_t ddr_size;
+ ulong ddr_freq, ddr_freq_mhz;
+
+ ddr_freq = get_ddr_freq(0);
+ ddr_freq_mhz = ddr_freq / 100;
+
+ printf("Configuring DDR for %s MT/s data rate\n",
+ strmhz(buf, ddr_freq));
+
+ for (i = 0; fixed_ddr_parm_0[i].max_freq > 0; i++) {
+ if ((ddr_freq_mhz > fixed_ddr_parm_0[i].min_freq) &&
+ (ddr_freq_mhz <= fixed_ddr_parm_0[i].max_freq)) {
+ memcpy(&ddr_cfg_regs,
+ fixed_ddr_parm_0[i].ddr_settings,
+ sizeof(ddr_cfg_regs));
+ break;
+ }
+ }
+
+ if (fixed_ddr_parm_0[i].max_freq == 0)
+ panic("Unsupported DDR data rate %s MT/s data rate\n",
+ strmhz(buf, ddr_freq));
+
+ ddr_size = (phys_size_t)2048 * 1024 * 1024;
+ fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0);
+
+ return ddr_size;
+}
#endif
int fsl_initdram(void)
{
phys_size_t dram_size;
+#ifdef CONFIG_SYS_DDR_RAW_TIMING
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)
puts("Initializing DDR\n");
dram_size = fsl_ddr_sdram();
#else
dram_size = fsl_ddr_sdram_size();
#endif
+#else
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL)
+ puts("Initialzing DDR using fixed setting\n");
+ dram_size = fixed_sdram();
+#else
+ gd->ram_size = 0x8000;
+
+ return 0;
+#endif
+#endif
erratum_a008850_post();
#ifdef CONFIG_FSL_DEEP_SLEEP
diff --git a/board/freescale/ls1043ardb/ddr.h b/board/freescale/ls1043ardb/ddr.h
index a77ddf3..6bc0eb6 100644
--- a/board/freescale/ls1043ardb/ddr.h
+++ b/board/freescale/ls1043ardb/ddr.h
@@ -45,4 +45,73 @@ static const struct board_specific_parameters *udimms[] = {
udimm0,
};
+#ifndef CONFIG_SYS_DDR_RAW_TIMING
+fsl_ddr_cfg_regs_t ddr_cfg_regs_1600 = {
+ .cs[0].bnds = 0x007F,
+ .cs[1].bnds = 0,
+ .cs[2].bnds = 0,
+ .cs[3].bnds = 0,
+ .cs[0].config = 0x80040322,
+ .cs[0].config_2 = 0,
+ .cs[1].config = 0,
+ .cs[1].config_2 = 0,
+ .cs[2].config = 0,
+ .cs[3].config = 0,
+ .timing_cfg_3 = 0x010C1000,
+ .timing_cfg_0 = 0x91550018,
+ .timing_cfg_1 = 0xBBB48C42,
+ .timing_cfg_2 = 0x0048C111,
+ .ddr_sdram_cfg = 0xC50C0008,
+ .ddr_sdram_cfg_2 = 0x00401100,
+ .ddr_sdram_cfg_3 = 0,
+ .ddr_sdram_mode = 0x03010210,
+ .ddr_sdram_mode_2 = 0,
+ .ddr_sdram_mode_3 = 0x00010210,
+ .ddr_sdram_mode_4 = 0,
+ .ddr_sdram_mode_5 = 0x00010210,
+ .ddr_sdram_mode_6 = 0,
+ .ddr_sdram_mode_7 = 0x00010210,
+ .ddr_sdram_mode_8 = 0,
+ .ddr_sdram_mode_9 = 0x0500,
+ .ddr_sdram_mode_10 = 0x0400,
+ .ddr_sdram_mode_11 = 0x0400,
+ .ddr_sdram_mode_12 = 0x0400,
+ .ddr_sdram_mode_13 = 0x0400,
+ .ddr_sdram_mode_14 = 0x0400,
+ .ddr_sdram_mode_15 = 0x0400,
+ .ddr_sdram_mode_16 = 0x0400,
+ .ddr_sdram_interval = 0x18600618,
+ .ddr_data_init = 0xDEADBEEF,
+ .ddr_sdram_clk_cntl = 0x0300,
+ .ddr_init_addr = 0,
+ .ddr_init_ext_addr = 0,
+ .timing_cfg_4 = 0x0002,
+ .timing_cfg_5 = 0x03401400,
+ .timing_cfg_6 = 0,
+ .timing_cfg_7 = 0x1330,
+ .timing_cfg_8 = 0x02115600,
+ .timing_cfg_9 = 0,
+ .ddr_zq_cntl = 0x8A090705,
+ .ddr_wrlvl_cntl = 0x8675F607,
+ .ddr_wrlvl_cntl_2 = 0x07090800,
+ .ddr_wrlvl_cntl_3 = 0,
+ .ddr_sr_cntr = 0,
+ .ddr_sdram_rcw_1 = 0,
+ .ddr_sdram_rcw_2 = 0,
+ .ddr_cdr1 = 0x8004,
+ .ddr_cdr2
Re: [U-Boot] [PATCH v3 5/7] armv8: layerscape: Enable falcon boot
Hi York, Add jump_to_image_linux() for arm64. Add "noreturn" flag to armv8_switch_to_el2(). Add hooks to fsl-layerscape to enable falcon boot. Signed-off-by: York Sun Reviewed-by: Simon Glass --- Changes in v3: Fix typo in subject and other cosmetic fix. Changes in v2: Relace getenv_f() with env_get_f() after rebasing to latet master. .../arm/cpu/armv8/fsl-layerscape/doc/README.falcon | 140 + arch/arm/cpu/armv8/fsl-layerscape/spl.c| 29 + arch/arm/include/asm/system.h | 4 +- arch/arm/lib/spl.c | 11 ++ 4 files changed, 182 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon new file mode 100644 index 000..282b19f --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon @@ -0,0 +1,140 @@ +Falcon boot option +-- +Falcon boot is a short cut boot method for SD/eMMC targets. It skips loading the +RAM version U-Boot. Instead, it loads FIT image and boot directly to Linux. +CONFIG_SPL_OS_BOOT enables falcon boot. CONFIG_SPL_LOAD_FIT enables the FIT +image support (also need CONFIG_SPL_OF_LIBFDT, CONFIG_SPL_FIT and optionally +CONFIG_SPL_GZIP). + +To enable falcon boot, a hook function spl_start_uboot() returns 0 to indicate +booting U-Boot is not the first choice. The kernel FIT image needs to be put +at CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR. SPL mmc driver reads the header to +determine if this is a FIT image. If true, FIT image components are parsed and +copied or decompressed (if applicable) to their desitinations. If FIT image is ^ - destinations +not found, normal U-Boot flow will follow. + +An important part of falcon boot is to prepare the device tree. A normal U-Boot +does FDT fixups when booting Linux. For falcon boot, Linux boots directly from +SPL, skipping the normal U-Boot. The device tree has to be prepared in advance. +A command "spl export" should be called under the normal RAM version U-Boot. +It is equivalent to go through "bootm" step-by-step until device tree fixup is +done. The device tree in memory is the one needed for falcon boot. Falcon boot +flow suggests to save this image to SD/eMMC at the location pointed by macro +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, with maximum size specified by macro +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS. However, when FIT image is used for +Linux, the device tree stored in FIT image overwrites the memory loaded by spl +driver from these sectors. We could change this loading order to favor the +stored sectors. But when secure boot is enabled, these sectors are used for +signature header and needs to be loaded before the FIT image. So it is important +to understand the device tree in FIT image should be the one actually used, or +leave it abscent to favor the stored sectors. It is easier to deploy the FIT ^^ absent +image with embedded static device tree to multiple boards. I would also add: "The decision if CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR loaded DTB is override is based on presence of "loadables" property in fitImage. If present the 'static' dtb from fitImage takes precedence. + +Macro CONFIG_SYS_SPL_ARGS_ADDR serves two purposes. One is the pointer to load +the stored sectors to. Normally this is the static device tree. The second +purpose is the memory location of signature header for secure boot. After the +FIT image is loaded into memory, it is validated against the signature header +before individual components are extracted (and optionally decompressed) into +their final memory locations, respectivelly. After the validation, the header respectively +is no longer used. The static device tree is copied into this location. So +this macro is passed as the location of device tree when booting Linux. + +Steps to prepare static device tree +--- +To prepare the static device tree for Layerscape boards, it is important to +understand the fixups in U-Boot. Memory size and location, as well as reserved +memory blocks are added/updated. Ethernet MAC addressed are updated. FMan +microcode (if used) is embedded in the device tree. Kernel command line and +initrd information are embedded. Others including CPU status, boot method, +Ethernet port status, etc. are also updated. + +Following normal booting process, all variables are set, all images are loaded +before "bootm" command would be issued to boot, run command + +spl export fdt + +where the address is the location of FIT image. U-Boot goes through the booting +process as if "bootm start", "bootm loados", "bootm ramdisk"... commands but +stops before "bootm go". There we have the fixed-up device tree in memory. +We can check the device tree
Re: [U-Boot] Patman - Submitting to mailing list
On 09/28/2017 11:05 PM, Duncan Hare wrote: Get the following message from running tools/patman/pathan.py git: 'send-email' is not a git command. See 'git --help'. What do I need to do? Duncan Hare 714 931 7952 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot Maybe you don't have the git send-email installed? -- Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains
On Wed, Sep 27, 2017 at 11:53 PM, Joe Hershberger
wrote:
> On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wrote:
>> The EMAC syscon has configurable RX/TX delay chains for use with RGMII
>> PHYs.
>>
>> This adds support for configuring them via device tree properties. The
>> property names and format were defined in Linux's dwmac-sun8i binding
>> that was merged at one point.
>>
>> Signed-off-by: Chen-Yu Tsai
>> ---
>> drivers/net/sun8i_emac.c | 25 +
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
>> index 09bbb2cdb5ca..5fa1b4c170d7 100644
>> --- a/drivers/net/sun8i_emac.c
>> +++ b/drivers/net/sun8i_emac.c
>> @@ -56,6 +56,10 @@
>> #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY
>> */
>>
>> #define SC_RMII_EN BIT(13)
>> +#define SC_TXDC_SHIFT 10
>> +#define SC_TXDC_MASK GENMASK(2, 0)
>> +#define SC_RXDC_SHIFT 5
>> +#define SC_RXDC_MASK GENMASK(4, 0)
>> #define SC_EPITBIT(2) /* 1: RGMII, 0: MII */
>> #define SC_ETCS_MASK GENMASK(1, 0)
>> #define SC_ETCS_EXT_GMII 0x1
>> @@ -125,6 +129,8 @@ struct emac_eth_dev {
>> u32 addr;
>> u32 tx_slot;
>> bool use_internal_phy;
>> + u32 tx_delay;
>> + u32 rx_delay;
>>
>> enum emac_variant variant;
>> void *mac_reg;
>> @@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev
>> *priv)
>> if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)
>> reg &= ~SC_RMII_EN;
>>
>> + /* Configure RX/TX delay chains */
>> + reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT);
>> + reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT);
>> + reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT;
>> + reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT;
>
> Why not use bitfield_replace_by_mask() from include/bitfield.h?
Because I wasn't aware of such helpers. If that's preferred I'll
respin the patch.
ChenYu
>> +
>> switch (priv->interface) {
>> case PHY_INTERFACE_MODE_MII:
>> /* default */
>> @@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct
>> udevice *dev)
>> }
>> #endif
>>
>> + /* Get RX/TX delays for RGMII */
>> + priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
>> +"allwinner,rx-delay-ps", 0);
>> + if (priv->rx_delay % 100 || priv->rx_delay > 3100)
>> + debug("%s: invalid rx delay value\n", __func__);
>> + priv->rx_delay /= 100;
>> +
>> + priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
>> +"allwinner,tx-delay-ps", 0);
>> + if (priv->tx_delay % 100 || priv->tx_delay > 800)
>> + debug("%s: invalid tx delay value\n", __func__);
>> + priv->tx_delay /= 100;
>> +
>> return 0;
>> }
>>
>> --
>> 2.14.1
>>
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Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
Hi Simon, > Disable the data cache tooI change the "compatible" string of the flash chip from "n25q00" to "spi-flash". Yes, missed to mention these steps. Did you also test the saveenv and sf unlock ? Did you get some strange behaviors after a "warm reboot" from linux ? A week that i'm using a new u-boot but i catch some strange behavior after a reboot from linux. Regards, Clement ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
Clément Péron wrote: Hi, > Did you get some strange behaviors after a "warm reboot" from linux ? > A week that i'm using a new u-boot but i catch some strange behavior > after a reboot from linux. there may some issue since linux can set the flash into another (4byte) addressing mode which can cause trouble if u-boot try read with the standard adressing mode (3byte). i've seen on some hardware platforms that there is a reset signal wired to the flash which resets this addressing mode setting on warm restart. > > Regards, > Clement cheers, Hannes ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: storage: Fix overwritten in usb_stor_set_max_xfer_blk()
Hi Marek, On Fri, Sep 29, 2017 at 10:30 AM, Marek Vasut wrote: > On 09/29/2017 01:36 AM, Bin Meng wrote: >> Hi Marek, >> >> On Thu, Sep 28, 2017 at 11:24 PM, Marek Vasut wrote: >>> On 09/28/2017 06:50 AM, Bin Meng wrote: The stored 'blk' value is overwritten to 'size / 512' before it can be used in usb_stor_set_max_xfer_blk(). This is not what we want. In fact, when 'size' exceeds the upper limit (USHRT_MAX * 512), we should simply assign 'size' to the upper limit. Reported-by: Coverity (CID: 167250) Signed-off-by: Bin Meng >>> >>> Still failing >>> https://travis-ci.org/marex/u-boot-usb/builds/280835848 >>> >> >> This fixes the Coverity issue, not the 'make tests' issue. Please hold >> on apply the xHCI patchset and when the fix is ready I will send v2. > > Can't you send me fix on top of current set ? If not, OK, tell me what > to drop and what to pick. > OK, will do. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] dm: core: Correct address cast in dev_read_addr_ptr()
On Thu, Sep 28, 2017 at 8:35 PM, Simon Glass wrote: > This currently causes a warning in sandbox and will not do the right > thing: > > drivers/core/read.c: In function ‘dev_read_addr_ptr’: > drivers/core/read.c:64:44: warning: cast to pointer from integer of > different size [-Wint-to-pointer-cast] > return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr; > > Use map_sysmem() which is the correct way to convert an address to a > pointer. > > Fixes: c131c8bca8 (dm: core: add dev_read_addr_ptr()) > Signed-off-by: Simon Glass > --- > > drivers/core/read.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > Reviewed-by: Bin Meng Tested-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Ethernet problem with u-boot for APF27
Hello, Thank you for your answers. I found a solution. The problem came from the environment variables. I just used the wrong argument with the command "setenv". Know I have "eth0:on" everywhere and I reach to do all the run update again. Vincent > Hi Vincent, > > Which U-Boot version do you use? > Do you have any boot message related to the ethernet FEC device? > > You could check your environment variables and validate them with a ping. > If you suspect your environment variables are corrupted you can reset them > with the command: > > env default -f -a; saveenv > > then set them again manually and try to ping a device on the network. > > A ping 127.0.0.1 should also work to test the local loop. > > Regards, > Eric ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 1/6] serial: stm32x7: cleanup code
Hi Bo
On 09/29/2017 08:12 AM, Bo Shen wrote:
> Hi Patrice,
>
> On 09/27/2017 06:44 AM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> Use BIT() macro and GENMASK() macro
>>
>> Signed-off-by: Patrice Chotard
>> Reviewed-by: Vikas Manocha
>> ---
>> drivers/serial/serial_stm32x7.h | 18 +-
>> 1 file changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/serial/serial_stm32x7.h
>> b/drivers/serial/serial_stm32x7.h
>> index 9fe37af..6d36b74 100644
>> --- a/drivers/serial/serial_stm32x7.h
>> +++ b/drivers/serial/serial_stm32x7.h
>> @@ -28,18 +28,18 @@ struct stm32x7_serial_platdata {
>> unsigned long int clock_rate;
>> };
>> -#define USART_CR1_OVER8 (1 << 15)
>> -#define USART_CR1_TE (1 << 3)
>> -#define USART_CR1_RE (1 << 2)
>> -#define USART_CR1_UE (1 << 0)
>> +#define USART_CR1_OVER8 BIT(15)
>> +#define USART_CR1_TE BIT(3)
>> +#define USART_CR1_RE BIT(2)
>> +#define USART_CR1_UE BIT(0)
>> -#define USART_CR3_OVRDIS (1 << 12)
>> +#define USART_CR3_OVRDIS BIT(12)
>> -#define USART_SR_FLAG_RXNE (1 << 5)
>> -#define USART_SR_FLAG_TXE (1 << 7)
>> +#define USART_SR_FLAG_RXNE BIT(5)
>> +#define USART_SR_FLAG_TXE BIT(7)
>> -#define USART_BRR_F_MASK 0xFF
>> +#define USART_BRR_F_MASK GENMASK(7, 0)
>> #define USART_BRR_M_SHIFT 4
>> -#define USART_BRR_M_MASK 0xFFF0
>> +#define USART_BRR_M_MASK GENMASK(15, 4)
>
> In stm32f7, according to the datasheet, there is no fraction and
> mantissa. Would you please confirm that?
Agree,
"mantissa" is a different wording for BRR[15:4] bits
and "fraction" is used for BRR[0:3] bits
>
> At the same time, it makes me thinking the BRR is calculated differently
> between stm32f7 and stm32f4, would you please check it also in the
> driver code?
Previously BRR was calculated with a more complex formula, i simply
reused the same BRR formula from the kernel serial driver common to
F4/F7/H7 (see drivers/tty/serial/stm32-usart.c)
>
>> #endif
>>
>
> Best Regards,
> Bo Shen
Regards
Patrice
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Re: [U-Boot] [PATCH v1 3/6] serial: stm32x7: prepare the ground to STM32F4 support
Hi Bo
On 09/29/2017 08:24 AM, Bo Shen wrote:
> Hi Patrice,
> For this patch, overall I think you can use more generic method like
> define the parameter called ip_version in stm32_uart_info structure, and
> according to this information to covert base to different register map
> as following, then we can get rid of "stm32f4" in stm32_uart_info
> structure, and easy to extend if you have more versions.
>
> --->8---
> struct stm32_usart_v1 { }; (version 1 register map)
> struct stm32_usart_v2 { }; (version 2 register map)
>
> switch (ip_version) {
> case v1:
> struct stm32_usart_v1 *ptr = (struct stm32_usart_v1 *)base;
> break;
> case v2:
> struct stm32_usart_v1 *ptr = (struct stm32_usart_v1 *)base;
> break;
> }
> ---8<---
It's another way to solve this problem, i will check if it's more
efficient regarding code/data size
Thanks for the tips.
Patrice
>
> Best Regards,
> Bo Shen
>
> On 09/27/2017 06:44 AM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> STM32F4 serial IP is similar to F7 and H7, but registers
>> are not located at the same offset and some feature are
>> only supported by F7 and H7 version.
>>
>> Registers offset must be added for each version and also
>> some flags indicated the supported feature.
>>
>> Update registers name to match with datasheet (sr to isr,
>> rx_dr to rdr and tx_dr to tdr) and remove unused regs
>> (cr2, gtpr, rtor, and rqr).
>>
>> Signed-off-by: Patrice Chotard
>> ---
>> drivers/serial/serial_stm32x7.c | 72
>> -
>> drivers/serial/serial_stm32x7.h | 38 ++
>> 2 files changed, 66 insertions(+), 44 deletions(-)
>>
>> diff --git a/drivers/serial/serial_stm32x7.c
>> b/drivers/serial/serial_stm32x7.c
>> index bafcc36..81a2308 100644
>> --- a/drivers/serial/serial_stm32x7.c
>> +++ b/drivers/serial/serial_stm32x7.c
>> @@ -17,67 +17,79 @@ DECLARE_GLOBAL_DATA_PTR;
>> static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
>> {
>> - struct stm32x7_serial_platdata *plat = dev->platdata;
>> - struct stm32_usart *const usart = plat->base;
>> + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
>> + bool stm32f4 = plat->uart_info->stm32f4;
>> + fdt_addr_t base = plat->base;
>> u32 int_div, mantissa, fraction, oversampling;
>> int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
>> if (int_div < 16) {
>> oversampling = 8;
>> - setbits_le32(&usart->cr1, USART_CR1_OVER8);
>> + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
>> } else {
>> oversampling = 16;
>> - clrbits_le32(&usart->cr1, USART_CR1_OVER8);
>> + clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
>> }
>> mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
>> fraction = int_div % oversampling;
>> - writel(mantissa | fraction, &usart->brr);
>> + writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
>> return 0;
>> }
>> static int stm32_serial_getc(struct udevice *dev)
>> {
>> - struct stm32x7_serial_platdata *plat = dev->platdata;
>> - struct stm32_usart *const usart = plat->base;
>> + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
>> + bool stm32f4 = plat->uart_info->stm32f4;
>> + fdt_addr_t base = plat->base;
>> - if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
>> + if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
>> return -EAGAIN;
>> - return readl(&usart->rd_dr);
>> + return readl(base + RDR_OFFSET(stm32f4));
>> }
>> static int stm32_serial_putc(struct udevice *dev, const char c)
>> {
>> - struct stm32x7_serial_platdata *plat = dev->platdata;
>> - struct stm32_usart *const usart = plat->base;
>> + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
>> + bool stm32f4 = plat->uart_info->stm32f4;
>> + fdt_addr_t base = plat->base;
>> - if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
>> + if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
>> return -EAGAIN;
>> - writel(c, &usart->tx_dr);
>> + writel(c, base + TDR_OFFSET(stm32f4));
>> return 0;
>> }
>> static int stm32_serial_pending(struct udevice *dev, bool input)
>> {
>> - struct stm32x7_serial_platdata *plat = dev->platdata;
>> - struct stm32_usart *const usart = plat->base;
>> + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
>> + bool stm32f4 = plat->uart_info->stm32f4;
>> + fdt_addr_t base = plat->base;
>> if (input)
>> - return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
>> + return readl(base + ISR_OFFSET(stm32f4)) &
>> + USART_SR_FLAG_RXNE ? 1 : 0;
>> else
>> - return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
>> + return readl(base + ISR_OFFSET(stm32f4)) &
>> + USART_SR_FLAG_TXE ? 0 : 1;
>> }
>> static
[U-Boot] [PATCH] Revert "sunxi: imply USB_GADGET"
This reverts commit 061221ae61440eb05fd5b94ca77c7731315cbddd. The implying of USB_GADGET makes the boards without USB_MUSB_GADGET enabled not able to be built in the U-Boot, and the number of the boards broken is much more than the boards benefited from this commit. So it's reverted. Signed-off-by: Icenowy Zheng --- arch/arm/Kconfig | 1 - configs/A13-OLinuXino_defconfig| 2 ++ configs/A20-OLinuXino-Lime2-eMMC_defconfig | 2 ++ configs/A20-OLinuXino-Lime2_defconfig | 2 ++ configs/CHIP_defconfig | 2 ++ configs/CHIP_pro_defconfig | 2 ++ configs/Cubietruck_defconfig | 2 ++ configs/Nintendo_NES_Classic_Edition_defconfig | 2 ++ configs/Sinlinx_SinA33_defconfig | 2 ++ configs/parrot_r16_defconfig | 2 ++ 10 files changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 28b30ce0c3..e78a43a519 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -704,7 +704,6 @@ config ARCH_SUNXI imply SPL_MMC_SUPPORT if MMC imply SPL_POWER_SUPPORT imply SPL_SERIAL_SUPPORT - imply USB_GADGET config TARGET_TS4600 bool "Support TS4600" diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index ed8349000e..ae790164df 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -31,3 +31,5 @@ CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index b89c505efa..5df2c8b9d9 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -32,3 +32,5 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index f9388a005b..ebb435f309 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -32,3 +32,5 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 5acce42a60..7d50d0533d 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -22,4 +22,6 @@ CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 2303135449..76daf477ec 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -27,4 +27,6 @@ CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 3dff02f342..1b2989d364 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -32,3 +32,5 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index 26fcffa02f..5986764a14 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -22,3 +22,5 @@ CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_ELDO2_VOLT=1800 CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 32c887210d..d1129636dd 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -26,3 +26,5 @@ CONFIG_DFU_RAM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index d6bc89c29e..65be4a7fbf 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -22,3 +22,5 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y -- 2.13.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 0/7] Enable falcon boot for LS1043ARDB
This is the 3rd version to enable falcon boot for LS1043ARDB. With SPL FIT patches merged, enabling falcon boot for this board is straight forward after fixing some errors introduced by other commits. Falcon boot is not enabled by default due to a conflict with recent PPA image update, which takes over entire OCRAM after being loaded. With a compatible PPA image (older version or future update), falcon boot can be enabled as described in commit message. Secure boot is dropped in this set due to SPL image size issue. Recent changes made the SPL image bigger and the secure boot image doesn't fit any more. A follow-up patch set will enable secure boot if the image can be future trimmed to fit. Changes in v3: Create new function to fill gd->bd for spl. Use git commit description style when mentioning previous commit. Fix typo in subject and other cosmetic fix. Drop defconfig change Not to enable falcon boot by default due to a conflict with recent PPA Changes in v2: New patch to fix spl after rebasing to latest master. New patch to fix compiling error after rebasing to latest mater. New patch to fix gd->ram_size error after rebasing to latest mater. Drop checking secure boot in this patch after rebasing to latest mater. Recent change in SPL makes the image size bigger. Relace getenv_f() with env_get_f() after rebasing to latet master. York Sun (7): spl: fix assignment of board info to global data cmd: spl: fix compiling error when CONFIG_CMD_SPL_WRITE_SIZE not defined armv8: fsl-layerscape: Avoid running dram_init_banksize again armv8: ls1043ardb: Use static DDR setting for SPL boot armv8: layerscape: Enable falcon boot armv8: ls1043ardb: Enable spl_board_init() function armv8: ls1043ardb_sdcard: prepare falcon boot arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 18 ++- .../arm/cpu/armv8/fsl-layerscape/doc/README.falcon | 140 + arch/arm/cpu/armv8/fsl-layerscape/spl.c| 30 + arch/arm/include/asm/system.h | 4 +- arch/arm/lib/spl.c | 11 ++ board/freescale/ls1043ardb/ddr.c | 46 +++ board/freescale/ls1043ardb/ddr.h | 69 ++ cmd/spl.c | 2 + common/spl/spl.c | 10 +- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_nand_defconfig | 1 + configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig| 1 + configs/ls1043ardb_sdcard_defconfig| 2 + include/configs/ls1043a_common.h | 7 +- include/configs/ls1043ardb.h | 11 +- include/spl.h | 1 + 16 files changed, 344 insertions(+), 10 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
On 09/22/2017 02:20 PM, Clément Péron wrote: > Sorry these are my local commits you can find them here : > > https://patchwork.ozlabs.org/patch/765992/ > https://patchwork.ozlabs.org/patch/765996/ > https://patchwork.ozlabs.org/patch/765997/ > https://patchwork.ozlabs.org/patch/765998/ Tested on socfpga_cyclone5_socrates by applying these 4 patches to 2017.09. Works as expected. I had to disable the data cache to actually get the data from qspi to ram, but that's a totally different issue. Tested-by: Simon Goldschmidt As I'm rather new to this list and project, when can we expect to have this patch committed? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
On 09/27/2017 06:54 AM, Hannes Schmelzer wrote: > On 09/22/2017 02:20 PM, Clément Péron wrote: >> Sorry these are my local commits you can find them here : >> >> https://patchwork.ozlabs.org/patch/765992/ >> https://patchwork.ozlabs.org/patch/765996/ >> https://patchwork.ozlabs.org/patch/765997/ >> https://patchwork.ozlabs.org/patch/765998/ > Hi, > just tested this on my cyclone5 board, but unfortunately without success. > > --- > U-Boot SPL 2017.09-00354-g824def8 (Sep 27 2017 - 06:47:19) > () > Hit any key to stop autoboot: 0 > => sf probe > SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total > 64 MiB > ### ERROR ### Please RESET the board ### > > > same behavior as before. Have you compared your dts to the other socfpga_cyclone5_*.dts files? I have tested this on the socrates board and it would also give me the above error until I change the "compatible" string of the flash chip from "n25q00" to "spi-flash". Without that, the sf code seems to try to use the first child node as flash chip which results in a divide-by-zero error because it passes a frequency of 0 Hz to the set_speed callback of the qspi driver, which it is not prepared to handle: If cadence_qspi_apb_config_baudrate_div is called with sclk_hz == 0, the DIV_ROUND_UP macro fails to check the denominator for zero. I wonder where this should be fixed: in the core sf code or in this driver... Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Debugging SPL
Hi, When trying to debug SPL on the socfpga platform with CONFIG_OF_EMBED, I get an error message "SPL image too big" when linking SPL. It seems this is because the U-Boot DTB (~16 Kbyte) is not stripped for SPL when building this way. Is this a known issue? Is there a workaround other than manually creating a dedicated DTB for debugging SPL in the OF_EMBED mode? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
Hi Clement, > Did you also test the saveenv and sf unlock ? Not yet. > Did you get some strange behaviors after a "warm reboot" from linux ? Unfortunately, I'm not that far, yet. My Linux image only uses the sd-card for now. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support
Hi Bo
On 09/29/2017 08:26 AM, Bo Shen wrote:
> Hi Patrice,
>
> On 09/27/2017 06:44 AM, patrice.chot...@st.com wrote:
>> From: Patrice Chotard
>>
>> stm32f4 doesn't support FIFO and OVERRUN feature.
>> The enable bit is not at the same location in CR1
>> register than for STM32F7 and STM32H7.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>> drivers/serial/Kconfig | 4 ++--
>> drivers/serial/serial_stm32x7.c | 1 +
>> drivers/serial/serial_stm32x7.h | 7 +++
>> 3 files changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
>> index 9bf2e26..7c54a49 100644
>> --- a/drivers/serial/Kconfig
>> +++ b/drivers/serial/Kconfig
>> @@ -531,9 +531,9 @@ config STI_ASC_SERIAL
>> config STM32X7_SERIAL
>> bool "STMicroelectronics STM32 SoCs on-chip UART"
>> - depends on DM_SERIAL && (STM32F7 || STM32H7)
>> + depends on DM_SERIAL && (STM32F4 || STM32F7 || STM32H7)
>> help
>> - If you have a machine based on a STM32 F7 or H7 SoC you can
>> + If you have a machine based on a STM32 F4, F7 or H7 SoC you can
>> enable its onboard serial ports, say Y to this option.
>> If unsure, say N.
>> diff --git a/drivers/serial/serial_stm32x7.c
>> b/drivers/serial/serial_stm32x7.c
>> index 19697e3..44e8b42 100644
>> --- a/drivers/serial/serial_stm32x7.c
>> +++ b/drivers/serial/serial_stm32x7.c
>> @@ -127,6 +127,7 @@ static int stm32_serial_probe(struct udevice *dev)
>> #if CONFIG_IS_ENABLED(OF_CONTROL)
>> static const struct udevice_id stm32_serial_id[] = {
>> + { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
>
> s/st,stm32-uart/st,stm32f4-uart/ (?)
We use the same DT bindings than kernel one and we want to keep aligned.
Historically stm32-uart is dedicated for F4, which was introduced first.
And then with introduction of F7 and H7, new compatible string
(stm32f7-uart and stm32h7-uart) was added.
Patrice
>
>> { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
>> { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
>> {}
>> diff --git a/drivers/serial/serial_stm32x7.h
>> b/drivers/serial/serial_stm32x7.h
>> index ed8a3ee..b914edf 100644
>> --- a/drivers/serial/serial_stm32x7.h
>> +++ b/drivers/serial/serial_stm32x7.h
>> @@ -27,6 +27,13 @@ struct stm32_uart_info {
>> bool has_fifo;
>> };
>> +struct stm32_uart_info stm32f4_info = {
>> + .stm32f4 = true,
>> + .uart_enable_bit = 13,
>> + .has_overrun_disable = false,
>> + .has_fifo = false,
>> +};
>> +
>> struct stm32_uart_info stm32f7_info = {
>> .uart_enable_bit = 0,
>> .stm32f4 = false,
>>
>
> Best Regards,
> Bo Shen
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Re: [U-Boot] [GIT PULL v2] u-boot-sunxi/master
Hi, On Thu, Sep 28, 2017 at 01:02:58PM +, Tom Rini wrote: > On Thu, Sep 28, 2017 at 11:12:55AM +0200, Maxime Ripard wrote: > > > Hi Tom, > > > > Here is the second version of the pull request sent yesterday. It > > shouldn't show the config warnings anymore. > > > > Thanks! > > Maxime > > > > The following changes since commit 6e9b109aa9bcdd094e77da9fb03de8b44da8eb9d: > > > > Merge git://git.denx.de/u-boot-usb (2017-09-27 09:39:48 -0400) > > > > are available in the git repository at: > > > > git://git.denx.de/u-boot-sunxi master > > > > for you to fetch changes up to 6a191c5ef1294de8c09a3c4539b76a3d9fa60036: > > > > sunxi: usb_phy: invert the USB phy_ctl condition (2017-09-28 10:44:12 > > +0200) > > > > OK, there's still some problems. As a rule, you should at least run > 'make tests' before posting and that shows: > +make O=/home/trini/work/u-boot/u-boot/build-sandbox -s -j8 > ../drivers/core/read.c: In function ‘dev_read_addr_ptr’: > ../drivers/core/read.c:64:44: warning: cast to pointer from integer of > different size [-Wint-to-pointer-cast] > return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr; This one is in the current master. > ../lib/uuid.c: In function ‘gen_rand_uuid’: > ../lib/uuid.c:246:2: warning: implicit declaration of function > ‘clrsetbits_be16’ [-Wimplicit-function-declaration] > clrsetbits_be16(&uuid.time_hi_and_version, > ^ > ../lib/uuid.c:250:2: warning: implicit declaration of function ‘clrsetbits_8’ > [-Wimplicit-function-declaration] > clrsetbits_8(&uuid.clock_seq_hi_and_reserved, > ^ > lib/built-in.o: In function `gen_rand_uuid': > /home/trini/work/u-boot/u-boot/build-sandbox/../lib/uuid.c:246: undefined > reference to `clrsetbits_be16' > /home/trini/work/u-boot/u-boot/build-sandbox/../lib/uuid.c:250: undefined > reference to `clrsetbits_8' > collect2: error: ld returned 1 exit status > make[2]: *** [u-boot] Error 1 > make[1]: *** [sub-make] Error 2 And these two are only seen on the sandbox, since arch/sandbox doesn't define the clrsetbits. How am I supposed to fix that? > Next, it's a good idea to hook your own github up to travis-ci and make > sure that the build there completes for everything (note that it won't > fail on warnings). Thanks! Ok, will do. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc support for Stratix10 SoC
On Tue, 2017-09-26 at 17:46 -0500, Dinh Nguyen wrote:
> On Tue, Sep 19, 2017 at 4:22 AM, wrote:
> >
> > From: Chin Liang See
> >
> > Add misc support for Stratix SoC
> Just because the file is call misc.c doesn't mean you can just keep
> the commit
> message that simple. Can you add what functions are you adding?
>
Definitely can add more details here
> >
> >
> > Signed-off-by: Chin Liang See
> > ---
> > arch/arm/mach-socfpga/Makefile | 1 +
> > arch/arm/mach-socfpga/misc.c | 4 +
> > arch/arm/mach-socfpga/misc_s10.c | 165
> > +++
> > 3 files changed, 170 insertions(+)
> > create mode 100644 arch/arm/mach-socfpga/misc_s10.c
> >
> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> > socfpga/Makefile
> > index 910eb6f..b253914 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -32,6 +32,7 @@ endif
> >
> > ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
> > obj-y += clock_manager_s10.o
> > +obj-y += misc_s10.o
> > obj-y += reset_manager_s10.o
> > obj-y += system_manager_s10.o
> > obj-y += wrap_pinmux_config_s10.o
> > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-
> > socfpga/misc.c
> > index 00eff90..2ea94bc 100644
> > --- a/arch/arm/mach-socfpga/misc.c
> > +++ b/arch/arm/mach-socfpga/misc.c
> > @@ -23,8 +23,10 @@
> >
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > +#ifdef CONFIG_SYS_L2_PL310
> > static const struct pl310_regs *const pl310 =
> > (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
> > +#endif
> >
> > struct bsel bsel_str[] = {
> > { "rsvd", "Reserved", },
> > @@ -53,6 +55,7 @@ void enable_caches(void)
> > #endif
> > }
> >
> > +#ifdef CONFIG_SYS_L2_PL310
> > void v7_outer_cache_enable(void)
> > {
> > /* Disable the L2 cache */
> > @@ -73,6 +76,7 @@ void v7_outer_cache_disable(void)
> > /* Disable the L2 cache */
> > clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
> > }
> > +#endif
> >
> > #if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && \
> > defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE)
> > diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-
> > socfpga/misc_s10.c
> > new file mode 100644
> > index 000..b84f055
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/misc_s10.c
> This misc_s10.c look very similar to the Gen5 stuff, can you re-use
> it?
Yes, its true.
Let me move eth stuff to common.
Chin Liang
>
> Dinh
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Re: [U-Boot] [GIT PULL v2] u-boot-sunxi/master
On Fri, Sep 29, 2017 at 02:37:55PM +0200, Maxime Ripard wrote: > Hi, > > On Thu, Sep 28, 2017 at 01:02:58PM +, Tom Rini wrote: > > On Thu, Sep 28, 2017 at 11:12:55AM +0200, Maxime Ripard wrote: > > > > > Hi Tom, > > > > > > Here is the second version of the pull request sent yesterday. It > > > shouldn't show the config warnings anymore. > > > > > > Thanks! > > > Maxime > > > > > > The following changes since commit > > > 6e9b109aa9bcdd094e77da9fb03de8b44da8eb9d: > > > > > > Merge git://git.denx.de/u-boot-usb (2017-09-27 09:39:48 -0400) > > > > > > are available in the git repository at: > > > > > > git://git.denx.de/u-boot-sunxi master > > > > > > for you to fetch changes up to 6a191c5ef1294de8c09a3c4539b76a3d9fa60036: > > > > > > sunxi: usb_phy: invert the USB phy_ctl condition (2017-09-28 10:44:12 > > > +0200) > > > > > > > OK, there's still some problems. As a rule, you should at least run > > 'make tests' before posting and that shows: > > +make O=/home/trini/work/u-boot/u-boot/build-sandbox -s -j8 > > ../drivers/core/read.c: In function ‘dev_read_addr_ptr’: > > ../drivers/core/read.c:64:44: warning: cast to pointer from integer of > > different size [-Wint-to-pointer-cast] > > return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr; > > This one is in the current master. > > > ../lib/uuid.c: In function ‘gen_rand_uuid’: > > ../lib/uuid.c:246:2: warning: implicit declaration of function > > ‘clrsetbits_be16’ [-Wimplicit-function-declaration] > > clrsetbits_be16(&uuid.time_hi_and_version, > > ^ > > ../lib/uuid.c:250:2: warning: implicit declaration of function > > ‘clrsetbits_8’ [-Wimplicit-function-declaration] > > clrsetbits_8(&uuid.clock_seq_hi_and_reserved, > > ^ > > lib/built-in.o: In function `gen_rand_uuid': > > /home/trini/work/u-boot/u-boot/build-sandbox/../lib/uuid.c:246: undefined > > reference to `clrsetbits_be16' > > /home/trini/work/u-boot/u-boot/build-sandbox/../lib/uuid.c:250: undefined > > reference to `clrsetbits_8' > > collect2: error: ld returned 1 exit status > > make[2]: *** [u-boot] Error 1 > > make[1]: *** [sub-make] Error 2 > > And these two are only seen on the sandbox, since arch/sandbox doesn't > define the clrsetbits. How am I supposed to fix that? We can't bring in patches that break other architectures. In this case, it doesn't look too bad to grab the macros from ARM and slightly adapt, so I'll post a patch in a moment you can grab. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 003/080] mpc83xx: spd_sdram: Fix style violations
Fix style violations in the MPC83xx SPD-SDRAM code and make the code
more readable.
Signed-off-by: Mario Six
---
arch/powerpc/cpu/mpc83xx/spd_sdram.c | 49
1 file changed, 22 insertions(+), 27 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 48814a09f2..f9c41cbeb7 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -172,11 +172,10 @@ long int spd_sdram()
}
/* Check the number of physical bank */
- if (spd.mem_type == SPD_MEMTYPE_DDR) {
+ if (spd.mem_type == SPD_MEMTYPE_DDR)
n_ranks = spd.nrows;
- } else {
+ else
n_ranks = (spd.nrows & 0x7) + 1;
- }
if (n_ranks > 2) {
printf("DDR: The number of physical bank is %02X\n", n_ranks);
@@ -201,10 +200,9 @@ long int spd_sdram()
/*
* Adjust DDR II IO voltage biasing. It just makes it work.
*/
- if(spd.mem_type == SPD_MEMTYPE_DDR2) {
+ if (spd.mem_type == SPD_MEMTYPE_DDR2)
immap->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
- }
- udelay(5);
+ mdelay(50);
#endif
/*
@@ -212,14 +210,13 @@ long int spd_sdram()
*/
odt_rd_cfg = 0; /* Never assert ODT */
odt_wr_cfg = 0; /* Never assert ODT */
- if (spd.mem_type == SPD_MEMTYPE_DDR2) {
+ if (spd.mem_type == SPD_MEMTYPE_DDR2)
odt_wr_cfg = 1; /* Assert ODT on writes to CSn */
- }
/* Setup DDR chip select register */
#ifdef CONFIG_SYS_83XX_DDR_USES_CS0
ddr->csbnds[0].csbnds = (banksize(spd.row_dens) >> 24) - 1;
- ddr->cs_config[0] = ( 1 << 31
+ ddr->cs_config[0] = (BIT(31)
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
@@ -230,9 +227,9 @@ long int spd_sdram()
debug("cs0_config = 0x%08x\n", ddr->cs_config[0]);
if (n_ranks == 2) {
- ddr->cs_config[1] = ( 1<<31
ddr->csbnds[1].csbnds = ((banksize(spd.row_dens) >> 8)
| ((banksize(spd.row_dens) >> 23) - 1));
+ ddr->cs_config[1] = (BIT(31)
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
@@ -244,7 +241,7 @@ long int spd_sdram()
#else
ddr->csbnds[2].csbnds = (banksize(spd.row_dens) >> 24) - 1;
- ddr->cs_config[2] = ( 1 << 31
+ ddr->cs_config[2] = (BIT(31)
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
@@ -255,9 +252,9 @@ long int spd_sdram()
debug("cs2_config = 0x%08x\n", ddr->cs_config[2]);
if (n_ranks == 2) {
- ddr->cs_config[3] = ( 1<<31
ddr->csbnds[3].csbnds = ((banksize(spd.row_dens) >> 8)
| ((banksize(spd.row_dens) >> 23) - 1));
+ ddr->cs_config[3] = (BIT(31)
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
@@ -445,11 +442,10 @@ long int spd_sdram()
* Convert caslat clocks to DDR controller value.
* Force caslat_ctrl to be DDR Controller field-sized.
*/
- if (spd.mem_type == SPD_MEMTYPE_DDR) {
+ if (spd.mem_type == SPD_MEMTYPE_DDR)
caslat_ctrl = (caslat + 1) & 0x07;
- } else {
+ else
caslat_ctrl = (2 * caslat - 1) & 0x0f;
- }
debug("DDR: effective data rate is %d MHz\n", effective_data_rate);
debug("DDR: caslat SPD bit is %d, controller field is 0x%x\n",
@@ -547,13 +543,12 @@ long int spd_sdram()
* add_lat + caslat must be >= 4
*/
add_lat = 0;
- if (spd.mem_type == SPD_MEMTYPE_DDR2
- && (odt_wr_cfg || odt_rd_cfg)
- && (caslat < 4)) {
+ if (spd.mem_type == SPD_MEMTYPE_DDR2 &&
+ (odt_wr_cfg || odt_rd_cfg) &&
+ caslat < 4) {
add_lat = 4 - caslat;
- if ((add_lat + caslat) < 4) {
+ if ((add_lat + caslat) < 4)
add_lat = 0;
- }
}
/*
@@ -652,7 +647,7 @@ long int spd_sdram()
debug(" without ECC\n");
/* Burst length is always 4 for 64 bit data bus, 8 for 32 bit data bus,
- Burst type is sequential
+* Burst type is sequential
*/
if (spd.mem_type == SPD_MEMTYPE_DDR) {
switch (caslat) {
@@ -685,9 +680,9 @@ long int spd_sdram()
ddr->sdram_mode =
[U-Boot] [PATCH 004/080] include: dm: Fix 'devioe'/'devuce' typos
There are some typos in the documentation of some functions in read.h; fix those. Signed-off-by: Mario Six --- include/dm/read.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/dm/read.h b/include/dm/read.h index 8114037e97..d2f47a678f 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -255,7 +255,7 @@ int dev_count_phandle_with_args(struct udevice *dev, const char *list_name, * This walks back up the tree to find the closest #address-cells property * which controls the given node. * - * @dev: devioe to check + * @dev: device to check * @return number of address cells this node uses */ int dev_read_addr_cells(struct udevice *dev); @@ -266,7 +266,7 @@ int dev_read_addr_cells(struct udevice *dev); * This walks back up the tree to find the closest #size-cells property * which controls the given node. * - * @dev: devioe to check + * @dev: device to check * @return number of size cells this node uses */ int dev_read_size_cells(struct udevice *dev); @@ -276,7 +276,7 @@ int dev_read_size_cells(struct udevice *dev); * * This function matches fdt_address_cells(). * - * @dev: devioe to check + * @dev: device to check * @return number of address cells this node uses */ int dev_read_simple_addr_cells(struct udevice *dev); @@ -286,7 +286,7 @@ int dev_read_simple_addr_cells(struct udevice *dev); * * This function matches fdt_size_cells(). * - * @dev: devioe to check + * @dev: device to check * @return number of size cells this node uses */ int dev_read_simple_size_cells(struct udevice *dev); -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 014/080] spi: Fix style violation and improve code
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.
Signed-off-by: Mario Six
---
drivers/spi/spi.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 7d81fbd7f8..dea8dcda5b 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -12,7 +12,7 @@
int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen)
{
if (wordlen == 0 || wordlen > 32) {
- printf("spi: invalid wordlen %d\n", wordlen);
+ printf("spi: invalid wordlen %u\n", wordlen);
return -1;
}
@@ -24,11 +24,12 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int
wordlen)
void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
unsigned int cs)
{
- struct spi_slave *slave;
- void *ptr;
+ u8 *ptr;
ptr = malloc(size);
if (ptr) {
+ struct spi_slave *slave;
+
memset(ptr, '\0', size);
slave = (struct spi_slave *)(ptr + offset);
slave->bus = bus;
--
2.11.0
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[U-Boot] [PATCH 011/080] clk: clk-uclass: Fix style violations
checkpatch.pl complains that the clk_ops structures used in clk-uclass.c
ought to be static, so we mark them as static.
Signed-off-by: Mario Six
---
drivers/clk/clk-uclass.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 83ba13374c..32be2e85c5 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -15,9 +15,9 @@
DECLARE_GLOBAL_DATA_PTR;
-static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
+static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
{
- return (struct clk_ops *)dev->driver->ops;
+ return (const struct clk_ops *)dev->driver->ops;
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
@@ -60,7 +60,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct
clk *clk)
int ret;
struct ofnode_phandle_args args;
struct udevice *dev_clk;
- struct clk_ops *ops;
+ const struct clk_ops *ops;
debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
@@ -68,7 +68,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct
clk *clk)
clk->dev = NULL;
ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
- index, &args);
+index, &args);
if (ret) {
debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
__func__, ret);
@@ -142,7 +142,7 @@ int clk_release_all(struct clk *clk, int count)
int clk_request(struct udevice *dev, struct clk *clk)
{
- struct clk_ops *ops = clk_dev_ops(dev);
+ const struct clk_ops *ops = clk_dev_ops(dev);
debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
@@ -156,7 +156,7 @@ int clk_request(struct udevice *dev, struct clk *clk)
int clk_free(struct clk *clk)
{
- struct clk_ops *ops = clk_dev_ops(clk->dev);
+ const struct clk_ops *ops = clk_dev_ops(clk->dev);
debug("%s(clk=%p)\n", __func__, clk);
@@ -168,7 +168,7 @@ int clk_free(struct clk *clk)
ulong clk_get_rate(struct clk *clk)
{
- struct clk_ops *ops = clk_dev_ops(clk->dev);
+ const struct clk_ops *ops = clk_dev_ops(clk->dev);
debug("%s(clk=%p)\n", __func__, clk);
@@ -180,7 +180,7 @@ ulong clk_get_rate(struct clk *clk)
ulong clk_set_rate(struct clk *clk, ulong rate)
{
- struct clk_ops *ops = clk_dev_ops(clk->dev);
+ const struct clk_ops *ops = clk_dev_ops(clk->dev);
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
@@ -192,7 +192,7 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
int clk_enable(struct clk *clk)
{
- struct clk_ops *ops = clk_dev_ops(clk->dev);
+ const struct clk_ops *ops = clk_dev_ops(clk->dev);
debug("%s(clk=%p)\n", __func__, clk);
@@ -204,7 +204,7 @@ int clk_enable(struct clk *clk)
int clk_disable(struct clk *clk)
{
- struct clk_ops *ops = clk_dev_ops(clk->dev);
+ const struct clk_ops *ops = clk_dev_ops(clk->dev);
debug("%s(clk=%p)\n", __func__, clk);
--
2.11.0
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[U-Boot] [PATCH 026/080] i2c: fsl_i2c: Remove inline declarations
Some functions in the fsl_i2c driver are declared as inline, even though
they are quite large, which needlessly increases the size of the
resulting binary.
This patch removes the inline declarations.
Signed-off-by: Mario Six
---
drivers/i2c/fsl_i2c.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index d957cf6286..a7f3ec472f 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -303,7 +303,7 @@ static int i2c_wait4bus(const struct fsl_i2c_base *base)
return 0;
}
-static inline int i2c_wait(const struct fsl_i2c_base *base, int write)
+static int i2c_wait(const struct fsl_i2c_base *base, int write)
{
u32 csr;
unsigned long long timeval = get_ticks();
@@ -340,8 +340,8 @@ static inline int i2c_wait(const struct fsl_i2c_base *base,
int write)
return -1;
}
-static inline int i2c_write_addr(const struct fsl_i2c_base *base, u8 dev,
-u8 dir, int rsta)
+static int i2c_write_addr(const struct fsl_i2c_base *base, u8 dev,
+ u8 dir, int rsta)
{
writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX
| (rsta ? I2C_CR_RSTA : 0),
@@ -355,8 +355,8 @@ static inline int i2c_write_addr(const struct fsl_i2c_base
*base, u8 dev,
return 1;
}
-static inline int __i2c_write_data(const struct fsl_i2c_base *base, u8 *data,
- int length)
+static int __i2c_write_data(const struct fsl_i2c_base *base, u8 *data,
+ int length)
{
int i;
@@ -370,8 +370,8 @@ static inline int __i2c_write_data(const struct
fsl_i2c_base *base, u8 *data,
return i;
}
-static inline int __i2c_read_data(const struct fsl_i2c_base *base, u8 *data,
- int length)
+static int __i2c_read_data(const struct fsl_i2c_base *base, u8 *data,
+ int length)
{
int i;
--
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[U-Boot] [PATCH 006/080] lib: fdtdec: Fix some style violations
Fix some style violations in fdtdec.c, and reduce the scope of some
variables.
Signed-off-by: Mario Six
---
lib/fdtdec.c | 31 ---
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index f354a1f9af..b291c155a9 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -230,10 +230,10 @@ int fdtdec_get_pci_addr(const void *blob, int node, enum
fdt_pci_space type,
addr->phys_mid = fdt32_to_cpu(cell[1]);
addr->phys_lo = fdt32_to_cpu(cell[1]);
break;
- } else {
- cell += (FDT_PCI_ADDR_CELLS +
-FDT_PCI_SIZE_CELLS);
}
+
+ cell += (FDT_PCI_ADDR_CELLS +
+FDT_PCI_SIZE_CELLS);
}
if (i == num) {
@@ -242,10 +242,10 @@ int fdtdec_get_pci_addr(const void *blob, int node, enum
fdt_pci_space type,
}
return 0;
- } else {
- ret = -EINVAL;
}
+ ret = -EINVAL;
+
fail:
debug("(not found)\n");
return ret;
@@ -262,11 +262,9 @@ int fdtdec_get_pci_vendev(const void *blob, int node, u16
*vendor, u16 *device)
end = list + len;
while (list < end) {
- char *s;
-
len = strlen(list);
if (len >= strlen("pci,")) {
- s = strstr(list, "pci");
+ char *s = strstr(list, "pci");
/*
* check if the string is something like pci,.RR
@@ -296,7 +294,7 @@ int fdtdec_get_pci_bar32(struct udevice *dev, struct
fdt_pci_addr *addr,
/* extract the bar number from fdt_pci_addr */
barnum = addr->phys_hi & 0xff;
- if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
+ if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
return -EINVAL;
barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
@@ -332,7 +330,7 @@ int fdtdec_get_is_enabled(const void *blob, int node)
*/
cell = fdt_getprop(blob, node, "status", NULL);
if (cell)
- return 0 == strcmp(cell, "okay");
+ return strcmp(cell, "okay") == 0;
return 1;
}
@@ -342,8 +340,8 @@ enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
/* Search our drivers */
for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
- if (0 == fdt_node_check_compatible(blob, node,
- compat_names[id]))
+ if (fdt_node_check_compatible(blob, node,
+ compat_names[id]) == 0)
return id;
return COMPAT_UNKNOWN;
}
@@ -662,12 +660,14 @@ int fdtdec_get_int_array(const void *blob, int node,
const char *prop_name,
u32 *array, int count)
{
const u32 *cell;
- int i, err = 0;
+ int err = 0;
debug("%s: %s\n", __func__, prop_name);
cell = get_prop_check_min_len(blob, node, prop_name,
sizeof(u32) * count, &err);
if (!err) {
+ int i;
+
for (i = 0; i < count; i++)
array[i] = fdt32_to_cpu(cell[i]);
}
@@ -972,7 +972,8 @@ int fdt_get_resource(const void *fdt, int node, const char
*property,
while (ptr + na + ns <= end) {
if (i == index) {
- res->start = res->end = fdtdec_get_number(ptr, na);
+ res->start = fdtdec_get_number(ptr, na);
+ res->end = res->start;
res->end += fdtdec_get_number(&ptr[na], ns) - 1;
return 0;
}
@@ -1224,7 +1225,7 @@ int fdtdec_setup(void)
# elif defined CONFIG_FIT_EMBED
gd->fdt_blob = locate_dtb_in_fit(&_end);
- if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) {
+ if (!gd->fdt_blob || gd->fdt_blob <= ((void *)&_end)) {
puts("Failed to find proper dtb in embedded FIT Image\n");
return -1;
}
--
2.11.0
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[U-Boot] [PATCH 029/080] gpio: pca953x_gpio: Make live-tree compatible
Make the pca953x_gpio driver compatible with a live device tree.
Signed-off-by: Mario Six
---
drivers/gpio/pca953x_gpio.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c
index 9ad81fe2ba..05bc4049c2 100644
--- a/drivers/gpio/pca953x_gpio.c
+++ b/drivers/gpio/pca953x_gpio.c
@@ -50,8 +50,6 @@ enum {
#define MAX_BANK 5
#define BANK_SZ 8
-DECLARE_GLOBAL_DATA_PTR;
-
/*
* struct pca953x_info - Data for pca953x
*
@@ -264,7 +262,7 @@ static int pca953x_probe(struct udevice *dev)
return -ENODEV;
}
- addr = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", 0);
+ addr = dev_read_addr(dev);
if (addr == 0)
return -ENODEV;
--
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[U-Boot] [PATCH 025/080] i2c: fsl_i2c: Fix style violations
Fix some style violations in the fsl_i2c I2C driver, and use shorter
type names for variables in some cases.
Signed-off-by: Mario Six
---
drivers/i2c/fsl_i2c.c | 111 +-
1 file changed, 56 insertions(+), 55 deletions(-)
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index ff3dc25927..d957cf6286 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -116,10 +116,10 @@ static const struct {
*
* The return value is the actual bus speed that is set.
*/
-static unsigned int set_i2c_bus_speed(const struct fsl_i2c_base *base,
- unsigned int i2c_clk, unsigned int speed)
+static uint set_i2c_bus_speed(const struct fsl_i2c_base *base,
+ uint i2c_clk, uint speed)
{
- unsigned short divider = min(i2c_clk / speed, (unsigned int)USHRT_MAX);
+ ushort divider = min(i2c_clk / speed, (uint)USHRT_MAX);
/*
* We want to choose an FDR/DFSR that generates an I2C bus speed that
@@ -130,8 +130,8 @@ static unsigned int set_i2c_bus_speed(const struct
fsl_i2c_base *base,
#ifdef __PPC__
u8 dfsr, fdr = 0x31; /* Default if no FDR found */
/* a, b and dfsr matches identifiers A,B and C respectively in AN2919 */
- unsigned short a, b, ga, gb;
- unsigned long c_div, est_div;
+ ushort a, b, ga, gb;
+ ulong c_div, est_div;
#ifdef CONFIG_FSL_I2C_CUSTOM_DFSR
dfsr = CONFIG_FSL_I2C_CUSTOM_DFSR;
@@ -151,18 +151,21 @@ static unsigned int set_i2c_bus_speed(const struct
fsl_i2c_base *base,
for (ga = 0x4, a = 10; a <= 30; ga++, a += 2) {
for (gb = 0; gb < 8; gb++) {
b = 16 << gb;
- c_div = b * (a + ((3*dfsr)/b)*2);
- if ((c_div > divider) && (c_div < est_div)) {
- unsigned short bin_gb, bin_ga;
+ c_div = b * (a + ((3 * dfsr) / b) * 2);
+ if (c_div > divider && c_div < est_div) {
+ ushort bin_gb, bin_ga;
est_div = c_div;
bin_gb = gb << 2;
bin_ga = (ga & 0x3) | ((ga & 0x4) << 3);
fdr = bin_gb | bin_ga;
speed = i2c_clk / est_div;
- debug("FDR:0x%.2x, div:%ld, ga:0x%x, gb:0x%x, "
- "a:%d, b:%d, speed:%d\n",
- fdr, est_div, ga, gb, a, b, speed);
+
+ debug("FDR: 0x%.2x, ", fdr);
+ debug("div: %ld, ", est_div);
+ debug("ga: 0x%x, gb: 0x%x, ", ga, gb);
+ debug("a: %d, b: %d, speed: %d\n", a, b, speed);
+
/* Condition 2 not accounted for */
debug("Tr <= %d ns\n",
(b - 3 * dfsr) * 100 /
@@ -174,13 +177,13 @@ static unsigned int set_i2c_bus_speed(const struct
fsl_i2c_base *base,
if (a == 24)
a += 4;
}
- debug("divider:%d, est_div:%ld, DFSR:%d\n", divider, est_div, dfsr);
- debug("FDR:0x%.2x, speed:%d\n", fdr, speed);
+ debug("divider: %d, est_div: %ld, DFSR: %d\n", divider, est_div, dfsr);
+ debug("FDR: 0x%.2x, speed: %d\n", fdr, speed);
#endif
writeb(dfsr, &base->dfsrr); /* set default filter */
writeb(fdr, &base->fdr);/* set bus speed */
#else
- unsigned int i;
+ uint i;
for (i = 0; i < ARRAY_SIZE(fsl_i2c_speed_map); i++)
if (fsl_i2c_speed_map[i].divider >= divider) {
@@ -197,7 +200,7 @@ static unsigned int set_i2c_bus_speed(const struct
fsl_i2c_base *base,
}
#ifndef CONFIG_DM_I2C
-static unsigned int get_i2c_clock(int bus)
+static uint get_i2c_clock(int bus)
{
if (bus)
return gd->arch.i2c2_clk; /* I2C2 clock */
@@ -211,10 +214,11 @@ static int fsl_i2c_fixup(const struct fsl_i2c_base *base)
const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
unsigned long long timeval = 0;
int ret = -1;
- unsigned int flags = 0;
+ uint flags = 0;
#ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
- unsigned int svr = get_svr();
+ uint svr = get_svr();
+
if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
(SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
flags = I2C_CR_BIT6;
@@ -263,7 +267,7 @@ static void __i2c_init(const struct fsl_i2c_base *base, int
speed, int
/* Call board specific i2c bus reset routine before accessing the
* environment, which might be in a chip on that bus. For details
* about this problem see doc/I2C_Edge_Conditions.
- */
+*/
i2c_init_board();
#endif
w
[U-Boot] [PATCH 008/080] core: read: Fix style violations
There are some whitespace-related style violations in read.c; fix those.
Signed-off-by: Mario Six
---
drivers/core/read.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/core/read.c b/drivers/core/read.c
index eacf1716fd..2766d228a6 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -65,7 +65,7 @@ void *dev_read_addr_ptr(struct udevice *dev)
}
fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property,
- fdt_size_t *sizep)
+ fdt_size_t *sizep)
{
return ofnode_get_addr_size(dev_ofnode(dev), property, sizep);
}
@@ -76,7 +76,7 @@ const char *dev_read_name(struct udevice *dev)
}
int dev_read_stringlist_search(struct udevice *dev, const char *property,
- const char *string)
+ const char *string)
{
return ofnode_stringlist_search(dev_ofnode(dev), property, string);
}
@@ -93,9 +93,8 @@ int dev_read_string_count(struct udevice *dev, const char
*propname)
}
int dev_read_phandle_with_args(struct udevice *dev, const char *list_name,
- const char *cells_name, int cell_count,
- int index,
- struct ofnode_phandle_args *out_args)
+ const char *cells_name, int cell_count,
+ int index, struct ofnode_phandle_args *out_args)
{
return ofnode_parse_phandle_with_args(dev_ofnode(dev), list_name,
cells_name, cell_count, index,
--
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[U-Boot] [PATCH 017/080] spi: Remove spi_setup_slave_fdt
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.
This patch removes the function.
Signed-off-by: Mario Six
---
drivers/spi/spi-uclass.c | 16
include/spi.h| 13 -
2 files changed, 29 deletions(-)
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index e06a603ab1..6db0eb02b4 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -348,22 +348,6 @@ err:
}
/* Compatibility function - to be removed */
-struct spi_slave *spi_setup_slave_fdt(const void *blob, int node,
- int bus_node)
-{
- struct udevice *bus, *dev;
- int ret;
-
- ret = uclass_get_device_by_of_offset(UCLASS_SPI, bus_node, &bus);
- if (ret)
- return NULL;
- ret = device_get_child_by_of_offset(bus, node, &dev);
- if (ret)
- return NULL;
- return dev_get_parent_priv(dev);
-}
-
-/* Compatibility function - to be removed */
struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,
unsigned int speed, unsigned int mode)
{
diff --git a/include/spi.h b/include/spi.h
index 9c69cd7e87..ebaf2e5f3a 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -315,19 +315,6 @@ static inline int spi_w8r8(struct spi_slave *slave,
unsigned char byte)
return ret < 0 ? ret : din[1];
}
-/**
- * Set up a SPI slave for a particular device tree node
- *
- * This calls spi_setup_slave() with the correct bus number. Call
- * spi_free_slave() to free it later.
- *
- * @param blob:Device tree blob
- * @param slave_node: Slave node to use
- * @param spi_node:SPI peripheral node to use
- * @return pointer to new spi_slave structure
- */
-struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
- int spi_node);
#ifdef CONFIG_DM_SPI
/**
--
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[U-Boot] [PATCH 012/080] clk: clk_fixed_rate: Fix style violation
Fix a mis-indented function call in clk_fixed_rate.c
Signed-off-by: Mario Six
---
drivers/clk/clk_fixed_rate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 63565b6ed8..9dd6bc5726 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -31,8 +31,8 @@ const struct clk_ops clk_fixed_rate_ops = {
static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
- to_clk_fixed_rate(dev)->fixed_rate = dev_read_u32_default(dev,
- "clock-frequency", 0);
+ to_clk_fixed_rate(dev)->fixed_rate =
+ dev_read_u32_default(dev, "clock-frequency", 0);
#endif
return 0;
--
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[U-Boot] [PATCH 016/080] spi: Remove spi_flash_probe_fdt
Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.
This patch removes the function.
Signed-off-by: Mario Six
---
drivers/mtd/spi/sf_probe.c | 13 -
include/spi_flash.h| 12
2 files changed, 25 deletions(-)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 7b296378d2..e25513b77a 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -87,19 +87,6 @@ struct spi_flash *spi_flash_probe(unsigned int busnum,
unsigned int cs,
return spi_flash_probe_tail(bus);
}
-#ifdef CONFIG_OF_SPI_FLASH
-struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
- int spi_node)
-{
- struct spi_slave *bus;
-
- bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
- if (!bus)
- return NULL;
- return spi_flash_probe_tail(bus);
-}
-#endif
-
void spi_flash_free(struct spi_flash *flash)
{
#ifdef CONFIG_SPI_FLASH_MTD
diff --git a/include/spi_flash.h b/include/spi_flash.h
index be2fe3f84c..f3c4e83424 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -194,18 +194,6 @@ void sandbox_sf_unbind_emul(struct sandbox_state *state,
int busnum, int cs);
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode);
-/**
- * Set up a new SPI flash from an fdt node
- *
- * @param blob Device tree blob
- * @param slave_node Pointer to this SPI slave node in the device tree
- * @param spi_node Cached pointer to the SPI interface this node belongs
- * to
- * @return 0 if ok, -1 on error
- */
-struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
- int spi_node);
-
void spi_flash_free(struct spi_flash *flash);
static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
--
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[U-Boot] [PATCH 043/080] cfi_flash: Fix logical continuations
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 06795fe754..b73b72bcee 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -611,8 +611,8 @@ static int flash_full_status_check(flash_info_t *info,
flash_sect_t sector,
case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
- if ((retcode == ERR_OK)
- && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
+ if ((retcode == ERR_OK) &&
+ !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
retcode = ERR_INVAL;
printf("Flash %s error at address %lx\n", prompt,
info->start[sector]);
@@ -761,8 +761,8 @@ static flash_sect_t find_sector(flash_info_t *info, ulong
addr)
if ((info != saved_info) || (sector >= info->sector_count))
sector = 0;
- while ((info->start[sector] < addr)
- && (sector < info->sector_count - 1))
+ while ((info->start[sector] < addr) &&
+ (sector < info->sector_count - 1))
sector++;
while ((info->start[sector] > addr) && (sector > 0))
/*
@@ -1435,8 +1435,8 @@ static inline int manufact_match(flash_info_t *info, u32
manu)
static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
{
- if (manufact_match(info, INTEL_MANUFACT)
- && info->device_id == NUMONYX_256MBIT) {
+ if (manufact_match(info, INTEL_MANUFACT) &&
+ info->device_id == NUMONYX_256MBIT) {
/*
* see errata called
* "Numonyx Axcell P33/P30 Specification Update" :)
@@ -1801,8 +1801,8 @@ static int flash_detect_legacy(phys_addr_t base, int
banknum)
(ulong)map_physmem(base,
info->portwidth,
MAP_NOCACHE);
- if (info->portwidth == FLASH_CFI_8BIT
- && info->interface == FLASH_CFI_X8X16) {
+ if (info->portwidth == FLASH_CFI_8BIT &&
+ info->interface == FLASH_CFI_X8X16) {
info->addr_unlock1 = 0x2AAA;
info->addr_unlock2 = 0x;
} else {
@@ -1886,9 +1886,9 @@ static int __flash_detect_cfi(flash_info_t *info, struct
cfi_qry *qry)
cfi_offset++) {
flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
FLASH_CMD_CFI);
- if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
- && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
- && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
+ if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
+ flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
&&
+ flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y'))
{
flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
sizeof(struct cfi_qry));
info->interface = le16_to_cpu(qry->interface_desc);
@@ -2138,8 +2138,8 @@ ulong flash_get_size(phys_addr_t base, int banknum)
size_ratio = info->portwidth / info->chipwidth;
/* if the chip is x8/x16 reduce the ratio by half */
- if ((info->interface == FLASH_CFI_X8X16)
- && (info->chipwidth == FLASH_CFI_BY8)) {
+ if ((info->interface == FLASH_CFI_X8X16) &&
+ (info->chipwidth == FLASH_CFI_BY8)) {
size_ratio >>= 1;
}
debug("size_ratio %d port %d bits chip %d bits\n",
--
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[U-Boot] [PATCH 020/080] spi: spi-uclass: Fix style violations
Remove a superfluous newline, and reduce the scope of a variable.
Signed-off-by: Mario Six
---
drivers/spi/spi-uclass.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 6db0eb02b4..15d90a54a1 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -50,7 +50,6 @@ int dm_spi_claim_bus(struct udevice *dev)
struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
struct spi_slave *slave = dev_get_parent_priv(dev);
int speed;
- int ret;
speed = slave->max_hz;
if (spi->max_hz) {
@@ -62,7 +61,8 @@ int dm_spi_claim_bus(struct udevice *dev)
if (!speed)
speed = 10;
if (speed != slave->speed) {
- ret = spi_set_speed_mode(bus, speed, slave->mode);
+ int ret = spi_set_speed_mode(bus, speed, slave->mode);
+
if (ret)
return ret;
slave->speed = speed;
@@ -129,7 +129,6 @@ static int spi_post_probe(struct udevice *bus)
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
struct dm_spi_ops *ops = spi_get_ops(bus);
-
if (ops->claim_bus)
ops->claim_bus += gd->reloc_off;
if (ops->release_bus)
--
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[U-Boot] [PATCH 048/080] cfi_flash: Fix spelling of "Unknown"
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 2a165cb328..0d015a3863 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1140,7 +1140,7 @@ int flash_erase(flash_info_t *info, int s_first, int
s_last)
break;
#endif
default:
- debug("Unkown flash vendor %d\n",
+ debug("Unknown flash vendor %d\n",
info->vendor);
break;
}
--
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[U-Boot] [PATCH 042/080] cfi_flash: Remove braces for single-statement blocks
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 1ccb05091d..06795fe754 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -329,9 +329,8 @@ static ulong flash_read_long (flash_info_t *info,
flash_sect_t sect,
#ifdef DEBUG
debug("long addr is at %p info->portwidth = %d\n", addr,
info->portwidth);
- for (x = 0; x < 4 * info->portwidth; x++) {
+ for (x = 0; x < 4 * info->portwidth; x++)
debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
- }
#endif
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
retval = ((flash_read8(addr) << 16) |
@@ -1065,11 +1064,9 @@ int flash_erase(flash_info_t *info, int s_first, int
s_last)
}
prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
+ for (sect = s_first; sect <= s_last; ++sect)
+ if (info->protect[sect])
prot++;
- }
- }
if (prot) {
printf("- Warning: %d protected sectors will not be erased!\n",
prot);
@@ -1396,9 +1393,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong
addr, ulong cnt)
#else
while (cnt >= info->portwidth) {
cword.w32 = 0;
- for (i = 0; i < info->portwidth; i++) {
+ for (i = 0; i < info->portwidth; i++)
flash_add_byte(info, &cword, *src++);
- }
if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
return rc;
wp += info->portwidth;
@@ -1410,9 +1406,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong
addr, ulong cnt)
}
#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
+ if (cnt == 0)
return (0);
- }
/*
* handle unaligned tail bytes
--
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[U-Boot] [PATCH 036/080] cfi_flash: Fix style of pointer declarations
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 48
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index b3dda8bd4a..1b0eb3398c 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -204,7 +204,7 @@ unsigned long flash_sector_size(flash_info_t *info,
flash_sect_t sect)
* create an address based on the offset and the port width
*/
static inline void *
-flash_map(flash_info_t * info, flash_sect_t sect, uint offset)
+flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
{
unsigned int byte_offset = offset * info->portwidth;
@@ -283,7 +283,7 @@ static void flash_printqry(struct cfi_qry *qry)
/*---
* read a character at a port width address
*/
-static inline uchar flash_read_uchar(flash_info_t * info, uint offset)
+static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
{
uchar *cp;
uchar retval;
@@ -301,7 +301,7 @@ static inline uchar flash_read_uchar(flash_info_t * info,
uint offset)
/*---
* read a word at a port width address, assume 16bit bus
*/
-static inline ushort flash_read_word(flash_info_t * info, uint offset)
+static inline ushort flash_read_word(flash_info_t *info, uint offset)
{
ushort *addr, retval;
@@ -316,7 +316,7 @@ static inline ushort flash_read_word(flash_info_t * info,
uint offset)
* read a long word by picking the least significant byte of each maximum
* port size word. Swap for ppc format.
*/
-static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
+static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
uint offset)
{
uchar *addr;
@@ -402,7 +402,7 @@ static void flash_write_cmd(flash_info_t *info,
flash_sect_t sect,
flash_unmap(info, sect, offset, addr);
}
-static void flash_unlock_seq(flash_info_t * info, flash_sect_t sect)
+static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
{
flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
@@ -410,7 +410,7 @@ static void flash_unlock_seq(flash_info_t * info,
flash_sect_t sect)
/*---
*/
-static int flash_isequal(flash_info_t * info, flash_sect_t sect,
+static int flash_isequal(flash_info_t *info, flash_sect_t sect,
uint offset, uchar cmd)
{
void *addr;
@@ -458,7 +458,7 @@ static int flash_isequal(flash_info_t * info, flash_sect_t
sect,
/*---
*/
-static int flash_isset(flash_info_t * info, flash_sect_t sect,
+static int flash_isset(flash_info_t *info, flash_sect_t sect,
uint offset, uchar cmd)
{
void *addr;
@@ -491,7 +491,7 @@ static int flash_isset(flash_info_t * info, flash_sect_t
sect,
/*---
*/
-static int flash_toggle(flash_info_t * info, flash_sect_t sect,
+static int flash_toggle(flash_info_t *info, flash_sect_t sect,
uint offset, uchar cmd)
{
void *addr;
@@ -529,7 +529,7 @@ static int flash_toggle(flash_info_t * info, flash_sect_t
sect,
* This routine checks the status of the chip and returns true if the
* chip is busy.
*/
-static int flash_is_busy(flash_info_t * info, flash_sect_t sect)
+static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
{
int retval;
@@ -566,7 +566,7 @@ static int flash_is_busy(flash_info_t * info, flash_sect_t
sect)
* wait for XSR.7 to be set. Time out with an error if it does not.
* This routine does not set the flash to read-array mode.
*/
-static int flash_status_check(flash_info_t * info, flash_sect_t sector,
+static int flash_status_check(flash_info_t *info, flash_sect_t sector,
ulong tout, char *prompt)
{
ulong start;
@@ -604,7 +604,7 @@ static int flash_status_check(flash_info_t * info,
flash_sect_t sector,
*
* This routine sets the flash to read-array mode.
*/
-static int flash_full_status_check(flash_info_t * info, flash_sect_t sector,
+static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
ulong tout, char *prompt)
{
int retcode;
@@ -709,7 +709,7 @@ static int flash_status_poll(flash_info_t *info, void *src,
void *dst,
/*---
*/
-static void flash_add_byte(flash_info_t * info, cfiword_t * cword, uchar c)
+static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
{
#if defined(__LITTLE_ENDIAN) && !defined(C
[U-Boot] [PATCH 013/080] clk: Remove superfluous gd declarations
The clk uclass was converted to support a live device tree recently,
hence the global data pointer declarations are no longer needed.
Signed-off-by: Mario Six
---
drivers/clk/clk-uclass.c | 2 --
drivers/clk/clk_fixed_rate.c | 2 --
2 files changed, 4 deletions(-)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 32be2e85c5..fbea72091b 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -13,8 +13,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
{
return (const struct clk_ops *)dev->driver->ops;
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 9dd6bc5726..c9a9f0a20b 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -8,8 +8,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
struct clk_fixed_rate {
unsigned long fixed_rate;
};
--
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[U-Boot] [PATCH 019/080] spi: sf_probe: Fix style violations
Fix two indention-related style violations.
Signed-off-by: Mario Six
---
drivers/mtd/spi/sf_probe.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index e25513b77a..68009a6328 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -77,7 +77,7 @@ static struct spi_flash *spi_flash_probe_tail(struct
spi_slave *bus)
}
struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
- unsigned int max_hz, unsigned int spi_mode)
+ unsigned int max_hz, unsigned int spi_mode)
{
struct spi_slave *bus;
@@ -107,7 +107,7 @@ static int spi_flash_std_read(struct udevice *dev, u32
offset, size_t len,
}
static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
- const void *buf)
+ const void *buf)
{
struct spi_flash *flash = dev_get_uclass_priv(dev);
--
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[U-Boot] [PATCH 030/080] serial: ns16550: Fix style violation
Clarify the computation precedence in two ternary operator constructions. Signed-off-by: Mario Six --- drivers/serial/ns16550.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index c702304e79..6f9ce689cf 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -339,9 +339,9 @@ static int ns16550_serial_pending(struct udevice *dev, bool input) struct NS16550 *const com_port = dev_get_priv(dev); if (input) - return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; + return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0; else - return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; + return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1; } static int ns16550_serial_getc(struct udevice *dev) -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 028/080] gpio: pca953x_gpio: Fix style violations
Fix some style violations in the pca953x_gpio driver.
Signed-off-by: Mario Six
---
drivers/gpio/pca953x_gpio.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c
index 4962f25230..9ad81fe2ba 100644
--- a/drivers/gpio/pca953x_gpio.c
+++ b/drivers/gpio/pca953x_gpio.c
@@ -123,7 +123,8 @@ static int pca953x_read_regs(struct udevice *dev, int reg,
u8 *val)
ret = dm_i2c_read(dev, reg << 1, val, info->bank_count);
} else if (info->gpio_count == 40) {
/* Auto increment */
- ret = dm_i2c_read(dev, (reg << 3) | 0x80, val,
info->bank_count);
+ ret = dm_i2c_read(dev, (reg << 3) | 0x80, val,
+ info->bank_count);
} else {
dev_err(dev, "Unsupported now\n");
return -EINVAL;
@@ -143,7 +144,7 @@ static int pca953x_is_output(struct udevice *dev, int
offset)
return !(info->reg_direction[bank] & (1 << off));
}
-static int pca953x_get_value(struct udevice *dev, unsigned offset)
+static int pca953x_get_value(struct udevice *dev, uint offset)
{
int ret;
u8 val = 0;
@@ -157,8 +158,7 @@ static int pca953x_get_value(struct udevice *dev, unsigned
offset)
return (val >> off) & 0x1;
}
-static int pca953x_set_value(struct udevice *dev, unsigned offset,
-int value)
+static int pca953x_set_value(struct udevice *dev, uint offset, int value)
{
struct pca953x_info *info = dev_get_platdata(dev);
int bank = offset / BANK_SZ;
@@ -180,7 +180,7 @@ static int pca953x_set_value(struct udevice *dev, unsigned
offset,
return 0;
}
-static int pca953x_set_direction(struct udevice *dev, unsigned offset, int dir)
+static int pca953x_set_direction(struct udevice *dev, uint offset, int dir)
{
struct pca953x_info *info = dev_get_platdata(dev);
int bank = offset / BANK_SZ;
@@ -202,13 +202,12 @@ static int pca953x_set_direction(struct udevice *dev,
unsigned offset, int dir)
return 0;
}
-static int pca953x_direction_input(struct udevice *dev, unsigned offset)
+static int pca953x_direction_input(struct udevice *dev, uint offset)
{
return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN);
}
-static int pca953x_direction_output(struct udevice *dev, unsigned offset,
- int value)
+static int pca953x_direction_output(struct udevice *dev, uint offset, int
value)
{
/* Configure output value. */
pca953x_set_value(dev, offset, value);
@@ -219,7 +218,7 @@ static int pca953x_direction_output(struct udevice *dev,
unsigned offset,
return 0;
}
-static int pca953x_get_function(struct udevice *dev, unsigned offset)
+static int pca953x_get_function(struct udevice *dev, uint offset)
{
if (pca953x_is_output(dev, offset))
return GPIOF_OUTPUT;
@@ -231,7 +230,7 @@ static int pca953x_xlate(struct udevice *dev, struct
gpio_desc *desc,
struct ofnode_phandle_args *args)
{
desc->offset = args->args[0];
- desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
+ desc->flags = args->args[1] & (GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0);
return 0;
}
--
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[U-Boot] [PATCH 005/080] lib: fdtdec: Fix whitespace style violations
Fix some whitespace-related style violations in fdtdec.c.
Signed-off-by: Mario Six
---
lib/fdtdec.c | 56 ++--
1 file changed, 30 insertions(+), 26 deletions(-)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 107a892e79..f354a1f9af 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -80,8 +80,9 @@ const char *fdtdec_get_compatible(enum fdt_compat_id id)
}
fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
- const char *prop_name, int index, int na, int ns,
- fdt_size_t *sizep, bool translate)
+ const char *prop_name, int index, int na,
+ int ns, fdt_size_t *sizep,
+ bool translate)
{
const fdt32_t *prop, *prop_end;
const fdt32_t *prop_addr, *prop_size, *prop_after_size;
@@ -135,8 +136,9 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int
node,
}
fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
- int node, const char *prop_name, int index, fdt_size_t *sizep,
- bool translate)
+ int node, const char *prop_name,
+ int index, fdt_size_t *sizep,
+ bool translate)
{
int na, ns;
@@ -161,8 +163,9 @@ fdt_addr_t fdtdec_get_addr_size_auto_parent(const void
*blob, int parent,
}
fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
- const char *prop_name, int index, fdt_size_t *sizep,
- bool translate)
+ const char *prop_name, int index,
+ fdt_size_t *sizep,
+ bool translate)
{
int parent;
@@ -179,7 +182,7 @@ fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void
*blob, int node,
}
fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
- const char *prop_name, fdt_size_t *sizep)
+ const char *prop_name, fdt_size_t *sizep)
{
int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
@@ -188,15 +191,14 @@ fdt_addr_t fdtdec_get_addr_size(const void *blob, int
node,
ns, sizep, false);
}
-fdt_addr_t fdtdec_get_addr(const void *blob, int node,
- const char *prop_name)
+fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
{
return fdtdec_get_addr_size(blob, node, prop_name, NULL);
}
#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
- const char *prop_name, struct fdt_pci_addr *addr)
+ const char *prop_name, struct fdt_pci_addr *addr)
{
const u32 *cell;
int len;
@@ -305,7 +307,7 @@ int fdtdec_get_pci_bar32(struct udevice *dev, struct
fdt_pci_addr *addr,
#endif
uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
- uint64_t default_val)
+ uint64_t default_val)
{
const uint64_t *cell64;
int length;
@@ -346,14 +348,13 @@ enum fdt_compat_id fdtdec_lookup(const void *blob, int
node)
return COMPAT_UNKNOWN;
}
-int fdtdec_next_compatible(const void *blob, int node,
- enum fdt_compat_id id)
+int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
{
return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
}
int fdtdec_next_compatible_subnode(const void *blob, int node,
- enum fdt_compat_id id, int *depthp)
+ enum fdt_compat_id id, int *depthp)
{
do {
node = fdt_next_node(blob, node, depthp);
@@ -367,8 +368,8 @@ int fdtdec_next_compatible_subnode(const void *blob, int
node,
return -FDT_ERR_NOTFOUND;
}
-int fdtdec_next_alias(const void *blob, const char *name,
- enum fdt_compat_id id, int *upto)
+int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id
id,
+ int *upto)
{
#define MAX_STR_LEN 20
char str[MAX_STR_LEN + 20];
@@ -390,7 +391,8 @@ int fdtdec_next_alias(const void *blob, const char *name,
}
int fdtdec_find_aliases_for_id(const void *blob, const char *name,
- enum fdt_compat_id id, int *node_list, int maxcount)
+ enum fdt_compat_id id, int *node_list,
+ int maxcount)
{
memset(node_list, '\0', sizeof(*node_list) * maxcount);
@@ -399,7 +401,8 @@ int fdtdec_find_aliases_for_id(const void *blob, const char
*name,
/* TODO: Can we tighten this code up a little? */
int fdtdec_add_aliases_for_id(const void *blob, const char *name,
-
[U-Boot] [PATCH] sandbox: Add clrbits/setbits macros
We borrow the macros for these functions from ARM and remove references to '__raw_'. Signed-off-by: Tom Rini --- arch/sandbox/include/asm/io.h | 57 +++ 1 file changed, 57 insertions(+) diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index a6856356df19..c50307ad48cd 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -47,6 +47,63 @@ phys_addr_t map_to_sysmem(const void *ptr); #define writew(v, addr) ((void)addr) #define writel(v, addr) ((void)addr) +/* + * Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single call. These macros can + * also be used to set a multiple-bit bit pattern using a mask, by + * specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define out_arch(type,endian,a,v) write##type(cpu_to_##endian(v),a) +#define in_arch(type,endian,a) endian##_to_cpu(read##type(a)) + +#define out_le64(a,v) out_arch(q,le64,a,v) +#define out_le32(a,v) out_arch(l,le32,a,v) +#define out_le16(a,v) out_arch(w,le16,a,v) + +#define in_le64(a) in_arch(q,le64,a) +#define in_le32(a) in_arch(l,le32,a) +#define in_le16(a) in_arch(w,le16,a) + +#define out_be32(a,v) out_arch(l,be32,a,v) +#define out_be16(a,v) out_arch(w,be16,a,v) + +#define in_be32(a) in_arch(l,be32,a) +#define in_be16(a) in_arch(w,be16,a) + +#define out_8(a,v) writeb(v,a) +#define in_8(a)readb(a) + +#define clrbits(type, addr, clear) \ + out_##type((addr), in_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + out_##type((addr), in_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + /* I/O access functions */ int inl(unsigned int addr); int inw(unsigned int addr); -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 021/080] sf_probe: Merge spi_flash_probe_tail into spi_flash_probe
spi_flash_probe_tail is now only called from spi_flash_probe, hence we
can merge its body into spi_flash_probe.
Signed-off-by: Mario Six
---
drivers/mtd/spi/sf_probe.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 68009a6328..09143d7868 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -55,10 +55,16 @@ err_read_id:
}
#ifndef CONFIG_DM_SPI_FLASH
-static struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
+struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
+ unsigned int max_hz, unsigned int spi_mode)
{
+ struct spi_slave *bus;
struct spi_flash *flash;
+ bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
+ if (!bus)
+ return NULL;
+
/* Allocate space if needed (not used by sf-uclass */
flash = calloc(1, sizeof(*flash));
if (!flash) {
@@ -76,17 +82,6 @@ static struct spi_flash *spi_flash_probe_tail(struct
spi_slave *bus)
return flash;
}
-struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
- unsigned int max_hz, unsigned int spi_mode)
-{
- struct spi_slave *bus;
-
- bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
- if (!bus)
- return NULL;
- return spi_flash_probe_tail(bus);
-}
-
void spi_flash_free(struct spi_flash *flash)
{
#ifdef CONFIG_SPI_FLASH_MTD
--
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[U-Boot] [PATCH 001/080] mpc8308rdb: Fix style violation
Fix a indention style violation in the freescale MPC8308RDB SDRAM code. Signed-off-by: Mario Six --- board/freescale/mpc8308rdb/sdram.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mpc8308rdb/sdram.c b/board/freescale/mpc8308rdb/sdram.c index 81e155a401..cea248f724 100644 --- a/board/freescale/mpc8308rdb/sdram.c +++ b/board/freescale/mpc8308rdb/sdram.c @@ -34,7 +34,7 @@ static long fixed_sdram(void) u32 msize_log2 = __ilog2(msize); out_be32(&im->sysconf.ddrlaw[0].bar, - CONFIG_SYS_DDR_SDRAM_BASE & 0xf000); +CONFIG_SYS_DDR_SDRAM_BASE & 0xf000); out_be32(&im->sysconf.ddrlaw[0].ar, LBLAWAR_EN | (msize_log2 - 1)); out_be32(&im->sysconf.ddrcdr, CONFIG_SYS_DDRCDR_VALUE); -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 022/080] net: tsec: Fix style violations
Signed-off-by: Mario Six
---
drivers/net/tsec.c | 72 --
1 file changed, 37 insertions(+), 35 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 18e7a83d0f..aa261845f3 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -74,11 +74,11 @@ static void tsec_configure_serdes(struct tsec_private *priv)
* to the register offset used for external PHY accesses
*/
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
- 0, TBI_ANA, TBIANA_SETTINGS);
+ 0, TBI_ANA, TBIANA_SETTINGS);
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
- 0, TBI_TBICON, TBICON_CLK_SELECT);
+ 0, TBI_TBICON, TBICON_CLK_SELECT);
tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa),
- 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
+ 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS);
}
#ifdef CONFIG_MCAST_TFTP
@@ -116,7 +116,7 @@ static int tsec_mcast_addr(struct udevice *dev, const u8
*mcast_mac, int set)
whichbit = (result >> 24) & 0x1f; /* the 5 LSB = which bit to set */
whichreg = result >> 29; /* the 3 MSB = which reg to set it in */
- value = 1 << (31-whichbit);
+ value = BIT(31 - whichbit);
if (set)
setbits_be32(®s->hash.gaddr0 + whichreg, value);
@@ -171,7 +171,6 @@ static void init_registers(struct tsec __iomem *regs)
out_be32(®s->attr, ATTR_INIT_SETTINGS);
out_be32(®s->attreli, ATTRELI_INIT_SETTINGS);
-
}
/*
@@ -222,8 +221,8 @@ static void adjust_link(struct tsec_private *priv, struct
phy_device *phydev)
out_be32(®s->maccfg2, maccfg2);
printf("Speed: %d, %s duplex%s\n", phydev->speed,
- (phydev->duplex) ? "full" : "half",
- (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
+ (phydev->duplex) ? "full" : "half",
+ (phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
}
/*
@@ -240,7 +239,7 @@ static int tsec_send(struct udevice *dev, void *packet, int
length)
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec __iomem *regs = priv->regs;
- uint16_t status;
+ u16 status;
int result = 0;
int i;
@@ -287,7 +286,7 @@ static int tsec_recv(struct eth_device *dev)
while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
int length = in_be16(&priv->rxbd[priv->rx_idx].length);
- uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
+ u16 status = in_be16(&priv->rxbd[priv->rx_idx].status);
uchar *packet = net_rx_packets[priv->rx_idx];
/* Send the packet up if there were no errors */
@@ -323,8 +322,8 @@ static int tsec_recv(struct udevice *dev, int flags, uchar
**packetp)
if (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) {
int length = in_be16(&priv->rxbd[priv->rx_idx].length);
- uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status);
- uint32_t buf;
+ u16 status = in_be16(&priv->rxbd[priv->rx_idx].status);
+ u32 buf;
/* Send the packet up if there were no errors */
if (!(status & RXBD_STATS)) {
@@ -347,7 +346,7 @@ static int tsec_recv(struct udevice *dev, int flags, uchar
**packetp)
static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length)
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
- uint16_t status;
+ u16 status;
out_be16(&priv->rxbd[priv->rx_idx].length, 0);
@@ -427,7 +426,8 @@ void redundant_init(struct tsec_private *priv)
clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
do {
- uint16_t status;
+ u16 status;
+
tsec_send(priv->dev, (void *)pkt, sizeof(pkt));
/* Wait for buffer to be received */
@@ -478,7 +478,7 @@ void redundant_init(struct tsec_private *priv)
static void startup_tsec(struct tsec_private *priv)
{
struct tsec __iomem *regs = priv->regs;
- uint16_t status;
+ u16 status;
int i;
/* reset the indices to zero */
@@ -532,7 +532,7 @@ static void startup_tsec(struct tsec_private *priv)
* This allows U-Boot to find the first active controller.
*/
#ifndef CONFIG_DM_ETH
-static int tsec_init(struct eth_device *dev, bd_t * bd)
+static int tsec_init(struct eth_device *dev, bd_t *bd)
#else
static int tsec_init(struct udevice *dev)
#endif
@@ -616,22 +616,23 @@ static phy_interface_t tsec_get_interface(struct
tsec_private *priv)
}
if (ecntrl & ECNTRL_REDUCED_MODE) {
+ phy_interface_t interface;
+
if (ecntrl
[U-Boot] [PATCH 027/080] i2c: fsl_i2c: Make live-tree compatible
Make the fsl_i2c driver compatible with a live device tree.
Signed-off-by: Mario Six
---
drivers/i2c/fsl_i2c.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index a7f3ec472f..cb0f5ea233 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -574,22 +574,18 @@ static int fsl_i2c_ofdata_to_platdata(struct udevice *bus)
{
struct fsl_i2c_dev *dev = dev_get_priv(bus);
fdt_addr_t addr;
- fdt_size_t size;
- int node = dev_of_offset(bus);
- addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, node, "reg", 0,
- &size, false);
+ addr = dev_read_u32_default(bus, "reg", -1);
- dev->base = map_sysmem(CONFIG_SYS_IMMR + addr, size);
+ dev->base = map_sysmem(CONFIG_SYS_IMMR + addr, sizeof(struct
fsl_i2c_base));
if (!dev->base)
return -ENOMEM;
- dev->index = fdtdec_get_int(gd->fdt_blob, node, "cell-index", -1);
- dev->slaveadd = fdtdec_get_int(gd->fdt_blob, node,
- "u-boot,i2c-slave-addr", 0x7f);
- dev->speed = fdtdec_get_int(gd->fdt_blob, node, "clock-frequency",
- 40);
+ dev->index = dev_read_u32_default(bus, "cell-index", -1);
+ dev->slaveadd = dev_read_u32_default(bus, "u-boot,i2c-slave-addr",
+0x7f);
+ dev->speed = dev_read_u32_default(bus, "clock-frequency", 40);
dev->i2c_clk = dev->index ? gd->arch.i2c2_clk : gd->arch.i2c1_clk;
--
2.11.0
___
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[U-Boot] [PATCH 072/080] gdsys: mpc8308: Fix style violations
Fix some style violations in the gdsys MPC8308 board files, and make the
code more readable.
Signed-off-by: Mario Six
---
board/gdsys/mpc8308/hrcon.c | 55 ++-
board/gdsys/mpc8308/mpc8308.c | 12 +-
board/gdsys/mpc8308/strider.c | 49 +++---
3 files changed, 59 insertions(+), 57 deletions(-)
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 7e485074ce..55422b0a7f 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -38,11 +38,11 @@ DECLARE_GLOBAL_DATA_PTR;
#define MAX_MUX_CHANNELS 2
enum {
- MCFPGA_DONE = 1 << 0,
- MCFPGA_INIT_N = 1 << 1,
- MCFPGA_PROGRAM_N = 1 << 2,
- MCFPGA_UPDATE_ENABLE_N = 1 << 3,
- MCFPGA_RESET_N = 1 << 4,
+ MCFPGA_DONE = BIT(0),
+ MCFPGA_INIT_N = BIT(1),
+ MCFPGA_PROGRAM_N = BIT(2),
+ MCFPGA_UPDATE_ENABLE_N = BIT(3),
+ MCFPGA_RESET_N = BIT(4),
};
enum {
@@ -50,7 +50,7 @@ enum {
GPIO_MDIO = 1 << 15,
};
-unsigned int mclink_fpgacount;
+uint mclink_fpgacount;
struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
struct {
@@ -110,7 +110,7 @@ int checkboard(void)
printf("HRCon %s", hw_type_cat ? "CAT" : "Fiber");
- if (s != NULL) {
+ if (s) {
puts(", serial# ");
puts(s);
}
@@ -123,12 +123,11 @@ int checkboard(void)
int last_stage_init(void)
{
int slaves;
- unsigned int k;
- unsigned int mux_ch;
- unsigned char mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
+ uint k;
+ uchar mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
u16 fpga_features;
bool hw_type_cat = pca9698_get_value(0x20, 20);
- bool ch0_rgmii2_present = false;
+ bool ch0_rgmii2_present;
FPGA_GET_REG(0, fpga_features, &fpga_features);
@@ -140,16 +139,16 @@ int last_stage_init(void)
/* wait for FPGA done, then reset FPGA */
for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
- unsigned int ctr = 0;
+ uint ctr = 0;
if (i2c_probe(mclink_controllers[k]))
continue;
while (!(pca953x_get_val(mclink_controllers[k])
& MCFPGA_DONE)) {
- udelay(10);
+ mdelay(100);
if (ctr++ > 5) {
- printf("no done for mclink_controller %d\n", k);
+ printf("no done for mclink_controller %u\n", k);
break;
}
}
@@ -162,8 +161,10 @@ int last_stage_init(void)
}
if (hw_type_cat) {
+ uint mux_ch;
int retval;
struct mii_dev *mdiodev = mdio_alloc();
+
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
@@ -182,7 +183,7 @@ int last_stage_init(void)
}
/* give slave-PLLs and Parade DP501 some time to be up and running */
- udelay(50);
+ mdelay(500);
mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
slaves = mclink_probe();
@@ -210,6 +211,7 @@ int last_stage_init(void)
if (hw_type_cat) {
int retval;
struct mii_dev *mdiodev = mdio_alloc();
+
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[k].name,
@@ -236,17 +238,17 @@ int last_stage_init(void)
* provide access to fpga gpios and controls (for I2C bitbang)
* (these may look all too simple but make iocon.h much more readable)
*/
-void fpga_gpio_set(unsigned int bus, int pin)
+void fpga_gpio_set(uint bus, int pin)
{
FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.set, pin);
}
-void fpga_gpio_clear(unsigned int bus, int pin)
+void fpga_gpio_clear(uint bus, int pin)
{
FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.clear, pin);
}
-int fpga_gpio_get(unsigned int bus, int pin)
+int fpga_gpio_get(uint bus, int pin)
{
u16 val;
@@ -255,7 +257,7 @@ int fpga_gpio_get(unsigned int bus, int pin)
return val & pin;
}
-void fpga_control_set(unsigned int bus, int pin)
+void fpga_control_set(uint bus, int pin)
{
u16 val;
@@ -263,7 +265,7 @@ void fpga_control_set(unsigned int bus, int pin)
FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val | pin);
}
-void fpga_control_clear(unsigned int bus, int pin)
+void fpga_control_clear(uint bus, int pin)
{
u16 val;
@@ -276,7 +278,7 @@ void mpc8308_init(void)
pca9698_direction_output(0x20, 4, 1);
}
-void mpc8308_set_fpga_reset(unsigned state)
+void mpc8308_set_fpga_reset(uint state)
{
pca9698_set_value(0x20, 4, state ? 0 : 1);
}
@@ -288,11 +290,11 @@ void
[U-Boot] [PATCH 002/080] mpc83xx: spd_sdram: Fix whitespace style violations
Fix whitespace style violations in the MPC83xx SPD-SDRAM code.
Signed-off-by: Mario Six
---
arch/powerpc/cpu/mpc83xx/spd_sdram.c | 134 +--
1 file changed, 67 insertions(+), 67 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 21ab0153fc..48814a09f2 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -160,12 +160,13 @@ long int spd_sdram()
/* Read SPD parameters with I2C */
CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, SPD_EEPROM_OFFSET,
- SPD_EEPROM_ADDR_LEN, (uchar *) &spd, sizeof(spd));
+ SPD_EEPROM_ADDR_LEN, (uchar *)&spd, sizeof(spd));
#ifdef SPD_DEBUG
spd_debug(&spd);
#endif
/* Check the memory type */
- if (spd.mem_type != SPD_MEMTYPE_DDR && spd.mem_type !=
SPD_MEMTYPE_DDR2) {
+ if (spd.mem_type != SPD_MEMTYPE_DDR &&
+ spd.mem_type != SPD_MEMTYPE_DDR2) {
debug("DDR: Module mem type is %02X\n", spd.mem_type);
return 0;
}
@@ -185,14 +186,14 @@ long int spd_sdram()
/* Check if the number of row of the module is in the range of DDRC */
if (spd.nrow_addr < 12 || spd.nrow_addr > 15) {
printf("DDR: Row number is out of range of DDRC, row=%02X\n",
-spd.nrow_addr);
+ spd.nrow_addr);
return 0;
}
/* Check if the number of col of the module is in the range of DDRC */
if (spd.ncol_addr < 8 || spd.ncol_addr > 11) {
printf("DDR: Col number is out of range of DDRC, col=%02X\n",
-spd.ncol_addr);
+ spd.ncol_addr);
return 0;
}
@@ -223,22 +224,22 @@ long int spd_sdram()
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
| ((spd.nrow_addr - 12) << 8)
- | (spd.ncol_addr - 8) );
+ | (spd.ncol_addr - 8));
debug("\n");
- debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds);
- debug("cs0_config = 0x%08x\n",ddr->cs_config[0]);
+ debug("cs0_bnds = 0x%08x\n", ddr->csbnds[0].csbnds);
+ debug("cs0_config = 0x%08x\n", ddr->cs_config[0]);
if (n_ranks == 2) {
- ddr->csbnds[1].csbnds = ( (banksize(spd.row_dens) >> 8)
- | ((banksize(spd.row_dens) >> 23) - 1) );
ddr->cs_config[1] = ( 1<<31
+ ddr->csbnds[1].csbnds = ((banksize(spd.row_dens) >> 8)
+ | ((banksize(spd.row_dens) >> 23) - 1));
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
| ((spd.nrow_addr - 12) << 8)
- | (spd.ncol_addr - 8) );
- debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds);
- debug("cs1_config = 0x%08x\n",ddr->cs_config[1]);
+ | (spd.ncol_addr - 8));
+ debug("cs1_bnds = 0x%08x\n", ddr->csbnds[1].csbnds);
+ debug("cs1_config = 0x%08x\n", ddr->cs_config[1]);
}
#else
@@ -248,22 +249,22 @@ long int spd_sdram()
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
| ((spd.nrow_addr - 12) << 8)
- | (spd.ncol_addr - 8) );
+ | (spd.ncol_addr - 8));
debug("\n");
- debug("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds);
- debug("cs2_config = 0x%08x\n",ddr->cs_config[2]);
+ debug("cs2_bnds = 0x%08x\n", ddr->csbnds[2].csbnds);
+ debug("cs2_config = 0x%08x\n", ddr->cs_config[2]);
if (n_ranks == 2) {
- ddr->csbnds[3].csbnds = ( (banksize(spd.row_dens) >> 8)
- | ((banksize(spd.row_dens) >> 23) - 1) );
ddr->cs_config[3] = ( 1<<31
+ ddr->csbnds[3].csbnds = ((banksize(spd.row_dens) >> 8)
+ | ((banksize(spd.row_dens) >> 23) - 1));
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
| ((spd.nbanks == 8 ? 1 : 0) << 14)
| ((spd.nrow_addr - 12) << 8)
- | (spd.ncol_addr - 8) );
- debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds);
- debug("cs3_config = 0x%08x\n",ddr->cs_config[3]);
+ | (spd.ncol_addr - 8));
+ debug("cs3_bnds = 0x%08x\n", ddr->csbnds[3]
[U-Boot] [PATCH 045/080] cfi_flash: Fix comment style
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 2ec8f5a27b..5576092d8f 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -946,7 +946,8 @@ static int flash_write_cfibuffer(flash_info_t *info, ulong
dest, uchar *cp,
"write to buffer");
if (retcode == ERR_OK) {
/* reduce the number of loops by the width of
-* the port */
+* the port
+*/
cnt = len >> shift;
flash_write_cmd(info, sector, 0, cnt - 1);
while (cnt-- > 0) {
@@ -1787,7 +1788,8 @@ static int flash_detect_legacy(phys_addr_t base, int
banknum)
if (board_flash_get_legacy(base, banknum, info)) {
/* board code may have filled info completely. If not, we
- use JEDEC ID probing. */
+* use JEDEC ID probing.
+*/
if (!info->vendor) {
int modes[] = {
CFI_CMDSET_AMD_STANDARD,
--
2.11.0
___
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[U-Boot] [PATCH 007/080] core: ofnode: Fix style violations
There are some style violations in ofnode.c; fix those.
Signed-off-by: Mario Six
---
drivers/core/ofnode.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index c6ca13fabf..a59e40aa97 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -296,7 +296,8 @@ int ofnode_parse_phandle_with_args(ofnode node, const char
*list_name,
int ret;
ret = of_parse_phandle_with_args(ofnode_to_np(node),
- list_name, cells_name, index, &args);
+list_name, cells_name, index,
+&args);
if (ret)
return ret;
ofnode_from_of_phandle_args(&args, out_args);
@@ -305,8 +306,9 @@ int ofnode_parse_phandle_with_args(ofnode node, const char
*list_name,
int ret;
ret = fdtdec_parse_phandle_with_args(gd->fdt_blob,
- ofnode_to_offset(node), list_name, cells_name,
- cell_count, index, &args);
+ofnode_to_offset(node),
+list_name, cells_name,
+cell_count, index, &args);
if (ret)
return ret;
ofnode_from_fdtdec_phandle_args(&args, out_args);
@@ -532,10 +534,10 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space
type,
addr->phys_mid = fdt32_to_cpu(cell[1]);
addr->phys_lo = fdt32_to_cpu(cell[1]);
break;
- } else {
- cell += (FDT_PCI_ADDR_CELLS +
-FDT_PCI_SIZE_CELLS);
}
+
+ cell += (FDT_PCI_ADDR_CELLS +
+FDT_PCI_SIZE_CELLS);
}
if (i == num) {
@@ -544,10 +546,10 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space
type,
}
return 0;
- } else {
- ret = -EINVAL;
}
+ ret = -EINVAL;
+
fail:
debug("(not found)\n");
return ret;
--
2.11.0
___
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[U-Boot] [PATCH 046/080] cfi_flash: Remove unnecessary braces
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 48
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 5576092d8f..229e0a8177 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -611,7 +611,7 @@ static int flash_full_status_check(flash_info_t *info,
flash_sect_t sector,
case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
- if ((retcode == ERR_OK) &&
+ if (retcode == ERR_OK &&
!flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
retcode = ERR_INVAL;
printf("Flash %s error at address %lx\n", prompt,
@@ -758,7 +758,7 @@ static flash_sect_t find_sector(flash_info_t *info, ulong
addr)
static flash_info_t *saved_info; /* previously used flash bank */
flash_sect_t sector = saved_sector;
- if ((info != saved_info) || (sector >= info->sector_count))
+ if (info != saved_info || sector >= info->sector_count)
sector = 0;
while ((info->start[sector] < addr) &&
@@ -1059,7 +1059,7 @@ int flash_erase(flash_info_t *info, int s_first, int
s_last)
puts("Can't erase unknown flash type - aborted\n");
return 1;
}
- if ((s_first < 0) || (s_first > s_last)) {
+ if (s_first < 0 || s_first > s_last) {
puts("- no sectors to erase\n");
return 1;
}
@@ -1247,7 +1247,7 @@ void flash_print_info(flash_info_t *info)
printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
info->device_id2);
}
- if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
+ if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
printf("\n Advanced Sector Protection (PPB) enabled");
printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
info->erase_blk_tout,
@@ -1291,7 +1291,7 @@ void flash_print_info(flash_info_t *info)
#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
if (flash_verbose) { \
dots -= dots_sub; \
- if ((scale > 0) && (dots <= 0)) { \
+ if (scale > 0 && dots <= 0) { \
if ((digit % 5) == 0) \
printf("%d", digit / 5); \
else \
@@ -1577,7 +1577,7 @@ int flash_real_protect(flash_info_t *info, long sector,
int prot)
* On some of Intel's flash chips (marked via legacy_unlock)
* unprotect unprotects all locking.
*/
- if ((prot == 0) && (info->legacy_unlock)) {
+ if (prot == 0 && info->legacy_unlock) {
flash_sect_t i;
for (i = 0; i < info->sector_count; i++) {
@@ -1636,10 +1636,10 @@ static void cfi_reverse_geometry(struct cfi_qry *qry)
u32 tmp;
for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
- tmp = get_unaligned(&(qry->erase_region_info[i]));
- put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
- &(qry->erase_region_info[i]));
- put_unaligned(tmp, &(qry->erase_region_info[j]));
+ tmp = get_unaligned(&qry->erase_region_info[i]);
+ put_unaligned(get_unaligned(&qry->erase_region_info[j]),
+ &qry->erase_region_info[i]);
+ put_unaligned(tmp, &qry->erase_region_info[j]);
}
}
@@ -1913,11 +1913,11 @@ static int __flash_detect_cfi(flash_info_t *info,
struct cfi_qry *qry)
* in compatibility mode
*/
if (/* x8/x16 in x8 mode */
- ((info->chipwidth == FLASH_CFI_BY8) &&
- (info->interface == FLASH_CFI_X8X16)) ||
+ (info->chipwidth == FLASH_CFI_BY8 &&
+ info->interface == FLASH_CFI_X8X16) ||
/* x16/x32 in x16 mode */
- ((info->chipwidth == FLASH_CFI_BY16) &&
- (info->interface == FLASH_CFI_X16X32)))
+ (info->chipwidth == FLASH_CFI_BY16 &&
+ info->interface == FLASH_CFI_X16X32))
{
info->addr_unlock1 = 0xaaa;
info->addr_unlock2 = 0x555;
@@ -2034,8 +2034,8 @@ static void flash_fixup_num(flash_info_t *info, struct
cfi_qry *qry)
* There's an app note from Numonyx on this issue.
* So adjust the buffer size for M29EW while operating in 8-bit mode
*/
- if (((qry->max_buf_write_size) > 0x8) &&
[U-Boot] [PATCH 055/080] cfi_flash: Fix strings split across lines
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 2ff1a97658..b2857f372d 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1254,10 +1254,9 @@ void flash_print_info(flash_info_t *info)
info->erase_blk_tout,
info->write_tout);
if (info->buffer_size > 1) {
- printf(" Buffer write timeout: %ld ms, "
- "buffer size: %d bytes\n",
- info->buffer_write_tout,
- info->buffer_size);
+ printf(" Buffer write timeout: %ld ms, ",
+ info->buffer_write_tout);
+ printf("buffer size: %d bytes\n", info->buffer_size);
}
puts("\n Sector Start Addresses:");
@@ -2043,8 +2042,8 @@ static void flash_fixup_num(flash_info_t *info, struct
cfi_qry *qry)
info->device_id2 == 0x2301 ||
info->device_id2 == 0x2801 ||
info->device_id2 == 0x4801)) {
- debug("Adjusted buffer size on Numonyx flash"
- " M29EW family in 8 bit mode\n");
+ debug("Adjusted buffer size on Numonyx flash");
+ debug(" M29EW family in 8 bit mode\n");
qry->max_buf_write_size = 0x8;
}
}
@@ -2384,9 +2383,9 @@ unsigned long flash_init(void)
size += flash_info[i].size;
if (flash_info[i].flash_id == FLASH_UNKNOWN) {
#ifndef CONFIG_SYS_FLASH_QUIET_TEST
- printf("## Unknown flash on Bank %d "
- "- Size = 0x%08lx = %ld MB\n",
- i + 1, flash_info[i].size,
+ printf("## Unknown flash on Bank %d ", i + 1);
+ printf("- Size = 0x%08lx = %ld MB\n",
+ flash_info[i].size,
flash_info[i].size >> 20);
#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
}
--
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Re: [U-Boot] [PATCH 04/14] arm: socfpga: stratix10: Add Reset Manager driver for Stratix10 SoC
On Tue, 2017-09-26 at 17:08 -0500, Dinh Nguyen wrote: > On Tue, Sep 19, 2017 at 4:22 AM, wrote: > > > > From: Chin Liang See > > > > Add Reset Manager driver support for Stratix SoC > > > > Signed-off-by: Chin Liang See > > --- > > arch/arm/mach-socfpga/Makefile | 1 + > > arch/arm/mach-socfpga/include/mach/reset_manager.h | 2 + > > .../mach-socfpga/include/mach/reset_manager_s10.h | 116 > > + > > arch/arm/mach-socfpga/reset_manager.c | 5 + > > arch/arm/mach-socfpga/reset_manager_s10.c | 140 > > + > I don't see why you need to add a new file for S10? The functionality > between > Gen 5 and Stratix10 is identical for the reset manager. Not really, they have same functions name but sequences are difference due to diff interconnect technology. Hence, try to avoid too much #if #else Chin Liang > > Dinh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 047/080] cfi_flash: Add missing braces in blocks
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 229e0a8177..2a165cb328 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1154,10 +1154,12 @@ int flash_erase(flash_info_t *info, int s_first, int
s_last)
st = flash_status_poll(info, &cword, dest,
info->erase_blk_tout,
"erase");
flash_unmap(info, sect, 0, dest);
- } else
+ } else {
st = flash_full_status_check(info, sect,
info->erase_blk_tout,
"erase");
+ }
+
if (st)
rcode = 1;
else if (flash_verbose)
--
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[U-Boot] [PATCH 018/080] spi: Remove CONFIG_OF_SPI_FLASH
Previous patches removed the last usages of this config variable, so that it is now obsolete. This patch removes it from the whitelist. Signed-off-by: Mario Six --- scripts/config_whitelist.txt | 1 - 1 file changed, 1 deletion(-) diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 0dbe8986a6..f8236beef5 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1614,7 +1614,6 @@ CONFIG_NUM_PAMU CONFIG_ODROID_REV_AIN CONFIG_OFF_PADCONF CONFIG_OF_ -CONFIG_OF_SPI_FLASH CONFIG_OF_STDOUT_PATH CONFIG_OMAP_EHCI_PHY1_RESET_GPIO CONFIG_OMAP_EHCI_PHY2_RESET_GPIO -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 073/080] gdsys: mpc8308: Use shadow register for output GPIO values
Since gpio output status on MPC8xxx cannot be read back, it has to be
buffered locally.
Signed-off-by: Dirk Eibach
Signed-off-by: Mario Six
---
board/gdsys/mpc8308/hrcon.c | 4 ++--
board/gdsys/mpc8308/mpc8308.c | 19 +++
board/gdsys/mpc8308/mpc8308.h | 3 +++
board/gdsys/mpc8308/strider.c | 2 +-
4 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 55422b0a7f..b3017de911 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -290,8 +290,8 @@ void mpc8308_setup_hw(void)
/*
* set "startup-finished"-gpios
*/
- setbits_be32(&immr->gpio[0].dir, (BIT(31 - 11) | BIT(31 - 12)));
- setbits_be32(&immr->gpio[0].dat, BIT(31 - 12));
+ setbits_be32(&immr->gpio[0].dir, BIT(31 - 11) | BIT(31 - 12));
+ setbits_gpio0_out(BIT(31 - 12));
}
int mpc8308_get_fpga_done(uint fpga)
diff --git a/board/gdsys/mpc8308/mpc8308.c b/board/gdsys/mpc8308/mpc8308.c
index 0b1d4eab22..8d6a49f86a 100644
--- a/board/gdsys/mpc8308/mpc8308.c
+++ b/board/gdsys/mpc8308/mpc8308.c
@@ -25,6 +25,25 @@
DECLARE_GLOBAL_DATA_PTR;
+/* as gpio output status cannot be read back, we have to buffer it locally */
+u32 gpio0_out;
+
+void setbits_gpio0_out(u32 mask)
+{
+ immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+
+ gpio0_out |= mask;
+ out_be32(&immr->gpio[0].dat, gpio0_out);
+}
+
+void clrbits_gpio0_out(u32 mask)
+{
+ immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+
+ gpio0_out &= ~mask;
+ out_be32(&immr->gpio[0].dat, gpio0_out);
+}
+
int get_fpga_state(uint dev)
{
return gd->arch.fpga_state[dev];
diff --git a/board/gdsys/mpc8308/mpc8308.h b/board/gdsys/mpc8308/mpc8308.h
index dc07d564eb..1e4f24fb2a 100644
--- a/board/gdsys/mpc8308/mpc8308.h
+++ b/board/gdsys/mpc8308/mpc8308.h
@@ -1,6 +1,9 @@
#ifndef __MPC8308_H_
#define __MPC8308_H_
+void setbits_gpio0_out(u32 mask);
+void clrbits_gpio0_out(u32 mask);
+
/* functions to be provided by board implementation */
void mpc8308_init(void);
void mpc8308_set_fpga_reset(unsigned state);
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index 898782a2e4..3ee5a4889d 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -346,7 +346,7 @@ void mpc8308_setup_hw(void)
* set "startup-finished"-gpios
*/
setbits_be32(&immr->gpio[0].dir, BIT(31 - 11) | BIT(31 - 12));
- setbits_be32(&immr->gpio[0].dat, BIT(31 - 12));
+ setbits_gpio0_out(BIT(31 - 12));
}
int mpc8308_get_fpga_done(uint fpga)
--
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[U-Boot] [PATCH 080/080] clk: Makefile: Sort entries alphabetically
The Makefile entries in the clk driver directory were not alphabetically sorted. Correct this. Signed-off-by: Mario Six --- drivers/clk/Makefile | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 83fe88ce9f..bb22416fb5 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -6,20 +6,20 @@ # obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o -obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ -obj-$(CONFIG_SANDBOX) += clk_sandbox.o -obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o -obj-$(CONFIG_MACH_PIC32) += clk_pic32.o -obj-$(CONFIG_CLK_RENESAS) += renesas/ -obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o -obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o obj-y += tegra/ -obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ -obj-$(CONFIG_CLK_EXYNOS) += exynos/ +obj-$(CONFIG_ARCH_ASPEED) += aspeed/ +obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o obj-$(CONFIG_CLK_BOSTON) += clk_boston.o -obj-$(CONFIG_ARCH_ASPEED) += aspeed/ +obj-$(CONFIG_CLK_EXYNOS) += exynos/ +obj-$(CONFIG_CLK_RENESAS) += renesas/ +obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ +obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o +obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o +obj-$(CONFIG_MACH_PIC32) += clk_pic32.o +obj-$(CONFIG_SANDBOX) += clk_sandbox.o +obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o obj-$(CONFIG_STM32F7) += clk_stm32f7.o obj-$(CONFIG_STM32H7) += clk_stm32h7.o -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 070/080] common: board_f: Fix style violations
Fix some style violations in the board_f file.
Signed-off-by: Mario Six
---
common/board_f.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 9220815441..953b8fb3e7 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -50,7 +50,7 @@
#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
#undef XTRN_DECLARE_GLOBAL_DATA_PTR
#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
-DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
+DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
#else
DECLARE_GLOBAL_DATA_PTR;
#endif
@@ -137,7 +137,7 @@ static int display_text_info(void)
#endif
debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
- text_base, bss_start, bss_end);
+ text_base, bss_start, bss_end);
#endif
return 0;
@@ -303,7 +303,7 @@ static int reserve_logbuffer(void)
/* reserve kernel log buffer */
gd->relocaddr -= LOGBUFF_RESERVE;
debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
- gd->relocaddr);
+ gd->relocaddr);
#endif
return 0;
@@ -428,7 +428,7 @@ static int reserve_malloc(void)
{
gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
debug("Reserving %dk for malloc() at: %08lx\n",
- TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
+ TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
return 0;
}
@@ -458,7 +458,7 @@ static int reserve_global_data(void)
gd->start_addr_sp -= sizeof(gd_t);
gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
debug("Reserving %zu Bytes for Global Data at: %08lx\n",
- sizeof(gd_t), gd->start_addr_sp);
+ sizeof(gd_t), gd->start_addr_sp);
return 0;
}
--
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[U-Boot] [PATCH 069/080] cmd: mdio: Fix style violations
Fix some style violations in the MDIO command. Signed-off-by: Mario Six --- cmd/mdio.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/cmd/mdio.c b/cmd/mdio.c index 21dc103736..3f11963006 100644 --- a/cmd/mdio.c +++ b/cmd/mdio.c @@ -14,7 +14,6 @@ #include #include - static char last_op[2]; static uint last_data; static uint last_addr_lo; @@ -243,13 +242,13 @@ static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) case 'r': if (pos > 1) if (extract_reg_range(argv[pos--], &devadlo, &devadhi, - ®lo, ®hi)) + ®lo, ®hi)) return -1; default: if (pos > 1) - if (extract_phy_range(&(argv[2]), pos - 1, &bus, - &phydev, &addrlo, &addrhi)) + if (extract_phy_range(&argv[2], pos - 1, &bus, + &phydev, &addrlo, &addrhi)) return -1; break; -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 071/080] common: board_r: Fix style violations
Fix some style violations in the board_r file.
Signed-off-by: Mario Six
---
common/board_r.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index 94697e7bc1..a81addc005 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -161,9 +161,9 @@ static int initr_reloc_global_data(void)
#endif
#ifdef CONFIG_OF_EMBED
/*
- * The fdt_blob needs to be moved to new relocation address
- * incase of FDT blob is embedded with in image
- */
+* The fdt_blob needs to be moved to new relocation address
+* incase of FDT blob is embedded with in image
+*/
gd->fdt_blob += gd->reloc_off;
#endif
#ifdef CONFIG_EFI_LOADER
@@ -368,14 +368,16 @@ static int initr_flash(void)
print_size(flash_size, "");
#ifdef CONFIG_SYS_FLASH_CHECKSUM
/*
- * Compute and print flash CRC if flashchecksum is set to 'y'
- *
- * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
- */
+* Compute and print flash CRC if flashchecksum is set to 'y'
+*
+* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
+*/
if (env_get_yesno("flashchecksum") == 1) {
+ const uchar *flash_base = (const uchar *)CONFIG_SYS_FLASH_BASE;
+
printf(" CRC: %08X", crc32(0,
- (const unsigned char *) CONFIG_SYS_FLASH_BASE,
- flash_size));
+ flash_base,
+ flash_size));
}
#endif /* CONFIG_SYS_FLASH_CHECKSUM */
putc('\n');
@@ -392,7 +394,6 @@ static int initr_flash(void)
update_flash_size(flash_size);
#endif
-
#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
@@ -657,7 +658,7 @@ int initr_mem(void)
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
# endif
- sprintf(memsz, "%ldk", (long int) ((gd->ram_size / 1024) - pram));
+ sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram));
env_set("mem", memsz);
return 0;
@@ -710,7 +711,7 @@ static init_fnc_t init_sequence_r[] = {
initr_caches,
/* Note: For Freescale LS2 SoCs, new MMU table is created in DDR.
* A temporary mapping of IFC high region is since removed,
-* so environmental variables in NOR flash is not availble
+* so environmental variables in NOR flash is not available
* until board_init() is called below to remap IFC to high
* region.
*/
@@ -775,7 +776,7 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
* Do early PCI configuration _before_ the flash gets initialised,
-* because PCU ressources are crucial for flash access on some boards.
+* because PCU resources are crucial for flash access on some boards.
*/
initr_pci,
#endif
--
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[U-Boot] [PATCH 061/080] cfi_flash: Always define cfi_flash_num_flash_banks
The variable cfi_flash_num_flash_banks is defined iff CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, but it is used unconditionally in the function cfi_flash_init_dm. This leads to a undefined variable compile error when CONFIG_SYS_MAX_FLASH_BANKS_DETECT is not defined, but DM is enabled. Fix this by always defining the cfi_flash_num_flash_banks variable. Signed-off-by: Mario Six --- drivers/mtd/cfi_flash.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 7795d25825..4415bcca24 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -91,6 +91,8 @@ static u16 cfi_flash_config_reg(int i) #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT) int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT; +#else +int cfi_flash_num_flash_banks; #endif #ifdef CONFIG_CFI_FLASH /* for driver model */ -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 077/080] i2c: ihs_i2c: Prepare DM conversion
Prepare the function interface of the ihs_i2c driver for DM conversion
in a future patch.
While we're at it, fix some style violations, and make the code more readable.
Signed-off-by: Mario Six
---
drivers/i2c/ihs_i2c.c | 69 +--
1 file changed, 40 insertions(+), 29 deletions(-)
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index 29612e69fe..6fd016339c 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -41,30 +42,38 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
enum {
- I2CINT_ERROR_EV = 1 << 13,
- I2CINT_TRANSMIT_EV = 1 << 14,
- I2CINT_RECEIVE_EV = 1 << 15,
+ I2CINT_ERROR_EV = BIT(13),
+ I2CINT_TRANSMIT_EV = BIT(14),
+ I2CINT_RECEIVE_EV = BIT(15),
};
enum {
+ I2CMB_READ = 0 << 10,
I2CMB_WRITE = 1 << 10,
+ I2CMB_1BYTE = 0 << 11,
I2CMB_2BYTE = 1 << 11,
+ I2CMB_DONT_HOLD_BUS = 0 << 13,
I2CMB_HOLD_BUS = 1 << 13,
I2CMB_NATIVE = 2 << 14,
};
+enum {
+ I2COP_WRITE = 0,
+ I2COP_READ = 1,
+};
+
static int wait_for_int(bool read)
{
u16 val;
- unsigned int ctr = 0;
+ uint ctr = 0;
I2C_GET_REG(interrupt_status, &val);
+ /* Wait until error or receive/transmit interrupt was raised */
while (!(val & (I2CINT_ERROR_EV
| (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV {
udelay(10);
- if (ctr++ > 5000) {
+ if (ctr++ > 5000)
return 1;
- }
I2C_GET_REG(interrupt_status, &val);
}
@@ -76,10 +85,12 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int
len, bool read,
{
u16 val;
+ /* Clear interrupt status */
I2C_SET_REG(interrupt_status, I2CINT_ERROR_EV
| I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV);
I2C_GET_REG(interrupt_status, &val);
+ /* If we want to write and have data, write the bytes to the mailbox */
if (!read && len) {
val = buffer[0];
@@ -98,6 +109,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int
len, bool read,
if (wait_for_int(read))
return 1;
+ /* If we want to read, get the bytes from the mailbox */
if (read) {
I2C_GET_REG(read_mailbox_ext, &val);
buffer[0] = val & 0xff;
@@ -108,55 +120,44 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer,
int len, bool read,
return 0;
}
-static int ihs_i2c_address(uchar chip, uint addr, int alen, bool hold_bus)
+static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
{
- int shift = (alen-1) * 8;
-
while (alen) {
int transfer = min(alen, 2);
- uchar buf[2];
bool is_last = alen <= transfer;
- buf[0] = addr >> shift;
- if (alen > 1)
- buf[1] = addr >> (shift - 8);
-
- if (ihs_i2c_transfer(chip, buf, transfer, false,
+ if (ihs_i2c_transfer(chip, addr, transfer, I2COP_WRITE,
hold_bus ? false : is_last))
return 1;
- shift -= 16;
alen -= transfer;
}
return 0;
}
-static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buffer, int len, bool read)
+static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, u8 *addr,
+ int alen, uchar *buffer, int len, int read)
{
- if (len <= 0)
- return 1;
-
- if (ihs_i2c_address(chip, addr, alen, len))
+ /* Don't hold the bus if length of data to send/receive is zero */
+ if (len <= 0 || ihs_i2c_address(chip, addr, alen, len))
return 1;
while (len) {
int transfer = min(len, 2);
+ bool is_last = len <= transfer;
if (ihs_i2c_transfer(chip, buffer, transfer, read,
-len <= transfer))
- return 1;
+is_last))
+ return 2;
buffer += transfer;
- addr += transfer;
len -= transfer;
}
return 0;
}
-
static void ihs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
{
#ifdef CONFIG_SYS_I2C_INIT_BOARD
@@ -173,7 +174,7 @@ static int ihs_i2c_probe(struct i2c_adapter *adap, uchar
chip)
{
uchar buffer[2];
- if (ihs_i2c_transfer(chip, buffer, 0, true, true))
+ if (ihs_i2c_transfer(chip, buffer, 0, I2COP_READ, true))
return 1;
return 0;
@@ -182,13 +183,23 @@ static int ihs_i2c_probe(struct i2c_adapter *adap, uchar
chip)
static int ih
[U-Boot] [PATCH 066/080] gpio: mpc8xxx: Make compatible with more SoCs
Finally, make the mpc8xxx driver capable of handling more GPIO devices;
this entails adding a special case for the MPC5121 SoC, and adding a set
of new compatible strings.
Signed-off-by: Mario Six
---
drivers/gpio/mpc8xxx_gpio.c | 23 +--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
index e4ebbc117c..0aa72ecd9f 100644
--- a/drivers/gpio/mpc8xxx_gpio.c
+++ b/drivers/gpio/mpc8xxx_gpio.c
@@ -11,8 +11,8 @@
#include
#include
-#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -37,6 +37,12 @@ struct mpc8xxx_gpio_data {
* for output pins
*/
u32 dat_shadow;
+ ulong type;
+};
+
+enum {
+ MPC8XXX_GPIO_TYPE,
+ MPC5121_GPIO_TYPE,
};
inline u32 gpio_mask(uint gpio)
@@ -119,6 +125,12 @@ static int mpc8xxx_gpio_set_value(struct udevice *dev,
uint gpio, int value)
static int mpc8xxx_gpio_direction_output(struct udevice *dev, uint gpio,
int value)
{
+ struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
+
+ /* GPIO 28..31 are input only on MPC5121 */
+ if (data->type == MPC5121_GPIO_TYPE && gpio >= 28)
+ return -EINVAL;
+
return mpc8xxx_gpio_set_value(dev, gpio, value);
}
@@ -188,6 +200,7 @@ static int mpc8xxx_gpio_platdata_to_priv(struct udevice
*dev)
struct mpc8xxx_gpio_data *priv = dev_get_priv(dev);
struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
unsigned long size = plat->size;
+ ulong driver_data = dev_get_driver_data(dev);
if (size == 0)
size = 0x100;
@@ -237,7 +250,13 @@ static const struct dm_gpio_ops gpio_mpc8xxx_ops = {
};
static const struct udevice_id mpc8xxx_gpio_ids[] = {
- { .compatible = "fsl,pq3-gpio" },
+ { .compatible = "fsl,pq3-gpio", .data = MPC8XXX_GPIO_TYPE },
+ { .compatible = "fsl,mpc8308-gpio", .data = MPC8XXX_GPIO_TYPE },
+ { .compatible = "fsl,mpc8349-gpio", .data = MPC8XXX_GPIO_TYPE },
+ { .compatible = "fsl,mpc8572-gpio", .data = MPC8XXX_GPIO_TYPE},
+ { .compatible = "fsl,mpc8610-gpio", .data = MPC8XXX_GPIO_TYPE},
+ { .compatible = "fsl,mpc5121-gpio", .data = MPC5121_GPIO_TYPE, },
+ { .compatible = "fsl,qoriq-gpio", .data = MPC8XXX_GPIO_TYPE },
{ /* sentinel */ }
};
--
2.11.0
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[U-Boot] [PATCH 056/080] cfi_flash: Rename camel-case variables
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index b2857f372d..dff8b73055 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1686,8 +1686,8 @@ static int cmdset_intel_init(flash_info_t *info, struct
cfi_qry *qry)
static void cmdset_amd_read_jedec_ids(flash_info_t *info)
{
- ushort bankId = 0;
- uchar manuId;
+ ushort bank_id = 0;
+ uchar manu_id;
uchar lsbits;
flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
@@ -1695,14 +1695,14 @@ static void cmdset_amd_read_jedec_ids(flash_info_t
*info)
flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
udelay(1000); /* some flash are slow to respond */
- manuId = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
+ manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
/* JEDEC JEP106Z specifies ID codes up to bank 7 */
- while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
- bankId += 0x100;
- manuId = flash_read_uchar(info,
- bankId | FLASH_OFFSET_MANUFACTURER_ID);
+ while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
+ bank_id += 0x100;
+ manu_id = flash_read_uchar(info,
+ bank_id | FLASH_OFFSET_MANUFACTURER_ID);
}
- info->manufacturer_id = manuId;
+ info->manufacturer_id = manu_id;
lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS);
info->sr_supported = lsbits & BIT(0);
--
2.11.0
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[U-Boot] [PATCH 064/080] gpio: mpc85xx: Rename driver file to mpc8xxx
In preparation to making the MPC85xx GPIO driver useable for a broader
range of SoCs, rename the driver file.
Signed-off-by: Mario Six
---
drivers/gpio/Makefile | 2 +-
drivers/gpio/{mpc85xx_gpio.c => mpc8xxx_gpio.c} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename drivers/gpio/{mpc85xx_gpio.c => mpc8xxx_gpio.c} (100%)
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1396467ab6..38ff3773a1 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -37,7 +37,7 @@ obj-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
obj-$(CONFIG_DM644X_GPIO) += da8xx_gpio.o
obj-$(CONFIG_ALTERA_PIO) += altera_pio.o
obj-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
-obj-$(CONFIG_MPC85XX_GPIO) += mpc85xx_gpio.o
+obj-$(CONFIG_MPC85XX_GPIO) += mpc8xxx_gpio.o
obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o
obj-$(CONFIG_OMAP_GPIO)+= omap_gpio.o
obj-$(CONFIG_DB8500_GPIO) += db8500_gpio.o
diff --git a/drivers/gpio/mpc85xx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
similarity index 100%
rename from drivers/gpio/mpc85xx_gpio.c
rename to drivers/gpio/mpc8xxx_gpio.c
--
2.11.0
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[U-Boot] [PATCH 052/080] cfi_flash: Reduce the scope of some variables
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index c47ba416b9..c597c621ca 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -179,10 +179,10 @@ __maybe_weak u64 flash_read64(void *addr)
static flash_info_t *flash_get_info(ulong base)
{
int i;
- flash_info_t *info;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- info = &flash_info[i];
+ flash_info_t *info = &flash_info[i];
+
if (info->size && info->start[0] <= base &&
base <= info->start[0] + info->size - 1)
return info;
@@ -222,8 +222,6 @@ static inline void flash_unmap(flash_info_t *info,
flash_sect_t sect,
static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
{
int i;
- int cword_offset;
- int cp_offset;
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
u32 cmd_le = cpu_to_le32(cmd);
#endif
@@ -231,9 +229,10 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd,
void *cmdbuf)
uchar *cp = (uchar *) cmdbuf;
for (i = info->portwidth; i > 0; i--) {
- cword_offset = (info->portwidth - i) % info->chipwidth;
+ int cword_offset = (info->portwidth - i) % info->chipwidth;
+ int cp_offset = info->portwidth - i;
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
- cp_offset = info->portwidth - i;
+
val = *((uchar *)&cmd_le + cword_offset);
#else
cp_offset = i - 1;
@@ -2053,16 +2052,10 @@ static void flash_fixup_num(flash_info_t *info, struct
cfi_qry *qry)
ulong flash_get_size(phys_addr_t base, int banknum)
{
flash_info_t *info = &flash_info[banknum];
- int i, j;
flash_sect_t sect_cnt;
phys_addr_t sector;
- unsigned long tmp;
- int size_ratio;
uchar num_erase_regions;
- int erase_region_size;
- int erase_region_count;
struct cfi_qry qry;
- unsigned long max_size;
memset(&qry, 0, sizeof(qry));
@@ -2075,6 +2068,11 @@ ulong flash_get_size(phys_addr_t base, int banknum)
info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
if (flash_detect_cfi(info, &qry)) {
+ int i;
+ int size_ratio;
+ unsigned long max_size;
+ unsigned long tmp;
+
info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
num_erase_regions = qry.num_erase_regions;
@@ -2159,6 +2157,10 @@ ulong flash_get_size(phys_addr_t base, int banknum)
sect_cnt = 0;
sector = base;
for (i = 0; i < num_erase_regions; i++) {
+ int j;
+ int erase_region_size;
+ int erase_region_count;
+
if (i > NUM_ERASE_REGIONS) {
printf("%d erase regions found, only %d used\n",
num_erase_regions, NUM_ERASE_REGIONS);
--
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[U-Boot] [PATCH 040/080] cfi_flash: Fix spacing around casts/operators
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index a766facb2a..a28f5eaea9 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -231,7 +231,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd,
void *cmdbuf)
uchar *cp = (uchar *) cmdbuf;
for (i = info->portwidth; i > 0; i--) {
- cword_offset = (info->portwidth-i)%info->chipwidth;
+ cword_offset = (info->portwidth - i) % info->chipwidth;
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
cp_offset = info->portwidth - i;
val = *((uchar *)&cmd_le + cword_offset);
@@ -252,7 +252,7 @@ static void print_longlong(char *str, unsigned long long
data)
int i;
char *cp;
- cp = (char *) &data;
+ cp = (char *)&data;
for (i = 0; i < 8; i++)
sprintf(&str[i * 2], "%2.2x", *cp++);
}
@@ -512,7 +512,7 @@ static int flash_toggle(flash_info_t *info, flash_sect_t
sect,
break;
case FLASH_CFI_64BIT:
retval = ((flash_read32(addr) != flash_read32(addr)) ||
- (flash_read32(addr+4) != flash_read32(addr+4)));
+ (flash_read32(addr + 4) != flash_read32(addr + 4)));
break;
default:
retval = 0;
@@ -1212,7 +1212,7 @@ void flash_print_info(flash_info_t *info)
printf("%s flash (%d x %d)",
info->name,
(info->portwidth << 3), (info->chipwidth << 3));
- if (info->size < 1024*1024)
+ if (info->size < 1024 * 1024)
printf(" Size: %ld kB in %d Sectors\n",
info->size >> 10, info->sector_count);
else
@@ -1882,7 +1882,7 @@ static void __flash_cmd_reset(flash_info_t *info)
flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
}
void flash_cmd_reset(flash_info_t *info)
- __attribute__((weak,alias("__flash_cmd_reset")));
+ __attribute__((weak, alias("__flash_cmd_reset")));
static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
{
@@ -2029,7 +2029,7 @@ static void flash_fixup_sst(flash_info_t *info, struct
cfi_qry *qry)
if (info->device_id == 0x5D23 || /* SST39VF3201B */
info->device_id == 0x5C23) { /* SST39VF3202B */
/* set sector granularity to 4KB */
- info->cmd_erase_sector=0x50;
+ info->cmd_erase_sector = 0x50;
}
}
@@ -2087,9 +2087,9 @@ ulong flash_get_size(phys_addr_t base, int banknum)
num_erase_regions = qry.num_erase_regions;
if (info->ext_addr) {
- info->cfi_version = (ushort) flash_read_uchar(info,
+ info->cfi_version = (ushort)flash_read_uchar(info,
info->ext_addr + 3) << 8;
- info->cfi_version |= (ushort) flash_read_uchar(info,
+ info->cfi_version |= (ushort)flash_read_uchar(info,
info->ext_addr + 4);
}
@@ -2386,7 +2386,7 @@ unsigned long flash_init(void)
#ifndef CONFIG_SYS_FLASH_QUIET_TEST
printf("## Unknown flash on Bank %d "
"- Size = 0x%08lx = %ld MB\n",
- i+1, flash_info[i].size,
+ i + 1, flash_info[i].size,
flash_info[i].size >> 20);
#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
}
--
2.11.0
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Re: [U-Boot] [PATCH 03/14] arm: socfpga: stratix10: Add Clock Manager driver for Stratix10 SoC
On Tue, 2017-09-26 at 17:04 -0500, Dinh Nguyen wrote:
> On Tue, Sep 19, 2017 at 4:22 AM, wrote:
> >
> > From: Chin Liang See
> >
> > Add Clock Manager driver support for Stratix SoC
> >
> > Signed-off-by: Chin Liang See
> > ---
> > arch/arm/mach-socfpga/Makefile | 4 +
> > arch/arm/mach-socfpga/clock_manager.c | 4 +-
> > arch/arm/mach-socfpga/clock_manager_s10.c | 359
> > +
> > arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 +
> > .../mach-socfpga/include/mach/clock_manager_s10.h | 202
> >
> > arch/arm/mach-socfpga/include/mach/handoff_s10.h | 29 ++
> > arch/arm/mach-socfpga/wrap_pll_config_s10.c| 46 +++
> > 7 files changed, 644 insertions(+), 2 deletions(-)
> > create mode 100644 arch/arm/mach-socfpga/clock_manager_s10.c
> > create mode 100644 arch/arm/mach-
> > socfpga/include/mach/clock_manager_s10.h
> > create mode 100644 arch/arm/mach-
> > socfpga/include/mach/handoff_s10.h
> > create mode 100644 arch/arm/mach-socfpga/wrap_pll_config_s10.c
> >
> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> > socfpga/Makefile
> > index 286bfef..e5f9dd7 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -30,6 +30,10 @@ obj-y+= pinmux_arria10.o
> > obj-y += reset_manager_arria10.o
> > endif
> >
> > +ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
> > +obj-y += clock_manager_s10.o
> > +obj-y += wrap_pll_config_s10.o
> > +endif
> > ifdef CONFIG_SPL_BUILD
> > obj-y += spl.o
> > ifdef CONFIG_TARGET_SOCFPGA_GEN5
> > diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-
> > socfpga/clock_manager.c
> > index cb6ae03..f9450a4 100644
> > --- a/arch/arm/mach-socfpga/clock_manager.c
> > +++ b/arch/arm/mach-socfpga/clock_manager.c
> > @@ -21,7 +21,7 @@ void cm_wait_for_lock(u32 mask)
> > do {
> > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > inter_val = readl(&clock_manager_base->inter) &
> > mask;
> > -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > +#else
> > inter_val = readl(&clock_manager_base->stat) &
> > mask;
> > #endif
> > /* Wait for stable lock */
> > @@ -52,7 +52,7 @@ int set_cpu_clk_info(void)
> >
> > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > gd->bd->bi_ddr_freq = cm_get_sdram_clk_hz() / 100;
> > -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > +#else
> > gd->bd->bi_ddr_freq = 0;
> > #endif
> >
> > diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c
> > b/arch/arm/mach-socfpga/clock_manager_s10.c
> > new file mode 100644
> > index 000..a9f9b07
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/clock_manager_s10.c
> > @@ -0,0 +1,359 @@
> > +/*
> > + * Copyright (C) 2016-2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +static const struct socfpga_clock_manager *clock_manager_base =
> > + (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS;
> > +
> > +/*
> > + * function to write the bypass register which requires a poll of
> > the
> > + * busy bit
> > + */
> > +static void cm_write_bypass_mainpll(uint32_t val)
> > +{
> > + writel(val, &clock_manager_base->main_pll.bypass);
> > + cm_wait_for_fsm();
> > +}
> Add a new line..
>
> >
> > +static void cm_write_bypass_perpll(uint32_t val)
> > +{
> > + writel(val, &clock_manager_base->per_pll.bypass);
> > + cm_wait_for_fsm();
> > +}
> > +
> > +/* function to write the ctrl register which requires a poll of
> > the busy bit */
> > +static void cm_write_ctrl(uint32_t val)
> > +{
> > + writel(val, &clock_manager_base->ctrl);
> > + cm_wait_for_fsm();
> > +}
> > +
> > +/*
> > + * Setup clocks while making no assumptions about previous state
> > of the clocks.
> > + *
> Remove extra line
>
> >
> > + */
> > +void cm_basic_init(const struct cm_config * const cfg)
> > +{
> > + uint32_t mdiv, refclkdiv, mscnt, hscnt, vcocalib;
> > +
> > + if (cfg == 0)
> > + return;
> > +
> > + /* Put all plls in bypass */
> > + cm_write_bypass_mainpll(CLKMGR_BYPASS_MAINPLL_ALL);
> > + cm_write_bypass_perpll(CLKMGR_BYPASS_PERPLL_ALL);
> > +
> > + /* setup main PLL dividers */
> > + /* calculate the vcocalib value */
> Move the above comment to where vcocalib is getting calculated, or
> remove.
>
> >
> > + mdiv = (cfg->main_pll_fdbck >> CLKMGR_FDBCK_MDIV_OFFSET) &
> > + CLKMGR_FDBCK_MDIV_MASK;
> > + refclkdiv = (cfg->main_pll_pllglob >>
> > CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) &
> > +CLKMGR_PLLGLOB_REFCLKDIV_MASK;
> > + mscnt = 200 / (6 + mdiv) / refclkdiv;
> Where are these values, 200 and 6 coming from? Should they be a
> #define?
>
Yes, I can improve the readaibility here.
> >
> > + hscnt = (mdiv + 6) * m
[U-Boot] [PATCH 041/080] cfi_flash: Fix missing/superfluous lines
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index a28f5eaea9..1ccb05091d 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -269,6 +269,7 @@ static void flash_printqry(struct cfi_qry *qry)
debug(" ");
for (y = 0; y < 16; y++) {
unsigned char c = p[x + y];
+
if (c >= 0x20 && c <= 0x7e)
debug("%c", c);
else
@@ -279,7 +280,6 @@ static void flash_printqry(struct cfi_qry *qry)
}
#endif
-
/*---
* read a character at a port width address
*/
@@ -311,7 +311,6 @@ static inline ushort flash_read_word(flash_info_t *info,
uint offset)
return retval;
}
-
/*---
* read a long word by picking the least significant byte of each maximum
* port size word. Swap for ppc format.
@@ -356,7 +355,6 @@ static ulong flash_read_long (flash_info_t *info,
flash_sect_t sect,
static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
uint offset, u32 cmd)
{
-
void *addr;
cfiword_t cword;
@@ -1048,7 +1046,6 @@ out_unmap:
}
#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
-
/*---
*/
int flash_erase(flash_info_t *info, int s_first, int s_last)
@@ -1080,7 +1077,6 @@ int flash_erase(flash_info_t *info, int s_first, int
s_last)
putc('\n');
}
-
for (sect = s_first; sect <= s_last; sect++) {
if (ctrlc()) {
printf("\n");
@@ -1154,6 +1150,7 @@ int flash_erase(flash_info_t *info, int s_first, int
s_last)
if (use_flash_status_poll(info)) {
cfiword_t cword;
void *dest;
+
cword.w64 = 0xULL;
dest = flash_map(info, sect, 0);
st = flash_status_poll(info, &cword, dest,
@@ -1494,7 +1491,6 @@ int flash_real_protect(flash_info_t *info, long sector,
int prot)
else
flash_write_cmd(info, sector, 0,
FLASH_CMD_PROTECT_CLEAR);
-
}
break;
case CFI_CMDSET_AMD_EXTENDED:
@@ -1579,7 +1575,6 @@ int flash_real_protect(flash_info_t *info, long sector,
int prot)
if ((retcode =
flash_full_status_check(info, sector, info->erase_blk_tout,
prot ? "protect" : "unprotect")) == 0) {
-
info->protect[sector] = prot;
/*
@@ -1881,6 +1876,7 @@ static void __flash_cmd_reset(flash_info_t *info)
udelay(1);
flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
}
+
void flash_cmd_reset(flash_info_t *info)
__attribute__((weak, alias("__flash_cmd_reset")));
@@ -2364,6 +2360,7 @@ unsigned long flash_init(void)
#ifdef CONFIG_SYS_FLASH_PROTECTION
/* read environment from EEPROM */
char s[64];
+
env_get_f("unlock", s, sizeof(s));
#endif
--
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[U-Boot] [PATCH 037/080] cfi_flash: Fix Parenthesis spacing
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 1b0eb3398c..03bfb634cc 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -230,7 +230,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd,
void *cmdbuf)
uchar val;
uchar *cp = (uchar *) cmdbuf;
- for (i = info->portwidth; i > 0; i--){
+ for (i = info->portwidth; i > 0; i--) {
cword_offset = (info->portwidth-i)%info->chipwidth;
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
cp_offset = info->portwidth - i;
@@ -511,8 +511,8 @@ static int flash_toggle(flash_info_t *info, flash_sect_t
sect,
retval = flash_read32(addr) != flash_read32(addr);
break;
case FLASH_CFI_64BIT:
- retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
- (flash_read32(addr+4) != flash_read32(addr+4)) );
+ retval = ((flash_read32(addr) != flash_read32(addr)) ||
+ (flash_read32(addr+4) != flash_read32(addr+4)));
break;
default:
retval = 0;
@@ -1713,7 +1713,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info)
lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS);
info->sr_supported = lsbits & BIT(0);
- switch (info->chipwidth){
+ switch (info->chipwidth) {
case FLASH_CFI_8BIT:
info->device_id = flash_read_uchar(info,
FLASH_OFFSET_DEVICE_ID);
@@ -1832,7 +1832,7 @@ static int flash_detect_legacy(phys_addr_t base, int
banknum)
}
}
- switch(info->vendor) {
+ switch (info->vendor) {
case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_STANDARD:
case CFI_CMDSET_INTEL_EXTENDED:
@@ -1919,12 +1919,12 @@ static int __flash_detect_cfi(flash_info_t *info,
struct cfi_qry *qry)
* modify the unlock address if we are
* in compatibility mode
*/
- if (/* x8/x16 in x8 mode */
- ((info->chipwidth == FLASH_CFI_BY8) &&
- (info->interface == FLASH_CFI_X8X16)) ||
- /* x16/x32 in x16 mode */
- ((info->chipwidth == FLASH_CFI_BY16) &&
- (info->interface == FLASH_CFI_X16X32)))
+ if (/* x8/x16 in x8 mode */
+ ((info->chipwidth == FLASH_CFI_BY8) &&
+ (info->interface == FLASH_CFI_X8X16)) ||
+ /* x16/x32 in x16 mode */
+ ((info->chipwidth == FLASH_CFI_BY16) &&
+ (info->interface == FLASH_CFI_X16X32)))
{
info->addr_unlock1 = 0xaaa;
info->addr_unlock2 = 0x555;
--
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[U-Boot] [PATCH 009/080] core: Add {ofnode, dev}_translate_address functions
Signed-off-by: Mario Six
---
drivers/core/ofnode.c | 8
drivers/core/read.c | 5 +
include/dm/ofnode.h | 13 +
include/dm/read.h | 17 +
4 files changed, 43 insertions(+)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index a59e40aa97..7f2c98614e 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -642,3 +642,11 @@ int ofnode_read_resource_byname(ofnode node, const char
*name,
return ofnode_read_resource(node, index, res);
}
+
+u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr)
+{
+ if (ofnode_is_np(node))
+ return of_translate_address(ofnode_to_np(node), in_addr);
+ else
+ return fdt_translate_address(gd->fdt_blob,
ofnode_to_offset(node), in_addr);
+}
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 2766d228a6..f35ff57246 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -187,3 +187,8 @@ int dev_read_resource_byname(struct udevice *dev, const
char *name,
{
return ofnode_read_resource_byname(dev_ofnode(dev), name, res);
}
+
+u64 dev_translate_address(struct udevice *dev, const fdt32_t *in_addr)
+{
+ return ofnode_translate_address(dev_ofnode(dev), in_addr);
+}
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 79374b8f91..92ffeebf16 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -652,4 +652,17 @@ int ofnode_read_resource_byname(ofnode node, const char
*name,
ofnode_valid(node); \
node = ofnode_next_subnode(node))
+/**
+ * ofnode_translate_address() - Tranlate a device-tree address
+ *
+ * Translate an address from the device-tree into a CPU physical address. This
+ * function walks up the tree and applies the various bus mappings along the
+ * way.
+ *
+ * @ofnode: Device tree node giving the context in which to translate the
+ * address
+ * @in_addr: pointer to the address to translate
+ * @return the translated address; OF_BAD_ADDR on error
+ */
+u64 ofnode_translate_address(ofnode node, const fdt32_t *in_addr);
#endif
diff --git a/include/dm/read.h b/include/dm/read.h
index d2f47a678f..d88a6c547e 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -410,6 +410,18 @@ int dev_read_resource(struct udevice *dev, uint index,
struct resource *res);
int dev_read_resource_byname(struct udevice *dev, const char *name,
struct resource *res);
+/**
+ * dev_translate_address() - Tranlate a device-tree address
+ *
+ * Translate an address from the device-tree into a CPU physical address. This
+ * function walks up the tree and applies the various bus mappings along the
+ * way.
+ *
+ * @dev: device giving the context in which to translate the address
+ * @in_addr: pointer to the address to translate
+ * @return the translated address; OF_BAD_ADDR on error
+ */
+u64 dev_translate_address(struct udevice *dev, const fdt32_t *in_addr);
#else /* CONFIG_DM_DEV_READ_INLINE is enabled */
static inline int dev_read_u32_default(struct udevice *dev,
@@ -582,6 +594,11 @@ static inline int dev_read_resource_byname(struct udevice
*dev,
return ofnode_read_resource_byname(dev_ofnode(dev), name, res);
}
+static inline u64 dev_translate_address(struct udevice *dev, const fdt32_t
*in_addr)
+{
+ return ofnode_translate_address(dev_ofnode(dev), in_addr);
+}
+
#endif /* CONFIG_DM_DEV_READ_INLINE */
/**
--
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[U-Boot] [PATCH 079/080] i2c: ihs_i2c: Factor out send_buffer method
Simplify the driver logic by extracting a common send_buffer method.
Signed-off-by: Mario Six
---
drivers/i2c/ihs_i2c.c | 50 ++
1 file changed, 26 insertions(+), 24 deletions(-)
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index c3fddb55f9..0432ca0994 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -203,32 +203,48 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer,
int len, bool read,
}
#ifdef CONFIG_DM_I2C
-static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int
alen, bool hold_bus)
+static int ihs_i2c_send_buffer(struct udevice *dev, uchar chip, u8 *data, int
len, bool hold_bus, int read)
#else
-static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
+static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus,
+ int read)
#endif
{
- while (alen) {
- int transfer = min(alen, 2);
- bool is_last = alen <= transfer;
+ while (len) {
+ int transfer = min(len, 2);
+ bool is_last = len <= transfer;
#ifdef CONFIG_DM_I2C
- if (ihs_i2c_transfer(dev, chip, addr, transfer, I2COP_WRITE,
+ if (ihs_i2c_transfer(dev, chip, data, transfer, read,
hold_bus ? false : is_last))
return 1;
#else
- if (ihs_i2c_transfer(chip, addr, transfer, I2COP_WRITE,
+ if (ihs_i2c_transfer(chip, data, transfer, read,
hold_bus ? false : is_last))
return 1;
#endif
- alen -= transfer;
+ data += transfer;
+ len -= transfer;
}
return 0;
}
#ifdef CONFIG_DM_I2C
+static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int alen,
+ bool hold_bus)
+#else
+static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
+#endif
+{
+#ifdef CONFIG_DM_I2C
+ return ihs_i2c_send_buffer(dev, chip, addr, alen, hold_bus,
I2COP_WRITE);
+#else
+ return ihs_i2c_send_buffer(chip, addr, alen, hold_bus, I2COP_WRITE);
+#endif
+}
+
+#ifdef CONFIG_DM_I2C
static int ihs_i2c_access(struct udevice *dev, uchar chip, u8 *addr,
int alen, uchar *buffer, int len, int read)
#else
@@ -245,25 +261,11 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar
chip, u8 *addr,
return 1;
#endif
- while (len) {
- int transfer = min(len, 2);
- bool is_last = len <= transfer;
-
#ifdef CONFIG_DM_I2C
- if (ihs_i2c_transfer(dev, chip, buffer, transfer, read,
-is_last))
- return 2;
+ return ihs_i2c_send_buffer(dev, chip, buffer, len, false, read);
#else
- if (ihs_i2c_transfer(chip, buffer, transfer, read,
-is_last))
- return 2;
+ return ihs_i2c_send_buffer(chip, buffer, len, false, read);
#endif
-
- buffer += transfer;
- len -= transfer;
- }
-
- return 0;
}
#ifdef CONFIG_DM_I2C
--
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[U-Boot] [PATCH 010/080] core: Make device_is_compatible live-tree compatible
Judging from its name and parameters, device_is_compatible looks like it
is compatible with a live device tree, but it actually isn't.
Make is compatible with a live device tree.
Signed-off-by: Mario Six
---
drivers/core/device.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 5463d1ffa5..23de6a6246 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -702,8 +703,12 @@ int device_set_name(struct udevice *dev, const char *name)
bool device_is_compatible(struct udevice *dev, const char *compat)
{
const void *fdt = gd->fdt_blob;
+ ofnode node = dev_ofnode(dev);
- return !fdt_node_check_compatible(fdt, dev_of_offset(dev), compat);
+ if (ofnode_is_np(node))
+ return of_device_is_compatible(ofnode_to_np(node), compat,
NULL, NULL);
+ else
+ return !fdt_node_check_compatible(fdt, ofnode_to_offset(node),
compat);
}
bool of_machine_is_compatible(const char *compat)
--
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[U-Boot] [PATCH 051/080] cfi_flash: Remove return from void function
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index cd89c666d6..c47ba416b9 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1280,7 +1280,6 @@ void flash_print_info(flash_info_t *info)
#endif
}
putc('\n');
- return;
}
/*---
--
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[U-Boot] [PATCH 076/080] phy: Fix style violations
Fix some style violations in the generic PHY management code.
Signed-off-by: Mario Six
---
drivers/net/phy/phy.c | 82 ++-
1 file changed, 49 insertions(+), 33 deletions(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 5be51d73ce..0050a70075 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Generic PHY support and helper functions */
/**
- * genphy_config_advert - sanitize and advertise auto-negotation parameters
+ * genphy_config_advert - sanitize and advertise auto-negotiation parameters
* @phydev: target phy_device struct
*
* Description: Writes MII_ADVERTISE with the appropriate values,
@@ -117,7 +117,6 @@ static int genphy_config_advert(struct phy_device *phydev)
return changed;
}
-
/**
* genphy_setup_forced - configures/forces speed/duplex from @phydev
* @phydev: target phy_device struct
@@ -130,14 +129,15 @@ static int genphy_setup_forced(struct phy_device *phydev)
int err;
int ctl = BMCR_ANRESTART;
- phydev->pause = phydev->asym_pause = 0;
+ phydev->pause = 0;
+ phydev->asym_pause = 0;
- if (SPEED_1000 == phydev->speed)
+ if (phydev->speed == SPEED_1000)
ctl |= BMCR_SPEED1000;
- else if (SPEED_100 == phydev->speed)
+ else if (phydev->speed == SPEED_100)
ctl |= BMCR_SPEED100;
- if (DUPLEX_FULL == phydev->duplex)
+ if (phydev->duplex == DUPLEX_FULL)
ctl |= BMCR_FULLDPLX;
err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
@@ -145,7 +145,6 @@ static int genphy_setup_forced(struct phy_device *phydev)
return err;
}
-
/**
* genphy_restart_aneg - Enable and Restart Autonegotiation
* @phydev: target phy_device struct
@@ -169,7 +168,6 @@ int genphy_restart_aneg(struct phy_device *phydev)
return ctl;
}
-
/**
* genphy_config_aneg - restart auto-negotiation or write BMCR
* @phydev: target phy_device struct
@@ -182,7 +180,7 @@ int genphy_config_aneg(struct phy_device *phydev)
{
int result;
- if (AUTONEG_ENABLE != phydev->autoneg)
+ if (phydev->autoneg != AUTONEG_ENABLE)
return genphy_setup_forced(phydev);
result = genphy_config_advert(phydev);
@@ -192,7 +190,8 @@ int genphy_config_aneg(struct phy_device *phydev)
if (result == 0) {
/* Advertisment hasn't changed, but maybe aneg was never on to
-* begin with? Or maybe phy was isolated? */
+* begin with? Or maybe phy was isolated?
+*/
int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
if (ctl < 0)
@@ -203,7 +202,8 @@ int genphy_config_aneg(struct phy_device *phydev)
}
/* Only restart aneg if we are advertising something different
-* than we were before. */
+* than we were before.
+*/
if (result > 0)
result = genphy_restart_aneg(phydev);
@@ -240,7 +240,7 @@ int genphy_update_link(struct phy_device *phydev)
int i = 0;
printf("%s Waiting for PHY auto negotiation to complete",
- phydev->dev->name);
+ phydev->dev->name);
while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
/*
* Timeout reached ?
@@ -305,7 +305,8 @@ int genphy_parse_link(struct phy_device *phydev)
*/
gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
if (gblpa < 0) {
- debug("Could not read MII_STAT1000. Ignoring
gigabit capability\n");
+ debug("Could not read MII_STAT1000. ");
+ debug("Ignoring gigabit capability\n");
gblpa = 0;
}
gblpa &= phy_read(phydev,
@@ -338,8 +339,9 @@ int genphy_parse_link(struct phy_device *phydev)
if (lpa & LPA_100FULL)
phydev->duplex = DUPLEX_FULL;
- } else if (lpa & LPA_10FULL)
+ } else if (lpa & LPA_10FULL) {
phydev->duplex = DUPLEX_FULL;
+ }
/*
* Extended status may indicate that the PHY supports
@@ -574,7 +576,9 @@ static int phy_probe(struct phy_device *phydev)
{
int err = 0;
- phydev->advertising = phydev->supported = phydev->drv->features;
+ phydev->advertising = phydev->drv->features;
+ phydev->supported = phydev->drv->features;
+
phydev->mmds = phydev->drv->mmds;
if (phydev->drv->probe)
@@ -594,7 +598,7 @@ static struct phy_driver
*generic_for_interface(phy_interface_t interface)
}
static struct phy_driver *get_phy_driver(struct phy_devic
[U-Boot] [PATCH 024/080] net: tsec: Make live-tree compatible
Make the tsec ethernet driver compatible with a live device tree.
Signed-off-by: Mario Six
---
drivers/net/tsec.c | 41 ++---
1 file changed, 18 insertions(+), 23 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 44140fb037..3eb09e93b2 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -20,8 +20,6 @@
#include
#include
-DECLARE_GLOBAL_DATA_PTR;
-
#ifndef CONFIG_DM_ETH
/* Default initializations for TSEC controllers. */
@@ -779,45 +777,42 @@ int tsec_probe(struct udevice *dev)
struct tsec_private *priv = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_platdata(dev);
struct fsl_pq_mdio_info mdio_info;
- int offset = 0;
- int reg;
+ struct ofnode_phandle_args phandle_args;
+ ofnode parent;
const char *phy_mode;
int ret;
- pdata->iobase = (phys_addr_t)devfdt_get_addr(dev);
+ pdata->iobase = (phys_addr_t)dev_read_addr(dev);
priv->regs = (struct tsec *)pdata->iobase;
- offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
- "phy-handle");
- if (offset > 0) {
- reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
- priv->phyaddr = reg;
- } else {
+ if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+ &phandle_args)) {
debug("phy-handle does not exist under tsec %s\n", dev->name);
return -ENOENT;
+ } else {
+ int reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
+ priv->phyaddr = reg;
}
- offset = fdt_parent_offset(gd->fdt_blob, offset);
- if (offset > 0) {
- reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
+ parent = ofnode_get_parent(phandle_args.node);
+ if (ofnode_valid(parent)) {
+ int reg = ofnode_read_u32_default(parent, "reg", 0);
priv->phyregs_sgmii = (struct tsec_mii_mng *)(reg + 0x520);
} else {
debug("No parent node for PHY?\n");
return -ENOENT;
}
- offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
- "tbi-handle");
- if (offset > 0) {
- reg = fdtdec_get_int(gd->fdt_blob, offset, "reg",
-CONFIG_SYS_TBIPA_VALUE);
- priv->tbiaddr = reg;
- } else {
+ if (dev_read_phandle_with_args(dev, "tbi-handle", NULL, 0, 0,
+ &phandle_args)) {
priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE;
+ } else {
+ int reg = ofnode_read_u32_default(phandle_args.node, "reg",
+ CONFIG_SYS_TBIPA_VALUE);
+ priv->tbiaddr = reg;
}
- phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
- "phy-connection-type", NULL);
+ phy_mode = dev_read_prop(dev, "phy-connection-type", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
--
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[U-Boot] [PATCH 053/080] cfi_flash: Remove assignments from if conditions
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index c597c621ca..bc7bd3036e 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1338,7 +1338,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong
addr, ulong cnt)
wp = (addr & ~(info->portwidth - 1));
/* handle unaligned start */
- if ((aln = addr - wp) != 0) {
+ aln = addr - wp;
+ if (aln != 0) {
cword.w32 = 0;
p = (uchar *)wp;
for (i = 0; i < aln; ++i)
@@ -1369,7 +1370,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong
addr, ulong cnt)
cword.w32 = 0;
for (i = 0; i < info->portwidth; i++)
flash_add_byte(info, &cword, *src++);
- if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
+ rc = flash_write_cfiword(info, wp, cword);
+ if (rc != 0)
return rc;
wp += info->portwidth;
cnt -= info->portwidth;
@@ -1380,7 +1382,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong
addr, ulong cnt)
i = buffered_size - (wp % buffered_size);
if (i > cnt)
i = cnt;
- if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
+ rc = flash_write_cfibuffer(info, wp, src, i);
+ if (rc != ERR_OK)
return rc;
i -= i & (info->portwidth - 1);
wp += i;
@@ -1396,7 +1399,8 @@ int write_buff(flash_info_t *info, uchar *src, ulong
addr, ulong cnt)
cword.w32 = 0;
for (i = 0; i < info->portwidth; i++)
flash_add_byte(info, &cword, *src++);
- if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
+ rc = flash_write_cfiword(info, wp, cword);
+ if (rc != 0)
return rc;
wp += info->portwidth;
cnt -= info->portwidth;
@@ -1568,9 +1572,9 @@ int flash_real_protect(flash_info_t *info, long sector,
int prot)
* flash_full_status_check() to work correctly
*/
flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
- if ((retcode =
-flash_full_status_check(info, sector, info->erase_blk_tout,
- prot ? "protect" : "unprotect")) == 0) {
+ retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
+ prot ? "protect" : "unprotect");
+ if (retcode == 0) {
info->protect[sector] = prot;
/*
--
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[U-Boot] [PATCH 032/080] gdsys: Post ppc4xx removal cleanup
The ppc4xx architecture was recently removed, and with it several old
gdsys 44x boards, but some "debris" from these purged boards was left
over.
This patch removes these remnants (mostly entries in Makefiles, some now
superfluous data structures and some now obsolete config variables from
the whitelist).
Signed-off-by: Mario Six
---
board/gdsys/common/Makefile | 4 --
board/gdsys/common/miiphybb.c | 128 --
include/gdsys_fpga.h | 96 ---
scripts/config_whitelist.txt | 10
4 files changed, 238 deletions(-)
delete mode 100644 board/gdsys/common/miiphybb.c
diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index d4f0e70573..6f2fea207f 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -7,10 +7,6 @@
obj-$(CONFIG_SYS_FPGA_COMMON) += fpga.o
obj-$(CONFIG_CMD_IOLOOP) += cmd_ioloop.o
-obj-$(CONFIG_IO) += miiphybb.o
-obj-$(CONFIG_IO64) += miiphybb.o
-obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o ch7301.o
-obj-$(CONFIG_DLVISION_10G) += osd.o dp501.o
obj-$(CONFIG_CONTROLCENTERD) += dp501.o
obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o fanctrl.o
obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
diff --git a/board/gdsys/common/miiphybb.c b/board/gdsys/common/miiphybb.c
deleted file mode 100644
index 310562902b..00
--- a/board/gdsys/common/miiphybb.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * (C) Copyright 2010
- * Dirk Eibach, Guntermann & Drunck GmbH, eib...@gdsys.de
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include
-#include
-
-#include
-
-struct io_bb_pinset {
- int mdio;
- int mdc;
-};
-
-static int io_bb_mii_init(struct bb_miiphy_bus *bus)
-{
- return 0;
-}
-
-static int io_bb_mdio_active(struct bb_miiphy_bus *bus)
-{
- struct io_bb_pinset *pins = bus->priv;
-
- out_be32((void *)GPIO0_TCR,
- in_be32((void *)GPIO0_TCR) | pins->mdio);
-
- return 0;
-}
-
-static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus)
-{
- struct io_bb_pinset *pins = bus->priv;
-
- out_be32((void *)GPIO0_TCR,
- in_be32((void *)GPIO0_TCR) & ~pins->mdio);
-
- return 0;
-}
-
-static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
-{
- struct io_bb_pinset *pins = bus->priv;
-
- if (v)
- out_be32((void *)GPIO0_OR,
- in_be32((void *)GPIO0_OR) | pins->mdio);
- else
- out_be32((void *)GPIO0_OR,
- in_be32((void *)GPIO0_OR) & ~pins->mdio);
-
- return 0;
-}
-
-static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
-{
- struct io_bb_pinset *pins = bus->priv;
-
- *v = ((in_be32((void *)GPIO0_IR) & pins->mdio) != 0);
-
- return 0;
-}
-
-static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
-{
- struct io_bb_pinset *pins = bus->priv;
-
- if (v)
- out_be32((void *)GPIO0_OR,
- in_be32((void *)GPIO0_OR) | pins->mdc);
- else
- out_be32((void *)GPIO0_OR,
- in_be32((void *)GPIO0_OR) & ~pins->mdc);
-
- return 0;
-}
-
-static int io_bb_delay(struct bb_miiphy_bus *bus)
-{
- udelay(1);
-
- return 0;
-}
-
-struct io_bb_pinset io_bb_pinsets[] = {
- {
- .mdio = CONFIG_SYS_MDIO_PIN,
- .mdc = CONFIG_SYS_MDC_PIN,
- },
-#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
- {
- .mdio = CONFIG_SYS_MDIO1_PIN,
- .mdc = CONFIG_SYS_MDC1_PIN,
- },
-#endif
-};
-
-struct bb_miiphy_bus bb_miiphy_buses[] = {
- {
- .name = CONFIG_SYS_GBIT_MII_BUSNAME,
- .init = io_bb_mii_init,
- .mdio_active = io_bb_mdio_active,
- .mdio_tristate = io_bb_mdio_tristate,
- .set_mdio = io_bb_set_mdio,
- .get_mdio = io_bb_get_mdio,
- .set_mdc = io_bb_set_mdc,
- .delay = io_bb_delay,
- .priv = &io_bb_pinsets[0],
- },
-#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
- {
- .name = CONFIG_SYS_GBIT_MII1_BUSNAME,
- .init = io_bb_mii_init,
- .mdio_active = io_bb_mdio_active,
- .mdio_tristate = io_bb_mdio_tristate,
- .set_mdio = io_bb_set_mdio,
- .get_mdio = io_bb_get_mdio,
- .set_mdc = io_bb_set_mdc,
- .delay = io_bb_delay,
- .priv = &io_bb_pinsets[1],
- },
-#endif
-};
-
-int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
- sizeof(bb_miiphy_buses[0]);
diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h
index bb8e144e04..34d6eeb253 100644
--- a/include/gdsys_fpga.h
+++ b/include/gdsys_fpga.h
@@ -87,81 +87,6 @@ struct ihs_fpga {
};
#endif
-#ifdef CONFIG_IO
-struct ihs_fpga {
- u16 reflection_low; /* 0x */
-
[U-Boot] [PATCH 044/080] cfi_flash: Use __func__ macro instead of function name
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index b73b72bcee..2ec8f5a27b 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -555,7 +555,7 @@ static int flash_is_busy(flash_info_t *info, flash_sect_t
sect)
default:
retval = 0;
}
- debug("flash_is_busy: %d\n", retval);
+ debug("%s: %d\n", __func__, retval);
return retval;
}
--
2.11.0
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[U-Boot] [PATCH 023/080] net: tsec: Fix memory leak in error path
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.
Free the device structure in the error case.
Signed-off-by: Mario Six
---
drivers/net/tsec.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index aa261845f3..44140fb037 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -702,7 +702,9 @@ static int tsec_initialize(bd_t *bis, struct
tsec_info_struct *tsec_info)
priv = (struct tsec_private *)malloc(sizeof(*priv));
if (!priv) {
+ free(dev);
return 0;
+ }
priv->regs = tsec_info->regs;
priv->phyregs_sgmii = tsec_info->miiregs_sgmii;
--
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[U-Boot] [PATCH 074/080] strider, hrcon: Reset CAT phy on CON2 module
From: Dirk Eibach
The phy on the CON2 module needs a defined reset pulse of at least 10 ms
to work reliably.
Signed-off-by: Dirk Eibach
Signed-off-by: Mario Six
---
board/gdsys/mpc8308/hrcon.c | 30 ++
board/gdsys/mpc8308/strider.c | 24
2 files changed, 54 insertions(+)
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index b3017de911..b03328278e 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -58,6 +58,26 @@ struct {
u8 addr;
} hrcon_fans[] = CONFIG_HRCON_FANS;
+#ifdef CONFIG_HRCON_DH
+struct {
+ u8 bus;
+ u8 addr;
+ u16 mask;
+} rgmii2_reset[] = { { 0, 0x23, 0x0100},
+{10, 0x23, 0x0100},
+{11, 0x23, 0x0100},
+{12, 0x23, 0x0100} };
+#else
+struct {
+ u8 bus;
+ u8 addr;
+ u16 mask;
+} rgmii2_reset[] = { {0, 0x23, 0x0100},
+{6, 0x23, 0x0100},
+{7, 0x23, 0x0100},
+{8, 0x23, 0x0100} };
+#endif
+
int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
{
int res;
@@ -160,6 +180,16 @@ int last_stage_init(void)
MCFPGA_RESET_N);
}
+ if (hw_type_cat && ch0_rgmii2_present) {
+ i2c_set_bus_num(rgmii2_reset[0].bus);
+ pca953x_set_val(rgmii2_reset[0].addr, rgmii2_reset[0].mask, 0);
+ pca953x_set_dir(rgmii2_reset[0].addr, rgmii2_reset[0].mask, 0);
+ mdelay(10);
+ pca953x_set_dir(rgmii2_reset[0].addr, rgmii2_reset[0].mask,
+ rgmii2_reset[0].mask);
+ i2c_set_bus_num(0);
+ }
+
if (hw_type_cat) {
uint mux_ch;
int retval;
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index 3ee5a4889d..c3f9c9a535 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -61,6 +61,17 @@ struct {
u8 addr;
} strider_fans[] = CONFIG_STRIDER_FANS;
+#if defined(CONFIG_STRIDER_CON) || defined(CONFIG_STRIDER_CON_DP)
+struct {
+ u8 bus;
+ u8 addr;
+ u16 mask;
+} sgmii2_reset[] = { { 0, 0x23, 0x0100},
+{10, 0x23, 0x0100},
+{11, 0x23, 0x0100},
+{12, 0x23, 0x0100} };
+#endif
+
int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
{
int res;
@@ -178,6 +189,18 @@ int last_stage_init(void)
MCFPGA_RESET_N);
}
+#if defined(CONFIG_STRIDER_CON) || defined(CONFIG_STRIDER_CON_DP)
+ if (hw_type_cat && ch0_sgmii2_present) {
+ i2c_set_bus_num(sgmii2_reset[0].bus);
+ pca953x_set_val(sgmii2_reset[0].addr, sgmii2_reset[0].mask, 0);
+ pca953x_set_dir(sgmii2_reset[0].addr, sgmii2_reset[0].mask, 0);
+ mdelay(10);
+ pca953x_set_dir(sgmii2_reset[0].addr, sgmii2_reset[0].mask,
+ sgmii2_reset[0].mask);
+ i2c_set_bus_num(0);
+ }
+#endif
+
if (hw_type_cat) {
int retval;
struct mii_dev *mdiodev = mdio_alloc();
@@ -261,6 +284,7 @@ int last_stage_init(void)
ch7301_probe(k, false);
dp501_probe(k, false);
#endif
+
if (hw_type_cat) {
int retval;
struct mii_dev *mdiodev = mdio_alloc();
--
2.11.0
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[U-Boot] [PATCH 049/080] cfi_flash: Fix else after break
Signed-off-by: Mario Six --- drivers/mtd/cfi_flash.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 0d015a3863..a82f5272c1 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1820,9 +1820,9 @@ static int flash_detect_legacy(phys_addr_t base, int banknum) info->device_id2); if (jedec_flash_match(info, info->start[0])) break; - else - unmap_physmem((void *)info->start[0], - info->portwidth); + + unmap_physmem((void *)info->start[0], + info->portwidth); } } -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 067/080] mpc83xx: Prepare usage of DM gpio driver
The MPC85xx GPIO driver was converted to handle a broader range of SoCs.
Prepare the MPC83xx code for usage of this driver.
Signed-off-by: Mario Six
---
arch/powerpc/include/asm/arch-mpc83xx/gpio.h | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
index 40ef2151b8..6ec4f00022 100644
--- a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
+++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
@@ -19,7 +19,15 @@
#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS)
+struct mpc8xxx_gpio_plat {
+ ulong addr;
+ unsigned long size;
+ uint ngpios;
+};
+
+#ifndef DM_GPIO
void mpc83xx_gpio_init_f(void);
void mpc83xx_gpio_init_r(void);
+#endif /* DM_GPIO */
#endif /* MPC83XX_GPIO_H_ */
--
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[U-Boot] [PATCH 035/080] cfi_flash: Fix space between function name and parenthesis
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 428
1 file changed, 214 insertions(+), 214 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 8a5babea7b..b3dda8bd4a 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -204,7 +204,7 @@ unsigned long flash_sector_size(flash_info_t *info,
flash_sect_t sect)
* create an address based on the offset and the port width
*/
static inline void *
-flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
+flash_map(flash_info_t * info, flash_sect_t sect, uint offset)
{
unsigned int byte_offset = offset * info->portwidth;
@@ -247,17 +247,17 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd,
void *cmdbuf)
/*---
* Debug support
*/
-static void print_longlong (char *str, unsigned long long data)
+static void print_longlong(char *str, unsigned long long data)
{
int i;
char *cp;
cp = (char *) &data;
for (i = 0; i < 8; i++)
- sprintf (&str[i * 2], "%2.2x", *cp++);
+ sprintf(&str[i * 2], "%2.2x", *cp++);
}
-static void flash_printqry (struct cfi_qry *qry)
+static void flash_printqry(struct cfi_qry *qry)
{
u8 *p = (u8 *)qry;
int x, y;
@@ -283,31 +283,31 @@ static void flash_printqry (struct cfi_qry *qry)
/*---
* read a character at a port width address
*/
-static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
+static inline uchar flash_read_uchar(flash_info_t * info, uint offset)
{
uchar *cp;
uchar retval;
- cp = flash_map (info, 0, offset);
+ cp = flash_map(info, 0, offset);
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
retval = flash_read8(cp);
#else
retval = flash_read8(cp + info->portwidth - 1);
#endif
- flash_unmap (info, 0, offset, cp);
+ flash_unmap(info, 0, offset, cp);
return retval;
}
/*---
* read a word at a port width address, assume 16bit bus
*/
-static inline ushort flash_read_word (flash_info_t * info, uint offset)
+static inline ushort flash_read_word(flash_info_t * info, uint offset)
{
ushort *addr, retval;
- addr = flash_map (info, 0, offset);
- retval = flash_read16 (addr);
- flash_unmap (info, 0, offset, addr);
+ addr = flash_map(info, 0, offset);
+ retval = flash_read16(addr);
+ flash_unmap(info, 0, offset, addr);
return retval;
}
@@ -325,13 +325,13 @@ static ulong flash_read_long (flash_info_t * info,
flash_sect_t sect,
#ifdef DEBUG
int x;
#endif
- addr = flash_map (info, sect, offset);
+ addr = flash_map(info, sect, offset);
#ifdef DEBUG
- debug ("long addr is at %p info->portwidth = %d\n", addr,
+ debug("long addr is at %p info->portwidth = %d\n", addr,
info->portwidth);
for (x = 0; x < 4 * info->portwidth; x++) {
- debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
+ debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
}
#endif
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
@@ -360,22 +360,22 @@ static void flash_write_cmd(flash_info_t *info,
flash_sect_t sect,
void *addr;
cfiword_t cword;
- addr = flash_map (info, sect, offset);
- flash_make_cmd (info, cmd, &cword);
+ addr = flash_map(info, sect, offset);
+ flash_make_cmd(info, cmd, &cword);
switch (info->portwidth) {
case FLASH_CFI_8BIT:
- debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
+ debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
flash_write8(cword.w8, addr);
break;
case FLASH_CFI_16BIT:
- debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
+ debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
cmd, cword.w16,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
flash_write16(cword.w16, addr);
break;
case FLASH_CFI_32BIT:
- debug ("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
+ debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
cmd, cword.w32,
info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
flash_write32(cword.w32, addr);
@@ -385,9 +385,9 @@ static void flash_write_cmd(flash_info_t *info,
flash_sect_t sect,
{
char str[20];
- print_longlong (str, cword.w64);
+
[U-Boot] [PATCH 034/080] net: phy: marvell 88e151x: Fix handling of bare RGMII interface type
Commit 68e6eca ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88es_config) is to have
both bits set.
Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.
Signed-off-by: Mario Six
---
drivers/net/phy/marvell.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 5d9f50a436..8eddf70c68 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -357,7 +357,8 @@ static int m88e1518_config(struct phy_device *phydev)
reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E151x_PHY_MSCR);
reg &= ~MIIM_88E151x_RGMII_RXTX_DELAY;
- if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||
+ phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
reg |= MIIM_88E151x_RGMII_RXTX_DELAY;
else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
reg |= MIIM_88E151x_RGMII_RX_DELAY;
--
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[U-Boot] [PATCH 050/080] cfi_flash: Fix placement of brace
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index a82f5272c1..cd89c666d6 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1919,8 +1919,7 @@ static int __flash_detect_cfi(flash_info_t *info, struct
cfi_qry *qry)
info->interface == FLASH_CFI_X8X16) ||
/* x16/x32 in x16 mode */
(info->chipwidth == FLASH_CFI_BY16 &&
- info->interface == FLASH_CFI_X16X32))
- {
+ info->interface == FLASH_CFI_X16X32)) {
info->addr_unlock1 = 0xaaa;
info->addr_unlock2 = 0x555;
}
--
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Re: [U-Boot] [PATCH] Revert "sunxi: imply USB_GADGET"
On Fri, Sep 29, 2017 at 11:44:48AM +, Icenowy Zheng wrote: > This reverts commit 061221ae61440eb05fd5b94ca77c7731315cbddd. > > The implying of USB_GADGET makes the boards without USB_MUSB_GADGET > enabled not able to be built in the U-Boot, and the number of the > boards broken is much more than the boards benefited from this > commit. So it's reverted. > > Signed-off-by: Icenowy Zheng > --- > arch/arm/Kconfig | 1 - > configs/A13-OLinuXino_defconfig| 2 ++ > configs/A20-OLinuXino-Lime2-eMMC_defconfig | 2 ++ > configs/A20-OLinuXino-Lime2_defconfig | 2 ++ > configs/CHIP_defconfig | 2 ++ > configs/CHIP_pro_defconfig | 2 ++ > configs/Cubietruck_defconfig | 2 ++ > configs/Nintendo_NES_Classic_Edition_defconfig | 2 ++ > configs/Sinlinx_SinA33_defconfig | 2 ++ > configs/parrot_r16_defconfig | 2 ++ > 10 files changed, 18 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 28b30ce0c3..e78a43a519 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -704,7 +704,6 @@ config ARCH_SUNXI > imply SPL_MMC_SUPPORT if MMC > imply SPL_POWER_SUPPORT > imply SPL_SERIAL_SUPPORT > - imply USB_GADGET This doesn't fix anything though. You still have the option to enable that option in the offended boards, and it will be just as broken. What is the breakage you have, on what boards? Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 015/080] spi: Remove obsolete spi_base_setup_slave_fdt
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.
But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.
Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.
Signed-off-by: Mario Six
---
drivers/spi/spi.c| 20
include/spi.h| 14 --
scripts/config_whitelist.txt | 1 -
3 files changed, 35 deletions(-)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index dea8dcda5b..45e73d28e4 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -39,23 +39,3 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int
bus,
return ptr;
}
-
-#ifdef CONFIG_OF_SPI
-struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
- int node)
-{
- int cs, max_hz, mode = 0;
-
- cs = fdtdec_get_int(blob, node, "reg", -1);
- max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", 10);
- if (fdtdec_get_bool(blob, node, "spi-cpol"))
- mode |= SPI_CPOL;
- if (fdtdec_get_bool(blob, node, "spi-cpha"))
- mode |= SPI_CPHA;
- if (fdtdec_get_bool(blob, node, "spi-cs-high"))
- mode |= SPI_CS_HIGH;
- if (fdtdec_get_bool(blob, node, "spi-half-duplex"))
- mode |= SPI_PREAMBLE;
- return spi_setup_slave(busnum, cs, max_hz, mode);
-}
-#endif
diff --git a/include/spi.h b/include/spi.h
index 8c4b882c54..9c69cd7e87 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -328,20 +328,6 @@ static inline int spi_w8r8(struct spi_slave *slave,
unsigned char byte)
*/
struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
int spi_node);
-
-/**
- * spi_base_setup_slave_fdt() - helper function to set up a SPI slace
- *
- * This decodes SPI properties from the slave node to determine the
- * chip select and SPI parameters.
- *
- * @blob: Device tree blob
- * @busnum:Bus number to use
- * @node: Device tree node for the SPI bus
- */
-struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
- int node);
-
#ifdef CONFIG_DM_SPI
/**
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index db5d88b4b5..0dbe8986a6 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1614,7 +1614,6 @@ CONFIG_NUM_PAMU
CONFIG_ODROID_REV_AIN
CONFIG_OFF_PADCONF
CONFIG_OF_
-CONFIG_OF_SPI
CONFIG_OF_SPI_FLASH
CONFIG_OF_STDOUT_PATH
CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
--
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Re: [U-Boot] [PATCH 02/14] arm: dts: Add dts for Stratix10 SoC
On Tue, 2017-09-26 at 16:34 -0500, Dinh Nguyen wrote:
> On Tue, Sep 19, 2017 at 4:22 AM, wrote:
> >
> > From: Chin Liang See
> >
> > Device tree for Stratix10 SoC
> >
> > Signed-off-by: Chin Liang See
> > ---
> > arch/arm/dts/Makefile| 3 +-
> > arch/arm/dts/socfpga_stratix10_socdk.dts | 141
> > +++
> > 2 files changed, 143 insertions(+), 1 deletion(-)
> > create mode 100644 arch/arm/dts/socfpga_stratix10_socdk.dts
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index fee4680..4cf5fd0 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -171,7 +171,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA)
> > += \
> > socfpga_cyclone5_sockit.dtb \
> > socfpga_cyclone5_socrates.dtb \
> > socfpga_cyclone5_sr1500.dtb \
> > - socfpga_cyclone5_vining_fpga.dtb
> > + socfpga_cyclone5_vining_fpga.dtb\
> > + socfpga_stratix10_socdk.dtb
> >
> > dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
> > dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb
> > diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts
> > b/arch/arm/dts/socfpga_stratix10_socdk.dts
> > new file mode 100644
> > index 000..484c630
> > --- /dev/null
> > +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
> > @@ -0,0 +1,141 @@
> > +/*
> > + * Copyright (C) 2016-2017 Intel Corporation
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +/dts-v1/;
> > +#include "skeleton.dtsi"
> > +#include
> You don't add the patch for this include file until patch 4/14, which
> means
> the build will fail until patch 4 is applied. You need to move this
> patch
> after 4/14.
Yes, good catch. Let shuffle this
>
> >
> > +
> > +/ {
> > + model = "Intel SOCFPGA Stratix 10 SoC Development Kit";
> > + compatible = "altr,socfpga-stratix10", "altr,socfpga";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + chosen {
> > + bootargs = "console=ttyS0,115200";
> > + };
> > +
> > + aliases {
> > + ethernet0 = &gmac0;
> > + spi0 = &qspi;
> > + };
> > +
> > + memory {
> > + name = "memory";
> > + device_type = "memory";
> > + reg = <0x0 0x8000>; /* 2GB */
> > + };
> > +
> > + regulator_3_3v: 3-3-v-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3.3V";
> > + regulator-min-microvolt = <330>;
> > + regulator-max-microvolt = <330>;
> > + };
> > +
> > + soc {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "simple-bus";
> > + device_type = "soc";
> > + ranges;
> > + u-boot,dm-pre-reloc;
> > +
> > + rst: rstmgr@ffd11000 {
> > + #reset-cells = <1>;
> > + compatible = "altr,rst-mgr";
> > + reg = <0xffd11000 0x100>;
> > + altr,modrst-offset = <0x20>;
> > + };
> > +
> > + gmac0: ethernet@ff80 {
> > + compatible = "altr,socfpga-stmmac",
> > "snps,dwmac-3.74a", "snps,dwmac";
> > + reg = <0xff80 0x2000>;
> > + interrupts = <0 90 4>;
> > + interrupt-names = "macirq";
> > + mac-address = [00 00 00 00 00 00];
> > + resets = <&rst EMAC0_RESET>;
> > + reset-names = "stmmaceth";
> > + phy-mode = "rgmii";
> > + phy-addr = <0x>; /* probe for phy
> > addr */
> > + max-speed = <1000>;
> > + txd0-skew-ps = <0>; /* -420ps */
> > + txd1-skew-ps = <0>; /* -420ps */
> > + txd2-skew-ps = <0>; /* -420ps */
> > + txd3-skew-ps = <0>; /* -420ps */
> > + rxd0-skew-ps = <420>; /* 0ps */
> > + rxd1-skew-ps = <420>; /* 0ps */
> > + rxd2-skew-ps = <420>; /* 0ps */
> > + rxd3-skew-ps = <420>; /* 0ps */
> > + txen-skew-ps = <0>; /* -420ps */
> > + txc-skew-ps = <1860>; /* 960ps */
> > + rxdv-skew-ps = <420>; /* 0ps */
> > + rxc-skew-ps = <1680>; /* 780ps */
> These are PHY properties, which should be in a separate PHY node.
Let me check on the PHY driver
Chin Liang
>
> Dinh
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[U-Boot] [PATCH 062/080] mtd: cfi_flash: Make live-tree compatible
Make the cfi_flash driver compatible with a live device tree.
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 4415bcca24..accbd432e7 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -2457,27 +2457,28 @@ unsigned long flash_init(void)
#ifdef CONFIG_CFI_FLASH /* for driver model */
static int cfi_flash_probe(struct udevice *dev)
{
- void *blob = (void *)gd->fdt_blob;
- int node = dev_of_offset(dev);
const fdt32_t *cell;
- phys_addr_t addr;
- int parent, addrc, sizec;
+ int addrc, sizec;
int len, idx;
- parent = fdt_parent_offset(blob, node);
- fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
- /* decode regs, there may be multiple reg tuples. */
- cell = fdt_getprop(blob, node, "reg", &len);
+ addrc = dev_read_addr_cells(dev);
+ sizec = dev_read_size_cells(dev);
+
+ /* decode regs; there may be multiple reg tuples. */
+ cell = dev_read_prop(dev, "reg", &len);
if (!cell)
return -ENOENT;
idx = 0;
len /= sizeof(fdt32_t);
while (idx < len) {
- addr = fdt_translate_address((void *)blob,
-node, cell + idx);
+ phys_addr_t addr;
+
+ addr = dev_translate_address(dev, cell + idx);
+
flash_info[cfi_flash_num_flash_banks].dev = dev;
flash_info[cfi_flash_num_flash_banks].base = addr;
cfi_flash_num_flash_banks++;
+
idx += addrc + sizec;
}
gd->bd->bi_flashstart = flash_info[0].base;
--
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[U-Boot] [PATCH 063/080] gpio: mpc85xx_gpio: Fix style violations
Fix some style violations in the MPC85XX GPIO driver.
Signed-off-by: Mario Six
---
drivers/gpio/mpc85xx_gpio.c | 42 ++
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/drivers/gpio/mpc85xx_gpio.c b/drivers/gpio/mpc85xx_gpio.c
index cfeb6e7632..4566c091b7 100644
--- a/drivers/gpio/mpc85xx_gpio.c
+++ b/drivers/gpio/mpc85xx_gpio.c
@@ -34,11 +34,13 @@ struct mpc85xx_gpio_data {
uint gpio_count;
/* The GPDAT register cannot be used to determine the value of output
* pins on MPC8572/MPC8536, so we shadow it and use the shadowed value
-* for output pins */
+* for output pins
+*/
u32 dat_shadow;
};
-inline u32 gpio_mask(unsigned gpio) {
+inline u32 gpio_mask(uint gpio)
+{
return (1U << (31 - (gpio)));
}
@@ -92,7 +94,7 @@ static inline void mpc85xx_gpio_open_drain_off(struct
ccsr_gpio *base,
clrbits_be32(&base->gpodr, gpios);
}
-static int mpc85xx_gpio_direction_input(struct udevice *dev, unsigned gpio)
+static int mpc85xx_gpio_direction_input(struct udevice *dev, uint gpio)
{
struct mpc85xx_gpio_data *data = dev_get_priv(dev);
@@ -100,8 +102,7 @@ static int mpc85xx_gpio_direction_input(struct udevice
*dev, unsigned gpio)
return 0;
}
-static int mpc85xx_gpio_set_value(struct udevice *dev, unsigned gpio,
- int value)
+static int mpc85xx_gpio_set_value(struct udevice *dev, uint gpio, int value)
{
struct mpc85xx_gpio_data *data = dev_get_priv(dev);
@@ -115,46 +116,46 @@ static int mpc85xx_gpio_set_value(struct udevice *dev,
unsigned gpio,
return 0;
}
-static int mpc85xx_gpio_direction_output(struct udevice *dev, unsigned gpio,
+static int mpc85xx_gpio_direction_output(struct udevice *dev, uint gpio,
int value)
{
return mpc85xx_gpio_set_value(dev, gpio, value);
}
-static int mpc85xx_gpio_get_value(struct udevice *dev, unsigned gpio)
+static int mpc85xx_gpio_get_value(struct udevice *dev, uint gpio)
{
struct mpc85xx_gpio_data *data = dev_get_priv(dev);
if (!!mpc85xx_gpio_get_dir(data->base, gpio_mask(gpio))) {
/* Output -> use shadowed value */
return !!(data->dat_shadow & gpio_mask(gpio));
- } else {
- /* Input -> read value from GPDAT register */
- return !!mpc85xx_gpio_get_val(data->base, gpio_mask(gpio));
}
+
+ /* Input -> read value from GPDAT register */
+ return !!mpc85xx_gpio_get_val(data->base, gpio_mask(gpio));
}
-static int mpc85xx_gpio_get_open_drain(struct udevice *dev, unsigned gpio)
+static int mpc85xx_gpio_get_open_drain(struct udevice *dev, uint gpio)
{
struct mpc85xx_gpio_data *data = dev_get_priv(dev);
return !!mpc85xx_gpio_open_drain_val(data->base, gpio_mask(gpio));
}
-static int mpc85xx_gpio_set_open_drain(struct udevice *dev, unsigned gpio,
+static int mpc85xx_gpio_set_open_drain(struct udevice *dev, uint gpio,
int value)
{
struct mpc85xx_gpio_data *data = dev_get_priv(dev);
- if (value) {
+ if (value)
mpc85xx_gpio_open_drain_on(data->base, gpio_mask(gpio));
- } else {
+ else
mpc85xx_gpio_open_drain_off(data->base, gpio_mask(gpio));
- }
+
return 0;
}
-static int mpc85xx_gpio_get_function(struct udevice *dev, unsigned gpio)
+static int mpc85xx_gpio_get_function(struct udevice *dev, uint gpio)
{
struct mpc85xx_gpio_data *data = dev_get_priv(dev);
int dir;
@@ -164,14 +165,15 @@ static int mpc85xx_gpio_get_function(struct udevice *dev,
unsigned gpio)
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
-static int mpc85xx_gpio_ofdata_to_platdata(struct udevice *dev) {
+static int mpc85xx_gpio_ofdata_to_platdata(struct udevice *dev)
+{
struct mpc85xx_gpio_plat *plat = dev_get_platdata(dev);
fdt_addr_t addr;
fdt_size_t size;
addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob,
- dev_of_offset(dev), "reg", 0, &size, false);
-
+ dev_of_offset(dev),
+ "reg", 0, &size, false);
plat->addr = addr;
plat->size = size;
plat->ngpios = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
@@ -229,7 +231,7 @@ static const struct dm_gpio_ops gpio_mpc85xx_ops = {
.set_value = mpc85xx_gpio_set_value,
.get_open_drain = mpc85xx_gpio_get_open_drain,
.set_open_drain = mpc85xx_gpio_set_open_drain,
- .get_function = mpc85xx_gpio_get_function,
+ .get_function = mpc85xx_gpio_get_function,
};
static const struct udevice_id mpc85xx_gpio_ids[] = {
--
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htt
[U-Boot] [PATCH 033/080] net: phy: marvell: Fix style violations
Fix some style violations (mostly wrong indentions) in the Marvell PHY
driver.
Signed-off-by: Mario Six
---
drivers/net/phy/marvell.c | 44 ++--
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index b7f300e40f..5d9f50a436 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -134,7 +134,7 @@ static int m88e1xxx_parse_status(struct phy_device *phydev)
mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS);
if ((mii_reg & MIIM_88E1xxx_PHYSTAT_LINK) &&
- !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
+ !(mii_reg & MIIM_88E1xxx_PHYSTAT_SPDDONE)) {
int i = 0;
puts("Waiting for PHY realtime link");
@@ -150,10 +150,10 @@ static int m88e1xxx_parse_status(struct phy_device
*phydev)
putc('.');
udelay(1000);
mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
- MIIM_88E1xxx_PHY_STATUS);
+ MIIM_88E1xxx_PHY_STATUS);
}
puts(" done\n");
- udelay(50); /* another 500 ms (results in faster booting) */
+ mdelay(500);/* another 500 ms (results in faster booting) */
} else {
if (mii_reg & MIIM_88E1xxx_PHYSTAT_LINK)
phydev->link = 1;
@@ -201,9 +201,9 @@ static int m88es_config(struct phy_device *phydev)
if (phy_interface_is_rgmii(phydev)) {
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR);
+ MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR);
if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
- (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
+ (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
reg |= (MIIM_88E_RX_DELAY | MIIM_88E_TX_DELAY);
} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
reg &= ~MIIM_88E_TX_DELAY;
@@ -214,10 +214,10 @@ static int m88es_config(struct phy_device *phydev)
}
phy_write(phydev,
- MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR, reg);
+ MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR, reg);
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_SR);
+ MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_SR);
reg &= ~(MIIM_88E_HWCFG_MODE_MASK);
@@ -227,47 +227,47 @@ static int m88es_config(struct phy_device *phydev)
reg |= MIIM_88E_HWCFG_MODE_COPPER_RGMII;
phy_write(phydev,
- MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_SR, reg);
+ MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_SR, reg);
}
if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_SR);
+ MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_SR);
reg &= ~(MIIM_88E_HWCFG_MODE_MASK);
reg |= MIIM_88E_HWCFG_MODE_SGMII_NO_CLK;
reg |= MIIM_88E_HWCFG_FIBER_COPPER_AUTO;
phy_write(phydev, MDIO_DEVAD_NONE,
- MIIM_88E_PHY_EXT_SR, reg);
+ MIIM_88E_PHY_EXT_SR, reg);
}
if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
reg = phy_read(phydev,
- MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR);
+ MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR);
reg |= (MIIM_88E_RX_DELAY | MIIM_88E_TX_DELAY);
phy_write(phydev,
- MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR, reg);
+ MDIO_DEVAD_NONE, MIIM_88E_PHY_EXT_CR, reg);
reg = phy_read(phydev, MDIO_DEVAD_NONE,
- MIIM_88E_PHY_EXT_SR);
+ MIIM_88E_PHY_EXT_SR);
reg &= ~(MIIM_88E_HWCFG_MODE_MASK |
MIIM_88E_HWCFG_FIBER_COPPER_RES);
reg |= 0x7 | MIIM_88E_HWCFG_FIBER_COPPER_AUTO;
phy_write(phydev, MDIO_DEVAD_NONE,
- MIIM_88E_PHY_EXT_SR, reg);
+ MIIM_88E_PHY_EXT_SR, reg);
/* soft reset */
phy_reset(phydev);
reg = phy_read(phydev, MDIO_DEVAD_NONE,
- MIIM_88E_PHY_EXT_SR);
+ MIIM_88E_PHY_EXT_SR);
reg &= ~(MIIM_88E_HWCFG
[U-Boot] [PATCH 065/080] gpio: mpc8xxx: Rename Kconfig option, structures, and functions
Rename the Kconfig option, structures (and their members), as well as
functions of the mpc85xx driver to include mpc8xxx to reflect the more
generic usage.
Signed-off-by: Mario Six
---
arch/powerpc/include/asm/arch-mpc85xx/gpio.h | 2 +-
drivers/gpio/Kconfig | 9 +--
drivers/gpio/Makefile| 2 +-
drivers/gpio/mpc8xxx_gpio.c | 116 ++-
4 files changed, 64 insertions(+), 65 deletions(-)
diff --git a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
index 76faa22c8b..b2ba31e623 100644
--- a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
+++ b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
@@ -18,7 +18,7 @@
#include
#endif
-struct mpc85xx_gpio_plat {
+struct mpc8xxx_gpio_plat {
ulong addr;
unsigned long size;
uint ngpios;
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ffeda9425a..19d862f608 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -263,11 +263,11 @@ config DM_PCA953X
Now, max 24 bits chips and PCA953X compatible chips are
supported
-config MPC85XX_GPIO
- bool "Freescale MPC85XX GPIO driver"
+config MPC8XXX_GPIO
+ bool "Freescale MPC8XXX GPIO driver"
depends on DM_GPIO
help
- This driver supports the built-in GPIO controller of MPC85XX CPUs.
+ This driver supports the built-in GPIO controller of MPC8XXX CPUs.
Each GPIO bank is identified by its own entry in the device tree,
i.e.
@@ -285,7 +285,4 @@ config MPC85XX_GPIO
Aside from the standard functions of input/output mode, and output
value setting, the open-drain feature, which can configure individual
GPIOs to work as open-drain outputs, is supported.
-
- The driver has been tested on MPC85XX, but it is likely that other
- PowerQUICC III devices will work as well.
endmenu
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 38ff3773a1..81c39187de 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -37,7 +37,7 @@ obj-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
obj-$(CONFIG_DM644X_GPIO) += da8xx_gpio.o
obj-$(CONFIG_ALTERA_PIO) += altera_pio.o
obj-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
-obj-$(CONFIG_MPC85XX_GPIO) += mpc8xxx_gpio.o
+obj-$(CONFIG_MPC8XXX_GPIO) += mpc8xxx_gpio.o
obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o
obj-$(CONFIG_OMAP_GPIO)+= omap_gpio.o
obj-$(CONFIG_DB8500_GPIO) += db8500_gpio.o
diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
index 4566c091b7..e4ebbc117c 100644
--- a/drivers/gpio/mpc8xxx_gpio.c
+++ b/drivers/gpio/mpc8xxx_gpio.c
@@ -25,7 +25,7 @@ struct ccsr_gpio {
u32 gpicr;
};
-struct mpc85xx_gpio_data {
+struct mpc8xxx_gpio_data {
/* The bank's register base in memory */
struct ccsr_gpio __iomem *base;
/* The address of the registers; used to identify the bank */
@@ -44,130 +44,130 @@ inline u32 gpio_mask(uint gpio)
return (1U << (31 - (gpio)));
}
-static inline u32 mpc85xx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
+static inline u32 mpc8xxx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
{
return in_be32(&base->gpdat) & mask;
}
-static inline u32 mpc85xx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)
+static inline u32 mpc8xxx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)
{
return in_be32(&base->gpdir) & mask;
}
-static inline void mpc85xx_gpio_set_in(struct ccsr_gpio *base, u32 gpios)
+static inline void mpc8xxx_gpio_set_in(struct ccsr_gpio *base, u32 gpios)
{
clrbits_be32(&base->gpdat, gpios);
/* GPDIR register 0 -> input */
clrbits_be32(&base->gpdir, gpios);
}
-static inline void mpc85xx_gpio_set_low(struct ccsr_gpio *base, u32 gpios)
+static inline void mpc8xxx_gpio_set_low(struct ccsr_gpio *base, u32 gpios)
{
clrbits_be32(&base->gpdat, gpios);
/* GPDIR register 1 -> output */
setbits_be32(&base->gpdir, gpios);
}
-static inline void mpc85xx_gpio_set_high(struct ccsr_gpio *base, u32 gpios)
+static inline void mpc8xxx_gpio_set_high(struct ccsr_gpio *base, u32 gpios)
{
setbits_be32(&base->gpdat, gpios);
/* GPDIR register 1 -> output */
setbits_be32(&base->gpdir, gpios);
}
-static inline int mpc85xx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)
+static inline int mpc8xxx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)
{
return in_be32(&base->gpodr) & mask;
}
-static inline void mpc85xx_gpio_open_drain_on(struct ccsr_gpio *base, u32
+static inline void mpc8xxx_gpio_open_drain_on(struct ccsr_gpio *base, u32
gpios)
{
/* GPODR register 1 -> open drain on */
setbits_be32(&base->gpodr, gpios);
}
-static inline void mpc85xx_gpio_open_drain_off(struct ccsr_gpio *base,
+static
[U-Boot] [PATCH 038/080] cfi_flash: Fix whitespace with casting
Signed-off-by: Mario Six --- drivers/mtd/cfi_flash.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 03bfb634cc..8c62648642 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -234,10 +234,10 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) cword_offset = (info->portwidth-i)%info->chipwidth; #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) cp_offset = info->portwidth - i; - val = *((uchar*)&cmd_le + cword_offset); + val = *((uchar *)&cmd_le + cword_offset); #else cp_offset = i - 1; - val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); + val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1); #endif cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; } -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 031/080] serial: ns16550: Fix address translation
The dev_read_addr function does not do any bus translations, and just
returns the raw address read from the device tree, which makes the
driver not work on systems that need bus translations to get the actual
memory address of the device's register space.
Since the dev_read_addr function is widely used, we refrain from
modifying it, and instead read the raw address from the device tree, and
apply the bus translations using the recently introduced
dev_translate_address function.
Signed-off-by: Mario Six
---
drivers/serial/ns16550.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6f9ce689cf..15d55dfd24 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -389,12 +389,13 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
struct ns16550_platdata *plat = dev->platdata;
const u32 port_type = dev_get_driver_data(dev);
- fdt_addr_t addr;
+ fdt32_t addr;
struct clk clk;
int err;
/* try Processor Local Bus device first */
- addr = dev_read_addr(dev);
+ addr = dev_read_u32_default(dev, "reg", 0);
+ addr = dev_translate_address(dev, &addr);
#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
if (addr == FDT_ADDR_T_NONE) {
/* then try pci device */
--
2.11.0
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 039/080] cfi_flash: Fix indent of case statements
Signed-off-by: Mario Six
---
drivers/mtd/cfi_flash.c | 200
1 file changed, 100 insertions(+), 100 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 8c62648642..a766facb2a 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1220,29 +1220,29 @@ void flash_print_info(flash_info_t *info)
info->size >> 20, info->sector_count);
printf(" ");
switch (info->vendor) {
- case CFI_CMDSET_INTEL_PROG_REGIONS:
- printf("Intel Prog Regions");
- break;
- case CFI_CMDSET_INTEL_STANDARD:
- printf("Intel Standard");
- break;
- case CFI_CMDSET_INTEL_EXTENDED:
- printf("Intel Extended");
- break;
- case CFI_CMDSET_AMD_STANDARD:
- printf("AMD Standard");
- break;
- case CFI_CMDSET_AMD_EXTENDED:
- printf("AMD Extended");
- break;
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
+ printf("Intel Prog Regions");
+ break;
+ case CFI_CMDSET_INTEL_STANDARD:
+ printf("Intel Standard");
+ break;
+ case CFI_CMDSET_INTEL_EXTENDED:
+ printf("Intel Extended");
+ break;
+ case CFI_CMDSET_AMD_STANDARD:
+ printf("AMD Standard");
+ break;
+ case CFI_CMDSET_AMD_EXTENDED:
+ printf("AMD Extended");
+ break;
#ifdef CONFIG_FLASH_CFI_LEGACY
- case CFI_CMDSET_AMD_LEGACY:
- printf("AMD Legacy");
- break;
+ case CFI_CMDSET_AMD_LEGACY:
+ printf("AMD Legacy");
+ break;
#endif
- default:
- printf("Unknown (%d)", info->vendor);
- break;
+ default:
+ printf("Unknown (%d)", info->vendor);
+ break;
}
printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
info->manufacturer_id);
@@ -1480,94 +1480,94 @@ int flash_real_protect(flash_info_t *info, long sector,
int prot)
int retcode = 0;
switch (info->vendor) {
- case CFI_CMDSET_INTEL_PROG_REGIONS:
- case CFI_CMDSET_INTEL_STANDARD:
- case CFI_CMDSET_INTEL_EXTENDED:
- if (!cfi_protect_bugfix(info, sector, prot)) {
+ case CFI_CMDSET_INTEL_PROG_REGIONS:
+ case CFI_CMDSET_INTEL_STANDARD:
+ case CFI_CMDSET_INTEL_EXTENDED:
+ if (!cfi_protect_bugfix(info, sector, prot)) {
+ flash_write_cmd(info, sector, 0,
+FLASH_CMD_CLEAR_STATUS);
+ flash_write_cmd(info, sector, 0,
+ FLASH_CMD_PROTECT);
+ if (prot)
flash_write_cmd(info, sector, 0,
-FLASH_CMD_CLEAR_STATUS);
+ FLASH_CMD_PROTECT_SET);
+ else
flash_write_cmd(info, sector, 0,
- FLASH_CMD_PROTECT);
- if (prot)
- flash_write_cmd(info, sector, 0,
- FLASH_CMD_PROTECT_SET);
- else
- flash_write_cmd(info, sector, 0,
- FLASH_CMD_PROTECT_CLEAR);
+ FLASH_CMD_PROTECT_CLEAR);
+ }
+ break;
+ case CFI_CMDSET_AMD_EXTENDED:
+ case CFI_CMDSET_AMD_STANDARD:
+ /* U-Boot only checks the first byte */
+ if (manufact_match(info, ATM_MANUFACT)) {
+ if (prot) {
+ flash_unlock_seq(info, 0);
+ flash_write_cmd(info, 0,
+ info->addr_unlock1,
+ ATM_CMD_SOFTLOCK_START);
+ flash_unlock_seq(info, 0);
+ flash_write_cmd(info, sector, 0,
+ ATM_CMD_LOCK_SECT);
+ } else {
+ flash_write_cmd(info, 0,
+ info->addr_unlock1,
+ AMD_CMD_UNLOCK_START);
+ if (info->device_id == ATM_ID_BV6416)
+ flash_write_cmd(info, sector,
+
