Re: [U-Boot] [PATCH v8 08/10] usb: host: ohci-generic: add CLOCK support

2017-07-06 Thread Patrice CHOTARD
Hi Simon

On 07/06/2017 06:48 AM, Simon Glass wrote:
> On 21 June 2017 at 01:50,   wrote:
>> From: Patrice Chotard 
>>
>> use array to save enabled clocks reference in order to
>> disabled them in case of error during probe() or during
>> driver removal.
>>
>> Signed-off-by: Patrice Chotard 
>> ---
>> v8: _ rework error path by propagating the initial error code until the 
>> end of probe()
>>
>> v7: _ replace clk_count() by ofnode_count_phandle_with_args()
>>
>> v6: _ none
>>
>> v5: _ none
>>
>> v4: _ use generic_phy_valid() before generic_phy_exit() call
>>
>> v3: _ extract in this patch the CLOCK support add-on from previous patch 
>> 5
>>  _ keep enabled clocks reference in list in order to
>>disable clocks in error path or in .remove callback
>>
>> v2: _ add error path management
>>  _ add .remove callback
>>
>>   drivers/usb/host/ohci-generic.c | 59 
>> +++--
>>   1 file changed, 57 insertions(+), 2 deletions(-)
> 
> Reviewed-by: Simon Glass 
> 
> Nits below (sorry) for a respin or follow-on.
> 
>>
>> diff --git a/drivers/usb/host/ohci-generic.c 
>> b/drivers/usb/host/ohci-generic.c
>> index f85738f..15d1d60 100644
>> --- a/drivers/usb/host/ohci-generic.c
>> +++ b/drivers/usb/host/ohci-generic.c
>> @@ -5,7 +5,9 @@
>>*/
>>
>>   #include 
>> +#include 
>>   #include 
>> +#include 
>>   #include "ohci.h"
>>
>>   #if !defined(CONFIG_USB_OHCI_NEW)
>> @@ -14,18 +16,71 @@
>>
>>   struct generic_ohci {
>>  ohci_t ohci;
>> +   struct clk *clocks;
>> +   int clock_count;
>>   };
> 
> Please can you comment this struct?
> 
>>
>>   static int ohci_usb_probe(struct udevice *dev)
>>   {
>>  struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
>> +   struct generic_ohci *priv = dev_get_priv(dev);
>> +   int i, err, ret, clock_nb;
>>
>> -   return ohci_register(dev, regs);
>> +   err = 0;
>> +   priv->clock_count = 0;
>> +   clock_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "clocks",
>> + "#clock-cells");
> 
> Could we have a dev_read_...() version of this?

Yes, i will add it

> 
>> +   if (clock_nb > 0) {
>> +   priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct 
>> clk),
>> +   GFP_KERNEL);
>> +   if (!priv->clocks)
>> +   return -ENOMEM;
>> +
>> +   for (i = 0; i < clock_nb; i++) {
>> +   err = clk_get_by_index(dev, i, &priv->clocks[i]);
>> +   if (err < 0)
>> +   break;
>> +
>> +   err = clk_enable(&priv->clocks[i]);
>> +   if (err) {
>> +   error("failed to enable clock %d\n", i);
>> +   clk_free(&priv->clocks[i]);
>> +   goto clk_err;
>> +   }
>> +   priv->clock_count++;
>> +   clk_free(&priv->clocks[i]);
>> +   }
>> +   } else {
>> +   if (clock_nb != -ENOENT) {
> 
> } else if (...

ok

> 
> ?
> 
>> +   error("failed to get clock phandle(%d)\n", clock_nb);
>> +   return clock_nb;
>> +   }
>> +   }
>> +
>> +   err = ohci_register(dev, regs);
>> +   if (err)
>> +   goto clk_err;
>> +
>> +   return 0;
>> +
>> +clk_err:
>> +   ret = clk_disable_all(priv->clocks, priv->clock_count);
>> +   if (ret)
>> +   error("failed to disable all clocks\n");
>> +
>> +   return err;
>>   }
>>
>>   static int ohci_usb_remove(struct udevice *dev)
>>   {
>> -   return ohci_deregister(dev);
>> +   struct generic_ohci *priv = dev_get_priv(dev);
>> +   int ret;
>> +
>> +   ret = ohci_deregister(dev);
>> +   if (ret)
>> +   return ret;
>> +
>> +   return clk_disable_all(priv->clocks, priv->clock_count);
>>   }
>>
>>   static const struct udevice_id ohci_usb_ids[] = {
>> --
>> 1.9.1
>>
> 
> Regards,
> Simon
> 
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[U-Boot] [PATCH v10 00/10] usb: Extend ehci and ohci generic driver

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

This series improves generic ehci and ohci drivers by addition of :
_ error path during probe (clocks, resets and phy release)
_ .remove callback
_ add generic PHY framework for both generic ehci and ohci drivers
_ add RESET and CLOCK framework for generic ohci driver

To implement these features, some new methods are needed in reset, clock and
in dm/core framework:
_ add reset_request() and reset_assert_all() methods in RESET framework
_ add clk_count() and clk_disable_all() methods in CLOCK framework
_ add ofnode_count_phandle_with_args() and 
dev_count_phandle_with_args() in dm/core

v10:_ add dev_count_phandle_with_args() requested by Simon Glass
_ fix some mirno remarks

v9: _ rename reset_assert_all() in reset_release_all() as this function not 
  only assert all resets but also free all of them
_ rename clk_disable_all() in clk_release_all() as this function not 
  only disable all clocks but also free all of them
_ add a check in reset_release_all()/clk_disable_all() to verify if 
reset/clock 
  has been previously requested before asserting/disabling and freeing 
it.

v8: _ rework error path by propagating the initial error code until the end 
of probe()
_ replace devm_kmalloc() with devm_kcalloc()
_ fix cosmetics remarks

v7: _ replace clk_count() and reset_count() methods by
  ofnode_count_phandle_with_args() in patches 3, 4 and 5

v6: _ replace clk_get_by_index() by dev_read_phandle_with_args() in
  clk_count() in patch 4
_  add Reviewed-by Simon Glass for patch 2 and 5

v5: _ rebase on top of dm/master requested by Simon Glass in order to use
  livetree update
_ replace fdtdec_parse_phandle_with_args() by 
dev_read_phandle_with_args() in patch 2

v4: _ add clk_disable_all() and reset_assert_all() methods into CLOCK and
  RESET framework as suggested by Simon Glass and Marek Vasut
_ add reset_count() and clk_count() methods which returns respectively 
the 
  number of resets and clocks declared into "resets" and "clocks" DT 
properties.
  This allows to allocate the right amount of memory to keep resets and 
clocks
  reference
_ update the memory allocation for deasserted resets and enabled
  clocks reference list. Replace lists by arrays.

v3: _ keep enabled clocks and deasserted resets reference in list in order 
to 
  disable clock or assert resets in error path or in .remove callback
_ add missing commit message
_ use struct generic_ehci * instead of struct udevice * as parameter for
  ehci_release_resets() and ehci_release_clocks()
_ test return value on generic_phy_get_by_index() and
  generic_phy_init()
_ split previous patch 5 in 3 independant patch for CLOCK, RESET and 
PHY support

v2: _ add needed reset_request() in RESET framework
_ add error path in ehci/ohci-generic to disable clocks and to assert
resets
_ add .remove callback with clocks, resets and phy release
_ split the replacement of printf() by error() in an independant patch

Patrice Chotard (10):
  reset: add reset_request()
  reset: add reset_release_all()
  clk: add clk_release_all()
  dm: core: add ofnode_count_phandle_with_args()
  usb: host: ehci-generic: replace printf() by error()
  usb: host: ehci-generic: add error path and .remove callback
  usb: host: ehci-generic: add generic PHY support
  usb: host: ohci-generic: add CLOCK support
  usb: host: ohci-generic: add RESET support
  usb: host: ohci-generic: add generic PHY support

 drivers/clk/clk-uclass.c|  26 +++
 drivers/core/of_access.c|   7 ++
 drivers/core/ofnode.c   |  12 
 drivers/reset/reset-uclass.c|  34 ++
 drivers/usb/host/ehci-generic.c | 147 +---
 drivers/usb/host/ohci-generic.c | 122 -
 include/clk.h   |  14 
 include/dm/of_access.h  |  18 +
 include/dm/ofnode.h |  17 +
 include/dm/read.h   |  25 +++
 include/reset.h |  27 
 11 files changed, 424 insertions(+), 25 deletions(-)

-- 
1.9.1

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[U-Boot] [PATCH v10 06/10] usb: host: ehci-generic: add error path and .remove callback

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

Use an array to save enabled clocks reference and deasserted resets
in order to respectively disabled and asserted them in case of error
during probe() or during driver removal.

Signed-off-by: Patrice Chotard 
---

v10:_ none
v9: _ remove useless reset_free() and clk_free() in case of reset and clock 
has been 
  correctly get and deasserted/enabled

v8: _ replace devm_kmalloc() by devm_kcalloc()
_ fix error path by propagating initial error code until the end of 
probe()

v7: _ replace clk_count() and reset_count() by 
ofnode_count_phandle_with_args()

v6: _ none

v5: _ none

v4: _ update the memory allocation for deasserted resets and enabled
  clocks reference list. Replace lists by arrays.
_ usage of new RESET and CLOCK methods clk_count(), reset_count(),
  reset_assert_all() and clk_disable_all().

v3: _ keep enabled clocks and deasserted resets reference in list in order 
to
  disable clock or assert resets in error path or in .remove callback
_ use struct generic_ehci * instead of struct udevice * as parameter for
  ehci_release_resets() and ehci_release_clocks()
 drivers/usb/host/ehci-generic.c | 118 
 1 file changed, 95 insertions(+), 23 deletions(-)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 2116ae1..e058445 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -6,6 +6,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -18,43 +19,114 @@
  */
 struct generic_ehci {
struct ehci_ctrl ctrl;
+   struct clk *clocks;
+   struct reset_ctl *resets;
+   int clock_count;
+   int reset_count;
 };
 
 static int ehci_usb_probe(struct udevice *dev)
 {
+   struct generic_ehci *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
-   int i;
-
-   for (i = 0; ; i++) {
-   struct clk clk;
-   int ret;
-
-   ret = clk_get_by_index(dev, i, &clk);
-   if (ret < 0)
-   break;
-   if (clk_enable(&clk))
-   error("failed to enable clock %d\n", i);
-   clk_free(&clk);
+   int i, err, ret, clock_nb, reset_nb;
+
+   err = 0;
+   priv->clock_count = 0;
+   clock_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "clocks",
+ "#clock-cells");
+   if (clock_nb > 0) {
+   priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+   GFP_KERNEL);
+   if (!priv->clocks)
+   return -ENOMEM;
+
+   for (i = 0; i < clock_nb; i++) {
+   err = clk_get_by_index(dev, i, &priv->clocks[i]);
+
+   if (err < 0)
+   break;
+   err = clk_enable(&priv->clocks[i]);
+   if (err) {
+   error("failed to enable clock %d\n", i);
+   clk_free(&priv->clocks[i]);
+   goto clk_err;
+   }
+   priv->clock_count++;
+   }
+   } else {
+   if (clock_nb != -ENOENT) {
+   error("failed to get clock phandle(%d)\n", clock_nb);
+   return clock_nb;
+   }
}
 
-   for (i = 0; ; i++) {
-   struct reset_ctl reset;
-   int ret;
+   priv->reset_count = 0;
+   reset_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "resets",
+ "#reset-cells");
+   if (reset_nb > 0) {
+   priv->resets = devm_kcalloc(dev, reset_nb,
+   sizeof(struct reset_ctl),
+   GFP_KERNEL);
+   if (!priv->resets)
+   return -ENOMEM;
+
+   for (i = 0; i < reset_nb; i++) {
+   err = reset_get_by_index(dev, i, &priv->resets[i]);
+   if (err < 0)
+   break;
 
-   ret = reset_get_by_index(dev, i, &reset);
-   if (ret < 0)
-   break;
-   if (reset_deassert(&reset))
-   error("failed to deassert reset %d\n", i);
-   reset_free(&reset);
+   if (reset_deassert(&priv->resets[i])) {
+   error("failed to deassert reset %d\n", i);
+   reset_free(&priv->resets[i]);
+   goto reset_err;
+   }
+   priv->reset_count++;
+   }
+   } else {
+   if (reset_nb != 

[U-Boot] [PATCH v10 03/10] clk: add clk_release_all()

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

Add clk_release_all() method which Disable/Free an
array of clocks that has been previously requested by
clk_request/get_by_*()

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---

v10:_ none
v9: _ to avoid confusion, rename clk_disable_all() in clk_release_all() 
  as this function not only disable all clocks but also free all of them
_ add a check in clk_release_all() to verify if a clock has been 
previously 
  requested before asserting and freeing it.
v8: _ replace clk->dev by clk[i].dev in clk_request() param 
v7: _ none
v6: _ none
v5: _ none
v4: _ none
v3: _ add commit message
v2: _ create this independant path for printf() replacement

 drivers/clk/clk-uclass.c | 26 ++
 include/clk.h| 14 ++
 2 files changed, 40 insertions(+)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 83b6328..ffbe872 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -65,6 +65,8 @@ int clk_get_by_index(struct udevice *dev, int index, struct 
clk *clk)
debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 
assert(clk);
+   clk->dev = NULL;
+
ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
  index, &args);
if (ret) {
@@ -102,6 +104,7 @@ int clk_get_by_name(struct udevice *dev, const char *name, 
struct clk *clk)
int index;
 
debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
+   clk->dev = NULL;
 
index = dev_read_stringlist_search(dev, "clock-names", name);
if (index < 0) {
@@ -187,6 +190,29 @@ int clk_disable(struct clk *clk)
return ops->disable(clk);
 }
 
+int clk_release_all(struct clk *clk, int count)
+{
+   int i, ret;
+
+   for (i = 0; i < count; i++) {
+   debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
+
+   /* check if clock has been previously requested */
+   if (!clk[i].dev)
+   continue;
+
+   ret = clk_disable(&clk[i]);
+   if (ret && ret != -ENOSYS)
+   return ret;
+
+   ret = clk_free(&clk[i]);
+   if (ret && ret != -ENOSYS)
+   return ret;
+   }
+
+   return 0;
+}
+
 UCLASS_DRIVER(clk) = {
.id = UCLASS_CLK,
.name   = "clk",
diff --git a/include/clk.h b/include/clk.h
index 5a5c2ff..a905a41 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -174,6 +174,20 @@ int clk_enable(struct clk *clk);
  */
 int clk_disable(struct clk *clk);
 
+/**
+ * clk_release_all() - Disable (turn off)/Free an array of previously
+ * requested clocks.
+ *
+ * For each clock contained in the clock array, this function will check if
+ * clock has been previously requested and then will disable and free it.
+ *
+ * @clk:   A clock struct array that was previously successfully
+ * requested by clk_request/get_by_*().
+ * @count  Number of clock contained in the array
+ * @return zero on success, or -ve error code.
+ */
+int clk_release_all(struct clk *clk, int count);
+
 int soc_clk_dump(void);
 
 #endif
-- 
1.9.1

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[U-Boot] [PATCH v10 04/10] dm: core: add ofnode_count_phandle_with_args()

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

This function is usefull to get phandle number contained
in a property list.
For example,  this allows to allocate the right amount
of memory to keep clock's reference contained into the
"clocks" property.

To implement it, either of_count_phandle_with_args() or
fdtdec_parse_phandle_with_args() are used respectively
for live tree and flat tree.
By passing index = -1, these 2 functions returns the
number of phandle contained into the property list.

Add also the dev_count_phandle_with_args() based on
ofnode_count_phandle_with_args()

Signed-off-by: Patrice Chotard 
---

v10:_ add dev_count_phandle_with_args() requested by Simon Glass
v9: _ none
v8: _ none
v7: _ add ofnode_count_phandle_with_args() which returns
  the phandle number contained into a property list.
 drivers/core/of_access.c |  7 +++
 drivers/core/ofnode.c| 12 
 include/dm/of_access.h   | 18 ++
 include/dm/ofnode.h  | 17 +
 include/dm/read.h| 25 +
 5 files changed, 79 insertions(+)

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 93a6560..76d5996 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -641,6 +641,13 @@ int of_parse_phandle_with_args(const struct device_node 
*np,
index, out_args);
 }
 
+int of_count_phandle_with_args(const struct device_node *np,
+  const char *list_name, const char *cells_name)
+{
+   return __of_parse_phandle_with_args(np, list_name, cells_name, 0,
+   -1, NULL);
+}
+
 static void of_alias_add(struct alias_prop *ap, struct device_node *np,
 int id, const char *stem, int stem_len)
 {
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index ac312d6..02bc5d2 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -307,6 +307,18 @@ int ofnode_parse_phandle_with_args(ofnode node, const char 
*list_name,
return 0;
 }
 
+int ofnode_count_phandle_with_args(ofnode node, const char *list_name,
+  const char *cells_name)
+{
+   if (ofnode_is_np(node))
+   return of_count_phandle_with_args(ofnode_to_np(node),
+   list_name, cells_name);
+   else
+   return fdtdec_parse_phandle_with_args(gd->fdt_blob,
+   ofnode_to_offset(node), list_name, cells_name,
+   0, -1, NULL);
+}
+
 ofnode ofnode_path(const char *path)
 {
if (of_live_active())
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 142f0f4..5be29b1 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -315,6 +315,24 @@ int of_parse_phandle_with_args(const struct device_node 
*np,
   int index, struct of_phandle_args *out_args);
 
 /**
+ * of_count_phandle_with_args() - Count the number of phandle in a list
+ *
+ * @np:pointer to a device tree node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name:property name that specifies phandles' arguments count
+ * @return number of phandle found, -ENOENT if
+ * @list_name does not exist, -EINVAL if a phandle was not found,
+ * @cells_name could not be found, the arguments were truncated or there
+ * were too many arguments.
+ *
+ * Returns number of phandle found on success, on error returns appropriate
+ * errno value.
+ *
+ */
+int of_count_phandle_with_args(const struct device_node *np,
+  const char *list_name, const char *cells_name);
+
+/**
  * of_alias_scan() - Scan all properties of the 'aliases' node
  *
  * The function scans all the properties of the 'aliases' node and populates
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 149622a..3f2cfbb 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -423,6 +423,23 @@ int ofnode_parse_phandle_with_args(ofnode node, const char 
*list_name,
   struct ofnode_phandle_args *out_args);
 
 /**
+ * ofnode_count_phandle_with_args() - Count number of phandle in a list
+ *
+ * This function is useful to count phandles into a list.
+ * Returns number of phandle on success, on error returns appropriate
+ * errno value.
+ *
+ * @node:  device tree node containing a list
+ * @list_name: property name that contains a list
+ * @cells_name:property name that specifies phandles' arguments count
+ * @return number of phandle on success, -ENOENT if @list_name does not
+ *  exist, -EINVAL if a phandle was not found, @cells_name could not
+ *  be found.
+ */
+int ofnode_count_phandle_with_args(ofnode node, const char *list_name,
+  const char *cells_name);
+
+/**
  * ofnode_path() - find a node by full path
  *
  * @path: Full path to node, e.g. "/b

[U-Boot] [PATCH v10 02/10] reset: add reset_release_all()

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

Add reset_release_all() method which Assert/Free an
array of resets signal that has been previously successfully
requested by reset_get_by_*()

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---

v10:_ none
v9: _ to avoid confusion, rename reset_assert_all() in reset_release_all() 
  as this function not only assert all resets but also free all of them
_ add a check in reset_release_all() to verify if a reset has been 
previously 
  requested before asserting and freeing it.
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4: _ add reset_assert_all() method as suggested by Marek Vasut
  and Simon Glass


 drivers/reset/reset-uclass.c | 25 +
 include/reset.h  | 18 ++
 2 files changed, 43 insertions(+)

diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index 4fd82b9..307a297 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -42,6 +42,7 @@ int reset_get_by_index(struct udevice *dev, int index,
 
debug("%s(dev=%p, index=%d, reset_ctl=%p)\n", __func__, dev, index,
  reset_ctl);
+   reset_ctl->dev = NULL;
 
ret = dev_read_phandle_with_args(dev, "resets", "#reset-cells", 0,
  index, &args);
@@ -87,6 +88,7 @@ int reset_get_by_name(struct udevice *dev, const char *name,
 
debug("%s(dev=%p, name=%s, reset_ctl=%p)\n", __func__, dev, name,
  reset_ctl);
+   reset_ctl->dev = NULL;
 
index = dev_read_stringlist_search(dev, "reset-names", name);
if (index < 0) {
@@ -133,6 +135,29 @@ int reset_deassert(struct reset_ctl *reset_ctl)
return ops->rst_deassert(reset_ctl);
 }
 
+int reset_release_all(struct reset_ctl *reset_ctl, int count)
+{
+   int i, ret;
+
+   for (i = 0; i < count; i++) {
+   debug("%s(reset_ctl[%d]=%p)\n", __func__, i, &reset_ctl[i]);
+
+   /* check if reset has been previously requested */
+   if (!reset_ctl[i].dev)
+   continue;
+
+   ret = reset_assert(&reset_ctl[i]);
+   if (ret)
+   return ret;
+
+   ret = reset_free(&reset_ctl[i]);
+   if (ret)
+   return ret;
+   }
+
+   return 0;
+}
+
 UCLASS_DRIVER(reset) = {
.id = UCLASS_RESET,
.name   = "reset",
diff --git a/include/reset.h b/include/reset.h
index 4f2e35f..7185ade 100644
--- a/include/reset.h
+++ b/include/reset.h
@@ -144,6 +144,18 @@ int reset_assert(struct reset_ctl *reset_ctl);
  */
 int reset_deassert(struct reset_ctl *reset_ctl);
 
+/**
+ * reset_release_all - Assert/Free an array of previously requested resets.
+ *
+ * For each reset contained in the reset array, this function will check if
+ * reset has been previously requested and then will assert and free it.
+ *
+ * @reset_ctl: A reset struct array that was previously successfully
+ * requested by reset_get_by_*().
+ * @count  Number of reset contained in the array
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_release_all(struct reset_ctl *reset_ctl, int count);
 #else
 static inline int reset_get_by_index(struct udevice *dev, int index,
 struct reset_ctl *reset_ctl)
@@ -171,6 +183,12 @@ static inline int reset_deassert(struct reset_ctl 
*reset_ctl)
 {
return 0;
 }
+
+static inline int reset_release_all(struct reset_ctl *reset_ctl, int count)
+{
+   return 0;
+}
+
 #endif
 
 #endif
-- 
1.9.1

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[U-Boot] [PATCH v10 07/10] usb: host: ehci-generic: add generic PHY support

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

Extend ehci-generic driver with generic PHY framework

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---

v10:_ none
v9: _ none
v8: _ rework error path by propagating the initial error code until the end 
of probe()
v7: _ none
v6: _ none
v5: _ none
v4: _ update the memory allocation for deasserted resets and enabled
  clocks reference list. Replace lists by arrays.
_ usage of new RESET and CLOCK methods clk_count(), reset_count(),
  reset_assert_all() and clk_disable_all().
v3: _ keep enabled clocks and deasserted resets reference in list in order 
to
  disable clock or assert resets in error path or in .remove callback
_ use struct generic_ehci * instead of struct udevice * as parameter for
  ehci_release_resets() and ehci_release_clocks()
 drivers/usb/host/ehci-generic.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index e058445..3f751f1 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,6 +22,7 @@ struct generic_ehci {
struct ehci_ctrl ctrl;
struct clk *clocks;
struct reset_ctl *resets;
+   struct phy phy;
int clock_count;
int reset_count;
 };
@@ -91,16 +93,37 @@ static int ehci_usb_probe(struct udevice *dev)
}
}
 
+   err = generic_phy_get_by_index(dev, 0, &priv->phy);
+   if (err) {
+   if (err != -ENOENT) {
+   error("failed to get usb phy\n");
+   goto reset_err;
+   }
+   }
+
+   err = generic_phy_init(&priv->phy);
+   if (err) {
+   error("failed to init usb phy\n");
+   goto reset_err;
+   }
+
hccr = map_physmem(devfdt_get_addr(dev), 0x100, MAP_NOCACHE);
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
err = ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
if (err)
-   goto reset_err;
+   goto phy_err;
 
return 0;
 
+phy_err:
+   if (generic_phy_valid(&priv->phy)) {
+   ret = generic_phy_exit(&priv->phy);
+   if (ret)
+   error("failed to release phy\n");
+   }
+
 reset_err:
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
@@ -122,6 +145,12 @@ static int ehci_usb_remove(struct udevice *dev)
if (ret)
return ret;
 
+   if (generic_phy_valid(&priv->phy)) {
+   ret = generic_phy_exit(&priv->phy);
+   if (ret)
+   return ret;
+   }
+
ret =  reset_release_all(priv->resets, priv->reset_count);
if (ret)
return ret;
-- 
1.9.1

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[U-Boot] [PATCH v10 08/10] usb: host: ohci-generic: add CLOCK support

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

use array to save enabled clocks reference in order to
disabled them in case of error during probe() or during
driver removal.

Signed-off-by: Patrice Chotard 
---

v10:_ replace ofnode_count_phandle_with_args() by 
dev_count_phandle_with_args()

v9: _ remove useless clk_free() when a clock is correctly requested and 
enabled
_ replace clk_disable_all() by clk_release_all()

v8: _ rework error path by propagating the initial error code until the end 
of probe()

v7: _ replace clk_count() by ofnode_count_phandle_with_args()

v6: _ none

v5: _ none

v4: _ use generic_phy_valid() before generic_phy_exit() call

v3: _ extract in this patch the CLOCK support add-on from previous patch 5
_ keep enabled clocks reference in list in order to
  disable clocks in error path or in .remove callback

v2: _ add error path management
_ add .remove callback


 drivers/usb/host/ohci-generic.c | 55 +++--
 1 file changed, 53 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index f85738f..f5b27cc 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -5,7 +5,9 @@
  */
 
 #include 
+#include 
 #include 
+#include 
 #include "ohci.h"
 
 #if !defined(CONFIG_USB_OHCI_NEW)
@@ -14,18 +16,67 @@
 
 struct generic_ohci {
ohci_t ohci;
+   struct clk *clocks; /* clock list */
+   int clock_count;/* number of clock in clock list */
 };
 
 static int ohci_usb_probe(struct udevice *dev)
 {
struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+   struct generic_ohci *priv = dev_get_priv(dev);
+   int i, err, ret, clock_nb;
 
-   return ohci_register(dev, regs);
+   err = 0;
+   priv->clock_count = 0;
+   clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
+   if (clock_nb > 0) {
+   priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
+   GFP_KERNEL);
+   if (!priv->clocks)
+   return -ENOMEM;
+
+   for (i = 0; i < clock_nb; i++) {
+   err = clk_get_by_index(dev, i, &priv->clocks[i]);
+   if (err < 0)
+   break;
+
+   err = clk_enable(&priv->clocks[i]);
+   if (err) {
+   error("failed to enable clock %d\n", i);
+   clk_free(&priv->clocks[i]);
+   goto clk_err;
+   }
+   priv->clock_count++;
+   }
+   } else if (clock_nb != -ENOENT) {
+   error("failed to get clock phandle(%d)\n", clock_nb);
+   return clock_nb;
+   }
+
+   err = ohci_register(dev, regs);
+   if (err)
+   goto clk_err;
+
+   return 0;
+
+clk_err:
+   ret = clk_release_all(priv->clocks, priv->clock_count);
+   if (ret)
+   error("failed to disable all clocks\n");
+
+   return err;
 }
 
 static int ohci_usb_remove(struct udevice *dev)
 {
-   return ohci_deregister(dev);
+   struct generic_ohci *priv = dev_get_priv(dev);
+   int ret;
+
+   ret = ohci_deregister(dev);
+   if (ret)
+   return ret;
+
+   return clk_release_all(priv->clocks, priv->clock_count);
 }
 
 static const struct udevice_id ohci_usb_ids[] = {
-- 
1.9.1

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[U-Boot] [PATCH v10 09/10] usb: host: ohci-generic: add RESET support

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

use array to save deasserted resets reference in order to
assert them in case of error during probe() or during driver
removal.

Signed-off-by: Patrice Chotard 
---

v10:_ replace ofnode_count_phandle_with_args() by 
dev_count_phandle_with_args()

v9: _ remove useless reset_free() when a reset is correctly requested and 
deasserted
_ replace reset_assert_all() by reset_release_all()

v8: _ rework error path by propagating the initial error code until the end 
of probe()
_ replace devm_kmalloc() by devm_kcalloc()

v7: _ replace reset_count() by ofnode_count_phandle_with_args()

v6: _ none

v5: _ none

v4: _ update the memory allocation for deasserted resets. Replace lists by 
arrays.
_ usage of new RESET methods reset_assert_all() and clk_disable_all().

v3: _ extract in this patch the RESET support add-on from previous patch 5
_ keep deasserted resets reference in list in order to
  assert resets in error path or in .remove callback

v2: _ add error path management
_ add .remove callback

 drivers/usb/host/ohci-generic.c | 42 +++--
 1 file changed, 40 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index f5b27cc..95d54c1 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "ohci.h"
 
 #if !defined(CONFIG_USB_OHCI_NEW)
@@ -17,14 +18,16 @@
 struct generic_ohci {
ohci_t ohci;
struct clk *clocks; /* clock list */
+   struct reset_ctl *resets; /* reset list */
int clock_count;/* number of clock in clock list */
+   int reset_count;/* number of reset in reset list */
 };
 
 static int ohci_usb_probe(struct udevice *dev)
 {
struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
struct generic_ohci *priv = dev_get_priv(dev);
-   int i, err, ret, clock_nb;
+   int i, err, ret, clock_nb, reset_nb;
 
err = 0;
priv->clock_count = 0;
@@ -53,12 +56,43 @@ static int ohci_usb_probe(struct udevice *dev)
return clock_nb;
}
 
+   priv->reset_count = 0;
+   reset_nb = dev_count_phandle_with_args(dev, "resets", "#reset-cells");
+   if (reset_nb > 0) {
+   priv->resets = devm_kcalloc(dev, reset_nb,
+   sizeof(struct reset_ctl),
+   GFP_KERNEL);
+   if (!priv->resets)
+   return -ENOMEM;
+
+   for (i = 0; i < reset_nb; i++) {
+   err = reset_get_by_index(dev, i, &priv->resets[i]);
+   if (err < 0)
+   break;
+
+   err = reset_deassert(&priv->resets[i]);
+   if (err) {
+   error("failed to deassert reset %d\n", i);
+   reset_free(&priv->resets[i]);
+   goto reset_err;
+   }
+   priv->reset_count++;
+   }
+   } else if (reset_nb != -ENOENT) {
+   error("failed to get reset phandle(%d)\n", reset_nb);
+   goto clk_err;
+   }
+
err = ohci_register(dev, regs);
if (err)
-   goto clk_err;
+   goto reset_err;
 
return 0;
 
+reset_err:
+   ret = reset_release_all(priv->resets, priv->reset_count);
+   if (ret)
+   error("failed to assert all resets\n");
 clk_err:
ret = clk_release_all(priv->clocks, priv->clock_count);
if (ret)
@@ -76,6 +110,10 @@ static int ohci_usb_remove(struct udevice *dev)
if (ret)
return ret;
 
+   ret = reset_release_all(priv->resets, priv->reset_count);
+   if (ret)
+   return ret;
+
return clk_release_all(priv->clocks, priv->clock_count);
 }
 
-- 
1.9.1

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[U-Boot] [PATCH v10 05/10] usb: host: ehci-generic: replace printf() by error()

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

this allows to get file, line and function location
of the current error message.

Signed-off-by: patrice chotard 
Reviewed-by: Simon Glass 
---

v10:_ none
v9: _ none
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4: _ none
v3: _ add commit message
v2: _ create this independant path for printf() replacement

 drivers/usb/host/ehci-generic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index fb78462..2116ae1 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -34,7 +34,7 @@ static int ehci_usb_probe(struct udevice *dev)
if (ret < 0)
break;
if (clk_enable(&clk))
-   printf("failed to enable clock %d\n", i);
+   error("failed to enable clock %d\n", i);
clk_free(&clk);
}
 
@@ -46,7 +46,7 @@ static int ehci_usb_probe(struct udevice *dev)
if (ret < 0)
break;
if (reset_deassert(&reset))
-   printf("failed to deassert reset %d\n", i);
+   error("failed to deassert reset %d\n", i);
reset_free(&reset);
}
 
-- 
1.9.1

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[U-Boot] [PATCH v10 01/10] reset: add reset_request()

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

This is needed in error path to assert previously deasserted
reset by using a saved reset_ctl reference.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---

v10:_ none
v9: _ none
v8: _ none
v7: _ none
v6: _ none
v5: _ none
v4: _ none
v3: _ none
v2: _ none

 drivers/reset/reset-uclass.c | 9 +
 include/reset.h  | 9 +
 2 files changed, 18 insertions(+)

diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index de3695f..4fd82b9 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -97,6 +97,15 @@ int reset_get_by_name(struct udevice *dev, const char *name,
return reset_get_by_index(dev, index, reset_ctl);
 }
 
+int reset_request(struct reset_ctl *reset_ctl)
+{
+   struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
+
+   debug("%s(reset_ctl=%p)\n", __func__, reset_ctl);
+
+   return ops->request(reset_ctl);
+}
+
 int reset_free(struct reset_ctl *reset_ctl)
 {
struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
diff --git a/include/reset.h b/include/reset.h
index f45fcf8..4f2e35f 100644
--- a/include/reset.h
+++ b/include/reset.h
@@ -100,6 +100,15 @@ int reset_get_by_name(struct udevice *dev, const char 
*name,
  struct reset_ctl *reset_ctl);
 
 /**
+ * reset_request - Request a reset signal.
+ *
+ * @reset_ctl: A reset control struct.
+ *
+ * @return 0 if OK, or a negative error code.
+ */
+int reset_request(struct reset_ctl *reset_ctl);
+
+/**
  * reset_free - Free a previously requested reset signal.
  *
  * @reset_ctl: A reset control struct that was previously successfully
-- 
1.9.1

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[U-Boot] [PATCH v10 10/10] usb: host: ohci-generic: add generic PHY support

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

Extend ohci-generic driver with generic PHY framework

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---

v10:_ none

v9: _ none

v8: _ rework error path by propagating the initial error code until the end 
of probe()

v7: _ none

v6: _ none

v5: _ none

v4: _ use generic_phy_valid() before generic_phy_exit() call

v3: _ extract in this patch the PHY support add-on from previous patch 5

 drivers/usb/host/ohci-generic.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index 95d54c1..9249039 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include "ohci.h"
 
@@ -19,6 +20,7 @@ struct generic_ohci {
ohci_t ohci;
struct clk *clocks; /* clock list */
struct reset_ctl *resets; /* reset list */
+   struct phy phy;
int clock_count;/* number of clock in clock list */
int reset_count;/* number of reset in reset list */
 };
@@ -83,12 +85,33 @@ static int ohci_usb_probe(struct udevice *dev)
goto clk_err;
}
 
+   err = generic_phy_get_by_index(dev, 0, &priv->phy);
+   if (err) {
+   if (err != -ENOENT) {
+   error("failed to get usb phy\n");
+   goto reset_err;
+   }
+   }
+
+   err = generic_phy_init(&priv->phy);
+   if (err) {
+   error("failed to init usb phy\n");
+   goto reset_err;
+   }
+
err = ohci_register(dev, regs);
if (err)
-   goto reset_err;
+   goto phy_err;
 
return 0;
 
+phy_err:
+   if (generic_phy_valid(&priv->phy)) {
+   ret = generic_phy_exit(&priv->phy);
+   if (ret)
+   error("failed to release phy\n");
+   }
+
 reset_err:
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
@@ -110,6 +133,12 @@ static int ohci_usb_remove(struct udevice *dev)
if (ret)
return ret;
 
+   if (generic_phy_valid(&priv->phy)) {
+   ret = generic_phy_exit(&priv->phy);
+   if (ret)
+   return ret;
+   }
+
ret = reset_release_all(priv->resets, priv->reset_count);
if (ret)
return ret;
-- 
1.9.1

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Re: [U-Boot] [PATCH] dm: video: fix abuse of enum

2017-07-06 Thread Lothar Waßmann
Hi,

On Wed, 5 Jul 2017 22:49:28 -0600 Simon Glass wrote:
> Hi Lothar,
> 
> On 23 June 2017 at 00:30, Lothar Waßmann  wrote:
> > Hi,
> >
> > On Wed, 21 Jun 2017 09:59:05 +0200 Lothar Waßmann wrote:
> >> Hi,
> >>
> >> On Tue, 20 Jun 2017 12:26:29 -0600 Simon Glass wrote:
> >> > Hi Lothar,
> >> >
> >> > On 20 June 2017 at 04:25, Lothar Waßmann  
> >> > wrote:
> >> > > LCD_MAX_WIDTH, LCD_MAX_HEIGHT and LCD_MAX_LSBPP are not alternative
> >> > > values for one specific variable, but unrelated entities with distinct
> >> > > purposes. There is no use defining them as values of an 'enum'.
> >> >
> >> > Can you explain why #define is better? I prefer enum since they are a
> >> > compiler construct instead of preprocessor (thus no need for brackets,
> >> > no strange conversion things) and the debugger knows about them.
> >> >
> >> An enum defines alternative values for one specific entity (e.g.
> >> clauses for a switch construct), but not a collection of arbitrary data
> >> items.
> >>
> >> > > The 'enum' construct would fail miserably for an LCD controller that
> >> > > has a square max. frame size (e.g. 4096x4096).
> >> >
> >> > What does this mean? I don't understand sorry.
> >> >
> >> Try your enum with MAX_LCD_WITDH == MAC_LCD_HEIGHT.
> 
> Can you please be explicit as to what the problem is? Sorry but I
> don't understand what you are driving at. Do you have a test program
> which shows the problem?
> 
You cannot have two different enum items with the same value!
Thus:
enum {
MAX_LCD_WIDTH = 4096,
MAX_LCD_HEIGHT = 4096,
};
won't compile.


The purpose of an enum is to provide a collection of possible values
that can be taken by a single variable. E.g. enumerate the states of a
state machine, video modes, CPU types...
It's not meant to group together otherwise unsolicited values.


Lothar Waßmann
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[U-Boot] [RESEND][PATCH v5 0/5] Extend xhci-dwc3

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

This series extend xhci-dwc3.c drivers by :
_ converting it to DM model,
_ adding dual role mode support from DT
_ adding new generic_phy_valid() method in PHY framework
_ adding support of generic PHY framework

v5: _ rebase on top of dm/master in order to use the last livetree update
_ replace dev_get_addr() by devfdt_get_addr() in patch 1
v4: _ set phy->dev to NULL in case of generic_phy_get_by_index()
v3: _ introduce generic_phy_valid() method 
_ add Reviewed-by
v2: _ use dev_get_addr() in PATCH 1 and removed useless piece of code

Patrice Chotard (5):
  usb: host: xhci-dwc3: Convert driver to DM
  usb: host: xhci-dwc3: Add dual role mode support from DT
  drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index()
fails
  drivers: phy: add generic_phy_valid() method
  usb: host: xhci-dwc3: Add generic PHY support

 drivers/phy/phy-uclass.c |  6 +++
 drivers/usb/host/xhci-dwc3.c | 91 
 include/generic-phy.h|  8 
 3 files changed, 105 insertions(+)

-- 
1.9.1

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[U-Boot] [RESEND][PATCH v5 5/5] usb: host: xhci-dwc3: Add generic PHY support

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

Add support of generic PHY framework support

Signed-off-by: Patrice Chotard 
Reviewed-by: Marek Vasut 
Reviewed-by: Simon Glass 
---

v5: _ none
v4: _ none
v3: _ use generic_phy_valid() method
v2: _ none


 drivers/usb/host/xhci-dwc3.c | 32 
 1 file changed, 32 insertions(+)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 7c32722..3c46378 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -10,6 +10,8 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 
 #include "xhci.h"
@@ -19,6 +21,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct xhci_dwc3_platdata {
+   struct phy usb_phy;
+};
+
 struct xhci_dwc3_priv {
struct xhci_ctrl ctrl;
 };
@@ -116,11 +122,26 @@ static int xhci_dwc3_probe(struct udevice *dev)
struct xhci_hccr *hccr;
struct dwc3 *dwc3_reg;
enum usb_dr_mode dr_mode;
+   int ret;
 
hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 
+   ret = generic_phy_get_by_index(dev, 0, &plat->usb_phy);
+   if (ret) {
+   if (ret != -ENOENT) {
+   error("Failed to get USB PHY for %s\n", dev->name);
+   return ret;
+   }
+   } else {
+   ret = generic_phy_init(&plat->usb_phy);
+   if (ret) {
+   error("Can't init USB PHY for %s\n", dev->name);
+   return ret;
+   }
+   }
+
dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
 
dwc3_core_init(dwc3_reg);
@@ -137,6 +158,17 @@ static int xhci_dwc3_probe(struct udevice *dev)
 
 static int xhci_dwc3_remove(struct udevice *dev)
 {
+   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+   int ret;
+
+   if (generic_phy_valid(&plat->usb_phy)) {
+   ret = generic_phy_exit(&plat->usb_phy);
+   if (ret) {
+   error("Can't deinit USB PHY for %s\n", dev->name);
+   return ret;
+   }
+   }
+
return xhci_deregister(dev);
 }
 
-- 
1.9.1

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[U-Boot] [RESEND][PATCH v5 3/5] drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index() fails

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

phy->dev need to be set to NULL in case of generic_phy_get_by_index()
fails. Then phy->dev can be used to check if the phy is valid

Reported-by: Jean-Jacques Hiblot 
Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
Reviewed-by: Jean-Jacques Hiblot 

---

v5: _ none
v4: _ ensure that phy->dev is set to NULL in case of
generic_phy_get_by_index() fails



 drivers/phy/phy-uclass.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index d8b8d58..68e518f 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -45,6 +45,7 @@ int generic_phy_get_by_index(struct udevice *dev, int index,
debug("%s(dev=%p, index=%d, phy=%p)\n", __func__, dev, index, phy);
 
assert(phy);
+   phy->dev = NULL;
ret = dev_read_phandle_with_args(dev, "phys", "#phy-cells", 0, index,
 &args);
if (ret) {
-- 
1.9.1

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[U-Boot] [RESEND][PATCH v5 4/5] drivers: phy: add generic_phy_valid() method

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

This allow to check if a PHY has been correctly
initialised and avoid to get access to phy struct.

Signed-off-by: Patrice Chotard 
Reviewed-by: Marek Vasut 
Reviewed-by: Simon Glass 
---

v5: _ none
v4: _ none


 drivers/phy/phy-uclass.c | 5 +
 include/generic-phy.h| 8 
 2 files changed, 13 insertions(+)

diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index 68e518f..8ccd9bc 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -131,6 +131,11 @@ int generic_phy_power_off(struct phy *phy)
return ops->power_off ? ops->power_off(phy) : 0;
 }
 
+bool generic_phy_valid(struct phy *phy)
+{
+   return phy->dev != NULL;
+}
+
 UCLASS_DRIVER(phy) = {
.id = UCLASS_PHY,
.name   = "phy",
diff --git a/include/generic-phy.h b/include/generic-phy.h
index 762704c..343ad03 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -220,4 +220,12 @@ int generic_phy_get_by_index(struct udevice *user, int 
index,
 int generic_phy_get_by_name(struct udevice *user, const char *phy_name,
struct phy *phy);
 
+/**
+ * generic_phy_valid() - check if PHY port is valid
+ *
+ * @phy:   the PHY port to check
+ * @return TRUE if valid, or FALSE
+ */
+bool generic_phy_valid(struct phy *phy);
+
 #endif /*__GENERIC_PHY_H */
-- 
1.9.1

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[U-Boot] [RESEND][PATCH v5 1/5] usb: host: xhci-dwc3: Convert driver to DM

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

Add Driver Model support with use of generic DT
compatible string "snps,dwc3"

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---

v5: _ replace dev_get_addr() by devfdt_get_addr()
v4: _ none
v3: _ none
v2: _ use dev_get_addr() and removed useless piece of code


 drivers/usb/host/xhci-dwc3.c | 50 
 1 file changed, 50 insertions(+)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 33961cd..8c90836 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -9,9 +9,19 @@
  */
 
 #include 
+#include 
+#include 
+
+#include "xhci.h"
 #include 
 #include 
 
+DECLARE_GLOBAL_DATA_PTR;
+
+struct xhci_dwc3_priv {
+   struct xhci_ctrl ctrl;
+};
+
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
 {
clrsetbits_le32(&dwc3_reg->g_ctl,
@@ -97,3 +107,43 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
GFLADJ_30MHZ(val));
 }
+
+static int xhci_dwc3_probe(struct udevice *dev)
+{
+   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
+   struct xhci_hcor *hcor;
+   struct xhci_hccr *hccr;
+   struct dwc3 *dwc3_reg;
+
+   hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
+   hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
+   HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+   dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
+
+   dwc3_core_init(dwc3_reg);
+
+   return xhci_register(dev, hccr, hcor);
+}
+
+static int xhci_dwc3_remove(struct udevice *dev)
+{
+   return xhci_deregister(dev);
+}
+
+static const struct udevice_id xhci_dwc3_ids[] = {
+   { .compatible = "snps,dwc3" },
+   { }
+};
+
+U_BOOT_DRIVER(xhci_dwc3) = {
+   .name = "xhci-dwc3",
+   .id = UCLASS_USB,
+   .of_match = xhci_dwc3_ids,
+   .probe = xhci_dwc3_probe,
+   .remove = xhci_dwc3_remove,
+   .ops = &xhci_usb_ops,
+   .priv_auto_alloc_size = sizeof(struct xhci_dwc3_priv),
+   .platdata_auto_alloc_size = sizeof(struct xhci_dwc3_platdata),
+   .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
-- 
1.9.1

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[U-Boot] [RESEND][PATCH v5 2/5] usb: host: xhci-dwc3: Add dual role mode support from DT

2017-07-06 Thread patrice.chotard
From: Patrice Chotard 

DWC3 dual role mode is selected using DT "dr_mode"
property. If not found, DWC3 controller is configured
in HOST mode by default

Signed-off-by: Patrice Chotard 
Reviewed-by: Marek Vasut 
Reviewed-by: Simon Glass 
---
v5: _ none
v4: _ none
v3: _ none
v2: _ none


 drivers/usb/host/xhci-dwc3.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 8c90836..7c32722 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -15,6 +15,7 @@
 #include "xhci.h"
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -114,6 +115,7 @@ static int xhci_dwc3_probe(struct udevice *dev)
struct xhci_hcor *hcor;
struct xhci_hccr *hccr;
struct dwc3 *dwc3_reg;
+   enum usb_dr_mode dr_mode;
 
hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
@@ -123,6 +125,13 @@ static int xhci_dwc3_probe(struct udevice *dev)
 
dwc3_core_init(dwc3_reg);
 
+   dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+   if (dr_mode == USB_DR_MODE_UNKNOWN)
+   /* by default set dual role mode to HOST */
+   dr_mode = USB_DR_MODE_HOST;
+
+   dwc3_set_mode(dwc3_reg, dr_mode);
+
return xhci_register(dev, hccr, hcor);
 }
 
-- 
1.9.1

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Re: [U-Boot] [RESEND][PATCH v5 1/5] usb: host: xhci-dwc3: Convert driver to DM

2017-07-06 Thread Bin Meng
Hi Patrice,

On Thu, Jul 6, 2017 at 3:50 PM,   wrote:
> From: Patrice Chotard 
>
> Add Driver Model support with use of generic DT
> compatible string "snps,dwc3"
>
> Signed-off-by: Patrice Chotard 
> Reviewed-by: Simon Glass 
> ---
>
> v5: _ replace dev_get_addr() by devfdt_get_addr()
> v4: _ none
> v3: _ none
> v2: _ use dev_get_addr() and removed useless piece of code
>
>
>  drivers/usb/host/xhci-dwc3.c | 50 
> 
>  1 file changed, 50 insertions(+)
>
> diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
> index 33961cd..8c90836 100644
> --- a/drivers/usb/host/xhci-dwc3.c
> +++ b/drivers/usb/host/xhci-dwc3.c
> @@ -9,9 +9,19 @@
>   */
>
>  #include 
> +#include 
> +#include 
> +
> +#include "xhci.h"
>  #include 
>  #include 
>
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct xhci_dwc3_priv {
> +   struct xhci_ctrl ctrl;
> +};

Please use 'struct xhci_dwc3' directly for .priv_auto_alloc_size

> +
>  void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
>  {
> clrsetbits_le32(&dwc3_reg->g_ctl,
> @@ -97,3 +107,43 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
> setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
> GFLADJ_30MHZ(val));
>  }
> +
> +static int xhci_dwc3_probe(struct udevice *dev)
> +{
> +   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
> +   struct xhci_hcor *hcor;
> +   struct xhci_hccr *hccr;
> +   struct dwc3 *dwc3_reg;
> +
> +   hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
> +   hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
> +   HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
> +
> +   dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
> +
> +   dwc3_core_init(dwc3_reg);
> +
> +   return xhci_register(dev, hccr, hcor);
> +}
> +
> +static int xhci_dwc3_remove(struct udevice *dev)
> +{
> +   return xhci_deregister(dev);
> +}

Please nuke this xhci_dwc3_remove(), instead register
xhci_deregister() directly.

> +
> +static const struct udevice_id xhci_dwc3_ids[] = {
> +   { .compatible = "snps,dwc3" },
> +   { }
> +};
> +
> +U_BOOT_DRIVER(xhci_dwc3) = {
> +   .name = "xhci-dwc3",
> +   .id = UCLASS_USB,
> +   .of_match = xhci_dwc3_ids,
> +   .probe = xhci_dwc3_probe,
> +   .remove = xhci_dwc3_remove,
> +   .ops = &xhci_usb_ops,
> +   .priv_auto_alloc_size = sizeof(struct xhci_dwc3_priv),
> +   .platdata_auto_alloc_size = sizeof(struct xhci_dwc3_platdata),
> +   .flags = DM_FLAG_ALLOC_PRIV_DMA,
> +};
> --

Regards,
Bin
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[U-Boot] [PATCH v2 0/10] powerpc, 8xx: Modernise the 8xx

2017-07-06 Thread Christophe Leroy
This patchset modernises the resurrected 8xx.

Christophe Leroy (10):
  powerpc, 8xx: move immap.c in arch/powerpc/cpu/mpc8xx/
  powerpc, 8xx: move specific reginfo
  powerpc, 8xx: Use IO accessors to access IO memory
  powerpc, 8xx: Implement GLL2 ERRATA
  powerpc, 8xx: Handle checkpatch errors and some of the warnings/checks
  powerpc, 8xx: Properly set CPM frequency in the device tree
  powerpc, 8xx: Migrate to Kconfig
  powerpc, 8xx: move FEC Ethernet driver in drivers/net
  powerpc, 8xx: move SPI driver to drivers/spi/
  powerpc, 8xx: move Serial driver to drivers/serial/

 README |  49 ---
 arch/powerpc/Kconfig   |   2 -
 arch/powerpc/cpu/mpc8xx/Kconfig| 157 
 arch/powerpc/cpu/mpc8xx/Makefile   |   5 +-
 arch/powerpc/cpu/mpc8xx/cpu.c  | 183 -
 arch/powerpc/cpu/mpc8xx/cpu_init.c | 112 +++---
 arch/powerpc/cpu/mpc8xx/fdt.c  |  10 +-
 arch/powerpc/cpu/mpc8xx/immap.c| 380 ++
 arch/powerpc/cpu/mpc8xx/interrupts.c   | 121 +++---
 arch/powerpc/cpu/mpc8xx/reginfo.c  |  70 
 arch/powerpc/cpu/mpc8xx/serial.c   | 301 --
 arch/powerpc/cpu/mpc8xx/speed.c|  39 +-
 arch/powerpc/cpu/mpc8xx/traps.c|  37 +-
 arch/powerpc/include/asm/iopin_8xx.h   | 441 +
 arch/powerpc/include/asm/ppc.h |   5 -
 arch/powerpc/lib/Kconfig   |   7 -
 arch/powerpc/lib/Makefile  |   1 -
 arch/powerpc/lib/immap.c   | 397 ---
 arch/powerpc/lib/time.c|   7 +-
 cmd/reginfo.c  |  54 +--
 drivers/i2c/soft_i2c.c |   2 +-
 drivers/net/Kconfig|  58 +++
 drivers/net/Makefile   |   1 +
 .../cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c   | 369 +
 drivers/serial/Kconfig |  53 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_mpc8xx.c | 256 
 drivers/spi/Kconfig|   6 +
 drivers/spi/Makefile   |   1 +
 .../cpu/mpc8xx/spi.c => drivers/spi/mpc8xx_spi.c   | 212 +-
 include/commproc.h |  12 +-
 include/watchdog.h |   2 +-
 scripts/config_whitelist.txt   |  22 -
 33 files changed, 1778 insertions(+), 1595 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc8xx/immap.c
 create mode 100644 arch/powerpc/cpu/mpc8xx/reginfo.c
 delete mode 100644 arch/powerpc/cpu/mpc8xx/serial.c
 delete mode 100644 arch/powerpc/lib/Kconfig
 delete mode 100644 arch/powerpc/lib/immap.c
 rename arch/powerpc/cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c (62%)
 create mode 100644 drivers/serial/serial_mpc8xx.c
 rename arch/powerpc/cpu/mpc8xx/spi.c => drivers/spi/mpc8xx_spi.c (62%)

-- 
2.12.0

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[U-Boot] [PATCH v2 02/10] powerpc, 8xx: move specific reginfo

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Makefile   |  1 +
 {cmd => arch/powerpc/cpu/mpc8xx}/reginfo.c | 30 +
 cmd/reginfo.c  | 54 ++
 3 files changed, 4 insertions(+), 81 deletions(-)
 copy {cmd => arch/powerpc/cpu/mpc8xx}/reginfo.c (78%)

diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index eae02da636..b5b4bfafb9 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -13,6 +13,7 @@ obj-y += fec.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_CMD_IMMAP) += immap.o
 obj-y  += interrupts.o
+obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-y  += serial.o
 obj-y  += speed.o
 obj-y  += spi.o
diff --git a/cmd/reginfo.c b/arch/powerpc/cpu/mpc8xx/reginfo.c
similarity index 78%
copy from cmd/reginfo.c
copy to arch/powerpc/cpu/mpc8xx/reginfo.c
index 850f28cabc..b5a962431e 100644
--- a/cmd/reginfo.c
+++ b/arch/powerpc/cpu/mpc8xx/reginfo.c
@@ -6,19 +6,10 @@
  */
 
 #include 
-#include 
-#if defined(CONFIG_8xx)
 #include 
-#elif defined(CONFIG_MPC86xx)
-extern void mpc86xx_reginfo(void);
-#elif defined(CONFIG_MPC85xx)
-extern void mpc85xx_reginfo(void);
-#endif
 
-static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
-  char * const argv[])
+void mpc8xx_reginfo(void)
 {
-#if defined(CONFIG_8xx)
volatile immap_t *immap  = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
volatile sysconf8xx_t *sysconf = &immap->im_siu_conf;
@@ -70,23 +61,4 @@ static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
/*
 * May be some CPM info here?
 */
-
-#elif defined(CONFIG_MPC86xx)
-   mpc86xx_reginfo();
-
-#elif defined(CONFIG_MPC85xx)
-   mpc85xx_reginfo();
-#endif
-
-   return 0;
 }
-
- /**/
-
-#if defined(CONFIG_CMD_REGINFO)
-U_BOOT_CMD(
-   reginfo,2,  1,  do_reginfo,
-   "print register information",
-   ""
-);
-#endif
diff --git a/cmd/reginfo.c b/cmd/reginfo.c
index 850f28cabc..b364cc899a 100644
--- a/cmd/reginfo.c
+++ b/cmd/reginfo.c
@@ -8,7 +8,7 @@
 #include 
 #include 
 #if defined(CONFIG_8xx)
-#include 
+void mpc8xx_reginfo(void);
 #elif defined(CONFIG_MPC86xx)
 extern void mpc86xx_reginfo(void);
 #elif defined(CONFIG_MPC85xx)
@@ -19,57 +19,7 @@ static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
   char * const argv[])
 {
 #if defined(CONFIG_8xx)
-   volatile immap_t *immap  = (immap_t *)CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
-   volatile sysconf8xx_t *sysconf = &immap->im_siu_conf;
-   volatile sit8xx_t *timers = &immap->im_sit;
-
-   /* Hopefully more PowerPC  knowledgable people will add code to display
-* other useful registers
-*/
-
-   printf ("\nSystem Configuration registers\n"
-
-   "\tIMMR\t0x%08X\n", get_immr(0));
-
-   printf("\tSIUMCR\t0x%08X", sysconf->sc_siumcr);
-   printf("\tSYPCR\t0x%08X\n",sysconf->sc_sypcr);
-
-   printf("\tSWT\t0x%08X",sysconf->sc_swt);
-   printf("\tSWSR\t0x%04X\n", sysconf->sc_swsr);
-
-   printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",
-   sysconf->sc_sipend, sysconf->sc_simask);
-   printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",
-   sysconf->sc_siel, sysconf->sc_sivec);
-   printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
-   sysconf->sc_tesr, sysconf->sc_sdcr);
-
-   printf ("Memory Controller Registers\n"
-
-   "\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, 
memctl->memc_or0);
-   printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, 
memctl->memc_or1);
-   printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, 
memctl->memc_or2);
-   printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, 
memctl->memc_or3);
-   printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", memctl->memc_br4, 
memctl->memc_or4);
-   printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl->memc_br5, 
memctl->memc_or5);
-   printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl->memc_br6, 
memctl->memc_or6);
-   printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl->memc_br7, 
memctl->memc_or7);
-   printf ("\n"
-   "\tmamr\t0x%08X\tmbmr\t0x%08X \n",
-   memctl->memc_mamr, memctl->memc_mbmr );
-   printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n",
-   memctl->memc_mstat, memctl->memc_mptpr );
-   printf("\tmdr\t0x%08X \n", memctl->memc_mdr);
-
-   printf ("\nSystem Integration Timers\n"
-   "\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
-   timers->sit_tbscr, timers->sit_rtcsc);
-   printf("\tPISCR\t0x%08X \n", timers->sit_piscr);
-
-   /*
-* May be some CPM info here?
-*/
+   mpc8xx_reginfo();
 
 #elif defined(CONFIG_MPC86xx)
mpc86xx_reginfo();
-- 
2.12.0

_

[U-Boot] [PATCH v2 01/10] powerpc, 8xx: move immap.c in arch/powerpc/cpu/mpc8xx/

2017-07-06 Thread Christophe Leroy
immap.c used to be common to several CPUs. It is now
only linked to the 8xx, so this patch moves it into
arch/powerpc/cpu/mpc8xx/

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/Kconfig | 2 --
 arch/powerpc/cpu/mpc8xx/Kconfig  | 9 +
 arch/powerpc/cpu/mpc8xx/Makefile | 1 +
 arch/powerpc/{lib => cpu/mpc8xx}/immap.c | 3 ---
 arch/powerpc/lib/Kconfig | 7 ---
 arch/powerpc/lib/Makefile| 1 -
 6 files changed, 10 insertions(+), 13 deletions(-)
 rename arch/powerpc/{lib => cpu/mpc8xx}/immap.c (99%)
 delete mode 100644 arch/powerpc/lib/Kconfig

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a7558d59b2..e9002a76ab 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -34,8 +34,6 @@ config 8xx
 
 endchoice
 
-source "arch/powerpc/lib/Kconfig"
-
 source "arch/powerpc/cpu/mpc83xx/Kconfig"
 source "arch/powerpc/cpu/mpc85xx/Kconfig"
 source "arch/powerpc/cpu/mpc86xx/Kconfig"
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index a425cba8aa..cb15dc5ebc 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -10,4 +10,13 @@ choice
 
 endchoice
 
+comment "Specific commands"
+
+config CMD_IMMAP
+   bool "Enable various commands to dump IMMR information"
+   help
+ This enables various commands such as:
+
+   siuinfo - print System Interface Unit (SIU) registers
+   memcinfo - print Memory Controller registers
 endmenu
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 5dd801d76e..eae02da636 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -11,6 +11,7 @@ obj-y += cpu.o
 obj-y  += cpu_init.o
 obj-y  += fec.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-$(CONFIG_CMD_IMMAP) += immap.o
 obj-y  += interrupts.o
 obj-y  += serial.o
 obj-y  += speed.o
diff --git a/arch/powerpc/lib/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
similarity index 99%
rename from arch/powerpc/lib/immap.c
rename to arch/powerpc/cpu/mpc8xx/immap.c
index 1beed1fa40..5ff6aa5e3b 100644
--- a/arch/powerpc/lib/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -12,8 +12,6 @@
 #include 
 #include 
 
-#if defined(CONFIG_8xx)
-
 #include 
 #include 
 #include 
@@ -394,4 +392,3 @@ U_BOOT_CMD(
"print Baud Rate Generator (BRG) registers",
""
 );
-#endif
diff --git a/arch/powerpc/lib/Kconfig b/arch/powerpc/lib/Kconfig
deleted file mode 100644
index 7c8ea971c3..00
--- a/arch/powerpc/lib/Kconfig
+++ /dev/null
@@ -1,7 +0,0 @@
-config CMD_IMMAP
-   bool "Enable various commands to dump IMMR information"
-   help
- This enables various commands such as:
-
-   siuinfo - print System Interface Unit (SIU) registers
-   memcinfo - print Memory Controller registers
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 4aa41836a2..9a3043abf8 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -32,7 +32,6 @@ obj-$(CONFIG_BAT_RW) += bat_rw.o
 obj-$(CONFIG_CMD_BOOTM) += bootm.o
 obj-y  += cache.o
 obj-y  += extable.o
-obj-$(CONFIG_CMD_IMMAP) += immap.o
 obj-y  += interrupts.o
 obj-$(CONFIG_CMD_KGDB) += kgdb.o
 obj-y  += stack.o
-- 
2.12.0

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[U-Boot] [PATCH v2 06/10] powerpc, 8xx: Properly set CPM frequency in the device tree

2017-07-06 Thread Christophe Leroy
For processors whose core runs at twice the bus frequency,
the fallback frequency calculation in Linux provides a wrong
result. Therefore, U-boot needs to pass the correct value.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/fdt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index 88ee1c502c..f9b74ded5a 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -20,6 +20,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 "bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 "clock-frequency", bd->bi_intfreq, 1);
+   do_fixup_by_compat_u32(blob, "fsl,pq1-soc", "clock-frequency",
+  bd->bi_intfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
   gd->arch.brg_clk, 1);
 
-- 
2.12.0

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[U-Boot] [PATCH v2 08/10] powerpc, 8xx: move FEC Ethernet driver in drivers/net

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 README | 15 --
 arch/powerpc/cpu/mpc8xx/Makefile   |  1 -
 arch/powerpc/cpu/mpc8xx/cpu.c  |  2 +-
 drivers/net/Kconfig| 58 ++
 drivers/net/Makefile   |  1 +
 .../cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c   | 18 ---
 scripts/config_whitelist.txt   |  4 --
 7 files changed, 60 insertions(+), 39 deletions(-)
 rename arch/powerpc/cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c (97%)

diff --git a/README b/README
index 030a452f9a..0f204be0ca 100644
--- a/README
+++ b/README
@@ -4083,21 +4083,6 @@ Low Level (hardware related) configuration options:
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
 
-- CONFIG_ETHER_ON_FEC[12]
-   Define to enable FEC[12] on a 8xx series processor.
-
-- CONFIG_FEC[12]_PHY
-   Define to the hardcoded PHY address which corresponds
-   to the given FEC; i. e.
-   #define CONFIG_FEC1_PHY 4
-   means that the PHY with address 4 is connected to FEC1
-
-   When set to -1, means to probe for first available.
-
-- CONFIG_FEC[12]_PHY_NORXERR
-   The PHY does not have a RXERR line (RMII only).
-   (so program the FEC to ignore it).
-
 - CONFIG_RMII
Enable RMII mode for all FECs.
Note that this is a global option, we can't
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index b5b4bfafb9..f67c3f8463 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -9,7 +9,6 @@ extra-y += start.o
 extra-y += traps.o
 obj-y  += cpu.o
 obj-y  += cpu_init.o
-obj-y  += fec.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_CMD_IMMAP) += immap.o
 obj-y  += interrupts.o
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 5cfc8c189c..74e6c6d02c 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -327,7 +327,7 @@ void reset_8xx_watchdog(immap_t __iomem *immr)
  */
 int cpu_eth_init(bd_t *bis)
 {
-#if defined(FEC_ENET)
+#if defined(CONFIG_MPC8XX_FEC)
fec_initialize(bis);
 #endif
return 0;
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 33634c33d4..736aab2e6e 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -246,4 +246,62 @@ config RENESAS_RAVB
  This driver implements support for the Ethernet AVB block in
  Renesas M3 and H3 SoCs.
 
+config MPC8XX_FEC
+   bool "Fast Ethernet Controller on MPC8XX"
+   depends on 8xx
+   select MII
+   help
+ This driver implements support for the Fast Ethernet Controller
+ on MPC8XX
+
+config ETHER_ON_FEC1
+   bool "FEC1"
+   depends on MPC8XX_FEC
+   default y
+
+config FEC1_PHY
+   int "FEC1 PHY"
+   depends on ETHER_ON_FEC1
+   default -1
+   help
+ Define to the hardcoded PHY address which corresponds
+ to the given FEC; i. e.
+   #define CONFIG_FEC1_PHY 4
+ means that the PHY with address 4 is connected to FEC1
+
+ When set to -1, means to probe for first available.
+
+config PHY_NORXERR
+   bool "PHY_NORXERR"
+   depends on ETHER_ON_FEC1
+   default n
+   help
+ The PHY does not have a RXERR line (RMII only).
+ (so program the FEC to ignore it).
+
+config ETHER_ON_FEC2
+   bool "FEC2"
+   depends on MPC8XX_FEC && MPC885
+   default y
+
+config FEC2_PHY
+   int "FEC2 PHY"
+   depends on ETHER_ON_FEC2
+   default -1
+   help
+ Define to the hardcoded PHY address which corresponds
+ to the given FEC; i. e.
+   #define CONFIG_FEC1_PHY 4
+ means that the PHY with address 4 is connected to FEC1
+
+ When set to -1, means to probe for first available.
+
+config FEC2_PHY_NORXERR
+   bool "PHY_NORXERR"
+   depends on ETHER_ON_FEC2
+   default n
+   help
+ The PHY does not have a RXERR line (RMII only).
+ (so program the FEC to ignore it).
+
 endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 4a5176e087..94a4fd8701 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_LAN91C96) += lan91c96.o
 obj-$(CONFIG_LPC32XX_ETH) += lpc32xx_eth.o
 obj-$(CONFIG_MACB) += macb.o
 obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
+obj-$(CONFIG_MPC8XX_FEC) += mpc8xx_fec.o
 obj-$(CONFIG_MVGBE) += mvgbe.o
 obj-$(CONFIG_MVNETA) += mvneta.o
 obj-$(CONFIG_MVPP2) += mvpp2.o
diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/drivers/net/mpc8xx_fec.c
similarity index 97%
rename from arch/powerpc/cpu/mpc8xx/fec.c
rename to drivers/net/mpc8xx_fec.c
index 56cb7a506e..b070d6696a 100644
--- a/arch/power

[U-Boot] [PATCH v2 07/10] powerpc, 8xx: Migrate to Kconfig

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 README |  15 
 arch/powerpc/cpu/mpc8xx/Kconfig| 148 +
 arch/powerpc/cpu/mpc8xx/cpu_init.c |   2 +-
 arch/powerpc/cpu/mpc8xx/fec.c  |   8 +-
 arch/powerpc/include/asm/ppc.h |   5 --
 drivers/i2c/soft_i2c.c |   2 +-
 scripts/config_whitelist.txt   |  11 ---
 7 files changed, 154 insertions(+), 37 deletions(-)

diff --git a/README b/README
index c3ab481a56..030a452f9a 100644
--- a/README
+++ b/README
@@ -328,9 +328,6 @@ The following options need to be configured:
  multiple fs option at one time
  for marvell soc family
 
-- 8xx CPU Options: (if using an MPC8xx CPU)
-   CONFIG_8xx_GCLK_FREQ- CPU clock
-
 - 85xx CPU Options:
CONFIG_SYS_PPC64
 
@@ -3993,16 +3990,6 @@ Low Level (hardware related) configuration options:
point to an otherwise UNUSED address space between
the top of RAM and the start of the PCI space.
 
-- CONFIG_SYS_SIUMCR:   SIU Module Configuration (11-6)
-
-- CONFIG_SYS_SYPCR:System Protection Control (11-9)
-
-- CONFIG_SYS_TBSCR:Time Base Status and Control (11-26)
-
-- CONFIG_SYS_PISCR:Periodic Interrupt Status and Control (11-31)
-
-- CONFIG_SYS_PLPRCR:   PLL, Low-Power, and Reset Control Register (15-30)
-
 - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
 
 - CONFIG_SYS_OR_TIMING_SDRAM:
@@ -4011,8 +3998,6 @@ Low Level (hardware related) configuration options:
 - CONFIG_SYS_MAMR_PTA:
periodic timer for refresh
 
-- CONFIG_SYS_DER:  Debug Event Register (37-47)
-
 - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
   CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
   CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, 
CONFIG_SYS_OR1_PRELIM,
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index cb15dc5ebc..9e1ad33c28 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -10,6 +10,21 @@ choice
 
 endchoice
 
+choice
+   prompt "CPU select"
+   default MPC866
+
+config MPC866
+   bool "MPC866"
+
+config MPC885
+   bool "MPC885"
+
+endchoice
+
+config 8xx_GCLK_FREQ
+   int "CPU GCLK Frequency"
+
 comment "Specific commands"
 
 config CMD_IMMAP
@@ -19,4 +34,137 @@ config CMD_IMMAP
 
siuinfo - print System Interface Unit (SIU) registers
memcinfo - print Memory Controller registers
+
+comment "Configuration Registers"
+
+config SYS_SIUMCR
+   hex "SIUMCR register"
+   help
+ SIU Module Configuration (11-6)
+
+config SYS_SYPCR
+   hex "SYPCR register"
+   help
+ System Protection Control (11-9)
+
+config SYS_TBSCR
+   hex "TBSCR register"
+   help
+ Time Base Status and Control (11-26)
+
+config SYS_PISCR
+   hex "PISCR register"
+   help
+ Periodic Interrupt Status and Control (11-31)
+
+config SYS_PLPRCR_BOOL
+   bool "Customise PLPRCR"
+
+config SYS_PLPRCR
+   hex "PLPRCR register"
+   depends on SYS_PLPRCR_BOOL
+   help
+ PLL, Low-Power, and Reset Control Register (15-30)
+
+config SYS_SCCR
+   hex "SCCR register"
+   help
+ System Clock and reset Control Register (15-27)
+
+config SYS_SCCR_MASK
+   hex "MASK for setting SCCR register"
+
+config SYS_DER
+   hex "DER register"
+   help
+ Debug Event Register (37-47)
+
+comment "Memory mapping"
+
+config SYS_BR0_PRELIM
+   hex "Preliminary value for BR0"
+
+config SYS_OR0_PRELIM
+   hex "Preliminary value for OR0"
+
+config SYS_BR1_PRELIM_BOOL
+   bool "Define Bank 1"
+
+config SYS_BR1_PRELIM
+   hex "Preliminary value for BR1"
+   depends on SYS_BR1_PRELIM_BOOL
+
+config SYS_OR1_PRELIM
+   hex "Preliminary value for OR1"
+   depends on SYS_BR1_PRELIM_BOOL
+
+config SYS_BR2_PRELIM_BOOL
+   bool "Define Bank 2"
+
+config SYS_BR2_PRELIM
+   hex "Preliminary value for BR2"
+   depends on SYS_BR2_PRELIM_BOOL
+
+config SYS_OR2_PRELIM
+   hex "Preliminary value for OR2"
+   depends on SYS_BR2_PRELIM_BOOL
+
+config SYS_BR3_PRELIM_BOOL
+   bool "Define Bank 3"
+
+config SYS_BR3_PRELIM
+   hex "Preliminary value for BR3"
+   depends on SYS_BR3_PRELIM_BOOL
+
+config SYS_OR3_PRELIM
+   hex "Preliminary value for OR3"
+   depends on SYS_BR3_PRELIM_BOOL
+
+config SYS_BR4_PRELIM_BOOL
+   bool "Define Bank 4"
+
+config SYS_BR4_PRELIM
+   hex "Preliminary value for BR4"
+   depends on SYS_BR4_PRELIM_BOOL
+
+config SYS_OR4_PRELIM
+   hex "Preliminary value for OR4"
+   depends on SYS_BR4_PRELIM_BOOL
+
+config SYS_BR5_PRELIM_BOOL
+   bool "Define Bank 5"
+
+config SYS_BR5_PRELIM
+   hex "Preliminary value for BR5"
+   depends on SYS_BR5_PRELIM_BOOL
+
+conf

[U-Boot] [PATCH v2 04/10] powerpc, 8xx: Implement GLL2 ERRATA

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/cpu_init.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index cf1280983a..52406e8483 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -51,6 +51,14 @@ void cpu_init_f(immap_t __iomem *immr)
clrsetbits_be32(&immr->im_clkrst.car_sccr, ~SCCR_MASK,
CONFIG_SYS_SCCR);
 
+   /* BUG MPC866 GLL2 consideration */
+   reg = in_be32(&immr->im_clkrst.car_sccr);
+   /* probably we use the mode 1:2:1 */
+   if ((reg & 0x0006) == 0x0002) {
+   clrbits_be32(&immr->im_clkrst.car_sccr, 0x0006);
+   setbits_be32(&immr->im_clkrst.car_sccr, 0x0002);
+   }
+
/* PLL (CPU clock) settings (15-30) */
 
out_be32(&immr->im_clkrstk.cark_plprcrk, KAPWR_KEY);
-- 
2.12.0

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[U-Boot] [PATCH v2 03/10] powerpc, 8xx: Use IO accessors to access IO memory

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/cpu.c|  58 +++---
 arch/powerpc/cpu/mpc8xx/cpu_init.c   |  98 --
 arch/powerpc/cpu/mpc8xx/fec.c| 262 +
 arch/powerpc/cpu/mpc8xx/immap.c  | 120 ++--
 arch/powerpc/cpu/mpc8xx/interrupts.c |  65 +++---
 arch/powerpc/cpu/mpc8xx/reginfo.c|  70 ---
 arch/powerpc/cpu/mpc8xx/serial.c | 182 -
 arch/powerpc/cpu/mpc8xx/speed.c  |   5 +-
 arch/powerpc/cpu/mpc8xx/spi.c| 166 +++-
 arch/powerpc/include/asm/iopin_8xx.h | 369 +++
 arch/powerpc/lib/time.c  |   7 +-
 include/watchdog.h   |   2 +-
 12 files changed, 739 insertions(+), 665 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 80b9596813..28cc182957 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -41,7 +41,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
 {
char *id_str =
NULL;
-   volatile immap_t *immap = (immap_t *) (immr & 0x);
+   immap_t __iomem *immap = (immap_t __iomem *)(immr & 0x);
uint k, m;
char buf[32];
char pre = 'X';
@@ -54,7 +54,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
return -1;
 
k = (immr << 16) |
-   immap->im_cpm.cp_dparam16[PROFF_REVNUM / sizeof(u16)];
+   in_be16(&immap->im_cpm.cp_dparam16[PROFF_REVNUM / sizeof(u16)]);
m = 0;
suf = "";
 
@@ -95,10 +95,9 @@ static int check_CPU (long clock, uint pvr, uint immr)
 
/* do we have a FEC (860T/P or 852/859/866/885)? */
 
-   immap->im_cpm.cp_fec.fec_addr_low = 0x12345678;
-   if (immap->im_cpm.cp_fec.fec_addr_low == 0x12345678) {
+   out_be32(&immap->im_cpm.cp_fec.fec_addr_low, 0x12345678);
+   if (in_be32(&immap->im_cpm.cp_fec.fec_addr_low) == 0x12345678)
printf (" FEC present");
-   }
 
if (!m) {
puts (cpu_warning);
@@ -127,11 +126,11 @@ int checkcpu (void)
 
 int checkicache (void)
 {
-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   memctl8xx_t __iomem *memctl = &immap->im_memctl;
u32 cacheon = rd_ic_cst () & IDC_ENABLED;
-
-   u32 k = memctl->memc_br0 & ~0x7fff; /* probe in flash memoryarea */
+   /* probe in flash memoryarea */
+   u32 k = in_be32(&memctl->memc_br0) & ~0x7fff;
u32 m;
u32 lines = -1;
 
@@ -168,11 +167,11 @@ int checkicache (void)
 
 int checkdcache (void)
 {
-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   memctl8xx_t __iomem *memctl = &immap->im_memctl;
u32 cacheon = rd_dc_cst () & IDC_ENABLED;
-
-   u32 k = memctl->memc_br0 & ~0x7fff; /* probe in flash memoryarea */
+   /* probe in flash memoryarea */
+   u32 k = in_be32(&memctl->memc_br0) & ~0x7fff;
u32 m;
u32 lines = -1;
 
@@ -204,12 +203,12 @@ void upmconfig (uint upm, uint * table, uint size)
 {
uint i;
uint addr = 0;
-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   memctl8xx_t __iomem *memctl = &immap->im_memctl;
 
for (i = 0; i < size; i++) {
-   memctl->memc_mdr = table[i];/* (16-15) */
-   memctl->memc_mcr = addr | upm;  /* (16-16) */
+   out_be32(&memctl->memc_mdr, table[i]);  /* (16-15) */
+   out_be32(&memctl->memc_mcr, addr | upm);/* (16-16) */
addr++;
}
 }
@@ -220,9 +219,10 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 {
ulong msr, addr;
 
-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
-   immap->im_clkrst.car_plprcr |= PLPRCR_CSR;  /* Checkstop Reset 
enable */
+   /* Checkstop Reset enable */
+   setbits_be32(&immap->im_clkrst.car_plprcr, PLPRCR_CSR);
 
/* Interrupts and MMU off */
__asm__ volatile ("mtspr81, 0");
@@ -260,14 +260,13 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
 unsigned long get_tbclk (void)
 {
uint immr = get_immr (0);   /* Return full IMMR contents */
-   volatile immap_t *immap = (volatile immap_t *)(immr & 0x);
+   immap_t __iomem *immap = (immap_t __iomem *)(immr & 0x);
ulong oscclk, factor, pll;
 
-   if (immap->im_clkrst.car_sccr & SCCR_TBS) {
+   if (in_be32(&immap->im_clkrst.car_s

[U-Boot] [PATCH v2 05/10] powerpc, 8xx: Handle checkpatch errors and some of the warnings/checks

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/cpu.c| 123 ++-
 arch/powerpc/cpu/mpc8xx/cpu_init.c   |   6 +-
 arch/powerpc/cpu/mpc8xx/fdt.c|   8 +--
 arch/powerpc/cpu/mpc8xx/fec.c|  81 +++
 arch/powerpc/cpu/mpc8xx/immap.c  | 108 ++
 arch/powerpc/cpu/mpc8xx/interrupts.c |  56 +++-
 arch/powerpc/cpu/mpc8xx/reginfo.c|   2 +-
 arch/powerpc/cpu/mpc8xx/serial.c |  42 +---
 arch/powerpc/cpu/mpc8xx/speed.c  |  34 +-
 arch/powerpc/cpu/mpc8xx/spi.c|  43 +---
 arch/powerpc/cpu/mpc8xx/traps.c  |  37 +--
 arch/powerpc/include/asm/iopin_8xx.h |  72 +++-
 include/commproc.h   |  12 ++--
 13 files changed, 283 insertions(+), 341 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 28cc182957..5cfc8c189c 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
 static char *cpu_warning = "\n " \
"*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***";
 
-static int check_CPU (long clock, uint pvr, uint immr)
+static int check_CPU(long clock, uint pvr, uint immr)
 {
char *id_str =
NULL;
@@ -73,22 +73,25 @@ static int check_CPU (long clock, uint pvr, uint immr)
id_str =
"PC866x"; /* Unknown chip from MPC866 family */
break;
-   case 0x0900: pre = 'M'; mid = suf = ""; m = 1;
+   case 0x0900:
+   pre = 'M'; mid = suf = ""; m = 1;
if (id_str == NULL)
id_str = "PC885"; /* 870/875/880/885 */
break;
 
-   default: suf = NULL; break;
+   default:
+   suf = NULL;
+   break;
}
 
if (id_str == NULL)
id_str = "PC86x";   /* Unknown 86x chip */
if (suf)
-   printf ("%c%s%sZPnn%s", pre, id_str, mid, suf);
+   printf("%c%s%sZPnn%s", pre, id_str, mid, suf);
else
-   printf ("unknown M%s (0x%08x)", id_str, k);
+   printf("unknown M%s (0x%08x)", id_str, k);
 
-   printf (" at %s MHz: ", strmhz (buf, clock));
+   printf(" at %s MHz: ", strmhz(buf, clock));
 
print_size(checkicache(), " I-Cache ");
print_size(checkdcache(), " D-Cache");
@@ -97,64 +100,63 @@ static int check_CPU (long clock, uint pvr, uint immr)
 
out_be32(&immap->im_cpm.cp_fec.fec_addr_low, 0x12345678);
if (in_be32(&immap->im_cpm.cp_fec.fec_addr_low) == 0x12345678)
-   printf (" FEC present");
+   printf(" FEC present");
 
-   if (!m) {
-   puts (cpu_warning);
-   }
+   if (!m)
+   puts(cpu_warning);
 
-   putc ('\n');
+   putc('\n');
 
return 0;
 }
 
 /* - */
 
-int checkcpu (void)
+int checkcpu(void)
 {
ulong clock = gd->cpu_clk;
-   uint immr = get_immr (0);   /* Return full IMMR contents */
-   uint pvr = get_pvr ();
+   uint immr = get_immr(0);/* Return full IMMR contents */
+   uint pvr = get_pvr();
 
-   puts ("CPU:   ");
+   puts("CPU:   ");
 
-   return check_CPU (clock, pvr, immr);
+   return check_CPU(clock, pvr, immr);
 }
 
 /* - */
 /* L1 i-cache*/
 
-int checkicache (void)
+int checkicache(void)
 {
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
memctl8xx_t __iomem *memctl = &immap->im_memctl;
-   u32 cacheon = rd_ic_cst () & IDC_ENABLED;
+   u32 cacheon = rd_ic_cst() & IDC_ENABLED;
/* probe in flash memoryarea */
u32 k = in_be32(&memctl->memc_br0) & ~0x7fff;
u32 m;
u32 lines = -1;
 
-   wr_ic_cst (IDC_UNALL);
-   wr_ic_cst (IDC_INVALL);
-   wr_ic_cst (IDC_DISABLE);
+   wr_ic_cst(IDC_UNALL);
+   wr_ic_cst(IDC_INVALL);
+   wr_ic_cst(IDC_DISABLE);
__asm__ volatile ("isync");
 
-   while (!((m = rd_ic_cst ()) & IDC_CERR2)) {
-   wr_ic_adr (k);
-   wr_ic_cst (IDC_LDLCK);
+   while (!((m = rd_ic_cst()) & IDC_CERR2)) {
+   wr_ic_adr(k);
+   wr_ic_cst(IDC_LDLCK);
__asm__ volatile ("isync");
 
lines++;
-   k += 0x10;  /* the number of bytes 
in a cacheline */
+   k += 0x10;  /* the number of bytes in a cacheline */
}
 
-   wr_ic_cst (IDC_UNALL);
-   wr_ic_cst (IDC_INVALL);
+   wr_ic_cst(IDC_UNALL);
+   wr_ic_cst(IDC_INVALL);
 
if (cacheon)
-   wr_ic_cst (IDC_ENABLE);
+   wr

[U-Boot] [PATCH v2 10/10] powerpc, 8xx: move Serial driver to drivers/serial/

2017-07-06 Thread Christophe Leroy
At the same time, move to Kconfig

Signed-off-by: Christophe Leroy 
---
 README | 19 
 arch/powerpc/cpu/mpc8xx/Makefile   |  1 -
 drivers/serial/Kconfig | 53 ++
 drivers/serial/Makefile|  1 +
 .../serial.c => drivers/serial/serial_mpc8xx.c | 23 --
 scripts/config_whitelist.txt   |  7 ---
 6 files changed, 54 insertions(+), 50 deletions(-)
 rename arch/powerpc/cpu/mpc8xx/serial.c => drivers/serial/serial_mpc8xx.c (93%)

diff --git a/README b/README
index 0f204be0ca..c5ddf326b3 100644
--- a/README
+++ b/README
@@ -691,29 +691,10 @@ The following options need to be configured:
Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
 
-- Console Interface:
-   Depending on board, define exactly one serial port
-   (CONFIG_8xx_CONS_SMC1 or CONFIG_8xx_CONS_SMC2),
-   or switch off the serial console by defining
-   CONFIG_8xx_CONS_NONE
-
-   Note: if CONFIG_8xx_CONS_NONE is defined, the serial
-   port routines must be defined elsewhere
-   (i.e. serial_init(), serial_getc(), ...)
-
 - Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
-   CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
-
-- Console Rx buffer length
-   With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
-   the maximum receive buffer length for the SMC.
-   This option is actual only for 8xx possible.
-   If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
-   must be defined, to setup the maximum idle timeout for
-   the SMC.
 
 - Autoboot Command:
CONFIG_BOOTCOMMAND
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 173cf01869..b40bffb047 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -13,5 +13,4 @@ obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_CMD_IMMAP) += immap.o
 obj-y  += interrupts.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
-obj-y  += serial.o
 obj-y  += speed.o
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index c64f4a6d7b..b7dd2ac103 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -491,4 +491,57 @@ config STI_ASC_SERIAL
  on STiH410 SoC. This is a basic implementation,  it supports
  following baudrate 9600, 19200, 38400, 57600 and 115200.
 
+config MPC8XX_CONS
+   bool "Console driver for MPC8XX"
+   depends on 8xx
+   default y
+
+choice
+   prompt "Console port"
+   default 8xx_CONS_SMC1
+   depends on MPC8XX_CONS
+   help
+ Depending on board, select one serial port
+ (CONFIG_8xx_CONS_SMC1 or CONFIG_8xx_CONS_SMC2)
+
+config 8xx_CONS_SMC1
+   bool "SMC1"
+
+config 8xx_CONS_SMC2
+   bool "SMC2"
+
+endchoice
+
+config SYS_SMC_RXBUFLEN
+   int "Console Rx buffer length"
+   depends on MPC8XX_CONS
+   default 1
+   help
+ With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
+ the maximum receive buffer length for the SMC.
+ This option is actual only for 8xx possible.
+ If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
+ must be defined, to setup the maximum idle timeout for
+ the SMC.
+
+config SYS_MAXIDLE
+   int "maximum idle timeout"
+   depends on MPC8XX_CONS
+   default 0
+
+config SYS_BRGCLK_PRESCALE
+   int "BRG Clock Prescale"
+   depends on MPC8XX_CONS
+   default 1
+
+config SYS_SDSR
+   hex "SDSR Value"
+   depends on MPC8XX_CONS
+   default 0x83
+
+config SYS_SDMR
+   hex "SDMR Value"
+   depends on MPC8XX_CONS
+   default 0
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index dca31b295c..72a6996a0a 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
 obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
 obj-$(CONFIG_MVEBU_A3700_UART) += serial_mvebu_a3700.o
+obj-$(CONFIG_MPC8XX_CONS) += serial_mpc8xx.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/drivers/serial/serial_mpc8xx.c
similarity index 93%
rename from arch/powerpc/cpu/mpc8xx/serial.c
rename to drivers/serial/serial_mpc8xx.c
index 114dfe9b4b..26a8085a69 100644
--- a/arch/powerpc/cpu/mpc8xx/serial.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -14,8 +14,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if !defined(CONFIG_8xx_CONS_NONE) /* No Console at all */
-
 #if defined(CONFIG_8xx_CONS_SMC1)  

[U-Boot] [PATCH v2 09/10] powerpc, 8xx: move SPI driver to drivers/spi/

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Makefile  | 1 -
 drivers/spi/Kconfig   | 6 ++
 drivers/spi/Makefile  | 1 +
 arch/powerpc/cpu/mpc8xx/spi.c => drivers/spi/mpc8xx_spi.c | 3 ---
 4 files changed, 7 insertions(+), 4 deletions(-)
 rename arch/powerpc/cpu/mpc8xx/spi.c => drivers/spi/mpc8xx_spi.c (99%)

diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index f67c3f8463..173cf01869 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -15,4 +15,3 @@ obj-y += interrupts.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-y  += serial.o
 obj-y  += speed.o
-obj-y  += spi.o
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index bef864f46e..03d0c05f23 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -223,4 +223,10 @@ config TI_QSPI
  Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
  This driver support spi flash single, quad and memory reads.
 
+config MPC8XX_SPI
+   bool "MPC8XX SPI Driver"
+   depends on 8xx
+   help
+ Enable support for SPI on MPC8XX
+
 endmenu # menu "SPI Support"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c090562c77..9f8b86de76 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o
 obj-$(CONFIG_ICH_SPI) +=  ich.o
 obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
 obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
+obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
 obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
 obj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o
 obj-$(CONFIG_MXC_SPI) += mxc_spi.o
diff --git a/arch/powerpc/cpu/mpc8xx/spi.c b/drivers/spi/mpc8xx_spi.c
similarity index 99%
rename from arch/powerpc/cpu/mpc8xx/spi.c
rename to drivers/spi/mpc8xx_spi.c
index 6e3e86fb0f..b5bd558526 100644
--- a/arch/powerpc/cpu/mpc8xx/spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -25,8 +25,6 @@
 #include 
 #include 
 
-#ifdef CONFIG_SPI
-
 #define SPI_EEPROM_WREN0x06
 #define SPI_EEPROM_RDSR0x05
 #define SPI_EEPROM_READ0x03
@@ -336,4 +334,3 @@ ssize_t spi_xfer(size_t count)
 
return count;
 }
-#endif /* CONFIG_SPI */
-- 
2.12.0

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[U-Boot] [PATCH v2] powerpc, 8xx: Add support for MCR3000 board from CSSI

2017-07-06 Thread Christophe Leroy
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.

This patch adds support for the first board.

Signed-off-by: Christophe Leroy 
---
 Applies after the v2 serie 'powerpc, 8xx: Modernise the 8xx'

 .travis.yml |   2 +
 arch/powerpc/cpu/mpc8xx/Kconfig |   5 +
 board/cssi/MAINTAINERS  |   6 +
 board/cssi/MCR3000/Kconfig  |  15 ++
 board/cssi/MCR3000/MCR3000.c| 316 
 board/cssi/MCR3000/Makefile |  10 ++
 board/cssi/MCR3000/nand.c   |  65 +
 board/cssi/MCR3000/u-boot.lds   |  91 
 configs/MCR3000_defconfig   |  81 ++
 drivers/net/mpc8xx_fec.c|  20 +++
 include/configs/MCR3000.h   | 240 ++
 11 files changed, 851 insertions(+)
 create mode 100644 board/cssi/MAINTAINERS
 create mode 100644 board/cssi/MCR3000/Kconfig
 create mode 100644 board/cssi/MCR3000/MCR3000.c
 create mode 100644 board/cssi/MCR3000/Makefile
 create mode 100644 board/cssi/MCR3000/nand.c
 create mode 100644 board/cssi/MCR3000/u-boot.lds
 create mode 100644 configs/MCR3000_defconfig
 create mode 100644 include/configs/MCR3000.h

diff --git a/.travis.yml b/.travis.yml
index 6f14ec2396..226c8313b1 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -210,6 +210,8 @@ matrix:
 - env:
 - BUILDMAN="mpc86xx"
 - env:
+- BUILDMAN="mpc8xx"
+- env:
 - BUILDMAN="siemens"
 - env:
 - BUILDMAN="tegra"
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 9e1ad33c28..5a7db335ed 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -8,6 +8,9 @@ choice
prompt "Target select"
optional
 
+config TARGET_MCR3000
+   bool "Support MCR3000 board from CSSI"
+
 endchoice
 
 choice
@@ -167,4 +170,6 @@ config SYS_OR7_PRELIM
 config SYS_IMMR
hex "Value for IMMR"
 
+source "board/cssi/MCR3000/Kconfig"
+
 endmenu
diff --git a/board/cssi/MAINTAINERS b/board/cssi/MAINTAINERS
new file mode 100644
index 00..cbf1406a54
--- /dev/null
+++ b/board/cssi/MAINTAINERS
@@ -0,0 +1,6 @@
+BOARDS from CS Systemes d'Information
+M: Christophe Leroy 
+S: Maintained
+F: board/cssi/
+F: include/configs/MCR3000.h
+F: configs/MCR3000_defconfig
diff --git a/board/cssi/MCR3000/Kconfig b/board/cssi/MCR3000/Kconfig
new file mode 100644
index 00..ecfd90fd4c
--- /dev/null
+++ b/board/cssi/MCR3000/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_MCR3000
+
+config SYS_BOARD
+   default "MCR3000"
+
+config SYS_VENDOR
+   default "cssi"
+
+config SYS_CONFIG_NAME
+   default "MCR3000"
+
+config SYS_TEXT_BASE
+   default 0x0400
+
+endif
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
new file mode 100644
index 00..a84633a669
--- /dev/null
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -0,0 +1,316 @@
+/*
+ * Copyright (C) 2010-2017 CS Systemes d'Information
+ * Florent Trinh Thai 
+ * Christophe Leroy 
+ *
+ * Board specific routines for the MCR3000 board
+ *
+ * - initialisation
+ * - memory controller
+ * - serial io initialisation
+ * - ethernet io initialisation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+#include 
+#endif
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+
+/* -
+ * constant
+ */
+static const uint cs1_dram_table_66[] = {
+   /* DRAM - single read. (offset 0 in upm RAM) */
+   0x0F3DFC04, 0x0FEFBC04, 0x00BE7804, 0x0FFDF400,
+   0x1C05, 0x, 0x, 0x,
+
+   /* DRAM - burst read. (offset 8 in upm RAM) */
+   0x0F3DFC04, 0x0FEFBC04, 0x00BF7C04, 0x00FFFC00,
+   0x00FFFC00, 0x00FEF800, 0x0FFDF400, 0x1C05,
+   0x, 0x, 0x, 0x,
+   0x, 0x, 0x, 0x,
+
+   /* DRAM - single write. (offset 18 in upm RAM) */
+   0x0F3DFC04, 0x0FEFB800, 0x00BF7404, 0x0FFEF804,
+   0x0FFDF404, 0x1C05, 0x, 0x,
+
+   /* DRAM - burst write. (offset 20 in upm RAM) */
+   0x0F3DFC04, 0x0FEFB800, 0x00BF7400, 0x00FFFC00,
+   0x00FFFC00, 0x00FFFC04, 0x0FFEF804, 0x0FFDF404,
+   0x1C05, 0x, 0x, 0x,
+   0x, 0x, 0x, 0x,
+
+   /* refresh  (offset 30 in upm RAM) */
+   0x0FFDF404, 0x0FFEBC04, 0x0FFD7C84, 0x0C04,
+   0x0C04, 0x0C04, 0x1C85, 0x,
+
+   /* init */
+   0x0FEEB874, 0x0FBD7474, 0x1C45, 0x,
+
+   /* exception. (offset 3c in upm RAM) */
+   0xFC05, 0x, 0x, 0x,
+};
+
+/* -
+ * Device Tree Support
+ */
+#if defined(CONFIG_OF_BO

Re: [U-Boot] [PATCH v2 01/10] powerpc, 8xx: move immap.c in arch/powerpc/cpu/mpc8xx/

2017-07-06 Thread Christophe LEROY

Le 06/07/2017 à 10:33, Christophe Leroy a écrit :

immap.c used to be common to several CPUs. It is now
only linked to the 8xx, so this patch moves it into
arch/powerpc/cpu/mpc8xx/

Signed-off-by: Christophe Leroy 
---


Forgot to tell that this serie applies after '[v6] powerpc: Partialy 
restore core of mpc8xx'


Christophe


  arch/powerpc/Kconfig | 2 --
  arch/powerpc/cpu/mpc8xx/Kconfig  | 9 +
  arch/powerpc/cpu/mpc8xx/Makefile | 1 +
  arch/powerpc/{lib => cpu/mpc8xx}/immap.c | 3 ---
  arch/powerpc/lib/Kconfig | 7 ---
  arch/powerpc/lib/Makefile| 1 -
  6 files changed, 10 insertions(+), 13 deletions(-)
  rename arch/powerpc/{lib => cpu/mpc8xx}/immap.c (99%)
  delete mode 100644 arch/powerpc/lib/Kconfig

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a7558d59b2..e9002a76ab 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -34,8 +34,6 @@ config 8xx
  
  endchoice
  
-source "arch/powerpc/lib/Kconfig"

-
  source "arch/powerpc/cpu/mpc83xx/Kconfig"
  source "arch/powerpc/cpu/mpc85xx/Kconfig"
  source "arch/powerpc/cpu/mpc86xx/Kconfig"
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index a425cba8aa..cb15dc5ebc 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -10,4 +10,13 @@ choice
  
  endchoice
  
+comment "Specific commands"

+
+config CMD_IMMAP
+   bool "Enable various commands to dump IMMR information"
+   help
+ This enables various commands such as:
+
+   siuinfo - print System Interface Unit (SIU) registers
+   memcinfo - print Memory Controller registers
  endmenu
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 5dd801d76e..eae02da636 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -11,6 +11,7 @@ obj-y += cpu.o
  obj-y += cpu_init.o
  obj-y += fec.o
  obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-$(CONFIG_CMD_IMMAP) += immap.o
  obj-y += interrupts.o
  obj-y += serial.o
  obj-y += speed.o
diff --git a/arch/powerpc/lib/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
similarity index 99%
rename from arch/powerpc/lib/immap.c
rename to arch/powerpc/cpu/mpc8xx/immap.c
index 1beed1fa40..5ff6aa5e3b 100644
--- a/arch/powerpc/lib/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -12,8 +12,6 @@
  #include 
  #include 
  
-#if defined(CONFIG_8xx)

-
  #include 
  #include 
  #include 
@@ -394,4 +392,3 @@ U_BOOT_CMD(
"print Baud Rate Generator (BRG) registers",
""
  );
-#endif
diff --git a/arch/powerpc/lib/Kconfig b/arch/powerpc/lib/Kconfig
deleted file mode 100644
index 7c8ea971c3..00
--- a/arch/powerpc/lib/Kconfig
+++ /dev/null
@@ -1,7 +0,0 @@
-config CMD_IMMAP
-   bool "Enable various commands to dump IMMR information"
-   help
- This enables various commands such as:
-
-   siuinfo - print System Interface Unit (SIU) registers
-   memcinfo - print Memory Controller registers
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 4aa41836a2..9a3043abf8 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -32,7 +32,6 @@ obj-$(CONFIG_BAT_RW) += bat_rw.o
  obj-$(CONFIG_CMD_BOOTM) += bootm.o
  obj-y += cache.o
  obj-y += extable.o
-obj-$(CONFIG_CMD_IMMAP) += immap.o
  obj-y += interrupts.o
  obj-$(CONFIG_CMD_KGDB) += kgdb.o
  obj-y += stack.o


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Re: [U-Boot] [RESEND][PATCH v5 1/5] usb: host: xhci-dwc3: Convert driver to DM

2017-07-06 Thread Patrice CHOTARD
Hi Bin

On 07/06/2017 10:27 AM, Bin Meng wrote:
> Hi Patrice,
> 
> On Thu, Jul 6, 2017 at 3:50 PM,   wrote:
>> From: Patrice Chotard 
>>
>> Add Driver Model support with use of generic DT
>> compatible string "snps,dwc3"
>>
>> Signed-off-by: Patrice Chotard 
>> Reviewed-by: Simon Glass 
>> ---
>>
>> v5: _ replace dev_get_addr() by devfdt_get_addr()
>> v4: _ none
>> v3: _ none
>> v2: _ use dev_get_addr() and removed useless piece of code
>>
>>
>>   drivers/usb/host/xhci-dwc3.c | 50 
>> 
>>   1 file changed, 50 insertions(+)
>>
>> diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
>> index 33961cd..8c90836 100644
>> --- a/drivers/usb/host/xhci-dwc3.c
>> +++ b/drivers/usb/host/xhci-dwc3.c
>> @@ -9,9 +9,19 @@
>>*/
>>
>>   #include 
>> +#include 
>> +#include 
>> +
>> +#include "xhci.h"
>>   #include 
>>   #include 
>>
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +struct xhci_dwc3_priv {
>> +   struct xhci_ctrl ctrl;
>> +};
> 
> Please use 'struct xhci_dwc3' directly for .priv_auto_alloc_size


You mean, rename struct xhci_dwc3_priv to struct xhci_dwc3 ?

> 
>> +
>>   void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
>>   {
>>  clrsetbits_le32(&dwc3_reg->g_ctl,
>> @@ -97,3 +107,43 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>>  setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>>  GFLADJ_30MHZ(val));
>>   }
>> +
>> +static int xhci_dwc3_probe(struct udevice *dev)
>> +{
>> +   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
>> +   struct xhci_hcor *hcor;
>> +   struct xhci_hccr *hccr;
>> +   struct dwc3 *dwc3_reg;
>> +
>> +   hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
>> +   hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
>> +   HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
>> +
>> +   dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
>> +
>> +   dwc3_core_init(dwc3_reg);
>> +
>> +   return xhci_register(dev, hccr, hcor);
>> +}
>> +
>> +static int xhci_dwc3_remove(struct udevice *dev)
>> +{
>> +   return xhci_deregister(dev);
>> +}
> 
> Please nuke this xhci_dwc3_remove(), instead register
> xhci_deregister() directly.

Is it worth, as in patch 5, xhci_dwc3_remove() will be populated.

Thanks

Patrice

> 
>> +
>> +static const struct udevice_id xhci_dwc3_ids[] = {
>> +   { .compatible = "snps,dwc3" },
>> +   { }
>> +};
>> +
>> +U_BOOT_DRIVER(xhci_dwc3) = {
>> +   .name = "xhci-dwc3",
>> +   .id = UCLASS_USB,
>> +   .of_match = xhci_dwc3_ids,
>> +   .probe = xhci_dwc3_probe,
>> +   .remove = xhci_dwc3_remove,
>> +   .ops = &xhci_usb_ops,
>> +   .priv_auto_alloc_size = sizeof(struct xhci_dwc3_priv),
>> +   .platdata_auto_alloc_size = sizeof(struct xhci_dwc3_platdata),
>> +   .flags = DM_FLAG_ALLOC_PRIV_DMA,
>> +};
>> --
> 
> Regards,
> Bin
> 
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Re: [U-Boot] [RESEND][PATCH v5 1/5] usb: host: xhci-dwc3: Convert driver to DM

2017-07-06 Thread Bin Meng
Hi Patrice,

On Thu, Jul 6, 2017 at 4:47 PM, Patrice CHOTARD  wrote:
> Hi Bin
>
> On 07/06/2017 10:27 AM, Bin Meng wrote:
>> Hi Patrice,
>>
>> On Thu, Jul 6, 2017 at 3:50 PM,   wrote:
>>> From: Patrice Chotard 
>>>
>>> Add Driver Model support with use of generic DT
>>> compatible string "snps,dwc3"
>>>
>>> Signed-off-by: Patrice Chotard 
>>> Reviewed-by: Simon Glass 
>>> ---
>>>
>>> v5: _ replace dev_get_addr() by devfdt_get_addr()
>>> v4: _ none
>>> v3: _ none
>>> v2: _ use dev_get_addr() and removed useless piece of code
>>>
>>>
>>>   drivers/usb/host/xhci-dwc3.c | 50 
>>> 
>>>   1 file changed, 50 insertions(+)
>>>
>>> diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
>>> index 33961cd..8c90836 100644
>>> --- a/drivers/usb/host/xhci-dwc3.c
>>> +++ b/drivers/usb/host/xhci-dwc3.c
>>> @@ -9,9 +9,19 @@
>>>*/
>>>
>>>   #include 
>>> +#include 
>>> +#include 
>>> +
>>> +#include "xhci.h"
>>>   #include 
>>>   #include 
>>>
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> +struct xhci_dwc3_priv {
>>> +   struct xhci_ctrl ctrl;
>>> +};
>>
>> Please use 'struct xhci_dwc3' directly for .priv_auto_alloc_size
>
>
> You mean, rename struct xhci_dwc3_priv to struct xhci_dwc3 ?

I mean use .priv_auto_alloc_size = sizeof(struct xhci_ctrl) directly
without adding a new struct

>
>>
>>> +
>>>   void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
>>>   {
>>>  clrsetbits_le32(&dwc3_reg->g_ctl,
>>> @@ -97,3 +107,43 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
>>>  setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
>>>  GFLADJ_30MHZ(val));
>>>   }
>>> +
>>> +static int xhci_dwc3_probe(struct udevice *dev)
>>> +{
>>> +   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
>>> +   struct xhci_hcor *hcor;
>>> +   struct xhci_hccr *hccr;
>>> +   struct dwc3 *dwc3_reg;
>>> +
>>> +   hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
>>> +   hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
>>> +   HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
>>> +
>>> +   dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
>>> +
>>> +   dwc3_core_init(dwc3_reg);
>>> +
>>> +   return xhci_register(dev, hccr, hcor);
>>> +}
>>> +
>>> +static int xhci_dwc3_remove(struct udevice *dev)
>>> +{
>>> +   return xhci_deregister(dev);
>>> +}
>>
>> Please nuke this xhci_dwc3_remove(), instead register
>> xhci_deregister() directly.
>
> Is it worth, as in patch 5, xhci_dwc3_remove() will be populated.
>

Ah, I see. Then there is no need to do that. Thanks!

Regards,
Bin
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Re: [U-Boot] [PATCH v2 08/10] powerpc, 8xx: move FEC Ethernet driver in drivers/net

2017-07-06 Thread Bin Meng
Hi Christophe,

On Thu, Jul 6, 2017 at 4:33 PM, Christophe Leroy
 wrote:
> Signed-off-by: Christophe Leroy 
> ---
>  README | 15 --
>  arch/powerpc/cpu/mpc8xx/Makefile   |  1 -
>  arch/powerpc/cpu/mpc8xx/cpu.c  |  2 +-
>  drivers/net/Kconfig| 58 
> ++
>  drivers/net/Makefile   |  1 +
>  .../cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c   | 18 ---
>  scripts/config_whitelist.txt   |  4 --
>  7 files changed, 60 insertions(+), 39 deletions(-)
>  rename arch/powerpc/cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c (97%)
>

I've seen all previous discussion on this 8xx support. But since you
are modernising 8xx support, can you convert this driver to DM
instead? We should not add any new legacy driver any more.

[snip]

Regards,
Bin
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Re: [U-Boot] [PATCH v2 07/10] powerpc, 8xx: Migrate to Kconfig

2017-07-06 Thread Bin Meng
Hi Christophe,

On Thu, Jul 6, 2017 at 4:33 PM, Christophe Leroy
 wrote:
> Signed-off-by: Christophe Leroy 
> ---
>  README |  15 
>  arch/powerpc/cpu/mpc8xx/Kconfig| 148 
> +
>  arch/powerpc/cpu/mpc8xx/cpu_init.c |   2 +-
>  arch/powerpc/cpu/mpc8xx/fec.c  |   8 +-
>  arch/powerpc/include/asm/ppc.h |   5 --
>  drivers/i2c/soft_i2c.c |   2 +-
>  scripts/config_whitelist.txt   |  11 ---
>  7 files changed, 154 insertions(+), 37 deletions(-)
>
> diff --git a/README b/README
> index c3ab481a56..030a452f9a 100644
> --- a/README
> +++ b/README
> @@ -328,9 +328,6 @@ The following options need to be configured:
>   multiple fs option at one time
>   for marvell soc family
>
> -- 8xx CPU Options: (if using an MPC8xx CPU)
> -   CONFIG_8xx_GCLK_FREQ- CPU clock
> -
>  - 85xx CPU Options:
> CONFIG_SYS_PPC64
>
> @@ -3993,16 +3990,6 @@ Low Level (hardware related) configuration options:
> point to an otherwise UNUSED address space between
> the top of RAM and the start of the PCI space.
>
> -- CONFIG_SYS_SIUMCR:   SIU Module Configuration (11-6)
> -
> -- CONFIG_SYS_SYPCR:System Protection Control (11-9)
> -
> -- CONFIG_SYS_TBSCR:Time Base Status and Control (11-26)
> -
> -- CONFIG_SYS_PISCR:Periodic Interrupt Status and Control (11-31)
> -
> -- CONFIG_SYS_PLPRCR:   PLL, Low-Power, and Reset Control Register (15-30)
> -
>  - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
>
>  - CONFIG_SYS_OR_TIMING_SDRAM:
> @@ -4011,8 +3998,6 @@ Low Level (hardware related) configuration options:
>  - CONFIG_SYS_MAMR_PTA:
> periodic timer for refresh
>
> -- CONFIG_SYS_DER:  Debug Event Register (37-47)
> -
>  - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
>CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
>CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, 
> CONFIG_SYS_OR1_PRELIM,
> diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
> index cb15dc5ebc..9e1ad33c28 100644
> --- a/arch/powerpc/cpu/mpc8xx/Kconfig
> +++ b/arch/powerpc/cpu/mpc8xx/Kconfig
> @@ -10,6 +10,21 @@ choice
>
>  endchoice
>
> +choice
> +   prompt "CPU select"
> +   default MPC866
> +
> +config MPC866
> +   bool "MPC866"
> +
> +config MPC885
> +   bool "MPC885"
> +
> +endchoice
> +
> +config 8xx_GCLK_FREQ
> +   int "CPU GCLK Frequency"
> +
>  comment "Specific commands"
>
>  config CMD_IMMAP
> @@ -19,4 +34,137 @@ config CMD_IMMAP
>
> siuinfo - print System Interface Unit (SIU) registers
> memcinfo - print Memory Controller registers
> +
> +comment "Configuration Registers"
> +
> +config SYS_SIUMCR
> +   hex "SIUMCR register"
> +   help
> + SIU Module Configuration (11-6)
> +
> +config SYS_SYPCR
> +   hex "SYPCR register"
> +   help
> + System Protection Control (11-9)
> +
> +config SYS_TBSCR
> +   hex "TBSCR register"
> +   help
> + Time Base Status and Control (11-26)
> +
> +config SYS_PISCR
> +   hex "PISCR register"
> +   help
> + Periodic Interrupt Status and Control (11-31)
> +
> +config SYS_PLPRCR_BOOL
> +   bool "Customise PLPRCR"
> +
> +config SYS_PLPRCR
> +   hex "PLPRCR register"
> +   depends on SYS_PLPRCR_BOOL
> +   help
> + PLL, Low-Power, and Reset Control Register (15-30)
> +
> +config SYS_SCCR
> +   hex "SCCR register"
> +   help
> + System Clock and reset Control Register (15-27)
> +
> +config SYS_SCCR_MASK
> +   hex "MASK for setting SCCR register"
> +
> +config SYS_DER
> +   hex "DER register"
> +   help
> + Debug Event Register (37-47)
> +
> +comment "Memory mapping"
> +
> +config SYS_BR0_PRELIM
> +   hex "Preliminary value for BR0"
> +
> +config SYS_OR0_PRELIM
> +   hex "Preliminary value for OR0"
> +

These are really register values and should be converted to use device
tree, instead of Kconfig options.

> +config SYS_BR1_PRELIM_BOOL
> +   bool "Define Bank 1"
> +
> +config SYS_BR1_PRELIM
> +   hex "Preliminary value for BR1"
> +   depends on SYS_BR1_PRELIM_BOOL
> +
> +config SYS_OR1_PRELIM
> +   hex "Preliminary value for OR1"
> +   depends on SYS_BR1_PRELIM_BOOL
> +
> +config SYS_BR2_PRELIM_BOOL
> +   bool "Define Bank 2"
> +
> +config SYS_BR2_PRELIM
> +   hex "Preliminary value for BR2"
> +   depends on SYS_BR2_PRELIM_BOOL
> +
> +config SYS_OR2_PRELIM
> +   hex "Preliminary value for OR2"
> +   depends on SYS_BR2_PRELIM_BOOL
> +
> +config SYS_BR3_PRELIM_BOOL
> +   bool "Define Bank 3"
> +
> +config SYS_BR3_PRELIM
> +   hex "Preliminary value for BR3"
> +   depends on SYS_BR3_PRELIM_BOOL
> +
> +config SYS_OR3_PRELIM
> +   hex "Prelimi

Re: [U-Boot] [RESEND][PATCH v5 1/5] usb: host: xhci-dwc3: Convert driver to DM

2017-07-06 Thread Patrice CHOTARD
Hi Bin

On 07/06/2017 10:50 AM, Bin Meng wrote:
> Hi Patrice,
> 
> On Thu, Jul 6, 2017 at 4:47 PM, Patrice CHOTARD  
> wrote:
>> Hi Bin
>>
>> On 07/06/2017 10:27 AM, Bin Meng wrote:
>>> Hi Patrice,
>>>
>>> On Thu, Jul 6, 2017 at 3:50 PM,   wrote:
 From: Patrice Chotard 

 Add Driver Model support with use of generic DT
 compatible string "snps,dwc3"

 Signed-off-by: Patrice Chotard 
 Reviewed-by: Simon Glass 
 ---

 v5: _ replace dev_get_addr() by devfdt_get_addr()
 v4: _ none
 v3: _ none
 v2: _ use dev_get_addr() and removed useless piece of code


drivers/usb/host/xhci-dwc3.c | 50 
 
1 file changed, 50 insertions(+)

 diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
 index 33961cd..8c90836 100644
 --- a/drivers/usb/host/xhci-dwc3.c
 +++ b/drivers/usb/host/xhci-dwc3.c
 @@ -9,9 +9,19 @@
 */

#include 
 +#include 
 +#include 
 +
 +#include "xhci.h"
#include 
#include 

 +DECLARE_GLOBAL_DATA_PTR;
 +
 +struct xhci_dwc3_priv {
 +   struct xhci_ctrl ctrl;
 +};
>>>
>>> Please use 'struct xhci_dwc3' directly for .priv_auto_alloc_size
>>
>>
>> You mean, rename struct xhci_dwc3_priv to struct xhci_dwc3 ?
> 
> I mean use .priv_auto_alloc_size = sizeof(struct xhci_ctrl) directly
> without adding a new struct

Agree, i will fix this

Thanks

Patrice

> 
>>
>>>
 +
void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
{
   clrsetbits_le32(&dwc3_reg->g_ctl,
 @@ -97,3 +107,43 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
   setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL |
   GFLADJ_30MHZ(val));
}
 +
 +static int xhci_dwc3_probe(struct udevice *dev)
 +{
 +   struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
 +   struct xhci_hcor *hcor;
 +   struct xhci_hccr *hccr;
 +   struct dwc3 *dwc3_reg;
 +
 +   hccr = (struct xhci_hccr *)devfdt_get_addr(dev);
 +   hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
 +   HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 +
 +   dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
 +
 +   dwc3_core_init(dwc3_reg);
 +
 +   return xhci_register(dev, hccr, hcor);
 +}
 +
 +static int xhci_dwc3_remove(struct udevice *dev)
 +{
 +   return xhci_deregister(dev);
 +}
>>>
>>> Please nuke this xhci_dwc3_remove(), instead register
>>> xhci_deregister() directly.
>>
>> Is it worth, as in patch 5, xhci_dwc3_remove() will be populated.
>>
> 
> Ah, I see. Then there is no need to do that. Thanks!
> 
> Regards,
> Bin
> 
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[U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Andre Przywara
The UEFI spec allows an EFI system partition (ESP, with the bootloader or
kernel EFI apps on it) to reside on a disk using a "legacy" MBR
partitioning scheme.
But in contrast to actual legacy disks the ESP is not marked as
"bootable" using bit 7 in byte 0 of the legacy partition entry, but is
instead using partition *type* 0xef (in contrast to 0x0b or 0x0c for a
normal FAT partition). The EFI spec isn't 100% clear on this, but it even
seems to discourage the use of the bootable flag for ESPs.
Also it seems that some EFI implementations (EDK2?) even seem to ignore
partitions marked as bootable (probably since they believe they contain
legacy boot code).
The Debian installer [1] (*not* mini.iso), for instance, contains such an
MBR, where none of the two partitions are marked bootable, but the ESP
has clearly type 0xef.
Now U-Boot cannot find the ESP on such a disk (USB flash drive) and
fails to load the EFI grub and thus the installer.

Since it all boils down to the distro bootcmds eventually calling
"part list -bootable" to find potential boot partitions, it seems logical
to just add this "partition type is 0xef" condition to the is_bootable()
implementation.

This allows the bog standard arm64 Debian-testing installer to boot from
an USB pen drive on Allwinner A64 boards (Pine64, BananaPi-M64).
(Ubuntu and other distribution installers don't have a legacy MBR, so
U-Boot falls back to El Torito there).

[1] 
https://cdimage.debian.org/cdimage/daily-builds/daily/arch-latest/arm64/iso-cd/
Signed-off-by: Andre Przywara 
---
 disk/part_dos.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/disk/part_dos.c b/disk/part_dos.c
index 7ede15e..7aff73d 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -44,7 +44,7 @@ static inline int is_extended(int part_type)
 
 static inline int is_bootable(dos_partition_t *p)
 {
-   return p->boot_ind == 0x80;
+   return (p->sys_ind == 0xef) || (p->boot_ind == 0x80);
 }
 
 static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,
-- 
2.9.0

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Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Alexander Graf

On 07/06/2017 11:14 AM, Andre Przywara wrote:

The UEFI spec allows an EFI system partition (ESP, with the bootloader or
kernel EFI apps on it) to reside on a disk using a "legacy" MBR
partitioning scheme.
But in contrast to actual legacy disks the ESP is not marked as
"bootable" using bit 7 in byte 0 of the legacy partition entry, but is
instead using partition *type* 0xef (in contrast to 0x0b or 0x0c for a
normal FAT partition). The EFI spec isn't 100% clear on this, but it even
seems to discourage the use of the bootable flag for ESPs.
Also it seems that some EFI implementations (EDK2?) even seem to ignore
partitions marked as bootable (probably since they believe they contain
legacy boot code).
The Debian installer [1] (*not* mini.iso), for instance, contains such an
MBR, where none of the two partitions are marked bootable, but the ESP
has clearly type 0xef.
Now U-Boot cannot find the ESP on such a disk (USB flash drive) and
fails to load the EFI grub and thus the installer.

Since it all boils down to the distro bootcmds eventually calling
"part list -bootable" to find potential boot partitions, it seems logical
to just add this "partition type is 0xef" condition to the is_bootable()
implementation.

This allows the bog standard arm64 Debian-testing installer to boot from
an USB pen drive on Allwinner A64 boards (Pine64, BananaPi-M64).
(Ubuntu and other distribution installers don't have a legacy MBR, so
U-Boot falls back to El Torito there).

[1] 
https://cdimage.debian.org/cdimage/daily-builds/daily/arch-latest/arm64/iso-cd/
Signed-off-by: Andre Przywara 


I think this change is perfectly reasonable, yes.

Reviewed-by: Alexander Graf 


Alex


---
  disk/part_dos.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/disk/part_dos.c b/disk/part_dos.c
index 7ede15e..7aff73d 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -44,7 +44,7 @@ static inline int is_extended(int part_type)
  
  static inline int is_bootable(dos_partition_t *p)

  {
-   return p->boot_ind == 0x80;
+   return (p->sys_ind == 0xef) || (p->boot_ind == 0x80);
  }
  
  static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,



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Re: [U-Boot] [PATCH v2 01/10] powerpc, 8xx: move immap.c in arch/powerpc/cpu/mpc8xx/

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:33 schrieb Christophe Leroy:

immap.c used to be common to several CPUs. It is now
only linked to the 8xx, so this patch moves it into
arch/powerpc/cpu/mpc8xx/

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/Kconfig | 2 --
  arch/powerpc/cpu/mpc8xx/Kconfig  | 9 +
  arch/powerpc/cpu/mpc8xx/Makefile | 1 +
  arch/powerpc/{lib => cpu/mpc8xx}/immap.c | 3 ---
  arch/powerpc/lib/Kconfig | 7 ---
  arch/powerpc/lib/Makefile| 1 -
  6 files changed, 10 insertions(+), 13 deletions(-)
  rename arch/powerpc/{lib => cpu/mpc8xx}/immap.c (99%)
  delete mode 100644 arch/powerpc/lib/Kconfig


Reviewed-by: Heiko Schocher 

bye,
Heiko


diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a7558d59b2..e9002a76ab 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -34,8 +34,6 @@ config 8xx

  endchoice

-source "arch/powerpc/lib/Kconfig"
-
  source "arch/powerpc/cpu/mpc83xx/Kconfig"
  source "arch/powerpc/cpu/mpc85xx/Kconfig"
  source "arch/powerpc/cpu/mpc86xx/Kconfig"
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index a425cba8aa..cb15dc5ebc 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -10,4 +10,13 @@ choice

  endchoice

+comment "Specific commands"
+
+config CMD_IMMAP
+   bool "Enable various commands to dump IMMR information"
+   help
+ This enables various commands such as:
+
+   siuinfo - print System Interface Unit (SIU) registers
+   memcinfo - print Memory Controller registers
  endmenu
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 5dd801d76e..eae02da636 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -11,6 +11,7 @@ obj-y += cpu.o
  obj-y += cpu_init.o
  obj-y += fec.o
  obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-$(CONFIG_CMD_IMMAP) += immap.o
  obj-y += interrupts.o
  obj-y += serial.o
  obj-y += speed.o
diff --git a/arch/powerpc/lib/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
similarity index 99%
rename from arch/powerpc/lib/immap.c
rename to arch/powerpc/cpu/mpc8xx/immap.c
index 1beed1fa40..5ff6aa5e3b 100644
--- a/arch/powerpc/lib/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -12,8 +12,6 @@
  #include 
  #include 

-#if defined(CONFIG_8xx)
-
  #include 
  #include 
  #include 
@@ -394,4 +392,3 @@ U_BOOT_CMD(
"print Baud Rate Generator (BRG) registers",
""
  );
-#endif
diff --git a/arch/powerpc/lib/Kconfig b/arch/powerpc/lib/Kconfig
deleted file mode 100644
index 7c8ea971c3..00
--- a/arch/powerpc/lib/Kconfig
+++ /dev/null
@@ -1,7 +0,0 @@
-config CMD_IMMAP
-   bool "Enable various commands to dump IMMR information"
-   help
- This enables various commands such as:
-
-   siuinfo - print System Interface Unit (SIU) registers
-   memcinfo - print Memory Controller registers
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 4aa41836a2..9a3043abf8 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -32,7 +32,6 @@ obj-$(CONFIG_BAT_RW) += bat_rw.o
  obj-$(CONFIG_CMD_BOOTM) += bootm.o
  obj-y += cache.o
  obj-y += extable.o
-obj-$(CONFIG_CMD_IMMAP) += immap.o
  obj-y += interrupts.o
  obj-$(CONFIG_CMD_KGDB) += kgdb.o
  obj-y += stack.o



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Re: [U-Boot] [PATCH v2 02/10] powerpc, 8xx: move specific reginfo

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:33 schrieb Christophe Leroy:

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/cpu/mpc8xx/Makefile   |  1 +
  {cmd => arch/powerpc/cpu/mpc8xx}/reginfo.c | 30 +
  cmd/reginfo.c  | 54 ++
  3 files changed, 4 insertions(+), 81 deletions(-)
  copy {cmd => arch/powerpc/cpu/mpc8xx}/reginfo.c (78%)


Reviewed-by: Heiko Schocher 

bye,
Heiko



diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index eae02da636..b5b4bfafb9 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -13,6 +13,7 @@ obj-y += fec.o
  obj-$(CONFIG_OF_LIBFDT) += fdt.o
  obj-$(CONFIG_CMD_IMMAP) += immap.o
  obj-y += interrupts.o
+obj-$(CONFIG_CMD_REGINFO) += reginfo.o
  obj-y += serial.o
  obj-y += speed.o
  obj-y += spi.o
diff --git a/cmd/reginfo.c b/arch/powerpc/cpu/mpc8xx/reginfo.c
similarity index 78%
copy from cmd/reginfo.c
copy to arch/powerpc/cpu/mpc8xx/reginfo.c
index 850f28cabc..b5a962431e 100644
--- a/cmd/reginfo.c
+++ b/arch/powerpc/cpu/mpc8xx/reginfo.c
@@ -6,19 +6,10 @@
   */

  #include 
-#include 
-#if defined(CONFIG_8xx)
  #include 
-#elif defined(CONFIG_MPC86xx)
-extern void mpc86xx_reginfo(void);
-#elif defined(CONFIG_MPC85xx)
-extern void mpc85xx_reginfo(void);
-#endif

-static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
-  char * const argv[])
+void mpc8xx_reginfo(void)
  {
-#if defined(CONFIG_8xx)
volatile immap_t *immap  = (immap_t *)CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
volatile sysconf8xx_t *sysconf = &immap->im_siu_conf;
@@ -70,23 +61,4 @@ static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
/*
 * May be some CPM info here?
 */
-
-#elif defined(CONFIG_MPC86xx)
-   mpc86xx_reginfo();
-
-#elif defined(CONFIG_MPC85xx)
-   mpc85xx_reginfo();
-#endif
-
-   return 0;
  }
-
- /**/
-
-#if defined(CONFIG_CMD_REGINFO)
-U_BOOT_CMD(
-   reginfo,2,  1,  do_reginfo,
-   "print register information",
-   ""
-);
-#endif
diff --git a/cmd/reginfo.c b/cmd/reginfo.c
index 850f28cabc..b364cc899a 100644
--- a/cmd/reginfo.c
+++ b/cmd/reginfo.c
@@ -8,7 +8,7 @@
  #include 
  #include 
  #if defined(CONFIG_8xx)
-#include 
+void mpc8xx_reginfo(void);
  #elif defined(CONFIG_MPC86xx)
  extern void mpc86xx_reginfo(void);
  #elif defined(CONFIG_MPC85xx)
@@ -19,57 +19,7 @@ static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
   char * const argv[])
  {
  #if defined(CONFIG_8xx)
-   volatile immap_t *immap  = (immap_t *)CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
-   volatile sysconf8xx_t *sysconf = &immap->im_siu_conf;
-   volatile sit8xx_t *timers = &immap->im_sit;
-
-   /* Hopefully more PowerPC  knowledgable people will add code to display
-* other useful registers
-*/
-
-   printf ("\nSystem Configuration registers\n"
-
-   "\tIMMR\t0x%08X\n", get_immr(0));
-
-   printf("\tSIUMCR\t0x%08X", sysconf->sc_siumcr);
-   printf("\tSYPCR\t0x%08X\n",sysconf->sc_sypcr);
-
-   printf("\tSWT\t0x%08X",sysconf->sc_swt);
-   printf("\tSWSR\t0x%04X\n", sysconf->sc_swsr);
-
-   printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",
-   sysconf->sc_sipend, sysconf->sc_simask);
-   printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",
-   sysconf->sc_siel, sysconf->sc_sivec);
-   printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
-   sysconf->sc_tesr, sysconf->sc_sdcr);
-
-   printf ("Memory Controller Registers\n"
-
-   "\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, 
memctl->memc_or0);
-   printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, 
memctl->memc_or1);
-   printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, 
memctl->memc_or2);
-   printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, 
memctl->memc_or3);
-   printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", memctl->memc_br4, 
memctl->memc_or4);
-   printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl->memc_br5, 
memctl->memc_or5);
-   printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl->memc_br6, 
memctl->memc_or6);
-   printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl->memc_br7, 
memctl->memc_or7);
-   printf ("\n"
-   "\tmamr\t0x%08X\tmbmr\t0x%08X \n",
-   memctl->memc_mamr, memctl->memc_mbmr );
-   printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n",
-   memctl->memc_mstat, memctl->memc_mptpr );
-   printf("\tmdr\t0x%08X \n", memctl->memc_mdr);
-
-   printf ("\nSystem Integration Timers\n"
-   "\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
-   timers->sit_tbscr, timers->sit_rtcsc);
-   printf("\tPISCR\t0x%08X \n", timers->sit_piscr);
-
-   /*
-* May be some CPM info 

Re: [U-Boot] [PATCH v2 03/10] powerpc, 8xx: Use IO accessors to access IO memory

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:33 schrieb Christophe Leroy:

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/cpu/mpc8xx/cpu.c|  58 +++---
  arch/powerpc/cpu/mpc8xx/cpu_init.c   |  98 --
  arch/powerpc/cpu/mpc8xx/fec.c| 262 +
  arch/powerpc/cpu/mpc8xx/immap.c  | 120 ++--
  arch/powerpc/cpu/mpc8xx/interrupts.c |  65 +++---
  arch/powerpc/cpu/mpc8xx/reginfo.c|  70 ---
  arch/powerpc/cpu/mpc8xx/serial.c | 182 -
  arch/powerpc/cpu/mpc8xx/speed.c  |   5 +-
  arch/powerpc/cpu/mpc8xx/spi.c| 166 +++-
  arch/powerpc/include/asm/iopin_8xx.h | 369 +++
  arch/powerpc/lib/time.c  |   7 +-
  include/watchdog.h   |   2 +-
  12 files changed, 739 insertions(+), 665 deletions(-)


Reviewed-by: Heiko Schocher 

bye,
Heiko



diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 80b9596813..28cc182957 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -41,7 +41,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
  {
char *id_str =
NULL;
-   volatile immap_t *immap = (immap_t *) (immr & 0x);
+   immap_t __iomem *immap = (immap_t __iomem *)(immr & 0x);
uint k, m;
char buf[32];
char pre = 'X';
@@ -54,7 +54,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
return -1;

k = (immr << 16) |
-   immap->im_cpm.cp_dparam16[PROFF_REVNUM / sizeof(u16)];
+   in_be16(&immap->im_cpm.cp_dparam16[PROFF_REVNUM / sizeof(u16)]);
m = 0;
suf = "";

@@ -95,10 +95,9 @@ static int check_CPU (long clock, uint pvr, uint immr)

/* do we have a FEC (860T/P or 852/859/866/885)? */

-   immap->im_cpm.cp_fec.fec_addr_low = 0x12345678;
-   if (immap->im_cpm.cp_fec.fec_addr_low == 0x12345678) {
+   out_be32(&immap->im_cpm.cp_fec.fec_addr_low, 0x12345678);
+   if (in_be32(&immap->im_cpm.cp_fec.fec_addr_low) == 0x12345678)
printf (" FEC present");
-   }

if (!m) {
puts (cpu_warning);
@@ -127,11 +126,11 @@ int checkcpu (void)

  int checkicache (void)
  {
-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   memctl8xx_t __iomem *memctl = &immap->im_memctl;
u32 cacheon = rd_ic_cst () & IDC_ENABLED;
-
-   u32 k = memctl->memc_br0 & ~0x7fff;  /* probe in flash memoryarea */
+   /* probe in flash memoryarea */
+   u32 k = in_be32(&memctl->memc_br0) & ~0x7fff;
u32 m;
u32 lines = -1;

@@ -168,11 +167,11 @@ int checkicache (void)

  int checkdcache (void)
  {
-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   memctl8xx_t __iomem *memctl = &immap->im_memctl;
u32 cacheon = rd_dc_cst () & IDC_ENABLED;
-
-   u32 k = memctl->memc_br0 & ~0x7fff;  /* probe in flash memoryarea */
+   /* probe in flash memoryarea */
+   u32 k = in_be32(&memctl->memc_br0) & ~0x7fff;
u32 m;
u32 lines = -1;

@@ -204,12 +203,12 @@ void upmconfig (uint upm, uint * table, uint size)
  {
uint i;
uint addr = 0;
-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-   volatile memctl8xx_t *memctl = &immap->im_memctl;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   memctl8xx_t __iomem *memctl = &immap->im_memctl;

for (i = 0; i < size; i++) {
-   memctl->memc_mdr = table[i]; /* (16-15) */
-   memctl->memc_mcr = addr | upm;   /* (16-16) */
+   out_be32(&memctl->memc_mdr, table[i]);   /* (16-15) */
+   out_be32(&memctl->memc_mcr, addr | upm); /* (16-16) */
addr++;
}
  }
@@ -220,9 +219,10 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
  {
ulong msr, addr;

-   volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+   immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;

-   immap->im_clkrst.car_plprcr |= PLPRCR_CSR;   /* Checkstop Reset enable 
*/
+   /* Checkstop Reset enable */
+   setbits_be32(&immap->im_clkrst.car_plprcr, PLPRCR_CSR);

/* Interrupts and MMU off */
__asm__ volatile ("mtspr81, 0");
@@ -260,14 +260,13 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
  unsigned long get_tbclk (void)
  {
uint immr = get_immr (0);   /* Return full IMMR contents */
-   volatile immap_t *immap = (volatile immap_t *)(immr & 0x);
+   immap_t __iomem *immap = (immap_t __iomem *)(immr & 0x);
ulon

Re: [U-Boot] [PATCH v2 04/10] powerpc, 8xx: Implement GLL2 ERRATA

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:33 schrieb Christophe Leroy:

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/cpu/mpc8xx/cpu_init.c | 8 
  1 file changed, 8 insertions(+)


Reviewed-by: Heiko Schocher 

nitpick only


diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index cf1280983a..52406e8483 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -51,6 +51,14 @@ void cpu_init_f(immap_t __iomem *immr)
clrsetbits_be32(&immr->im_clkrst.car_sccr, ~SCCR_MASK,
CONFIG_SYS_SCCR);

+   /* BUG MPC866 GLL2 consideration */
+   reg = in_be32(&immr->im_clkrst.car_sccr);
+   /* probably we use the mode 1:2:1 */
+   if ((reg & 0x0006) == 0x0002) {
+   clrbits_be32(&immr->im_clkrst.car_sccr, 0x0006);
+   setbits_be32(&immr->im_clkrst.car_sccr, 0x0002);


You may can introduce defines for the magic values here.


+   }
+
/* PLL (CPU clock) settings (15-30) */

out_be32(&immr->im_clkrstk.cark_plprcrk, KAPWR_KEY);



bye,
Heiko
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Re: [U-Boot] [PATCH v2 05/10] powerpc, 8xx: Handle checkpatch errors and some of the warnings/checks

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:33 schrieb Christophe Leroy:

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/cpu/mpc8xx/cpu.c| 123 ++-
  arch/powerpc/cpu/mpc8xx/cpu_init.c   |   6 +-
  arch/powerpc/cpu/mpc8xx/fdt.c|   8 +--
  arch/powerpc/cpu/mpc8xx/fec.c|  81 +++
  arch/powerpc/cpu/mpc8xx/immap.c  | 108 ++
  arch/powerpc/cpu/mpc8xx/interrupts.c |  56 +++-
  arch/powerpc/cpu/mpc8xx/reginfo.c|   2 +-
  arch/powerpc/cpu/mpc8xx/serial.c |  42 +---
  arch/powerpc/cpu/mpc8xx/speed.c  |  34 +-
  arch/powerpc/cpu/mpc8xx/spi.c|  43 +---
  arch/powerpc/cpu/mpc8xx/traps.c  |  37 +--
  arch/powerpc/include/asm/iopin_8xx.h |  72 +++-
  include/commproc.h   |  12 ++--
  13 files changed, 283 insertions(+), 341 deletions(-)


Reviewed-by: Heiko Schocher 

bye,
Heiko


diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 28cc182957..5cfc8c189c 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
  static char *cpu_warning = "\n " \
"*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***";

-static int check_CPU (long clock, uint pvr, uint immr)
+static int check_CPU(long clock, uint pvr, uint immr)
  {
char *id_str =
NULL;
@@ -73,22 +73,25 @@ static int check_CPU (long clock, uint pvr, uint immr)
id_str =
"PC866x"; /* Unknown chip from MPC866 family */
break;
-   case 0x0900: pre = 'M'; mid = suf = ""; m = 1;
+   case 0x0900:
+   pre = 'M'; mid = suf = ""; m = 1;
if (id_str == NULL)
id_str = "PC885"; /* 870/875/880/885 */
break;

-   default: suf = NULL; break;
+   default:
+   suf = NULL;
+   break;
}

if (id_str == NULL)
id_str = "PC86x"; /* Unknown 86x chip */
if (suf)
-   printf ("%c%s%sZPnn%s", pre, id_str, mid, suf);
+   printf("%c%s%sZPnn%s", pre, id_str, mid, suf);
else
-   printf ("unknown M%s (0x%08x)", id_str, k);
+   printf("unknown M%s (0x%08x)", id_str, k);

-   printf (" at %s MHz: ", strmhz (buf, clock));
+   printf(" at %s MHz: ", strmhz(buf, clock));

print_size(checkicache(), " I-Cache ");
print_size(checkdcache(), " D-Cache");
@@ -97,64 +100,63 @@ static int check_CPU (long clock, uint pvr, uint immr)

out_be32(&immap->im_cpm.cp_fec.fec_addr_low, 0x12345678);
if (in_be32(&immap->im_cpm.cp_fec.fec_addr_low) == 0x12345678)
-   printf (" FEC present");
+   printf(" FEC present");

-   if (!m) {
-   puts (cpu_warning);
-   }
+   if (!m)
+   puts(cpu_warning);

-   putc ('\n');
+   putc('\n');

return 0;
  }

  /* - 
*/

-int checkcpu (void)
+int checkcpu(void)
  {
ulong clock = gd->cpu_clk;
-   uint immr = get_immr (0);   /* Return full IMMR contents */
-   uint pvr = get_pvr ();
+   uint immr = get_immr(0);/* Return full IMMR contents */
+   uint pvr = get_pvr();

-   puts ("CPU:   ");
+   puts("CPU:   ");

-   return check_CPU (clock, pvr, immr);
+   return check_CPU(clock, pvr, immr);
  }

  /* - 
*/
  /* L1 i-cache
*/

-int checkicache (void)
+int checkicache(void)
  {
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
memctl8xx_t __iomem *memctl = &immap->im_memctl;
-   u32 cacheon = rd_ic_cst () & IDC_ENABLED;
+   u32 cacheon = rd_ic_cst() & IDC_ENABLED;
/* probe in flash memoryarea */
u32 k = in_be32(&memctl->memc_br0) & ~0x7fff;
u32 m;
u32 lines = -1;

-   wr_ic_cst (IDC_UNALL);
-   wr_ic_cst (IDC_INVALL);
-   wr_ic_cst (IDC_DISABLE);
+   wr_ic_cst(IDC_UNALL);
+   wr_ic_cst(IDC_INVALL);
+   wr_ic_cst(IDC_DISABLE);
__asm__ volatile ("isync");

-   while (!((m = rd_ic_cst ()) & IDC_CERR2)) {
-   wr_ic_adr (k);
-   wr_ic_cst (IDC_LDLCK);
+   while (!((m = rd_ic_cst()) & IDC_CERR2)) {
+   wr_ic_adr(k);
+   wr_ic_cst(IDC_LDLCK);
__asm__ volatile ("isync");

lines++;
-   k += 0x10;  /* the number of bytes 
in a cacheline */
+   k += 0x10;  /* the number of bytes in a cacheline */
}

-   wr_ic_cst (IDC_UNALL);
-   wr_ic_cst (IDC_INVALL);
+   wr_ic_cst(IDC_U

Re: [U-Boot] [PATCH v2 3/3] x86: Add Intel Edison board files

2017-07-06 Thread Andy Shevchenko
On Thu, 2017-07-06 at 12:07 +0800, Bin Meng wrote:
> Hi Andy,
> 
> On Thu, Jul 6, 2017 at 4:56 AM, Andy Shevchenko
>  wrote:
> > Add Intel Edison board which is using U-Boot.
> 

Thanks for review, my answers below.

> Thank you for your efforts to bring edition support upstream! Looks
> quite clean. A few comments below.

I hope to see it soon there!

> > +config SYS_USB_OTG_BASE
> > +   hex
> > +   default 0xf910
> 
> Can this otg controller be put into device tree, like other
> peripherals?

I will check the possibility.


> > diff --git a/board/intel/edison/edison_start.S
> > b/board/intel/edison/edison_start.S
> 
> This file should be renamed to just start.S

Done.

> > +U-boot is a main bootloader on Intel Edison board.
> 
> U-Boot

Fixed.

> Are there instructions on how to program U-Boot on a board that does
> not have pre-flashed U-Boot? or in a situation that users flashed a
> bad image that makes the board brick.

We assume that board is supplied with official image. There is official
documentation how to "unbrick" board to the stock state. So, I consider
it out of scope of U-Boot documentation.

> > +/*-
> > --
> 
> nits: /* Boot */

Fixed (all cases).

-- 
Andy Shevchenko 
Intel Finland Oy
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Re: [U-Boot] [PATCH v2 06/10] powerpc, 8xx: Properly set CPM frequency in the device tree

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:33 schrieb Christophe Leroy:

For processors whose core runs at twice the bus frequency,
the fallback frequency calculation in Linux provides a wrong
result. Therefore, U-boot needs to pass the correct value.

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/cpu/mpc8xx/fdt.c | 2 ++
  1 file changed, 2 insertions(+)


Reviewed-by: Heiko Schocher 

bye,
Heiko


diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index 88ee1c502c..f9b74ded5a 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -20,6 +20,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 "bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 "clock-frequency", bd->bi_intfreq, 1);
+   do_fixup_by_compat_u32(blob, "fsl,pq1-soc", "clock-frequency",
+  bd->bi_intfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
   gd->arch.brg_clk, 1);




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Re: [U-Boot] [PATCH v2 07/10] powerpc, 8xx: Migrate to Kconfig

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:33 schrieb Christophe Leroy:

Signed-off-by: Christophe Leroy 
---
  README |  15 
  arch/powerpc/cpu/mpc8xx/Kconfig| 148 +
  arch/powerpc/cpu/mpc8xx/cpu_init.c |   2 +-
  arch/powerpc/cpu/mpc8xx/fec.c  |   8 +-
  arch/powerpc/include/asm/ppc.h |   5 --
  drivers/i2c/soft_i2c.c |   2 +-
  scripts/config_whitelist.txt   |  11 ---
  7 files changed, 154 insertions(+), 37 deletions(-)


Reviewed-by: Heiko Schocher 

bye,
Heiko


diff --git a/README b/README
index c3ab481a56..030a452f9a 100644
--- a/README
+++ b/README
@@ -328,9 +328,6 @@ The following options need to be configured:
  multiple fs option at one time
  for marvell soc family

-- 8xx CPU Options: (if using an MPC8xx CPU)
-   CONFIG_8xx_GCLK_FREQ- CPU clock
-
  - 85xx CPU Options:
CONFIG_SYS_PPC64

@@ -3993,16 +3990,6 @@ Low Level (hardware related) configuration options:
point to an otherwise UNUSED address space between
the top of RAM and the start of the PCI space.

-- CONFIG_SYS_SIUMCR:   SIU Module Configuration (11-6)
-
-- CONFIG_SYS_SYPCR:System Protection Control (11-9)
-
-- CONFIG_SYS_TBSCR:Time Base Status and Control (11-26)
-
-- CONFIG_SYS_PISCR:Periodic Interrupt Status and Control (11-31)
-
-- CONFIG_SYS_PLPRCR:   PLL, Low-Power, and Reset Control Register (15-30)
-
  - CONFIG_SYS_SCCR:System Clock and reset Control Register (15-27)

  - CONFIG_SYS_OR_TIMING_SDRAM:
@@ -4011,8 +3998,6 @@ Low Level (hardware related) configuration options:
  - CONFIG_SYS_MAMR_PTA:
periodic timer for refresh

-- CONFIG_SYS_DER:  Debug Event Register (37-47)
-
  - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, 
CONFIG_SYS_OR1_PRELIM,
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index cb15dc5ebc..9e1ad33c28 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -10,6 +10,21 @@ choice

  endchoice

+choice
+   prompt "CPU select"
+   default MPC866
+
+config MPC866
+   bool "MPC866"
+
+config MPC885
+   bool "MPC885"
+
+endchoice
+
+config 8xx_GCLK_FREQ
+   int "CPU GCLK Frequency"
+
  comment "Specific commands"

  config CMD_IMMAP
@@ -19,4 +34,137 @@ config CMD_IMMAP

siuinfo - print System Interface Unit (SIU) registers
memcinfo - print Memory Controller registers
+
+comment "Configuration Registers"
+
+config SYS_SIUMCR
+   hex "SIUMCR register"
+   help
+ SIU Module Configuration (11-6)
+
+config SYS_SYPCR
+   hex "SYPCR register"
+   help
+ System Protection Control (11-9)
+
+config SYS_TBSCR
+   hex "TBSCR register"
+   help
+ Time Base Status and Control (11-26)
+
+config SYS_PISCR
+   hex "PISCR register"
+   help
+ Periodic Interrupt Status and Control (11-31)
+
+config SYS_PLPRCR_BOOL
+   bool "Customise PLPRCR"
+
+config SYS_PLPRCR
+   hex "PLPRCR register"
+   depends on SYS_PLPRCR_BOOL
+   help
+ PLL, Low-Power, and Reset Control Register (15-30)
+
+config SYS_SCCR
+   hex "SCCR register"
+   help
+ System Clock and reset Control Register (15-27)
+
+config SYS_SCCR_MASK
+   hex "MASK for setting SCCR register"
+
+config SYS_DER
+   hex "DER register"
+   help
+ Debug Event Register (37-47)
+
+comment "Memory mapping"
+
+config SYS_BR0_PRELIM
+   hex "Preliminary value for BR0"
+
+config SYS_OR0_PRELIM
+   hex "Preliminary value for OR0"
+
+config SYS_BR1_PRELIM_BOOL
+   bool "Define Bank 1"
+
+config SYS_BR1_PRELIM
+   hex "Preliminary value for BR1"
+   depends on SYS_BR1_PRELIM_BOOL
+
+config SYS_OR1_PRELIM
+   hex "Preliminary value for OR1"
+   depends on SYS_BR1_PRELIM_BOOL
+
+config SYS_BR2_PRELIM_BOOL
+   bool "Define Bank 2"
+
+config SYS_BR2_PRELIM
+   hex "Preliminary value for BR2"
+   depends on SYS_BR2_PRELIM_BOOL
+
+config SYS_OR2_PRELIM
+   hex "Preliminary value for OR2"
+   depends on SYS_BR2_PRELIM_BOOL
+
+config SYS_BR3_PRELIM_BOOL
+   bool "Define Bank 3"
+
+config SYS_BR3_PRELIM
+   hex "Preliminary value for BR3"
+   depends on SYS_BR3_PRELIM_BOOL
+
+config SYS_OR3_PRELIM
+   hex "Preliminary value for OR3"
+   depends on SYS_BR3_PRELIM_BOOL
+
+config SYS_BR4_PRELIM_BOOL
+   bool "Define Bank 4"
+
+config SYS_BR4_PRELIM
+   hex "Preliminary value for BR4"
+   depends on SYS_BR4_PRELIM_BOOL
+
+config SYS_OR4_PRELIM
+   hex "Preliminary value for OR4"
+   depends on SYS_BR4_PRELIM_BOOL
+
+config SYS_BR5_PRELIM_BOOL
+   bool "Defi

Re: [U-Boot] [linux-sunxi] [PATCH 3/4] sunxi: add stub EMAC device node in A83T device tree

2017-07-06 Thread Andre Przywara
Hi,

On 02/07/17 08:02, Icenowy Zheng wrote:
> The Allwinner A83T SoC has an EMAC which is already supported by
> sun8i_emac driver in U-Boot now.
> 
> Add a stub device node for it.
> 
> The device node cannot work for Linux, because it now lacks the proper
> clock definition; however, it can satisfy sun8i_emac driver in U-Boot.

if you rebase your series on top of mine [1], you should be able to
directly use mainline Linux DT nodes, namely ...

> 
> Signed-off-by: Icenowy Zheng 
> ---
>  arch/arm/dts/sun8i-a83t.dtsi | 25 +
>  1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
> index 0fe73e173f..9aac3a7929 100644
> --- a/arch/arm/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/dts/sun8i-a83t.dtsi
> @@ -52,6 +52,10 @@
>  / {
>   interrupt-parent = <&gic>;
>  
> + aliases {
> + ethernet0 = &emac;
> + };
> +
>   cpus {
>   #address-cells = <1>;
>   #size-cells = <0>;
> @@ -166,6 +170,17 @@
>   #interrupt-cells = <3>;
>   #gpio-cells = <3>;
>  
> + emac_rgmii_pins: emac-rgmii {
> + allwinner,pins = "PD2", "PD3", "PD4", "PD5",
> + "PD6", "PD7", "PD11",
> + "PD12", "PD13", "PD14",
> + "PD18", "PD19", "PD21",
> + "PD22", "PD23";
> + allwinner,function = "emac";
> + allwinner,drive = ;
> + allwinner,pull = ;

... using the new generic pinctrl bindings here ...

> + };
> +
>   mmc0_pins_a: mmc0@0 {
>   allwinner,pins = "PF0", "PF1", "PF2",
>"PF3", "PF4", "PF5";
> @@ -214,6 +229,16 @@
>   status = "disabled";
>   };
>  
> + emac: ethernet@1c3 {
> + compatible = "allwinner,sun8i-a83t-emac";
> + reg = <0x01c3 0x104>, <0x01c00030 0x4>;
> + reg-names = "emac", "syscon";
> + interrupts = ;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";

... and using the new binding scheme here, with a "syscon" property, for
instance.

Also the Linux binding requires an mdio child node, which should be
introduced here.

Cheers,
Andre.


> + };
> +
>   gic: interrupt-controller@01c81000 {
>   compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
>   reg = <0x01c81000 0x1000>,
> 
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Re: [U-Boot] [PATCH v2] powerpc, 8xx: Add support for MCR3000 board from CSSI

2017-07-06 Thread Heiko Schocher

Hello Christophe,

Am 06.07.2017 um 10:39 schrieb Christophe Leroy:

CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.

This patch adds support for the first board.

Signed-off-by: Christophe Leroy 
---
  Applies after the v2 serie 'powerpc, 8xx: Modernise the 8xx'

  .travis.yml |   2 +
  arch/powerpc/cpu/mpc8xx/Kconfig |   5 +
  board/cssi/MAINTAINERS  |   6 +
  board/cssi/MCR3000/Kconfig  |  15 ++
  board/cssi/MCR3000/MCR3000.c| 316 
  board/cssi/MCR3000/Makefile |  10 ++
  board/cssi/MCR3000/nand.c   |  65 +
  board/cssi/MCR3000/u-boot.lds   |  91 
  configs/MCR3000_defconfig   |  81 ++
  drivers/net/mpc8xx_fec.c|  20 +++
  include/configs/MCR3000.h   | 240 ++
  11 files changed, 851 insertions(+)
  create mode 100644 board/cssi/MAINTAINERS
  create mode 100644 board/cssi/MCR3000/Kconfig
  create mode 100644 board/cssi/MCR3000/MCR3000.c
  create mode 100644 board/cssi/MCR3000/Makefile
  create mode 100644 board/cssi/MCR3000/nand.c
  create mode 100644 board/cssi/MCR3000/u-boot.lds
  create mode 100644 configs/MCR3000_defconfig
  create mode 100644 include/configs/MCR3000.h


Reviewed-by: Heiko Schocher 

nitpicks only:


diff --git a/.travis.yml b/.travis.yml
index 6f14ec2396..226c8313b1 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -210,6 +210,8 @@ matrix:
  - env:
  - BUILDMAN="mpc86xx"
  - env:
+- BUILDMAN="mpc8xx"
+- env:
  - BUILDMAN="siemens"
  - env:
  - BUILDMAN="tegra"


Can you give us a link, where you tried it on travis ?

[...]

diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
new file mode 100644
index 00..a84633a669
--- /dev/null
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -0,0 +1,316 @@
+/*
+ * Copyright (C) 2010-2017 CS Systemes d'Information
+ * Florent Trinh Thai 
+ * Christophe Leroy 
+ *
+ * Board specific routines for the MCR3000 board
+ *
+ * - initialisation
+ * - memory controller
+ * - serial io initialisation
+ * - ethernet io initialisation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+#include 
+#endif
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+
+/* -
+ * constant
+ */
+static const uint cs1_dram_table_66[] = {
+   /* DRAM - single read. (offset 0 in upm RAM) */
+   0x0F3DFC04, 0x0FEFBC04, 0x00BE7804, 0x0FFDF400,
+   0x1C05, 0x, 0x, 0x,
+
+   /* DRAM - burst read. (offset 8 in upm RAM) */
+   0x0F3DFC04, 0x0FEFBC04, 0x00BF7C04, 0x00FFFC00,
+   0x00FFFC00, 0x00FEF800, 0x0FFDF400, 0x1C05,
+   0x, 0x, 0x, 0x,
+   0x, 0x, 0x, 0x,
+
+   /* DRAM - single write. (offset 18 in upm RAM) */
+   0x0F3DFC04, 0x0FEFB800, 0x00BF7404, 0x0FFEF804,
+   0x0FFDF404, 0x1C05, 0x, 0x,
+
+   /* DRAM - burst write. (offset 20 in upm RAM) */
+   0x0F3DFC04, 0x0FEFB800, 0x00BF7400, 0x00FFFC00,
+   0x00FFFC00, 0x00FFFC04, 0x0FFEF804, 0x0FFDF404,
+   0x1C05, 0x, 0x, 0x,
+   0x, 0x, 0x, 0x,
+
+   /* refresh  (offset 30 in upm RAM) */
+   0x0FFDF404, 0x0FFEBC04, 0x0FFD7C84, 0x0C04,
+   0x0C04, 0x0C04, 0x1C85, 0x,
+
+   /* init */
+   0x0FEEB874, 0x0FBD7474, 0x1C45, 0x,
+
+   /* exception. (offset 3c in upm RAM) */
+   0xFC05, 0x, 0x, 0x,
+};
+
+/* -
+ * Device Tree Support
+ */
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+static int fdt_set_node_and_value(void *blob, char *nodename, char *regname,
+ void *var, int size)
+{


May we move this function to a common place, as I think others can
reuse it also?


+   int ret = 0;
+   int nodeoffset = 0;
+
+   nodeoffset = fdt_path_offset(blob, nodename);
+   if (nodeoffset >= 0) {
+   ret = fdt_setprop(blob, nodeoffset, regname, var, size);
+   if (ret < 0)
+   printf("ft_blob_update(): cannot set %s/%s property; err: 
%s\n",


wrong text "ft_blob_update()" the functions name is fdt_set_node_and_value().


+  nodename, regname, fdt_strerror(ret));
+   } else {
+   printf("ft_blob_update(): cannot find %s node err:%s\n",
+  nodename, fdt_strerror(nodeoffset));
+   }
+   return ret;
+}
+
+/*
+ * update "brg" property in the blob
+ */
+static void ft_blob_update(void *blob, bd_t *bd)
+{
+   

Re: [U-Boot] [linux-sunxi] [PATCH 4/4] sunxi: enable EMAC for Banana Pi M3 board

2017-07-06 Thread Andre Przywara
Hi,

when using the new binding support [1] (this time the link is for real
;-), you could/should adjust the binding to be Linux compatible:

On 02/07/17 08:02, Icenowy Zheng wrote:
> Banana Pi M3 board comes with the A83T EMAC connected to a Realtek
> RTL8211E PHY, with a TX delay of 600ps.
> 
> Add the necessary DT parts and enable sun8i_emac in the defconfig.
> 
> Signed-off-by: Icenowy Zheng 
> ---
>  arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts | 13 +
>  configs/Sinovoip_BPI_M3_defconfig   |  1 +
>  2 files changed, 14 insertions(+)
> 
> diff --git a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts 
> b/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
> index dfc16a0272..8e74227ad6 100644
> --- a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
> +++ b/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
> @@ -61,6 +61,19 @@
>   status = "okay";
>  };
>  
> +&emac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_rgmii_pins>;
> + phy-mode = "rgmii";
> + phy = <&phy1>;

This is called phy-handle in Linux.

> + allwinner,tx-delay-ps = <600>;
> + status = "okay";
> +
> + phy1: ethernet-phy@1 {
> + reg = <1>;
> + };

This should be a child of the mdio node.

Cheers,
Andre.

[1] https://lists.denx.de/pipermail/u-boot/2017-July/296929.html

> +};
> +

>  &uart0 {
>   pinctrl-names = "default";
>   pinctrl-0 = <&uart0_pins_b>;
> diff --git a/configs/Sinovoip_BPI_M3_defconfig 
> b/configs/Sinovoip_BPI_M3_defconfig
> index 45eadcb443..ff068900a5 100644
> --- a/configs/Sinovoip_BPI_M3_defconfig
> +++ b/configs/Sinovoip_BPI_M3_defconfig
> @@ -22,6 +22,7 @@ CONFIG_SPL=y
>  # CONFIG_SPL_DOS_PARTITION is not set
>  # CONFIG_SPL_ISO_PARTITION is not set
>  # CONFIG_SPL_EFI_PARTITION is not set
> +CONFIG_SUN8I_EMAC=y
>  CONFIG_AXP_DCDC5_VOLT=1200
>  CONFIG_AXP_DLDO3_VOLT=2500
>  CONFIG_AXP_SW_ON=y
> 
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Re: [U-Boot] [PATCH v2 04/10] powerpc, 8xx: Implement GLL2 ERRATA

2017-07-06 Thread Wolfgang Denk
Dear Christophe,

In message 
<466a431b5430548a018c21222080ed4040596147.1499329461.git.christophe.le...@c-s.fr>
 you wrote:
> Signed-off-by: Christophe Leroy 
> ---
>  arch/powerpc/cpu/mpc8xx/cpu_init.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
> b/arch/powerpc/cpu/mpc8xx/cpu_init.c
> index cf1280983a..52406e8483 100644
> --- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
> +++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
> @@ -51,6 +51,14 @@ void cpu_init_f(immap_t __iomem *immr)
>   clrsetbits_be32(&immr->im_clkrst.car_sccr, ~SCCR_MASK,
>   CONFIG_SYS_SCCR);
>  
> + /* BUG MPC866 GLL2 consideration */
> + reg = in_be32(&immr->im_clkrst.car_sccr);
> + /* probably we use the mode 1:2:1 */
> + if ((reg & 0x0006) == 0x0002) {
> + clrbits_be32(&immr->im_clkrst.car_sccr, 0x0006);
> + setbits_be32(&immr->im_clkrst.car_sccr, 0x0002);
> + }

Like a few lines above, you could/should use a single call to
clrsetbits_be32() here.  And as Heiko already commented, please use
readable names istead of the magic numbers.

Reviewed-by: Wolfgang Denk 


Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH v2] powerpc, 8xx: Add support for MCR3000 board from CSSI

2017-07-06 Thread Wolfgang Denk
Dear Christophe,

In message <20170706083955.0d92f69...@pc13941vm.idsi0.si.c-s.fr> you wrote:
> 
> This patch adds support for the first board.
...

> diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds
> new file mode 100644
> index 00..2234bd8d1d
> --- /dev/null
> +++ b/board/cssi/MCR3000/u-boot.lds
...
> +OUTPUT_ARCH(powerpc)
> +SECTIONS
> +{
> +  /* Read-only sections, merged into text segment: */
> +  . = + SIZEOF_HEADERS;
> +  .text  :
> +  {
...

Like with C code, TABs should be used for indentation.


...
> diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
> new file mode 100644
> index 00..53d4e9468a
> --- /dev/null
> +++ b/include/configs/MCR3000.h
...
> +#define CONFIG_IPADDR192.168.0.3
> +#define CONFIG_SERVERIP  192.168.0.1
> +#define CONFIG_NETMASK   255.0.0.0

Static network configuration in board config files is strongly
discouraged.  Please remove.

> +#define CONFIG_SYS_BAUDRATE_TABLE{9600, 19200, 38400, 57600, 115200}

Can you not use the standard baudrate table?


> +/*---
> + * Physical memory map of the MCR3000 board
> + */

Nitpick: illegal multiline comment style.  Please fix globally.


Reviewed-by: Wolfgang Denk 

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH v2 04/10] powerpc, 8xx: Implement GLL2 ERRATA

2017-07-06 Thread Christophe LEROY



Le 06/07/2017 à 12:56, Wolfgang Denk a écrit :

Dear Christophe,

In message 
<466a431b5430548a018c21222080ed4040596147.1499329461.git.christophe.le...@c-s.fr>
 you wrote:

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/cpu/mpc8xx/cpu_init.c | 8 
  1 file changed, 8 insertions(+)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index cf1280983a..52406e8483 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -51,6 +51,14 @@ void cpu_init_f(immap_t __iomem *immr)
clrsetbits_be32(&immr->im_clkrst.car_sccr, ~SCCR_MASK,
CONFIG_SYS_SCCR);
  
+	/* BUG MPC866 GLL2 consideration */

+   reg = in_be32(&immr->im_clkrst.car_sccr);
+   /* probably we use the mode 1:2:1 */
+   if ((reg & 0x0006) == 0x0002) {
+   clrbits_be32(&immr->im_clkrst.car_sccr, 0x0006);
+   setbits_be32(&immr->im_clkrst.car_sccr, 0x0002);
+   }


Like a few lines above, you could/should use a single call to
clrsetbits_be32() here.  And as Heiko already commented, please use
readable names istead of the magic numbers.


I shall not use clrsetbits_be32(), because the ERRATA says:

Program the PLPRCR such that the PLL clock will change, then reprogram 
the PLPRCR value back to the desired value


Christophe



Reviewed-by: Wolfgang Denk 


Best regards,

Wolfgang Denk


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Re: [U-Boot] [PATCH v2 04/10] powerpc, 8xx: Implement GLL2 ERRATA

2017-07-06 Thread Christophe LEROY

Oops, I copied wrong alternative of the ERRATA. Correct one this time.

Le 06/07/2017 à 13:12, Christophe LEROY a écrit :



Le 06/07/2017 à 12:56, Wolfgang Denk a écrit :

Dear Christophe,

In message 
<466a431b5430548a018c21222080ed4040596147.1499329461.git.christophe.le...@c-s.fr> 
you wrote:

Signed-off-by: Christophe Leroy 
---
  arch/powerpc/cpu/mpc8xx/cpu_init.c | 8 
  1 file changed, 8 insertions(+)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c

index cf1280983a..52406e8483 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -51,6 +51,14 @@ void cpu_init_f(immap_t __iomem *immr)
  clrsetbits_be32(&immr->im_clkrst.car_sccr, ~SCCR_MASK,
  CONFIG_SYS_SCCR);
  +/* BUG MPC866 GLL2 consideration */
+reg = in_be32(&immr->im_clkrst.car_sccr);
+/* probably we use the mode 1:2:1 */
+if ((reg & 0x0006) == 0x0002) {
+clrbits_be32(&immr->im_clkrst.car_sccr, 0x0006);
+setbits_be32(&immr->im_clkrst.car_sccr, 0x0002);
+}


Like a few lines above, you could/should use a single call to
clrsetbits_be32() here.  And as Heiko already commented, please use
readable names istead of the magic numbers.


I shall not use clrsetbits_be32(), because the ERRATA says:


The ERRATA says:
Reprogram the SCCR:
1.   Write 1'b00 to SCCR[EBDF].
2.   Write 1'b01 to SCCR[EBDF].
3.   Rewrite the desired value to the PLPRCR register

Christophe



Program the PLPRCR such that the PLL clock will change, then reprogram 
the PLPRCR value back to the desired value


Christophe



Reviewed-by: Wolfgang Denk 


Best regards,

Wolfgang Denk


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Re: [U-Boot] [PATCH v2 04/10] powerpc, 8xx: Implement GLL2 ERRATA

2017-07-06 Thread Wolfgang Denk
Dear Christophe,

In message <1e6c1b5c-2e49-6784-6d6d-f4532aa20...@c-s.fr> you wrote:
> 
> > Like a few lines above, you could/should use a single call to
> > clrsetbits_be32() here.  And as Heiko already commented, please use
> > readable names istead of the magic numbers.
> 
> I shall not use clrsetbits_be32(), because the ERRATA says:
> 
> Program the PLPRCR such that the PLL clock will change, then reprogram 
> the PLPRCR value back to the desired value

Ah! This is critical information, so please add a comment to explain
this.  [Otherwise there is the risk some later "optimization" intro-
duces a bug.]

Best regards,

Wolfgang Denk

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out to warm the air in raw inclement summers.- Jonathan Swift
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Re: [U-Boot] [PATCH v2 3/3] x86: Add Intel Edison board files

2017-07-06 Thread Andy Shevchenko
On Thu, 2017-07-06 at 12:44 +0300, Andy Shevchenko wrote:
> On Thu, 2017-07-06 at 12:07 +0800, Bin Meng wrote:
> > Hi Andy,
> > 
> > On Thu, Jul 6, 2017 at 4:56 AM, Andy Shevchenko
> >  wrote:
> > > Add Intel Edison board which is using U-Boot.

> > > +config SYS_USB_OTG_BASE
> > > +   hex
> > > +   default 0xf910
> > 
> > Can this otg controller be put into device tree, like other
> > peripherals?
> 
> I will check the possibility.

Is it show stopper? To keep things simpler it would be better to keep
board initialization in place and move forward later.

Felipe, what is your opinion on the topic?

-- 
Andy Shevchenko 
Intel Finland Oy
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Re: [U-Boot] [PATCH v2 3/3] x86: Add Intel Edison board files

2017-07-06 Thread Felipe Balbi

Hi,

Andy Shevchenko  writes:
> On Thu, 2017-07-06 at 12:44 +0300, Andy Shevchenko wrote:
>> On Thu, 2017-07-06 at 12:07 +0800, Bin Meng wrote:
>> > Hi Andy,
>> > 
>> > On Thu, Jul 6, 2017 at 4:56 AM, Andy Shevchenko
>> >  wrote:
>> > > Add Intel Edison board which is using U-Boot.
>
>> > > +config SYS_USB_OTG_BASE
>> > > +   hex
>> > > +   default 0xf910
>> > 
>> > Can this otg controller be put into device tree, like other
>> > peripherals?
>> 
>> I will check the possibility.
>
> Is it show stopper? To keep things simpler it would be better to keep
> board initialization in place and move forward later.
>
> Felipe, what is your opinion on the topic?

IIRC, there are some folks working on moving DWC3 to DM. Frankly, I
would rather not wait for the conversion before merging Edison's
board-file. After the driver is switched to DM, adding another node on
DT isn't really a lot of work by any stretch of the imagination.

-- 
balbi


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[U-Boot] [PATCH] tools/env: fix allocation of the lock file name in fw_printenv

2017-07-06 Thread sgerwk
sizeof(env_opts.lockname) is the size of the pointer, not of
the string; this patch changes it to strlen(...)

---
 tools/env/fw_env_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c
index b8bff264eb..499953dd69 100644
--- a/tools/env/fw_env_main.c
+++ b/tools/env/fw_env_main.c
@@ -245,7 +245,7 @@ int main(int argc, char *argv[])
argv += optind;
 
if (env_opts.lockname) {
-   lockname = malloc(sizeof(env_opts.lockname) +
+   lockname = malloc(strlen(env_opts.lockname) +
sizeof(CMD_PRINTENV) + 10);
if (!lockname) {
fprintf(stderr, "Unable allocate memory");
-- 
2.11.0


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[U-Boot] [PATCH] am335x: sl50: Enable CONFIG_AUTOBOOT_KEYED

2017-07-06 Thread Enric Balletbo i Serra
On startup the SL50 board halt at U-Boot prompt. Use CONFIG_AUTOBOOT_KEYED
to enable autoboot for this board and define the  key to get the
U-Boot prompt.

Signed-off-by: Enric Balletbo i Serra 
---
 configs/am335x_sl50_defconfig | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 02ce013..855e1ca 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -23,7 +23,10 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
-# CONFIG_AUTOBOOT is not set
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_DELAY_STR="d"
+CONFIG_AUTOBOOT_STOP_STR=" "
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_EEPROM=y
-- 
2.9.3

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Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Thomas Schmitt
Hi,

i am the upstream developer of program xorriso which packs up Debian arm64
ISOs.

Here is my minority opinion from a discussion with Andre Przywara:

To my opinion, if U-boot is used as EFI implementation, then it should
not consider as bootable any "active" MBR partitions or "Legacy BIOS
Bootable" GPT partitions (see is_bootable() in disk/part_efi.c).

While the proposed change of behavior is an undisputable improvement,
my objection is that the main boot loaders in distro ISOs are GRUB and
SYSLINUX. Both do not expect that the "active" partition gets booted by
the firmware but rather that their own MBR at the start of the ISO gets
started by BIOS or the ESP is brought up by EFI.
The MBR programs in the ISOs do not go on with booting the "active"
partition but rather hop onto the El Torito boot image programs in the ISO.

The Legacy BIOS Bootable bit of GPT is explicitely not an EFI boot
indicator. UEFI 2.4 says in table 20 : "UEFI boot manager (see chapter 3)
must ignore this bit when selecting a UEFI-compliant application".
The BootIndicator byte of MBR partitions is explicitely not for EFI.
Table 14 says: "This field shall not be used by UEFI firmware."

So if "active" partitions are present in GRUB or SYSLINUX equipped ISOs
they are under no circumstances intended for being booted.


Currently debian ISOs for arm64 have no "active" partition. But that's
an inner implementation detail. E.g. HDD bootable ISOs for x86 do have
the "active"/bootable flag on the ISO 9660 partition out of tradition to
appease mad BIOS implementations.
It is well possible to combine x86 BIOS and arm64 EFI boot equipment
in the same ISO image. So the need for an "active" partition might arise.


Have a nice day :)

Thomas

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[U-Boot] [PATCH v3 1/3] x86: Add dma-mapping.h to architectural code

2017-07-06 Thread Andy Shevchenko
Some cross-platform drivers rely on this header present.
Make it so for x86.

It's just a copy'n'paste of arch/arm/include/asm/dma-mapping.h.

Suggested-by: Bin Meng 
Reviewed-by: Simon Glass 
Reviewed-by: Bin Meng 
Signed-off-by: Andy Shevchenko 
---
 arch/x86/include/asm/dma-mapping.h | 41 ++
 1 file changed, 41 insertions(+)
 create mode 100644 arch/x86/include/asm/dma-mapping.h

diff --git a/arch/x86/include/asm/dma-mapping.h 
b/arch/x86/include/asm/dma-mapping.h
new file mode 100644
index 00..7de4c08e36
--- /dev/null
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -0,0 +1,41 @@
+/*
+ * (C) Copyright 2007
+ * Stelian Pop 
+ * Lead Tech Design 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef __ASM_X86_DMA_MAPPING_H
+#define __ASM_X86_DMA_MAPPING_H
+
+#definedma_mapping_error(x, y) 0
+
+enum dma_data_direction {
+   DMA_BIDIRECTIONAL   = 0,
+   DMA_TO_DEVICE   = 1,
+   DMA_FROM_DEVICE = 2,
+};
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+   *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
+   return (void *)*handle;
+}
+
+static inline void dma_free_coherent(void *addr)
+{
+   free(addr);
+}
+
+static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
+  enum dma_data_direction dir)
+{
+   return (unsigned long)vaddr;
+}
+
+static inline void dma_unmap_single(volatile void *vaddr, size_t len,
+   unsigned long paddr)
+{
+}
+
+#endif /* __ASM_X86_DMA_MAPPING_H */
-- 
2.11.0

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[U-Boot] [PATCH v3 0/3] x86: Introduce Intel Tangier SoC and Edison board

2017-07-06 Thread Andy Shevchenko
This brings support for Intel Tangier SoC and Intel Edison board which
is using U-Boot as a main bootloader.

The series has implicit dependency to watchdog driver, v3 of which [1]
had been sent earlier.

[1] https://lists.denx.de/pipermail/u-boot/2017-July/297224.html

Since v2:
- address misc comments (Bin)
- add Bin's tag to patch 1 and 2
- USB OTG enumeration is left the same (Felipe)

Since v1:
- split patch 1 to two (Bin)
- move enum to sfi.h (Bin)
- remove unnecessary headers (Bin)
- add comment to SFI system table search (Bin)
- append and update copyright notices: sdram.c and tangier.c are almost done
  by Intel (Simon)
- disable SD card slot (Simon)
- add Simon's tag to patch 1 and 2 (changes are basically technical)
- add Edison support

Andy Shevchenko (2):
  x86: Add dma-mapping.h to architectural code
  x86: Add Intel Edison board files

Felipe Balbi (1):
  x86: Add Intel Tangier support

 arch/x86/Kconfig   |   1 +
 arch/x86/cpu/Makefile  |   1 +
 arch/x86/cpu/tangier/Kconfig   |  24 +
 arch/x86/cpu/tangier/Makefile  |   7 ++
 arch/x86/cpu/tangier/car.S |  13 +++
 arch/x86/cpu/tangier/sdram.c   | 206 +
 arch/x86/cpu/tangier/tangier.c |  34 ++
 arch/x86/dts/Makefile  |   1 +
 arch/x86/dts/edison.dts|  89 
 arch/x86/include/asm/dma-mapping.h |  41 
 arch/x86/include/asm/sfi.h |  19 
 board/intel/Kconfig|   8 ++
 board/intel/edison/Kconfig |  26 +
 board/intel/edison/Makefile|   7 ++
 board/intel/edison/config.mk   |  18 
 board/intel/edison/edison.c| 104 +++
 board/intel/edison/start.S |  13 +++
 configs/edison_defconfig   |  53 ++
 doc/README.x86 |  39 +++
 include/configs/edison.h   |  61 +++
 20 files changed, 765 insertions(+)
 create mode 100644 arch/x86/cpu/tangier/Kconfig
 create mode 100644 arch/x86/cpu/tangier/Makefile
 create mode 100644 arch/x86/cpu/tangier/car.S
 create mode 100644 arch/x86/cpu/tangier/sdram.c
 create mode 100644 arch/x86/cpu/tangier/tangier.c
 create mode 100644 arch/x86/dts/edison.dts
 create mode 100644 arch/x86/include/asm/dma-mapping.h
 create mode 100644 board/intel/edison/Kconfig
 create mode 100644 board/intel/edison/Makefile
 create mode 100644 board/intel/edison/config.mk
 create mode 100644 board/intel/edison/edison.c
 create mode 100644 board/intel/edison/start.S
 create mode 100644 configs/edison_defconfig
 create mode 100644 include/configs/edison.h

-- 
2.11.0

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[U-Boot] [PATCH v3 3/3] x86: Add Intel Edison board files

2017-07-06 Thread Andy Shevchenko
Add Intel Edison board which is using U-Boot.

The patch is based on work done by the following people (in alphabetical
order):
Aiden Park 
Dukjoon Jeon 
eric.park 
Fabien Chereau 
Felipe Balbi 
Scott D Phillips 
Sebastien Colleur 
Steve Sakoman 
Vincent Tinelli 

In case we're building for Intel Edison, we must have 4096 bytes of
zeroes in the beginning on u-boot.bin. This is done in
board/intel/edison/config.mk.

First run sets hardware_id environment variable which is read from
System Controller Unit (SCU).

Serial number (serial# environment variable) is generated based on eMMC
CID.

MAC address on USB network interface is unique to the board but kept the
same all over the time.

Set mac address from U-Boot using following scheme:
OUI = 02:00:86
next 3 bytes of MAC address set from eMMC serial number

This allows to have a unique mac address across reboot and flashing.

Signed-off-by: Vincent Tinelli 
Signed-off-by: Felipe Balbi 
Signed-off-by: Andy Shevchenko 
---
 arch/x86/cpu/tangier/Kconfig |   4 ++
 arch/x86/dts/Makefile|   1 +
 arch/x86/dts/edison.dts  |  89 
 board/intel/Kconfig  |   8 
 board/intel/edison/Kconfig   |  26 +++
 board/intel/edison/Makefile  |   7 +++
 board/intel/edison/config.mk |  18 
 board/intel/edison/edison.c  | 104 +++
 board/intel/edison/start.S   |  13 ++
 configs/edison_defconfig |  53 ++
 doc/README.x86   |  39 
 include/configs/edison.h |  61 +
 12 files changed, 423 insertions(+)
 create mode 100644 arch/x86/dts/edison.dts
 create mode 100644 board/intel/edison/Kconfig
 create mode 100644 board/intel/edison/Makefile
 create mode 100644 board/intel/edison/config.mk
 create mode 100644 board/intel/edison/edison.c
 create mode 100644 board/intel/edison/start.S
 create mode 100644 configs/edison_defconfig
 create mode 100644 include/configs/edison.h

diff --git a/arch/x86/cpu/tangier/Kconfig b/arch/x86/cpu/tangier/Kconfig
index 92d3352f3b..b67c6a799e 100644
--- a/arch/x86/cpu/tangier/Kconfig
+++ b/arch/x86/cpu/tangier/Kconfig
@@ -18,3 +18,7 @@ config SYS_CAR_SIZE
help
  Space in bytes in eSRAM used as Cache-As-RAM (CAR).
  Note this size must not exceed eSRAM's total size.
+
+config SYS_USB_OTG_BASE
+   hex
+   default 0xf910
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 3f534ad40a..6589495f23 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -10,6 +10,7 @@ dtb-y += bayleybay.dtb \
cougarcanyon2.dtb \
crownbay.dtb \
dfi-bt700-q7x-151.dtb \
+   edison.dtb \
efi.dtb \
galileo.dtb \
minnowmax.dtb \
diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts
new file mode 100644
index 00..0b04984c6e
--- /dev/null
+++ b/arch/x86/dts/edison.dts
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include 
+#include 
+
+/include/ "skeleton.dtsi"
+/include/ "rtc.dtsi"
+/include/ "tsc_timer.dtsi"
+
+/ {
+   model = "Intel Edison";
+   compatible = "intel,edison";
+
+   aliases {
+   serial0 = &serial0;
+   };
+
+   chosen {
+   stdout-path = &serial0;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   device_type = "cpu";
+   compatible = "cpu-x86";
+   reg = <0>;
+   intel,apic-id = <0>;
+   };
+
+   cpu@1 {
+   device_type = "cpu";
+   compatible = "cpu-x86";
+   reg = <1>;
+   intel,apic-id = <2>;
+   };
+   };
+
+   pci {
+   compatible = "pci-x86";
+   #address-cells = <3>;
+   #size-cells = <2>;
+   u-boot,dm-pre-reloc;
+   ranges = <0x0200 0x0 0x8000 0x8000 0 0x4000
+ 0x4200 0x0 0xc000 0xc000 0 0x2000
+ 0x0100 0x0 0x2000 0x2000 0 0xe000>;
+   };
+
+   serial0: serial@ff010180 {
+   compatible = "intel,mid-uart";
+   reg = <0xff010180 0x100>;
+   reg-shift = <0>;
+   clock-frequency = <29491200>;
+   current-speed = <115200>;
+   };
+
+   emmc: mmc@ff3fc000 {
+   compatible = "intel,sdhci-tangier";
+   reg = <0xff3fc000 0x1000>;
+   };
+
+/*
+ * FIXME: For now U-Boot DM model doesn't allow to power up this controller.
+ * Enabling it will make U-Boot hang.
+ *
+   sdcard: mmc@ff3fa000 {
+   compatible = "i

[U-Boot] [PATCH v3 2/3] x86: Add Intel Tangier support

2017-07-06 Thread Andy Shevchenko
From: Felipe Balbi 

Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For
example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical
order):
Aiden Park 
Dukjoon Jeon 
eric.park 
Fabien Chereau 
Scott D Phillips 
Sebastien Colleur 
Steve Sakoman 
Vincent Tinelli 

Reviewed-by: Simon Glass 
Reviewed-by: Bin Meng 
Signed-off-by: Vincent Tinelli 
Signed-off-by: Felipe Balbi 
Signed-off-by: Andy Shevchenko 
---
 arch/x86/Kconfig   |   1 +
 arch/x86/cpu/Makefile  |   1 +
 arch/x86/cpu/tangier/Kconfig   |  20 
 arch/x86/cpu/tangier/Makefile  |   7 ++
 arch/x86/cpu/tangier/car.S |  13 +++
 arch/x86/cpu/tangier/sdram.c   | 206 +
 arch/x86/cpu/tangier/tangier.c |  34 +++
 arch/x86/include/asm/sfi.h |  19 
 8 files changed, 301 insertions(+)
 create mode 100644 arch/x86/cpu/tangier/Kconfig
 create mode 100644 arch/x86/cpu/tangier/Makefile
 create mode 100644 arch/x86/cpu/tangier/car.S
 create mode 100644 arch/x86/cpu/tangier/sdram.c
 create mode 100644 arch/x86/cpu/tangier/tangier.c

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 0cd981e73e..5c8dc822ef 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -114,6 +114,7 @@ source "arch/x86/cpu/ivybridge/Kconfig"
 source "arch/x86/cpu/qemu/Kconfig"
 source "arch/x86/cpu/quark/Kconfig"
 source "arch/x86/cpu/queensbay/Kconfig"
+source "arch/x86/cpu/tangier/Kconfig"
 
 # architecture-specific options below
 
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index e1c84ce097..999429e62b 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_QEMU) += qemu/
 obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
 obj-$(CONFIG_INTEL_QUARK) += quark/
 obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
+obj-$(CONFIG_INTEL_TANGIER) += tangier/
 obj-y += lapic.o ioapic.o
 obj-y += irq.o
 ifndef CONFIG_$(SPL_)X86_64
diff --git a/arch/x86/cpu/tangier/Kconfig b/arch/x86/cpu/tangier/Kconfig
new file mode 100644
index 00..92d3352f3b
--- /dev/null
+++ b/arch/x86/cpu/tangier/Kconfig
@@ -0,0 +1,20 @@
+#
+# Copyright (c) 2017 Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+config INTEL_TANGIER
+   bool
+   depends on INTEL_MID
+
+config SYS_CAR_ADDR
+   hex
+   default 0x1920
+
+config SYS_CAR_SIZE
+   hex
+   default 0x4000
+   help
+ Space in bytes in eSRAM used as Cache-As-RAM (CAR).
+ Note this size must not exceed eSRAM's total size.
diff --git a/arch/x86/cpu/tangier/Makefile b/arch/x86/cpu/tangier/Makefile
new file mode 100644
index 00..d146b3f5c2
--- /dev/null
+++ b/arch/x86/cpu/tangier/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Intel Corporation
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += car.o tangier.o sdram.o
diff --git a/arch/x86/cpu/tangier/car.S b/arch/x86/cpu/tangier/car.S
new file mode 100644
index 00..6982106c19
--- /dev/null
+++ b/arch/x86/cpu/tangier/car.S
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2010-2011
+ * Graeme Russ, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+.section .text
+
+.globl car_init
+car_init:
+   jmp car_init_ret
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
new file mode 100644
index 00..5743077431
--- /dev/null
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * SFI tables are part of the first stage bootloader.
+ *
+ * U-Boot finds the System Table by searching 16-byte boundaries between
+ * physical address 0x000E and 0x000F. U-Boot shall search this region
+ * starting at the low address and shall stop searching when the 1st valid SFI
+ * System Table is found.
+ */
+#define SFI_BASE_ADDR  0x000E
+#define SFI_LENGTH 0x0002
+#define SFI_TABLE_LENGTH   16
+
+static int sfi_table_check(struct sfi_table_header *sbh)
+{
+   char chksum = 0;
+   char *pos = (char *)sbh;
+   u32 i;
+
+   if (sbh->len < SFI_TABLE_LENGTH)
+   return -ENXIO;
+
+   if (sbh->len > SFI_LENGTH)
+   return -ENXIO;
+
+   for (i = 0; i < sbh->len; i++)
+   chksum += *pos++;
+
+   if (chksum)
+   error("sfi: Invalid checksum\n");
+
+   /* Checksum is OK if zero */
+   return chksum ? -EILSEQ : 0;
+}
+
+static int sfi_table_is_type(struct sfi_table_header *sbh, const char 
*signature)
+{
+   return !strncmp(sbh->sig, signature, SFI_SIGNATURE_SIZE) &&
+  !sfi_table_check(sbh);
+}
+
+static struct sfi_table_simple *sfi_get_table_by_sig(unsigned long addr,

[U-Boot] Nios II 10m50 is not working

2017-07-06 Thread Gan, Yau Wai
U-boot for Nios II on the 10m50 dev board is not functioning. The serial 
terminal prints nothing upon booting up. The u-boot image is loaded via 
GDB/JTAG to the FPGA on-chip RAM.

Bisect activities were carried and discovered that the change from using 
dm_scan_fdt_node to dm_scan_fdt_dev in the simple_bus.c. This leads to 
suspecting the 10m50_devboard.dts need update to include "u-boot,dm-pre-reloc".

However, changing the 10m50_devboard.dts still does not solve the problem. Any 
idea? Sorry if missing out any info and I will glad to supply.
Thanks.
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Re: [U-Boot] [PATCH v2 08/10] powerpc, 8xx: move FEC Ethernet driver in drivers/net

2017-07-06 Thread Tom Rini
On Thu, Jul 06, 2017 at 04:54:59PM +0800, Bin Meng wrote:
> Hi Christophe,
> 
> On Thu, Jul 6, 2017 at 4:33 PM, Christophe Leroy
>  wrote:
> > Signed-off-by: Christophe Leroy 
> > ---
> >  README | 15 --
> >  arch/powerpc/cpu/mpc8xx/Makefile   |  1 -
> >  arch/powerpc/cpu/mpc8xx/cpu.c  |  2 +-
> >  drivers/net/Kconfig| 58 
> > ++
> >  drivers/net/Makefile   |  1 +
> >  .../cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c   | 18 ---
> >  scripts/config_whitelist.txt   |  4 --
> >  7 files changed, 60 insertions(+), 39 deletions(-)
> >  rename arch/powerpc/cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c (97%)
> 
> I've seen all previous discussion on this 8xx support. But since you
> are modernising 8xx support, can you convert this driver to DM
> instead? We should not add any new legacy driver any more.

This is why I was saying incremental change in the -rc3 announcement.
This code will be updated to modern requirements.  But it (being the
parts that are still used) will come in, get moved, then get converted.
Or out it goes again :)

-- 
Tom


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Re: [U-Boot] [PATCH 0/5] db410c: updates for grub + gfxterm

2017-07-06 Thread Mateusz Kulikowski
Hi Rob,

On 25.06.2017 01:05, Rob Clark wrote:
> In particular, support for display setup by lk.  This introduces a
> simplefb display driver that uses the framebuffer fdt node populated
> by the firmware[1] for u-boot display support (and, at least for
> what I am working on, more interestingly, EFI GOP support).
[...]
 
> A few related patches so that on db410c we actually use the fdt
> passed by lk (and so that dm/core is clever enough to notice fdt
> nodes under "chosen"), config updates, and related fixes.
[...]

I finally had time to look at patches (this and the earlier series).

Enabling the output is pretty cool - I thought of that myself some time ago.

Question: Do you have non-standard partition layout? 
I have flashed most recent 96boards debian image, but my device doesn't 
have splash partition. (It initializes screen properly, just doesn't display 
anything)

Question2: Are you sure you have included all the patches?

I've applied this series (also included patches from 2017-06-20), but u-boot 
doesn't parse device tree properly and things like usb cease to work - 
both with your and official lk:



U-Boot 2017.07-rc3-00015-ga2592ee (Jul 06 2017 - 13:48:40 +0200)
Qualcomm-DragonBoard 410C

DRAM:  986 MiB
MMC:   sdhci@07824000: 0, sdhci@07864000: 1
Using default environment

In:serial
Out:   serial
Err:   serial
Failed to find PMIC pon node. Check device tree
Net:   Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot:  0 




On the other hand it works properly with your pre-built binary [1].

I assume the difference may be that you have added proper (instead of fake) 
device 
tree into mkbootimg - is that the case?


Thanks, 
Mateusz



> 
> [1] https://github.com/robclark/lk/commits/db410c-display
> 
> Rob Clark (5):
>   board/db410c: use fdt passed from lk
>   dm: core: also parse chosen node
>   video: simplefb
>   efi_loader: gop: fixes for CONFIG_DM_VIDEO without CONFIG_LCD
>   configs: db410c: config updates
> 
>  arch/arm/Kconfig |  2 +-
>  board/qualcomm/dragonboard410c/dragonboard410c.c | 16 ++
>  cmd/bootefi.c|  2 +-
>  configs/dragonboard410c_defconfig|  7 +++
>  drivers/core/root.c  | 22 +++-
>  drivers/video/Kconfig| 10 
>  drivers/video/Makefile   |  2 +-
>  drivers/video/simplefb.c | 68 
> 
>  lib/efi_loader/Makefile  |  1 +
>  lib/efi_loader/efi_gop.c |  7 ++-
>  10 files changed, 132 insertions(+), 5 deletions(-)
>  create mode 100644 drivers/video/simplefb.c
> 

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Re: [U-Boot] [PATCH v3 3/3] x86: Add Intel Edison board files

2017-07-06 Thread Bin Meng
On Thu, Jul 6, 2017 at 7:41 PM, Andy Shevchenko
 wrote:
> Add Intel Edison board which is using U-Boot.
>
> The patch is based on work done by the following people (in alphabetical
> order):
> Aiden Park 
> Dukjoon Jeon 
> eric.park 
> Fabien Chereau 
> Felipe Balbi 
> Scott D Phillips 
> Sebastien Colleur 
> Steve Sakoman 
> Vincent Tinelli 
>
> In case we're building for Intel Edison, we must have 4096 bytes of
> zeroes in the beginning on u-boot.bin. This is done in
> board/intel/edison/config.mk.
>
> First run sets hardware_id environment variable which is read from
> System Controller Unit (SCU).
>
> Serial number (serial# environment variable) is generated based on eMMC
> CID.
>
> MAC address on USB network interface is unique to the board but kept the
> same all over the time.
>
> Set mac address from U-Boot using following scheme:
> OUI = 02:00:86
> next 3 bytes of MAC address set from eMMC serial number
>
> This allows to have a unique mac address across reboot and flashing.
>
> Signed-off-by: Vincent Tinelli 
> Signed-off-by: Felipe Balbi 
> Signed-off-by: Andy Shevchenko 
> ---
>  arch/x86/cpu/tangier/Kconfig |   4 ++
>  arch/x86/dts/Makefile|   1 +
>  arch/x86/dts/edison.dts  |  89 
>  board/intel/Kconfig  |   8 
>  board/intel/edison/Kconfig   |  26 +++
>  board/intel/edison/Makefile  |   7 +++
>  board/intel/edison/config.mk |  18 
>  board/intel/edison/edison.c  | 104 
> +++
>  board/intel/edison/start.S   |  13 ++
>  configs/edison_defconfig |  53 ++
>  doc/README.x86   |  39 
>  include/configs/edison.h |  61 +
>  12 files changed, 423 insertions(+)
>  create mode 100644 arch/x86/dts/edison.dts
>  create mode 100644 board/intel/edison/Kconfig
>  create mode 100644 board/intel/edison/Makefile
>  create mode 100644 board/intel/edison/config.mk
>  create mode 100644 board/intel/edison/edison.c
>  create mode 100644 board/intel/edison/start.S
>  create mode 100644 configs/edison_defconfig
>  create mode 100644 include/configs/edison.h
>

Reviewed-by: Bin Meng 
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Re: [U-Boot] [PATCH v2 3/3] x86: Add Intel Edison board files

2017-07-06 Thread Bin Meng
Hi Andy,

On Thu, Jul 6, 2017 at 7:28 PM, Andy Shevchenko
 wrote:
> On Thu, 2017-07-06 at 12:44 +0300, Andy Shevchenko wrote:
>> On Thu, 2017-07-06 at 12:07 +0800, Bin Meng wrote:
>> > Hi Andy,
>> >
>> > On Thu, Jul 6, 2017 at 4:56 AM, Andy Shevchenko
>> >  wrote:
>> > > Add Intel Edison board which is using U-Boot.
>
>> > > +config SYS_USB_OTG_BASE
>> > > +   hex
>> > > +   default 0xf910
>> >
>> > Can this otg controller be put into device tree, like other
>> > peripherals?
>>
>> I will check the possibility.
>
> Is it show stopper? To keep things simpler it would be better to keep
> board initialization in place and move forward later.
>

It is not show stopper. But this needs to be addressed in future commits.

> Felipe, what is your opinion on the topic?
>
> --

Regards,
Bin
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Re: [U-Boot] [PATCH v2 3/3] x86: Add Intel Edison board files

2017-07-06 Thread Bin Meng
Hi Felipe,

On Thu, Jul 6, 2017 at 7:33 PM, Felipe Balbi
 wrote:
>
> Hi,
>
> Andy Shevchenko  writes:
>> On Thu, 2017-07-06 at 12:44 +0300, Andy Shevchenko wrote:
>>> On Thu, 2017-07-06 at 12:07 +0800, Bin Meng wrote:
>>> > Hi Andy,
>>> >
>>> > On Thu, Jul 6, 2017 at 4:56 AM, Andy Shevchenko
>>> >  wrote:
>>> > > Add Intel Edison board which is using U-Boot.
>>
>>> > > +config SYS_USB_OTG_BASE
>>> > > +   hex
>>> > > +   default 0xf910
>>> >
>>> > Can this otg controller be put into device tree, like other
>>> > peripherals?
>>>
>>> I will check the possibility.
>>
>> Is it show stopper? To keep things simpler it would be better to keep
>> board initialization in place and move forward later.
>>
>> Felipe, what is your opinion on the topic?
>
> IIRC, there are some folks working on moving DWC3 to DM. Frankly, I
> would rather not wait for the conversion before merging Edison's
> board-file. After the driver is switched to DM, adding another node on
> DT isn't really a lot of work by any stretch of the imagination.

Thanks for the clarification.

Regards,
Bin
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Re: [U-Boot] [PATCH] dm: video: fix abuse of enum

2017-07-06 Thread Marcel Ziswiler
Dear Lothar

On Thu, 2017-07-06 at 09:50 +0200, Lothar Waßmann wrote:
> Hi,
> 
> On Wed, 5 Jul 2017 22:49:28 -0600 Simon Glass wrote:
> > Hi Lothar,
> > 
> > On 23 June 2017 at 00:30, Lothar Waßmann 
> > wrote:
> > > Hi,
> > > 
> > > On Wed, 21 Jun 2017 09:59:05 +0200 Lothar Waßmann wrote:
> > > > Hi,
> > > > 
> > > > On Tue, 20 Jun 2017 12:26:29 -0600 Simon Glass wrote:
> > > > > Hi Lothar,
> > > > > 
> > > > > On 20 June 2017 at 04:25, Lothar Waßmann  > > > > .de> wrote:
> > > > > > LCD_MAX_WIDTH, LCD_MAX_HEIGHT and LCD_MAX_LSBPP are not
> > > > > > alternative
> > > > > > values for one specific variable, but unrelated entities
> > > > > > with distinct
> > > > > > purposes. There is no use defining them as values of an
> > > > > > 'enum'.
> > > > > 
> > > > > Can you explain why #define is better? I prefer enum since
> > > > > they are a
> > > > > compiler construct instead of preprocessor (thus no need for
> > > > > brackets,
> > > > > no strange conversion things) and the debugger knows about
> > > > > them.
> > > > > 
> > > > 
> > > > An enum defines alternative values for one specific entity
> > > > (e.g.
> > > > clauses for a switch construct), but not a collection of
> > > > arbitrary data
> > > > items.
> > > > 
> > > > > > The 'enum' construct would fail miserably for an LCD
> > > > > > controller that
> > > > > > has a square max. frame size (e.g. 4096x4096).
> > > > > 
> > > > > What does this mean? I don't understand sorry.
> > > > > 
> > > > 
> > > > Try your enum with MAX_LCD_WITDH == MAC_LCD_HEIGHT.
> > 
> > Can you please be explicit as to what the problem is? Sorry but I
> > don't understand what you are driving at. Do you have a test
> > program
> > which shows the problem?
> > 
> 
> You cannot have two different enum items with the same value!
> Thus:
> enum {
>   MAX_LCD_WIDTH = 4096,
>   MAX_LCD_HEIGHT = 4096,
> };
> won't compile.

Says who?

At least my gcc compilers even compile the following just fine:

enum {
MAX_LCD_WIDTH = 4096,
MAX_LCD_HEIGHT = MAX_LCD_WIDTH,
};

I really don't think you have any valid point here. Enum items are
really just numbers and there is no limitation as such whether two
items may share the same number or not. It's really absolutely OK. Of
course as such one can not really guess the exact enum item/name from
just the number which may sound suboptimal but that is completely legal
in C. Some other high level languages do not allow that as far as I
remember (e.g. Java).

> The purpose of an enum is to provide a collection of possible values
> that can be taken by a single variable. E.g. enumerate the states of
> a
> state machine, video modes, CPU types...
> It's not meant to group together otherwise unsolicited values.
> 
> 
> Lothar Waßmann

Cheers

Marcel
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Re: [U-Boot] Nios II 10m50 is not working

2017-07-06 Thread Lothar Waßmann
Hi,

On Thu, 6 Jul 2017 10:32:57 + Gan, Yau Wai wrote:
> U-boot for Nios II on the 10m50 dev board is not functioning. The serial 
> terminal prints nothing upon booting up. The u-boot image is loaded via 
> GDB/JTAG to the FPGA on-chip RAM.
> 
> Bisect activities were carried and discovered that the change from using 
> dm_scan_fdt_node to dm_scan_fdt_dev in the simple_bus.c. This leads to 
> suspecting the 10m50_devboard.dts need update to include 
> "u-boot,dm-pre-reloc".
> 
u-boot,dm-pre-reloc has to be present in each item of the DT path
leading to the node where you need it.


Lothar Waßmann
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Re: [U-Boot] [PATCH 0/5] fix the boot issue of Rockchip RK3036

2017-07-06 Thread Tom Rini
On Wed, Jul 05, 2017 at 02:21:03PM +0800, Andy Yan wrote:
> Hi Tom:
> 
> 
> On 2017年07月05日 09:56, Tom Rini wrote:
> >On Wed, Jul 05, 2017 at 09:08:47AM +0800, Andy Yan wrote:
> >>Hi Tom:
> >>
> >>
> >>On 2017年07月04日 21:32, Tom Rini wrote:
> >>>On Mon, Jul 03, 2017 at 04:02:59PM +0800, Andy Yan wrote:
> Hi Philipp:
> 
> 
> On 2017年06月30日 16:14, Dr. Philipp Tomsich wrote:
> >Andy,
> >
> >>On 30 Jun 2017, at 09:47, Andy Yan  wrote:
> >>
> >>
> >>As Kever mentioned in [0], the RK3036 based boards could't
> >>bootup for a long time.
> >>After a git bisect, I found the RK3036 SPL code size has
> >>increased from patch [1] [2]. Before Tom's patch [1], the
> >>SPL size is 3160 bytes, but it becomes 4080 bytes after [1]
> >>applied. After a look at this patch, I realised I should
> >>disable SPL_USE_ARCH_MEMCPY/MEMSET, and the code size indeed
> >>come down after I disabled them. But I got a LD error after
> >>apply patch[2]: "undefined reference to memset", RK3036 SPL
> >>didn't use lib/string because of the sram space imitation.
> >>The compile succeed after CONFIG_SPL_LIBGENERIC_SUPPORT enabled,
> >>but the spl code size become 3248 bytes.
> >>
> >>Additionally, Simon post patch [3] call printf to print a
> >>message before back to bootrom from spl, which make the spl
> >>code size increased to nearly 3.7 kb.
> >>
> >>RK3036 SPL only has 4kb sram to use, the spl code will use
> >>3.4 ~ 3.5 kb, the last 0.5kb are used for SP and GD, so there
> >>is no space for malloc.
> >gcc-6-arm-linux-gnueabi
> >What version of GCC are you using?
> >If your problem can also be solved by moving to GCC 6.3 (or newer) and
> >the code-size improvements there, I’d rather just require a more recent
> >GCC version.
>  I default use arm-linux-gnueabe-gcc v5.4.
>  The current upstream kylin-rk3036_defconfig compiled by gcc-5.4
> is 4384 bytes, the size comes down to 3936 bytes if I use
> arm-linux-gnueabihf-gcc v6.3 from linaro. But this is still too
> large for rk3036.
> >>>Please note that (and U-Boot should be complaining at you) that with
> >>>v2018.01 we'll be moving to gcc-6.x or later for ARM.
> >>>
>  Disable SPL_USE_ARCH_MEMCPY/MEMSET will make the spl size comes
> down to 3042 bytes by gcc v6.3. But I still need some hack: enable
> CONFIG_SPL_LIBGENERIC to get support for memset, masks Simon's print
> in bootrom.c, or the code size will become very large. Event though
> this hack make things work, we still lost a few hundreds bytes by
> function board_init_f_alloc_reserve, because platforms with very
> limit sram like rk3036 will return to bootrom after the dram
> initialized, they never use the malloc space. This few hundreds
> bytes is a large space for 4kb sarm,  it's better to letf them for
> code or SP.
> >>>Since we're really size constrained here maybe it makes sense to move
> >>>that print to a debug() ?
> >>>
> >>   Yes, move it to debug() will mask the printf in normal. But even
> >>so, we still lost a few hundreds bytes in function
> >>
> >>board_init_f_alloc_reserve for malloc. RK3036 will returned to
> >>bootrom immediately after the sdram initialization, the few hundreds
> >>space for malloc pool is never used in SPL stage.
> >Can you work the code paths out such that board_init_f_alloc_reserve
> >would not be called then?
>
>  board_init_f_alloc_reserve is called from crt0.S, in not so easy to
>  work the code path out. And  board_init_f_alloc_reserve also reserve
>  space for GD, this is we needed. So I want make this function as
>  weak, then I can override it in my board spl state.

Sounds like a reasonable path to explore, thanks.

-- 
Tom


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[U-Boot] [PATCH] topic-miamiplus: Run CPU at 800MHz for speedgrade-2

2017-07-06 Thread Mike Looijmans
The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz.
Change the PLL setting to 800MHz, and adapt the setpoints in the devicetree.

Signed-off-by: Mike Looijmans 
---
 arch/arm/dts/zynq-topic-miamiplus.dts| 9 +
 board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c | 4 ++--
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynq-topic-miamiplus.dts 
b/arch/arm/dts/zynq-topic-miamiplus.dts
index 3036f6e..fef5941 100644
--- a/arch/arm/dts/zynq-topic-miamiplus.dts
+++ b/arch/arm/dts/zynq-topic-miamiplus.dts
@@ -12,6 +12,15 @@
compatible = "topic,miamiplus", "xlnx,zynq-7000";
 };
 
+/* The miamiplus contains a speedgrade-2 device and runs at 800MHz */
+&cpu0 {
+   operating-points = <
+   /* kHzuV */
+   80  100
+   40  100
+   >;
+};
+
 &qspi {
is-dual = <1>;
 };
diff --git a/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c 
b/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c
index 5a92336..97a59a5 100644
--- a/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c
+++ b/board/topic/zynq/zynq-topic-miamiplus/ps7_init_gpl.c
@@ -9,8 +9,8 @@
 
 static unsigned long ps7_pll_init_data_3_0[] = {
EMIT_MASKWRITE(0XF808, 0xU, 0xDF0DU),
-   EMIT_MASKWRITE(0XF8000110, 0x0030U, 0x000FA220U),
-   EMIT_MASKWRITE(0XF8000100, 0x0007F000U, 0x00028000U),
+   EMIT_MASKWRITE(0XF8000110, 0x0030U, 0x000FA240U),
+   EMIT_MASKWRITE(0XF8000100, 0x0007F000U, 0x0003U),
EMIT_MASKWRITE(0XF8000100, 0x0010U, 0x0010U),
EMIT_MASKWRITE(0XF8000100, 0x0001U, 0x0001U),
EMIT_MASKWRITE(0XF8000100, 0x0001U, 0xU),
-- 
1.9.1

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Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Andre Przywara
Hi,

On 06/07/17 11:19, Thomas Schmitt wrote:
> Hi,
> 
> i am the upstream developer of program xorriso which packs up Debian arm64
> ISOs.
> 
> Here is my minority opinion from a discussion with Andre Przywara:
> 
> To my opinion, if U-boot is used as EFI implementation, then it should
> not consider as bootable any "active" MBR partitions or "Legacy BIOS
> Bootable" GPT partitions (see is_bootable() in disk/part_efi.c).

First thing to note here is that U-Boot does not really have an
understanding yet of whether it is acting as an EFI implementation or
not. At this stage it simply looks for boot partition *candidates*,
which will then later be examined more closely to find boot scripts or
EFI apps. Adding one more partition to that list should not cause much
harm, I think.

> While the proposed change of behavior is an undisputable improvement,
> my objection is that the main boot loaders in distro ISOs are GRUB and
> SYSLINUX. Both do not expect that the "active" partition gets booted by
> the firmware but rather that their own MBR at the start of the ISO gets
> started by BIOS or the ESP is brought up by EFI.
> The MBR programs in the ISOs do not go on with booting the "active"
> partition but rather hop onto the El Torito boot image programs in the ISO.

A second thing to note is that there is some fundamental difference here
between the ARM world and x86.
For ARM U-Boot was so far just piggy-backing on the bootable MBR flag to
find /boot partition candidates. I am not sure if there is actually some
spec or standard covering this behaviour, it was just convenient and
worked quite well in the (mostly embedded) ARM world.
And on ARM U-Boot never considered the "boot code" in a boot sector
(neither on the MBR or on an active partition) - which is probably x86
code anyway.

Now I am not sure how this maps to the combination of U-Boot and x86 - I
am not very familiar with the combination of those two.
Does U-Boot actually support chain-loading boot sectors on x86? Or does
it entirely focus on loading either EFI apps or Linux kernels / U-Boot
boot scripts? Maybe Simon could shed some light on this?

Cheers,
Andre.



> 
> The Legacy BIOS Bootable bit of GPT is explicitely not an EFI boot
> indicator. UEFI 2.4 says in table 20 : "UEFI boot manager (see chapter 3)
> must ignore this bit when selecting a UEFI-compliant application".
> The BootIndicator byte of MBR partitions is explicitely not for EFI.
> Table 14 says: "This field shall not be used by UEFI firmware."
> 
> So if "active" partitions are present in GRUB or SYSLINUX equipped ISOs
> they are under no circumstances intended for being booted.
> 
> 
> Currently debian ISOs for arm64 have no "active" partition. But that's
> an inner implementation detail. E.g. HDD bootable ISOs for x86 do have
> the "active"/bootable flag on the ISO 9660 partition out of tradition to
> appease mad BIOS implementations.
> It is well possible to combine x86 BIOS and arm64 EFI boot equipment
> in the same ISO image. So the need for an "active" partition might arise.
> 
> 
> Have a nice day :)
> 
> Thomas
> 
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Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Alexander Graf

On 07/06/2017 03:07 PM, Andre Przywara wrote:

Hi,

On 06/07/17 11:19, Thomas Schmitt wrote:

Hi,

i am the upstream developer of program xorriso which packs up Debian arm64
ISOs.

Here is my minority opinion from a discussion with Andre Przywara:

To my opinion, if U-boot is used as EFI implementation, then it should
not consider as bootable any "active" MBR partitions or "Legacy BIOS
Bootable" GPT partitions (see is_bootable() in disk/part_efi.c).

First thing to note here is that U-Boot does not really have an
understanding yet of whether it is acting as an EFI implementation or
not. At this stage it simply looks for boot partition *candidates*,
which will then later be examined more closely to find boot scripts or
EFI apps. Adding one more partition to that list should not cause much
harm, I think.


While the proposed change of behavior is an undisputable improvement,
my objection is that the main boot loaders in distro ISOs are GRUB and
SYSLINUX. Both do not expect that the "active" partition gets booted by
the firmware but rather that their own MBR at the start of the ISO gets
started by BIOS or the ESP is brought up by EFI.
The MBR programs in the ISOs do not go on with booting the "active"
partition but rather hop onto the El Torito boot image programs in the ISO.

A second thing to note is that there is some fundamental difference here
between the ARM world and x86.
For ARM U-Boot was so far just piggy-backing on the bootable MBR flag to
find /boot partition candidates. I am not sure if there is actually some
spec or standard covering this behaviour, it was just convenient and
worked quite well in the (mostly embedded) ARM world.
And on ARM U-Boot never considered the "boot code" in a boot sector
(neither on the MBR or on an active partition) - which is probably x86
code anyway.

Now I am not sure how this maps to the combination of U-Boot and x86 - I
am not very familiar with the combination of those two.
Does U-Boot actually support chain-loading boot sectors on x86? Or does
it entirely focus on loading either EFI apps or Linux kernels / U-Boot
boot scripts? Maybe Simon could shed some light on this?


U-Boot on x86 does not implement BIOS callbacks, so even if you wanted 
to you couldn't execute an MBR directly.


So yes, it only loads proper payloads the same way as it does on ARM.


Alex

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Re: [U-Boot] [PATCH v2] powerpc, 8xx: Add support for MCR3000 board from CSSI

2017-07-06 Thread Christophe LEROY

Hello Heiko,

Le 06/07/2017 à 12:10, Heiko Schocher a écrit :

Hello Christophe,

Am 06.07.2017 um 10:39 schrieb Christophe Leroy:

CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.

This patch adds support for the first board.

Signed-off-by: Christophe Leroy 
---
  Applies after the v2 serie 'powerpc, 8xx: Modernise the 8xx'

  .travis.yml |   2 +
  arch/powerpc/cpu/mpc8xx/Kconfig |   5 +
  board/cssi/MAINTAINERS  |   6 +
  board/cssi/MCR3000/Kconfig  |  15 ++
  board/cssi/MCR3000/MCR3000.c| 316 


  board/cssi/MCR3000/Makefile |  10 ++
  board/cssi/MCR3000/nand.c   |  65 +
  board/cssi/MCR3000/u-boot.lds   |  91 
  configs/MCR3000_defconfig   |  81 ++
  drivers/net/mpc8xx_fec.c|  20 +++
  include/configs/MCR3000.h   | 240 ++
  11 files changed, 851 insertions(+)
  create mode 100644 board/cssi/MAINTAINERS
  create mode 100644 board/cssi/MCR3000/Kconfig
  create mode 100644 board/cssi/MCR3000/MCR3000.c
  create mode 100644 board/cssi/MCR3000/Makefile
  create mode 100644 board/cssi/MCR3000/nand.c
  create mode 100644 board/cssi/MCR3000/u-boot.lds
  create mode 100644 configs/MCR3000_defconfig
  create mode 100644 include/configs/MCR3000.h


Reviewed-by: Heiko Schocher 

nitpicks only:


diff --git a/.travis.yml b/.travis.yml
index 6f14ec2396..226c8313b1 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -210,6 +210,8 @@ matrix:
  - env:
  - BUILDMAN="mpc86xx"
  - env:
+- BUILDMAN="mpc8xx"
+- env:
  - BUILDMAN="siemens"
  - env:
  - BUILDMAN="tegra"


Can you give us a link, where you tried it on travis ?


https://travis-ci.org/chleroy/uboot/builds/250339570?utm_source=email&utm_medium=notification



[...]

diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
new file mode 100644
index 00..a84633a669
--- /dev/null
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -0,0 +1,316 @@
+/*
+ * Copyright (C) 2010-2017 CS Systemes d'Information
+ * Florent Trinh Thai 
+ * Christophe Leroy 
+ *
+ * Board specific routines for the MCR3000 board
+ *
+ * - initialisation
+ * - memory controller
+ * - serial io initialisation
+ * - ethernet io initialisation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+#include 
+#endif
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+
+/* 
-

+ * constant
+ */
+static const uint cs1_dram_table_66[] = {
+/* DRAM - single read. (offset 0 in upm RAM) */
+0x0F3DFC04, 0x0FEFBC04, 0x00BE7804, 0x0FFDF400,
+0x1C05, 0x, 0x, 0x,
+
+/* DRAM - burst read. (offset 8 in upm RAM) */
+0x0F3DFC04, 0x0FEFBC04, 0x00BF7C04, 0x00FFFC00,
+0x00FFFC00, 0x00FEF800, 0x0FFDF400, 0x1C05,
+0x, 0x, 0x, 0x,
+0x, 0x, 0x, 0x,
+
+/* DRAM - single write. (offset 18 in upm RAM) */
+0x0F3DFC04, 0x0FEFB800, 0x00BF7404, 0x0FFEF804,
+0x0FFDF404, 0x1C05, 0x, 0x,
+
+/* DRAM - burst write. (offset 20 in upm RAM) */
+0x0F3DFC04, 0x0FEFB800, 0x00BF7400, 0x00FFFC00,
+0x00FFFC00, 0x00FFFC04,0x0FFEF804, 0x0FFDF404,
+0x1C05, 0x, 0x, 0x,
+0x, 0x, 0x, 0x,
+
+/* refresh  (offset 30 in upm RAM) */
+0x0FFDF404, 0x0FFEBC04, 0x0FFD7C84, 0x0C04,
+0x0C04, 0x0C04, 0x1C85, 0x,
+
+/* init */
+0x0FEEB874, 0x0FBD7474, 0x1C45, 0x,
+
+/* exception. (offset 3c in upm RAM) */
+0xFC05, 0x, 0x, 0x,
+};
+
+/* 
-

+ * Device Tree Support
+ */
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+static int fdt_set_node_and_value(void *blob, char *nodename, char 
*regname,

+  void *var, int size)
+{


May we move this function to a common place, as I think others can
reuse it also?


Ok, I add it in my TODO list.
My second board will use it too.




+int ret = 0;
+int nodeoffset = 0;
+
+nodeoffset = fdt_path_offset(blob, nodename);
+if (nodeoffset >= 0) {
+ret = fdt_setprop(blob, nodeoffset, regname, var, size);
+if (ret < 0)
+printf("ft_blob_update(): cannot set %s/%s property; err: 
%s\n",


wrong text "ft_blob_update()" the functions name is 
fdt_set_node_and_value().


Ok




+   nodename, regname, fdt_strerror(ret));
+} else {
+printf("ft_blob_update(): cannot find %s node err:%s\n",
+   nodename, fdt_strerror(nodeoffset));
+}
+return ret;
+}
+
+/*
+ * upda

Re: [U-Boot] [PATCH v2] powerpc, 8xx: Add support for MCR3000 board from CSSI

2017-07-06 Thread Christophe LEROY

Dear Wolfgang,

Le 06/07/2017 à 13:12, Wolfgang Denk a écrit :

Dear Christophe,

In message <20170706083955.0d92f69...@pc13941vm.idsi0.si.c-s.fr> you wrote:


This patch adds support for the first board.

...


diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds
new file mode 100644
index 00..2234bd8d1d
--- /dev/null
+++ b/board/cssi/MCR3000/u-boot.lds

...

+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .text  :
+  {

...

Like with C code, TABs should be used for indentation.


Ok




...

diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
new file mode 100644
index 00..53d4e9468a
--- /dev/null
+++ b/include/configs/MCR3000.h

...

+#define CONFIG_IPADDR  192.168.0.3
+#define CONFIG_SERVERIP192.168.0.1
+#define CONFIG_NETMASK 255.0.0.0


Static network configuration in board config files is strongly
discouraged.  Please remove.


But with no IP CONFIG, the board won't boot properly.
I propose to leave it for the time being (there is plenty in other board 
configs) and add that in my TODO list.





+#define CONFIG_SYS_BAUDRATE_TABLE  {9600, 19200, 38400, 57600, 115200}


Can you not use the standard baudrate table?


Yes indeed, it is the same. I fix it.





+/*---
+ * Physical memory map of the MCR3000 board
+ */


Nitpick: illegal multiline comment style.  Please fix globally.


Reviewed-by: Wolfgang Denk 

Best regards,

Wolfgang Denk



Thanks for your review
Regards
Christophe
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Re: [U-Boot] [PATCH v2] powerpc, 8xx: Add support for MCR3000 board from CSSI

2017-07-06 Thread Tom Rini
On Thu, Jul 06, 2017 at 03:58:27PM +0200, Christophe LEROY wrote:
> Dear Wolfgang,
> 
> Le 06/07/2017 à 13:12, Wolfgang Denk a écrit :
> >Dear Christophe,
> >
> >In message <20170706083955.0d92f69...@pc13941vm.idsi0.si.c-s.fr> you wrote:
> >>
> >>This patch adds support for the first board.
> >...
> >
> >>diff --git a/board/cssi/MCR3000/u-boot.lds b/board/cssi/MCR3000/u-boot.lds
> >>new file mode 100644
> >>index 00..2234bd8d1d
> >>--- /dev/null
> >>+++ b/board/cssi/MCR3000/u-boot.lds
> >...
> >>+OUTPUT_ARCH(powerpc)
> >>+SECTIONS
> >>+{
> >>+  /* Read-only sections, merged into text segment: */
> >>+  . = + SIZEOF_HEADERS;
> >>+  .text  :
> >>+  {
> >...
> >
> >Like with C code, TABs should be used for indentation.
> 
> Ok
> 
> >
> >
> >...
> >>diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
> >>new file mode 100644
> >>index 00..53d4e9468a
> >>--- /dev/null
> >>+++ b/include/configs/MCR3000.h
> >...
> >>+#define CONFIG_IPADDR  192.168.0.3
> >>+#define CONFIG_SERVERIP192.168.0.1
> >>+#define CONFIG_NETMASK 255.0.0.0
> >
> >Static network configuration in board config files is strongly
> >discouraged.  Please remove.
> 
> But with no IP CONFIG, the board won't boot properly.
> I propose to leave it for the time being (there is plenty in other
> board configs) and add that in my TODO list.

Agreed.  Figuring out what to do about these CONFIG options is somewhere
on my list as it's indeed against best practices now.

-- 
Tom


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Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Thomas Schmitt
Hi,

Andre Przywara wrote:
> U-Boot does not really have an
> understanding yet of whether it is acting as an EFI implementation

If you use it to boot an ISO by its GRUB or SYSLINUX EFI equipment,
then you ask it to act as EFI implementation.
Maybe a compile time switch could restrict U-Boot to that role before
it gets written to the hardware where it shall be the EFI firmware ?

(Sorry, i am entirely software guy. Please don't laugh too loud about my
 idea of hardware and its relation to U-boot.)


> Does U-Boot actually support chain-loading boot sectors on x86? Or does
> it entirely focus on loading either EFI apps or Linux kernels / U-Boot
> boot scripts?

Hmm. From its use of the "active" flag of MBR partitions i maybe hastily
concluded that it would load and run what wikipedia calls the VBR of the
partition in
  https://en.wikipedia.org/wiki/Master_boot_record#System_bootstrapping

If U-Boot looks into the "active" partition's filesystem for boot-worthy
programs, then my objections and the following reasoning are possibly void.
(One would still have to investigate whether files in ISO images might
 be mistaken as boot-worthy although the ISO producer did not intend them
 for being started.)


-
So only in case the "active" partition's VBR can indeed get chainloaded:

The reason why i give objections is that i want to keep the wiggle room
for bootable ISO 9660 images as wide as possible. Any further assumption
by the boot environment might block future improvements of such ISOs.


> Adding one more partition to that list should not cause much
> harm, I think.

Your point is supported by the fact that in most x86 HDD bootable ISOs
the ISO 9660 partition is the "active" one and starts at LBA 0, thus
having the image MBR as first block. Should work therefore.

But LBA 0 as MBR partition start angers partition editors. In GPT it
is plainly illegal (although happily used). So i try to push producers of
GNU/Linux distro ISOs to have the ISO 9660 partition start at LBA 64
(counted with 512 byte blocks). At least the normal SYSLINUX isohybrid
MBR will not work if started from a partition with non-zero offset.

In any case the ISO producers are not necessarily aware that an "active"
flag might cause the start of the partition VBR.


> Now I am not sure how this maps to the combination of U-Boot and x86 - I
> am not very familiar with the combination of those two.

UEFI specs invite to have boot programs for various processor architectures
in the same ESP. Currently i only know of ISOs which combine 32-bit x86
and 64-bit x86.

But if one adds a set of ARM executable binaries to the ISO filesystem
and lets /EFI/BOOT/BOOTAA64.EFI of the ESP start up GRUB with a
separate ARM-specific grub.cfg, then one can well put together a rescue
image for DVD or USB-stick which works for x86 BIOS, for x86 EFI in both
word sizes and also for ARM (in both word sizes, if desired).


Have a nice day :)

Thomas

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Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Thomas Schmitt
Hi,

Alexander Graf wrote:
> U-Boot on x86 does not implement BIOS callbacks, so even if you wanted to
> you couldn't execute an MBR directly.

Oh. Sorry for the noise, then.


> So yes, it only loads proper payloads the same way as it does on ARM.

If the payloads are unlikely to be put into an ISO for other reasons,
then my doubts are appeased.

My best wishes for U-Boot's carreer as EFI firmware on ARM.
If problems appear with the very first stage of booting an ISO 9660
image, then be invited to include me or bug-xorr...@gnu.org in the
discussion.


Have a nice day :)

Thomas

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Re: [U-Boot] [PATCH] EFI: find EFI system partition by legacy MBR partition type

2017-07-06 Thread Alexander Graf

On 07/06/2017 04:16 PM, Thomas Schmitt wrote:

Hi,

Andre Przywara wrote:

U-Boot does not really have an
understanding yet of whether it is acting as an EFI implementation

If you use it to boot an ISO by its GRUB or SYSLINUX EFI equipment,
then you ask it to act as EFI implementation.
Maybe a compile time switch could restrict U-Boot to that role before
it gets written to the hardware where it shall be the EFI firmware ?

(Sorry, i am entirely software guy. Please don't laugh too loud about my
  idea of hardware and its relation to U-boot.)


If we really want to make it follow the EFI boot flow 100%, we probably 
need something smarter than the boot scriptlet we have today. We would 
also need to support boot from NVram stored devices for example. For 
now, I consider the boot target finding mechanism more of a best effort 
thing ;).





Does U-Boot actually support chain-loading boot sectors on x86? Or does
it entirely focus on loading either EFI apps or Linux kernels / U-Boot
boot scripts?

Hmm. From its use of the "active" flag of MBR partitions i maybe hastily
concluded that it would load and run what wikipedia calls the VBR of the
partition in
   https://en.wikipedia.org/wiki/Master_boot_record#System_bootstrapping

If U-Boot looks into the "active" partition's filesystem for boot-worthy
programs, then my objections and the following reasoning are possibly void.


Yup.


(One would still have to investigate whether files in ISO images might
  be mistaken as boot-worthy although the ISO producer did not intend them
  for being started.)


Well, nothing starts ISOs. Worst case there's an EFI binary at the 
removable media location on an iso - and in that case I surely hope the 
creator did intend that to get started :).



-
So only in case the "active" partition's VBR can indeed get chainloaded:

The reason why i give objections is that i want to keep the wiggle room
for bootable ISO 9660 images as wide as possible. Any further assumption
by the boot environment might block future improvements of such ISOs.


Today U-Boot really only looks for known locations of bootable files. It 
does not execute random binary code straight from partitions or raw 
block devices. So I think we're safe on that front.






Adding one more partition to that list should not cause much
harm, I think.

Your point is supported by the fact that in most x86 HDD bootable ISOs
the ISO 9660 partition is the "active" one and starts at LBA 0, thus
having the image MBR as first block. Should work therefore.

But LBA 0 as MBR partition start angers partition editors. In GPT it
is plainly illegal (although happily used). So i try to push producers of
GNU/Linux distro ISOs to have the ISO 9660 partition start at LBA 64
(counted with 512 byte blocks). At least the normal SYSLINUX isohybrid
MBR will not work if started from a partition with non-zero offset.

In any case the ISO producers are not necessarily aware that an "active"
flag might cause the start of the partition VBR.


It shouldn't, I agree. The only thing that happens based on the active 
flag here is that U-Boot tries to identify the file system on said 
partition and then tries to load hard coded file names from it.





Now I am not sure how this maps to the combination of U-Boot and x86 - I
am not very familiar with the combination of those two.

UEFI specs invite to have boot programs for various processor architectures
in the same ESP. Currently i only know of ISOs which combine 32-bit x86
and 64-bit x86.

But if one adds a set of ARM executable binaries to the ISO filesystem
and lets /EFI/BOOT/BOOTAA64.EFI of the ESP start up GRUB with a
separate ARM-specific grub.cfg, then one can well put together a rescue
image for DVD or USB-stick which works for x86 BIOS, for x86 EFI in both
word sizes and also for ARM (in both word sizes, if desired).


I'm fairly sure we can easily put together a disc that can be booted by 
BIOS x86, BIOS x86_64, UEFI x86(_64), edk2 based UEFI on ARM(64) and 
U-Boot based UEFI on ARM(64).



Alex

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Re: [U-Boot] mpc85xx boards

2017-07-06 Thread Simon Glass
Hi York,

On 5 July 2017 at 22:56, York Sun  wrote:
> I am not in a position to decide which board to drop. I can try my best
> to convert them.

OK thank you.

Regards,
Simon

>
> York
>
> On 07/06/2017 12:50 PM, Simon Glass wrote:
>> Hi York,
>>
>> OK...so all 250 are needed? Is there a plan to convert to Kconfig / DM?
>>
>> Regards,
>> Simon
>>
>> On 23 June 2017 at 07:10, York Sun  wrote:
>>> I tried to drop some old 85xx boards but got resistance from our silicon 
>>> support team. There is a demand to maintain those SoCs still shipping.
>>>
>>> York
>>>
>>> Sent from my iPhone
>>>
 On Jun 23, 2017, at 03:56, Simon Glass  wrote:

 Hi York,

 There are about 258 mpc85xx boards. In converting things to Kconfig quite 
 a bit of the work comes in this area. I am just wondering if all these 
 boards are still needed, or it would be possible to prune them a bit? I 
 see you have already done a bit of this.

 Regards,
 Simon

>>
>
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[U-Boot] [PATCH v3] powerpc, 8xx: Add support for MCR3000 board from CSSI

2017-07-06 Thread Christophe Leroy
CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.

This patch adds support for the first board.

Signed-off-by: Christophe Leroy 
---
 v3: Takes into account comments received from Heiko and Wolfgang

 Applies after the v2 serie 'powerpc, 8xx: Modernise the 8xx'

 .travis.yml |   2 +
 arch/powerpc/cpu/mpc8xx/Kconfig |   5 +
 board/cssi/MAINTAINERS  |   6 +
 board/cssi/MCR3000/Kconfig  |  15 ++
 board/cssi/MCR3000/MCR3000.c| 320 
 board/cssi/MCR3000/Makefile |  10 ++
 board/cssi/MCR3000/nand.c   |  65 
 board/cssi/MCR3000/u-boot.lds   |  91 
 configs/MCR3000_defconfig   |  88 +++
 drivers/net/mpc8xx_fec.c|  20 +++
 include/configs/MCR3000.h   | 162 
 11 files changed, 784 insertions(+)
 create mode 100644 board/cssi/MAINTAINERS
 create mode 100644 board/cssi/MCR3000/Kconfig
 create mode 100644 board/cssi/MCR3000/MCR3000.c
 create mode 100644 board/cssi/MCR3000/Makefile
 create mode 100644 board/cssi/MCR3000/nand.c
 create mode 100644 board/cssi/MCR3000/u-boot.lds
 create mode 100644 configs/MCR3000_defconfig
 create mode 100644 include/configs/MCR3000.h

diff --git a/.travis.yml b/.travis.yml
index 6f14ec2396..226c8313b1 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -210,6 +210,8 @@ matrix:
 - env:
 - BUILDMAN="mpc86xx"
 - env:
+- BUILDMAN="mpc8xx"
+- env:
 - BUILDMAN="siemens"
 - env:
 - BUILDMAN="tegra"
diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 9e1ad33c28..5a7db335ed 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -8,6 +8,9 @@ choice
prompt "Target select"
optional
 
+config TARGET_MCR3000
+   bool "Support MCR3000 board from CSSI"
+
 endchoice
 
 choice
@@ -167,4 +170,6 @@ config SYS_OR7_PRELIM
 config SYS_IMMR
hex "Value for IMMR"
 
+source "board/cssi/MCR3000/Kconfig"
+
 endmenu
diff --git a/board/cssi/MAINTAINERS b/board/cssi/MAINTAINERS
new file mode 100644
index 00..cbf1406a54
--- /dev/null
+++ b/board/cssi/MAINTAINERS
@@ -0,0 +1,6 @@
+BOARDS from CS Systemes d'Information
+M: Christophe Leroy 
+S: Maintained
+F: board/cssi/
+F: include/configs/MCR3000.h
+F: configs/MCR3000_defconfig
diff --git a/board/cssi/MCR3000/Kconfig b/board/cssi/MCR3000/Kconfig
new file mode 100644
index 00..ecfd90fd4c
--- /dev/null
+++ b/board/cssi/MCR3000/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_MCR3000
+
+config SYS_BOARD
+   default "MCR3000"
+
+config SYS_VENDOR
+   default "cssi"
+
+config SYS_CONFIG_NAME
+   default "MCR3000"
+
+config SYS_TEXT_BASE
+   default 0x0400
+
+endif
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
new file mode 100644
index 00..88dc6d7a36
--- /dev/null
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -0,0 +1,320 @@
+/*
+ * Copyright (C) 2010-2017 CS Systemes d'Information
+ * Florent Trinh Thai 
+ * Christophe Leroy 
+ *
+ * Board specific routines for the MCR3000 board
+ *
+ * - initialisation
+ * - memory controller
+ * - serial io initialisation
+ * - ethernet io initialisation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+#include 
+#endif
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+
+/* -
+ * constant
+ */
+static const uint cs1_dram_table_66[] = {
+   /* DRAM - single read. (offset 0 in upm RAM) */
+   0x0F3DFC04, 0x0FEFBC04, 0x00BE7804, 0x0FFDF400,
+   0x1C05, 0x, 0x, 0x,
+
+   /* DRAM - burst read. (offset 8 in upm RAM) */
+   0x0F3DFC04, 0x0FEFBC04, 0x00BF7C04, 0x00FFFC00,
+   0x00FFFC00, 0x00FEF800, 0x0FFDF400, 0x1C05,
+   0x, 0x, 0x, 0x,
+   0x, 0x, 0x, 0x,
+
+   /* DRAM - single write. (offset 18 in upm RAM) */
+   0x0F3DFC04, 0x0FEFB800, 0x00BF7404, 0x0FFEF804,
+   0x0FFDF404, 0x1C05, 0x, 0x,
+
+   /* DRAM - burst write. (offset 20 in upm RAM) */
+   0x0F3DFC04, 0x0FEFB800, 0x00BF7400, 0x00FFFC00,
+   0x00FFFC00, 0x00FFFC04, 0x0FFEF804, 0x0FFDF404,
+   0x1C05, 0x, 0x, 0x,
+   0x, 0x, 0x, 0x,
+
+   /* refresh  (offset 30 in upm RAM) */
+   0x0FFDF404, 0x0FFEBC04, 0x0FFD7C84, 0x0C04,
+   0x0C04, 0x0C04, 0x1C85, 0x,
+
+   /* init */
+   0x0FEEB874, 0x0FBD7474, 0x1C45, 0x,
+
+   /* exception. (offset 3c in upm RAM) */
+   0xFC05, 0x, 0x, 0x,
+};
+
+/* ---

Re: [U-Boot] [PATCH 11/11] dtoc: Add tests

2017-07-06 Thread sjg
Add some tests of dtoc's functionality to make it easier to expand and
enhance the tool.

Signed-off-by: Simon Glass 
---

 tools/dtoc/dtoc.py   |  31 -
 tools/dtoc/dtoc_test.dts |  12 ++
 tools/dtoc/dtoc_test_aliases.dts |  18 +++
 tools/dtoc/dtoc_test_empty.dts   |  12 ++
 tools/dtoc/dtoc_test_phandle.dts |  23 
 tools/dtoc/dtoc_test_simple.dts  |  48 +++
 tools/dtoc/test_dtoc.py  | 271 +++
 7 files changed, 411 insertions(+), 4 deletions(-)
 create mode 100644 tools/dtoc/dtoc_test.dts
 create mode 100644 tools/dtoc/dtoc_test_aliases.dts
 create mode 100644 tools/dtoc/dtoc_test_empty.dts
 create mode 100644 tools/dtoc/dtoc_test_phandle.dts
 create mode 100644 tools/dtoc/dtoc_test_simple.dts
 create mode 100644 tools/dtoc/test_dtoc.py

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Re: [U-Boot] [PATCH 10/11] sandbox: Stop printing platdata at the start of SPL

2017-07-06 Thread sjg
Currently we have code which prints out platform data at the start of SPL.
Now that we have tests for dtoc this is probably not necessary. Drop it.
Update test_ofplatdata to check for empty output since it is useful to
check that sandbox_spl works as expected.

Signed-off-by: Simon Glass 
---

 arch/sandbox/cpu/spl.c   | 11 ---
 test/py/tests/test_ofplatdata.py | 30 +-
 2 files changed, 1 insertion(+), 40 deletions(-)

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Re: [U-Boot] [PATCH] binman: Put our local modules ahead of system modules

2017-07-06 Thread sjg
Simon Glass  writes:

> If a system module is named the same as one of those used by binman we
> currently pick the system module. Adjust the ordering so that our modules
> are chosen instead.
>
> The module conflict reported was 'tools' from jira-python. I cannot access
> that package to test it.
>
> Signed-off-by: Simon Glass 
> Reported-by: Kevin Hilman 

While I removed the pip package that was causing me problems, this looks
basically like the workaround I had done locally.

Acked-by: Kevin Hilman 

Thanks for fixing it up,

Kevin

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Re: [U-Boot] [PATCH 09/11] dtoc: Add a comment about string replace in conv_name_to_c()

2017-07-06 Thread sjg
This function uses several separate string replaces where a regular
expression might seem more reasonable. Add a comment justifying the way it
is currently done.

Signed-off-by: Simon Glass 
---

 tools/dtoc/dtb_platdata.py | 3 +++
 1 file changed, 3 insertions(+)

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Re: [U-Boot] [PATCH 07/11] dtoc: Move static functions out of the class

2017-07-06 Thread sjg
Rather than using static functions within the class, move them out of the
class. This will make it slightly easier for tests to call them.

Signed-off-by: Simon Glass 
---

 tools/dtoc/dtb_platdata.py | 125 +++--
 1 file changed, 63 insertions(+), 62 deletions(-)

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Re: [U-Boot] [PATCH 06/11] dtoc: Pass include_disabled explicitly

2017-07-06 Thread sjg
This option is the only one actually used by the dtb_platdata class. Pass
it explicitly to avoid needing to pass the whole option object to the
constructor.

Signed-off-by: Simon Glass 
---

 tools/dtoc/dtb_platdata.py | 8 
 tools/dtoc/dtoc.py | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

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[U-Boot] [PATCH v2b 04/10] powerpc, 8xx: Implement GLL2 ERRATA

2017-07-06 Thread Christophe Leroy
Signed-off-by: Christophe Leroy 
---
 Takes into account comments received from Wolfgang and Heiko.
 Superseeds the one included in v2 of the serie 'powerpc, 8xx:
 Modernise the 8xx'. Not resending the entire serie.

 arch/powerpc/cpu/mpc8xx/cpu_init.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index cf1280983a..a51596a583 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -51,6 +51,26 @@ void cpu_init_f(immap_t __iomem *immr)
clrsetbits_be32(&immr->im_clkrst.car_sccr, ~SCCR_MASK,
CONFIG_SYS_SCCR);
 
+   /*
+* MPC866/885 ERRATA GLL2
+* Description:
+*   In 1:2:1 mode, when HRESET is detected at the positive edge of
+*   EXTCLK, then there will be a loss of phase between
+*   EXTCLK and CLKOUT.
+*
+* Workaround:
+*   Reprogram the SCCR:
+*   1.   Write 1'b00 to SCCR[EBDF].
+*   2.   Write 1'b01 to SCCR[EBDF].
+*   3.   Rewrite the desired value to the PLPRCR register.
+*/
+   reg = in_be32(&immr->im_clkrst.car_sccr);
+   /* Are we in mode 1:2:1 ? */
+   if ((reg & SCCR_EBDF11) == SCCR_EBDF01) {
+   clrbits_be32(&immr->im_clkrst.car_sccr, SCCR_EBDF11);
+   setbits_be32(&immr->im_clkrst.car_sccr, SCCR_EBDF01);
+   }
+
/* PLL (CPU clock) settings (15-30) */
 
out_be32(&immr->im_clkrstk.cark_plprcrk, KAPWR_KEY);
-- 
2.12.0

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Re: [U-Boot] [PATCH] binman: Put our local modules ahead of system modules

2017-07-06 Thread sjg
Simon Glass  writes:

> If a system module is named the same as one of those used by binman we
> currently pick the system module. Adjust the ordering so that our modules
> are chosen instead.
>
> The module conflict reported was 'tools' from jira-python. I cannot access
> that package to test it.
>
> Signed-off-by: Simon Glass 
> Reported-by: Kevin Hilman 

While I removed the pip package that was causing me problems, this looks
basically like the workaround I had done locally.

Acked-by: Kevin Hilman 

Thanks for fixing it up,

Kevin

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Re: [U-Boot] [PATCH v3 5/6] sandbox: Enable more console options

2017-07-06 Thread sjg
On Fri, Jun 16, 2017 at 11:37 AM, Simon Glass  wrote:
> Enable the pre-console buffer, displaying the model and post-relocation
> console announce on sandbox. Also add a model name to the device tree.
> This allows testing of these features.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v3:
> - Add new patch to enable more console options on sandbox
>
> Changes in v2: None
>
>  arch/sandbox/dts/sandbox.dts | 1 +
>  common/Kconfig   | 2 +-
>  configs/sandbox_defconfig| 2 ++
>  include/configs/sandbox.h| 1 +
>  4 files changed, 5 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 

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Re: [U-Boot] [PATCH v3 3/6] test: Add a test for snprintf() and the banner/version

2017-07-06 Thread sjg
On Fri, Jun 16, 2017 at 11:37 AM, Simon Glass  wrote:
> Add a simple test to make sure that these functions obey the buffer size
> passed into them.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v3: None
> Changes in v2:
> - Fix buffer overflow problem when there is not enough space for the build tag
> - Add test to check for buffer overflow problems
>
>  test/Makefile   |  1 +
>  test/print_ut.c | 83 
> +
>  2 files changed, 84 insertions(+)
>  create mode 100644 test/print_ut.c
>

Reviewed-by: Bin Meng 

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Re: [U-Boot] [PATCH v3 6/6] sandbox: Drop special case console code for sandbox

2017-07-06 Thread sjg
On Fri, Jun 16, 2017 at 11:37 AM, Simon Glass  wrote:
> At present sandbox has a special case where it directly calls os_putc()
> when it does not have a console yet.
>
> Now that we have the pre-console buffer enabled we can drop this. Any
> early characters will be buffered and output later.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v3:
> - Add new patch to drop special case console code for sandbox
>
> Changes in v2: None
>
>  common/console.c | 13 -
>  1 file changed, 13 deletions(-)
>

Reviewed-by: Bin Meng 

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Re: [U-Boot] [PATCH 08/11] dtoc: Move the main logic into the dtb_platdata file

2017-07-06 Thread sjg
Collect the main logic of dtoc into a function and put it into
dtb_platdata. This will allow tests to use this function instead of
duplicating the code themselves.

Signed-off-by: Simon Glass 
---

 tools/dtoc/dtb_platdata.py | 29 +
 tools/dtoc/dtoc.py | 19 ++-
 2 files changed, 31 insertions(+), 17 deletions(-)

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Re: [U-Boot] [PATCH 11/11] dtoc: Add tests

2017-07-06 Thread sjg
Add some tests of dtoc's functionality to make it easier to expand and
enhance the tool.

Signed-off-by: Simon Glass 
---

 tools/dtoc/dtoc.py   |  31 -
 tools/dtoc/dtoc_test.dts |  12 ++
 tools/dtoc/dtoc_test_aliases.dts |  18 +++
 tools/dtoc/dtoc_test_empty.dts   |  12 ++
 tools/dtoc/dtoc_test_phandle.dts |  23 
 tools/dtoc/dtoc_test_simple.dts  |  48 +++
 tools/dtoc/test_dtoc.py  | 271 +++
 7 files changed, 411 insertions(+), 4 deletions(-)
 create mode 100644 tools/dtoc/dtoc_test.dts
 create mode 100644 tools/dtoc/dtoc_test_aliases.dts
 create mode 100644 tools/dtoc/dtoc_test_empty.dts
 create mode 100644 tools/dtoc/dtoc_test_phandle.dts
 create mode 100644 tools/dtoc/dtoc_test_simple.dts
 create mode 100644 tools/dtoc/test_dtoc.py

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Re: [U-Boot] [PATCH 2/3] moveconfig: Allow control of which implying configs are shown

2017-07-06 Thread sjg
Sometimes it is useful to display CONFIG_TARGET or CONFIG_CMD configs. Add
an option to control this.

Also we generally ignore implying configs which affect fewer than 5
boards. But sometimes it is useful to show those those, so add an option
that reduces the minimum to two.

ERRATUM configs are never useful for implying things, so ignore those.

Signed-off-by: Simon Glass 
---

 tools/moveconfig.py | 36 
 1 file changed, 32 insertions(+), 4 deletions(-)

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Re: [U-Boot] [PATCH 05/11] dtoc: Don't handle properties with / in them

2017-07-06 Thread sjg
This conversion appears to not be needed as it does not occur in practice.
Drop it.

Signed-off-by: Simon Glass 
---

 tools/dtoc/dtb_platdata.py | 1 -
 1 file changed, 1 deletion(-)

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