[U-Boot] [PATCH v2 1/2] test: py: Use global pytestmark for hush tests
All tests in test_hush_if_test depends on hush parser to be
present. This patch simplify test dependencies by using global
pytestmark.
Reported-by: Stephen Warren
Signed-off-by: Michal Simek
---
Changes in v2:
- Fix line-wrapping in comming message
test/py/tests/test_hush_if_test.py | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/test/py/tests/test_hush_if_test.py
b/test/py/tests/test_hush_if_test.py
index b572538528e1..056a2880303e 100644
--- a/test/py/tests/test_hush_if_test.py
+++ b/test/py/tests/test_hush_if_test.py
@@ -8,6 +8,8 @@ import os
import os.path
import pytest
+pytestmark = pytest.mark.buildconfigspec('hush_parser')
+
# The list of "if test" conditions to test.
subtests = (
# Base if functionality.
@@ -109,27 +111,23 @@ def exec_hush_if(u_boot_console, expr, result):
response = u_boot_console.run_command(cmd)
assert response.strip() == str(result).lower()
-@pytest.mark.buildconfigspec('hush_parser')
def test_hush_if_test_setup(u_boot_console):
"""Set up environment variables used during the "if" tests."""
u_boot_console.run_command('setenv ut_var_nonexistent')
u_boot_console.run_command('setenv ut_var_exists 1')
-@pytest.mark.buildconfigspec('hush_parser')
@pytest.mark.parametrize('expr,result', subtests)
def test_hush_if_test(u_boot_console, expr, result):
"""Test a single "if test" condition."""
exec_hush_if(u_boot_console, expr, result)
-@pytest.mark.buildconfigspec('hush_parser')
def test_hush_if_test_teardown(u_boot_console):
"""Clean up environment variables used during the "if" tests."""
u_boot_console.run_command('setenv ut_var_exists')
-@pytest.mark.buildconfigspec('hush_parser')
# We might test this on real filesystems via UMS, DFU, 'save', etc.
# Of those, only UMS currently allows file removal though.
@pytest.mark.boardspec('sandbox')
--
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[U-Boot] [PATCH v2 2/2] test: py: hush: Add echo dependency
Some tests depends on echo command to be present.
Reported-by: Stephen Warren
Signed-off-by: Michal Simek
---
Changes in v2:
- New patch in this series
- Tested on sandbox
test/py/tests/test_hush_if_test.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/test/py/tests/test_hush_if_test.py
b/test/py/tests/test_hush_if_test.py
index 056a2880303e..c8f4208d3105 100644
--- a/test/py/tests/test_hush_if_test.py
+++ b/test/py/tests/test_hush_if_test.py
@@ -117,6 +117,7 @@ def test_hush_if_test_setup(u_boot_console):
u_boot_console.run_command('setenv ut_var_nonexistent')
u_boot_console.run_command('setenv ut_var_exists 1')
+@pytest.mark.buildconfigspec('cmd_echo')
@pytest.mark.parametrize('expr,result', subtests)
def test_hush_if_test(u_boot_console, expr, result):
"""Test a single "if test" condition."""
@@ -130,6 +131,7 @@ def test_hush_if_test_teardown(u_boot_console):
# We might test this on real filesystems via UMS, DFU, 'save', etc.
# Of those, only UMS currently allows file removal though.
+@pytest.mark.buildconfigspec('cmd_echo')
@pytest.mark.boardspec('sandbox')
def test_hush_if_test_host_file_exists(u_boot_console):
"""Test the "if test -e" shell command."""
--
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Re: [U-Boot] [PATCH v3 4/4] arm: socfpga: Add FPGA driver support for Arria 10
On Thu, May 18, 2017 at 3:03 AM, Dinh Nguyen wrote:
>
>
> On 05/15/2017 05:52 AM, tien.fong.c...@intel.com wrote:
> > From: Tien Fong Chee
> >
> > Add FPGA driver support for Arria 10.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/mach-socfpga/include/mach/fpga_manager.h | 2 +
> > .../include/mach/fpga_manager_arria10.h| 100 +
> > drivers/fpga/Makefile | 1 +
> > drivers/fpga/socfpga_arria10.c | 487
> +
> > include/configs/socfpga_common.h | 3 +-
> > 5 files changed, 592 insertions(+), 1 deletion(-)
> > create mode 100644 arch/arm/mach-socfpga/include/
> mach/fpga_manager_arria10.h
> > create mode 100644 drivers/fpga/socfpga_arria10.c
> >
> > diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
> b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
> > index b046c2c..a21c716 100644
> > --- a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
> > +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
> > @@ -12,6 +12,8 @@
> >
> > #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > #include
> > +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > +#include
> > #endif
> >
> > /* FPGA CD Ratio Value */
> > diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > new file mode 100644
> > index 000..18d9580
> > --- /dev/null
> > +++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
> > @@ -0,0 +1,100 @@
> > +/*
> > + * Copyright (C) 2017 Intel Corporation
> > + * All rights reserved.
> > + *
> > + * SPDX-License-Identifier:GPL-2.0
> > + */
> > +
> > +#ifndef _FPGA_MANAGER_ARRIA10_H_
> > +#define _FPGA_MANAGER_ARRIA10_H_
> > +
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK
> BIT(0)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK BIT(1)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK
> BIT(2)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_INITDONE_OE_SET_MSK BIT(3)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK
> BIT(4)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_OE_SET_MSK
> BIT(5)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK
> BIT(6)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_OE_SET_MSK
> BIT(7)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CVP_CONF_DONE_SET_MSKBIT(8)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_READY_SET_MSK BIT(9)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_DONE_SET_MSK BIT(10)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_PR_ERROR_SET_MSK BIT(11)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK
> BIT(12)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_NCEO_OE_SET_MSK BIT(13)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_SET_MSK
> BIT(16)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL1_SET_MSK
> BIT(17)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL2_SET_MSK
> BIT(18)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SET_MSD (\
> > + ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_SET_MSK |\
> > + ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL1_SET_MSK |\
> > + ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL2_SET_MSK)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_IMGCFG_FIFOEMPTY_SET_MSK BIT(24)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_IMGCFG_FIFOFULL_SET_MSK BIT(25)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_JTAGM_SET_MSKBIT(28)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_EMR_SET_MSK
> BIT(29)
> > +#define ALT_FPGAMGR_IMGCFG_STAT_F2S_MSEL0_LSB16
> > +
> > +#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NCONFIG_SET_MSK
> BIT(0)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_NSTATUS_SET_MSK
> BIT(1)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NENABLE_CONDONE_SET_MSK
> BIT(2)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NCONFIG_SET_MSK
> BIT(8)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_NSTATUS_OE_SET_MSK BIT(16)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_00_S2F_CONDONE_OE_SET_MSK BIT(24)
> > +
> > +#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NENABLE_CONFIG_SET_MSK BIT(0)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_PR_REQUEST_SET_MSK BIT(16)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_01_S2F_NCE_SET_MSKBIT(24)
> > +
> > +#define ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_CTRL_SET_MSKBIT(0)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_02_EN_CFG_DATA_SET_MSKBIT(8)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_SET_MSK
> 0x0003
> > +#define ALT_FPGAMGR_IMGCFG_CTL_02_CFGWIDTH_SET_MSK BIT(24)
> > +#define ALT_FPGAMGR_IMGCFG_CTL_02_CDRATIO_LSB16
> > +
> > +#ifndef __ASSEMBLY__
> > +
> > +struct socfpga_fpga_manager {
> > + u32 _pad_0x0_0x7[2];
> > + u32 dclkcnt;
> > + u32 dclkstat;
> > + u32 gpo;
> > + u32 gpi;
> > + u32 misci;
> > + u32 _pad_0x1c_0x2f[5];
> > + u32 emr_data0;
> > + u32 emr_data1;
> > + u32 emr_data2;
> > + u32 emr_data3;
> > + u32 emr_data4;
> > +
[U-Boot] [PATCH 1/1] reset: sti: add deassert counter in reset channel descriptor
From: Patrice Chotard
This deassert counter allow to manage "shared" reset lines
encountered in some specific case. On STiH410 SoC, DWC3,
EHCI and OHCI are all using a respective PHY, but all of
these PHYs shared a "global" reset.
Currently, during command "usb stop", all host controller are
stopped (XHCI, EHCI and OHCI). XHCI is first shutdowned, which
means that PHY global reset is asserted. Then EHCI is shutdowned,
but its PHY reset has already been asserted which make handshake()
call failed in ehci_shutdown().
This counter allows to really assert a reset lines only when the
"last" user is asserting it.
Signed-off-by: Patrice Chotard
---
drivers/reset/sti-reset.c | 41 ++---
1 file changed, 30 insertions(+), 11 deletions(-)
diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c
index 0c32a3d..a79708c 100644
--- a/drivers/reset/sti-reset.c
+++ b/drivers/reset/sti-reset.c
@@ -30,6 +30,8 @@ struct sti_reset {
* @reset_bit: Bit number in reset register.
* @ack_offset: Ack reset register offset in syscon bank.
* @ack_bit: Bit number in Ack reset register.
+ * @deassert_cnt: incremented when reset is deasserted, reset can only be
+ *asserted when equal to 0
*/
struct syscfg_reset_channel_data {
@@ -38,6 +40,7 @@ struct syscfg_reset_channel_data {
int reset_bit;
int ack_offset;
int ack_bit;
+ int deassert_cnt;
};
/**
@@ -54,7 +57,7 @@ struct syscfg_reset_controller_data {
bool wait_for_ack;
bool active_low;
int nr_channels;
- const struct syscfg_reset_channel_data *channels;
+ struct syscfg_reset_channel_data *channels;
};
/* STiH407 Peripheral powerdown definitions. */
@@ -102,7 +105,7 @@ static const char stih407_lpm[] = "st,stih407-lpm-syscfg";
#define SYSSTAT_4520 0x820
#define SYSCFG_40020x8
-static const struct syscfg_reset_channel_data stih407_powerdowns[] = {
+static struct syscfg_reset_channel_data stih407_powerdowns[] = {
[STIH407_EMISS_POWERDOWN] = STIH407_PDN_0(1),
[STIH407_NAND_POWERDOWN] = STIH407_PDN_0(0),
[STIH407_USB3_POWERDOWN] = STIH407_PDN_1(6),
@@ -122,7 +125,7 @@ static const struct syscfg_reset_channel_data
stih407_powerdowns[] = {
#define LPM_SYSCFG_1 0x4 /* Softreset IRB & SBC UART */
-static const struct syscfg_reset_channel_data stih407_softresets[] = {
+static struct syscfg_reset_channel_data stih407_softresets[] = {
[STIH407_ETH1_SOFTRESET] = STIH407_SRST_SBC(SYSCFG_4002, 4),
[STIH407_MMC1_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 3),
[STIH407_USB2_PORT0_SOFTRESET] = STIH407_SRST_CORE(SYSCFG_5132, 28),
@@ -161,7 +164,7 @@ static const struct syscfg_reset_channel_data
stih407_softresets[] = {
/* PicoPHY reset/control */
#define SYSCFG_50610x0f4
-static const struct syscfg_reset_channel_data stih407_picophyresets[] = {
+static struct syscfg_reset_channel_data stih407_picophyresets[] = {
[STIH407_PICOPHY0_RESET] = STIH407_SRST_CORE(SYSCFG_5061, 5),
[STIH407_PICOPHY1_RESET] = STIH407_SRST_CORE(SYSCFG_5061, 6),
[STIH407_PICOPHY2_RESET] = STIH407_SRST_CORE(SYSCFG_5061, 7),
@@ -223,7 +226,7 @@ static int sti_reset_program_hw(struct reset_ctl
*reset_ctl, int assert)
struct udevice *dev = reset_ctl->dev;
struct syscfg_reset_controller_data *reset_desc =
(struct syscfg_reset_controller_data *)(dev->driver_data);
- struct syscfg_reset_channel_data ch;
+ struct syscfg_reset_channel_data *ch;
phys_addr_t base;
u32 ctrl_val = reset_desc->active_low ? !assert : !!assert;
void __iomem *reg;
@@ -235,19 +238,35 @@ static int sti_reset_program_hw(struct reset_ctl
*reset_ctl, int assert)
/* get reset sysconf register base address */
base =
sti_reset_get_regmap(reset_desc->channels[reset_ctl->id].compatible);
- ch = reset_desc->channels[reset_ctl->id];
- reg = (void __iomem *)base + ch.reset_offset;
+ ch = &reset_desc->channels[reset_ctl->id];
+
+ /* check the deassert counter to assert reset when it reaches 0 */
+ if (!assert) {
+ ch->deassert_cnt++;
+ if (ch->deassert_cnt > 1)
+ return 0;
+ } else {
+ if (ch->deassert_cnt > 0) {
+ ch->deassert_cnt--;
+ if (ch->deassert_cnt > 0)
+ return 0;
+ } else
+ error("Reset balancing error: reset_ctl=%p dev=%p
id=%lu\n",
+ reset_ctl, reset_ctl->dev, reset_ctl->id);
+ }
+
+ reg = (void __iomem *)base + ch->reset_offset;
if (ctrl_val)
- generic_set_bit(ch.reset_bit, reg);
+ generic_set_bit(ch->reset_bit, reg);
else
- generic_clear_bit(ch.reset_bit, reg);
+ generic_clear_bit(ch->reset_bit, reg);
[U-Boot] [PATCH] rockchip: dts: rk3328: add aliases for mmc controller
Add aliases for mmc controller to get a fixed order with
emmc at index 0 and sdmmc at index 1.
Signed-off-by: Kever Yang
---
arch/arm/dts/rk3328.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 8a98ee3..e1af030 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -25,6 +25,9 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
+ mmc0 = &emmc;
+ mmc1 = &sdmmc;
+ mmc2 = &sdmmc_ext;
};
cpus {
--
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Re: [U-Boot] [PATCH V2 12/12] imx: mx7dsabresd: add board revision check
Hi Peng,
On 18/04/2017 02:54, Peng Fan wrote:
> Hi Fabio,
>
>> -Original Message-
>> From: Fabio Estevam [mailto:feste...@gmail.com]
>> Sent: Monday, April 17, 2017 11:00 PM
>> To: Peng Fan
>> Cc: Stefano Babic ; U-Boot-Denx
>> Subject: Re: [U-Boot] [PATCH V2 12/12] imx: mx7dsabresd: add board revision
>> check
>>
>> On Thu, Apr 13, 2017 at 3:10 AM, Peng Fan wrote:
>>
>>> +#define BOARD_REV_C 0x300
>>> +#define BOARD_REV_B 0x200
>>> +#define BOARD_REV_A 0x100
>>> +
>>> +static int mx7sabre_rev(void)
>>> +{
>>> + /*
>>> +* Get Board ID information from OCOTP_GP1[15:8]
>>> +* i.MX7D SDB RevA: 0x41
>>> +* i.MX7D SDB RevB: 0x42
>>
>> Isn't this versioning scheme shared with other NXP boards? If so, it would be
>> better to put this in common code.
>
> I prefer to keep the code here. There are board revision fuse for the boards
> from NXP, but
> this is not always true, I think.
>
Patches 1..11 are free of comments. I am merging them and I will send PR
to Tom for inclusion after my build test. I will just let this last one out.
Regards,
Stefano
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Re: [U-Boot] [PATCH v5 20/33] ARM: i.MX6: sabresd: Add dm_gpio_* for backlight
On Thu, May 11, 2017 at 10:53 PM, Fabio Estevam wrote:
> On Thu, May 4, 2017 at 12:11 PM, Jagan Teki wrote:
>> From: Jagan Teki
>>
>> For OF_CONTROL, gpio's need to configure through
>> dm_gpio_* calls instead of non-dm gpio code, So
>> add dm_gpio_* calls for dts supported code.
>>
>> Cc: Stefano Babic
>> Cc: Fabio Estevam
>> Cc: Michael Trimarchi
>> Signed-off-by: Jagan Teki
>> ---
>> board/freescale/mx6sabresd/mx6sabresd.c | 22 ++
>> 1 file changed, 22 insertions(+)
>>
>> diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
>> b/board/freescale/mx6sabresd/mx6sabresd.c
>> index 3f73b9b..1df81b9 100644
>> --- a/board/freescale/mx6sabresd/mx6sabresd.c
>> +++ b/board/freescale/mx6sabresd/mx6sabresd.c
>> @@ -190,7 +190,29 @@ static iomux_v3_cfg_t const bl_pads[] = {
>> static void enable_backlight(void)
>> {
>> imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads));
>> +
>> +#ifdef CONFIG_OF_CONTROL
>> + struct gpio_desc backlight;
>> + int ret;
>> +
>> + /* Set Brightness to high */
>> + ret = dm_gpio_lookup_name("GPIO1_21", &backlight);
>
> Can't we avoid such hardcoded GPIO and use dts to retrieve it?
I think this backlight IMX_GPIO_NR(1, 21) gpio is related to board
code here in U-boot, couldn't see the node related to this on dts.
thanks!
--
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] [PATCH V2 09/12] imx: mx7dsabresd: enable more DM drivers
Hi Peng, On 13/04/2017 08:09, Peng Fan wrote: > Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO > enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled. > So needs to enable them together. > > Signed-off-by: Peng Fan > Cc: Stefano Babic > --- > > V2: > None > > board/freescale/mx7dsabresd/mx7dsabresd.c | 288 > ++ > configs/mx7dsabresd_defconfig | 21 +++ This does not patch mx7dsabresd_secure_defconfig, that results then broken. I have just fixed in my local branch and I send a patch for it (I can just test build). Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] imx: mx7dsabresd: fix secure config after switching to DM
mx7dsabresd_secure_defconfig was not updated after moving to DM. Signed-off-by: Stefano Babic --- configs/mx7dsabresd_secure_defconfig | 26 -- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/configs/mx7dsabresd_secure_defconfig b/configs/mx7dsabresd_secure_defconfig index 2e8b5be..c678e75 100644 --- a/configs/mx7dsabresd_secure_defconfig +++ b/configs/mx7dsabresd_secure_defconfig @@ -1,11 +1,13 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_TARGET_MX7DSABRESD=y +CONFIG_VIDEO=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +# CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y # CONFIG_CMD_BMODE is not set -CONFIG_VIDEO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -31,15 +33,35 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +# CONFIG_BLK is not set CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_DM_GPIO=y +CONFIG_DM_74X164=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +# CONFIG_DM_MMC_OPS is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SPI=y +CONFIG_SOFT_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_STORAGE=y @@ -49,4 +71,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="FSL" CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 -CONFIG_OF_LIBFDT=y +CONFIG_ERRNO_STR=y -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: mx7dsabresd: fix secure config after switching to DM
> -Original Message- > From: Stefano Babic [mailto:sba...@denx.de] > Sent: Thursday, May 18, 2017 4:48 PM > To: u-boot@lists.denx.de > Cc: Peng Fan ; Adrian Alonso Lazcano > ; Stefano Babic > Subject: [PATCH] imx: mx7dsabresd: fix secure config after switching to DM > > mx7dsabresd_secure_defconfig was not updated after moving to DM. > > Signed-off-by: Stefano Babic Reviewed-by: Peng Fan Thanks, Peng. > --- > configs/mx7dsabresd_secure_defconfig | 26 -- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/configs/mx7dsabresd_secure_defconfig > b/configs/mx7dsabresd_secure_defconfig > index 2e8b5be..c678e75 100644 > --- a/configs/mx7dsabresd_secure_defconfig > +++ b/configs/mx7dsabresd_secure_defconfig > @@ -1,11 +1,13 @@ > CONFIG_ARM=y > CONFIG_ARCH_MX7=y > CONFIG_TARGET_MX7DSABRESD=y > +CONFIG_VIDEO=y > CONFIG_ARMV7_BOOT_SEC_DEFAULT=y > +# CONFIG_ARMV7_VIRT is not set > CONFIG_IMX_RDC=y > CONFIG_IMX_BOOTAUX=y > # CONFIG_CMD_BMODE is not set > -CONFIG_VIDEO=y > +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" > > CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd > /imximage.cfg" > CONFIG_BOOTDELAY=3 > # CONFIG_CONSOLE_MUX is not set > @@ -31,15 +33,35 @@ CONFIG_CMD_MII=y > CONFIG_CMD_PING=y > CONFIG_CMD_BMP=y > CONFIG_CMD_CACHE=y > +CONFIG_CMD_PMIC=y > +CONFIG_CMD_REGULATOR=y > CONFIG_CMD_EXT2=y > CONFIG_CMD_EXT4=y > CONFIG_CMD_EXT4_WRITE=y > CONFIG_CMD_FAT=y > +CONFIG_OF_CONTROL=y > +# CONFIG_BLK is not set > CONFIG_DFU_MMC=y > CONFIG_DFU_RAM=y > +CONFIG_DM_GPIO=y > +CONFIG_DM_74X164=y > +CONFIG_DM_I2C=y > +CONFIG_DM_MMC=y > +# CONFIG_DM_MMC_OPS is not set > CONFIG_SPI_FLASH=y > CONFIG_SPI_FLASH_EON=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_IMX7=y > +CONFIG_DM_PMIC=y > +CONFIG_DM_PMIC_PFUZE100=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_PFUZE100=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_GPIO=y > +CONFIG_DM_SPI=y > +CONFIG_SOFT_SPI=y > CONFIG_USB=y > +CONFIG_DM_USB=y > CONFIG_USB_EHCI_HCD=y > CONFIG_MXC_USB_OTG_HACTIVE=y > CONFIG_USB_STORAGE=y > @@ -49,4 +71,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y > CONFIG_G_DNL_MANUFACTURER="FSL" > CONFIG_G_DNL_VENDOR_NUM=0x0525 > CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 > -CONFIG_OF_LIBFDT=y > +CONFIG_ERRNO_STR=y > -- > 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH V2 12/12] imx: mx7dsabresd: add board revision check
> -Original Message-
> From: Stefano Babic [mailto:sba...@denx.de]
> Sent: Thursday, May 18, 2017 4:20 PM
> To: Peng Fan ; Fabio Estevam
> Cc: Stefano Babic ; U-Boot-Denx
> Subject: Re: [U-Boot] [PATCH V2 12/12] imx: mx7dsabresd: add board revision
> check
>
> Hi Peng,
Hi Stefano,
>
> On 18/04/2017 02:54, Peng Fan wrote:
> > Hi Fabio,
> >
> >> -Original Message-
> >> From: Fabio Estevam [mailto:feste...@gmail.com]
> >> Sent: Monday, April 17, 2017 11:00 PM
> >> To: Peng Fan
> >> Cc: Stefano Babic ; U-Boot-Denx
> >>
> >> Subject: Re: [U-Boot] [PATCH V2 12/12] imx: mx7dsabresd: add board
> >> revision check
> >>
> >> On Thu, Apr 13, 2017 at 3:10 AM, Peng Fan wrote:
> >>
> >>> +#define BOARD_REV_C 0x300
> >>> +#define BOARD_REV_B 0x200
> >>> +#define BOARD_REV_A 0x100
> >>> +
> >>> +static int mx7sabre_rev(void)
> >>> +{
> >>> + /*
> >>> +* Get Board ID information from OCOTP_GP1[15:8]
> >>> +* i.MX7D SDB RevA: 0x41
> >>> +* i.MX7D SDB RevB: 0x42
> >>
> >> Isn't this versioning scheme shared with other NXP boards? If so, it
> >> would be better to put this in common code.
> >
> > I prefer to keep the code here. There are board revision fuse for the
> > boards from NXP, but this is not always true, I think.
> >
>
> Patches 1..11 are free of comments. I am merging them and I will send PR to
> Tom for inclusion after my build test. I will just let this last one out.
It is ok for me to let this out. Thanks.
Thanks,
Peng.
>
> Regards,
> Stefano
>
>
> --
>
> =
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> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
>
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Re: [U-Boot] [PATCH v2] fastboot: Add support for flashing zImage
On 18 May 2017 at 01:20, Tom Rini wrote:
> On Wed, May 17, 2017 at 08:20:47PM +0300, Sam Protsenko wrote:
>
>> This patch adds support for flashing zImage to the Android boot
>> partition on eMMC.
> [snip]
>> +#ifdef CONFIG_ANDROID_BOOT_IMAGE
>> + if (strcmp(cmd, "zImage") == 0 || strcmp(cmd, "zimage") == 0) {
>
> strncasecmp(cmd, "zimage", 6) ?
>
Good catch, didn't know this routine exists. Will fix it in v3.
>> diff --git a/include/android_image.h b/include/android_image.h
>> index dfd4d9d72c..c058b1d388 100644
>> --- a/include/android_image.h
>> +++ b/include/android_image.h
>> @@ -12,6 +12,8 @@
>> #ifndef _ANDROID_IMAGE_H_
>> #define _ANDROID_IMAGE_H_
>>
>> +#include
>> +
>> typedef struct andr_img_hdr andr_img_hdr;
>>
>> #define ANDR_BOOT_MAGIC "ANDROID!"
>
> Unneeded.
>
If you remove that inclusion, build will fail with errors like this:
include/android_image.h:28:2: error: unknown type name ‘u32’
So it should be included either in android_image.h, or I should
include it in common/fb_mmc.c *before* including android_image.h.
Which is (I presume) a bad style. So I incline to do that the way I
did it. If you still don't agree -- I'll rework it.
>> diff --git a/include/linux/compat.h b/include/linux/compat.h
>> index a43e4d6698..b0ff6b91f0 100644
>> --- a/include/linux/compat.h
>> +++ b/include/linux/compat.h
>> @@ -111,6 +111,9 @@ static inline void kmem_cache_destroy(struct kmem_cache
>> *cachep)
>>
>> #define PAGE_SIZE4096
>>
>> +/* to align the pointer to the (next) page boundary */
>> +#define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE)
>
> Just use ALIGN() in the code you're writing? This is for things we're
> pulling directly from Linux really.
>
Thought it would be more clear that way. Btw, I pulled PAGE_ALIGN()
from kernel (from include/linux/mm.h). But it's not important to me,
so if you want me to use ALIGN() -- I will change it in v3.
> Thanks!
>
> --
> Tom
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Re: [U-Boot] [PATCH] arm: dts: imx: add aliases for usbotg nodes
On 24/04/2017 23:20, Alexey Ignatov wrote: > Aliases must be present for USB gadget with DM_USB. Without this, > usb_setup_ehci_gadget() fails because it can't find required devices > in UCLASS_USB. > > Signed-off-by: Alexey Ignatov > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mx6sabresd: Add SPL support for the mx6dl variant
Hi Fabio, On 12/05/2017 17:45, Fabio Estevam wrote: > Add support for the mx6dlsabresd board in SPL. > > Retrieved the DCD table from: > board/freescale/mx6sabresd/mx6dlsabresd.cfg > (NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga) > > Flashed SPL and u-boot.img to an SD card and could successfully boot it > on mx6q, mx6qp and mx6dl sabresd boards. > > Signed-off-by: Fabio Estevam > --- Thanks for doing this. Applied (both patches) to u-boot-imx. Best regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH V2 12/12] imx: mx7dsabresd: add board revision check
On 18/05/2017 10:51, Peng Fan wrote: >> Patches 1..11 are free of comments. I am merging them and I will send PR to >> Tom for inclusion after my build test. I will just let this last one out. > > It is ok for me to let this out. Thanks. ok - just check with patch I send today to fix the "secure" variant, then I could insert this to my PR. Thanks, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] net: usb: mcs7830: fix no DM recive path
The function mcs7830_recv_common() returns a negative value on error, 0
or positive value on success.
Modifications:
* Fix the condition for calling the function net_process_received_packet().
* The return value of the function mcs7830_recv() reflects the success of
the function mcs7830_recv_common().
Signed-off-by: Uri Mashiach
---
v1 -> v2: update the commit message.
drivers/usb/eth/mcs7830.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
index 9d6cf8c..4abef5d 100644
--- a/drivers/usb/eth/mcs7830.c
+++ b/drivers/usb/eth/mcs7830.c
@@ -622,10 +622,12 @@ static int mcs7830_recv(struct eth_device *eth)
int len;
len = mcs7830_recv_common(ueth, buf);
- if (len <= 0)
+ if (len >= 0) {
net_process_received_packet(buf, len);
+ return 0;
+ }
- return 0;
+ return len;
}
/*
--
2.7.4
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Re: [U-Boot] [PATCH 0/2] Gateworks Ventana watchdog fix
On 15/05/2017 19:05, Tim Harvey wrote: > This series resovles a couple of issues with the Gateworks Ventana > IMX6 watchdog device-tree fixups. > > Tim Harvey (2): > imx: ventana: fix GW520x external watchdog dt update > imx: ventana: update imx wdog external reset dt property > > board/gateworks/gw_ventana/gw_ventana.c | 31 +++ > 1 file changed, 15 insertions(+), 16 deletions(-) > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: pci: imx: add imx_pcie_remove function
On 12/05/2017 21:58, Tim Harvey wrote:
> There is no dedicated reset signal wired up for the MX6QDL thus if the
> bootloader enables the link we need some special handling to get the core
> back into a state where it is safe to touch it for configuration.
>
> While there has been some special handling in the Linux kernel to do this,
> it was removed in 4.11 thus we need to do it properly in the bootloader
> and therefore without this if you enable PCI in the bootloader you will hang
> while booting the 4.11 kernel.
>
> This puts the PCIe controller back into a safe state for the kernel driver
> before launching the kernel.
>
> Signed-off-by: Tim Harvey
> ---
> arch/arm/imx-common/cpu.c | 3 +++
> drivers/pci/pcie_imx.c| 38 ++
> include/pci.h | 4
> 3 files changed, 45 insertions(+)
>
> diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
> index 40fe813..74bdd24 100644
> --- a/arch/arm/imx-common/cpu.c
> +++ b/arch/arm/imx-common/cpu.c
> @@ -275,6 +275,9 @@ u32 get_ahb_clk(void)
>
> void arch_preboot_os(void)
> {
> +#if defined(CONFIG_PCIE_IMX)
> + imx_pcie_remove();
> +#endif
> #if defined(CONFIG_CMD_SATA)
> sata_stop();
> #if defined(CONFIG_MX6)
> diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
> index 732d59d..eab0a2b 100644
> --- a/drivers/pci/pcie_imx.c
> +++ b/drivers/pci/pcie_imx.c
> @@ -42,6 +42,9 @@
>
> /* PCIe Port Logic registers (memory-mapped) */
> #define PL_OFFSET 0x700
> +#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
> +#define PCIE_PL_PFLR_LINK_STATE_MASK (0x3f << 16)
> +#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
> #define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
> #define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
> #define PCIE_PHY_DEBUG_R1_LINK_UP(1 << 4)
> @@ -445,6 +448,36 @@ static int imx6_pcie_assert_core_reset(void)
> /* Power up PCIe PHY */
> setbits_le32(&gpc_regs->cntr, PCIE_PHY_PUP_REQ);
> #else
> + /*
> + * If the bootloader already enabled the link we need some special
> + * handling to get the core back into a state where it is safe to
> + * touch it for configuration. As there is no dedicated reset signal
> + * wired up for MX6QDL, we need to manually force LTSSM into "detect"
> + * state before completely disabling LTSSM, which is a prerequisite
> + * for core configuration.
> + *
> + * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong
> + * indication that the bootloader activated the link.
> + */
> + if (is_mx6dq()) {
> + u32 val, gpr1, gpr12;
> +
> + gpr1 = readl(&iomuxc_regs->gpr[1]);
> + gpr12 = readl(&iomuxc_regs->gpr[12]);
> + if ((gpr1 & IOMUXC_GPR1_PCIE_REF_CLK_EN) &&
> + (gpr12 & IOMUXC_GPR12_PCIE_CTL_2)) {
> + val = readl(MX6_DBI_ADDR + PCIE_PL_PFLR);
> + val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
> + val |= PCIE_PL_PFLR_FORCE_LINK;
> +
> + imx_pcie_fix_dabt_handler(true);
> + writel(val, MX6_DBI_ADDR + PCIE_PL_PFLR);
> + imx_pcie_fix_dabt_handler(false);
> +
> + gpr12 &= ~IOMUXC_GPR12_PCIE_CTL_2;
> + writel(val, &iomuxc_regs->gpr[12]);
> + }
> + }
> setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
> clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
> #endif
> @@ -652,6 +685,11 @@ void imx_pcie_init(void)
> }
> }
>
> +void imx_pcie_remove(void)
> +{
> + imx6_pcie_assert_core_reset();
> +}
> +
> /* Probe function. */
> void pci_init_board(void)
> {
> diff --git a/include/pci.h b/include/pci.h
> index d3c955e..c8ef997 100644
> --- a/include/pci.h
> +++ b/include/pci.h
> @@ -754,6 +754,10 @@ int pci_last_busno(void);
> extern void pci_mpc85xx_init (struct pci_controller *hose);
> #endif
>
> +#ifdef CONFIG_PCIE_IMX
> +extern void imx_pcie_remove(void);
> +#endif
> +
> #if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
> /**
> * pci_write_bar32() - Write the address of a BAR including control bits
>
Ok, I see - now the question to Jagan. Tim has not time to move to DM,
and you propose yourself as volunteer (welcome !) to do this job. Of
course, I will not let things broken if move cannot be done, but I will
prefer to wait having a proper long time fix.
Best regards,
Stefano
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Re: [U-Boot] [PATCH V2] pinctrl: imx: fix memory leak
On 11/05/2017 11:34, Peng Fan wrote:
> Each time set_state is called, a new piece memory will
> be allocated for pin_data, but not freed, this will
> incur memory leak.
>
> When error, the devm API could not free memory automatically.
> So need call devm_kfree when error.
>
> Issue reported by Coverity
>
> Signed-off-by: Peng Fan
> Cc: Simon Glass
> Cc: Stefan Agner
> Cc: Stefano Babic
> ---
> drivers/pinctrl/nxp/pinctrl-imx.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c
> b/drivers/pinctrl/nxp/pinctrl-imx.c
> index f0321c4..ebc14a3 100644
> --- a/drivers/pinctrl/nxp/pinctrl-imx.c
> +++ b/drivers/pinctrl/nxp/pinctrl-imx.c
> @@ -53,6 +53,7 @@ static int imx_pinctrl_set_state(struct udevice *dev,
> struct udevice *config)
> if (fdtdec_get_int_array(gd->fdt_blob, node, "fsl,pins",
>pin_data, size >> 2)) {
> dev_err(dev, "Error reading pin data.\n");
> + devm_kfree(dev, pin_data);
> return -EINVAL;
> }
>
> @@ -78,6 +79,7 @@ static int imx_pinctrl_set_state(struct udevice *dev,
> struct udevice *config)
>
> if ((mux_reg == -1) || (conf_reg == -1)) {
> dev_err(dev, "Error mux_reg or conf_reg\n");
> + devm_kfree(dev, pin_data);
> return -EINVAL;
> }
>
> @@ -166,6 +168,8 @@ static int imx_pinctrl_set_state(struct udevice *dev,
> struct udevice *config)
> }
> }
>
> + devm_kfree(dev, pin_data);
> +
> return 0;
> }
>
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH 08/14] usb: dwc3: Add helper functions to enable snooping and burst settings
On 05/16/2017 09:32 PM, Tom Rini wrote:
> On Tue, May 16, 2017 at 08:16:28PM +0800, yinbo.zhu wrote:
>
>> From: Rajat Srivastava
>>
>> Adds helper functions to enable snooping and outstanding burst beat
>> settings.
>>
>> Signed-off-by: Rajat Srivastava
>> Signed-off-by: Rajesh Bhagat
>> ---
>> drivers/usb/dwc3/core.c | 45 +
>> drivers/usb/dwc3/core.h | 7 +++
>> 2 files changed, 52 insertions(+)
>>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 85cc96a..4ac599a 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -599,6 +599,51 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
>>
>> #define DWC3_ALIGN_MASK (16 - 1)
>>
>> +void dwc3_core_incr_burst_enable(int index, int btype_incr_val,
>> + int breq_limit)
>> +{
>> +struct dwc3 *dwc;
>> +u32 reg;
>> +
>> +list_for_each_entry(dwc, &dwc3_list, list) {
>> +if (dwc->index != index)
>> +continue;
>> +
>> +/*
>> + * Change burst beat and outstanding pipelined
>> + * transfers requests
>> + */
>> +reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0);
>> +reg = (reg & ~DWC3_INCR_BTYPE_MASK) | btype_incr_val;
>> +dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, reg);
>> +
>> +reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG1);
>> +reg = (reg & ~DWC3_BREQ_LIMIT_MASK) | (breq_limit << 8);
>> +dwc3_writel(dwc->regs, DWC3_GSBUSCFG1, reg);
>> +break;
>> +}
>> +}
>> +
>> +void dwc3_core_set_snooping(int index, bool snoop)
>> +{
>> +struct dwc3 *dwc;
>> +u32 reg;
So how do you discern which controller should have this value
increased/set and which shouldn't ? I believe that information
should come from DT ... hacking it up such that you change it
for all controllers doesn't scale.
>> +list_for_each_entry(dwc, &dwc3_list, list) {
>> +if (dwc->index != index)
>> +continue;
>> +
>> +/* Enable/Disable snooping */
>> +reg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0);
>> +if (snoop)
>> +reg |= DWC3_SNOOP_ENABLE;
>> +else
>> +reg &= ~DWC3_SNOOP_ENABLE;
>> +dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, reg);
>> +break;
>> +}
>> +}
>> +
>> /**
>> * dwc3_uboot_init - dwc3 core uboot initialization code
>> * @dwc3_dev: struct dwc3_device containing initialization data
>> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
>> index 72d2fcd..455e7fa 100644
>> --- a/drivers/usb/dwc3/core.h
>> +++ b/drivers/usb/dwc3/core.h
>> @@ -593,6 +593,13 @@ struct dwc3_hwparams {
>> /* HWPARAMS7 */
>> #define DWC3_RAM1_DEPTH(n) ((n) & 0x)
>>
>> +/* GSBUSCFG0 */
>> +#define DWC3_SNOOP_ENABLE (0x)
>> +#define DWC3_INCR_BTYPE_MASK(0xff)
>> +
>> +/* GSBUSCFG1 */
>> +#define DWC3_BREQ_LIMIT_MASK(0xf00)
Drop the parenthesis ...
>> struct dwc3_request {
>> struct usb_request request;
>> struct list_headlist;
>
> Marek?
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2] net: usb: mcs7830: fix no DM recive path
On 05/18/2017 11:04 AM, Uri Mashiach wrote:
> The function mcs7830_recv_common() returns a negative value on error, 0
> or positive value on success.
>
> Modifications:
So you want to drop this "Modifications" part and just somehow grind
these two lines into the commit message.
> * Fix the condition for calling the function net_process_received_packet().
> * The return value of the function mcs7830_recv() reflects the success of
> the function mcs7830_recv_common().
>
> Signed-off-by: Uri Mashiach
> ---
> v1 -> v2: update the commit message.
>
> drivers/usb/eth/mcs7830.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
> index 9d6cf8c..4abef5d 100644
> --- a/drivers/usb/eth/mcs7830.c
> +++ b/drivers/usb/eth/mcs7830.c
> @@ -622,10 +622,12 @@ static int mcs7830_recv(struct eth_device *eth)
> int len;
>
> len = mcs7830_recv_common(ueth, buf);
> - if (len <= 0)
> + if (len >= 0) {
> net_process_received_packet(buf, len);
> + return 0;
> + }
>
> - return 0;
> + return len;
> }
>
> /*
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3 5/7] usb: host: ohci-generic: add CLOCK support
On 05/17/2017 03:34 PM, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> use list to save reference to enabled clocks in order to
> disabled them in case of error during probe() or
> during driver removal.
>
> Signed-off-by: Patrice Chotard
> ---
>
> v3: _ extract in this patch the CLOCK support add-on from previous patch 5
> _ keep enabled clocks reference in list in order to
> disable clocks in error path or in .remove callback
>
> v2: _ add error path management
> _ add .remove callback
>
> drivers/usb/host/ohci-generic.c | 81
> -
> 1 file changed, 80 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
> index f3307f4..a6d89a8 100644
> --- a/drivers/usb/host/ohci-generic.c
> +++ b/drivers/usb/host/ohci-generic.c
> @@ -5,6 +5,7 @@
> */
>
> #include
> +#include
> #include
> #include "ohci.h"
>
> @@ -12,20 +13,98 @@
> # error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW"
> #endif
>
> +struct ohci_clock {
> + struct clk *clk;
> + struct list_head list;
> +};
> +
> struct generic_ohci {
> ohci_t ohci;
> + struct list_head clks;
> };
>
> +static int ohci_release_clocks(struct generic_ohci *priv)
> +{
> + struct ohci_clock *ohci_clock, *tmp;
> + struct clk *clk;
> + int ret;
> +
> + list_for_each_entry_safe(ohci_clock, tmp, &priv->clks, list) {
> + clk = ohci_clock->clk;
> +
> + clk_request(clk->dev, clk);
> + if (ret)
> + return ret;
> +
> + clk_disable(clk);
> +
> + ret = clk_free(clk);
> + if (ret)
> + return ret;
> +
> + list_del(&ohci_clock->list);
> + }
> + return 0;
> +}
> +
> static int ohci_usb_probe(struct udevice *dev)
> {
> struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev);
> + struct generic_ohci *priv = dev_get_priv(dev);
> + int i, ret;
> +
> + INIT_LIST_HEAD(&priv->clks);
> +
> + for (i = 0; ; i++) {
> + struct ohci_clock *ohci_clock;
> + struct clk *clk;
> +
> + clk = devm_kmalloc(dev, sizeof(*clk), GFP_KERNEL);
Since you know how many entries the clock phandle has, you can allocate
an array and drop this while list handling and this per-element kmalloc,
which fragments the allocator pool.
> + if (!clk) {
> + error("Can't allocate resource\n");
> + goto clk_err;
> + }
> +
> + ret = clk_get_by_index(dev, i, clk);
> + if (ret < 0)
> + break;
> +
> + if (clk_enable(clk)) {
> + error("failed to enable ohci_clock %d\n", i);
> + clk_free(clk);
> + goto clk_err;
> + }
> + clk_free(clk);
> +
> + /*
> + * add enabled clocks into clks list in order to be disabled
> + * later on ohci_usb_remove() call or in error path if needed
> + */
> + ohci_clock = devm_kmalloc(dev, sizeof(*ohci_clock), GFP_KERNEL);
Can't you just embed one structure into the other ?
> + if (!ohci_clock) {
> + error("Can't allocate resource\n");
> + goto clk_err;
> + }
> + ohci_clock->clk = clk;
> + list_add(&ohci_clock->list, &priv->clks);
> + }
>
> return ohci_register(dev, regs);
> +
> +clk_err:
> + return ohci_release_clocks(priv);
> }
>
> static int ohci_usb_remove(struct udevice *dev)
> {
> - return ohci_deregister(dev);
> + struct generic_ohci *priv = dev_get_priv(dev);
> + int ret;
> +
> + ret = ohci_deregister(dev);
> + if (ret)
> + return ret;
> +
> + return ohci_release_clocks(priv);
> }
>
> static const struct udevice_id ohci_usb_ids[] = {
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3 3/7] usb: host: ehci-generic: add error path and .remove callback
On 05/17/2017 03:34 PM, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> use list to save reference to enabled clocks and deasserted resets
> in order to respectively disabled and asserted them in case of error
> during probe() or during driver removal.
>
> Signed-off-by: Patrice Chotard
> ---
>
> v3: _ keep enabled clocks and deasserted resets reference in list in order
> to
> disable clock or assert resets in error path or in .remove callback
> _ use struct generic_ehci * instead of struct udevice * as parameter for
> ehci_release_resets() and ehci_release_clocks()
>
> drivers/usb/host/ehci-generic.c | 162
>
> 1 file changed, 149 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
> index 6058e9a..d281218 100644
> --- a/drivers/usb/host/ehci-generic.c
> +++ b/drivers/usb/host/ehci-generic.c
> @@ -11,6 +11,16 @@
> #include
> #include "ehci.h"
>
> +struct ehci_clock {
> + struct clk *clk;
> + struct list_head list;
> +};
> +
> +struct ehci_reset {
> + struct reset_ctl *reset;
> + struct list_head list;
> +};
> +
> /*
> * Even though here we don't explicitly use "struct ehci_ctrl"
> * ehci_register() expects it to be the first thing that resides in
> @@ -18,43 +28,169 @@
> */
> struct generic_ehci {
> struct ehci_ctrl ctrl;
> + struct list_head clks;
> + struct list_head resets;
> };
These functions look so generic that I see no point in not factoring
them out into the clk and reset frameworks respectively.
> +static int ehci_release_resets(struct generic_ehci *priv)
> +{
> + struct ehci_reset *ehci_reset, *tmp;
> + struct reset_ctl *reset;
> + int ret;
> +
> + list_for_each_entry_safe(ehci_reset, tmp, &priv->resets, list) {
> + reset = ehci_reset->reset;
> +
> + ret = reset_request(reset);
> + if (ret)
> + return ret;
> +
> + ret = reset_assert(reset);
> + if (ret)
> + return ret;
> +
> + ret = reset_free(reset);
> + if (ret)
> + return ret;
> +
> + list_del(&ehci_reset->list);
> + }
> + return 0;
> +}
> +
> +static int ehci_release_clocks(struct generic_ehci *priv)
> +{
> + struct ehci_clock *ehci_clock, *tmp;
> + struct clk *clk;
> + int ret;
> +
> + list_for_each_entry_safe(ehci_clock, tmp, &priv->clks, list) {
> + clk = ehci_clock->clk;
> +
> + clk_request(clk->dev, clk);
> + if (ret)
> + return ret;
> +
> + clk_disable(clk);
> +
> + ret = clk_free(clk);
> + if (ret)
> + return ret;
> +
> + list_del(&ehci_clock->list);
> + }
> + return 0;
> +}
> +
> static int ehci_usb_probe(struct udevice *dev)
> {
> + struct generic_ehci *priv = dev_get_priv(dev);
> struct ehci_hccr *hccr;
> struct ehci_hcor *hcor;
> - int i;
> + int i, ret;
> +
> + INIT_LIST_HEAD(&priv->clks);
> + INIT_LIST_HEAD(&priv->resets);
>
> for (i = 0; ; i++) {
> - struct clk clk;
> - int ret;
> + struct ehci_clock *ehci_clock;
> + struct clk *clk;
>
> - ret = clk_get_by_index(dev, i, &clk);
> + clk = devm_kmalloc(dev, sizeof(*clk), GFP_KERNEL);
> + if (!clk) {
> + error("Can't allocate resource\n");
> + goto clk_err;
> + }
> +
> + ret = clk_get_by_index(dev, i, clk);
> if (ret < 0)
> break;
> - if (clk_enable(&clk))
> +
> + if (clk_enable(clk)) {
> error("failed to enable clock %d\n", i);
> - clk_free(&clk);
> + clk_free(clk);
> + goto clk_err;
> + }
> + clk_free(clk);
> +
> + /*
> + * add enabled clocks into clks list in order to be disabled
> + * later on ehci_usb_remove() call or in error path if needed
> + */
> + ehci_clock = devm_kmalloc(dev, sizeof(*ehci_clock), GFP_KERNEL);
> + if (!ehci_clock) {
> + error("Can't allocate resource\n");
> + goto clk_err;
> + }
> + ehci_clock->clk = clk;
> + list_add(&ehci_clock->list, &priv->clks);
> }
>
> for (i = 0; ; i++) {
> - struct reset_ctl reset;
> - int ret;
> + struct ehci_reset *ehci_reset;
> + struct reset_ctl *reset;
> +
> + reset = devm_kmalloc(dev, sizeof(*reset), GFP_KERNEL);
> + if (!reset) {
> + error("Can't allocate resource\n");
> + goto clk_err;
> +
Re: [U-Boot] [PATCH v3 6/7] usb: host: ohci-generic: add RESET support
On 05/17/2017 03:34 PM, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> use list to save reference to deasserted resets in order to
> assert them in case of error during probe() or during driver
> removal.
>
> Signed-off-by: Patrice Chotard
> ---
>
> v3: _ extract in this patch the RESET support add-on from previous patch 5
> _ keep deassrted resets reference in list in order to
> assert resets in error path or in .remove callback
>
> v2: _ add error path management
> _ add .remove callback
>
> drivers/usb/host/ohci-generic.c | 78
> +
> 1 file changed, 78 insertions(+)
>
> diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
> index a6d89a8..bf14ab7 100644
> --- a/drivers/usb/host/ohci-generic.c
> +++ b/drivers/usb/host/ohci-generic.c
> @@ -7,6 +7,7 @@
> #include
> #include
> #include
> +#include
> #include "ohci.h"
>
> #if !defined(CONFIG_USB_OHCI_NEW)
> @@ -18,11 +19,43 @@ struct ohci_clock {
> struct list_head list;
> };
>
> +struct ohci_reset {
> + struct reset_ctl *reset;
> + struct list_head list;
> +};
> +
> struct generic_ohci {
> ohci_t ohci;
> struct list_head clks;
> + struct list_head resets;
> };
>
> +static int ohci_release_resets(struct generic_ohci *priv)
> +{
> + struct ohci_reset *ohci_reset, *tmp;
> + struct reset_ctl *reset;
> + int ret;
> +
> + list_for_each_entry_safe(ohci_reset, tmp, &priv->resets, list) {
> + reset = ohci_reset->reset;
> +
> + ret = reset_request(reset);
> + if (ret)
> + return ret;
> +
> + ret = reset_assert(reset);
> + if (ret)
> + return ret;
> +
> + ret = reset_free(reset);
> + if (ret)
> + return ret;
> +
> + list_del(&(ohci_reset->list));
> + }
> + return 0;
> +}
> +
> static int ohci_release_clocks(struct generic_ohci *priv)
> {
> struct ohci_clock *ohci_clock, *tmp;
> @@ -54,6 +87,7 @@ static int ohci_usb_probe(struct udevice *dev)
> int i, ret;
>
> INIT_LIST_HEAD(&priv->clks);
> + INIT_LIST_HEAD(&priv->resets);
>
> for (i = 0; ; i++) {
> struct ohci_clock *ohci_clock;
> @@ -89,8 +123,48 @@ static int ohci_usb_probe(struct udevice *dev)
> list_add(&ohci_clock->list, &priv->clks);
> }
>
> + for (i = 0; ; i++) {
> + struct ohci_reset *ohci_reset;
> + struct reset_ctl *reset;
> +
> + reset = devm_kmalloc(dev, sizeof(*reset), GFP_KERNEL);
Same comment as on 5/7
> + if (!reset) {
> + error("Can't allocate resource\n");
> + goto clk_err;
> + }
> +
> + ret = reset_get_by_index(dev, i, reset);
> + if (ret < 0)
> + break;
> +
> + if (reset_deassert(reset)) {
> + error("failed to deassert reset %d\n", i);
> + reset_free(reset);
> + goto reset_err;
> + }
> + reset_free(reset);
> +
> + /*
> + * add deasserted resets into resets list in order to be
> + * asserted later on ohci_usb_remove() call or in error
> + * path if needed
> + */
> + ohci_reset = devm_kmalloc(dev, sizeof(*ohci_reset), GFP_KERNEL);
> + if (!ohci_reset) {
> + error("Can't allocate resource\n");
> + goto reset_err;
> + }
> + ohci_reset->reset = reset;
> + list_add(&ohci_reset->list, &priv->resets);
> + }
> +
> +
> return ohci_register(dev, regs);
>
> +reset_err:
> + ret = ohci_release_resets(priv);
> + if (ret)
> + return ret;
> clk_err:
> return ohci_release_clocks(priv);
> }
> @@ -104,6 +178,10 @@ static int ohci_usb_remove(struct udevice *dev)
> if (ret)
> return ret;
>
> + ret = ohci_release_resets(priv);
> + if (ret)
> + return ret;
> +
> return ohci_release_clocks(priv);
> }
>
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v4] usb: lpc32xx: add i2c DM support
On 05/17/2017 07:01 PM, Sylvain Lemieux wrote: > From: Liam Beguin > > Add DM support for i2c functions. > > Signed-off-by: Liam Beguin > Signed-off-by: Sylvain Lemieux > Reviewed-by: Marek Vasut Applied, thanks. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PULL] u-boot-usb/master
The following changes since commit fa8967cfbaed5582ba987756fa9f0470a9affbf4: Merge git://git.denx.de/u-boot-uniphier (2017-05-17 14:13:58 -0400) are available in the git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to 9ad69f0ba45b1e1a95be04fcc2d7e143fa24627c: usb: lpc32xx: add i2c DM support (2017-05-18 11:31:56 +0200) Liam Beguin (1): usb: lpc32xx: add i2c DM support drivers/usb/host/ohci-lpc32xx.c | 64 ++-- 1 file changed, 46 insertions(+), 18 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PULL] u-boot-socfpga/master
The following changes since commit fa8967cfbaed5582ba987756fa9f0470a9affbf4:
Merge git://git.denx.de/u-boot-uniphier (2017-05-17 14:13:58 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-socfpga.git master
for you to fetch changes up to d89e979c42892db572c4ef5d56bc207075953f58:
arm: socfpga: Enable build for Arria 10 (2017-05-18 11:33:19 +0200)
Ley Foon Tan (16):
arm: socfpga: Restructure clock manager driver
arm: socfpga: Restructure reset manager driver
arm: socfpga: Restructure system manager
arm: socfpga: Restructure misc driver
arm: socfpga: Add A10 macros
arm: socfpga: Add reset driver support for Arria 10
arm: socfpga: Add clock driver for Arria 10
arm: socfpga: Add system manager for Arria 10
arm: socfpga: Add sdram header file for Arria 10
arm: socfpga: Add pinmux for Arria 10
arm: socfpga: Add misc support for Arria 10
arm: dts: Add dts and dtsi for Arria 10
arm: socfpga: Add SPL support for Arria 10
arm: socfpga: Add config and defconfig for Arria 10
arm: socfpga: Add board files for the Arria10
arm: socfpga: Enable build for Arria 10
arch/arm/dts/Makefile |1 +
arch/arm/dts/socfpga_arria10.dtsi |
869 ++
arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts |
38 +++
arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi |
481 ++
arch/arm/mach-socfpga/Kconfig | 10 +
arch/arm/mach-socfpga/Makefile|
41 ++-
arch/arm/mach-socfpga/clock_manager.c |
525 ++---
arch/arm/mach-socfpga/clock_manager_arria10.c |
1096 +
arch/arm/mach-socfpga/clock_manager_gen5.c|
524 +
arch/arm/mach-socfpga/include/mach/base_addr_a10.h|8 +-
arch/arm/mach-socfpga/include/mach/clock_manager.h|
317 +---
arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h|
224 ++
arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h |
322
arch/arm/mach-socfpga/include/mach/misc.h | 31 ++
arch/arm/mach-socfpga/include/mach/pinmux.h | 17 ++
arch/arm/mach-socfpga/include/mach/reset_manager.h|
50 +---
arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h|
147 ++
arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h |
50
arch/arm/mach-socfpga/include/mach/sdram_arria10.h|
380
arch/arm/mach-socfpga/include/mach/system_manager.h |
202 +
arch/arm/mach-socfpga/include/mach/system_manager_arria10.h |
81 ++
arch/arm/mach-socfpga/include/mach/system_manager_gen5.h |
122
arch/arm/mach-socfpga/misc.c |
363 +--
arch/arm/mach-socfpga/misc_arria10.c |
259 +
arch/arm/mach-socfpga/misc_gen5.c |
359 +++
arch/arm/mach-socfpga/pinmux_arria10.c|
96 ++
arch/arm/mach-socfpga/reset_manager.c |
93 +-
arch/arm/mach-socfpga/reset_manager_arria10.c |
383
arch/arm/mach-socfpga/reset_manager_gen5.c|
116
arch/arm/mach-socfpga/spl.c |
56 +++-
arch/arm/mach-socfpga/{system_manager.c => system_manager_gen5.c} |6 +-
board/altera/arria10-socdk/Kconfig| 18 ++
board/altera/arria10-socdk/Makefile |7 +
board/altera/arria10-socdk/socfpga.c |7 +
configs/socfpga_arria10_defconfig | 29 ++
include/configs/socfpga_arria10_socdk.h |
66 +
include/configs/socfpga_common.h | 21 +-
include/dt-bindings/reset/altr,rst-mgr-a10.h |
110 +++
38 files changed, 6084 insertions(+), 1441 deletions(-)
create mode 100644 arch/arm/dts/socfpga_arria10.dtsi
create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c
create mode 100644 arch/arm/mach-socfpga/clock_manager_gen5.c
create mode 100644
arch/arm/mach-socfpga/include/mach/cl
Re: [U-Boot] [PATCH] Convert CONFIG_SPL_BOARD_INIT to Kconfig
On Thu, May 4, 2017 at 11:17 AM, Ley Foon Tan wrote: > On Wed, May 3, 2017 at 5:13 PM, Ley Foon Tan wrote: >> This converts the following to Kconfig: >>CONFIG_SPL_BOARD_INIT >> >> Signed-off-by: Ley Foon Tan > > Note, this patch is rebased u-boot-socfpga.git/next branch [1] with > u-boot.git/master [2]. > > [1] > http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/heads/next > [2] http://git.denx.de/?p=u-boot.git;a=tree > Hi Any feedback on this patch? Regards Ley Foon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: dts: imx: add aliases for usbotg nodes
On 18/05/2017 10:53, Stefano Babic wrote: > On 24/04/2017 23:20, Alexey Ignatov wrote: >> Aliases must be present for USB gadget with DM_USB. Without this, >> usb_setup_ehci_gadget() fails because it can't find required devices >> in UCLASS_USB. >> >> Signed-off-by: Alexey Ignatov >> --- > > > Applied to u-boot-imx, thanks ! > Sorry, I cannot. This patch is breaking several boards with "Reference to non-existent node or label "usbotg1"" when DTS is compiled: opos6uldev mx6sllevk_plugin mx6slevk_spinor imx6qdl_icore_rqs_mmc ... Can you check this, please ? Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PULL] Please pull u-boot-imx
Hi Tom, please pull from u-boot-imx, thanks ! The following changes since commit fa8967cfbaed5582ba987756fa9f0470a9affbf4: Merge git://git.denx.de/u-boot-uniphier (2017-05-17 14:13:58 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to 5c84ad097d829bb1e6460438f33e1536b23b3c9b: Merge branch 'master' of git://git.denx.de/u-boot-imx (2017-05-18 11:53:55 +0200) Andy Duan (4): net: fec_mxc: avoid transfer dev_id -1 to get mac address from fuse net: fec_mxc: specify the registered eth index by dev_id net: fec_mxc: avoid transfer dev_id -1 to get mac address from fuse net: fec_mxc: specify the registered eth index by dev_id Fabio Estevam (5): mx25pdk: Add fuse API support mx25pdk: Add fuse API support mx6sabresd: Prepare for supporting MX6DL mx6sabresd: Add SPL support for the mx6dl variant mx6sabresd: Remove non-SPL targets Jagan Teki (32): icorem6: Add modeboot env via board_late_init icorem6: Add mmc_late_init geam6ul: Add modeboot env via board_late_init geam6ul: Add mmc_late_init engicam: Set fdt_file env during run-time icorem6: Make SPL to pick suitable fdt engicam: Move uart mux init to SPL icorem6: Use proper iomux_ddr_regs drive strength values icorem6: Use drive strength macros i.MX6UL: geam6ul: Add SETUP_IOMUX_PADS isiot: Fix to use usdhc2_pads for mmc2 i.MX6UL: isiot: Add SETUP_IOMUX_PADS icorem6[_rqs]: Move the spl code common geam6/isiot: Move the spl code common engicam: common: Move common board code engicam: common: Move board_late_init icorem6: Add modeboot env via board_late_init icorem6: Add mmc_late_init geam6ul: Add modeboot env via board_late_init geam6ul: Add mmc_late_init engicam: Set fdt_file env during run-time icorem6: Make SPL to pick suitable fdt engicam: Move uart mux init to SPL icorem6: Use proper iomux_ddr_regs drive strength values icorem6: Use drive strength macros i.MX6UL: geam6ul: Add SETUP_IOMUX_PADS isiot: Fix to use usdhc2_pads for mmc2 i.MX6UL: isiot: Add SETUP_IOMUX_PADS icorem6[_rqs]: Move the spl code common geam6/isiot: Move the spl code common engicam: common: Move common board code engicam: common: Move board_late_init Peng Fan (22): net: fec: do not access reserved register for i.MX6ULL imx-common: timer: clean up imx: thermal: update imx6 thermal driver according new equation thermal: imx: fix calculation imx-common: rdc-sema: correct return value net: fec: do not access reserved register for i.MX6ULL imx-common: timer: clean up imx: thermal: update imx6 thermal driver according new equation thermal: imx: fix calculation imx-common: rdc-sema: correct return value arm: dts: imx7: sync with Linux arm: dts: imx7d-sdb add basic dts arm: dts: imx7d-sdb: add spi gpio node arm: dts: imx7d-sdb: add regulator node for usb and mmc arm: dts: imx7d-sdb: add i2c support arm: dts: imx7d-sdb: add usdhc support spi: kconfig: add soft spi Kconfig entry gpio: 74x164: make oe-pins optional imx: mx7dsabresd: enable more DM drivers imx: mx7dsabresd: reset ENET_RST_B imx: mx7dsabresd: switch to DM USB pinctrl: imx: fix memory leak Stefano Babic (3): Merge branch 'master' of git://git.denx.de/u-boot imx: mx7dsabresd: fix secure config after switching to DM Merge branch 'master' of git://git.denx.de/u-boot-imx Tim Harvey (2): imx: ventana: fix GW520x external watchdog dt update imx: ventana: update imx wdog external reset dt property arch/arm/cpu/armv7/mx6/Kconfig | 6 + arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx7-colibri.dts | 10 +- arch/arm/dts/imx7.dtsi | 194 -- arch/arm/dts/imx7d-pinfunc.h| 111 ++-- arch/arm/dts/imx7d-sdb.dts | 309 ++ arch/arm/dts/imx7d.dtsi | 140 + arch/arm/dts/imx7s.dtsi | 999 +++ arch/arm/imx-common/rdc-sema.c | 2 +- arch/arm/imx-common/timer.c | 3 - arch/arm/include/asm/imx-common/iomux-v3.h | 6 + board/engicam/common/Makefile | 7 + board/engicam/common/board.c| 82 +++ board/engicam/common/board.h|
Re: [U-Boot] [PATCH V2] pinctrl: imx: fix memory leak
Hi,
On Thu, 18 May 2017 11:15:08 +0200 Stefano Babic wrote:
> On 11/05/2017 11:34, Peng Fan wrote:
> > Each time set_state is called, a new piece memory will
> > be allocated for pin_data, but not freed, this will
> > incur memory leak.
> >
> > When error, the devm API could not free memory automatically.
> > So need call devm_kfree when error.
> >
> > Issue reported by Coverity
> >
> > Signed-off-by: Peng Fan
> > Cc: Simon Glass
> > Cc: Stefan Agner
> > Cc: Stefano Babic
> > ---
> > drivers/pinctrl/nxp/pinctrl-imx.c | 4
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c
> > b/drivers/pinctrl/nxp/pinctrl-imx.c
> > index f0321c4..ebc14a3 100644
> > --- a/drivers/pinctrl/nxp/pinctrl-imx.c
> > +++ b/drivers/pinctrl/nxp/pinctrl-imx.c
> > @@ -53,6 +53,7 @@ static int imx_pinctrl_set_state(struct udevice *dev,
> > struct udevice *config)
> > if (fdtdec_get_int_array(gd->fdt_blob, node, "fsl,pins",
> > pin_data, size >> 2)) {
> > dev_err(dev, "Error reading pin data.\n");
> > + devm_kfree(dev, pin_data);
> > return -EINVAL;
> > }
> >
> > @@ -78,6 +79,7 @@ static int imx_pinctrl_set_state(struct udevice *dev,
> > struct udevice *config)
> >
> > if ((mux_reg == -1) || (conf_reg == -1)) {
> > dev_err(dev, "Error mux_reg or conf_reg\n");
> > + devm_kfree(dev, pin_data);
> > return -EINVAL;
> > }
> >
> > @@ -166,6 +168,8 @@ static int imx_pinctrl_set_state(struct udevice *dev,
> > struct udevice *config)
> > }
> > }
> >
> > + devm_kfree(dev, pin_data);
> > +
> > return 0;
> > }
> >
> >
>
> Applied to u-boot-imx, thanks !
>
I had commented on this patch, but unfortunately my mails were rejected
by the mailing list server, so the only reached the individuals on CC.
IMO the use of the 'devm_' functions is inappropriate here, since the
allocated buffer is only used temporarily inside the function and
unconditionally freed at function exit.
Lothar Waßmann
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Re: [U-Boot] [PATCH] arm: dts: imx: add aliases for usbotg nodes
Hi,
On 05/18/2017 12:13 PM, Stefano Babic wrote:
> On 18/05/2017 10:53, Stefano Babic wrote:
>> On 24/04/2017 23:20, Alexey Ignatov wrote:
>>> Aliases must be present for USB gadget with DM_USB. Without this,
>>> usb_setup_ehci_gadget() fails because it can't find required devices
>>> in UCLASS_USB.
>>>
>>> Signed-off-by: Alexey Ignatov
>>> ---
>>
>>
>> Applied to u-boot-imx, thanks !
>>
>
> Sorry, I cannot. This patch is breaking several boards with "Reference
> to non-existent node or label "usbotg1"" when DTS is compiled:
>
> opos6uldev
> mx6sllevk_plugin
> mx6slevk_spinor
> imx6qdl_icore_rqs_mmc
> ...
>
It looks like my comment has been missed.
The imx6ul.dtsi file already has usbotg{0,1} aliases.
Regards,
>
> Can you check this, please ?
>
> Best regards,
> Stefano Babic
>
>
--
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sebastien.szyman...@armadeus.com
Tel: +33 (0)9 72 29 41 44
Fax: +33 (0)9 72 28 79 26
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Re: [U-Boot] [PATCH] arm: dts: imx: add aliases for usbotg nodes
On 18/05/2017 12:28, Sébastien Szymanski wrote:
> Hi,
>
> On 05/18/2017 12:13 PM, Stefano Babic wrote:
>> On 18/05/2017 10:53, Stefano Babic wrote:
>>> On 24/04/2017 23:20, Alexey Ignatov wrote:
Aliases must be present for USB gadget with DM_USB. Without this,
usb_setup_ehci_gadget() fails because it can't find required devices
in UCLASS_USB.
Signed-off-by: Alexey Ignatov
---
>>>
>>>
>>> Applied to u-boot-imx, thanks !
>>>
>>
>> Sorry, I cannot. This patch is breaking several boards with "Reference
>> to non-existent node or label "usbotg1"" when DTS is compiled:
>>
>> opos6uldev
>> mx6sllevk_plugin
>> mx6slevk_spinor
>> imx6qdl_icore_rqs_mmc
>> ...
>>
>
> It looks like my comment has been missed.
> The imx6ul.dtsi file already has usbotg{0,1} aliases.
Yes, sorry, I have missed them. Thanks for pointing me in the right
direction.
Regards,
Stefano
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Re: [U-Boot] [PATCH v5 20/33] ARM: i.MX6: sabresd: Add dm_gpio_* for backlight
Hi Jagan, On Thu, May 18, 2017 at 5:30 AM, Jagan Teki wrote: > I think this backlight IMX_GPIO_NR(1, 21) gpio is related to board > code here in U-boot, couldn't see the node related to this on dts. In U-Boot MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 is used to as GPIO and when it is at 1, it sets the backlight with the maximum bright. In the mainline kernel dts we describe this pin as described as MX6QDL_PAD_SD1_DAT3__PWM1_OUT and it is used as PWM to drive the backlight. Ideally we should also have PWM, backlight support in DM, but if this is not avalaible today we can use the method you proposed. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3] net: usb: mcs7830: fix no DM recive path
The function mcs7830_recv_common() returns a negative value on error, 0
or positive value on success.
Fix the condition for calling the function
net_process_received_packet().
The function mcs7830_recv() is always returning 0.
Update the return value of mcs7830_recv() to reflect the function's
success status.
Signed-off-by: Uri Mashiach
---
v1 -> v3: update the commit message.
drivers/usb/eth/mcs7830.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
index 9d6cf8c..4abef5d 100644
--- a/drivers/usb/eth/mcs7830.c
+++ b/drivers/usb/eth/mcs7830.c
@@ -622,10 +622,12 @@ static int mcs7830_recv(struct eth_device *eth)
int len;
len = mcs7830_recv_common(ueth, buf);
- if (len <= 0)
+ if (len >= 0) {
net_process_received_packet(buf, len);
+ return 0;
+ }
- return 0;
+ return len;
}
/*
--
2.7.4
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Re: [U-Boot] [PATCH] mx6sabresd: Remove non-SPL targets
On Thu, May 18, 2017 at 2:58 AM, Jagan Teki wrote: > Missing to update MAINTAINERS file, will change it here and send along > with the series, is that OK? Let me take care of it as I do have other changes as part of moving mx6sabresd to SPL. Will send these patches later today with you on Cc. Thanks, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 00/21] ARM: i.MX6: SabreSD: Add dts support
From: Jagan Teki
Compared to previous series, this series
- Add dts files directly from Linux
- Moved spl code in separate file spl.c
- Add patches ontop of 'Fabio' changes.
- Droped file/drirectory rename changes
Changes for v6:
- rebase on u-boot-imx/master
- Fixed comments from 'Fabio' in v5
- Droped file/directory rename changes patches
- Droped dm_gpio changes on board
Changes for v5:
- rebase on master
- removed SPL support for i.MX6DL SabreSD
- Add board_fit_config_name_match for SPL to fetch board dts
- Add imx6qdl_sabresd_spl_defconfig for common SPL support
Changes for v4:
- rebase on master
- Rename imx6[dl|q]_sabresd_spl_defconfig to imx6[dl|q]_sabresd_spl_defconfig
- Update README
- Move CONFIG_FEC_MXC to configs/mx6[dl|q|qp]sabreauto_defconfigs
- Add dts support for non-spl based defconfigs
Changes for v3:
- rebase on master
- Added patch 'ARM: i.MX6: sabresd: Cleanup board code'
- Added patch 'ARM: i.MX6DL: sabresd: Move DCD reginit on SPL'
Changes for v2:
- rebase on master
- Added new-patches.
Jagan Teki (21):
mx6sabresd: MAINTAINERS: Remove invalid defconfigs F: list
mx6sabresd: README: Fix to add space on dd command
ARM: i.MX6: sabresd: Remove SPL_I2C_SUPPORT
ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi
ARM: dts: i.MX6: Add imx6q-sabresd.dts
ARM: dts: i.MX6: Add imx6dl-sabresd.dts
ARM: dts: i.MX6: Add imx6qp.dtsi
ARM: dts: i.MX6: Add imx6qp-sabresd.dts
sabresd: i.MX6Q: Add initial dts support
sabresd: i.MX6QP: Add initial dts support
SabreSD: i.MX6DL: Add initial dts support
SabreSD: Move CONFIG_SYS_I2C_MXC to defconfigs
SabreSD: Enable DM_I2C and DM_PMIC
SabreSD: Enable CONFIG_DM_REGULATOR
SabreSD: Enable DM_USB
i.MX6: Sabre: Move CONFIG_FEC_MXC to defconfigs
i.MX6: SabreSD: Enable DM_ETH
i.MX6: sabresd: Drop checkboard
i.MX6: SabreSD: Cleanup board code
i.MX6: SabreSD: mx6sabresd_spl_defconfig => mx6sabresd_defconfig
SabreSD: README: Update with dtb changes
arch/arm/cpu/armv7/mx6/Kconfig | 18 +-
arch/arm/dts/Makefile | 3 +
arch/arm/dts/imx6dl-sabresd.dts| 17 +
arch/arm/dts/imx6q-sabresd.dts | 25 +
arch/arm/dts/imx6qdl-sabresd.dtsi | 626 ++
arch/arm/dts/imx6qp-sabresd.dts| 93 +++
arch/arm/dts/imx6qp.dtsi | 149
board/freescale/mx6sabresd/MAINTAINERS | 4 +-
board/freescale/mx6sabresd/Makefile| 1 +
board/freescale/mx6sabresd/README | 66 +-
board/freescale/mx6sabresd/mx6sabresd.c| 896 +++--
board/freescale/mx6sabresd/spl.c | 517
configs/mx6dlsabreauto_defconfig | 2 +
configs/mx6qpsabreauto_defconfig | 2 +
configs/mx6qsabreauto_defconfig| 2 +
...6sabresd_spl_defconfig => mx6sabresd_defconfig} | 7 +-
include/configs/mx6sabre_common.h | 3 +-
include/configs/mx6sabresd.h | 32 +-
18 files changed, 1586 insertions(+), 877 deletions(-)
create mode 100644 arch/arm/dts/imx6dl-sabresd.dts
create mode 100644 arch/arm/dts/imx6q-sabresd.dts
create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
create mode 100644 arch/arm/dts/imx6qp-sabresd.dts
create mode 100644 arch/arm/dts/imx6qp.dtsi
create mode 100644 board/freescale/mx6sabresd/spl.c
rename configs/{mx6sabresd_spl_defconfig => mx6sabresd_defconfig} (85%)
--
1.9.1
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[U-Boot] [PATCH v6 01/21] mx6sabresd: MAINTAINERS: Remove invalid defconfigs F: list
From: Jagan Teki no-SPL target defconfigs are droped in below commit and forgot to update the same on MAINTAINERS F: list "mx6sabresd: Remove non-SPL targets" (sha1: e2bab4b9ea3c9ab59c1ba064263ee0863cba112e) Signed-off-by: Jagan Teki --- board/freescale/mx6sabresd/MAINTAINERS | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index add2314..262c816 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -3,6 +3,4 @@ M: Fabio Estevam S: Maintained F: board/freescale/mx6sabresd/ F: include/configs/mx6sabresd.h -F: configs/mx6dlsabresd_defconfig -F: configs/mx6qsabresd_defconfig F: configs/mx6sabresd_spl_defconfig -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 02/21] mx6sabresd: README: Fix to add space on dd command
From: Jagan Teki Fix to give space between of and bs of dd command. Cc: Stefano Babic Cc: Michael Trimarchi Signed-off-by: Jagan Teki Reviewed-by: Fabio Estevam --- board/freescale/mx6sabresd/README | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/mx6sabresd/README b/board/freescale/mx6sabresd/README index bc0c0d0..628d35f 100644 --- a/board/freescale/mx6sabresd/README +++ b/board/freescale/mx6sabresd/README @@ -84,7 +84,7 @@ $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync - Flash the u-boot.img image into the SD card: -$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 && sync +$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 && sync 4. Booting via Falcon mode @@ -101,7 +101,7 @@ $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync - Flash the u-boot.img image into the SD card: -$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 oflag=sync status=none && sync +$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync Create a partition for root file system and extract it there: -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 07/21] ARM: dts: i.MX6: Add imx6qp.dtsi
From: Jagan Teki
Retrive imx6qp.dtsi from Linux with last commit
"ARM: dts: imx6qp: add PRG nodes and hook up to IPUs"
(sha1: 54458dac349f72dd9a4fd816619bde0bab40841d)
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6qp.dtsi | 149 +++
1 file changed, 149 insertions(+)
create mode 100644 arch/arm/dts/imx6qp.dtsi
diff --git a/arch/arm/dts/imx6qp.dtsi b/arch/arm/dts/imx6qp.dtsi
new file mode 100644
index 000..59453f2
--- /dev/null
+++ b/arch/arm/dts/imx6qp.dtsi
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6q.dtsi"
+
+/ {
+ soc {
+ ocram2: sram@0094 {
+ compatible = "mmio-sram";
+ reg = <0x0094 0x2>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
+ ocram3: sram@0096 {
+ compatible = "mmio-sram";
+ reg = <0x0096 0x2>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
+ aips-bus@0210 {
+ pre1: pre@21c8000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021c8000 0x1000>;
+ interrupts = ;
+ clocks = <&clks IMX6QDL_CLK_PRE0>;
+ clock-names = "axi";
+ fsl,iram = <&ocram2>;
+ };
+
+ pre2: pre@21c9000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021c9000 0x1000>;
+ interrupts = ;
+ clocks = <&clks IMX6QDL_CLK_PRE1>;
+ clock-names = "axi";
+ fsl,iram = <&ocram2>;
+ };
+
+ pre3: pre@21ca000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021ca000 0x1000>;
+ interrupts = ;
+ clocks = <&clks IMX6QDL_CLK_PRE2>;
+ clock-names = "axi";
+ fsl,iram = <&ocram3>;
+ };
+
+ pre4: pre@21cb000 {
+ compatible = "fsl,imx6qp-pre";
+ reg = <0x021cb000 0x1000>;
+ interrupts = ;
+ clocks = <&clks IMX6QDL_CLK_PRE3>;
+ clock-names = "axi";
+ fsl,iram = <&ocram3>;
+ };
+
+ prg1: prg@21cc000 {
+ compatible = "fsl,imx6qp-prg";
+ reg = <0x021cc000 0x1000>;
+ clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
+
[U-Boot] [PATCH v6 04/21] ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi
From: Jagan Teki
Retrive imx6qdl-sabresd.dtsi from Linux with last commit
"ARM: dts: imx6qdl-sabresd: Set LDO regulator supply"
(sha1: c23568dbbda110a5c79c6537cc81ed7af5444b64)
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6qdl-sabresd.dtsi | 626 ++
1 file changed, 626 insertions(+)
create mode 100644 arch/arm/dts/imx6qdl-sabresd.dtsi
diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi
b/arch/arm/dts/imx6qdl-sabresd.dtsi
new file mode 100644
index 000..58055ce
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sabresd.dtsi
@@ -0,0 +1,626 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include
+#include
+
+/ {
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ memory {
+ reg = <0x1000 0x4000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_usb_otg_vbus: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = <&gpio3 22 0>;
+ enable-active-high;
+ vin-supply = <&swbst_reg>;
+ };
+
+ reg_usb_h1_vbus: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = <&gpio1 29 0>;
+ enable-active-high;
+ vin-supply = <&swbst_reg>;
+ };
+
+ reg_audio: regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "wm8962-supply";
+ gpio = <&gpio4 10 0>;
+ enable-active-high;
+ };
+
+ reg_pcie: regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie_reg>;
+ regulator-name = "MPCIE_3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ gpio = <&gpio3 19 0>;
+ regulator-always-on;
+ enable-active-high;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_keys>;
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ linux,code = ;
+ };
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ linux,code = ;
+ };
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ linux,code = ;
+ };
+ };
+
+ sound {
+ compatible = "fsl,imx6q-sabresd-wm8962",
+ "fsl,imx-audio-wm8962";
+ model = "wm8962-audio";
+ ssi-controller = <&ssi2>;
+ audio-codec = <&codec>;
+ audio-routing =
+ "Headphone Jack", "HPOUTL",
+ "Headphone Jack", "HPOUTR",
+ "Ext Spk", "SPKOUTL",
+ "Ext Spk", "SPKOUTR",
+ "AMIC", "MICBIAS",
+ "IN3R", "AMIC";
+ mux-int-port = <2>;
+ mux-ext-port = <3>;
+ };
+
+ backlight_lvds: backlight-lvds {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 500>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <7>;
+ status = "okay";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-n
[U-Boot] [PATCH v6 05/21] ARM: dts: i.MX6: Add imx6q-sabresd.dts
From: Jagan Teki
Retrive imx6q-sabresd.dts from Linux with last commit
"ARM: dtsi: enable ahci sata on imx6q platforms"
(sha1: 0fb1f804269e549b556b475c8655bc862c220622)
Signed-off-by: Jagan Teki
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6q-sabresd.dts | 25 +
2 files changed, 26 insertions(+)
create mode 100644 arch/arm/dts/imx6q-sabresd.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e1a2b07..c5e1a9d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -338,6 +338,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
imx6q-logicpd.dtb \
+ imx6q-sabresd.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb \
imx6ul-isiot-emmc.dtb \
diff --git a/arch/arm/dts/imx6q-sabresd.dts b/arch/arm/dts/imx6q-sabresd.dts
new file mode 100644
index 000..9cbdfe7
--- /dev/null
+++ b/arch/arm/dts/imx6q-sabresd.dts
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+ model = "Freescale i.MX6 Quad SABRE Smart Device Board";
+ compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
+};
+
+&sata {
+ status = "okay";
+};
--
1.9.1
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[U-Boot] [PATCH v6 16/21] i.MX6: Sabre: Move CONFIG_FEC_MXC to defconfigs
From: Jagan Teki Moved CONFIG_FEC_MXC from include/configs/mxsabresd.h to imx6 sabresd and sabreauto defconfigs. Signed-off-by: Jagan Teki Reviewed-by: Fabio Estevam --- configs/mx6dlsabreauto_defconfig | 2 ++ configs/mx6qpsabreauto_defconfig | 2 ++ configs/mx6qsabreauto_defconfig | 2 ++ configs/mx6sabresd_spl_defconfig | 1 + include/configs/mx6sabre_common.h | 3 ++- 5 files changed, 9 insertions(+), 1 deletion(-) diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index ba5ab8a..dae89fe 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -42,3 +42,5 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y +CONFIG_NETDEVICES=y +CONFIG_FEC_MXC=y diff --git a/configs/mx6qpsabreauto_defconfig b/configs/mx6qpsabreauto_defconfig index 96a248e..2f95ab0 100644 --- a/configs/mx6qpsabreauto_defconfig +++ b/configs/mx6qpsabreauto_defconfig @@ -41,3 +41,5 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y +CONFIG_NETDEVICES=y +CONFIG_FEC_MXC=y diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 015207d..20b39dc 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -42,3 +42,5 @@ CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y +CONFIG_NETDEVICES=y +CONFIG_FEC_MXC=y diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index 58d0b4b..4dff0c3 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -53,3 +53,4 @@ CONFIG_OF_LIBFDT=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set CONFIG_SYS_I2C_MXC=y +CONFIG_FEC_MXC=y diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 9b0fe5a..fbddb86 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -21,7 +21,7 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_FEC_MXC +#ifdef CONFIG_FEC_MXC #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPERGMII @@ -30,6 +30,7 @@ #define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS +#endif #ifdef CONFIG_CMD_SF #define CONFIG_MXC_SPI -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 14/21] SabreSD: Enable CONFIG_DM_REGULATOR
From: Jagan Teki Enable CONFIG_DM_REGULATOR for i.MX6 SabreSD boards. Signed-off-by: Jagan Teki --- arch/arm/cpu/armv7/mx6/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 314a61f..9a874cd 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -219,6 +219,7 @@ config TARGET_MX6SABRESD select DM_MMC select DM_PMIC select DM_PMIC_PFUZE100 + select DM_REGULATOR select DM_THERMAL select PINCTRL select PINCTRL_IMX6 -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 17/21] i.MX6: SabreSD: Enable DM_ETH
From: Jagan Teki
(1) Enable DM_ETH
(2) Droped board_eth_init
Signed-off-by: Jagan Teki
Reviewed-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/Kconfig | 1 +
board/freescale/mx6sabresd/mx6sabresd.c | 45 ++---
2 files changed, 3 insertions(+), 43 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index fa55cc0..db7172f 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -214,6 +214,7 @@ config TARGET_MX6SABRESD
select BOARD_LATE_INIT
select OF_CONTROL
select DM
+ select DM_ETH
select DM_I2C
select DM_GPIO
select DM_MMC
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 1761a14..a30cf0d 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -16,7 +16,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -28,9 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
@@ -47,37 +43,6 @@ static iomux_v3_cfg_t const uart1_pads[] = {
IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
};
-static iomux_v3_cfg_t const enet_pads[] = {
- IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK|
MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL |
MUX_PAD_CTRL(ENET_PAD_CTRL)),
- /* AR8031 PHY Reset */
- IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static void setup_iomux_enet(void)
-{
- SETUP_IOMUX_PADS(enet_pads);
-
- /* Reset AR8031 PHY */
- gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
- mdelay(10);
- gpio_set_value(IMX_GPIO_NR(1, 25), 1);
- udelay(100);
-}
-
static iomux_v3_cfg_t const ecspi1_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_COL1__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)),
@@ -344,14 +309,6 @@ int overwrite_console(void)
return 1;
}
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
- setup_pcie();
-
- return cpu_eth_init(bis);
-}
-
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -371,6 +328,8 @@ int board_init(void)
setup_spi();
#endif
+ setup_pcie();
+
return 0;
}
--
1.9.1
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[U-Boot] [PATCH v6 08/21] ARM: dts: i.MX6: Add imx6qp-sabresd.dts
From: Jagan Teki
Retrive imx6qp-sabresd.dts from Linux with last commit
"ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply"
(sha1: 448548174caaa04ffe9da4da9326052eb8791a9b)
Signed-off-by: Jagan Teki
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6qp-sabresd.dts | 93 +
2 files changed, 94 insertions(+)
create mode 100644 arch/arm/dts/imx6qp-sabresd.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 54cdd23a..e8cee48 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -340,6 +340,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6q-icore-rqs.dtb \
imx6q-logicpd.dtb \
imx6q-sabresd.dtb \
+ imx6qp-sabresd.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb \
imx6ul-isiot-emmc.dtb \
diff --git a/arch/arm/dts/imx6qp-sabresd.dts b/arch/arm/dts/imx6qp-sabresd.dts
new file mode 100644
index 000..a8a5004
--- /dev/null
+++ b/arch/arm/dts/imx6qp-sabresd.dts
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6qp.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+ model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board";
+ compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
+};
+
+®_arm {
+ vin-supply = <&sw2_reg>;
+};
+
+&iomuxc {
+ imx6qdl-sabresd {
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+ MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
+ MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
+ MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
+ MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17
[U-Boot] [PATCH v6 19/21] i.MX6: SabreSD: Cleanup board code
From: Jagan Teki
- Give proper tab alignment for display_info_t structure
- Add tab spaces UART_PAD_CTRL and SPI_PAD_CTRL
- Give proper alignment of reg init values on setup_display
- Add space and newline on board_init_f
- Add static qualifier for file scope structures
Signed-off-by: Jagan Teki
Reviewed-by: Fabio Estevam
---
board/freescale/mx6sabresd/mx6sabresd.c | 187
board/freescale/mx6sabresd/spl.c| 30 ++---
include/configs/mx6sabresd.h| 2 +-
3 files changed, 112 insertions(+), 107 deletions(-)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 2aaf397..8c2de01 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -23,14 +23,12 @@
DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | \
+ PAD_CTL_HYS)
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
int dram_init(void)
{
@@ -108,7 +106,7 @@ static void setup_spi(void)
SETUP_IOMUX_PADS(ecspi1_pads);
}
-iomux_v3_cfg_t const pcie_pads[] = {
+static iomux_v3_cfg_t const pcie_pads[] = {
IOMUX_PADS(PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)),
/* POWER */
IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
/* RESET */
};
@@ -118,7 +116,7 @@ static void setup_pcie(void)
SETUP_IOMUX_PADS(pcie_pads);
}
-iomux_v3_cfg_t const di0_pads[] = {
+static iomux_v3_cfg_t const di0_pads[] = {
IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK),/* DISP0_CLK */
IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), /* DISP0_HSYNC
*/
IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03), /* DISP0_VSYNC
*/
@@ -181,67 +179,72 @@ static void do_enable_hdmi(struct display_info_t const
*dev)
imx_enable_hdmi_phy();
}
-struct display_info_t const displays[] = {{
- .bus= -1,
- .addr = 0,
- .pixfmt = IPU_PIX_FMT_RGB666,
- .detect = NULL,
- .enable = enable_lvds,
- .mode = {
- .name = "Hannstar-XGA",
- .refresh= 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15384,
- .left_margin= 160,
- .right_margin = 24,
- .upper_margin = 29,
- .lower_margin = 3,
- .hsync_len = 136,
- .vsync_len = 6,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED
-} }, {
- .bus= -1,
- .addr = 0,
- .pixfmt = IPU_PIX_FMT_RGB24,
- .detect = detect_hdmi,
- .enable = do_enable_hdmi,
- .mode = {
- .name = "HDMI",
- .refresh= 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15384,
- .left_margin= 160,
- .right_margin = 24,
- .upper_margin = 29,
- .lower_margin = 3,
- .hsync_len = 136,
- .vsync_len = 6,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED
-} }, {
- .bus= 0,
- .addr = 0,
- .pixfmt = IPU_PIX_FMT_RGB24,
- .detect = NULL,
- .enable = enable_rgb,
- .mode = {
- .name = "SEIKO-WVGA",
- .refresh= 60,
- .xres = 800,
- .yres = 480,
- .pixclock = 29850,
- .left_margin= 89,
- .right_margin = 164,
- .upper_margin = 23,
- .lower_margin = 10,
- .hsync_len = 10,
- .vsync_len = 10,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED
-} } };
+struct display_info_t const displays[] = {
+ {
+ .bus= -1,
+ .addr = 0,
+ .pixfmt = IPU_PIX_FMT_RGB666,
+ .detect = NULL,
+ .enable = enable_lvds,
+ .mode = {
+ .name = "Hannstar-XGA",
+ .refresh= 60,
+
[U-Boot] [PATCH v6 12/21] SabreSD: Move CONFIG_SYS_I2C_MXC to defconfigs
From: Jagan Teki Moved CONFIG_SYS_I2C_MXC from include/configs/mxsabresd.h to imx6 sabresd defconfigs. Signed-off-by: Jagan Teki Reviewed-by: Fabio Estevam --- configs/mx6sabresd_spl_defconfig | 1 + include/configs/mx6sabresd.h | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index 5512d51..58d0b4b 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -52,3 +52,4 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT=y # CONFIG_BLK is not set # CONFIG_DM_MMC_OPS is not set +CONFIG_SYS_I2C_MXC=y diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 43a4aac..b90afe0 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -51,12 +51,13 @@ #endif /* I2C Configs */ +#ifdef CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1/* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2/* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C3/* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 10 +#endif /* PMIC */ #define CONFIG_POWER -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 13/21] SabreSD: Enable DM_I2C and DM_PMIC
From: Jagan Teki
(1) Enable
DM_I2C
DM_PMIC
DM_PMIC_PFUZE100
(2) Removed
setup_i2c
power_init_board
I2C Log:
=> i2c bus
Bus 0: i2c@021a
Bus 1: i2c@021a4000
08: pfuze100@08, offset len 1, flags 0
Bus 2: i2c@021a8000
=> i2c dev 1
Setting bus to 1
=> i2c speed 10
Setting bus speed to 10 Hz
=> i2c probe
Valid chip addresses: 08 48
=> i2c md 08 0x0 0x20
: 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=> i2c md 48 0x0 0x20
: 00 f0 00 00 00 00 00 00 00 00 00 80 70 41 41 41pAAA
0010: 00 00 00 80 70 41 41 41 41 41 41 41 41 41 41 41pAAA
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 3 ++
board/freescale/mx6sabresd/mx6sabresd.c | 72 -
include/configs/mx6sabresd.h| 15 ---
3 files changed, 3 insertions(+), 87 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 42ac9b9..314a61f 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -214,8 +214,11 @@ config TARGET_MX6SABRESD
select BOARD_LATE_INIT
select OF_CONTROL
select DM
+ select DM_I2C
select DM_GPIO
select DM_MMC
+ select DM_PMIC
+ select DM_PMIC_PFUZE100
select DM_THERMAL
select PINCTRL
select PINCTRL_IMX6
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index 7af263d..cbd952f 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -12,7 +12,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -22,10 +21,6 @@
#include
#include
#include
-#include
-#include
-#include
-#include "../common/pfuze.h"
#include
DECLARE_GLOBAL_DATA_PTR;
@@ -40,14 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define I2C_PMIC 1
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
int dram_init(void)
@@ -152,32 +139,6 @@ static void enable_lvds(struct display_info_t const *dev)
enable_backlight();
}
-static struct i2c_pads_info mx6q_i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
- .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
- .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-static struct i2c_pads_info mx6dl_i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
- .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
- .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
static void setup_spi(void)
{
SETUP_IOMUX_PADS(ecspi1_pads);
@@ -471,10 +432,6 @@ int board_init(void)
#ifdef CONFIG_MXC_SPI
setup_spi();
#endif
- if (is_mx6dq() || is_mx6dqp())
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1);
- else
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1);
#ifdef CONFIG_USB_EHCI_MX6
setup_usb();
#endif
@@ -482,35 +439,6 @@ int board_init(void)
return 0;
}
-int power_init_board(void)
-{
- struct pmic *p;
- unsigned int reg;
- int ret;
-
- p = pfuze_common_init(I2C_PMIC);
- if (!p)
- return -ENODEV;
-
- ret = pfuze_mode_init(p, APS_PFM);
- if (ret < 0)
- return ret;
-
- /* Increase VGEN3 from 2.5 to 2.8V */
- pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
- reg &= ~LDO_VOL_MASK;
- reg |= LDOB_2_80V;
- pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
-
- /* Increase VGEN5 from 2.8 to 3V */
- pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
- reg &= ~LDO_VOL_MASK;
- reg |= LDOB_3_00V;
- pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
-
- return 0;
-}
-
#ifdef CONFIG_MXC_SPI
int board_spi_cs_gpio(unsigned bus, unsigned cs)
{
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index b90afe0..9d82355 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -50,21 +50,6 @@
#define CONFIG_PCIE_IMX_POWER_G
[U-Boot] [PATCH v6 03/21] ARM: i.MX6: sabresd: Remove SPL_I2C_SUPPORT
From: Jagan Teki I2C support not needed for SPL build, hence removed the CONFIG_SPL_I2C_SUPPORT from mx6sabresd_spl_defconfig Cc: Stefano Babic Cc: Fabio Estevam Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- configs/mx6sabresd_spl_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index 0e0edef..2bfacb9 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y -CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 20/21] i.MX6: SabreSD: mx6sabresd_spl_defconfig => mx6sabresd_defconfig
From: Jagan Teki
Now, SabreSD support SPL for all cpu types and the only configuration
option, So renamed mx6sabresd_spl_defconfig to mx6sabresd_defconfig
Signed-off-by: Jagan Teki
---
board/freescale/mx6sabresd/MAINTAINERS | 2 +-
configs/{mx6sabresd_spl_defconfig => mx6sabresd_defconfig} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename configs/{mx6sabresd_spl_defconfig => mx6sabresd_defconfig} (100%)
diff --git a/board/freescale/mx6sabresd/MAINTAINERS
b/board/freescale/mx6sabresd/MAINTAINERS
index 262c816..9575261 100644
--- a/board/freescale/mx6sabresd/MAINTAINERS
+++ b/board/freescale/mx6sabresd/MAINTAINERS
@@ -3,4 +3,4 @@ M: Fabio Estevam
S: Maintained
F: board/freescale/mx6sabresd/
F: include/configs/mx6sabresd.h
-F: configs/mx6sabresd_spl_defconfig
+F: configs/mx6sabresd_defconfig
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_defconfig
similarity index 100%
rename from configs/mx6sabresd_spl_defconfig
rename to configs/mx6sabresd_defconfig
--
1.9.1
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[U-Boot] [PATCH v6 06/21] ARM: dts: i.MX6: Add imx6dl-sabresd.dts
From: Jagan Teki
Retrive imx6dl-sabresd.dts from Linux with last commit
"ARM: dts: imx: share pad macro names between imx6q and imx6dl"
(sha1: c56009b2f6134e5943a03cf26e4d7fce9745d56b)
Signed-off-by: Jagan Teki
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6dl-sabresd.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644 arch/arm/dts/imx6dl-sabresd.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c5e1a9d..54cdd23a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -335,6 +335,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6sll-evk.dtb \
imx6dl-icore.dtb \
imx6dl-icore-rqs.dtb \
+ imx6dl-sabresd.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
imx6q-logicpd.dtb \
diff --git a/arch/arm/dts/imx6dl-sabresd.dts b/arch/arm/dts/imx6dl-sabresd.dts
new file mode 100644
index 000..1e45f2f
--- /dev/null
+++ b/arch/arm/dts/imx6dl-sabresd.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-sabresd.dtsi"
+
+/ {
+ model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
+ compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
+};
--
1.9.1
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[U-Boot] [PATCH v6 21/21] SabreSD: README: Update with dtb changes
From: Jagan Teki Now SabreSD board support SPL with U-Boot proper devicetree enabled, so update the README according with images generated with respective builds. "Booting from eMMC" still need to test and update README. Signed-off-by: Jagan Teki --- board/freescale/mx6sabresd/README | 66 +++ 1 file changed, 19 insertions(+), 47 deletions(-) diff --git a/board/freescale/mx6sabresd/README b/board/freescale/mx6sabresd/README index 628d35f..9749511 100644 --- a/board/freescale/mx6sabresd/README +++ b/board/freescale/mx6sabresd/README @@ -1,43 +1,36 @@ How to use and build U-Boot on mx6sabresd: --- +- -Currently there are four methods for booting mx6sabresd boards: +Currently there are three methods for booting mx6sabresd boards: -1. Booting from SD card via normal U-Boot (u-boot.imx) +1. Booting via SPL (SPL and u-boot-dtb.img) 2. Booting from eMMC via normal U-Boot -3. Booting via SPL (SPL and u-boot.img) - -4. Booting via Falcon mode (SPL launches the kernel directly) - +3. Booting via Falcon mode (SPL launches the kernel directly) -1. Booting from SD card via normal U-Boot -- - -$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) -or +1. Booting via SPL (SPL and u-boot-dtb.img) +--- -$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make mx6sabresd_defconfig $ make -This will generate the image called u-boot.imx. +This will generate the SPL image called SPL and the u-boot-dtb.img. -- Flash the u-boot.imx binary into the SD card: +- Flash the SPL image into the SD card: + +$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync -$ sudo dd if=u-boot.imx of=/dev/sdb bs=1K seek=1 && sync +- Flash the u-boot-dtb.img image into the SD card: +$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 && sync 2. Booting from eMMC via normal U-Boot -- -$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) - -or - -$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make mx6sabresd_defconfig $ make @@ -66,42 +59,21 @@ $ sudo dd if=u-boot.imx of=/dev/sdX bs=1K seek=1 && sync Set SW6 to eMMC 8-bit boot: 11010110 - -3. Booting via SPL --- - -Other method for building U-Boot on mx6qsabresd and mx6qpsabresd is -through SPL. In order to do so: - -$ make mx6sabresd_spl_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot.img. - -- Flash the SPL image into the SD card: - -$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync - -- Flash the u-boot.img image into the SD card: - -$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 && sync - - -4. Booting via Falcon mode +3. Booting via Falcon mode -- -$ make mx6sabresd_spl_defconfig +$ make mx6sabresd_defconfig $ make -This will generate the SPL image called SPL and the u-boot.img. +This will generate the SPL image called SPL and the u-boot-dtb.img. - Flash the SPL image into the SD card: $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync -- Flash the u-boot.img image into the SD card: +- Flash the u-boot-dtb.img image into the SD card: -$ sudo dd if=u-boot.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync +$ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 oflag=sync status=none && sync Create a partition for root file system and extract it there: -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 10/21] sabresd: i.MX6QP: Add initial dts support
From: Jagan Teki
Add initial devicetree support for i.MX6 Quad Plus Sabresd board.
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 3 +++
board/freescale/mx6sabresd/spl.c | 12
configs/mx6sabresd_spl_defconfig | 1 +
3 files changed, 16 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 0497fe0..42ac9b9 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -220,6 +220,9 @@ config TARGET_MX6SABRESD
select PINCTRL
select PINCTRL_IMX6
select SUPPORT_SPL
+ select FIT
+ select SPL_LOAD_FIT
+ select SPL_OF_LIBFDT
config TARGET_MX6SLEVK
bool "mx6slevk"
diff --git a/board/freescale/mx6sabresd/spl.c b/board/freescale/mx6sabresd/spl.c
index 01d45ce..63847b3 100644
--- a/board/freescale/mx6sabresd/spl.c
+++ b/board/freescale/mx6sabresd/spl.c
@@ -147,6 +147,18 @@ int board_mmc_init(bd_t *bis)
}
#endif /* CONFIG_FSL_ESDHC */
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+ if (is_mx6dqp() && !strcmp(name, "imx6qp-sabresd"))
+ return 0;
+ else if (is_mx6dq() && !strcmp(name, "imx6q-sabresd"))
+ return 0;
+ else
+ return -1;
+}
+#endif
+
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig
index 33e84f0..ef02df1 100644
--- a/configs/mx6sabresd_spl_defconfig
+++ b/configs/mx6sabresd_spl_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_VIDEO=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd"
+CONFIG_OF_LIST="imx6qp-sabresd imx6q-sabresd"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL"
CONFIG_BOOTDELAY=3
# CONFIG_CONSOLE_MUX is not set
--
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[U-Boot] [PATCH v6 09/21] sabresd: i.MX6Q: Add initial dts support
From: Jagan Teki
Add initial devicetree support for i.MX6 Quad Sabresd board.
(1) Added config options
CONFIG_OF_CONTROL=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_BLK is not set
CONFIG_DM_MMC_OPS is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
(2) Moved spl code to board/freescale/mx6sabresd/spl.c
(3) Removed U-Boot proper board_mmc_init code, since mmc
support through dtb
(4) DM_GPIO and GM_MMC are undef for SPL, till SPL_OF_CONTROL
support.
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 9 +-
board/freescale/mx6sabresd/Makefile | 1 +
board/freescale/mx6sabresd/mx6sabresd.c | 523
board/freescale/mx6sabresd/spl.c| 501 ++
configs/mx6sabresd_spl_defconfig| 3 +
include/configs/mx6sabresd.h| 5 +-
6 files changed, 516 insertions(+), 526 deletions(-)
create mode 100644 board/freescale/mx6sabresd/spl.c
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 0ff9045..0497fe0 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -210,11 +210,16 @@ config TARGET_MX6QSABREAUTO
config TARGET_MX6SABRESD
bool "mx6sabresd"
+ select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
- select SUPPORT_SPL
+ select OF_CONTROL
select DM
+ select DM_GPIO
+ select DM_MMC
select DM_THERMAL
- select BOARD_EARLY_INIT_F
+ select PINCTRL
+ select PINCTRL_IMX6
+ select SUPPORT_SPL
config TARGET_MX6SLEVK
bool "mx6slevk"
diff --git a/board/freescale/mx6sabresd/Makefile
b/board/freescale/mx6sabresd/Makefile
index cfca2ef..3ae32ab 100644
--- a/board/freescale/mx6sabresd/Makefile
+++ b/board/freescale/mx6sabresd/Makefile
@@ -7,3 +7,4 @@
#
obj-y := mx6sabresd.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index f4a5d9c..7af263d 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -16,8 +16,6 @@
#include
#include
#include
-#include
-#include
#include
#include
#include
@@ -36,10 +34,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
@@ -56,8 +50,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
-#define KEY_VOL_UP IMX_GPIO_NR(1, 4)
-
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@@ -100,47 +92,6 @@ static void setup_iomux_enet(void)
udelay(100);
}
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)),
/* CD */
-};
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
- IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00| MUX_PAD_CTRL(NO_PAD_CTRL)), /*
CD */
-};
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
- IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD
[U-Boot] [PATCH v6 18/21] i.MX6: sabresd: Drop checkboard
From: Jagan Teki
Since SabreSD is supporting fdt, there is no use
of printing the board name explicitly using checkboard
because dtb supported u-boot will print model like this
Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Signed-off-by: Jagan Teki
Reviewed-by: Fabio Estevam
---
board/freescale/mx6sabresd/mx6sabresd.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index a30cf0d..2aaf397 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -370,9 +370,3 @@ int board_late_init(void)
return 0;
}
-
-int checkboard(void)
-{
- puts("Board: MX6-SabreSD\n");
- return 0;
-}
--
1.9.1
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[U-Boot] [PATCH v6 11/21] SabreSD: i.MX6DL: Add initial dts support
From: Jagan Teki Add initial devicetree support for i.MX6 DualLite Sabresd board. Signed-off-by: Jagan Teki --- board/freescale/mx6sabresd/spl.c | 2 ++ configs/mx6sabresd_spl_defconfig | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/board/freescale/mx6sabresd/spl.c b/board/freescale/mx6sabresd/spl.c index 63847b3..2488cb5 100644 --- a/board/freescale/mx6sabresd/spl.c +++ b/board/freescale/mx6sabresd/spl.c @@ -154,6 +154,8 @@ int board_fit_config_name_match(const char *name) return 0; else if (is_mx6dq() && !strcmp(name, "imx6q-sabresd")) return 0; + else if (is_mx6sdl() && !strcmp(name, "imx6dl-sabresd")) + return 0; else return -1; } diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index ef02df1..5512d51 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_VIDEO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" -CONFIG_OF_LIST="imx6qp-sabresd imx6q-sabresd" +CONFIG_OF_LIST="imx6qp-sabresd imx6q-sabresd imx6dl-sabresd" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v6 15/21] SabreSD: Enable DM_USB
From: Jagan Teki
Enable DM_USB and removed non-DM_USB related config options.
Signed-off-by: Jagan Teki
Reviewed-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/Kconfig | 1 +
board/freescale/mx6sabresd/mx6sabresd.c | 65 -
include/configs/mx6sabresd.h| 11 ++
3 files changed, 5 insertions(+), 72 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 9a874cd..fa55cc0 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -221,6 +221,7 @@ config TARGET_MX6SABRESD
select DM_PMIC_PFUZE100
select DM_REGULATOR
select DM_THERMAL
+ select DM_USB
select PINCTRL
select PINCTRL_IMX6
select SUPPORT_SPL
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c
b/board/freescale/mx6sabresd/mx6sabresd.c
index cbd952f..1761a14 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -21,7 +21,6 @@
#include
#include
#include
-#include
DECLARE_GLOBAL_DATA_PTR;
@@ -353,67 +352,6 @@ int board_eth_init(bd_t *bis)
return cpu_eth_init(bis);
}
-#ifdef CONFIG_USB_EHCI_MX6
-#define USB_OTHERREGS_OFFSET 0x800
-#define UCTRL_PWR_POL (1 << 9)
-
-static iomux_v3_cfg_t const usb_otg_pads[] = {
- IOMUX_PADS(PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const usb_hc1_pads[] = {
- IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static void setup_usb(void)
-{
- SETUP_IOMUX_PADS(usb_otg_pads);
-
- /*
-* set daisy chain for otg_pin_id on 6q.
-* for 6dl, this bit is reserved
-*/
- imx_iomux_set_gpr_register(1, 13, 1, 0);
-
- SETUP_IOMUX_PADS(usb_hc1_pads);
-}
-
-int board_ehci_hcd_init(int port)
-{
- u32 *usbnc_usb_ctrl;
-
- if (port > 1)
- return -EINVAL;
-
- usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
-port * 4);
-
- setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
-
- return 0;
-}
-
-int board_ehci_power(int port, int on)
-{
- switch (port) {
- case 0:
- break;
- case 1:
- if (on)
- gpio_direction_output(IMX_GPIO_NR(1, 29), 1);
- else
- gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
- break;
- default:
- printf("MXC USB port %d not yet supported\n", port);
- return -EINVAL;
- }
-
- return 0;
-}
-#endif
-
int board_early_init_f(void)
{
setup_iomux_uart();
@@ -432,9 +370,6 @@ int board_init(void)
#ifdef CONFIG_MXC_SPI
setup_spi();
#endif
-#ifdef CONFIG_USB_EHCI_MX6
- setup_usb();
-#endif
return 0;
}
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 9d82355..ac94bd8 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -51,13 +51,10 @@
#endif
/* USB Configs */
-#ifdef CONFIG_CMD_USB
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS 0
-#define CONFIG_USB_MAX_CONTROLLER_COUNT1 /* Enabled USB controller
number */
+#ifdef CONFIG_USB_EHCI_MX6
+# define CONFIG_USB_HOST_ETHER
+# define CONFIG_USB_ETHER_ASIX
+# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif
#endif /* __MX6QSABRESD_CONFIG_H */
--
1.9.1
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[U-Boot] [PATCH 2/3] mx6sabresd: Update the config file
From: Fabio Estevam Only configs/mx6sabresd_defconfig is supported now, so update the MAINTAINERS file accordingly. Signed-off-by: Fabio Estevam --- board/freescale/mx6sabresd/MAINTAINERS | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/board/freescale/mx6sabresd/MAINTAINERS b/board/freescale/mx6sabresd/MAINTAINERS index add2314..9575261 100644 --- a/board/freescale/mx6sabresd/MAINTAINERS +++ b/board/freescale/mx6sabresd/MAINTAINERS @@ -3,6 +3,4 @@ M: Fabio Estevam S: Maintained F: board/freescale/mx6sabresd/ F: include/configs/mx6sabresd.h -F: configs/mx6dlsabresd_defconfig -F: configs/mx6qsabresd_defconfig -F: configs/mx6sabresd_spl_defconfig +F: configs/mx6sabresd_defconfig -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/3] mx6sabresd: Update to SPL only mode
From: Fabio Estevam mx6sabresd only supports SPL mode now, so update the README file accordingly. Signed-off-by: Fabio Estevam --- board/freescale/mx6sabresd/README | 84 +-- 1 file changed, 28 insertions(+), 56 deletions(-) diff --git a/board/freescale/mx6sabresd/README b/board/freescale/mx6sabresd/README index bc0c0d0..4b4df06 100644 --- a/board/freescale/mx6sabresd/README +++ b/board/freescale/mx6sabresd/README @@ -1,56 +1,47 @@ -How to use and build U-Boot on mx6sabresd: --- - -Currently there are four methods for booting mx6sabresd boards: +How to use and build U-Boot on mx6sabresd +- -1. Booting from SD card via normal U-Boot (u-boot.imx) +The following methods can be used for booting mx6sabresd boards: -2. Booting from eMMC via normal U-Boot +1. Booting from SD card -3. Booting via SPL (SPL and u-boot.img) +2. Booting from eMMC -4. Booting via Falcon mode (SPL launches the kernel directly) +3. Booting via Falcon mode (SPL launches the kernel directly) -1. Booting from SD card via normal U-Boot -- +1. Booting from SD card via SPL +--- -$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) +mx6sabresd_defconfig target supports mx6q/mx6dl/mx6qp sabresd variants. -or +In order to build it: -$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make mx6sabresd_defconfig $ make -This will generate the image called u-boot.imx. +This will generate the SPL and u-boot.img binaries. -- Flash the u-boot.imx binary into the SD card: +- Flash the SPL binary into the SD card: -$ sudo dd if=u-boot.imx of=/dev/sdb bs=1K seek=1 && sync +$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync +- Flash the u-boot.img binary into the SD card: -2. Booting from eMMC via normal U-Boot --- +$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync -$ make mx6qsabresd_defconfig (If you want to build for mx6qsabresd) -or +2. Booting from eMMC + -$ make mx6dlsabresd_defconfig (If you want to build for mx6dlsabresd) +$ make mx6sabresd_defconfig $ make -This will generate the image called u-boot.imx. - -- Flash the u-boot.imx binary into the eMMC: - -Set SW6 to download mode: 1100 +This will generate the SPL and u-boot.img binaries. -Plug a usb cable to USB-OTG and load the u-boot image using the imx_usb_loader -tool (https://github.com/boundarydevices/imx_usb_loader): - -$ sudo ./imx_usb u-boot.imx +- Boot first from SD card as shown in the previous section In U-boot change the eMMC partition config: @@ -60,48 +51,29 @@ Mount the eMMC in the host PC: => ums 0 mmc 2 -Flash the u-boot.imx binary +- Flash SPL and u-boot.img binaries into the eMMC: -$ sudo dd if=u-boot.imx of=/dev/sdX bs=1K seek=1 && sync +$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync +$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync Set SW6 to eMMC 8-bit boot: 11010110 -3. Booting via SPL --- - -Other method for building U-Boot on mx6qsabresd and mx6qpsabresd is -through SPL. In order to do so: - -$ make mx6sabresd_spl_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot.img. - -- Flash the SPL image into the SD card: - -$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 && sync - -- Flash the u-boot.img image into the SD card: - -$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 && sync - - -4. Booting via Falcon mode +3. Booting via Falcon mode -- -$ make mx6sabresd_spl_defconfig +$ make mx6sabresd_defconfig $ make This will generate the SPL image called SPL and the u-boot.img. - Flash the SPL image into the SD card: -$ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 oflag=sync status=none && sync +$ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 oflag=sync status=none && sync - Flash the u-boot.img image into the SD card: -$ sudo dd if=u-boot.img of=/dev/sdbbs=1K seek=69 oflag=sync status=none && sync +$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 oflag=sync status=none && sync Create a partition for root file system and extract it there: -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] mx6sabresd: Rename target to mx6sabresd_defconfig
From: Fabio Estevam
As mx6sabresd only supports SPL target now, there is no need to
keep the 'spl' in the name of the target, so simply rename it
to mx6sabresd_defconfig.
Signed-off-by: Fabio Estevam
---
configs/{mx6sabresd_spl_defconfig => mx6sabresd_defconfig} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename configs/{mx6sabresd_spl_defconfig => mx6sabresd_defconfig} (100%)
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_defconfig
similarity index 100%
rename from configs/mx6sabresd_spl_defconfig
rename to configs/mx6sabresd_defconfig
--
2.7.4
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[U-Boot] [PATCH 1/2] drivers: net: fsl-mc: Define PHY_RESET_R function
DPAA2 platforms boot the Management Complex based on the u-boot env
variable "mcinitcmd". Instead of doing this step on each platform
individually, define a reset_phy function in the MC driver, since it's
semantically tied to it and it gets called at a later moment, when all
board PHY devices have been initialized.
Signed-off-by: Bogdan Purcareata
Signed-off-by: Heinz Wrobel
---
board/freescale/ls2080aqds/eth.c | 8
board/freescale/ls2080ardb/eth_ls2080rdb.c | 7 +--
drivers/net/fsl-mc/mc.c| 18 ++
include/configs/ls2080a_common.h | 5 +
4 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 59361e9..23feb9b 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -834,7 +834,6 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
int board_eth_init(bd_t *bis)
{
int error;
- char *mc_boot_env_var;
#ifdef CONFIG_FSL_MC_ENET
struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) &
@@ -902,9 +901,6 @@ int board_eth_init(bd_t *bis)
}
}
- mc_boot_env_var = getenv(MC_BOOT_ENV_VAR);
- if (mc_boot_env_var)
- run_command_list(mc_boot_env_var, -1, 0);
error = cpu_eth_init(bis);
if (hwconfig_f("xqsgmii", env_hwconfig)) {
@@ -918,7 +914,3 @@ int board_eth_init(bd_t *bis)
error = pci_eth_init(bis);
return error;
}
-
-#ifdef CONFIG_FSL_MC_ENET
-
-#endif
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c
b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index ba584c8..0a8500b 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -20,11 +20,9 @@
DECLARE_GLOBAL_DATA_PTR;
-#define MC_BOOT_ENV_VAR "mcinitcmd"
int board_eth_init(bd_t *bis)
{
#if defined(CONFIG_FSL_MC_ENET)
- char *mc_boot_env_var;
int i, interface;
struct memac_mdio_info mdio_info;
struct mii_dev *dev;
@@ -98,11 +96,8 @@ int board_eth_init(bd_t *bis)
}
}
- mc_boot_env_var = getenv(MC_BOOT_ENV_VAR);
- if (mc_boot_env_var)
- run_command_list(mc_boot_env_var, -1, 0);
cpu_eth_init(bis);
-#endif /* CONFIG_FMAN_ENET */
+#endif /* CONFIG_FSL_MC_ENET */
#ifdef CONFIG_PHY_AQUANTIA
/*
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 9f69d75..afaf285 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -26,6 +26,7 @@
#define MC_MEM_SIZE_ENV_VAR"mcmemsize"
#define MC_BOOT_TIMEOUT_ENV_VAR"mcboottimeout"
+#define MC_BOOT_ENV_VAR"mcinitcmd"
DECLARE_GLOBAL_DATA_PTR;
static int mc_boot_status = -1;
@@ -1362,3 +1363,20 @@ U_BOOT_CMD(
"fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
"fsl_mc start aiop [FW_addr] - Start AIOP\n"
);
+
+#if defined(CONFIG_RESET_PHY_R)
+void reset_phy(void)
+{
+#if defined(CONFIG_FSL_MC_ENET)
+ char *mc_boot_env_var;
+ /* The MC may only be initialized in the reset PHY function
+* because otherwise U-Boot has not yet set up all the MAC
+* address info properly. Without MAC addresses, the MC code
+* can not properly initialize the DPC.
+*/
+ mc_boot_env_var = getenv(MC_BOOT_ENV_VAR);
+ if (mc_boot_env_var)
+ run_command_list(mc_boot_env_var, -1, 0);
+#endif /* CONFIG_FSL_MC_ENET */
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 427f623..266ef02 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -149,6 +149,11 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x20
#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x0700
+/* Define phy_reset function to boot the MC based on mcinitcmd.
+ * This happens late enough to properly fixup u-boot env MAC addresses.
+ */
+#define CONFIG_RESET_PHY_R
+
/*
* Carve out a DDR region which will not be used by u-boot/Linux
*
--
1.9.1
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[U-Boot] [PATCH 2/2] drivers: net: fsl-mc: Include MAC addr fixup in DPL
Previous to MC v10.x, port mac address was specified via DPL. Since
newer MC versions are compatible with old style DPLs, make the u-boot
env mac addresses visible there. This applies only to DPLs that have an
older version.
DPLs use 32 bit values for specifying MAC addresses. U-boot environment
variables take precedence over the MAC addresses already visible in the
DPL/DPC.
Signed-off-by: Bogdan Purcareata
Signed-off-by: Heinz Wrobel
---
drivers/net/fsl-mc/mc.c | 260
1 file changed, 197 insertions(+), 63 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index afaf285..aaa887f 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -155,19 +155,144 @@ int parse_mc_firmware_fit_image(u64 mc_fw_addr,
}
#endif
-static int mc_fixup_dpc_mac_addr(void *blob, int noff, int dpmac_id,
- struct eth_device *eth_dev)
+#define MC_DT_INCREASE_SIZE64
+
+enum mc_fixup_type {
+ MC_FIXUP_DPL,
+ MC_FIXUP_DPC
+};
+
+static int mc_fixup_mac_addr(void *blob, int nodeoffset,
+const char *propname, struct eth_device *eth_dev,
+enum mc_fixup_type type)
{
- int nodeoffset, err = 0;
+ int err = 0, len, size, i;
+ unsigned char env_enetaddr[ARP_HLEN];
+ unsigned int enetaddr_32[ARP_HLEN];
+ void *val;
+
+ switch (type) {
+ case MC_FIXUP_DPL:
+ /* DPL likes its addresses on 32 * ARP_HLEN bits */
+ for (i = 0; i < ARP_HLEN; i++)
+ enetaddr_32[i] = cpu_to_fdt32(eth_dev->enetaddr[i]);
+ val = enetaddr_32;
+ len = sizeof(enetaddr_32);
+ break;
+
+ case MC_FIXUP_DPC:
+ val = eth_dev->enetaddr;
+ len = ARP_HLEN;
+ break;
+ }
+
+ /* MAC address property present */
+ if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
+ /* u-boot MAC addr randomly assigned - leave the present one */
+ if (!eth_getenv_enetaddr_by_index("eth", eth_dev->index,
+ env_enetaddr))
+ return err;
+ } else {
+ size = MC_DT_INCREASE_SIZE + strlen(propname) + len;
+ /* make room for mac address property */
+ err = fdt_increase_size(blob, size);
+ if (err) {
+ printf("fdt_increase_size: err=%s\n",
+ fdt_strerror(err));
+ return err;
+ }
+ }
+
+ err = fdt_setprop(blob, nodeoffset, propname, val, len);
+ if (err) {
+ printf("fdt_setprop: err=%s\n", fdt_strerror(err));
+ return err;
+ }
+
+ return err;
+}
+
+#define is_dpni(s) (s != NULL ? !strncmp(s, "dpni@", 5) : 0)
+
+const char *dpl_get_connection_endpoint(void *blob, char *endpoint)
+{
+ int connoffset = fdt_path_offset(blob, "/connections"), off;
+ const char *s1, *s2;
+
+ for (off = fdt_first_subnode(blob, connoffset);
+off >= 0;
+off = fdt_next_subnode(blob, off)) {
+ s1 = fdt_stringlist_get(blob, off, "endpoint1", 0, NULL);
+ s2 = fdt_stringlist_get(blob, off, "endpoint2", 0, NULL);
+
+ if (!s1 || !s2)
+ continue;
+
+ if (strcmp(endpoint, s1) == 0)
+ return s2;
+
+ if (strcmp(endpoint, s2) == 0)
+ return s1;
+ }
+
+ return NULL;
+}
+
+static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
+struct eth_device *eth_dev)
+{
+ int objoff = fdt_path_offset(blob, "/objects");
+ int dpmacoff = -1, dpnioff = -1;
+ const char *endpoint;
char mac_name[10];
- const char link_type_mode[] = "FIXED_LINK";
- unsigned char env_enetaddr[6];
+ int err;
+
+ sprintf(mac_name, "dpmac@%d", dpmac_id);
+ dpmacoff = fdt_subnode_offset(blob, objoff, mac_name);
+ if (dpmacoff < 0)
+ /* dpmac not defined in DPL, so skip it. */
+ return 0;
+
+ printf("Fixing up mac addr for %s\n", mac_name);
+ err = mc_fixup_mac_addr(blob, dpmacoff, "mac_addr", eth_dev,
+ MC_FIXUP_DPL);
+ if (err) {
+ printf("Error fixing up dpmac mac_addr in DPL\n");
+ return err;
+ }
+
+ /* Now we need to figure out if there is any
+* DPNI connected to this MAC, so we walk the
+* connection list
+*/
+ endpoint = dpl_get_connection_endpoint(blob, mac_name);
+ if (!is_dpni(endpoint))
+ return 0;
+
+ /* let's see if we can fixup the DPNI as well */
+ printf("Checking connection %s <=> %s\n", mac_name, endpoint);
+ dpnioff = fdt_subnode_offset(blob, objoff, endpoint);
+ if (dpnioff < 0)
+
Re: [U-Boot] [PATCH v2] fastboot: Add support for flashing zImage
On Thu, May 18, 2017 at 11:50:23AM +0300, Sam Protsenko wrote:
> On 18 May 2017 at 01:20, Tom Rini wrote:
> > On Wed, May 17, 2017 at 08:20:47PM +0300, Sam Protsenko wrote:
> >
> >> This patch adds support for flashing zImage to the Android boot
> >> partition on eMMC.
> > [snip]
> >> +#ifdef CONFIG_ANDROID_BOOT_IMAGE
> >> + if (strcmp(cmd, "zImage") == 0 || strcmp(cmd, "zimage") == 0) {
> >
> > strncasecmp(cmd, "zimage", 6) ?
> >
>
> Good catch, didn't know this routine exists. Will fix it in v3.
>
> >> diff --git a/include/android_image.h b/include/android_image.h
> >> index dfd4d9d72c..c058b1d388 100644
> >> --- a/include/android_image.h
> >> +++ b/include/android_image.h
> >> @@ -12,6 +12,8 @@
> >> #ifndef _ANDROID_IMAGE_H_
> >> #define _ANDROID_IMAGE_H_
> >>
> >> +#include
> >> +
> >> typedef struct andr_img_hdr andr_img_hdr;
> >>
> >> #define ANDR_BOOT_MAGIC "ANDROID!"
> >
> > Unneeded.
> >
>
> If you remove that inclusion, build will fail with errors like this:
>
> include/android_image.h:28:2: error: unknown type name ‘u32’
>
> So it should be included either in android_image.h, or I should
> include it in common/fb_mmc.c *before* including android_image.h.
> Which is (I presume) a bad style. So I incline to do that the way I
> did it. If you still don't agree -- I'll rework it.
In this case, it's a header we're mirroring from upstream Android, so
I'd rather not modify it. That is indeed not the normal way to address
this issue.
> >> diff --git a/include/linux/compat.h b/include/linux/compat.h
> >> index a43e4d6698..b0ff6b91f0 100644
> >> --- a/include/linux/compat.h
> >> +++ b/include/linux/compat.h
> >> @@ -111,6 +111,9 @@ static inline void kmem_cache_destroy(struct
> >> kmem_cache *cachep)
> >>
> >> #define PAGE_SIZE4096
> >>
> >> +/* to align the pointer to the (next) page boundary */
> >> +#define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE)
> >
> > Just use ALIGN() in the code you're writing? This is for things we're
> > pulling directly from Linux really.
> >
>
> Thought it would be more clear that way. Btw, I pulled PAGE_ALIGN()
> from kernel (from include/linux/mm.h). But it's not important to me,
> so if you want me to use ALIGN() -- I will change it in v3.
Thanks!
--
Tom
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[U-Boot] [PATCH v3] fastboot: Add support for flashing zImage
This patch adds support for flashing zImage to the Android boot
partition on eMMC.
Usage:
$ fastboot flash zImage
It's based on [1].
[1]
http://omapzoom.org/?p=repo/u-boot.git;a=commit;h=3393b908c1e848bba3706612cbe50aa8970720b3
Signed-off-by: Sam Protsenko
---
Changes in v2:
- use blk_dread()/blk_dwrite() instead of callbacks from struct blk_desc
- fix SPL build warning on DRA7 (check for CONFIG_ANDROID_BOOT_IMAGE)
Changes in v3:
- use strncasecmp() to check for "zImage"/"zimage" command
- do not add PAGE_ALIGN() macro; use ALIGN() instead
- do not include in android_image.h
common/fb_mmc.c | 168
1 file changed, 168 insertions(+)
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 866982e41c..2113b6c372 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
/*
* FIXME: Ensure we always set these names via Kconfig once xxx_PARTITION is
@@ -27,6 +29,8 @@
#define CONFIG_FASTBOOT_MBR_NAME "mbr"
#endif
+#define BOOT_PARTITION_NAME "boot"
+
struct fb_mmc_sparse {
struct blk_desc *dev_desc;
};
@@ -99,6 +103,163 @@ static void write_raw_image(struct blk_desc *dev_desc,
disk_partition_t *info,
fastboot_okay("");
}
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+/**
+ * Read Android boot image header from boot partition.
+ *
+ * @param[in] dev_desc MMC device descriptor
+ * @param[in] info Boot partition info
+ * @param[out] hdr Where to store read boot image header
+ *
+ * @return Boot image header sectors count or 0 on error
+ */
+static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
+ disk_partition_t *info,
+ struct andr_img_hdr *hdr)
+{
+ ulong sector_size; /* boot partition sector size */
+ lbaint_t hdr_sectors; /* boot image header sectors count */
+ int res;
+
+ /* Calculate boot image sectors count */
+ sector_size = info->blksz;
+ hdr_sectors = DIV_ROUND_UP(sizeof(struct andr_img_hdr), sector_size);
+ if (hdr_sectors == 0) {
+ error("invalid number of boot sectors: 0");
+ fastboot_fail("invalid number of boot sectors: 0");
+ return 0;
+ }
+
+ /* Read the boot image header */
+ res = blk_dread(dev_desc, info->start, hdr_sectors, (void *)hdr);
+ if (res == 0) {
+ error("cannot read header from boot partition");
+ fastboot_fail("cannot read header from boot partition");
+ return 0;
+ }
+
+ /* Check boot header magic string */
+ res = android_image_check_header(hdr);
+ if (res != 0) {
+ error("bad boot image magic");
+ fastboot_fail("boot partition not initialized");
+ return 0;
+ }
+
+ return hdr_sectors;
+}
+
+/**
+ * Write downloaded zImage to boot partition and repack it properly.
+ *
+ * @param dev_desc MMC device descriptor
+ * @param download_buffer Address to fastboot buffer with zImage in it
+ * @param download_bytes Size of fastboot buffer, in bytes
+ *
+ * @return 0 on success or -1 on error
+ */
+static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
+ void *download_buffer,
+ unsigned int download_bytes)
+{
+ u32 hdr_addr; /* boot image header address */
+ struct andr_img_hdr *hdr; /* boot image header */
+ lbaint_t hdr_sectors; /* boot image header sectors */
+ u8 *ramdisk_buffer;
+ u32 ramdisk_sector_start;
+ u32 ramdisk_sectors;
+ u32 kernel_sector_start;
+ u32 kernel_sectors;
+ u32 sectors_per_page;
+ disk_partition_t info;
+ int res;
+
+ puts("Flashing zImage\n");
+
+ /* Get boot partition info */
+ res = part_get_info_by_name(dev_desc, BOOT_PARTITION_NAME, &info);
+ if (res < 0) {
+ error("cannot find boot partition");
+ fastboot_fail("cannot find boot partition");
+ return -1;
+ }
+
+ /* Put boot image header in fastboot buffer after downloaded zImage */
+ hdr_addr = (u32)download_buffer + ALIGN(download_bytes, PAGE_SIZE);
+ hdr = (struct andr_img_hdr *)hdr_addr;
+
+ /* Read boot image header */
+ hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr);
+ if (hdr_sectors == 0) {
+ error("unable to read boot image header");
+ fastboot_fail("unable to read boot image header");
+ return -1;
+ }
+
+ /* Check if boot image has second stage in it (we don't support it) */
+ if (hdr->second_size > 0) {
+ error("moving second stage is not supported yet");
+ fastboot_fail("moving second stage is not supported yet");
+
Re: [U-Boot] [PATCH v2] fastboot: Add support for flashing zImage
On 18 May 2017 at 14:20, Tom Rini wrote:
> On Thu, May 18, 2017 at 11:50:23AM +0300, Sam Protsenko wrote:
>> On 18 May 2017 at 01:20, Tom Rini wrote:
>> > On Wed, May 17, 2017 at 08:20:47PM +0300, Sam Protsenko wrote:
>> >
>> >> This patch adds support for flashing zImage to the Android boot
>> >> partition on eMMC.
>> > [snip]
>> >> +#ifdef CONFIG_ANDROID_BOOT_IMAGE
>> >> + if (strcmp(cmd, "zImage") == 0 || strcmp(cmd, "zimage") == 0) {
>> >
>> > strncasecmp(cmd, "zimage", 6) ?
>> >
>>
>> Good catch, didn't know this routine exists. Will fix it in v3.
>>
>> >> diff --git a/include/android_image.h b/include/android_image.h
>> >> index dfd4d9d72c..c058b1d388 100644
>> >> --- a/include/android_image.h
>> >> +++ b/include/android_image.h
>> >> @@ -12,6 +12,8 @@
>> >> #ifndef _ANDROID_IMAGE_H_
>> >> #define _ANDROID_IMAGE_H_
>> >>
>> >> +#include
>> >> +
>> >> typedef struct andr_img_hdr andr_img_hdr;
>> >>
>> >> #define ANDR_BOOT_MAGIC "ANDROID!"
>> >
>> > Unneeded.
>> >
>>
>> If you remove that inclusion, build will fail with errors like this:
>>
>> include/android_image.h:28:2: error: unknown type name ‘u32’
>>
>> So it should be included either in android_image.h, or I should
>> include it in common/fb_mmc.c *before* including android_image.h.
>> Which is (I presume) a bad style. So I incline to do that the way I
>> did it. If you still don't agree -- I'll rework it.
>
> In this case, it's a header we're mirroring from upstream Android, so
> I'd rather not modify it. That is indeed not the normal way to address
> this issue.
>
Done. Please review patch v3.
>> >> diff --git a/include/linux/compat.h b/include/linux/compat.h
>> >> index a43e4d6698..b0ff6b91f0 100644
>> >> --- a/include/linux/compat.h
>> >> +++ b/include/linux/compat.h
>> >> @@ -111,6 +111,9 @@ static inline void kmem_cache_destroy(struct
>> >> kmem_cache *cachep)
>> >>
>> >> #define PAGE_SIZE4096
>> >>
>> >> +/* to align the pointer to the (next) page boundary */
>> >> +#define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE)
>> >
>> > Just use ALIGN() in the code you're writing? This is for things we're
>> > pulling directly from Linux really.
>> >
>>
>> Thought it would be more clear that way. Btw, I pulled PAGE_ALIGN()
>> from kernel (from include/linux/mm.h). But it's not important to me,
>> so if you want me to use ALIGN() -- I will change it in v3.
>
> Thanks!
>
> --
> Tom
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Re: [U-Boot] [PATCH 3/3] marvell: armada385: Add the Turris Omnia board
Hi Marek, On 13.05.2017 11:54, Andreas Färber wrote: +/* Default boot environment. */ +#define CONFIG_BOOTCOMMAND \ + "i2c dev 1; " \ + "i2c read 0x2a 0x9 1 0x00F0; "\ + "setexpr.b rescue *0x00F0; " \ + "if test $rescue -ge 1; then "\ + "echo BOOT RESCUE; " \ + "run rescueboot; "\ + "else " \ + "echo BOOT eMMC FS; " \ + "run mmcboot; " \ + "fi" + +/* Keep device tree and initrd in lower memory so the kernel can access them */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x1000\0" \ + "initrd_high=0x1000\0"\ + "ethact=neta2\0" \ + "mmcboot=setenv bootargs \"$bootargs cfg80211.freg=$regdomain\"; " \ + "ext4load mmc 0 0x0100 boot/zImage; " \ + "ext4load mmc 0 0x0200 boot/dtb; " \ + "bootz 0x0100 - 0x0200\0" \ + "rescueboot=i2c mw 0x2a.1 0x3 0x1c 1; " \ + "i2c mw 0x2a.1 0x4 0x1c 1; " \ + "mw.l 0x0100 0x00ff000c; " \ + "i2c write 0x0100 0x2a.1 0x5 4 -s; " \ + "setenv bootargs \"$bootargs omniarescue=$rescue\"; " \ + "sf probe; " \ + "sf read 0x100 0x10 0x70; " \ + "bootz 0x100\0" \ + "bootargs=earlyprintk console=ttyS0,115200 rootfstype=ext4 " \ + "rootdelay=2 root=b301 rootflags=subvol=@,commit=5 rw\0" These env settings are very old-style. Please use the distro macros. That means among others defining kernel_addr_r=0x0100, fdt_addr_r=0x0200 and ramdisk_addr_r and use the standardized boot commands instead of hardcoding mmcboot here. Then also USB, mSATA and network boot should be supported, and it abstracts the filesystem, plus it adds UEFI support. Selecting the distro defaults from the defconfig should also obsolete requiring ext4 in this config, among others. Apart from addressing all other comments from Andreas, yes please switch to using the distro defaults and configurations. Take a look at this patch from Patrick, this should give you an idea: https://patchwork.ozlabs.org/patch/760587/ Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] driver/ddr: Add support for setting timing in hws_topology_map
Hi Marek,
looks good, as small comment below...
On 12.05.2017 16:10, Marek Behún wrote:
> The DDR3 training code for Marvell A38X currently computes 1t timing
> when given board topology map of the Turris Omnia, but Omnia needs 2t.
>
> This patch adds support for enforcing the 2t timing in struct
> hws_topology_map, through a new enum hws_timing, which can assume
> following values:
> HWS_TIM_DEFAULT - default behaviour, compute whether to enable 2t
> from the number of CSs
> HWS_TIM_1T - enforce 1t
> HWS_TIM_2T - enforce 2t
>
> This patch also sets all the board topology maps (db-88f6820-amc,
> db-88f6820-gp, controlcenterdc and clearfog) to have timing set to
> HWS_TIM_DEFAULT.
>
> Signed-off-by: Marek Behun
> ---
> board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 3 ++-
> board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 3 ++-
> board/gdsys/a38x/controlcenterdc.c| 3 ++-
> board/solidrun/clearfog/clearfog.c| 3 ++-
> drivers/ddr/marvell/a38x/ddr3_training.c | 5 +
> drivers/ddr/marvell/a38x/ddr_topology_def.h | 9 +
> 6 files changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
> b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
> index cade99c..40fa599 100644
> --- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
> +++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
> @@ -69,7 +69,8 @@ static struct hws_topology_map board_topology_map = {
> MEM_4G, /* mem_size */
> DDR_FREQ_800, /* frequency */
> 0, 0, /* cas_l cas_wl */
> - HWS_TEMP_LOW} },/* temperature */
> + HWS_TEMP_LOW, /* temperature */
> + HWS_TIM_DEFAULT} }, /* timing */
> 5, /* Num Of Bus Per Interface*/
> BUS_MASK_32BIT /* Busses mask */
> };
> diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
> b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
> index e700781..a1974cb 100644
> --- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
> +++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
> @@ -90,7 +90,8 @@ static struct hws_topology_map board_topology_map = {
> MEM_4G, /* mem_size */
> DDR_FREQ_800, /* frequency */
> 0, 0, /* cas_l cas_wl */
> - HWS_TEMP_LOW} },/* temperature */
> + HWS_TEMP_LOW, /* temperature */
> + HWS_TIM_DEFAULT} }, /* timing */
> 5, /* Num Of Bus Per Interface*/
> BUS_MASK_32BIT /* Busses mask */
> };
> diff --git a/board/gdsys/a38x/controlcenterdc.c
> b/board/gdsys/a38x/controlcenterdc.c
> index f0efb53..32168d3 100644
> --- a/board/gdsys/a38x/controlcenterdc.c
> +++ b/board/gdsys/a38x/controlcenterdc.c
> @@ -53,7 +53,8 @@ static struct hws_topology_map ddr_topology_map = {
> MEM_4G, /* mem_size */
> DDR_FREQ_533, /* frequency */
> 0, 0, /* cas_l cas_wl */
> - HWS_TEMP_LOW} },/* temperature */
> + HWS_TEMP_LOW, /* temperature */
> + HWS_TIM_DEFAULT} }, /* timing */
> 5, /* Num Of Bus Per Interface*/
> BUS_MASK_32BIT /* Busses mask */
> };
> diff --git a/board/solidrun/clearfog/clearfog.c
> b/board/solidrun/clearfog/clearfog.c
> index 2773f59..036e183 100644
> --- a/board/solidrun/clearfog/clearfog.c
> +++ b/board/solidrun/clearfog/clearfog.c
> @@ -83,7 +83,8 @@ static struct hws_topology_map board_topology_map = {
> MEM_4G, /* mem_size */
> DDR_FREQ_800, /* frequency */
> 0, 0, /* cas_l cas_wl */
> - HWS_TEMP_LOW} },/* temperature */
> + HWS_TEMP_LOW, /* temperature */
> + HWS_TIM_DEFAULT} }, /* timing */
> 5, /* Num Of Bus Per Interface*/
> BUS_MASK_32BIT /* Busses mask */
> };
> diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c
> b/drivers/ddr/marvell/a38x/ddr3_training.c
> index 7e0749f..c79db6a 100644
> --- a/drivers/ddr/marvell/a38x/ddr3_training.c
> +++ b/drivers/ddr/marvell/a38x/ddr3_training.c
> @@ -571,6 +571,11 @@ int hws_ddr3_tip_init_controller(u32 dev_num, struct
> init_cntr_param *init_cntr_
>
> if (mode2_t != 0xff) {
> t2t = mode2_t;
> + } else if (tm->interface_params[if_id].
> +timing != HWS_TIM_DEFAULT) {
> + /* Board topology map is forcing timing */
> + t2t = (tm->interface_params[if_id].
> +
Re: [U-Boot] [PATCH v6 01/21] mx6sabresd: MAINTAINERS: Remove invalid defconfigs F: list
Hi Jagan, On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: > From: Jagan Teki > > no-SPL target defconfigs are droped in below commit > and forgot to update the same on MAINTAINERS F: list > "mx6sabresd: Remove non-SPL targets" > (sha1: e2bab4b9ea3c9ab59c1ba064263ee0863cba112e) > > Signed-off-by: Jagan Teki I have sent a series that contains such fix, thanks. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 03/21] ARM: i.MX6: sabresd: Remove SPL_I2C_SUPPORT
On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: > From: Jagan Teki > > I2C support not needed for SPL build, hence removed the > CONFIG_SPL_I2C_SUPPORT from mx6sabresd_spl_defconfig > > Cc: Stefano Babic > Cc: Fabio Estevam > Cc: Michael Trimarchi > Signed-off-by: Jagan Teki > --- > configs/mx6sabresd_spl_defconfig | 1 - I have renamed this file. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 02/21] mx6sabresd: README: Fix to add space on dd command
On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: > From: Jagan Teki > > Fix to give space between of and bs of dd command. > > Cc: Stefano Babic > Cc: Michael Trimarchi > Signed-off-by: Jagan Teki > Reviewed-by: Fabio Estevam Same here, maybe you can put my 3 patches as part of your series? ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 04/21] ARM: dts: i.MX6: Add imx6qdl-sabresd.dtsi
On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: > From: Jagan Teki > > Retrive imx6qdl-sabresd.dtsi from Linux with last commit > "ARM: dts: imx6qdl-sabresd: Set LDO regulator supply" > (sha1: c23568dbbda110a5c79c6537cc81ed7af5444b64) Could you use a tag like 4.11.1, for example? It is much clearer to read a version name like 4.11.1 instead of a sha1. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 13/21] SabreSD: Enable DM_I2C and DM_PMIC
Hi Jagan, On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: > From: Jagan Teki > > (1) Enable > DM_I2C > DM_PMIC > DM_PMIC_PFUZE100 > (2) Removed > setup_i2c > power_init_board > > I2C Log: > > => i2c bus > Bus 0: i2c@021a > Bus 1: i2c@021a4000 >08: pfuze100@08, offset len 1, flags 0 > Bus 2: i2c@021a8000 > => i2c dev 1 > Setting bus to 1 > => i2c speed 10 > Setting bus speed to 10 Hz > => i2c probe > Valid chip addresses: 08 48 > => i2c md 08 0x0 0x20 > : 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 > 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > => i2c md 48 0x0 0x20 > : 00 f0 00 00 00 00 00 00 00 00 00 80 70 41 41 41pAAA > 0010: 00 00 00 80 70 41 41 41 41 41 41 41 41 41 41 41pAAA > > Signed-off-by: Jagan Teki Last time I tested the pmic commands were gone. Were you able to access the PMIC via the 'pmic' commands? ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 14/21] SabreSD: Enable CONFIG_DM_REGULATOR
On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: > From: Jagan Teki > > Enable CONFIG_DM_REGULATOR for i.MX6 SabreSD boards. > > Signed-off-by: Jagan Teki Reviewed-by: Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 17/21] i.MX6: SabreSD: Enable DM_ETH
Hi Jagan,
On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote:
> -static void setup_iomux_enet(void)
> -{
> - SETUP_IOMUX_PADS(enet_pads);
> -
> - /* Reset AR8031 PHY */
> - gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
> - mdelay(10);
> - gpio_set_value(IMX_GPIO_NR(1, 25), 1);
> - udelay(100);
As far as I can see the FEC driver will bot retrieve the
'phy-reset-gpios' property from the device tree, right?
In this case we loose the ability to reset the Ethernet PHY with DM support.
Can you please add 'phy-reset-gpios' property support to the FEC
driver like we have in the kernel?
Thanks
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Re: [U-Boot] [PATCH v6 20/21] i.MX6: SabreSD: mx6sabresd_spl_defconfig => mx6sabresd_defconfig
On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: > From: Jagan Teki > > Now, SabreSD support SPL for all cpu types and the only configuration > option, So renamed mx6sabresd_spl_defconfig to mx6sabresd_defconfig > > Signed-off-by: Jagan Teki Already part of my series. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 13/21] SabreSD: Enable DM_I2C and DM_PMIC
On Thu, May 18, 2017 at 9:22 AM, Fabio Estevam wrote: > Last time I tested the pmic commands were gone. Were you able to > access the PMIC via the 'pmic' commands? Just tested your latest version and the 'pmic' command is gone, so this needs to be fixed. Thanks ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/3] omap: Provide fastboot variables for fastboot.sh
fastboot.sh is a script used for flashing Android images for TI boards (and can be found in corresponding AOSP sources). This script relies on some fastboot variables, which can be accessed with "fastboot getvar" command. This patch series exports those variables, which fastboot.sh script relies on. The list of added variables: - "cpu": CPU type (string, like "J6") - "secure": CPU security index (string, like "GP") - "board_rev": board revision (string, like "A.30") - "userdata_size": size of userdata partition (number, in KiB) Variables are enabled for AM57x EVM and DRA7 EVM boards, which are mainly supported TI boards, capable of Android running. Sam Protsenko (3): omap: Add routine for setting fastboot variables arm: am57xx: Set fastboot variables in environment arm: dra7: Set fastboot variables in environment arch/arm/include/asm/omap_common.h | 2 + arch/arm/mach-omap2/utils.c| 134 + board/ti/am57xx/board.c| 1 + board/ti/dra7xx/evm.c | 1 + 4 files changed, 138 insertions(+) -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/3] arm: am57xx: Set fastboot variables in environment
One can obtain those variables using next commands: $ fastboot getvar cpu $ fastboot getvar secure $ fastboot getvar board_rev $ fastboot getvar userdata_size Those variables are needed for fastboot.sh script. Signed-off-by: Sam Protsenko --- board/ti/am57xx/board.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 3be697a6ea..c8ebcdbcc8 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -573,6 +573,7 @@ int board_late_init(void) val); omap_die_id_serial(); + omap_set_fastboot_vars(); am57x_idk_lcd_detect(); -- 2.11.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] omap: Add routine for setting fastboot variables
This patch reuses new option, which allows us to expose variables
from environment to "fastboot getvar" command. Those variables must be
of "fastboot.%s" format.
Signed-off-by: Sam Protsenko
---
arch/arm/include/asm/omap_common.h | 2 +
arch/arm/mach-omap2/utils.c| 134 +
2 files changed, 136 insertions(+)
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index c1a70b15d0..cede2f7b28 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -643,6 +643,8 @@ void omap_die_id_get_board_serial(struct tag_serialnr
*serialnr);
void omap_die_id_usbethaddr(void);
void omap_die_id_display(void);
+void omap_set_fastboot_vars(void);
+
void recalibrate_iodelay(void);
void omap_smc1(u32 service, u32 val);
diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c
index 2d03ebfbd3..0689c879b0 100644
--- a/arch/arm/mach-omap2/utils.c
+++ b/arch/arm/mach-omap2/utils.c
@@ -6,6 +6,16 @@
*/
#include
#include
+
+/* Device type bits in CONTROL_STATUS register */
+#define DEVICETYPE_OFFSET 6
+#define DEVICETYPE_MASK(0x7 << DEVICETYPE_OFFSET)
+#define OMAP_TYPE_TEST 0x0
+#define OMAP_TYPE_EMU 0x1
+#define OMAP_TYPE_SEC 0x2
+#define OMAP_TYPE_GP 0x3
+#define OMAP_TYPE_BAD 0x4
+
static void do_cancel_out(u32 *num, u32 *den, u32 factor)
{
while (1) {
@@ -18,6 +28,122 @@ static void do_cancel_out(u32 *num, u32 *den, u32 factor)
}
}
+static const char *omap_get_cpu_type(void)
+{
+ u32 type;
+
+ type = readl((*ctrl)->control_status);
+ type &= DEVICETYPE_MASK;
+ type >>= DEVICETYPE_OFFSET;
+
+ switch (type) {
+ case OMAP_TYPE_EMU:
+ return "EMU";
+ case OMAP_TYPE_SEC:
+ return "HS";
+ case OMAP_TYPE_GP:
+ return "GP";
+ default:
+ return NULL;
+ }
+}
+
+static void omap_set_fastboot_cpu(void)
+{
+ u32 cpu_rev;
+ char *cpu;
+
+ cpu_rev = omap_revision();
+
+ switch (cpu_rev) {
+ case DRA752_ES1_0:
+ case DRA752_ES1_1:
+ case DRA752_ES2_0:
+ cpu = "J6";
+ break;
+ case DRA722_ES1_0:
+ case DRA722_ES2_0:
+ cpu = "J6ECO";
+ break;
+ default:
+ cpu = NULL;
+ printf("Warning: fastboot.cpu: unknown cpu type %u\n", cpu_rev);
+ }
+
+ setenv("fastboot.cpu", cpu);
+}
+
+static void omap_set_fastboot_secure(void)
+{
+ const char *secure;
+
+ secure = omap_get_cpu_type();
+ if (secure == NULL)
+ printf("Warning: fastboot.secure: unknown CPU type\n");
+
+ setenv("fastboot.secure", secure);
+}
+
+static void omap_set_fastboot_board_rev(void)
+{
+ const char *board_rev;
+
+ board_rev = getenv("board_rev");
+ if (board_rev == NULL)
+ printf("Warning: fastboot.board_rev: unknown board revision\n");
+
+ setenv("fastboot.board_rev", board_rev);
+}
+
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+static u32 omap_mmc_get_part_size(const char *part)
+{
+ int res;
+ struct blk_desc *dev_desc;
+ disk_partition_t info;
+ u64 sz = 0;
+
+ dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+ if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+ error("invalid mmc device\n");
+ return 0;
+ }
+
+ res = part_get_info_by_name(dev_desc, part, &info);
+ if (res < 0) {
+ error("cannot find partition: '%s'\n", part);
+ return 0;
+ }
+
+ /* Calculate size in bytes */
+ sz = (info.size * (u64)info.blksz);
+ /* to KiB */
+ sz >>= 10;
+
+ return (u32)sz;
+}
+
+static void omap_set_fastboot_userdata_size(void)
+{
+ char buf[16];
+ u32 sz_kb;
+
+ sz_kb = omap_mmc_get_part_size("userdata");
+ if (sz_kb == 0) {
+ buf[0] = '\0';
+ printf("Warning: fastboot.userdata_size: unable to calc\n");
+ } else {
+ sprintf(buf, "%u", sz_kb);
+ }
+
+ setenv("fastboot.userdata_size", buf);
+}
+#else
+static inline void omap_set_fastboot_userdata_size(void)
+{
+}
+#endif
+
/*
* Cancel out the denominator and numerator of a fraction
* to get smaller numerator and denominator.
@@ -111,3 +237,11 @@ void omap_die_id_display(void)
printf("OMAP die ID: %08x%08x%08x%08x\n", die_id[3], die_id[2],
die_id[1], die_id[0]);
}
+
+void omap_set_fastboot_vars(void)
+{
+ omap_set_fastboot_cpu();
+ omap_set_fastboot_secure();
+ omap_set_fastboot_board_rev();
+ omap_set_fastboot_userdata_size();
+}
--
2.11.0
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[U-Boot] [PATCH 3/3] arm: dra7: Set fastboot variables in environment
One can obtain those variables using next commands:
$ fastboot getvar cpu
$ fastboot getvar secure
$ fastboot getvar board_rev
$ fastboot getvar userdata_size
Those variables are needed for fastboot.sh script.
Signed-off-by: Sam Protsenko
---
board/ti/dra7xx/evm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 8c02addd08..7d36f03fa1 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -561,6 +561,7 @@ int board_late_init(void)
setenv("boot_fit", "1");
omap_die_id_serial();
+ omap_set_fastboot_vars();
#endif
return 0;
}
--
2.11.0
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[U-Boot] RPi3 + arm64/ARMv8 USB Keyboard not detected
I have u-boot 2017.03 and 2017.05 detecting the keyboard in 32 bit mode. But in 64 bit mode the keyboard is never detected. Under the 32 bit mode, 4 items are detected using "usb tree". In 64 bit mode only 3 items are detected. I have tried "usb start" and "usb reset". Any suggestions would be appreciated. Thanks. -- "Non sibi, sed patriae" ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: fixed relocation using proper alignment
On 2017-05-17 06:13, Lokesh Vutla wrote:
>
>
> On Tuesday 16 May 2017 07:59 PM, Manfred Schlaegl wrote:
>> On 2017-05-11 08:53, Lokesh Vutla wrote:
>>>
>>>
>>> On Wednesday 10 May 2017 07:11 PM, Manfred Schlaegl wrote:
Using u-boot-2017.05 on i.MX6UL we ran into following problem:
Initially U-Boot could be started normally.
If we added one random command in configuration, the newly generated
image hung at startup (last output was DRAM: 256 MiB).
We tracked this down to a data abort within relocation (relocated_code).
relocated_code in arch/arm/lib/relocate.S copies 8 bytes per loop
iteration until the source pointer is equal to __image_copy_end.
In a good case __image_copy_end was aligned to 8 bytes, so the loop
stopped as suggested, but in an errornous case __image_copy_end was
not aligned to 8 bytes, so the loop ran out of bounds and caused a
data abort exception.
>>>
>>> Well I agree with this patch but I have a small query. Looking at the
>>> relocation code:
>>>
>>> copy_loop:
>>> ldmia r1!, {r10-r11} /* copy from source address [r1]*/
>>> stmia r0!, {r10-r11} /* copy to target address [r0]*/
>>> cmp r1, r2 /* until source end address [r2]*/
>>> blo copy_loop
>>>
>>> IIUC, this loops exits as soon as r1 >= r2
>>>
>>> In your case
>>> r1 is __image_copy_start
>>> r0 is relocation address
>>> r2 is __image_copy_end (which is 4 byte aligned)
>>>
>>> In the corner case you mentioned there will be extra memcpy of 4 bytes
>>> from address in r1 to address in r0. I assume you are running from DDR
>>> and relocation offset is calculated such that (aligned to previous 4K
>>> page) it should be able to accommodate extra 4 bytes(I assume). I am
>>> wondering why should this give a data abort.
>>>
>>> Thanks and regards,
>>> Lokesh
>>>
>>
>> Thanks a lot for your input!
>> The patch solved my problem randomly.
>>
>> The loop terminates only one word beyond __image_copy_end.
>> This is not the problem in my case because both, the source and destination
>> pointers point to valid addresses in dram.
>> So the problem must be later in relocate_code.
>
> That's right.
>
>>
>> I spent some time using a debugger and found that the data abort happens here
>>
>> /*
>> * fix .rel.dyn relocations
>> */
>> ldr r2, =__rel_dyn_start/* r2 <- SRC &__rel_dyn_start */
>> ldr r3, =__rel_dyn_end /* r3 <- SRC &__rel_dyn_end */
>> fixloop:
>> ldmia r2!, {r0-r1}/* (r0,r1) <- (SRC location,fixup) */
>> and r1, r1, #0xff
>> cmp r1, #R_ARM_RELATIVE
>> bne fixnext
>>
>> /* relative fix: increase location by offset */
>> add r0, r0, r4
>> ldr r1, [r0]
>> add r1, r1, r4
>> str r1, [r0]
>> fixnext:
>> cmp r2, r3
>> blo fixloop
>>
>>
>> Also I found out, that it's not the alignment of image_copy_end, but of
>> rel_dyn_start
>> (which was also implicitly changed by my patch).
>>
>> In a good case (rel_dyn_start aligned to 8 byte), u-boot is starting up
>> normally
>> rel_dyn_start is 0x8785FC28
>> rel_dyn_end is 0x87857BD0
>> A dump of this memory area shows no abnormality
>>
>> In a bad case (same source, but rel_dyn_start aligned to 4 byte), the data
>> abort happens
>> rel_dyn_start is 0x8785FC24
>> rel_dyn_end is 0x87857BCC
>> So we have the same size of 32856 bytes but a memory dump showed exactly one
>> difference, which is
>> very interesting:
>>
>> At offset 0x610 (relative to rel_dyn_start) we have following difference
>> -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 00 00 00 00
>> |0>..4>..|
>> +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00
>> |0>..|
>
> Looks like someone is corrupting the data(assuming). Is it all 0's just
> at this location or continuously after this?
No. Above diff is the only difference of the good and bad case in memory
located between
rel_dyn_start and rel_dyn_end.
To see if it might be a corruption I compared the the rel_dyn with the created
u-boot.img and
found the same difference
-0610 30 3e 80 87 17 00 00 00 34 3e 80 87 17 00 00 00 |0>..4>..|
<--- generated image
+0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 |0>..|
<--- memory dump
So it must be some kind of corruption.
>
> If possible can you try the following experiments with the failing code:
>
> - Dump rel_dyn_* data right after spl copies U-boot to ddr.
> - Similarly dump rel_dyn_* data before calling relocate_code() and
> compare both?
We don't use SPL bootloader. On boot from NAND, the ROM Bootloader does the
whole job.
While testing I use JTAG to place the image in RAM and start it from there.
The Problem happens in both cases, so I can eliminate the ROM Bootloader.
I understand what you mean. I will try to check the memory location on some
points w
Re: [U-Boot] [PATCH] drivers: pci: imx: add imx_pcie_remove function
On Thu, May 18, 2017 at 2:12 AM, Stefano Babic wrote:
> On 12/05/2017 21:58, Tim Harvey wrote:
>> There is no dedicated reset signal wired up for the MX6QDL thus if the
>> bootloader enables the link we need some special handling to get the core
>> back into a state where it is safe to touch it for configuration.
>>
>> While there has been some special handling in the Linux kernel to do this,
>> it was removed in 4.11 thus we need to do it properly in the bootloader
>> and therefore without this if you enable PCI in the bootloader you will hang
>> while booting the 4.11 kernel.
>>
>> This puts the PCIe controller back into a safe state for the kernel driver
>> before launching the kernel.
>>
>> Signed-off-by: Tim Harvey
>> ---
>> arch/arm/imx-common/cpu.c | 3 +++
>> drivers/pci/pcie_imx.c| 38 ++
>> include/pci.h | 4
>> 3 files changed, 45 insertions(+)
>>
>> diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
>> index 40fe813..74bdd24 100644
>> --- a/arch/arm/imx-common/cpu.c
>> +++ b/arch/arm/imx-common/cpu.c
>> @@ -275,6 +275,9 @@ u32 get_ahb_clk(void)
>>
>> void arch_preboot_os(void)
>> {
>> +#if defined(CONFIG_PCIE_IMX)
>> + imx_pcie_remove();
>> +#endif
>> #if defined(CONFIG_CMD_SATA)
>> sata_stop();
>> #if defined(CONFIG_MX6)
>> diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
>> index 732d59d..eab0a2b 100644
>> --- a/drivers/pci/pcie_imx.c
>> +++ b/drivers/pci/pcie_imx.c
>> @@ -42,6 +42,9 @@
>>
>> /* PCIe Port Logic registers (memory-mapped) */
>> #define PL_OFFSET 0x700
>> +#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
>> +#define PCIE_PL_PFLR_LINK_STATE_MASK (0x3f << 16)
>> +#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
>> #define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
>> #define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
>> #define PCIE_PHY_DEBUG_R1_LINK_UP(1 << 4)
>> @@ -445,6 +448,36 @@ static int imx6_pcie_assert_core_reset(void)
>> /* Power up PCIe PHY */
>> setbits_le32(&gpc_regs->cntr, PCIE_PHY_PUP_REQ);
>> #else
>> + /*
>> + * If the bootloader already enabled the link we need some special
>> + * handling to get the core back into a state where it is safe to
>> + * touch it for configuration. As there is no dedicated reset signal
>> + * wired up for MX6QDL, we need to manually force LTSSM into "detect"
>> + * state before completely disabling LTSSM, which is a prerequisite
>> + * for core configuration.
>> + *
>> + * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong
>> + * indication that the bootloader activated the link.
>> + */
>> + if (is_mx6dq()) {
>> + u32 val, gpr1, gpr12;
>> +
>> + gpr1 = readl(&iomuxc_regs->gpr[1]);
>> + gpr12 = readl(&iomuxc_regs->gpr[12]);
>> + if ((gpr1 & IOMUXC_GPR1_PCIE_REF_CLK_EN) &&
>> + (gpr12 & IOMUXC_GPR12_PCIE_CTL_2)) {
>> + val = readl(MX6_DBI_ADDR + PCIE_PL_PFLR);
>> + val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
>> + val |= PCIE_PL_PFLR_FORCE_LINK;
>> +
>> + imx_pcie_fix_dabt_handler(true);
>> + writel(val, MX6_DBI_ADDR + PCIE_PL_PFLR);
>> + imx_pcie_fix_dabt_handler(false);
>> +
>> + gpr12 &= ~IOMUXC_GPR12_PCIE_CTL_2;
>> + writel(val, &iomuxc_regs->gpr[12]);
>> + }
>> + }
>> setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
>> clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
>> #endif
>> @@ -652,6 +685,11 @@ void imx_pcie_init(void)
>> }
>> }
>>
>> +void imx_pcie_remove(void)
>> +{
>> + imx6_pcie_assert_core_reset();
>> +}
>> +
>> /* Probe function. */
>> void pci_init_board(void)
>> {
>> diff --git a/include/pci.h b/include/pci.h
>> index d3c955e..c8ef997 100644
>> --- a/include/pci.h
>> +++ b/include/pci.h
>> @@ -754,6 +754,10 @@ int pci_last_busno(void);
>> extern void pci_mpc85xx_init (struct pci_controller *hose);
>> #endif
>>
>> +#ifdef CONFIG_PCIE_IMX
>> +extern void imx_pcie_remove(void);
>> +#endif
>> +
>> #if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
>> /**
>> * pci_write_bar32() - Write the address of a BAR including control bits
>>
>
> Ok, I see - now the question to Jagan. Tim has not time to move to DM,
> and you propose yourself as volunteer (welcome !) to do this job. Of
> course, I will not let things broken if move cannot be done, but I will
> prefer to wait having a proper long time fix.
>
> Best regards,
> Stefano
>
Stefano,
My patch is not intrusive and it appears several people are wanting
it. Why not accept my patch which will end up getting re-written once
the PCI driver is moved to DM?
Tim
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[U-Boot] litesom.c: Board stuff in SOC ?
Hi Marcin, even if it was already merged (and maybe I am guilty of it because I have not noted before), it is completely crazy that a board is stored inside the SOC directory. The litesom board is in fact in ./arch/arm/cpu/armv7/mx6/litesom.c, and there is nothing that justify this. The code has just board related stuff and nothing common for all SOC. I just took again the commit and I see: Moving arch/arm/mach-litesom/ to arch/arm/cpu/armv7/mx6/ was requested in [1] during discussion of chiliSOM support patches. [1] http://lists.denx.de/pipermail/u-boot/2017-January/279137.html But [1] has nothing to do with the context. I will tend to revert this patch and wait for an appropriate patch that add support for the board just like all other boards in U-Boot - as it is currently, it is wrong. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: pci: imx: add imx_pcie_remove function
Hi Tim,
On 18/05/2017 16:22, Tim Harvey wrote:
> On Thu, May 18, 2017 at 2:12 AM, Stefano Babic wrote:
>> On 12/05/2017 21:58, Tim Harvey wrote:
>>> There is no dedicated reset signal wired up for the MX6QDL thus if the
>>> bootloader enables the link we need some special handling to get the core
>>> back into a state where it is safe to touch it for configuration.
>>>
>>> While there has been some special handling in the Linux kernel to do this,
>>> it was removed in 4.11 thus we need to do it properly in the bootloader
>>> and therefore without this if you enable PCI in the bootloader you will hang
>>> while booting the 4.11 kernel.
>>>
>>> This puts the PCIe controller back into a safe state for the kernel driver
>>> before launching the kernel.
>>>
>>> Signed-off-by: Tim Harvey
>>> ---
>>> arch/arm/imx-common/cpu.c | 3 +++
>>> drivers/pci/pcie_imx.c| 38 ++
>>> include/pci.h | 4
>>> 3 files changed, 45 insertions(+)
>>>
>>> diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
>>> index 40fe813..74bdd24 100644
>>> --- a/arch/arm/imx-common/cpu.c
>>> +++ b/arch/arm/imx-common/cpu.c
>>> @@ -275,6 +275,9 @@ u32 get_ahb_clk(void)
>>>
>>> void arch_preboot_os(void)
>>> {
>>> +#if defined(CONFIG_PCIE_IMX)
>>> + imx_pcie_remove();
>>> +#endif
>>> #if defined(CONFIG_CMD_SATA)
>>> sata_stop();
>>> #if defined(CONFIG_MX6)
>>> diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
>>> index 732d59d..eab0a2b 100644
>>> --- a/drivers/pci/pcie_imx.c
>>> +++ b/drivers/pci/pcie_imx.c
>>> @@ -42,6 +42,9 @@
>>>
>>> /* PCIe Port Logic registers (memory-mapped) */
>>> #define PL_OFFSET 0x700
>>> +#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
>>> +#define PCIE_PL_PFLR_LINK_STATE_MASK (0x3f << 16)
>>> +#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
>>> #define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
>>> #define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
>>> #define PCIE_PHY_DEBUG_R1_LINK_UP(1 << 4)
>>> @@ -445,6 +448,36 @@ static int imx6_pcie_assert_core_reset(void)
>>> /* Power up PCIe PHY */
>>> setbits_le32(&gpc_regs->cntr, PCIE_PHY_PUP_REQ);
>>> #else
>>> + /*
>>> + * If the bootloader already enabled the link we need some special
>>> + * handling to get the core back into a state where it is safe to
>>> + * touch it for configuration. As there is no dedicated reset signal
>>> + * wired up for MX6QDL, we need to manually force LTSSM into "detect"
>>> + * state before completely disabling LTSSM, which is a prerequisite
>>> + * for core configuration.
>>> + *
>>> + * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong
>>> + * indication that the bootloader activated the link.
>>> + */
>>> + if (is_mx6dq()) {
>>> + u32 val, gpr1, gpr12;
>>> +
>>> + gpr1 = readl(&iomuxc_regs->gpr[1]);
>>> + gpr12 = readl(&iomuxc_regs->gpr[12]);
>>> + if ((gpr1 & IOMUXC_GPR1_PCIE_REF_CLK_EN) &&
>>> + (gpr12 & IOMUXC_GPR12_PCIE_CTL_2)) {
>>> + val = readl(MX6_DBI_ADDR + PCIE_PL_PFLR);
>>> + val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
>>> + val |= PCIE_PL_PFLR_FORCE_LINK;
>>> +
>>> + imx_pcie_fix_dabt_handler(true);
>>> + writel(val, MX6_DBI_ADDR + PCIE_PL_PFLR);
>>> + imx_pcie_fix_dabt_handler(false);
>>> +
>>> + gpr12 &= ~IOMUXC_GPR12_PCIE_CTL_2;
>>> + writel(val, &iomuxc_regs->gpr[12]);
>>> + }
>>> + }
>>> setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
>>> clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
>>> #endif
>>> @@ -652,6 +685,11 @@ void imx_pcie_init(void)
>>> }
>>> }
>>>
>>> +void imx_pcie_remove(void)
>>> +{
>>> + imx6_pcie_assert_core_reset();
>>> +}
>>> +
>>> /* Probe function. */
>>> void pci_init_board(void)
>>> {
>>> diff --git a/include/pci.h b/include/pci.h
>>> index d3c955e..c8ef997 100644
>>> --- a/include/pci.h
>>> +++ b/include/pci.h
>>> @@ -754,6 +754,10 @@ int pci_last_busno(void);
>>> extern void pci_mpc85xx_init (struct pci_controller *hose);
>>> #endif
>>>
>>> +#ifdef CONFIG_PCIE_IMX
>>> +extern void imx_pcie_remove(void);
>>> +#endif
>>> +
>>> #if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
>>> /**
>>> * pci_write_bar32() - Write the address of a BAR including control bits
>>>
>>
>> Ok, I see - now the question to Jagan. Tim has not time to move to DM,
>> and you propose yourself as volunteer (welcome !) to do this job. Of
>> course, I will not let things broken if move cannot be done, but I will
>> prefer to wait having a proper long time fix.
>>
>> Best regards,
>> Stefano
>>
>
> Stefano,
>
> My patch is not intrusive and it appears several people are wanting
> it. Why not accept my patch which will
Re: [U-Boot] Very slow mtest on i.MX6UL over dual-die DDR3 (two chip selects)
Hi Fabio,
On 05/17/2017 11:08 PM, Fabio Estevam wrote:
> Hi Hector,
>
> On Wed, May 17, 2017 at 5:50 AM, Palacios, Hector
> wrote:
>
>> The code is on Github [1] (well, not the dual-die DDR3 yet) but there isn't
>> much to see for this issue other than:
>
> I looked at your code and I see:
>
> int dram_init(void)
> {
> gd->ram_size = ((ulong)CONFIG_DDR_MB * SZ_1M);
>
> return 0;
> }
>
> which may be worth investigating.
>
> Take a look in this same function at
> board/freescale/mx53loco/mx53loco.c and also in
> include/configs/mx53loco.h (hint: we pass #define CONFIG_NR_DRAM_BANKS
> 2).
In case I wasn't clear, I don't have any memory mapping problems. I have one
single
DDR chip, which internally uses two dies and two chip selects. Setting
CONFIG_NR_DRAM_BANKS to 1 (and full size) or 2 (and half size) in U-Boot
doesn't make
any difference in terms of performance.
Additional investigation showed the following:
NXP DDR stress test takes the same time to complete (successfully) in both
variants
(single-die with one chip select and 1GB density per CS, and dual-die with two
chip
select and 512MB per CS)
The slow memory access is global in U-Boot, not limited to 'mtest' command. A
memory
copy command for 256M (time cp.l 9000 8000 400) takes:
- 1.304s on the single-die DDR3
- 15.866 seconds on the dual-die DDR3
Note that both data/instuction cache are ON on both devices, and that I'm only
exercising the lower memory (only CS0 on the dual-die chip) to avoid potential
issues
or delays between changing from CS0 to CS1.
I also verified that configuring the MMDC0 for using only one CS on the
dual-die DDR3
chip (and only half the size), does not help. This DDR is still performing
slowly in
U-Boot, but I can't find the reason why.
Thanks for your help, anyway.
--
Hector Palacios
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Re: [U-Boot] litesom.c: Board stuff in SOC ?
Hi Stefano, On 18.05.2017 16:28, Stefano Babic wrote: Hi Marcin, even if it was already merged (and maybe I am guilty of it because I have not noted before), it is completely crazy that a board is stored inside the SOC directory. The litesom board is in fact in ./arch/arm/cpu/armv7/mx6/litesom.c, and there is nothing that justify this. The code has just board related stuff and nothing common for all SOC. litesom is not a board, but a SOM. It has only RAM and eMMC memory included with the processor. litesom cannot work on it's own. It needs to be part of some board. An example board is liteboard, which support is included in board/grinn/liteboard/. Please visit [2] to visualize what the litesom device is. The idea about creating a separate file in arch/arm/cpu/armv7/mx6/ was to be able to reuse code when new boards, that use litesom as it's core, will be added. And these boards need not to be manufactured or designed by Grinn. So if some other vendor wants to add support for it's board (which will be based on litesom), the code to initialize RAM and eMMC can be reused. When litesom code would be part of board/grinn/ directory, then other vendors could not easily add support for their boards without copying litesom sources. [2] http://grinn-global.com/litesom/ I just took again the commit and I see: Moving arch/arm/mach-litesom/ to arch/arm/cpu/armv7/mx6/ was requested in [1] during discussion of chiliSOM support patches. [1] http://lists.denx.de/pipermail/u-boot/2017-January/279137.html But [1] has nothing to do with the context. I will tend to revert this patch and wait for an appropriate patch that add support for the board just like all other boards in U-Boot - as it is currently, it is wrong. Link [1] was a discussion of adding chilisom support into u-boot. The idea was the same - allow to reuse SOM code for vendors creating their own board based on our SOMs. Regards, Marcin Regards, Stefano -- Marcin Niestroj ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: fixed relocation using proper alignment
Manfred Schlaegl wrote: > On 2017-05-17 06:13, Lokesh Vutla wrote: > > > > > > On Tuesday 16 May 2017 07:59 PM, Manfred Schlaegl wrote: > >> On 2017-05-11 08:53, Lokesh Vutla wrote: > >>> > >>> > >>> On Wednesday 10 May 2017 07:11 PM, Manfred Schlaegl wrote: > Using u-boot-2017.05 on i.MX6UL we ran into following problem: > Initially U-Boot could be started normally. > If we added one random command in configuration, the newly generated > image hung at startup (last output was DRAM: 256 MiB). > > We tracked this down to a data abort within relocation (relocated_code). > [...] > >> In a good case (rel_dyn_start aligned to 8 byte), u-boot is starting up > >> normally > >> rel_dyn_start is 0x8785FC28 > >> rel_dyn_end is 0x87857BD0 > >> A dump of this memory area shows no abnormality > >> > >> In a bad case (same source, but rel_dyn_start aligned to 4 byte), the data > >> abort happens > >> rel_dyn_start is 0x8785FC24 > >> rel_dyn_end is 0x87857BCC > >> So we have the same size of 32856 bytes but a memory dump showed exactly > >> one difference, which is > >> very interesting: > >> > >> At offset 0x610 (relative to rel_dyn_start) we have following difference > >> -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 00 00 00 00 > >> |0>..4>..| > >> +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 > >> |0>..| > > > > Looks like someone is corrupting the data(assuming). Is it all 0's just > > at this location or continuously after this? > > No. Above diff is the only difference of the good and bad case in memory > located between > rel_dyn_start and rel_dyn_end. > > To see if it might be a corruption I compared the the rel_dyn with the > created u-boot.img and > found the same difference > -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 17 00 00 00 > |0>..4>..| <--- generated image > +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 > |0>..| <--- memory dump > > So it must be some kind of corruption. > This can be caused by a static variable, that is written to prior to relocation. Since the .rel section overlays the .bss section, the write to a variable in the BSS will corrupt the relocation data. Lothar Waßmann -- ___ Ka-Ro electronics GmbH | Pascalstraße 22 | D - 52076 Aachen Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10 Geschäftsführer: Matthias Kaussen Handelsregistereintrag: Amtsgericht Aachen, HRB 4996 www.karo-electronics.de | i...@karo-electronics.de ___ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] litesom.c: Board stuff in SOC ?
Hi Marcin, On 18/05/2017 16:57, Marcin Niestroj wrote: > Hi Stefano, > > On 18.05.2017 16:28, Stefano Babic wrote: >> Hi Marcin, >> >> even if it was already merged (and maybe I am guilty of it because I >> have not noted before), it is completely crazy that a board is stored >> inside the SOC directory. The litesom board is in fact in >> ./arch/arm/cpu/armv7/mx6/litesom.c, and there is nothing that justify >> this. The code has just board related stuff and nothing common for all >> SOC. > > litesom is not a board, but a SOM. It does not matter, sorry. The code is not common for all boards (and if you like it, all SOMs) sharing the same SOC or SOC family. In this case, i.MX6. There is plenty of such as example in U-Boot, please check it in code. SOM support is in the boards directory and it must not be here. It will be removed. > It has only RAM and eMMC memory > included with the processor. Like all SOMs you find in u-boot from a lot of different vendors...just check it. > litesom cannot work on it's own. It needs > to be part of some board. An example board is liteboard, which support > is included in board/grinn/liteboard/. Please visit [2] to visualize > what the litesom device is. Thanks, nothing new. Again: the SOM is specific to a vendor and cannot be in the SOC directory. There should be then a board/grinn/common (or whatever you want) where SOM code is put. And again, not in SOC directory. > > The idea about creating a separate file in arch/arm/cpu/armv7/mx6/ The idea is correct, just in wrong place. There are plenty of examples doing this: ./engicam/common ./freescale/common ./compulab/common and many others. > was to be able to reuse code when new boards, that use litesom > as it's core, will be added. And these boards need not to be > manufactured or designed by Grinn. Right, so why are we discussing ? They belong to grinn, that means the code should be in board/, that is board/grinn. Please move it ! > So if some other vendor wants > to add support for it's board (which will be based on litesom), > the code to initialize RAM and eMMC can be reused. They will be put code into the grimm directory. See all other vendors selling SOMs. > When litesom > code would be part of board/grinn/ directory, then other vendors > could not easily add support for their boards without copying > litesom sources. I will take care that the code will not be duplicated - not worry. Please move it or it will be removed, thanks ! > > [2] http://grinn-global.com/litesom/ > >> >> I just took again the commit and I see: >> >> Moving arch/arm/mach-litesom/ to arch/arm/cpu/armv7/mx6/ was requested >> in [1] during discussion of chiliSOM support patches. >> >> [1] http://lists.denx.de/pipermail/u-boot/2017-January/279137.html >> >> >> But [1] has nothing to do with the context. I will tend to revert this >> patch and wait for an appropriate patch that add support for the board >> just like all other boards in U-Boot - as it is currently, it is wrong. > > Link [1] was a discussion of adding chilisom support into u-boot. > The idea was the same - allow to reuse SOM code for vendors creating > their own board based on our SOMs. Idea is already used in U-Boot and the SOM vendor has priority. Else code inside arch/arm/cpu/*, that must be common to all boards and *all* SOMs using those processor is becoming a mess. Please move it. Best regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH BUGFIX] ColdFire: Remove rogue 'CONFIG_SYS_NO_FLASH' embedded within another CONFIG_ name
Hi, The original commit for the MCF54418TWR ColdFire development board support defined a 'CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN' which obviously has a rogue 'CONFIG_SYS_NO_FLASH' embedded in the intended 'CONFIG_SYS_FAULT_ECHO_LINK_DOWN' define. Signed-off-by: Lothar Waßmann --- include/configs/M54418TWR.h | 2 +- scripts/config_whitelist.txt | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 1817571..f893ee5 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -60,7 +60,7 @@ #define CONFIG_MII_INIT1 #define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_RX_ETH_BUFFER 2 -#define CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN #define CONFIG_SYS_TX_ETH_BUFFER 2 #define CONFIG_HAS_ETH1 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index ed349b9..3f67da8 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3545,7 +3545,6 @@ CONFIG_SYS_EXTBDINFO CONFIG_SYS_EXTRA_ENV_RELOC CONFIG_SYS_EXT_SERIAL_CLOCK CONFIG_SYS_FAST_CLK -CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN CONFIG_SYS_FAULT_ECHO_LINK_DOWN CONFIG_SYS_FAULT_MII_ADDR CONFIG_SYS_FCC_PSMR -- 2.1.4 -- ___ Ka-Ro electronics GmbH | Pascalstraße 22 | D - 52076 Aachen Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10 Geschäftsführer: Matthias Kaussen Handelsregistereintrag: Amtsgericht Aachen, HRB 4996 www.karo-electronics.de | i...@karo-electronics.de ___ ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: fixed relocation using proper alignment
On 2017-05-18 16:59, Lothar Waßmann wrote: > Manfred Schlaegl wrote: > >> On 2017-05-17 06:13, Lokesh Vutla wrote: >>> >>> >>> On Tuesday 16 May 2017 07:59 PM, Manfred Schlaegl wrote: On 2017-05-11 08:53, Lokesh Vutla wrote: > > > On Wednesday 10 May 2017 07:11 PM, Manfred Schlaegl wrote: >> Using u-boot-2017.05 on i.MX6UL we ran into following problem: >> Initially U-Boot could be started normally. >> If we added one random command in configuration, the newly generated >> image hung at startup (last output was DRAM: 256 MiB). >> >> We tracked this down to a data abort within relocation (relocated_code). >> > [...] In a good case (rel_dyn_start aligned to 8 byte), u-boot is starting up normally rel_dyn_start is 0x8785FC28 rel_dyn_end is 0x87857BD0 A dump of this memory area shows no abnormality In a bad case (same source, but rel_dyn_start aligned to 4 byte), the data abort happens rel_dyn_start is 0x8785FC24 rel_dyn_end is 0x87857BCC So we have the same size of 32856 bytes but a memory dump showed exactly one difference, which is very interesting: At offset 0x610 (relative to rel_dyn_start) we have following difference -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 00 00 00 00 |0>..4>..| +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 |0>..| >>> >>> Looks like someone is corrupting the data(assuming). Is it all 0's just >>> at this location or continuously after this? >> >> No. Above diff is the only difference of the good and bad case in memory >> located between >> rel_dyn_start and rel_dyn_end. >> >> To see if it might be a corruption I compared the the rel_dyn with the >> created u-boot.img and >> found the same difference >> -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 17 00 00 00 >> |0>..4>..| <--- generated image >> +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 >> |0>..| <--- memory dump >> >> So it must be some kind of corruption. >> > This can be caused by a static variable, that is written to prior to > relocation. Since the .rel section overlays the .bss section, the write > to a variable in the BSS will corrupt the relocation data. > Yes! That's it! Using a watchpoint I tracked the corruption down to an early write to a static variable in our custom code. So finally: The whole thing was a problem in a custom modification and was solved there. It has no implication on u-boot itself. Thanks a lot for your help and time! Best regards Manfred ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: fixed relocation using proper alignment
On Thu, May 18, 2017 at 9:04 PM, Manfred Schlaegl wrote: > On 2017-05-18 16:59, Lothar Waßmann wrote: >> Manfred Schlaegl wrote: >> >>> On 2017-05-17 06:13, Lokesh Vutla wrote: On Tuesday 16 May 2017 07:59 PM, Manfred Schlaegl wrote: > On 2017-05-11 08:53, Lokesh Vutla wrote: >> >> >> On Wednesday 10 May 2017 07:11 PM, Manfred Schlaegl wrote: >>> Using u-boot-2017.05 on i.MX6UL we ran into following problem: >>> Initially U-Boot could be started normally. >>> If we added one random command in configuration, the newly generated >>> image hung at startup (last output was DRAM: 256 MiB). >>> >>> We tracked this down to a data abort within relocation (relocated_code). >>> >> [...] > In a good case (rel_dyn_start aligned to 8 byte), u-boot is starting up > normally > rel_dyn_start is 0x8785FC28 > rel_dyn_end is 0x87857BD0 > A dump of this memory area shows no abnormality > > In a bad case (same source, but rel_dyn_start aligned to 4 byte), the > data abort happens > rel_dyn_start is 0x8785FC24 > rel_dyn_end is 0x87857BCC > So we have the same size of 32856 bytes but a memory dump showed exactly > one difference, which is > very interesting: > > At offset 0x610 (relative to rel_dyn_start) we have following difference > -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 00 00 00 00 > |0>..4>..| > +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 > |0>..| Looks like someone is corrupting the data(assuming). Is it all 0's just at this location or continuously after this? >>> >>> No. Above diff is the only difference of the good and bad case in memory >>> located between >>> rel_dyn_start and rel_dyn_end. >>> >>> To see if it might be a corruption I compared the the rel_dyn with the >>> created u-boot.img and >>> found the same difference >>> -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 17 00 00 00 >>> |0>..4>..| <--- generated image >>> +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 >>> |0>..| <--- memory dump >>> >>> So it must be some kind of corruption. >>> >> This can be caused by a static variable, that is written to prior to >> relocation. Since the .rel section overlays the .bss section, the write >> to a variable in the BSS will corrupt the relocation data. >> > > Yes! That's it! > > Using a watchpoint I tracked the corruption down to an early write to a > static variable in our custom code. > > So finally: > The whole thing was a problem in a custom modification and was solved there. > It has no implication on u-boot itself. Any pointers on which kind of custom modification, because I could see the similar issue with upstream u-boot. thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 02/21] mx6sabresd: README: Fix to add space on dd command
On Thu, May 18, 2017 at 5:47 PM, Fabio Estevam wrote: > On Thu, May 18, 2017 at 8:00 AM, Jagan Teki wrote: >> From: Jagan Teki >> >> Fix to give space between of and bs of dd command. >> >> Cc: Stefano Babic >> Cc: Michael Trimarchi >> Signed-off-by: Jagan Teki >> Reviewed-by: Fabio Estevam > > Same here, maybe you can put my 3 patches as part of your series? OK, but this patch sent from last 6 versions. thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Very slow mtest on i.MX6UL over dual-die DDR3 (two chip selects)
Hi Hector, On Thu, May 18, 2017 at 11:43 AM, Hector Palacios wrote: > In case I wasn't clear, I don't have any memory mapping problems. I have one > single > DDR chip, which internally uses two dies and two chip selects. Setting > CONFIG_NR_DRAM_BANKS to 1 (and full size) or 2 (and half size) in U-Boot > doesn't make > any difference in terms of performance. Ok, thanks for the clarification. > Additional investigation showed the following: > > NXP DDR stress test takes the same time to complete (successfully) in both > variants > (single-die with one chip select and 1GB density per CS, and dual-die with > two chip > select and 512MB per CS) > > The slow memory access is global in U-Boot, not limited to 'mtest' command. A > memory > copy command for 256M (time cp.l 9000 8000 400) takes: > - 1.304s on the single-die DDR3 > - 15.866 seconds on the dual-die DDR3 > > Note that both data/instuction cache are ON on both devices, and that I'm only > exercising the lower memory (only CS0 on the dual-die chip) to avoid > potential issues > or delays between changing from CS0 to CS1. > > I also verified that configuring the MMDC0 for using only one CS on the > dual-die DDR3 > chip (and only half the size), does not help. This DDR is still performing > slowly in > U-Boot, but I can't find the reason why. I got very slow performance with MX6UL when U-Boot is loaded via serial download mode. This gets fixed by setting the SMP bit: https://patchwork.ozlabs.org/patch/747074/ Looks like your issue is not related though. Another experiment: could you try the same tests running on U-Boot 2017.05? ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: fixed relocation using proper alignment
On 2017-05-18 17:37, Jagan Teki wrote: > On Thu, May 18, 2017 at 9:04 PM, Manfred Schlaegl > wrote: >> On 2017-05-18 16:59, Lothar Waßmann wrote: >>> Manfred Schlaegl wrote: >>> On 2017-05-17 06:13, Lokesh Vutla wrote: > > > On Tuesday 16 May 2017 07:59 PM, Manfred Schlaegl wrote: >> On 2017-05-11 08:53, Lokesh Vutla wrote: >>> >>> >>> On Wednesday 10 May 2017 07:11 PM, Manfred Schlaegl wrote: Using u-boot-2017.05 on i.MX6UL we ran into following problem: Initially U-Boot could be started normally. If we added one random command in configuration, the newly generated image hung at startup (last output was DRAM: 256 MiB). We tracked this down to a data abort within relocation (relocated_code). >>> [...] >> In a good case (rel_dyn_start aligned to 8 byte), u-boot is starting up >> normally >> rel_dyn_start is 0x8785FC28 >> rel_dyn_end is 0x87857BD0 >> A dump of this memory area shows no abnormality >> >> In a bad case (same source, but rel_dyn_start aligned to 4 byte), the >> data abort happens >> rel_dyn_start is 0x8785FC24 >> rel_dyn_end is 0x87857BCC >> So we have the same size of 32856 bytes but a memory dump showed exactly >> one difference, which is >> very interesting: >> >> At offset 0x610 (relative to rel_dyn_start) we have following difference >> -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 00 00 00 00 >> |0>..4>..| >> +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 >> |0>..| > > Looks like someone is corrupting the data(assuming). Is it all 0's just > at this location or continuously after this? No. Above diff is the only difference of the good and bad case in memory located between rel_dyn_start and rel_dyn_end. To see if it might be a corruption I compared the the rel_dyn with the created u-boot.img and found the same difference -0610 30 3e 80 87 17 00 00 00 34 3e 80 87 17 00 00 00 |0>..4>..| <--- generated image +0610 30 3e 80 87 17 00 00 00 00 00 00 00 17 00 00 00 |0>..| <--- memory dump So it must be some kind of corruption. >>> This can be caused by a static variable, that is written to prior to >>> relocation. Since the .rel section overlays the .bss section, the write >>> to a variable in the BSS will corrupt the relocation data. >>> >> >> Yes! That's it! >> >> Using a watchpoint I tracked the corruption down to an early write to a >> static variable in our custom code. >> >> So finally: >> The whole thing was a problem in a custom modification and was solved there. >> It has no implication on u-boot itself. > > Any pointers on which kind of custom modification, because I could see > the similar issue with upstream u-boot. > > thanks! > For compatibility reasons we use a custom environment implementation. In this implementation we had an write access to a static variable in env_init. env_init is called before relocation. As Lothar stated out .bss overlaps .rel at this stage, so we corrupted .rel. Hope that helped! Best regards, Manfred ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 36/38] common: arm: davinci: Move header file out of common
Hi Tom, On 17 May 2017 at 15:33, Tom Rini wrote: > On Wed, May 17, 2017 at 08:23:09AM -0600, Simon Glass wrote: > >> We should not have an arch-specific header file in common.h. Instead, use >> the asm/hardware.h header to provide the required declarations, and drop >> the common.h changes. >> >> Signed-off-by: Simon Glass > > I'm not a super fan of adding #include to config.h files, but I'll see > if they can be dropped when testing the series. > > Reviewed-by: Tom Rini Me neither. The problem is things like CONFIG_SYS_LOAD_ADDR in common/image.c which rely on things in asm/hardware. I suppose you could include it from asm/u-boot.h, but I'm not sure if that is better or not. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 36/38] common: arm: davinci: Move header file out of common
On Thu, May 18, 2017 at 09:55:41AM -0600, Simon Glass wrote: > Hi Tom, > > On 17 May 2017 at 15:33, Tom Rini wrote: > > On Wed, May 17, 2017 at 08:23:09AM -0600, Simon Glass wrote: > > > >> We should not have an arch-specific header file in common.h. Instead, use > >> the asm/hardware.h header to provide the required declarations, and drop > >> the common.h changes. > >> > >> Signed-off-by: Simon Glass > > > > I'm not a super fan of adding #include to config.h files, but I'll see > > if they can be dropped when testing the series. > > > > Reviewed-by: Tom Rini > > Me neither. The problem is things like CONFIG_SYS_LOAD_ADDR in > common/image.c which rely on things in asm/hardware. I suppose you > could include it from asm/u-boot.h, but I'm not sure if that is better > or not. No, I need to bite the bullet and go back and re-try migration of CONFIG_SYS_TEXT_BASE (fully), CONFIG_SYS_LOAD_ADDR, etc. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 9/9] dm: core: Adjust device_bind_common() to take an ofnode
This core function will need to work with a live tree also. Update it to accept an ofnode instead of an offset. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: - Cut the series down to only prepare the way for live tree - Drop all live tree changes - Adjust storage to avoid a code size increase drivers/core/device.c | 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) Applied to u-boot-dm ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 8/9] dm: core: Add ofnode to represent device tree nodes
With live tree we need a struct device_node * to reference a node. With the existing flat tree, we need an int offset. We need to unify these into a single value which can represent both. Add an ofnode union for this and adjust existing code to move to this. Signed-off-by: Simon Glass --- Changes in v3: - Drop struct fdtdec_phandle_args and DECLARE_GLOBAL_DATA_PTR from header Changes in v2: None drivers/core/device.c | 2 +- drivers/core/root.c | 2 +- include/dm.h | 1 + include/dm/device.h | 14 +--- include/dm/ofnode.h | 96 +++ 5 files changed, 109 insertions(+), 6 deletions(-) create mode 100644 include/dm/ofnode.h Applied to u-boot-dm ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
