Re: [U-Boot] [PATCH v2 02/13] trats: add optional cflags to board object file.
Hello Minkyu, On 01/02/2014 07:35 AM, Minkyu Kang wrote: On 19/12/13 03:31, Przemyslaw Marczak wrote: This change avoids unexpected unaligned access. more info: README.arm-unaligned-accesses Signed-off-by: Przemyslaw Marczak cc: Lukasz Majewski --- Changes v2: - new patch --- board/samsung/trats/Makefile |2 ++ 1 file changed, 2 insertions(+) diff --git a/board/samsung/trats/Makefile b/board/samsung/trats/Makefile index 5dc8a1f..c1bcd63 100644 --- a/board/samsung/trats/Makefile +++ b/board/samsung/trats/Makefile @@ -6,3 +6,5 @@ # obj-y += trats.o + +$(obj)trats.o: CFLAGS += $(PLATFORM_NO_UNALIGNED) \ No newline at end of file What is the example of unexpected unaligned access on trats? Thanks, Minkyu Kang. There was unaligned access exception on Trats before booting the linux and I checked that this flag resolved this issue. After adding some v3 changes I can see that this is not a solution for this issue. I am working on it and this commit will be removed in patch set V3. Regards -- Przemyslaw Marczak Samsung R&D Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 04/13] samsung: common: Add misc file and common function misc_init_r().
Hello Minkyu, On 01/02/2014 07:37 AM, Minkyu Kang wrote: On 19/12/13 03:31, Przemyslaw Marczak wrote: Config: CONFIG_MISC_INIT_R enables implementation of misc_init_r() in common file:: - board/samsung/common/misc.c I can't understand this commit message. What means? I mean that implementation of function misc_init_r() in file board/samsung/common/misc.c can be enabled just by adding this config (CONFIG_MISC_INIT_R) for Samsung devices. Regards -- Przemyslaw Marczak Samsung R&D Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] usb: ehci: exynos: set/reset hsic phys
From: Inderpal Singh
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2
are for HSIC phys. The usb 2.0 phy is already being setup. This patch
sets up the hsic phys.
Signed-off-by: Inderpal Singh
---
arch/arm/include/asm/arch-exynos/ehci.h | 14 +++
drivers/usb/host/ehci-exynos.c | 39 +++
2 files changed, 53 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/ehci.h
b/arch/arm/include/asm/arch-exynos/ehci.h
index d79f25c..d2d70bd 100644
--- a/arch/arm/include/asm/arch-exynos/ehci.h
+++ b/arch/arm/include/asm/arch-exynos/ehci.h
@@ -29,6 +29,20 @@
#define EHCICTRL_ENAINCR8 (1 << 27)
#define EHCICTRL_ENAINCR16 (1 << 26)
+#define HSIC_CTRL_REFCLKSEL (0x2)
+#define HSIC_CTRL_REFCLKSEL_MASK(0x3)
+#define HSIC_CTRL_REFCLKSEL_SHIFT (23)
+
+#define HSIC_CTRL_REFCLKDIV_12 (0x24)
+#define HSIC_CTRL_REFCLKDIV_MASK(0x7f)
+#define HSIC_CTRL_REFCLKDIV_SHIFT (16)
+
+#define HSIC_CTRL_SIDDQ (0x1 << 6)
+#define HSIC_CTRL_FORCESLEEP(0x1 << 5)
+#define HSIC_CTRL_FORCESUSPEND (0x1 << 4)
+#define HSIC_CTRL_UTMISWRST (0x1 << 2)
+#define HSIC_CTRL_PHYSWRST (0x1 << 0)
+
/* Register map for PHY control */
struct exynos_usb_phy {
unsigned int usbphyctrl0;
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 66b4de0..88e6466 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -88,6 +88,8 @@ static int exynos_usb_parse_dt(const void *blob, struct
exynos_ehci *exynos)
/* Setup the EHCI host controller. */
static void setup_usb_phy(struct exynos_usb_phy *usb)
{
+ u32 hsic_ctrl;
+
set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN);
@@ -112,6 +114,32 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
clrbits_le32(&usb->usbphyctrl0,
HOST_CTRL0_LINKSWRST |
HOST_CTRL0_UTMISWRST);
+
+ /* HSIC Phy Setting */
+ hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+ HSIC_CTRL_FORCESLEEP |
+ HSIC_CTRL_SIDDQ);
+
+ clrbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+ clrbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+ hsic_ctrl = (((HSIC_CTRL_REFCLKDIV_12 & HSIC_CTRL_REFCLKDIV_MASK)
+ << HSIC_CTRL_REFCLKDIV_SHIFT)
+ | ((HSIC_CTRL_REFCLKSEL & HSIC_CTRL_REFCLKSEL_MASK)
+ << HSIC_CTRL_REFCLKSEL_SHIFT)
+ | HSIC_CTRL_UTMISWRST);
+
+ setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+ setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
+ udelay(10);
+
+ clrbits_le32(&usb->hsicphyctrl1, HSIC_CTRL_PHYSWRST |
+ HSIC_CTRL_UTMISWRST);
+
+ clrbits_le32(&usb->hsicphyctrl2, HSIC_CTRL_PHYSWRST |
+ HSIC_CTRL_UTMISWRST);
+
udelay(20);
/* EHCI Ctrl setting */
@@ -125,6 +153,8 @@ static void setup_usb_phy(struct exynos_usb_phy *usb)
/* Reset the EHCI host controller. */
static void reset_usb_phy(struct exynos_usb_phy *usb)
{
+ u32 hsic_ctrl;
+
/* HOST_PHY reset */
setbits_le32(&usb->usbphyctrl0,
HOST_CTRL0_PHYSWRST |
@@ -133,6 +163,15 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
HOST_CTRL0_FORCESUSPEND |
HOST_CTRL0_FORCESLEEP);
+ /* HSIC Phy reset */
+ hsic_ctrl = (HSIC_CTRL_FORCESUSPEND |
+ HSIC_CTRL_FORCESLEEP |
+ HSIC_CTRL_SIDDQ |
+ HSIC_CTRL_PHYSWRST);
+
+ setbits_le32(&usb->hsicphyctrl1, hsic_ctrl);
+ setbits_le32(&usb->hsicphyctrl2, hsic_ctrl);
+
set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
}
--
1.7.9.5
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[U-Boot] [PATCH v2 2/2] usb: exynos5: arndale: Add network support
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch implements a board specific board_usb_init function in ehci driver
to perform reset sequence for USB3503 hub and enables the relevant config
options for network to work.
Signed-off-by: Inderpal Singh
Signed-off-by: Chander Kashyap
---
board/samsung/arndale/arndale.c | 13 +
drivers/usb/host/ehci-exynos.c | 10 ++
include/configs/arndale.h |4
3 files changed, 27 insertions(+)
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 052fecd..deca348 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -7,10 +7,23 @@
#include
#include
#include
+#include
#include
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_USB_EHCI_EXYNOS
+void exynos_board_usb_init(int value)
+{
+ struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *)
+ samsung_get_base_gpio_part1();
+
+ /* Configure gpios for usb 3503 hub's reset and connect */
+ s5p_gpio_direction_output(&gpio->x3, 5, value);
+ s5p_gpio_direction_output(&gpio->d1, 7, value);
+}
+#endif
+
int board_init(void)
{
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 88e6466..4be6a60 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
}
+inline void __exynos_board_usb_init(int value)
+{
+}
+void exynos_board_usb_init(int)
+__attribute__((weak, alias("__exynos_board_usb_init")));
+
/*
* EHCI-initialization
* Create the appropriate control structures to manage
@@ -201,8 +207,12 @@ int ehci_hcd_init(int index, enum usb_init_type init,
gpio_direction_output(ctx->vbus_gpio.gpio, 1);
#endif
+ exynos_board_usb_init(0);
+
setup_usb_phy(ctx->usb);
+ exynos_board_usb_init(1);
+
*hccr = ctx->hcd;
*hcor = (struct ehci_hcor *)((uint32_t) *hccr
+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index b7fb29e..eda0e4f 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -116,6 +116,10 @@
#define CONFIG_USB_EHCI_EXYNOS
#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
/* MMC SPL */
#define CONFIG_EXYNOS_SPL
#define CONFIG_SPL
--
1.7.9.5
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[U-Boot] [PATCH v2 0/2] Add usb ethernet support for Arndale
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patchset adds support for this usb ethernet controllor. Changes in v2: - removed setting preboot environment in patch 2 Inderpal Singh (2): usb: ehci: exynos: set/reset hsic phys usb: exynos5: arndale: Add network support arch/arm/include/asm/arch-exynos/ehci.h | 14 + board/samsung/arndale/arndale.c | 13 drivers/usb/host/ehci-exynos.c | 49 +++ include/configs/arndale.h |4 +++ 4 files changed, 80 insertions(+) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Interrupts in U-Boot
Hello, Does U-Boot support interrupt handling for ARM processors? If it is not supporting can I add it on my own? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/6] mx6: soc: Clear the LDO ramp values up prior to setting the LDO voltages
On 26/12/2013 17:51, Fabio Estevam wrote: > From: Fabio Estevam > > Since ROM may modify the LDO ramp up time according to fuse setting, > it is safer to reset the ramp up field to its default value of 00: > > 00: 64 cycles of 24MHz clock; > 01: 128 cycles of 24MHz clock; > 02: 256 cycles of 24MHz clock; > 03: 512 cycles of 24MHz clock; > > Signed-off-by: Anson Huang > Signed-off-by: Jason Liu > Signed-off-by: Fabio Estevam > --- > Changes since v1: > - None > > arch/arm/cpu/armv7/mx6/soc.c | 16 > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 6cbade7..13b9e36 100644 Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/6] mx6: soc: Staticize set_vddsoc()
Hi Fabio, On 26/12/2013 17:51, Fabio Estevam wrote: > From: Fabio Estevam > > set_vddsoc() is not used anywhere else, so make it static. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/2] mx6sabre_common.h: Add CONFIG_CMD_FUSE support
On 23/12/2013 16:07, Fabio Estevam wrote: > From: Fabio Estevam > > Add CONFIG_CMD_FUSE option, so that the fuse API can be used. > > Signed-off-by: Fabio Estevam > Reviewed-by: Benoît Thébaudeau > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/6] mx6: soc: Set the VDDSOC at 1.175 V
On 26/12/2013 17:51, Fabio Estevam wrote: > From: Fabio Estevam > > mx6 datasheet specifies that the minimum VDDSOC at 792 MHz is 1.15 V. > Add a 25 mV margin and set it to 1.175V. > > This also matches the VDDSOC voltages for 792MHz operation that the kernel > configures: > http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/cpu_op-mx6.c?h=imx_3.0.35_4.1.0 > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/6] mx6: soc: Add the required LDO ramp up delay
On 26/12/2013 17:51, Fabio Estevam wrote: > From: Fabio Estevam > > When changing LDO voltages we need to wait for the required amount of time > for the voltage to settle. > > Also, as the timer is still not available when arch_cpu_init() is called, we > need to call it later at board_postclk_init() phase. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/6] mx6: soc: Disable VDDPU regulator
On 26/12/2013 17:51, Fabio Estevam wrote: > From: Fabio Estevam > > As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator > in order to save power. > > Signed-off-by: Anson Huang > Signed-off-by: Jason Liu > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/6] mx6: soc: Introduce set_ldo_voltage()
On 26/12/2013 17:51, Fabio Estevam wrote: > From: Fabio Estevam > > Introduce set_ldo_voltage() so that all three LDO regulators can be > configured. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/2] doc: README.fuse: Add an example on how to use the fuse API on mx6q
On 23/12/2013 16:07, Fabio Estevam wrote: > From: Fabio Estevam > > When using the fuse API in U-boot user must calculate the 'bank' and 'word' > values. > > Provide a real example on how to calculate such values for the mx6q. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PULL] : Please pull u-boot-imx
Hi Albert,
my first pull-request in 2014 ! Please pull from u-boot-imx, thanks !
The following changes since commit 56eb3da43fab5990a4b7bc118b76c7cae2ceb140:
arm, am335x: update for the siemens boards (2013-11-12 09:53:59 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git master
for you to fetch changes up to 02229827804980e3cce48bf4fce43699046bcf7e:
mx6: soc: Disable VDDPU regulator (2014-01-02 17:16:51 +0100)
Eric Nelson (8):
i.MX6DQ/DLS: replace pad names with their Linux kernel equivalents
i.MX6DQ/DLS: remove useless mux/pad declarations
i.MX6DQ: Add Pinmux settings that are present in mainline and
Dual-Lite/Solo
i.MX6DQ/DLS: remove unused pad declarations
i.MX6DQ/DLS: whitespace: Align IOMUX_PAD column in declarations
imx-common: remove extraneous semicolon from macro
i.MX6 (DQ/DLS): use macros for mux and pad declarations
ARM: mx6: Update non-Freescale boards to include CPU errata.
Fabio Estevam (24):
configs: imx: Make CONFIG_SYS_PROMPT uniform across FSL boards
wandboard: Return the error immediately when ipuv3_fb_init() fails
wandboard: Return the error when cpu_eth_init() fails
titanium: Return the error when cpu_eth_init() fails
nitrogen6x: Remove unused OCOTP options
mx51evk: Fix pmic_init() argument
mx31pdk: Fix pmic_init() argument
efikamx: Fix pmic_init() argument
power: power_fsl: Pass p->bus in the same way for SPI and I2C cases
mx6sabresd: Fix wrong colors in LVDS splash
mx6sabresd: Add SPI NOR support
imx: Explicitly pass the I2C bus number in pmic_init()
configs: imx: Remove CONFIG_SYS_SPD_BUS_NUM option
mx6: clock: Fix the calculation of PLL_ENET frequency
mx6sabresd: Allow probing HSYNC, VSYNC and DISP_CLK signals
mx6sabresd: Fix LVDS width and color format
doc: README.fuse: Add an example on how to use the fuse API on mx6q
mx6sabre_common.h: Add CONFIG_CMD_FUSE support
mx6: soc: Staticize set_vddsoc()
mx6: soc: Clear the LDO ramp values up prior to setting the LDO
voltages
mx6: soc: Set the VDDSOC at 1.175 V
mx6: soc: Introduce set_ldo_voltage()
mx6: soc: Add the required LDO ramp up delay
mx6: soc: Disable VDDPU regulator
Frank Li (1):
imx6: fix random hang when download by usb
Giuseppe Pagano (5):
udoo: Move and optimize platform register setting.
udoo: Add ethernet support (FEC + Micrel KSZ9031).
udoo: Fix watchdog during kernel boot.
nitrogen6x: Move setup_sata to common part
udoo: Add SATA support on uDoo Board.
Liu Ying (1):
MX6 SabreSD: Use readl() to read the CCM_CCGR3 register
Marek Vasut (3):
Net: FEC: Fix huge memory leak
ARM: mx53: video: Add IPUv3 LCD support for M53EVK
ARM: mxs: tools: Fix errno handling in strtoul() invocation
Michael Heimpold (1):
mxs_gpio: fix the handling in gpio_direction_output()
Stefan Roese (1):
mx6: titanium: Move BSP code to barco board directory
Stefano Babic (1):
MX6: fix sata compilation for i.MX6
arch/arm/cpu/armv7/mx6/clock.c |2 +-
arch/arm/cpu/armv7/mx6/soc.c | 110 +-
arch/arm/imx-common/Makefile |3 +
arch/arm/imx-common/cpu.c|4 +-
arch/arm/imx-common/sata.c | 34 +
arch/arm/include/asm/arch-mx6/crm_regs.h |1 +
arch/arm/include/asm/arch-mx6/imx-regs.h | 23 +
arch/arm/include/asm/arch-mx6/mx6-pins.h | 33 +-
arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 2728
+-
arch/arm/include/asm/arch-mx6/mx6q_pins.h| 2642
-
arch/arm/include/asm/arch-mx6/sys_proto.h|2 -
arch/arm/include/asm/imx-common/sata.h | 16 +
board/{freescale => barco}/titanium/Makefile |0
board/{freescale => barco}/titanium/imximage.cfg |0
board/{freescale => barco}/titanium/titanium.c | 110 +-
board/boundary/nitrogen6x/nitrogen6x.c | 197 +-
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 40 +-
board/denx/m53evk/m53evk.c | 73 +
board/freescale/mx25pdk/mx25pdk.c|2 +-
board/freescale/mx31pdk/mx31pdk.c|2 +-
board/freescale/mx35pdk/mx35pdk.c|2 +-
board/freescale/mx51evk/mx51evk.c|2 +-
board/freescale/mx53evk/mx53evk.c|2 +-
board/freescale/mx53loco/mx53loco.c |2 +-
board/freescale/mx6qarm2/mx6qarm2.c | 68 +-
board/freescale/mx6qsabreauto/mx6qsabreauto.c| 62 +-
board/freescale/mx6sabresd/mx6sabresd.c | 155 +-
board/genesi/mx51_efikamx/efikamx.c |2 +-
board/udoo/1066mhz_4x256mx16.cfg | 55 +
board/udoo/clocks.cfg
[U-Boot] Are mmc open/close subcommands needed?
Hi, I saw commit 2a91c9134675140853577b565210458b5774e6cf that introduces mmc subcommands 'open' and 'close' to access eMMC boot partitions and was wondering if they are really needed. Can't the same be achieved with already existing 'mmc dev [dev] [part]' command? mmc open is the same as mmc dev where is the boot partition mmc close is the same as mmc dev 0 as a 0 will switch to partition 0 (user data). Best regards, -- Hector Palacios ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] mx6: Add initial support for the Hummingboard solo
From: Fabio Estevam SolidRun has designed the Hummingboard board based on mx6q/dl/solo. Add the initial support for the mx6 solo variant. More information about this hardware can be found at: http://cubox-i.com/ Based on the work from Jon Nettleton . Signed-off-by: Jon Nettleton Signed-off-by: Fabio Estevam --- Hi Stefano, I saw that you have just sent out a pull request, but I was wondering if this one could also go to 2014.01 in case you are happy with it. Thanks board/solidrun/hummingboard/Makefile | 9 + board/solidrun/hummingboard/README | 35 board/solidrun/hummingboard/hummingboard.c | 232 + board/solidrun/hummingboard/hummingboard_solo.cfg | 25 +++ board/solidrun/mx6-microsom/800mhz_2x128mx16.cfg | 74 +++ board/solidrun/mx6-microsom/clocks.cfg | 33 +++ .../mx6-microsom/ddr-800mhz-32bit-setup.cfg| 76 +++ boards.cfg | 1 + include/configs/hummingboard.h | 230 9 files changed, 715 insertions(+) create mode 100644 board/solidrun/hummingboard/Makefile create mode 100644 board/solidrun/hummingboard/README create mode 100644 board/solidrun/hummingboard/hummingboard.c create mode 100644 board/solidrun/hummingboard/hummingboard_solo.cfg create mode 100644 board/solidrun/mx6-microsom/800mhz_2x128mx16.cfg create mode 100644 board/solidrun/mx6-microsom/clocks.cfg create mode 100644 board/solidrun/mx6-microsom/ddr-800mhz-32bit-setup.cfg create mode 100644 include/configs/hummingboard.h diff --git a/board/solidrun/hummingboard/Makefile b/board/solidrun/hummingboard/Makefile new file mode 100644 index 000..042a2f0 --- /dev/null +++ b/board/solidrun/hummingboard/Makefile @@ -0,0 +1,9 @@ +# +# (C) Copyright 2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# Copyright (C) 2013, Jon Nettleton +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := hummingboard.o diff --git a/board/solidrun/hummingboard/README b/board/solidrun/hummingboard/README new file mode 100644 index 000..6d5be29 --- /dev/null +++ b/board/solidrun/hummingboard/README @@ -0,0 +1,35 @@ +U-Boot for SolidRun Hummingboard + + +This file contains information for the port of U-Boot to the Hummingboard. + +For more details about Hummingboard, please refer to: +http://cubox-i.com + +Building U-boot for Hummingboard + + +To build U-Boot for the Hummingboard Solo version: + +$ make hummingboard_solo_config +$ make + +Flashing U-boot into the SD card + + +- After the 'make' command completes, the generated 'u-boot.imx' binary must be +flashed into the SD card: + +$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=1k seek=1; sync + +(Note - the SD card node may vary, so adjust this as needed). + +- Insert the micro SD card into the slot located in the bottom of the board + +- Connect a 3.3V USB to serial converter cable to the host PC. The MX6 UART +signals are available in the 26 pin connector as shown at: +http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware +(Check for "26 pin header layout"). + +- Power up the board via USB cable (CON201) and U-boot messages will appear in +the serial console. diff --git a/board/solidrun/hummingboard/hummingboard.c b/board/solidrun/hummingboard/hummingboard.c new file mode 100644 index 000..be2baad --- /dev/null +++ b/board/solidrun/hummingboard/hummingboard.c @@ -0,0 +1,232 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton . + * + * Authors: Fabio Estevam + Jon Nettleton + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW |\ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ + PAD_CTL_HYS) + +#define USDHC_PAD_GPIO_CTRL (PAD_CTL_PUS_22K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_
[U-Boot] [PATCH 2/2] net: phy: atheros: Fix the masks for AR8031/8035
From: Fabio Estevam
Use the same masks as used in the kernel:
https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/tree/drivers/net/phy/at803x.c?id=refs/tags/v3.12.6
With such changes Ethernet is functional on hummingboard solo.
Cc: Joe Hershberger
Signed-off-by: Fabio Estevam
---
drivers/net/phy/atheros.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 0f2dfd6..386e3ab 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -50,7 +50,7 @@ static struct phy_driver AR8021_driver = {
static struct phy_driver AR8031_driver = {
.name = "AR8031",
.uid = 0x4dd074,
- .mask = 0xf0,
+ .mask = 0xffef,
.features = PHY_GBIT_FEATURES,
.config = genphy_config,
.startup = genphy_startup,
@@ -60,7 +60,7 @@ static struct phy_driver AR8031_driver = {
static struct phy_driver AR8035_driver = {
.name = "AR8035",
.uid = 0x4dd072,
- .mask = 0x4f,
+ .mask = 0xffef,
.features = PHY_GBIT_FEATURES,
.config = ar8035_config,
.startup = genphy_startup,
--
1.8.1.2
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Re: [U-Boot] [PATCH] powerpc/83xx: fix compilation error for MPC8315ERDB
On 12/19/2013 07:54 PM, Nikhil Badola wrote: > From: Ramneek Mehresh > > Defines get_svr() for 83xx devices > > Signed-off-by: Ramneek Mehresh > --- > arch/powerpc/cpu/mpc83xx/start.S | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/arch/powerpc/cpu/mpc83xx/start.S > b/arch/powerpc/cpu/mpc83xx/start.S > index b4fafe6..7f74a50 100644 > --- a/arch/powerpc/cpu/mpc83xx/start.S > +++ b/arch/powerpc/cpu/mpc83xx/start.S > @@ -120,6 +120,11 @@ disable_addr_trans: > mtspr SRR1, r3 > rfi > > + .globl get_svr > +get_svr: > + mfspr r3, SVR > + blr > + > .globl get_pvr > get_pvr: > mfspr r3, PVR > Please share how to reproduce the compilation error. I don't see it. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] t2080qds/ddr: update ddr parameters
On 12/11/2013 11:10 PM, Shengzhou Liu wrote:
> - Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
> - Remove unused patameters: 'cpo', 'wrdata delay', '2T',
> which are unrelated to DDR3/3L.
>
> Signed-off-by: Shengzhou Liu
> ---
> Against master branch of git://git.denx.de/u-boot-mpc85xx.git
> v3: remain old RDIMM code without updating for now.
> v2: throw an error in case of RDIMM.
>
> board/freescale/t2080qds/ddr.c | 11 ++-
> board/freescale/t2080qds/ddr.h | 65
> +-
> 2 files changed, 28 insertions(+), 48 deletions(-)
>
> diff --git a/board/freescale/t2080qds/ddr.c b/board/freescale/t2080qds/ddr.c
> index 5db5d21..4a4d570 100644
> --- a/board/freescale/t2080qds/ddr.c
> +++ b/board/freescale/t2080qds/ddr.c
> @@ -24,7 +24,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
> const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
> ulong ddr_freq;
>
> - if (ctrl_num > 2) {
> + if (ctrl_num > 1) {
> printf("Not supported controller number %d\n", ctrl_num);
> return;
> }
> @@ -40,8 +40,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
> else
> pbsp = udimms[0];
>
> -
> - /* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr
> + /* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr
>* freqency and n_banks specified in board_specific_parameters table.
>*/
> ddr_freq = get_ddr_freq(0) / 100;
> @@ -49,9 +48,6 @@ void fsl_ddr_board_options(memctl_options_t *popts,
> if (pbsp->n_ranks == pdimm->n_ranks &&
> (pdimm->rank_density >> 30) >= pbsp->rank_gb) {
> if (ddr_freq <= pbsp->datarate_mhz_high) {
> - popts->cpo_override = pbsp->cpo;
> - popts->write_data_delay =
> - pbsp->write_data_delay;
> popts->clk_adjust = pbsp->clk_adjust;
> popts->wrlvl_start = pbsp->wrlvl_start;
> popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
> @@ -69,13 +65,10 @@ void fsl_ddr_board_options(memctl_options_t *popts,
> printf("for data rate %lu MT/s\n", ddr_freq);
> printf("Trying to use the highest speed (%u) parameters\n",
> pbsp_highest->datarate_mhz_high);
> - popts->cpo_override = pbsp_highest->cpo;
> - popts->write_data_delay = pbsp_highest->write_data_delay;
> popts->clk_adjust = pbsp_highest->clk_adjust;
> popts->wrlvl_start = pbsp_highest->wrlvl_start;
> popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
> popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
> - popts->twot_en = pbsp_highest->force_2t;
> } else {
> panic("DIMM is not supported by this board");
> }
> diff --git a/board/freescale/t2080qds/ddr.h b/board/freescale/t2080qds/ddr.h
> index 964eaad..5828596 100644
> --- a/board/freescale/t2080qds/ddr.h
> +++ b/board/freescale/t2080qds/ddr.h
> @@ -14,9 +14,6 @@ struct board_specific_parameters {
> u32 wrlvl_start;
> u32 wrlvl_ctl_2;
> u32 wrlvl_ctl_3;
> - u32 cpo;
> - u32 write_data_delay;
> - u32 force_2t;
> };
>
> /*
> @@ -28,58 +25,48 @@ struct board_specific_parameters {
> static const struct board_specific_parameters udimm0[] = {
> /*
>* memory controller 0
> - * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T
> - * ranks| mhz| GB |adjst| start | ctl2| ctl3 | |delay |
> + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl |
> + * ranks| mhz| GB |adjst| start | ctl2| ctl3 |
>*/
> - {2, 1350, 4, 4, 8, 0x0809090b, 0x0c0c0d0a, 0xff,2, 0},
> - {2, 1350, 0, 5, 7, 0x0709090b, 0x0c0c0d09, 0xff,2, 0},
> - {2, 1666, 4, 4, 8, 0x080a0a0d, 0x0d10100b, 0xff,2, 0},
> - {2, 1666, 0, 5, 7, 0x080a0a0c, 0x0d0d0e0a, 0xff,2, 0},
> - {2, 1900, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff,2, 0},
> - {2, 2140, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff,2, 0},
> - {1, 1350, 0, 5, 8, 0x0809090b, 0x0c0c0d0a, 0xff,2, 0},
> - {1, 1700, 0, 5, 8, 0x080a0a0c, 0x0c0d0e0a, 0xff,2, 0},
> - {1, 1800, 2, 5, 6, 0x06070709, 0x110a0b08, 0xff,2, 0},
> - {1, 1866, 2, 4, 6, 0x06060708, 0x09090a07, 0xff,2, 0},
> - {1, 1900, 2, 4, 6, 0x06060708, 0x09090a07, 0xff,2, 0},
> - {1, 2000, 2, 4, 8, 0x090a0b0d, 0x0e0f110b, 0xff,2, 0},
> - {1, 2133, 2, 4, 8, 0x090a0b0d, 0x0e0f110b, 0xff,2, 0},
> + {2, 1500, 2, 5, 7, 0x0808090a, 0x0b0c0c0a},
> + {2, 1500, 2, 5, 6, 0x07070809, 0x0a0b0b09},
> + {2, 1700, 2, 5, 8, 0x090b0b0d, 0x0
Re: [U-Boot] [PATCH v3 1/2] powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL
On Sat, 2013-12-14 at 11:08 +0800, Po Liu wrote:
> diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c
> index 9de327b..28656f2 100644
> --- a/drivers/mtd/nand/fsl_ifc_spl.c
> +++ b/drivers/mtd/nand/fsl_ifc_spl.c
> @@ -88,7 +88,11 @@ static inline int bad_block(uchar *marker, int port_size)
> return __raw_readw((u16 *)marker) != 0x;
> }
>
> +#ifdef CONFIG_TPL_BUILD
> +void nand_spl_load_image(uint32_t offs, int uboot_size, void *vdst)
> +#else
> static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
> +#endif
> {
> struct fsl_ifc *ifc = IFC_BASE_ADDR;
> uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
> @@ -105,6 +109,9 @@ static void nand_load(unsigned int offs, int uboot_size,
> uchar *dst)
>
> int sram_addr;
> int pg_no;
> +#ifdef CONFIG_TPL_BUILD
> + uchar *dst = vdst;
> +#endif
Please change the static function signature to match, as fsl_elbc_spl.c
does.
> diff --git a/spl/Makefile b/spl/Makefile
> index 2a787af..7e2adf9 100644
> --- a/spl/Makefile
> +++ b/spl/Makefile
> @@ -79,6 +79,7 @@ LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/
> LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/ \
> drivers/power/pmic/
> LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/
> +LIBS-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += drivers/misc/
> LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/
> LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/
> LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/
Document this in README.
-Scott
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Re: [U-Boot] [PATCH][v2] powerpc/t1040qds: Update DDR initialization related settings
On 12/16/2013 09:42 PM, Priyanka Jain wrote:
> Update following DDR related settings for T1040QDS
> -Correct number of chip selects to two as t1040qds supports
> two Chip selects.
> -Update board_specific_parameters udimm structure with settings
> derived via calibration.
> -Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
> read at 400KHz.
>
> Signed-off-by: Poonam Aggrwal
> Signed-off-by: Priyanka Jain
> ---
> Changes for v2:
> Reduced I2C speed to 50KHz.
>
> board/freescale/t1040qds/ddr.h | 22 --
> include/configs/T1040QDS.h |6 +++---
> 2 files changed, 15 insertions(+), 13 deletions(-)
>
> diff --git a/board/freescale/t1040qds/ddr.h b/board/freescale/t1040qds/ddr.h
> index 8ee206e..afa72af 100644
> --- a/board/freescale/t1040qds/ddr.h
> +++ b/board/freescale/t1040qds/ddr.h
> @@ -31,16 +31,18 @@ static const struct board_specific_parameters udimm0[] = {
>* num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T
>* ranks| mhz| GB |adjst| start | ctl2| ctl3 | |delay |
>*/
> - {2, 1350, 4, 4, 8, 0x0809090b, 0x0c0c0d0a, 0xff,2, 0},
> - {2, 1350, 0, 5, 7, 0x0709090b, 0x0c0c0d09, 0xff,2, 0},
> - {2, 1666, 4, 4, 8, 0x080a0a0d, 0x0d10100b, 0xff,2, 0},
> - {2, 1666, 0, 5, 7, 0x080a0a0c, 0x0d0d0e0a, 0xff,2, 0},
> - {2, 1900, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff,2, 0},
> - {2, 2140, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff,2, 0},
> - {1, 1350, 0, 5, 8, 0x0809090b, 0x0c0c0d0a, 0xff,2, 0},
> - {1, 1700, 0, 5, 8, 0x080a0a0c, 0x0c0d0e0a, 0xff,2, 0},
> - {1, 1900, 0, 4, 8, 0x080a0a0c, 0x0e0e0f0a, 0xff,2, 0},
> - {1, 2140, 0, 4, 8, 0x090a0b0c, 0x0e0f100b, 0xff,2, 0},
> + {2, 833, 4, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
> + {2, 833, 0, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
> + {2, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
> + {2, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
> + {2, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
> + {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
> + {1, 833, 4, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
> + {1, 833, 0, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
> + {1, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
> + {1, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
> + {1, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
> + {1, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
> {}
> };
Looks you are updating timing for all speeds. Can you add to commit message
about what DIMMs and speeds have you tested?
York
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Re: [U-Boot] [PATCH][v2] board/freescale:Remove use of CONFIG_SPL_NAND_MINIMAL
On 12/10/2013 11:12 PM, Prabhakar Kushwaha wrote: > CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary > review purpose. > > So, use CONFIG_SPL_NAND_BOOT config. > > Signed-off-by: Prabhakar Kushwaha > --- > Changes for v2: Incorporated Scott's comments >- Add CONFIG_SPL_NAND_BOOT in README > Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 2/6] power: Explicitly select pmic device's bus
Hi Minkyu Kang,
On Thu, Dec 5, 2013 at 2:50 PM, Minkyu Kang wrote:
> Dear Leela Krishna Amudala,
>
> On 12/11/13 19:04, Leela Krishna Amudala wrote:
>> The current pmic i2c code assumes the current i2c bus is
>> the same as the pmic device's bus. There is nothing ensuring
>> that to be true. Therefore, select the proper bus before performing
>> a transaction.
>>
>> Signed-off-by: Aaron Durbin
>> Signed-off-by: Simon Glass
>> Signed-off-by: Leela Krishna Amudala
>> Reviewed-by: Doug Anderson
>> Acked-by: Simon Glass
>> ---
>> drivers/power/power_i2c.c | 62
>> +
>> 1 file changed, 57 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c
>> index ac76870..3cafa4d 100644
>> --- a/drivers/power/power_i2c.c
>> +++ b/drivers/power/power_i2c.c
>> @@ -16,9 +16,45 @@
>> #include
>> #include
>>
>> +static int pmic_select(struct pmic *p)
>> +{
>> + int ret, old_bus;
>
> I think, old prefix is meaningless.
> please fix it globally.
>
I think, it is necessary to differentiate with the current bus.
Please see my below commets for clear picture.
>> +
>> + old_bus = i2c_get_bus_num();
>> + if (old_bus != p->bus) {
>
> How about return immediately if get a bus.
>
> if (old_bus == p->bus)
> return old_bus;
>
The current code is also doing the same but in other way.
If old_bus != p->bus then set the new bus otherwise no code to execute
and return old_bus.
This is same as what you suggested.
>> + debug("%s: Select bus %d\n", __func__, p->bus);
>> + ret = i2c_set_bus_num(p->bus);
>> + if (ret) {
>> + debug("%s: Cannot select pmic %s, err %d\n",
>> + __func__, p->name, ret);
>> + return -1;
>> + }
>> + }
>> +
>> + return old_bus;
>> +}
>> +
>> +static int pmic_deselect(int old_bus)
>
> in your patch, you never check a return value.
> then is it void function or wrong usage?
>
Okay, I'll change the function return type.
> And I think pmic_deselect function is almost same with pmic_select.
> If you change the parameter for pmic_select to "int bus" then,
> What is different with pmic_select?
>
> for example.
>
> bus = pmic_select(p->bus);
> /* do something */
> pmic_deselect(bus);
>
> is same with.
>
> bus = pmic_select(p->bus);
> /* do something */
> pmic_select(bus);
>
> How do you think?
>
Yes, pmic_deselect is almost same as pmic_select but there is a minor
difference.
pmic_select() is used to set new bus and this function returns the old
bus number. we will hold this old_bus number and once we are done with
our work we have to restore the old_bus so we are passing old_bus to
pmic_deselect()
Now, pmic_deselect() takes old_bus as argument and trying to set it.
This function won't return any bus number.
Hope this explanation helps.
>> +{
>> + int ret;
>> +
>> + if (old_bus != i2c_get_bus_num()) {
>> + ret = i2c_set_bus_num(old_bus);
>> + debug("%s: Select bus %d\n", __func__, old_bus);
>> + if (ret) {
>> + debug("%s: Cannot restore i2c bus, err %d\n",
>> + __func__, ret);
>> + return -1;
>> + }
>> + }
>> +
>> + return 0;
>> +}
>> +
>> int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
>> {
>> unsigned char buf[4] = { 0 };
>> + int ret, old_bus;
>>
>> if (check_reg(p, reg))
>> return -1;
>> @@ -52,23 +88,33 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
>> return -1;
>> }
>>
>> - if (i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
>> + old_bus = pmic_select(p);
>> + if (old_bus < 0)
>> return -1;
>>
>> - return 0;
>> + ret = i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
>> + pmic_deselect(old_bus);
>
> please add blank line.
>
Okay, will do it.
>> + return ret;
>> }
>>
>> int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
>> {
>> unsigned char buf[4] = { 0 };
>> u32 ret_val = 0;
>> + int ret, old_bus;
>>
>> if (check_reg(p, reg))
>> return -1;
>>
>> - if (i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
>> + old_bus = pmic_select(p);
>> + if (old_bus < 0)
>> return -1;
>>
>> + ret = i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
>> + pmic_deselect(old_bus);
>> + if (ret)
>> + return ret;
>> +
>> switch (pmic_i2c_tx_num) {
>> case 3:
>> if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG)
>> @@ -98,9 +144,15 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
>>
>> int pmic_probe(struct pmic *p)
>> {
>> - i2c_set_bus_num(p->bus);
>> + int ret, old_bus;
>> +
>> + old_bus = pmic_select(p);
>> + if (old_bus < 0)
>> + return -1;
>
> please add blank line.
>
Okay,
Re: [U-Boot] [PATCH] board/t1040qds: Fix typo in t1040_pbi.cfg file
On 12/09/2013 11:43 PM, Prabhakar Kushwaha wrote: > T1040QDS has 256KB SRAM. Comment is showing wrong information. > > So update the comment. > > Signed-off-by: Prabhakar Kushwaha > --- Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] board/t1040qds: Relax IFC FPGA timings
On 12/11/2013 10:39 PM, Prabhakar Kushwaha wrote: > Current IFC-FPGA TCH(Chip Select hold time with respect to WE deassertion) > is 0 i.e. 0 ns hold time on writes. This may not work on higher clock > freqencies. > > So, Increase TCH as 0x8 i.e. 8 ip_clk. > > Signed-off-by: Prabhakar Kushwaha > --- Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v2] board/freescale:Remove use of CONFIG_SPL_NAND_MINIMAL
On Wed, 2013-12-11 at 12:42 +0530, Prabhakar Kushwaha wrote: > CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary > review purpose. > > So, use CONFIG_SPL_NAND_BOOT config. > > Signed-off-by: Prabhakar Kushwaha > --- > Changes for v2: Incorporated Scott's comments >- Add CONFIG_SPL_NAND_BOOT in README > > README |3 +++ > board/freescale/bsc9131rdb/tlb.c |2 +- > board/freescale/bsc9132qds/tlb.c |2 +- > board/freescale/p1010rdb/tlb.c |2 +- > include/configs/BSC9131RDB.h |2 +- > include/configs/BSC9132QDS.h |2 +- > include/configs/P1010RDB.h |2 +- > 7 files changed, 9 insertions(+), 6 deletions(-) > > diff --git a/README b/README > index 265e81e..88a4722 100644 > --- a/README > +++ b/README > @@ -3245,6 +3245,9 @@ FIT uImage format: > Defines the size and behavior of the NAND that SPL uses > to read U-Boot > > + CONFIG_SPL_NAND_BOOT > + Add support NAND boot Is it really just adding support for NAND boot, or is it asserting that we are booting from NAND? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v4] powerpc/mpc85xx: Add support for single source clocking
On 12/17/2013 12:55 AM, Priyanka Jain wrote: > Single-source clocking is new feature introduced in T1040. > In this mode, a single differential clock is supplied to the > DIFF_SYSCLK_P/N inputs to the processor, which in turn is > used to supply clocks to the sysclock, ddrclock and usbclock. > > So, both ddrclock and syclock are driven by same differential > sysclock in single-source clocking mode whereas in normal clocking > mode, generally separate DDRCLK and SYSCLK pins provides > reference clock for sysclock and ddrclock > > DDR_REFCLK_SEL rcw bit is used to determine DDR clock source > -If DDR_REFCLK_SEL rcw bit is 0, then DDR PLLs are driven in > normal clocking mode by DDR_Reference clock > > -If DDR_REFCLK_SEL rcw bit is 1, then DDR PLLs are driven in > single source clocking mode by DIFF_SYSCLK > > Add code to determine ddrclock based on DDR_REFCLK_SEL rcw bit. > > Signed-off-by: Poonam Aggrwal > Signed-off-by: Priyanka Jain > --- > Changes for v4: > Updated README with CONFIG_SYS_FSL_SINGLE_SOURCE_CLK > description. > > Changes for v3: > Incorporated York's comment to move declaration to > beginning of function. > > Changes for v2: > Incorporated York's comment to separate out > DDR_CLK_FREQ and SINGLE_SOURCE_CLK code > Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] powerpc/P1022DS: Define new nand_ecclayout structure macros
On 12/17/2013 11:21 AM, York Sun wrote: > Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to > reduce the image size, by taking advantage of the new nand_ecclayout > structure. > > Signed-off-by: York Sun > CC: Prabhakar Kushwaha > CC: Scott Wood > --- Applied to u-boot-mpc85xx/master. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/B4860QDS: Define new nand_ecclayout structure macros
On 12/17/2013 11:21 AM, York Sun wrote: > Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to > reduce the image size, by taking advantage of the new nand_ecclayout > structure. > > Signed-off-by: York Sun > CC: Prabhakar Kushwaha > CC: Scott Wood > --- Applied to u-boot-mpc85xx/master. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/t208x: fix macro CONFIG_SYS_FSL_NUM_USB_CTRLS
On 12/17/2013 06:27 PM, Shengzhou Liu wrote: > CONFIG_SYS_FSL_NUM_USB_CTRLS is no longer used, > update it to new CONFIG_USB_MAX_CONTROLLER_COUNT. > > Signed-off-by: Shengzhou Liu > --- Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot-release] [PATCH] powerpc/cms700: limit NAND data structure size
On 12/17/2013 08:11 PM, Scott Wood wrote: > This fixes a build break due to excessively large NAND data structures. > > Signed-off-by: Scott Wood > Cc: Matthias Fuchs > --- Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot-release] [PATCH] powerpc/cms700: limit NAND data structure size
On Thu, 2014-01-02 at 15:50 -0800, York Sun wrote: > On 12/17/2013 08:11 PM, Scott Wood wrote: > > This fixes a build break due to excessively large NAND data structures. > > > > Signed-off-by: Scott Wood > > Cc: Matthias Fuchs > > --- > > Applied to u-boot-mpc85xx/master. Thanks. FWIW, this is a 4xx board, not mpc85xx. I actually meant to include this in my last nand pull request, but forgot to push it. :-P -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot-release] [PATCH] powerpc/t4240: enable NAND boot support
On 12/17/2013 11:09 PM, shh@gmail.com wrote: > From: Shaohui Xie > > Signed-off-by: Shaohui Xie > --- Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot-release] [PATCH] powerpc/b4860/pbl: fix rcw cfg
On 12/18/2013 09:38 PM, shh@gmail.com wrote: > From: Shaohui Xie > > The BOOT_LOC setting in rcw cfg is wrong, set it to Memory complex 1. > > Signed-off-by: Shaohui Xie > --- Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 1/6] exynos: Use common pmic_reg_update() definition
Hi Minkyu Kang,
Sorry for late response.
Please find my comments below.
On Thu, Dec 5, 2013 at 2:50 PM, Minkyu Kang wrote:
> Dear Leela Krishna Amudala,
>
> On 12/11/13 19:04, Leela Krishna Amudala wrote:
>> This function is used by different Exynos platforms, put it in the
>> common file.
>>
>> Signed-off-by: Vadim Bendebury
>> Signed-off-by: Leela Krishna Amudala
>> Reviewed-by: Doug Anderson
>> Reviewed-by: Lukasz Majewski
>> Acked-by: Simon Glass
>> ---
>> board/samsung/common/board.c | 19 ---
>> drivers/power/power_core.c | 19 +++
>> include/power/pmic.h |1 +
>> 3 files changed, 20 insertions(+), 19 deletions(-)
>>
>> diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
>> index 2512a59..1959c4e 100644
>> --- a/board/samsung/common/board.c
>> +++ b/board/samsung/common/board.c
>> @@ -156,25 +156,6 @@ static int board_init_cros_ec_devices(const void *blob)
>>
>> #if defined(CONFIG_POWER)
>> #ifdef CONFIG_POWER_MAX77686
>> -static int pmic_reg_update(struct pmic *p, int reg, uint regval)
>> -{
>> - u32 val;
>> - int ret = 0;
>> -
>> - ret = pmic_reg_read(p, reg, &val);
>> - if (ret) {
>> - debug("%s: PMIC %d register read failed\n", __func__, reg);
>> - return -1;
>> - }
>> - val |= regval;
>> - ret = pmic_reg_write(p, reg, val);
>> - if (ret) {
>> - debug("%s: PMIC %d register write failed\n", __func__, reg);
>> - return -1;
>> - }
>> - return 0;
>> -}
>> -
>> static int max77686_init(void)
>> {
>> struct pmic *p;
>> diff --git a/drivers/power/power_core.c b/drivers/power/power_core.c
>> index 29ccc83..e715435 100644
>> --- a/drivers/power/power_core.c
>> +++ b/drivers/power/power_core.c
>> @@ -208,6 +208,25 @@ int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char
>> * const argv[])
>> return CMD_RET_SUCCESS;
>> }
>>
>> +int pmic_reg_update(struct pmic *p, int reg, uint regval)
>> +{
>> + u32 val;
>> + int ret = 0;
>
> = 0 is unnecessary.
>
Okay, will remove it.
>> +
>> + ret = pmic_reg_read(p, reg, &val);
>> + if (ret) {
>> + debug("%s: PMIC %d register read failed\n", __func__, reg);
>> + return -1;
>> + }
>
> please add blank line.
>
Okay, will add it.
>> + val |= regval;
>> + ret = pmic_reg_write(p, reg, val);
>> + if (ret) {
>> + debug("%s: PMIC %d register write failed\n", __func__, reg);
>> + return -1;
>> + }
>> + return 0;
>> +}
>> +
>> U_BOOT_CMD(
>> pmic, CONFIG_SYS_MAXARGS, 1, do_pmic,
>> "PMIC",
>> diff --git a/include/power/pmic.h b/include/power/pmic.h
>> index 0e7aa31..d17dbdc 100644
>> --- a/include/power/pmic.h
>> +++ b/include/power/pmic.h
>> @@ -83,6 +83,7 @@ int pmic_probe(struct pmic *p);
>> int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
>> int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
>> int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
>> +int pmic_reg_update(struct pmic *p, int reg, uint regval);
>
> uint regval -> u32 val, for keep naming convention with other functions.
>
Okay, will change it.
Best Wishes,
Leela Krishna.
>>
>> #define pmic_i2c_addr (p->hw.i2c.addr)
>> #define pmic_i2c_tx_num (p->hw.i2c.tx_num)
>>
>
> Thanks,
> Minkyu Kang.
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Re: [U-Boot] [PATCH][v2] board/t1040qds: Enable memory reset control
On 12/25/2013 11:10 PM, Prabhakar Kushwaha wrote: > Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start > accessing it. > > Signed-off-by: Prabhakar Kushwaha > --- > Changes for v2: Incorporated York's comments > - Update subject and description > Applied to u-boot-mpc85xx/master. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] linkstation_HGLAN and MPC824x support
On 12/18/2013 01:50 PM, Tom Rini wrote: > On 12/18/2013 04:35 PM, York Sun wrote: >> On 11/25/2013 07:45 AM, Tom Rini wrote: >>> Hello, >>> >>> With a recent change to U-Boot (as part of merging >>> http://patchwork.ozlabs.org/patch/293612/), we need cache support >>> for MPC824x, for the linkstation_HGLAN board to continue >>> building, as the network driver is now cache aware. >>> >>> Alternatively, if there is no interest in maintaining the >>> platform upstream anymore, we can remove it. Thanks! >>> > >> Tom, > >> Did you hear objection? I think we should remove support for this >> board. We'd better do it before next release. > > I would say this is "last call" for a patch now, yes. > Tom, Are you going to remove this platform, or waiting for someone to submit a patch to do so? Does removing this platform mean totally remove the code, or only modify boards.cfg to disable the build? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] linkstation_HGLAN and MPC824x support
Dear York, In message <52c5fea1.7040...@freescale.com> you wrote: > > Are you going to remove this platform, or waiting for someone to submit a > patch > to do so? Does removing this platform mean totally remove the code, or only > modify boards.cfg to disable the build? We don't leave dead code behind - removal will nclude all related board code. Actually I still vote to remove all MPC82xx code; it's totally dead. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de While most peoples' opinions change, the conviction of their correct- ness never does. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] usb: exynos5: arndale: Add network support
On Thursday, January 02, 2014 at 10:41:59 AM, Inderpal Singh wrote:
> Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
> controller, connected to HSIC Phy of USB host controller via USB3503 hub.
>
> This patch implements a board specific board_usb_init function in ehci
> driver to perform reset sequence for USB3503 hub and enables the relevant
> config options for network to work.
>
> Signed-off-by: Inderpal Singh
> Signed-off-by: Chander Kashyap
> ---
> board/samsung/arndale/arndale.c | 13 +
> drivers/usb/host/ehci-exynos.c | 10 ++
> include/configs/arndale.h |4
> 3 files changed, 27 insertions(+)
>
> diff --git a/board/samsung/arndale/arndale.c
> b/board/samsung/arndale/arndale.c index 052fecd..deca348 100644
> --- a/board/samsung/arndale/arndale.c
> +++ b/board/samsung/arndale/arndale.c
> @@ -7,10 +7,23 @@
> #include
> #include
> #include
> +#include
> #include
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +#ifdef CONFIG_USB_EHCI_EXYNOS
> +void exynos_board_usb_init(int value)
> +{
> + struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *)
> + samsung_get_base_gpio_part1();
> +
> + /* Configure gpios for usb 3503 hub's reset and connect */
> + s5p_gpio_direction_output(&gpio->x3, 5, value);
> + s5p_gpio_direction_output(&gpio->d1, 7, value);
> +}
> +#endif
> +
> int board_init(void)
> {
> gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
> diff --git a/drivers/usb/host/ehci-exynos.c
> b/drivers/usb/host/ehci-exynos.c index 88e6466..4be6a60 100644
> --- a/drivers/usb/host/ehci-exynos.c
> +++ b/drivers/usb/host/ehci-exynos.c
> @@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
> set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
> }
>
> +inline void __exynos_board_usb_init(int value)
> +{
> +}
> +void exynos_board_usb_init(int)
> + __attribute__((weak, alias("__exynos_board_usb_init")));
> +
Sorry, this is not happening. Why can you not use the existing board_usb_init()
and instead have to invent new stuff ?
[..]
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Re: [U-Boot] [PATCH v2 1/2] usb: ehci: exynos: set/reset hsic phys
On Thursday, January 02, 2014 at 10:41:58 AM, Inderpal Singh wrote: > From: Inderpal Singh > > The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 > are for HSIC phys. The usb 2.0 phy is already being setup. This patch > sets up the hsic phys. > > Signed-off-by: Inderpal Singh > --- > arch/arm/include/asm/arch-exynos/ehci.h | 14 +++ > drivers/usb/host/ehci-exynos.c | 39 > +++ 2 files changed, 53 insertions(+) > Is it OK to set all the ports up unconditionally ? I am not sure about exynos of course, but is it possible there are some machines which don't use the HSIC ports and this would have some kind of adverse effects on those? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Are mmc open/close subcommands needed?
On Thursday, January 02, 2014 at 05:53:00 PM, Hector Palacios wrote: > Hi, > > I saw commit 2a91c9134675140853577b565210458b5774e6cf that introduces mmc > subcommands 'open' and 'close' to access eMMC boot partitions and was > wondering if they are really needed. Can't the same be achieved with > already existing 'mmc dev [dev] [part]' command? > > mmc open > is the same as > mmc dev > where is the boot partition > > mmc close > is the same as > mmc dev 0 > as a 0 will switch to partition 0 (user data). > > Best regards, > -- > Hector Palacios +CC Panto Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 2/6] power: Explicitly select pmic device's bus
On 03/01/14 08:37, Leela Krishna Amudala wrote:
> Hi Minkyu Kang,
>
> On Thu, Dec 5, 2013 at 2:50 PM, Minkyu Kang wrote:
>> Dear Leela Krishna Amudala,
>>
>> On 12/11/13 19:04, Leela Krishna Amudala wrote:
>>> The current pmic i2c code assumes the current i2c bus is
>>> the same as the pmic device's bus. There is nothing ensuring
>>> that to be true. Therefore, select the proper bus before performing
>>> a transaction.
>>>
>>> Signed-off-by: Aaron Durbin
>>> Signed-off-by: Simon Glass
>>> Signed-off-by: Leela Krishna Amudala
>>> Reviewed-by: Doug Anderson
>>> Acked-by: Simon Glass
>>> ---
>>> drivers/power/power_i2c.c | 62
>>> +
>>> 1 file changed, 57 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c
>>> index ac76870..3cafa4d 100644
>>> --- a/drivers/power/power_i2c.c
>>> +++ b/drivers/power/power_i2c.c
>>> @@ -16,9 +16,45 @@
>>> #include
>>> #include
>>>
>>> +static int pmic_select(struct pmic *p)
>>> +{
>>> + int ret, old_bus;
>>
>> I think, old prefix is meaningless.
>> please fix it globally.
>>
>
> I think, it is necessary to differentiate with the current bus.
> Please see my below commets for clear picture.
there's no current bus variable.
also, we knew that p->bus is current bus.
>
>>> +
>>> + old_bus = i2c_get_bus_num();
>>> + if (old_bus != p->bus) {
>>
>> How about return immediately if get a bus.
>>
>> if (old_bus == p->bus)
>> return old_bus;
>>
>
> The current code is also doing the same but in other way.
> If old_bus != p->bus then set the new bus otherwise no code to execute
> and return old_bus.
> This is same as what you suggested.
I know.
I'm talking about code quality.
please think, which one is better.
>
>>> + debug("%s: Select bus %d\n", __func__, p->bus);
>>> + ret = i2c_set_bus_num(p->bus);
>>> + if (ret) {
>>> + debug("%s: Cannot select pmic %s, err %d\n",
>>> + __func__, p->name, ret);
>>> + return -1;
>>> + }
>>> + }
>>> +
>>> + return old_bus;
>>> +}
>>> +
>>> +static int pmic_deselect(int old_bus)
>>
>> in your patch, you never check a return value.
>> then is it void function or wrong usage?
>>
>
> Okay, I'll change the function return type.
>
>> And I think pmic_deselect function is almost same with pmic_select.
>> If you change the parameter for pmic_select to "int bus" then,
>> What is different with pmic_select?
>>
>> for example.
>>
>> bus = pmic_select(p->bus);
>> /* do something */
>> pmic_deselect(bus);
>>
>> is same with.
>>
>> bus = pmic_select(p->bus);
>> /* do something */
>> pmic_select(bus);
>>
>> How do you think?
>>
>
> Yes, pmic_deselect is almost same as pmic_select but there is a minor
> difference.
>
> pmic_select() is used to set new bus and this function returns the old
> bus number. we will hold this old_bus number and once we are done with
> our work we have to restore the old_bus so we are passing old_bus to
> pmic_deselect()
>
> Now, pmic_deselect() takes old_bus as argument and trying to set it.
> This function won't return any bus number.
>
> Hope this explanation helps.
I know.
the focus is that almost codes were duplicated.
My suggestion is one of example for reducing code duplication.
Please think about it.
>
>>> +{
>>> + int ret;
>>> +
>>> + if (old_bus != i2c_get_bus_num()) {
>>> + ret = i2c_set_bus_num(old_bus);
>>> + debug("%s: Select bus %d\n", __func__, old_bus);
>>> + if (ret) {
>>> + debug("%s: Cannot restore i2c bus, err %d\n",
>>> + __func__, ret);
>>> + return -1;
>>> + }
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
>>> {
>>> unsigned char buf[4] = { 0 };
>>> + int ret, old_bus;
>>>
>>> if (check_reg(p, reg))
>>> return -1;
>>> @@ -52,23 +88,33 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
>>> return -1;
>>> }
>>>
>>> - if (i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
>>> + old_bus = pmic_select(p);
>>> + if (old_bus < 0)
>>> return -1;
>>>
>>> - return 0;
>>> + ret = i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
>>> + pmic_deselect(old_bus);
>>
>> please add blank line.
>>
>
> Okay, will do it.
>
>>> + return ret;
>>> }
>>>
>>> int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
>>> {
>>> unsigned char buf[4] = { 0 };
>>> u32 ret_val = 0;
>>> + int ret, old_bus;
>>>
>>> if (check_reg(p, reg))
>>> return -1;
>>>
>>> - if (i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num))
>>> + old_bus = pmic_select(p);
>>> + if (old_bus < 0)
>>> return -1;
>>>
>>> + ret = i2c_read(pmic_i2c_addr, reg, 1,
Re: [U-Boot] [PATCH v2 1/2] usb: ehci: exynos: set/reset hsic phys
Hi Marek, Thanks for the review. On 3 January 2014 06:24, Marek Vasut wrote: > On Thursday, January 02, 2014 at 10:41:58 AM, Inderpal Singh wrote: > > From: Inderpal Singh > > > > The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 > > are for HSIC phys. The usb 2.0 phy is already being setup. This patch > > sets up the hsic phys. > > > > Signed-off-by: Inderpal Singh > > --- > > arch/arm/include/asm/arch-exynos/ehci.h | 14 +++ > > drivers/usb/host/ehci-exynos.c | 39 > > +++ 2 files changed, 53 insertions(+) > > > > Is it OK to set all the ports up unconditionally ? I am not sure about > exynos of > course, but is it possible there are some machines which don't use the HSIC > ports and this would have some kind of adverse effects on those? > > I feel it should not cause any side effect as it wont interfere with the normal USB 2.0 phy port. Also, its being done along the same lines as kernel driver at drivers/usb/phy/phy-samsung-usb2.c, which also sets up all ports unconditionally. Regards, Inder > Best regards, > Marek Vasut > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] usb: exynos5: arndale: Add network support
Hi Marek,
Thanks for review.
On 3 January 2014 06:26, Marek Vasut wrote:
> On Thursday, January 02, 2014 at 10:41:59 AM, Inderpal Singh wrote:
> > Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
> > controller, connected to HSIC Phy of USB host controller via USB3503 hub.
> >
> > This patch implements a board specific board_usb_init function in ehci
> > driver to perform reset sequence for USB3503 hub and enables the relevant
> > config options for network to work.
> >
> > Signed-off-by: Inderpal Singh
> > Signed-off-by: Chander Kashyap
> > ---
> > board/samsung/arndale/arndale.c | 13 +
> > drivers/usb/host/ehci-exynos.c | 10 ++
> > include/configs/arndale.h |4
> > 3 files changed, 27 insertions(+)
> >
> > diff --git a/board/samsung/arndale/arndale.c
> > b/board/samsung/arndale/arndale.c index 052fecd..deca348 100644
> > --- a/board/samsung/arndale/arndale.c
> > +++ b/board/samsung/arndale/arndale.c
> > @@ -7,10 +7,23 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> >
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > +#ifdef CONFIG_USB_EHCI_EXYNOS
> > +void exynos_board_usb_init(int value)
> > +{
> > + struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *)
> > +
> samsung_get_base_gpio_part1();
> > +
> > + /* Configure gpios for usb 3503 hub's reset and connect */
> > + s5p_gpio_direction_output(&gpio->x3, 5, value);
> > + s5p_gpio_direction_output(&gpio->d1, 7, value);
> > +}
> > +#endif
> > +
> > int board_init(void)
> > {
> > gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
> > diff --git a/drivers/usb/host/ehci-exynos.c
> > b/drivers/usb/host/ehci-exynos.c index 88e6466..4be6a60 100644
> > --- a/drivers/usb/host/ehci-exynos.c
> > +++ b/drivers/usb/host/ehci-exynos.c
> > @@ -175,6 +175,12 @@ static void reset_usb_phy(struct exynos_usb_phy
> *usb)
> > set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE);
> > }
> >
> > +inline void __exynos_board_usb_init(int value)
> > +{
> > +}
> > +void exynos_board_usb_init(int)
> > + __attribute__((weak, alias("__exynos_board_usb_init")));
> > +
>
> Sorry, this is not happening. Why can you not use the existing
> board_usb_init()
> and instead have to invent new stuff ?
>
I did not use board_usb_init because it has 2 parameters which may not be
used as described in usb.h for my use case, which is to only configure
gpios for reset and connect of usb 3503 hub.
Let me know if you still feel that board_usb_init should be used. In that
case I will have to utilize index parameter in my own way.
Regards,
Inder
>
> [..]
>
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[U-Boot] please pull u-boot-samsung master
Dear Albert, The following changes since commit 2931fa4db349c97f882ffda42e901208654b5ca9: ARM: AM43xx: Add Maintainer (2013-12-18 21:14:45 -0500) are available in the git repository at: git://git.denx.de/u-boot-samsung master for you to fetch changes up to a5e15bbb42512ee5be53967019e9649816790d7e: board:trats2: fix default partitions and mmc env (2013-12-31 16:41:10 +0900) Piotr Wilczek (2): board:trats1:trats2: fix adapter number board:trats2: fix default partitions and mmc env Rajeshwari Birje (11): EXYNOS5: Create a common board file Exynos5420: Add base addresses for 5420 EXYNOS5420: Add power register structure. EXYNOS5420: Add dmc and phy_control register structure Exynos5420: Add clock initialization for 5420 Exynos5420: Add DDR3 initialization for 5420 Exynos5420: Add support for 5420 in pinmux and gpio Exynos5420: Add base patch for SMDK5420 DTS: Add dts support for SMDK5420 Config: Add initial config for SMDK5420 SPL: EXYNOS: Prepare for variable size SPL support arch/arm/cpu/armv7/exynos/clock.c | 279 +++- arch/arm/cpu/armv7/exynos/clock_init.h | 17 + arch/arm/cpu/armv7/exynos/clock_init_exynos5.c | 352 +- arch/arm/cpu/armv7/exynos/dmc_common.c | 60 +- arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c | 439 - arch/arm/cpu/armv7/exynos/exynos5_setup.h | 764 +++-- arch/arm/cpu/armv7/exynos/pinmux.c | 260 +++- arch/arm/dts/exynos5.dtsi | 198 ++ arch/arm/dts/exynos5250.dtsi | 194 +- arch/arm/dts/exynos5420.dtsi | 70 ++ arch/arm/include/asm/arch-exynos/board.h | 17 + arch/arm/include/asm/arch-exynos/clk.h |1 + arch/arm/include/asm/arch-exynos/clock.h | 494 ++ arch/arm/include/asm/arch-exynos/cpu.h | 52 +- arch/arm/include/asm/arch-exynos/dmc.h | 177 + arch/arm/include/asm/arch-exynos/gpio.h| 143 +++- arch/arm/include/asm/arch-exynos/periph.h |3 + arch/arm/include/asm/arch-exynos/power.h | 837 board/samsung/common/Makefile |4 + board/samsung/common/board.c | 411 board/samsung/dts/exynos5420-smdk5420.dts | 169 + board/samsung/smdk5250/exynos5-dt.c| 350 +- board/samsung/smdk5250/smdk5250.c | 182 +- board/samsung/smdk5420/Makefile| 11 + board/samsung/smdk5420/smdk5420.c | 159 + board/samsung/smdk5420/smdk5420_spl.c | 52 ++ board/samsung/trats/trats.c|2 +- board/samsung/trats2/trats2.c |6 +- boards.cfg |1 + include/configs/arndale.h |1 + include/configs/exynos5-dt.h | 290 include/configs/exynos5250-dt.h| 284 +--- include/configs/smdk5420.h | 56 ++ include/configs/trats2.h |3 +- spl/Makefile |7 +- tools/Makefile |3 +- tools/mkexynosspl.c| 167 +++-- 37 files changed, 5196 insertions(+), 1319 deletions(-) create mode 100644 arch/arm/dts/exynos5.dtsi create mode 100644 arch/arm/dts/exynos5420.dtsi create mode 100644 arch/arm/include/asm/arch-exynos/board.h create mode 100644 board/samsung/common/board.c create mode 100644 board/samsung/dts/exynos5420-smdk5420.dts create mode 100644 board/samsung/smdk5420/Makefile create mode 100644 board/samsung/smdk5420/smdk5420.c create mode 100644 board/samsung/smdk5420/smdk5420_spl.c create mode 100644 include/configs/exynos5-dt.h create mode 100644 include/configs/smdk5420.h -- Happy New Year! Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH][v3] powerpc/t1040qds: Update DDR initialization related settings
Update following DDR related settings for T1040QDS
-Correct number of chip selects to two as t1040qds supports
two Chip selects.
-Update board_specific_parameters udimm structure with settings
derived via calibration.
-Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
read at 400KHz.
Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and
1600MT/s.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Priyanka Jain
---
Changes for v3:
Updated description based on York's comments.
Changes for v2:
Reduced I2C speed to 50KHz.
board/freescale/t1040qds/ddr.h | 22 --
include/configs/T1040QDS.h |6 +++---
2 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/board/freescale/t1040qds/ddr.h b/board/freescale/t1040qds/ddr.h
index 8ee206e..afa72af 100644
--- a/board/freescale/t1040qds/ddr.h
+++ b/board/freescale/t1040qds/ddr.h
@@ -31,16 +31,18 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T
* ranks| mhz| GB |adjst| start | ctl2| ctl3 | |delay |
*/
- {2, 1350, 4, 4, 8, 0x0809090b, 0x0c0c0d0a, 0xff,2, 0},
- {2, 1350, 0, 5, 7, 0x0709090b, 0x0c0c0d09, 0xff,2, 0},
- {2, 1666, 4, 4, 8, 0x080a0a0d, 0x0d10100b, 0xff,2, 0},
- {2, 1666, 0, 5, 7, 0x080a0a0c, 0x0d0d0e0a, 0xff,2, 0},
- {2, 1900, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff,2, 0},
- {2, 2140, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff,2, 0},
- {1, 1350, 0, 5, 8, 0x0809090b, 0x0c0c0d0a, 0xff,2, 0},
- {1, 1700, 0, 5, 8, 0x080a0a0c, 0x0c0d0e0a, 0xff,2, 0},
- {1, 1900, 0, 4, 8, 0x080a0a0c, 0x0e0e0f0a, 0xff,2, 0},
- {1, 2140, 0, 4, 8, 0x090a0b0c, 0x0e0f100b, 0xff,2, 0},
+ {2, 833, 4, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
+ {2, 833, 0, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
+ {2, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
+ {2, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
+ {2, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
+ {1, 833, 4, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
+ {1, 833, 0, 4, 6, 0x06060607, 0x08080807, 0xff,2, 0},
+ {1, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
+ {1, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09, 0xff,2, 0},
+ {1, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
+ {1, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A, 0xff,2, 0},
{}
};
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 43a5778..484b237 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -167,7 +167,7 @@ unsigned long get_board_ddr_clk(void);
/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
-#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
+#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_FSL_DDR3
@@ -413,9 +413,9 @@ unsigned long get_board_ddr_clk(void);
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
-#define CONFIG_SYS_FSL_I2C_SPEED 40 /* I2C speed in Hz */
+#define CONFIG_SYS_FSL_I2C_SPEED 5 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SPEED 40 /* I2C speed in Hz */
+#define CONFIG_SYS_FSL_I2C2_SPEED 5 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000
--
1.7.4.1
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[U-Boot] [PATCH] powerpc/t208x: enable erratum a006379 for t208x
Erratum A006379 applies to T2080/T2081 also.
Signed-off-by: Shengzhou Liu
---
arch/powerpc/include/asm/fsl_errata.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/fsl_errata.h
b/arch/powerpc/include/asm/fsl_errata.h
index 8af6751..671296a 100644
--- a/arch/powerpc/include/asm/fsl_errata.h
+++ b/arch/powerpc/include/asm/fsl_errata.h
@@ -29,7 +29,9 @@ static inline bool has_erratum_a006379(void)
{
u32 svr = get_svr();
if (((SVR_SOC_VER(svr) == SVR_T4240) && SVR_MAJ(svr) <= 1) ||
- ((SVR_SOC_VER(svr) == SVR_B4860) && SVR_MAJ(svr) <= 2))
+ ((SVR_SOC_VER(svr) == SVR_B4860) && SVR_MAJ(svr) <= 2) ||
+ ((SVR_SOC_VER(svr) == SVR_T2080) && SVR_MAJ(svr) <= 1) ||
+ ((SVR_SOC_VER(svr) == SVR_T2081) && SVR_MAJ(svr) <= 1))
return true;
return false;
--
1.8.0
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[U-Boot] [PATCH v2] powerpc/t2080qds: some update for t2080qds
- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.
Signed-off-by: Shengzhou Liu
---
v2: update to support more serdes, applied in Gerrit sdk.
board/freescale/t2080qds/eth_t2080qds.c | 12 --
board/freescale/t2080qds/t2080qds.c | 66 ++---
drivers/net/fm/t2080.c | 10 +++--
3 files changed, 75 insertions(+), 13 deletions(-)
diff --git a/board/freescale/t2080qds/eth_t2080qds.c
b/board/freescale/t2080qds/eth_t2080qds.c
index 9a909db..68d74c3 100644
--- a/board/freescale/t2080qds/eth_t2080qds.c
+++ b/board/freescale/t2080qds/eth_t2080qds.c
@@ -372,9 +372,11 @@ int board_eth_init(bd_t *bis)
break;
case 0x6c:
case 0x6d:
+ fm_info_set_phy_address(FM1_10GEC1, 4);
+ fm_info_set_phy_address(FM1_10GEC2, 5);
/* SGMII in Slot3 */
fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
- fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
break;
case 0x71:
/* SGMII in Slot3 */
@@ -419,7 +421,6 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT2_PHY_ADDR);
break;
default:
- puts("Invalid SerDes1 protocol for T2080QDS\n");
break;
}
@@ -449,7 +450,12 @@ int board_eth_init(bd_t *bis)
fm_info_set_mdio(i, mii_dev_for_muxval(
mdio_mux[i]));
break;
- };
+ case 3:
+ mdio_mux[i] = EMI1_SLOT3;
+ fm_info_set_mdio(i, mii_dev_for_muxval(
+ mdio_mux[i]));
+ break;
+ }
break;
case PHY_INTERFACE_MODE_RGMII:
if (i == FM1_DTSEC3)
diff --git a/board/freescale/t2080qds/t2080qds.c
b/board/freescale/t2080qds/t2080qds.c
index cac32fe..4fe8ccb 100644
--- a/board/freescale/t2080qds/t2080qds.c
+++ b/board/freescale/t2080qds/t2080qds.c
@@ -40,6 +40,11 @@ int checkboard(void)
printf("Sys ID: 0x%02x, Board Arch: V%d, ", QIXIS_READ(id), sw >> 4);
printf("Board Version: %c, boot from ", (sw & 0xf) + 'A' - 1);
+#ifdef CONFIG_SDCARD
+ puts("SD/MMC\n");
+#elif CONFIG_SPIFLASH
+ puts("SPI\n");
+#else
sw = QIXIS_READ(brdcfg[0]);
sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
@@ -51,6 +56,7 @@ int checkboard(void)
puts("NAND\n");
else
printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
+#endif
printf("FPGA: v%d (%s), build %d", (int)QIXIS_READ(scver),
qixis_read_tag(buf), (int)qixis_read_minor());
@@ -97,13 +103,25 @@ int brd_mux_lane_to_slot(void)
/* SerDes1 is not enabled */
break;
case 0x1c:
- case 0x95:
case 0xa2:
- case 0x94:
/* SD1(A:D) => SLOT3 SGMII
* SD1(G:H) => SLOT1 SGMII
*/
- QIXIS_WRITE(brdcfg[12], 0x58);
+ QIXIS_WRITE(brdcfg[12], 0x1a);
+ break;
+ case 0x94:
+ case 0x95:
+ /* SD1(A:B) => SLOT3 SGMII@1.25bps
+* SD1(C:D) => SFP Module, SGMII@3.125bps
+* SD1(E:H) => SLOT1 SGMII@1.25bps
+*/
+ case 0x96:
+ /* SD1(A:B) => SLOT3 SGMII@1.25bps
+* SD1(C) => SFP Module, SGMII@3.125bps
+* SD1(D) => SFP Module, SGMII@1.25bps
+* SD1(E:H) => SLOT1 PCIe4 x4
+*/
+ QIXIS_WRITE(brdcfg[12], 0x3a);
break;
case 0x51:
/* SD1(A:D) => SLOT3 XAUI
@@ -134,6 +152,34 @@ int brd_mux_lane_to_slot(void)
*/
QIXIS_WRITE(brdcfg[12], 0xda);
break;
+ case 0x6e:
+ /* SD1(A:B) => SFP Module, XFI
+* SD1(C:D) => SLOT3 SGMII
+* SD1(E:F) => SLOT1 PCIe4 x2
+* SD1(G:H) => SLOT2 SGMII
+*/
+ QIXIS_WRITE(brdcfg[12], 0xd9);
+ break;
+ case 0xda:
+ /* SD1(A:H) => SLOT3 PCIe3 x8
+*/
+QIXIS_WRITE(brdcfg[12], 0x0);
+break;
+ case 0xc8:
+ /* SD1(A) => SLOT3 PCIe3 x1
+* SD1(B) => SFP Module, SGMII@1.25bps
+* SD1(C:D) => SFP Module, SGMII@3.125bps
+* SD1(E:F) => SLOT1 PCIe4 x2
+* SD1(
