Re: [U-Boot] [PATCH] mx53loco: Fix PMIC name

[Stefano Babic]

On 11/12/2012 17:36, Fabio Estevam wrote:
> commit c73368150 (pmic: Extend PMIC framework to support multiple instances 
> of PMIC devices) has incorrectly passed the PMIC name under the FSL PMIC case.
> 
> Fix that by passing "FSL_PMIC" as the parameter of pmic_get.
> 
> Signed-off-by: Fabio Estevam 
> ---
>  board/freescale/mx53loco/mx53loco.c |2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/freescale/mx53loco/mx53loco.c 
> b/board/freescale/mx53loco/mx53loco.c
> index 81c511c..2c8cb7a 100644
> --- a/board/freescale/mx53loco/mx53loco.c
> +++ b/board/freescale/mx53loco/mx53loco.c
> @@ -374,7 +374,7 @@ static int power_init(void)
>   if (retval)
>   return retval;
>  
> - p = pmic_get("DIALOG_PMIC");
> + p = pmic_get("FSL_PMIC");
>   if (!p)
>   return -ENODEV;
>  
> 

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH] mx25pdk: Allow booting a device tree kernel

[Stefano Babic]

On 11/12/2012 22:48, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> Select CONFIG_OF_LIBFDT so that a device tree kernel can be launched.
> 
> Signed-off-by: Fabio Estevam 
> ---
>  include/configs/mx25pdk.h |1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
> index bbb3161..c10e78b 100644
> --- a/include/configs/mx25pdk.h
> +++ b/include/configs/mx25pdk.h
> @@ -87,6 +87,7 @@
>  
>  /* U-Boot commands */
>  #include 
> +#define CONFIG_OF_LIBFDT
>  #define CONFIG_CMD_BOOTZ
>  #define CONFIG_CMD_CACHE
>  #define CONFIG_CMD_MMC
> 

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH 3/4] EXYNOS4: Add support for Exynos4x12 SoCs

[Chander Kashyap]

Dear Kim,

On 13 December 2012 13:51, 김정현  wrote:
> Dear Chander,
>
> 2012년 12월 13일 15:19, Chander Kashyap 쓴 글:
>
> On 13 December 2012 11:49, Chander Kashyap 
> wrote:
>
> Dear Kim,
>
> On 12 December 2012 13:24, Jeong Hyeon Kim  wrote:
>
> From: Jeong-Hyeon Kim 
>
> This patch adds the support for Exynos4212/4412.
>
> Samsung's ARM Cortex-A9 based Exynos4x12 SoCs and Exynos4210 are similar.
> Address of a few registers are different in CMU part like MPLL.
>
> Signed-off-by: Jeong-Hyeon Kim 
> ---
>  arch/arm/cpu/armv7/exynos/clock.c|7 +-
>  arch/arm/include/asm/arch-exynos/clock.h |  240
> ++
>  arch/arm/include/asm/arch-exynos/cpu.h   |1 +
>  3 files changed, 247 insertions(+), 1 deletion(-)
>
> As i discussed with you these changes has been already posted.
> http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/148856
> Kindly use them and resend yours patches.
>
> diff --git a/arch/arm/cpu/armv7/exynos/clock.c
> b/arch/arm/cpu/armv7/exynos/clock.c
> index fe61f88..47e2e6c 100644
> --- a/arch/arm/cpu/armv7/exynos/clock.c
> +++ b/arch/arm/cpu/armv7/exynos/clock.c
>
> Please have a look patch at the link.
> [PATCH] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
>
> http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/143640
>
> I applied it and your resend patches at 7, Dec. to latest u-boot-samsung
> tree.
> http://patchwork.ozlabs.org/patch/204445/
>
> It made compile error as below.
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
> function 'samsung_get_base_i2s':
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208:
> error: 'EXYNOS4X12_I2S_BASE' undeclared (first use in this function)
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208:
> error: (Each undeclared identifier is reported only once
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208:
> error: for each function it appears in.)
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
> function 'samsung_get_base_spi':
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:226:
> error: 'EXYNOS4X12_SPI_BASE' undeclared (first use in this function)
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
> function 'samsung_get_base_spi_isp':
> /workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:227:
> error: 'EXYNOS4X12_SPI_ISP_BASE' undeclared (first use in this function)
You need apply my patches. Then add these base addresses in cpu.h and
create a patch. Then add yours board specific patches.
>
> Please resend patches after fix it.
>
>
>
> @@ -94,7 +94,12 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
> r = readl(&clk->apll_con0);
> break;
> case MPLL:
> -   r = readl(&clk->mpll_con0);
> +   if (proid_is_exynos4412()) {
> +   struct exynos4412_clock *clk4412 =
> +   (struct exynos4412_clock
> *)samsung_get_base_clock();
> +   r = readl(&clk4412->mpll_con0);
> +   } else
> +   r = readl(&clk->mpll_con0);
> break;
> case EPLL:
> r = readl(&clk->epll_con0);
> diff --git a/arch/arm/include/asm/arch-exynos/clock.h
> b/arch/arm/include/asm/arch-exynos/clock.h
> index ff6781a..5d4ed5c 100644
> --- a/arch/arm/include/asm/arch-exynos/clock.h
> +++ b/arch/arm/include/asm/arch-exynos/clock.h
> @@ -251,6 +251,246 @@ struct exynos4_clock {
> unsigned intdiv_iem_l1;
>  };
>
> +struct exynos4412_clock {
> +   unsigned char   res1[0x4200];
> +   unsigned intsrc_leftbus;
> +   unsigned char   res2[0x1fc];
> +   unsigned intmux_stat_leftbus;
> +   unsigned char   res3[0xfc];
> +   unsigned intdiv_leftbus;
> +   unsigned char   res4[0xfc];
> +   unsigned intdiv_stat_leftbus;
> +   unsigned char   res5[0x1fc];
> +   unsigned intgate_ip_leftbus;
> +   unsigned char   res6[0x12c];
> +   unsigned intgate_ip_image;
> +   unsigned char   res7[0xcc];
> +   unsigned intclkout_cmu_leftbus;
> +   unsigned intclkout_cmu_leftbus_div_stat;
> +   unsigned char   res8[0x37f8];
> +   unsigned intsrc_rightbus;
> +   unsigned char   res9[0x1fc];
> +   unsigned intmux_stat_rightbus;
> +   unsigned char   res10[0xfc];
> +   unsigned intdiv_rightbus;
> +   unsigned char   res11[0xfc];
> +   unsigned intdiv_stat_rightbus;
> +   unsigned char   res12[0x1fc];
> +   unsigned intgate_ip_rightbus;
> +   unsigned char   res13[0x15c];
> +   unsigned intgate_ip_perir;
> +   unsigned char   res14[0x9c];
> +   unsigned intclkout_cmu_rightbus;
> +   unsigned intclkout_cmu_rightbus_div_stat;
> +   unsigned char   res15[0x3608];
> +   unsigned intepll_l

Re: [U-Boot] [PATCH 4/8] Add a poll function to monitor events

[Wolfgang Denk]

Dear Simon Glass,

In message  
you wrote:
> 
> > I mean, what good is such protection when a simple "while : ; do : ;
> > done" will just toast your box?
> 
> Well it will force a hard power off - the hardware has a hard limit at
> which it will power off. Don't do that! The more common case is the
> user sitting at a prompt doing nothing, and that's the case which
> prompted this patch I think.

Let me summarize the facts and arguments as far as I understand these
so far:

- There is built-in hardware protection; if we don't apply this patch,
  nothing gets broken, but the system will power off when overheating.

- The normal mode of operation s to boot an OS as quickly as possible,
  without any user interaction, so this patch is not needed, nor would
  the code be used at all.

- In the few cases where we don't boot an OS quickly, we assume that
  the only long-running activity that needs protection is waiting for
  user input.

- If we spend too much time in U-Boot and te system overheats, then we
  power it down.


I have these comments:

* The assumption, that only waiting for keyboard input is a critical
  operation, is obviously broken.

* If we just power down, we can as well use the hardware-triggered
  power down; the effect would be the same?

I can only repeat myself:
- what would be needed here is an asynchronous (periodic) service
- hooking this onto keyboard activity is broken by design
- we don't have any other generic mechanism to implement such a
  feature yet.

> > Sorry, but keyboard activity has _nothing_ to do ith it and is the
> > totally wrong place to attach such functionality to.
> 
> Can you suggest an alternative place which gives us an indicator of
> user activity?

Please stop thinking about user activity.  It has _nothing_ to do with
it.  What you are looking for is a time triggered service - you want
to make sure to run your temperature control code at least every N
milliseconds.

> So long as it had some fail safe power off when things get hot it is
> ok. But we need to try to avoid getting into that condition. Running
> flat out at 1.7GHz waiting for keyboard input that may never come is
> not good design.

Why are we running at such a high clock anyway in U-Boot?  Most
activities in U-Boot are limited by I/O troughput and/or memory
bandwidth.  There are very few exceptions: uncompressing and
checksumming an OS image when boting it are such; at the moment I
cannot think of any other that might be significant in the sense that
they would play any role for boot times in the majority of use cases
(just booting an OS).

So why not simply run U-Boot at a much lower clock?  Has anybody
measured how many milliseconds of boot time that would cost?

And, if needed, you could still rev up the clock rate when actually
running the bootm code where speed actually plays a role...


> Actually I was happy enough with a simple patch to indicate idle in
> the console code :-)

I fail to understand why you don't accept the fact that this does not
even work?

>   <1><2>  <3><4>
> this patch   idle support  co-op multitasking full-blown OS
> 
> 
> Please choose :/) I think you are saying that <1> is too much of a
> hack. Clearly <4> is not why we are here. I suggest <1>, or failing
> that, <2>. I think <3> is scary and I think there is clear daylight
> between <2> and <3>.

My vote is to none of this.

> But if you can accept that this feature is useful, how would you implement it?

I am pretty much convinced that the chosen approach is wrong, and that
we do no actually need any such feature here.

I am very sure that hooking this into console code is totally wrong,
as the heating up takes place independent of any user interaction.

I also challenge the assumption that periodic polling is needed.
I don't know the hardware inplace, but most likely it is capable of
actively signalling that overheating takes place - I guess you can
program a maximum temperatrue and it will raise an interrupt if this
is reached?  If so, temperature control should be implemented in an
event-driven way, and not using polling.

If in the end we still should find we need to implement an
asynchronous, time-triggered service, then this should be implemented
based on a periodic timer interrupt.

> > But the patch as submitted here is not even functional...
> 
> It seems to work as intended, albeit I'm sure there are flaws.

It works only as long as you do not anything which cases  U-Boot to
run for too long before returning to the console - and run time is
totally out of your control.  In other words: it is just good for a
demo and to collect brownie points from some bosses.  Would you drive
a car where the operation of the safety belt was similarly reliable?

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Wolfgang Denk]

Dear Stephen Warren,

In message <1355354590-10023-1-git-send-email-swar...@wwwdotorg.org> you wrote:
> From: Stephen Warren 
> 
> A single U-Boot binary may support multiple very similar boards. These
> boards may use different UARTs for the main debug console. Hence, it is
> impossible to #define CONFIG_SYS_NS16550_COM1 to some static UART
> address, since the true value may only be determined at run-time, after
> identifying the actual hardware. Provide an API for boards to call to
> set the actual address of the UART, e.g. from spl_board_init() or
> board_early_init_f().
> 
> Signed-off-by: Stephen Warren 

As is, this is just adding dead code.

Where would the device addresses come from - out of the device tree?

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Wolfgang Denk]

Dear Stephen Warren,

In message <50c918a5.6090...@wwwdotorg.org> you wrote:
>
> > This seems reasonable in the interim while we are hard-coding things
> > but needing more flexibility. How do you plan to configure the actual
> > address - is it with the ODM data or FDT?
> 
> I intend to use the ODMDATA. This already includes a field that
> specifies which UART to use. I'm working on some patches (to
> BCT-generation tools and U-Boot) that define an ODMDATA2 value, which
> will indicate the complete pinmux configuration required for the UART,
> so everything can be self-contained. I'm fairly close to publishing
> these patches.

Arghh... Do we really, really have to invent yet another way to pass
hardware configuration information?  Especially one totally
incompatible to any other system?

I think I will be objecting against such an approach.  Please use the
device tree instead.

Best regards,

Wolfgang Denk

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Re: [U-Boot] Using U-Boot in a mixed licensed environment

[Wolfgang Denk]

Dear Stephen Baker,

In message  
you wrote:
> 
> Option 1:
> Expand the jump table to include IO functions for networking and
> flash/drive access.  Would expanding the jump table functionality mean
> that the COPYING statement be invalid since the jump table support has
> expand beyond the original scope and thus fall under GPL v2?

The jump table is restricted on purpose.  If you extend it, your
standalone code will have to be released under GPL.

> Option 2:
> Use the api interface (api_public.h) with my application linked into
> U-Boot.  The api_public.h terms are BSD or GPL v2, by using BSD
> license it removes the GPL v2 from this header file and interface.
> However since the COPYING file does not list the API interface as an
> exemption; not falling under the heading of a derived work.  I suspect
> that using the API interface and linking the standalone code with
> U-Boot would cause all of the code to fall under GPL v2.  Is this a
> correct assumption?

IIUC the intention of the API was to allow for closed source
implementations, but I am not a lawyer and I don't know if this
actually works this way.  You probably should get legal advice on
that.

> Option 3:
> Have U-Boot read the application image from flash into memory then
> jump to the code.  This would follow the same logic as boot linux or
> any other image.  Just load and jump into the new code.  The
> application would not leverage any U-Boot code.  The Network and Flash
> support would have to be added to the application using BSD or other
> non-GPL code.  This seems to be the best way to avoid the GPL v2
> issue; unless one of the other options proves valid.

This is indeed a possible approach.

But you forget option 4: just release your code under GPL.

Best regards,

Wolfgang Denk

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[U-Boot] [PATCH v3] imls: Add support to list images in NAND device

[Vipin Kumar]

This patch adds support to list images in NAND flash through imls

Signed-off-by: Vipin Kumar 
---
 README |   3 +-
 common/cmd_bootm.c | 166 -
 2 files changed, 167 insertions(+), 2 deletions(-)

diff --git a/README b/README
index 2077c3b..46fd21d 100644
--- a/README
+++ b/README
@@ -831,7 +831,8 @@ The following options need to be configured:
CONFIG_CMD_I2C  * I2C serial bus support
CONFIG_CMD_IDE  * IDE harddisk support
CONFIG_CMD_IMIiminfo
-   CONFIG_CMD_IMLS   List all found images
+   CONFIG_CMD_IMLS   List all images found in NOR flash
+   CONFIG_CMD_IMLS_NAND  List all images found in NAND flash
CONFIG_CMD_IMMAP* IMMR dump support
CONFIG_CMD_IMPORTENV* import an environment
CONFIG_CMD_INI  * import data from an ini file into the 
env
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index d256ddf..e55becd 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -80,9 +80,15 @@ static int image_info(unsigned long addr);
 #include 
 #include 
 extern flash_info_t flash_info[]; /* info for FLASH chips */
+#endif
+
+#if defined(CONFIG_CMD_IMLS) || defined(CONFIG_CMD_IMLS_NAND)
 static int do_imls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 #endif
 
+#include 
+#include 
+
 #ifdef CONFIG_SILENT_CONSOLE
 static void fixup_silent_linux(void);
 #endif
@@ -1175,7 +1181,7 @@ U_BOOT_CMD(
 /* imls - list all images found in flash */
 /***/
 #if defined(CONFIG_CMD_IMLS)
-static int do_imls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_imls_nor(void)
 {
flash_info_t *info;
int i, j;
@@ -1224,6 +1230,164 @@ next_sector:;
}
 next_bank: ;
}
+   return 0;
+}
+#endif
+
+#if defined(CONFIG_CMD_IMLS_NAND)
+static int nand_imls_legacyimage(nand_info_t *nand, int nand_dev, loff_t off,
+   size_t len)
+{
+   void *imgdata;
+   int ret;
+
+   imgdata = malloc(len);
+   if (!imgdata) {
+   printf("May be a Legacy Image at NAND device %d" \
+  " offset %08llX:\n", nand_dev, off);
+   printf("   Low memory(cannot allocate memory for image)\n");
+   return -ENOMEM;
+   }
+
+   ret = nand_read_skip_bad(nand, off, &len,
+   imgdata);
+   if (ret < 0 && ret != -EUCLEAN) {
+   free(imgdata);
+   return ret;
+   }
+
+   if (!image_check_hcrc(imgdata)) {
+   free(imgdata);
+   return 0;
+   }
+
+   printf("Legacy Image at NAND device %d offset %08llX:\n",
+   nand_dev, off);
+   image_print_contents(imgdata);
+
+   puts("   Verifying Checksum ... ");
+   if (!image_check_dcrc(imgdata))
+   puts("Bad Data CRC\n");
+   else
+   puts("OK\n");
+
+   free(imgdata);
+
+   return 0;
+}
+
+static int nand_imls_fitimage(nand_info_t *nand, int nand_dev, loff_t off,
+   size_t len)
+{
+   void *imgdata;
+   int ret;
+
+   imgdata = malloc(len);
+   if (!imgdata) {
+   printf("May be a FIT Image at NAND device %d" \
+  " offset %08llX:\n", nand_dev, off);
+   printf("   Low memory(cannot allocate memory for image)\n");
+   return -ENOMEM;
+   }
+
+   ret = nand_read_skip_bad(nand, off, &len,
+   imgdata);
+   if (ret < 0 && ret != -EUCLEAN) {
+   free(imgdata);
+   return ret;
+   }
+
+   if (!fit_check_format(imgdata)) {
+   free(imgdata);
+   return 0;
+   }
+
+   printf("FIT Image at NAND device %d offset %08llX:\n", nand_dev, off);
+
+   fit_print_contents(imgdata);
+   free(imgdata);
+
+   return 0;
+}
+
+static int do_imls_nand(void)
+{
+   nand_info_t *nand;
+   int nand_dev = nand_curr_device;
+   size_t len;
+   loff_t off;
+   u32 buffer[16];
+
+   if (nand_dev < 0 || nand_dev >= CONFIG_SYS_MAX_NAND_DEVICE) {
+   puts("\nNo NAND devices available\n");
+   return -ENODEV;
+   }
+
+   printf("\n");
+
+   for (nand_dev = 0; nand_dev < CONFIG_SYS_MAX_NAND_DEVICE; nand_dev++) {
+   nand = &nand_info[nand_dev];
+   if (!nand->name || !nand->size)
+   continue;
+
+   for (off = 0; off < nand->size; off += nand->erasesize) {
+   const image_header_t *header;
+   int ret;
+
+   if (nand_block_isbad(nand, off))
+   continue;
+
+   len = sizeof(buf

Re: [U-Boot] [PATCH 3/4] EXYNOS4: Add support for Exynos4x12 SoCs

[김정현]

Dear Chander,

2012년 12월 13일 15:19, Chander Kashyap 쓴 글:
> On 13 December 2012 11:49, Chander Kashyap  wrote:
>> Dear Kim,
>>
>> On 12 December 2012 13:24, Jeong Hyeon Kim  wrote:
>>> From: Jeong-Hyeon Kim 
>>>
>>> This patch adds the support for Exynos4212/4412.
>>>
>>> Samsung's ARM Cortex-A9 based Exynos4x12 SoCs and Exynos4210 are similar.
>>> Address of a few registers are different in CMU part like MPLL.
>>>
>>> Signed-off-by: Jeong-Hyeon Kim 
>>> ---
>>>  arch/arm/cpu/armv7/exynos/clock.c|7 +-
>>>  arch/arm/include/asm/arch-exynos/clock.h |  240 
>>> ++
>>>  arch/arm/include/asm/arch-exynos/cpu.h   |1 +
>>>  3 files changed, 247 insertions(+), 1 deletion(-)
>>>
>> As i discussed with you these changes has been already posted.
>> http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/148856
>> Kindly use them and resend yours patches.
>>> diff --git a/arch/arm/cpu/armv7/exynos/clock.c 
>>> b/arch/arm/cpu/armv7/exynos/clock.c
>>> index fe61f88..47e2e6c 100644
>>> --- a/arch/arm/cpu/armv7/exynos/clock.c
>>> +++ b/arch/arm/cpu/armv7/exynos/clock.c
>> Please have a look patch at the link.
>> [PATCH] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
> http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/143640
I applied it and your resend patches at 7, Dec. to latest u-boot-samsung
tree.
http://patchwork.ozlabs.org/patch/204445/

It made compile error as below.
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
function 'samsung_get_base_i2s':
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208: error:
'EXYNOS4X12_I2S_BASE' undeclared (first use in this function)
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208: error:
(Each undeclared identifier is reported only once
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:208: error:
for each function it appears in.)
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
function 'samsung_get_base_spi':
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:226: error:
'EXYNOS4X12_SPI_BASE' undeclared (first use in this function)
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h: In
function 'samsung_get_base_spi_isp':
/workspace/insignal/bootloader/u-boot-samsung/include/asm/arch/cpu.h:227: error:
'EXYNOS4X12_SPI_ISP_BASE' undeclared (first use in this function)

Please resend patches after fix it.

>
>>> @@ -94,7 +94,12 @@ static unsigned long exynos4_get_pll_clk(int pllreg)
>>> r = readl(&clk->apll_con0);
>>> break;
>>> case MPLL:
>>> -   r = readl(&clk->mpll_con0);
>>> +   if (proid_is_exynos4412()) {
>>> +   struct exynos4412_clock *clk4412 =
>>> +   (struct exynos4412_clock 
>>> *)samsung_get_base_clock();
>>> +   r = readl(&clk4412->mpll_con0);
>>> +   } else
>>> +   r = readl(&clk->mpll_con0);
>>> break;
>>> case EPLL:
>>> r = readl(&clk->epll_con0);
>>> diff --git a/arch/arm/include/asm/arch-exynos/clock.h 
>>> b/arch/arm/include/asm/arch-exynos/clock.h
>>> index ff6781a..5d4ed5c 100644
>>> --- a/arch/arm/include/asm/arch-exynos/clock.h
>>> +++ b/arch/arm/include/asm/arch-exynos/clock.h
>>> @@ -251,6 +251,246 @@ struct exynos4_clock {
>>> unsigned intdiv_iem_l1;
>>>  };
>>>
>>> +struct exynos4412_clock {
>>> +   unsigned char   res1[0x4200];
>>> +   unsigned intsrc_leftbus;
>>> +   unsigned char   res2[0x1fc];
>>> +   unsigned intmux_stat_leftbus;
>>> +   unsigned char   res3[0xfc];
>>> +   unsigned intdiv_leftbus;
>>> +   unsigned char   res4[0xfc];
>>> +   unsigned intdiv_stat_leftbus;
>>> +   unsigned char   res5[0x1fc];
>>> +   unsigned intgate_ip_leftbus;
>>> +   unsigned char   res6[0x12c];
>>> +   unsigned intgate_ip_image;
>>> +   unsigned char   res7[0xcc];
>>> +   unsigned intclkout_cmu_leftbus;
>>> +   unsigned intclkout_cmu_leftbus_div_stat;
>>> +   unsigned char   res8[0x37f8];
>>> +   unsigned intsrc_rightbus;
>>> +   unsigned char   res9[0x1fc];
>>> +   unsigned intmux_stat_rightbus;
>>> +   unsigned char   res10[0xfc];
>>> +   unsigned intdiv_rightbus;
>>> +   unsigned char   res11[0xfc];
>>> +   unsigned intdiv_stat_rightbus;
>>> +   unsigned char   res12[0x1fc];
>>> +   unsigned intgate_ip_rightbus;
>>> +   unsigned char   res13[0x15c];
>>> +   unsigned intgate_ip_perir;
>>> +   unsigned char   res14[0x9c];
>>> +   unsigned intclkout_cmu_rightbus;
>>> +   unsigned intclkout_cmu_rightbus_div_stat;
>>> +   unsigned char   res15[0x3608];
>>> +   unsigned intepll_lock;
>>> +   unsigned char   res16[0xc];
>>> +   unsigned intvpll

[U-Boot] [PATCH] EXYNOS: EXYNOS4X12: adds missed base address

[Jeong-Hyeon Kim]

This patch fixs for on below patch posted by Chander Kashyap.
"EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses"

This patch needs for prevent compile error
for samsung's exynos SoCs based boards like
origen, s5pc210_universal, smdk5250, smdkv310 and trats.

Signed-off-by: Jeong-Hyeon Kim 
---
 arch/arm/include/asm/arch-exynos/cpu.h |3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h 
b/arch/arm/include/asm/arch-exynos/cpu.h
index 86c7905..f592ddc 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -85,11 +85,14 @@
 #define EXYNOS4X12_USBPHY_BASE 0x125B
 #define EXYNOS4X12_UART_BASE   0x1380
 #define EXYNOS4X12_I2C_BASE0x1386
+#define EXYNOS4X12_SPI_BASE0x1392
 #define EXYNOS4X12_PWMTIMER_BASE   0x139D
+#define EXYNOS4X12_I2S_BASE0xE210
 
 #define EXYNOS4X12_ADC_BASEDEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE
 #define EXYNOS4X12_MODEM_BASE  DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_SPI_ISP_BASEDEVICE_NOT_AVAILABLE
 
 /* EXYNOS5 Common*/
 #define EXYNOS5_I2C_SPACING0x1
-- 
1.7.9.5

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[U-Boot] EXYNOS4X12: Adds for ORIGEN_QUAD board

[Jeong-Hyeon Kim]

This patches are needs patches posted by Chander Kashyap.
[U-Boot] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
[U-Boot,Resend,v2,1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register 
addresses
[U-Boot,Resend,v2,2/3] EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
[U-Boot,Resend,v2,3/3] EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12

Patches:
[PATCH v2 1/2] EXYNOS4: Add pinmux support for UART
[PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support
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[U-Boot] [PATCH v2 1/2] EXYNOS4: Add pinmux support for UART

[Jeong-Hyeon Kim]

This patch adds pinmux support for UART channels

Signed-off-by: Jeong-Hyeon Kim 
---
 arch/arm/cpu/armv7/exynos/pinmux.c |   41 
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
index f02f441..364ee2a 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -366,6 +366,41 @@ static int exynos4_mmc_config(int peripheral, int flags)
return 0;
 }
 
+static void exynos4_uart_config(int peripheral)
+{
+   struct exynos4_gpio_part1 *gpio1 =
+   (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+   struct s5p_gpio_bank *bank;
+   int i, start, count;
+
+   switch (peripheral) {
+   case PERIPH_ID_UART0:
+   bank = &gpio1->a0;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART1:
+   bank = &gpio1->a0;
+   start = 4;
+   count = 4;
+   break;
+   case PERIPH_ID_UART2:
+   bank = &gpio1->a1;
+   start = 0;
+   count = 4;
+   break;
+   case PERIPH_ID_UART3:
+   bank = &gpio1->a1;
+   start = 4;
+   count = 2;
+   break;
+   }
+   for (i = start; i < start + count; i++) {
+   s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+   s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+   }
+}
+
 static int exynos4_pinmux_config(int peripheral, int flags)
 {
switch (peripheral) {
@@ -377,6 +412,12 @@ static int exynos4_pinmux_config(int peripheral, int flags)
case PERIPH_ID_SDMMC4:
printf("SDMMC device %d not implemented\n", peripheral);
return -1;
+   case PERIPH_ID_UART0:
+   case PERIPH_ID_UART1:
+   case PERIPH_ID_UART2:
+   case PERIPH_ID_UART3:
+   exynos4_uart_config(peripheral);
+   break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
-- 
1.7.9.5

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[U-Boot] [PATCH v2 2/2] EXYNOS4: Add ORIGEN_QUAD board support

[Jeong-Hyeon Kim]

ORIGEN_QUAD board is based on Samsung's Exynos4412 SoC.

Signed-off-by: Jeong-Hyeon Kim 
---
 Makefile  |2 +-
 board/samsung/origen_quad/Makefile|   59 ++
 board/samsung/origen_quad/boot.c  |   72 +++
 board/samsung/origen_quad/clock.c |  103 ++
 board/samsung/origen_quad/dmc.c   |  163 
 board/samsung/origen_quad/lowlevel_init.S |  151 +++
 board/samsung/origen_quad/origen_quad.c   |  163 
 board/samsung/origen_quad/setup.h |  300 +
 boards.cfg|1 +
 include/configs/origen_quad.h |  179 +
 tools/Makefile|2 +
 11 files changed, 1194 insertions(+), 1 deletion(-)
 create mode 100644 board/samsung/origen_quad/Makefile
 create mode 100644 board/samsung/origen_quad/boot.c
 create mode 100644 board/samsung/origen_quad/clock.c
 create mode 100644 board/samsung/origen_quad/dmc.c
 create mode 100644 board/samsung/origen_quad/lowlevel_init.S
 create mode 100644 board/samsung/origen_quad/origen_quad.c
 create mode 100644 board/samsung/origen_quad/setup.h
 create mode 100644 include/configs/origen_quad.h

diff --git a/Makefile b/Makefile
index 44db889..c69f740 100644
--- a/Makefile
+++ b/Makefile
@@ -823,7 +823,7 @@ clean:
   $(obj)tools/gdb/{astest,gdbcont,gdbsend}   \
   $(obj)tools/gen_eth_addr$(obj)tools/img2srec   \
   $(obj)tools/mk{env,}image   $(obj)tools/mpc86x_clk \
-  $(obj)tools/mk{smdk5250,}spl   \
+  $(obj)tools/mk{$(SOC),$(BOARD),}spl\
   $(obj)tools/mxsboot\
   $(obj)tools/ncb $(obj)tools/ubsha1 \
   $(obj)tools/kernel-doc/docproc
diff --git a/board/samsung/origen_quad/Makefile 
b/board/samsung/origen_quad/Makefile
new file mode 100644
index 000..c24c921
--- /dev/null
+++ b/board/samsung/origen_quad/Makefile
@@ -0,0 +1,59 @@
+#
+# Copyright (C) 2012 Samsung Electronics
+#
+# Copyright (C) 2012 Insignal
+#
+# Makefile for the Insignal OrigenQUAD board (Exynos4x12)
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+SOBJS  := lowlevel_init.o
+
+COBJS  := clock.o
+COBJS  += dmc.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS  += origen_quad.o
+else
+COBJS  += boot.o
+endif
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL:= $(obj).depend $(LIB)
+
+all:   $(ALL)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
\ No newline at end of file
diff --git a/board/samsung/origen_quad/boot.c b/board/samsung/origen_quad/boot.c
new file mode 100644
index 000..53bbe83
--- /dev/null
+++ b/board/samsung/origen_quad/boot.c
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Copyright (C) 2012 Insignal
+ *
+ * Board initialize for the Insignal OrigenQUAD board (Exynos4x12)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#incl

[U-Boot] [PATCH 0/2] clean some FAT code

[Richard Genoud]

Hi,

Instead of adding some more ugly #ifdefs, I came with another approach.
It makes the code easier to read, and correct the compilation error
when VFAT wasn't enabled.

Best regards,

Richard Genoud (2):
  FAT: remove ifdefs to make the code more readable
  FAT: use toupper/tolower instead of recoding them

 fs/fat/fat.c   |   58 +++
 fs/fat/fat_write.c |   14 
 include/fat.h  |3 --
 3 files changed, 36 insertions(+), 39 deletions(-)

-- 
1.7.2.5

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[U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Richard Genoud]

ifdefs in the code are making it harder to read.
The use of simple if(VFAT_ENABLED) makes no more code and is cleaner.
(the code is discarded by the compiler and linker instead of the
preprocessor.)

and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is not
defined.

Signed-off-by: Richard Genoud 
---
 fs/fat/fat.c   |   55 +++
 fs/fat/fat_write.c |   11 ++---
 2 files changed, 32 insertions(+), 34 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 393c378..c79e3e3 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -34,6 +34,12 @@
 #include 
 #include 
 
+#ifdef CONFIG_SUPPORT_VFAT
+#define VFAT_ENABLED 1
+#else
+#define VFAT_ENABLED 0
+#endif
+
 /*
  * Convert a string to lowercase.
  */
@@ -441,7 +447,6 @@ getit:
} while (1);
 }
 
-#ifdef CONFIG_SUPPORT_VFAT
 /*
  * Extract the file name information from 'slotptr' into 'l_name',
  * starting at l_name[*idx].
@@ -576,7 +581,6 @@ static __u8 mkcksum(const char name[8], const char ext[3])
 
return ret;
 }
-#endif /* CONFIG_SUPPORT_VFAT */
 
 /*
  * Get the directory entry associated with 'filename' from the directory
@@ -617,8 +621,8 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int 
startsect,
continue;
}
if ((dentptr->attr & ATTR_VOLUME)) {
-#ifdef CONFIG_SUPPORT_VFAT
-   if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
+   if (VFAT_ENABLED &&
+   (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
(dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
prevcksum = ((dir_slot 
*)dentptr)->alias_checksum;
get_vfatname(mydata, curclust,
@@ -658,9 +662,7 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int 
startsect,
continue;
}
debug("vfatname: |%s|\n", l_name);
-   } else
-#endif
-   {
+   } else {
/* Volume label or VFAT entry */
dentptr++;
continue;
@@ -674,14 +676,15 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int 
startsect,
debug("Dentname == NULL - %d\n", i);
return NULL;
}
-#ifdef CONFIG_SUPPORT_VFAT
-   __u8 csum = mkcksum(dentptr->name, dentptr->ext);
-   if (dols && csum == prevcksum) {
-   prevcksum = 0x;
-   dentptr++;
-   continue;
+   if (VFAT_ENABLED) {
+   __u8 csum = mkcksum(dentptr->name, 
dentptr->ext);
+   if (dols && csum == prevcksum) {
+   prevcksum = 0x;
+   dentptr++;
+   continue;
+   }
}
-#endif
+
get_name(dentptr, s_name);
if (dols) {
int isdir = (dentptr->attr & ATTR_DIR);
@@ -884,9 +887,9 @@ do_fat_read_at(const char *filename, unsigned long pos, 
void *buffer,
return -1;
}
 
-#ifdef CONFIG_SUPPORT_VFAT
-   debug("VFAT Support enabled\n");
-#endif
+   if (VFAT_ENABLED)
+   debug("VFAT Support enabled\n");
+
debug("FAT%d, fat_sect: %d, fatlength: %d\n",
   mydata->fatsize, mydata->fat_sect, mydata->fatlength);
debug("Rootdir begins at cluster: %d, sector: %d, offset: %x\n"
@@ -952,10 +955,12 @@ do_fat_read_at(const char *filename, unsigned long pos, 
void *buffer,
continue;
}
 
-   csum = mkcksum(dentptr->name, dentptr->ext);
+   if (VFAT_ENABLED)
+   csum = mkcksum(dentptr->name, dentptr->ext);
+
if (dentptr->attr & ATTR_VOLUME) {
-#ifdef CONFIG_SUPPORT_VFAT
-   if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
+   if (VFAT_ENABLED &&
+   (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
(dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
prevcksum =
((dir_slot 
*)dentptr)->alias_checksum;
@@ -999,9 +1004,7 @@ do_fat_read_at(const char *filename, unsigned long pos, 
void *buffer,

[U-Boot] [PATCH 2/2] FAT: use toupper/tolower instead of recoding them

[Richard Genoud]

toupper/tolower function are already declared, so use them.

Signed-off-by: Richard Genoud 
---
 fs/fat/fat.c   |3 ++-
 fs/fat/fat_write.c |3 ++-
 include/fat.h  |3 ---
 3 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index c79e3e3..cff0526 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -33,6 +33,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_SUPPORT_VFAT
 #define VFAT_ENABLED 1
@@ -46,7 +47,7 @@
 static void downcase(char *str)
 {
while (*str != '\0') {
-   TOLOWER(*str);
+   *str = tolower(*str);
str++;
}
 }
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index ed3eaa0..13c4de1 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "fat.c"
 
 static void uppercase(char *str, int len)
@@ -35,7 +36,7 @@ static void uppercase(char *str, int len)
int i;
 
for (i = 0; i < len; i++) {
-   TOUPPER(*str);
+   *str = toupper(*str);
str++;
}
 }
diff --git a/include/fat.h b/include/fat.h
index 706cd7a..b28c3fd 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -98,9 +98,6 @@
 #endif
 #endif
 
-#define TOLOWER(c) if((c) >= 'A' && (c) <= 'Z'){(c)+=('a' - 'A');}
-#define TOUPPER(c) if ((c) >= 'a' && (c) <= 'z') \
-   (c) -= ('a' - 'A');
 #define START(dent)(FAT2CPU16((dent)->start) \
+ (mydata->fatsize != 32 ? 0 : \
  (FAT2CPU16((dent)->starthi) << 16)))
-- 
1.7.2.5

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[U-Boot] [PATCH v3] usbh/ehci: Increase timeout for enumeration

[Vipin Kumar]

The current logic reads the port status just once after usb_hub_power_on and
expects the portstatus and portchange to report the connection status
immediately and correctly.

Few pen drives are not able to report both of them immediately ie. those pens
report the connection change but not the connected state after the first read.
This opportunity once lost is gone for ever because the u-boot, unlike linux or
any other OS, works in polling mode.

This patch modifies the logic to read the port status continuously until the
portstatus and portchange both report a connection change as well as a connected
state or no connection change and no connection. This logic is placed in a
timeout of 10 sec. At the end of it, the pen drive would have either reported a
ONE or a ZERO in bit 1 of portstatus as well as portchange.

It enhances the set of pen drives which can eventually be detected by u-boot

Note: This 10 second timeout is based purely on several experiments done with
the broken pen drives

Signed-off-by: Vipin Kumar 
Acked-by: Igor Grinberg 
---
Changes in v3
 Added comment (in patch comment as well as code) for the reasons for choosing
 10 seconds as timeout

 common/usb_hub.c | 33 -
 1 file changed, 28 insertions(+), 5 deletions(-)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index e4a1201..4d75b90 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -396,14 +396,37 @@ static int usb_hub_configure(struct usb_device *dev)
for (i = 0; i < dev->maxchild; i++) {
ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1);
unsigned short portstatus, portchange;
+   int ret;
+   ulong start = get_timer(0);
+
+   /*
+* Wait for (whichever finishes first)
+*  - A maximum of 10 seconds
+*This is a purely observational value driven by connecting
+*a few broken pen drives and taking the max * 1.5 approach
+*  - connection_change and connection state to report same
+*state
+*/
+   do {
+   ret = usb_get_port_status(dev, i + 1, portsts);
+   if (ret < 0) {
+   USB_HUB_PRINTF("get_port_status failed\n");
+   break;
+   }
+
+   portstatus = le16_to_cpu(portsts->wPortStatus);
+   portchange = le16_to_cpu(portsts->wPortChange);
+
+   if ((portchange & USB_PORT_STAT_C_CONNECTION) ==
+   (portstatus & USB_PORT_STAT_CONNECTION))
+   break;
+
+   mdelay(100);
+   } while (get_timer(start) < CONFIG_SYS_HZ * 10);
 
-   if (usb_get_port_status(dev, i + 1, portsts) < 0) {
-   USB_HUB_PRINTF("get_port_status failed\n");
+   if (ret < 0)
continue;
-   }
 
-   portstatus = le16_to_cpu(portsts->wPortStatus);
-   portchange = le16_to_cpu(portsts->wPortChange);
USB_HUB_PRINTF("Port %d Status %X Change %X\n",
i + 1, portstatus, portchange);
 
-- 
1.8.0

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[U-Boot] [PATCH V2 0/4] Add support for FIMD and DP on SMDK5250

[Ajay Kumar]

Changes since V1:
-- Fix commit message in [PATCH V2 1/4].
-- Move LCD GPIO confiration from exynos common file to board file.
-- Use CONFIG_CMD_BMP instead of CONFIG_TIZEN to distinguish
   between Proprietary logo support and LCD console support.

 [PATCH V2 1/4] EXYNOS5: Change parent clock of FIMD to MPLL
 [PATCH RESEND 2/4] video: Fix compilation dependency of exynos_dp and 
exynos_mipi on
exynos_fb
 [PATCH V2 3/4] video: Modify exynos_fimd driver to support LCD console
 [PATCH V2 4/4] EXYNOS5: Add support for FIMD and DP

 arch/arm/cpu/armv7/exynos/clock.c |2 +-
 board/samsung/smdk5250/smdk5250.c |   98 +
 drivers/video/exynos_fb.c |9 +++-
 drivers/video/exynos_fimd.c   |   10 +++-
 include/configs/smdk5250.h|8 +++
 5 files changed, 123 insertions(+), 4 deletions(-)

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[U-Boot] [PATCH V2 1/4] EXYNOS5: Change parent clock of FIMD to MPLL

[Ajay Kumar]

With VPLL as source clock to FIMD,
Exynos DP Initializaton was failing sometimes with unstable clock.
Changing FIMD source to MPLL resolves this issue.

Signed-off-by: Ajay Kumar 
Acked-by: Simon Glass 
---
 arch/arm/cpu/armv7/exynos/clock.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/clock.c 
b/arch/arm/cpu/armv7/exynos/clock.c
index fe61f88..bfcd5f7 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -603,7 +603,7 @@ void exynos5_set_lcd_clk(void)
 */
cfg = readl(&clk->src_disp1_0);
cfg &= ~(0xf);
-   cfg |= 0x8;
+   cfg |= 0x6;
writel(cfg, &clk->src_disp1_0);
 
/*
-- 
1.7.1

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[U-Boot] [PATCH RESEND 2/4] video: Fix compilation dependency of exynos_dp and exynos_mipi on exynos_fb

[Ajay Kumar]

When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM.
Similarly, when only MIPI is used, we need not enable CONFIG_EXYNOS_DP.
But the current structuring of code forces us to enable both
CONFIG_EXYNOS_MIPI_DSIM and CONFIG_EXYNOS_DP.
This patch adds conditional compilation check to remove the dependency.

Signed-off-by: Ajay Kumar 
Acked-by: Simon Glass 
---
 drivers/video/exynos_fb.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index d9a3f9a..39d3b74 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -103,8 +103,10 @@ static void lcd_panel_on(vidinfo_t *vid)
 
udelay(vid->power_on_delay);
 
+#ifdef CONFIG_EXYNOS_DP
if (vid->dp_enabled)
exynos_init_dp();
+#endif
 
if (vid->reset_lcd) {
vid->reset_lcd();
@@ -120,8 +122,10 @@ static void lcd_panel_on(vidinfo_t *vid)
if (vid->enable_ldo)
vid->enable_ldo(1);
 
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
if (vid->mipi_enabled)
exynos_mipi_dsi_init();
+#endif
 }
 
 void lcd_ctrl_init(void *lcdbase)
-- 
1.7.1

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[U-Boot] [PATCH V2 3/4] video: Modify exynos_fimd driver to support LCD console

[Ajay Kumar]

Currently, exynos FIMD driver is being used to support only TIZEN LOGOs.
In order to get LCD console, we need to enable half word swap feature
of FIMD and use 16 BPP.
LCD console and proprietary Logo cannot be used simultaneously.
You should define CONFIG_CMD_BMP for proprietary Logo, and if
CONFIG_CMD_BMP is not defined you get output console on LCD.

Signed-off-by: Ajay Kumar 
---
 drivers/video/exynos_fb.c   |5 -
 drivers/video/exynos_fimd.c |   10 --
 2 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 39d3b74..cb19192 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -65,6 +65,7 @@ static void exynos_lcd_init(vidinfo_t *vid)
exynos_fimd_lcd_init(vid);
 }
 
+#ifdef CONFIG_CMD_BMP
 static void draw_logo(void)
 {
int x, y;
@@ -87,6 +88,7 @@ static void draw_logo(void)
addr = panel_info.logo_addr;
bmp_display(addr, x, y);
 }
+#endif
 
 static void lcd_panel_on(vidinfo_t *vid)
 {
@@ -146,12 +148,13 @@ void lcd_ctrl_init(void *lcdbase)
 
 void lcd_enable(void)
 {
+#ifdef CONFIG_CMD_BMP
if (panel_info.logo_on) {
memset(lcd_base, 0, panel_width * panel_height *
(NBITS(panel_info.vl_bpix) >> 3));
draw_logo();
}
-
+#endif
lcd_panel_on(&panel_info);
 }
 
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 06eae2e..0776b6d 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -88,14 +88,20 @@ static void exynos_fimd_set_par(unsigned int win_id)
/* DATAPATH is DMA */
cfg |= EXYNOS_WINCON_DATAPATH_DMA;
 
-   /* bpp is 32 */
+#ifdef CONFIG_CMD_BMP /* To get proprietary LOGO */
cfg |= EXYNOS_WINCON_WSWP_ENABLE;
+#else  /* To get output console on LCD */
+   cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+#endif
 
/* dma burst is 16 */
cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
 
-   /* pixel format is unpacked RGB888 */
+#ifdef CONFIG_CMD_BMP /* To get proprietary LOGO */
cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+#else  /* To get output console on LCD */
+   cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+#endif
 
writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
EXYNOS_WINCON(win_id));
-- 
1.7.1

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[U-Boot] [PATCH V2 4/4] EXYNOS5: Add support for FIMD and DP

[Ajay Kumar]

Add panel_info structure required by LCD driver
and DP panel platdata for SMDK5250.
Add GPIO configuration for LCD.
Enable FIMD and DP support on SMDK5250.
DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.

Signed-off-by: Ajay Kumar 
---
 board/samsung/smdk5250/smdk5250.c |   98 +
 include/configs/smdk5250.h|8 +++
 2 files changed, 106 insertions(+), 0 deletions(-)

diff --git a/board/samsung/smdk5250/smdk5250.c 
b/board/samsung/smdk5250/smdk5250.c
index 4c50342..4c21742 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -24,12 +24,15 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -181,6 +184,101 @@ static int board_uart_init(void)
return 0;
 }
 
+vidinfo_t panel_info = {
+   .vl_freq= 60,
+   .vl_col = 2560,
+   .vl_row = 1600,
+   .vl_width   = 2560,
+   .vl_height  = 1600,
+   .vl_clkp= CONFIG_SYS_LOW,
+   .vl_hsp = CONFIG_SYS_LOW,
+   .vl_vsp = CONFIG_SYS_LOW,
+   .vl_dp  = CONFIG_SYS_LOW,
+   .vl_bpix= 4,/* LCD_BPP = 2^4, for output conosle on LCD */
+
+   /* wDP panel timing infomation */
+   .vl_hspw= 32,
+   .vl_hbpd= 80,
+   .vl_hfpd= 48,
+
+   .vl_vspw= 6,
+   .vl_vbpd= 37,
+   .vl_vfpd= 3,
+   .vl_cmd_allow_len = 0xf,
+
+   .win_id = 3,
+   .cfg_gpio   = NULL,
+   .backlight_on   = NULL,
+   .lcd_power_on   = NULL,
+   .reset_lcd  = NULL,
+   .dual_lcd_enabled = 0,
+
+   .init_delay = 0,
+   .power_on_delay = 0,
+   .reset_delay= 0,
+   .interface_mode = FIMD_RGB_INTERFACE,
+   .dp_enabled = 1,
+};
+
+static struct edp_device_info edp_info = {
+   .disp_info = {
+   .h_res = 2560,
+   .h_sync_width = 32,
+   .h_back_porch = 80,
+   .h_front_porch = 48,
+   .v_res = 1600,
+   .v_sync_width  = 6,
+   .v_back_porch = 37,
+   .v_front_porch = 3,
+   .v_sync_rate = 60,
+   },
+   .lt_info = {
+   .lt_status = DP_LT_NONE,
+   },
+   .video_info = {
+   .master_mode = 0,
+   .bist_mode = DP_DISABLE,
+   .bist_pattern = NO_PATTERN,
+   .h_sync_polarity = 0,
+   .v_sync_polarity = 0,
+   .interlaced = 0,
+   .color_space = COLOR_RGB,
+   .dynamic_range = VESA,
+   .ycbcr_coeff = COLOR_YCBCR601,
+   .color_depth = COLOR_8,
+   },
+};
+
+static struct exynos_dp_platform_data dp_platform_data = {
+   .phy_enable = set_dp_phy_ctrl,
+   .edp_dev_info   = &edp_info,
+};
+
+static void cfg_lcd_gpio(void)
+{
+   struct exynos5_gpio_part1 *gpio1 =
+   (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+   /* For Backlight */
+   s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
+   s5p_gpio_set_value(&gpio1->b2, 0, 1);
+
+   /* LCD power on */
+   s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
+   s5p_gpio_set_value(&gpio1->x1, 5, 1);
+
+   /* Set Hotplug detect for DP */
+   s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
+}
+
+void init_panel_info(vidinfo_t *vid)
+{
+   vid->rgb_mode   = MODE_RGB_P,
+
+   exynos_set_dp_platform_data(&dp_platform_data);
+   cfg_lcd_gpio();
+}
+
 #ifdef CONFIG_SYS_I2C_INIT_BOARD
 static int board_i2c_init(void)
 {
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index e412da8..a9b3b8b 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -256,6 +256,14 @@
 #define CONFIG_SOUND_WM8994
 #endif
 
+/* Display */
+#define CONFIG_LCD
+#define CONFIG_EXYNOS_FB
+#define CONFIG_EXYNOS_DP
+#define LCD_XRES   2560
+#define LCD_YRES   1600
+#define LCD_BPPLCD_COLOR16
+
 /* Enable devicetree support */
 #define CONFIG_OF_LIBFDT
 
-- 
1.7.1

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[U-Boot] [PATCH v3] spi/arm-pl022: Add support for ARM PL022 spi controller

[Vipin Kumar]

From: Armando Visconti 

This patch adds the support for the ARM PL022 SPI controller for the standard
variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX FIFO.

Signed-off-by: Armando Visconti 
Signed-off-by: Vipin Kumar 
---
Changes in v3
 Added void to spi_init arguments
 Used readl/writel in place of u16 accessors
 Fix: Provided address of register in place of value to readl/writel IO
  accessors

Tested with spear1340-evb

Stefan, I have not added your Acked-by because the patch has changed after you
acked it.

 drivers/spi/Makefile|   1 +
 drivers/spi/pl022_spi.c | 310 
 2 files changed, 311 insertions(+)
 create mode 100644 drivers/spi/pl022_spi.c

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 824d357..3a4e4b0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
 COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
 COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
 COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
+COBJS-$(CONFIG_PL022_SPI) += pl022_spi.o
 COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
 COBJS-$(CONFIG_SH_SPI) += sh_spi.o
 COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c
new file mode 100644
index 000..86d65ae
--- /dev/null
+++ b/drivers/spi/pl022_spi.c
@@ -0,0 +1,310 @@
+/*
+ * (C) Copyright 2012
+ * Armando Visconti, ST Microelectronics, armando.visco...@st.com.
+ *
+ * Driver for ARM PL022 SPI Controller. Based on atmel_spi.c
+ * by Atmel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* SSP registers mapping */
+struct pl022 {
+   u32 ssp_cr0;/* 0x000 */
+   u32 ssp_cr1;/* 0x004 */
+   u32 ssp_dr; /* 0x008 */
+   u32 ssp_sr; /* 0x00c */
+   u32 ssp_cpsr;   /* 0x010 */
+   u32 ssp_imsc;   /* 0x014 */
+   u32 ssp_ris;/* 0x018 */
+   u32 ssp_mis;/* 0x01c */
+   u32 ssp_icr;/* 0x020 */
+   u32 ssp_dmacr;  /* 0x024 */
+   u8  reserved_1[0x080 - 0x028];
+   u32 ssp_itcr;   /* 0x080 */
+   u32 ssp_itip;   /* 0x084 */
+   u32 ssp_itop;   /* 0x088 */
+   u32 ssp_tdr;/* 0x08c */
+   u8  reserved_2[0xFE0 - 0x090];
+   u32 ssp_pid0;   /* 0xfe0 */
+   u32 ssp_pid1;   /* 0xfe4 */
+   u32 ssp_pid2;   /* 0xfe8 */
+   u32 ssp_pid3;   /* 0xfec */
+   u32 ssp_cid0;   /* 0xff0 */
+   u32 ssp_cid1;   /* 0xff4 */
+   u32 ssp_cid2;   /* 0xff8 */
+   u32 ssp_cid3;   /* 0xffc */
+};
+
+/* SSP Control Register 0  - SSP_CR0 */
+#define SSP_CR0_SPO(0x1 << 6)
+#define SSP_CR0_SPH(0x1 << 7)
+#define SSP_CR0_8BIT_MODE  (0x07)
+#define SSP_SCR_MAX(0xFF)
+#define SSP_SCR_SHFT   8
+
+/* SSP Control Register 0  - SSP_CR1 */
+#define SSP_CR1_MASK_SSE   (0x1 << 1)
+
+#define SSP_CPSR_MAX   (0xFE)
+
+/* SSP Status Register - SSP_SR */
+#define SSP_SR_MASK_TFE(0x1 << 0) /* Transmit FIFO empty */
+#define SSP_SR_MASK_TNF(0x1 << 1) /* Transmit FIFO not full */
+#define SSP_SR_MASK_RNE(0x1 << 2) /* Receive FIFO not empty */
+#define SSP_SR_MASK_RFF(0x1 << 3) /* Receive FIFO full */
+#define SSP_SR_MASK_BSY(0x1 << 4) /* Busy Flag */
+
+struct pl022_spi_slave {
+   struct spi_slave slave;
+   void *regs;
+   unsigned int freq;
+};
+
+static inline struct pl022_spi_slave *to_pl022_spi(struct spi_slave *slave)
+{
+   return container_of(slave, struct pl022_spi_slave, slave);
+}
+
+/*
+ * Following three functions should be provided by the
+ * board support package.
+ */
+int __weak spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+   return 1;
+}
+
+void __weak spi_cs_activate(struct spi_slave *slave)
+{
+   /* do nothing */
+}
+
+void __weak spi_cs_deactivate(struct spi_slave *slave)
+{
+   /* do nothing */
+}
+
+void spi_init(void)
+{
+   /* do nothing */
+}
+
+/*
+ * ARM PL022 exists in different 'flavors'.
+ * This drivers c

Re: [U-Boot] [PATCH v3] spi/arm-pl022: Add support for ARM PL022 spi controller

[Stefan Roese]

On 12/13/2012 12:41 PM, Vipin Kumar wrote:
> From: Armando Visconti 
> 
> This patch adds the support for the ARM PL022 SPI controller for the standard
> variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX FIFO.
> 
> Signed-off-by: Armando Visconti 
> Signed-off-by: Vipin Kumar 
> ---
> Changes in v3
>  Added void to spi_init arguments
>  Used readl/writel in place of u16 accessors
>  Fix: Provided address of register in place of value to readl/writel IO
>   accessors
> 
> Tested with spear1340-evb
> 
> Stefan, I have not added your Acked-by because the patch has changed after you
> acked it.

Okay.

Looks still good, so:

Acked-by: Stefan Roese 

Thanks,
Stefan
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[U-Boot] [PATCH v2 1/2] net/designware: Do not select MIIPORT for RGMII interface

[Vipin Kumar]

Do not select MIIPORT for RGMII interface

Signed-off-by: Vipin Kumar 
Acked-by: Stefan Roese 
---
 drivers/net/designware.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index bf21a08..46f6601 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -113,7 +113,9 @@ static int mac_reset(struct eth_device *dev)
int timeout = CONFIG_MACRESET_TIMEOUT;
 
writel(DMAMAC_SRST, &dma_p->busmode);
-   writel(MII_PORTSELECT, &mac_p->conf);
+
+   if (priv->interface != PHY_INTERFACE_MODE_RGMII)
+   writel(MII_PORTSELECT, &mac_p->conf);
 
start = get_timer(0);
while (get_timer(start) < timeout) {
-- 
1.8.0

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[U-Boot] [PATCH v2 2/2] net/macb: Add arch specific routine to get mdio control

[Vipin Kumar]

From: Shiraz Hashim 

SPEAr310 and SPEAr320 Ethernet interfaces share same MDIO lines to control their
respective phys. Currently there is a fixed configuration in which only a
particular MAC can use the MDIO lines.

Call an arch specific function to take control of specific mdio lines at
runtime.

Signed-off-by: Shiraz Hashim 
Signed-off-by: Vipin Kumar 
Acked-by: Stefan Roese 
---
Changes in v2
 Used __weak instead of __attribute__((weak...
 Improve patch comment

 drivers/net/macb.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 8bacbda..6b49f0e 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -163,6 +163,11 @@ static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
return MACB_BFEXT(DATA, frame);
 }
 
+static void __weak arch_get_mdio_control(const char *name)
+{
+   return;
+}
+
 #if defined(CONFIG_CMD_MII)
 
 int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
@@ -173,6 +178,7 @@ int macb_miiphy_read(const char *devname, u8 phy_adr, u8 
reg, u16 *value)
if ( macb->phy_addr != phy_adr )
return -1;
 
+   arch_get_mdio_control(devname);
*value = macb_mdio_read(macb, reg);
 
return 0;
@@ -186,6 +192,7 @@ int macb_miiphy_write(const char *devname, u8 phy_adr, u8 
reg, u16 value)
if ( macb->phy_addr != phy_adr )
return -1;
 
+   arch_get_mdio_control(devname);
macb_mdio_write(macb, reg, value);
 
return 0;
@@ -377,6 +384,7 @@ static int macb_phy_init(struct macb_device *macb)
int media, speed, duplex;
int i;
 
+   arch_get_mdio_control(netdev->name);
 #ifdef CONFIG_MACB_SEARCH_PHY
/* Auto-detect phy_addr */
if (!macb_phy_find(macb)) {
-- 
1.8.0

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Re: [U-Boot] [PATCH 0/2] clean some FAT code

[Marek Vasut]

Dear Richard Genoud,

> Hi,
> 
> Instead of adding some more ugly #ifdefs, I came with another approach.
> It makes the code easier to read, and correct the compilation error
> when VFAT wasn't enabled.

I feel bad for the code when you say it's FAT so explicitly ... it certainly 
wishes it was SLIM, but it can't ;-)

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Marek Vasut]

Dear Richard Genoud,

> ifdefs in the code are making it harder to read.
> The use of simple if(VFAT_ENABLED) makes no more code and is cleaner.
> (the code is discarded by the compiler and linker instead of the
> preprocessor.)
> 
> and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is not
> defined.
> 
> Signed-off-by: Richard Genoud 
> ---
>  fs/fat/fat.c   |   55
> +++ fs/fat/fat_write.c |  
> 11 ++---
>  2 files changed, 32 insertions(+), 34 deletions(-)
> 
> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> index 393c378..c79e3e3 100644
> --- a/fs/fat/fat.c
> +++ b/fs/fat/fat.c
> @@ -34,6 +34,12 @@
>  #include 
>  #include 
> 
> +#ifdef CONFIG_SUPPORT_VFAT
> +#define VFAT_ENABLED 1
> +#else
> +#define VFAT_ENABLED 0
> +#endif
[...]

Make it static const int maybe ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 2/2] FAT: use toupper/tolower instead of recoding them

[Marek Vasut]

Dear Richard Genoud,

> toupper/tolower function are already declared, so use them.
> 
> Signed-off-by: Richard Genoud 
> ---
>  fs/fat/fat.c   |3 ++-
>  fs/fat/fat_write.c |3 ++-
>  include/fat.h  |3 ---
>  3 files changed, 4 insertions(+), 5 deletions(-)

Acked-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 0/2] clean some FAT code

[Richard Genoud]

2012/12/13 Marek Vasut :
> Dear Richard Genoud,
>
> I feel bad for the code when you say it's FAT so explicitly ... it certainly
> wishes it was SLIM, but it can't ;-)
>
:) I didn't write that on purpose... But it's definitely a good war cry !
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Richard Genoud]

2012/12/13 Marek Vasut :
> Dear Richard Genoud,
>
>> ifdefs in the code are making it harder to read.
>> The use of simple if(VFAT_ENABLED) makes no more code and is cleaner.
>> (the code is discarded by the compiler and linker instead of the
>> preprocessor.)
>>
>> and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is not
>> defined.
>>
>> Signed-off-by: Richard Genoud 
>> ---
>>  fs/fat/fat.c   |   55
>> +++ fs/fat/fat_write.c |
>> 11 ++---
>>  2 files changed, 32 insertions(+), 34 deletions(-)
>>
>> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
>> index 393c378..c79e3e3 100644
>> --- a/fs/fat/fat.c
>> +++ b/fs/fat/fat.c
>> @@ -34,6 +34,12 @@
>>  #include 
>>  #include 
>>
>> +#ifdef CONFIG_SUPPORT_VFAT
>> +#define VFAT_ENABLED 1
>> +#else
>> +#define VFAT_ENABLED 0
>> +#endif
> [...]
>
> Make it static const int maybe ?
I hesitate to make them static const, I can't figure why it's better
to use static const variable instead of defines.
Could you enlighten me ?

Best regards,
Richard.
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Tom Rini]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 12/13/12 05:47, Richard Genoud wrote:
> ifdefs in the code are making it harder to read. The use of simple
> if(VFAT_ENABLED) makes no more code and is cleaner. (the code is
> discarded by the compiler and linker instead of the preprocessor.)
> 
> and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is
> not defined.
> 
> Signed-off-by: Richard Genoud  --- 
> fs/fat/fat.c   |   55
> +++ 
> fs/fat/fat_write.c |   11 ++--- 2 files changed, 32
> insertions(+), 34 deletions(-)
> 
> diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 393c378..c79e3e3
> 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -34,6 +34,12 @@ 
> #include  #include 
> 
> +#ifdef CONFIG_SUPPORT_VFAT +#define VFAT_ENABLED 1 +#else +#define
> VFAT_ENABLED 0 +#endif + /* * Convert a string to lowercase. */ @@
> -441,7 +447,6 @@ getit: } while (1); }
> 
> -#ifdef CONFIG_SUPPORT_VFAT /* * Extract the file name information
> from 'slotptr' into 'l_name', * starting at l_name[*idx]. @@ -576,7
> +581,6 @@ static __u8 mkcksum(const char name[8], const char
> ext[3])
> 
> return ret; } -#endif /* CONFIG_SUPPORT_VFAT */
> 
> /* * Get the directory entry associated with 'filename' from the
> directory @@ -617,8 +621,8 @@ static dir_entry
> *get_dentfromdir(fsdata *mydata, int startsect, continue; } if
> ((dentptr->attr & ATTR_VOLUME)) { -#ifdef CONFIG_SUPPORT_VFAT -
> if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT && + 
> if
> (VFAT_ENABLED && +(dentptr->attr & ATTR_VFAT) 
> == ATTR_VFAT
> && (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) { prevcksum =
> ((dir_slot *)dentptr)->alias_checksum; get_vfatname(mydata,
> curclust, @@ -658,9 +662,7 @@ static dir_entry
> *get_dentfromdir(fsdata *mydata, int startsect, continue; } 
> debug("vfatname: |%s|\n", l_name); -  } else -#endif 
> -{ +
> } else { /* Volume label or VFAT entry */ dentptr++; continue; @@
> -674,14 +676,15 @@ static dir_entry *get_dentfromdir(fsdata
> *mydata, int startsect, debug("Dentname == NULL - %d\n", i); return
> NULL; } -#ifdef CONFIG_SUPPORT_VFAT - __u8 csum =
> mkcksum(dentptr->name, dentptr->ext); -   if (dols && 
> csum ==
> prevcksum) { -prevcksum = 0x; -   
> dentptr++; -
> continue; +   if (VFAT_ENABLED) { +   
> __u8 csum =
> mkcksum(dentptr->name, dentptr->ext); +   if 
> (dols && csum ==
> prevcksum) { +prevcksum = 0x; +   
> dentptr++; +
> continue; +   } } -#endif + get_name(dentptr, 
> s_name); if (dols)
> { int isdir = (dentptr->attr & ATTR_DIR); @@ -884,9 +887,9 @@
> do_fat_read_at(const char *filename, unsigned long pos, void
> *buffer, return -1; }
> 
> -#ifdef CONFIG_SUPPORT_VFAT - debug("VFAT Support enabled\n"); 
> -#endif + if (VFAT_ENABLED) + debug("VFAT Support 
> enabled\n"); + 
> debug("FAT%d, fat_sect: %d, fatlength: %d\n", mydata->fatsize,
> mydata->fat_sect, mydata->fatlength); debug("Rootdir begins at
> cluster: %d, sector: %d, offset: %x\n" @@ -952,10 +955,12 @@
> do_fat_read_at(const char *filename, unsigned long pos, void
> *buffer, continue; }
> 
> - csum = mkcksum(dentptr->name, dentptr->ext); +  
> if
> (VFAT_ENABLED) +  csum = mkcksum(dentptr->name, 
> dentptr->ext); + 
> if (dentptr->attr & ATTR_VOLUME) { -#ifdef CONFIG_SUPPORT_VFAT -
> if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT && + 
> if
> (VFAT_ENABLED && +(dentptr->attr & ATTR_VFAT) 
> == ATTR_VFAT
> && (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) { prevcksum = 
> ((dir_slot *)dentptr)->alias_checksum; @@ -999,9 +1004,7 @@
> do_fat_read_at(const char *filename, unsigned long pos, void
> *buffer, } debug("Rootvfatname: |%s|\n", l_name); -   
> } else 
> -#endif - { + } else 
> { /* Volume label or VFAT entry */ 
> dentptr++; continue; @@ -1015,13 +1018,13 @@ do_fat_read_at(const
> char *filename, unsigned long pos, void *buffer, } goto exit; } 
> -#ifdef CONFIG_SUPPORT_VFAT - else if (dols == LS_ROOT && 
> csum ==
> prevcksum) { +else if (VFAT_ENABLED && +  
>  dols == LS_ROOT &&
> csum == prevcksum) { prevcksum = 0x; dentptr++; continue; } 
> -#endif + get_name(dentptr, s_name);
> 
> if (dols == LS_ROOT) { diff --git a/fs/fat/fat_write.c
> b/fs/fat/fat_write.c index 4a1bda0..ed3eaa0 100644 ---
> a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -248,7 +248,6 @@
> static __u32 get_fatent_value(fsdata *mydata, __u32 entry) return
> re

Re: [U-Boot] [PATCH v3] usbh/ehci: Increase timeout for enumeration

[Marek Vasut]

Dear Vipin Kumar,

> The current logic reads the port status just once after usb_hub_power_on
> and expects the portstatus and portchange to report the connection status
> immediately and correctly.
> 
> Few pen drives are not able to report both of them immediately ie. those
> pens report the connection change but not the connected state after the
> first read. This opportunity once lost is gone for ever because the
> u-boot, unlike linux or any other OS, works in polling mode.
> 
> This patch modifies the logic to read the port status continuously until
> the portstatus and portchange both report a connection change as well as a
> connected state or no connection change and no connection. This logic is
> placed in a timeout of 10 sec. At the end of it, the pen drive would have
> either reported a ONE or a ZERO in bit 1 of portstatus as well as
> portchange.
> 
> It enhances the set of pen drives which can eventually be detected by
> u-boot
> 
> Note: This 10 second timeout is based purely on several experiments done
> with the broken pen drives
> 
> Signed-off-by: Vipin Kumar 
> Acked-by: Igor Grinberg 

Applied, tested. Thanks

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Tom Rini]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 12/13/12 05:27, Wolfgang Denk wrote:
> Dear Stephen Warren,
> 
> In message
> <1355354590-10023-1-git-send-email-swar...@wwwdotorg.org> you
> wrote:
>> From: Stephen Warren 
>> 
>> A single U-Boot binary may support multiple very similar boards.
>> These boards may use different UARTs for the main debug console.
>> Hence, it is impossible to #define CONFIG_SYS_NS16550_COM1 to
>> some static UART address, since the true value may only be
>> determined at run-time, after identifying the actual hardware.
>> Provide an API for boards to call to set the actual address of
>> the UART, e.g. from spl_board_init() or board_early_init_f().
>> 
>> Signed-off-by: Stephen Warren 
> 
> As is, this is just adding dead code.
> 
> Where would the device addresses come from - out of the device
> tree?

Board specific knowledge.  I'd be tempted to add UART3 (iirc) into the
am335x_evm default build so that we can support the Industrial DevKit
variant out of the box, rather than needing one of the other _uartN
builds.  We can tell which board we're on at run-time already.

- -- 
Tom
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Marek Vasut]

Dear Richard Genoud,

> 2012/12/13 Marek Vasut :
> > Dear Richard Genoud,
> > 
> >> ifdefs in the code are making it harder to read.
> >> The use of simple if(VFAT_ENABLED) makes no more code and is cleaner.
> >> (the code is discarded by the compiler and linker instead of the
> >> preprocessor.)
> >> 
> >> and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is not
> >> defined.
> >> 
> >> Signed-off-by: Richard Genoud 
> >> ---
> >> 
> >>  fs/fat/fat.c   |   55
> >> 
> >> +++ fs/fat/fat_write.c |
> >> 11 ++---
> >> 
> >>  2 files changed, 32 insertions(+), 34 deletions(-)
> >> 
> >> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> >> index 393c378..c79e3e3 100644
> >> --- a/fs/fat/fat.c
> >> +++ b/fs/fat/fat.c
> >> @@ -34,6 +34,12 @@
> >> 
> >>  #include 
> >>  #include 
> >> 
> >> +#ifdef CONFIG_SUPPORT_VFAT
> >> +#define VFAT_ENABLED 1
> >> +#else
> >> +#define VFAT_ENABLED 0
> >> +#endif
> > 
> > [...]
> > 
> > Make it static const int maybe ?
> 
> I hesitate to make them static const, I can't figure why it's better
> to use static const variable instead of defines.
> Could you enlighten me ?

Because you get the type-checking. Preprocessor is evil ;-)

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Richard Genoud]

2012/12/13 Tom Rini :
> Note that we don't use --gc-sections on all archs so I'm not sure we
> discard the unused VFAT functions on say ARM.
>
I tested it on at91sam9x5ek, and the vfat functions are not present in
the System.map.

The problem is in my commit message: the linker doesn"t have anything
to do with that because all discarded functions are static.

So I think it's ok on all archs (but maybe not with -O0)

Richard
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Richard Genoud]

2012/12/13 Marek Vasut :
> Dear Richard Genoud,
>
>> 2012/12/13 Marek Vasut :
>> > Dear Richard Genoud,
>> >
>> >> ifdefs in the code are making it harder to read.
>> >> The use of simple if(VFAT_ENABLED) makes no more code and is cleaner.
>> >> (the code is discarded by the compiler and linker instead of the
>> >> preprocessor.)
>> >>
>> >> and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is not
>> >> defined.
>> >>
>> >> Signed-off-by: Richard Genoud 
>> >> ---
>> >>
>> >>  fs/fat/fat.c   |   55
>> >>
>> >> +++ fs/fat/fat_write.c |
>> >> 11 ++---
>> >>
>> >>  2 files changed, 32 insertions(+), 34 deletions(-)
>> >>
>> >> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
>> >> index 393c378..c79e3e3 100644
>> >> --- a/fs/fat/fat.c
>> >> +++ b/fs/fat/fat.c
>> >> @@ -34,6 +34,12 @@
>> >>
>> >>  #include 
>> >>  #include 
>> >>
>> >> +#ifdef CONFIG_SUPPORT_VFAT
>> >> +#define VFAT_ENABLED 1
>> >> +#else
>> >> +#define VFAT_ENABLED 0
>> >> +#endif
>> >
>> > [...]
>> >
>> > Make it static const int maybe ?
>>
>> I hesitate to make them static const, I can't figure why it's better
>> to use static const variable instead of defines.
>> Could you enlighten me ?
>
> Because you get the type-checking. Preprocessor is evil ;-)
>
> Best regards,
> Marek Vasut

Ok ! Thanks, I'll resend it with the change.


Richard.
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Marek Vasut]

Dear Richard Genoud,

> 2012/12/13 Marek Vasut :
> > Dear Richard Genoud,
> > 
> >> 2012/12/13 Marek Vasut :
> >> > Dear Richard Genoud,
> >> > 
> >> >> ifdefs in the code are making it harder to read.
> >> >> The use of simple if(VFAT_ENABLED) makes no more code and is cleaner.
> >> >> (the code is discarded by the compiler and linker instead of the
> >> >> preprocessor.)
> >> >> 
> >> >> and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is not
> >> >> defined.
> >> >> 
> >> >> Signed-off-by: Richard Genoud 
> >> >> ---
> >> >> 
> >> >>  fs/fat/fat.c   |   55
> >> >> 
> >> >> +++
> >> >> fs/fat/fat_write.c | 11 ++---
> >> >> 
> >> >>  2 files changed, 32 insertions(+), 34 deletions(-)
> >> >> 
> >> >> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> >> >> index 393c378..c79e3e3 100644
> >> >> --- a/fs/fat/fat.c
> >> >> +++ b/fs/fat/fat.c
> >> >> @@ -34,6 +34,12 @@
> >> >> 
> >> >>  #include 
> >> >>  #include 
> >> >> 
> >> >> +#ifdef CONFIG_SUPPORT_VFAT
> >> >> +#define VFAT_ENABLED 1
> >> >> +#else
> >> >> +#define VFAT_ENABLED 0
> >> >> +#endif
> >> > 
> >> > [...]
> >> > 
> >> > Make it static const int maybe ?
> >> 
> >> I hesitate to make them static const, I can't figure why it's better
> >> to use static const variable instead of defines.
> >> Could you enlighten me ?
> > 
> > Because you get the type-checking. Preprocessor is evil ;-)
> > 
> > Best regards,
> > Marek Vasut
> 
> Ok ! Thanks, I'll resend it with the change.

Thanks!

Yes, preprocessor eats kittens too ;-)

Best regards,
Marek Vasut
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[U-Boot] [PATCHv2] FAT: remove ifdefs to make the code more readable

[Richard Genoud]

ifdefs in the code are making it harder to read.
The use of simple if(vfat_enabled) makes no more code and is cleaner.
(the code is discarded by the compiler instead of the preprocessor.)
NB: if -O0 is used, the code won't be discarded

and bonus, now the code compiles even if CONFIG_SUPPORT_VFAT is not
defined.

Signed-off-by: Richard Genoud 
---
 fs/fat/fat.c   |   55 +++
 fs/fat/fat_write.c |   11 ++---
 2 files changed, 32 insertions(+), 34 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 393c378..7c23b67 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -34,6 +34,12 @@
 #include 
 #include 
 
+#ifdef CONFIG_SUPPORT_VFAT
+static const int vfat_enabled = 1;
+#else
+static const int vfat_enabled = 0;
+#endif
+
 /*
  * Convert a string to lowercase.
  */
@@ -441,7 +447,6 @@ getit:
} while (1);
 }
 
-#ifdef CONFIG_SUPPORT_VFAT
 /*
  * Extract the file name information from 'slotptr' into 'l_name',
  * starting at l_name[*idx].
@@ -576,7 +581,6 @@ static __u8 mkcksum(const char name[8], const char ext[3])
 
return ret;
 }
-#endif /* CONFIG_SUPPORT_VFAT */
 
 /*
  * Get the directory entry associated with 'filename' from the directory
@@ -617,8 +621,8 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int 
startsect,
continue;
}
if ((dentptr->attr & ATTR_VOLUME)) {
-#ifdef CONFIG_SUPPORT_VFAT
-   if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
+   if (vfat_enabled &&
+   (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
(dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
prevcksum = ((dir_slot 
*)dentptr)->alias_checksum;
get_vfatname(mydata, curclust,
@@ -658,9 +662,7 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int 
startsect,
continue;
}
debug("vfatname: |%s|\n", l_name);
-   } else
-#endif
-   {
+   } else {
/* Volume label or VFAT entry */
dentptr++;
continue;
@@ -674,14 +676,15 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int 
startsect,
debug("Dentname == NULL - %d\n", i);
return NULL;
}
-#ifdef CONFIG_SUPPORT_VFAT
-   __u8 csum = mkcksum(dentptr->name, dentptr->ext);
-   if (dols && csum == prevcksum) {
-   prevcksum = 0x;
-   dentptr++;
-   continue;
+   if (vfat_enabled) {
+   __u8 csum = mkcksum(dentptr->name, 
dentptr->ext);
+   if (dols && csum == prevcksum) {
+   prevcksum = 0x;
+   dentptr++;
+   continue;
+   }
}
-#endif
+
get_name(dentptr, s_name);
if (dols) {
int isdir = (dentptr->attr & ATTR_DIR);
@@ -884,9 +887,9 @@ do_fat_read_at(const char *filename, unsigned long pos, 
void *buffer,
return -1;
}
 
-#ifdef CONFIG_SUPPORT_VFAT
-   debug("VFAT Support enabled\n");
-#endif
+   if (vfat_enabled)
+   debug("VFAT Support enabled\n");
+
debug("FAT%d, fat_sect: %d, fatlength: %d\n",
   mydata->fatsize, mydata->fat_sect, mydata->fatlength);
debug("Rootdir begins at cluster: %d, sector: %d, offset: %x\n"
@@ -952,10 +955,12 @@ do_fat_read_at(const char *filename, unsigned long pos, 
void *buffer,
continue;
}
 
-   csum = mkcksum(dentptr->name, dentptr->ext);
+   if (vfat_enabled)
+   csum = mkcksum(dentptr->name, dentptr->ext);
+
if (dentptr->attr & ATTR_VOLUME) {
-#ifdef CONFIG_SUPPORT_VFAT
-   if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
+   if (vfat_enabled &&
+   (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
(dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
prevcksum =
((dir_slot 
*)dentptr)->alias_checksum;
@@ -999,9 +1004,7 @@ do_fat_read_at(const char *fil

Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Marek Vasut]

Dear Tom Rini,

[...]

> Note that we don't use --gc-sections on all archs so I'm not sure we
> discard the unused VFAT functions on say ARM.

Valid point, Albert?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v3] spi/arm-pl022: Add support for ARM PL022 spi controller

[Armando Visconti]

On 12/13/2012 12:41 PM, Vipin KUMAR wrote:

From: Armando Visconti

This patch adds the support for the ARM PL022 SPI controller for the standard
variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX FIFO.

Signed-off-by: Armando Visconti
Signed-off-by: Vipin Kumar
---
Changes in v3
  Added void to spi_init arguments
  Used readl/writel in place of u16 accessors
  Fix: Provided address of register in place of value to readl/writel IO
   accessors

Tested with spear1340-evb



I recall now that SPI variant is same also on the new SoC (I2C cell is
different).

So no need to test over it.
SPEAr1340 is enough.

Ciao,
Arm
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Wolfgang Denk]

Dear Tom Rini,

In message <50c9d41b.7010...@ti.com> you wrote:
>
> > Where would the device addresses come from - out of the device
> > tree?
> 
> Board specific knowledge.  I'd be tempted to add UART3 (iirc) into the
> am335x_evm default build so that we can support the Industrial DevKit
> variant out of the box, rather than needing one of the other _uartN
> builds.  We can tell which board we're on at run-time already.

I'm afraid this doesn't scale.  You are opening a can of worms here.
The UART port may seem simple enough, but you set a precedent.  Next
comes some netowrk interface configuration, then if we have a RTC,
followed by LCD properties, and so on.

We have two ways to configure hardware properties:
- static configuration in the board config file
- dynamic configuration through the device tree

Please do not start adding other methods.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Richard Genoud]

2012/12/13 Marek Vasut :
> Dear Tom Rini,
>
> [...]
>
>> Note that we don't use --gc-sections on all archs so I'm not sure we
>> discard the unused VFAT functions on say ARM.
>
> Valid point, Albert?
>
> Best regards,
> Marek Vasut

I check and the code is discarded (on ARM at91sam9x5ek).
This is the case because the function to discard are all in the same
file (fat.c or fat_write.c).
The compiler will discard unused function with -Os. (but not with -O0)
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Re: [U-Boot] [PATCH 1/2] FAT: remove ifdefs to make the code more readable

[Tom Rini]

On Thu, Dec 13, 2012 at 03:24:08PM +0100, Richard Genoud wrote:
> 2012/12/13 Marek Vasut :
> > Dear Tom Rini,
> >
> > [...]
> >
> >> Note that we don't use --gc-sections on all archs so I'm not sure we
> >> discard the unused VFAT functions on say ARM.
> >
> > Valid point, Albert?
> >
> > Best regards,
> > Marek Vasut
> 
> I check and the code is discarded (on ARM at91sam9x5ek).
> This is the case because the function to discard are all in the same
> file (fat.c or fat_write.c).
> The compiler will discard unused function with -Os. (but not with -O0)

Thanks for checking.

-- 
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Re: [U-Boot] [PATCH 3/4] sf: Add configuration register writing

[Jagan Teki]

Hi Simon,

On Thu, Dec 13, 2012 at 4:03 AM, Simon Glass  wrote:
> Hi Jagan,
>
> On Wed, Dec 12, 2012 at 8:21 AM, Jagan Teki  wrote:
>> Hi Simon,
>>
>> On Wed, Dec 12, 2012 at 8:53 PM, Simon Glass  wrote:
>>> Hi Jagan,
>>>
>>> On Wed, Dec 12, 2012 at 7:20 AM, Jagan Teki  
>>> wrote:
 Hi Simon,

 On Wed, Dec 12, 2012 at 12:05 PM, Simon Glass  wrote:
> Hi,
>
> On Mon, Dec 10, 2012 at 6:42 AM, Jagannadha Sutradharudu Teki
>  wrote:
>> This patch provides support to program a flash config register.
>>
>> Configuration register contains the control bits used to configure
>> the different configurations and security features of a device.
>>
>> User need to set these bits through spi_flash_cmd_write_config()
>> based on their usage.
>>
>> Signed-off-by: Jagannadha Sutradharudu Teki 
>> ---
>>  drivers/mtd/spi/spi_flash.c  |   27 +++
>>  drivers/mtd/spi/spi_flash_internal.h |3 +++
>>  2 files changed, 30 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
>> index 800ed8b..a8f0af0 100644
>> --- a/drivers/mtd/spi/spi_flash.c
>> +++ b/drivers/mtd/spi/spi_flash.c
>> @@ -274,6 +274,33 @@ int spi_flash_cmd_write_status(struct spi_flash 
>> *flash, u8 sr)
>> return 0;
>>  }
>>
>> +int spi_flash_cmd_write_config(struct spi_flash *flash, u16 cr)
>> +{
>> +   u8 cmd;
>> +   int ret;
>> +
>> +   ret = spi_flash_cmd_write_enable(flash);
>> +   if (ret < 0) {
>> +   debug("SF: enabling write failed\n");
>> +   return ret;
>> +   }
>> +
>> +   cmd = CMD_WRITE_STATUS;
>> +   ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &cr, 2);
>
> Does this assume a particular endianness? Perhaps should put the
> values into a byte array instead?

 Yes it follows the endianness.
>>>
>>> My concern was more that u16 is being used to send two bytes. How about:
>>>
>>> u8 data[2];
>>
>> Means I need to send status on data[1] and config on data[0].?
>>
>>>
>>> put_unaligned_le16(cr, data)
>>
>> I couldn't understand this, may be for endianness.?
>
> Yes that's right. Just checking that your code will work correctly on
> a big-endian machine. Will it? It is normally not a good idea to cast
> a short into a char[2].

OK.

Let me explain my senario here.
in below function I am passing 0x0200
spi_flash_cmd_write_config(flash, 0x0200);

out of 2-byte data 0x0200 first 00 will pass as a status register value
and 0x02 will pass as a config value.it's took the bytes from LSB
onwards.

Can you please explain how put_unaligned_le16(cr, data will work
for this case?

Thanks,
Jagan.

>
> Regards,
> Simon
>
>>
>> Thanks,
>> Jagan.
>>
>>>

 On my QPP patch,
 ret = spi_flash_cmd_write_config(flash, 0x0200);

 where 02 is config and 00 is status register
 WRR have CMD+status+config => for CMD+16 data format.

 Let me know if you need any info.
>>>
>>> OK.
>>>
>>> Regards,
>>> Simon
>>>

 Thanks,
 Jagan.

>
>> +   if (ret) {
>> +   debug("SF: fail to write config register\n");
>> +   return ret;
>> +   }
>> +
>> +   ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
>> +   if (ret < 0) {
>> +   debug("SF: write config register timed out\n");
>> +   return ret;
>> +   }
>> +
>> +   return 0;
>> +}
>> +
>>  /*
>>   * The following table holds all device probe functions
>>   *
>> diff --git a/drivers/mtd/spi/spi_flash_internal.h 
>> b/drivers/mtd/spi/spi_flash_internal.h
>> index 141cfa8..9287778 100644
>> --- a/drivers/mtd/spi/spi_flash_internal.h
>> +++ b/drivers/mtd/spi/spi_flash_internal.h
>> @@ -77,6 +77,9 @@ static inline int spi_flash_cmd_write_disable(struct 
>> spi_flash *flash)
>>  /* Program the status register. */
>>  int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
>>
>> +/* Program the config register. */
>> +int spi_flash_cmd_write_config(struct spi_flash *flash, u16 cr);
>> +
>>  /*
>>   * Same as spi_flash_cmd_read() except it also claims/releases the SPI
>>   * bus. Used as common part of the ->read() operation.
>> --
>> 1.7.0.4
>>
>> ___
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>
> Regards,
> Simon
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Re: [U-Boot] [PATCH 4/4] sf: Add Quad-input Page Program(32h) instruction support

[Jagan Teki]

Hi Simon,

On Thu, Dec 13, 2012 at 4:08 AM, Simon Glass  wrote:
> Hi Jagan,
>
> On Wed, Dec 12, 2012 at 8:52 AM, Jagan Teki  wrote:
>> Hi Simon,
>>
>> On Wed, Dec 12, 2012 at 12:11 PM, Simon Glass  wrote:
>>> Hi,
>>>
>>> On Mon, Dec 10, 2012 at 6:42 AM, Jagannadha Sutradharudu Teki
>>>  wrote:
 This patch provides support to program a flash using
 Quad-input Page Program(32h) instruction.

 This will effectively increases the data transfer rate
 by up to four times, as compared to the Page Program(PP) instruction.

 Respective flash drivers need to use spi_flash_cmd_write_multi_qpp()
 based on their usage.

 Signed-off-by: Jagannadha Sutradharudu Teki 
>>>
>>> It's great to have this support. A few comments below.
>>
>> Thanks.
>>
>>>
 ---
  README   |1 +
  common/cmd_sf.c  |   12 +++-
  drivers/mtd/spi/spi_flash.c  |  108 
 ++
  drivers/mtd/spi/spi_flash_internal.h |   13 
  include/spi_flash.h  |   12 
  5 files changed, 144 insertions(+), 2 deletions(-)

 diff --git a/README b/README
 index 5a86ae9..a01de13 100644
 --- a/README
 +++ b/README
 @@ -869,6 +869,7 @@ The following options need to be configured:
 CONFIG_CMD_SETGETDCR  Support for DCR Register access
   (4xx only)
 CONFIG_CMD_SF   * Read/write/erase SPI NOR flash
 +   CONFIG_CMD_SF_QPP   * Program SPI flash using 
 Quad-input Page Program
 CONFIG_CMD_SHA1SUMprint sha1 memory digest
   (requires CONFIG_CMD_MEMORY)
 CONFIG_CMD_SOURCE "source" command Support
 diff --git a/common/cmd_sf.c b/common/cmd_sf.c
 index 5ac1d0c..a449d2c 100644
 --- a/common/cmd_sf.c
 +++ b/common/cmd_sf.c
 @@ -228,6 +228,10 @@ static int do_spi_flash_read_write(int argc, char * 
 const argv[])
 ret = spi_flash_update(flash, offset, len, buf);
 else if (strcmp(argv[0], "read") == 0)
 ret = spi_flash_read(flash, offset, len, buf);
 +#ifdef CONFIG_CMD_SF_QPP
 +   else if (strcmp(argv[0], "write.qpp") == 0)
 +   ret = spi_flash_write_qpp(flash, offset, len, buf);
 +#endif
 else
 ret = spi_flash_write(flash, offset, len, buf);

 @@ -300,7 +304,7 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, 
 int argc, char * const argv[
 }

 if (strcmp(cmd, "read") == 0 || strcmp(cmd, "write") == 0 ||
 -   strcmp(cmd, "update") == 0)
 +   strcmp(cmd, "update") == 0 || strcmp(cmd, "write.qpp") == 0)
 ret = do_spi_flash_read_write(argc, argv);
 else if (strcmp(cmd, "erase") == 0)
 ret = do_spi_flash_erase(argc, argv);
 @@ -327,5 +331,9 @@ U_BOOT_CMD(
 "sf erase offset [+]len - erase `len' bytes from 
 `offset'\n"
 " `+len' round up `len' to block 
 size\n"
 "sf update addr offset len  - erase and write `len' bytes from 
 memory\n"
 -   " at `addr' to flash at `offset'"
 +   " at `addr' to flash at `offset'\n"
 +#ifdef CONFIG_CMD_SF_QPP
 +   "sf write.qpp addr offset len   - write `len' bytes from memory\n"
 +   " at `addr' to flash at `offset' 
 using Quad-input Page Program(32h)"
 +#endif
  );
 diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
 index a8f0af0..3545f59 100644
 --- a/drivers/mtd/spi/spi_flash.c
 +++ b/drivers/mtd/spi/spi_flash.c
 @@ -122,6 +122,114 @@ int spi_flash_cmd_write_multi(struct spi_flash 
 *flash, u32 offset,
 return ret;
  }

 +#ifdef CONFIG_CMD_SF_QPP
 +int spi_flash_set_quad_enable_bit(struct spi_flash *flash)
 +{
 +   u8 cmd = CMD_READ_CONFIG;
 +   u8 data = 0;
 +   int ret;
 +
 +   ret = spi_flash_read_common(flash,
 +   &cmd, sizeof(cmd), &data, sizeof(data));
 +   if (ret < 0) {
 +   debug("SF: fail to read config register\n");
 +   return ret;
 +   }
 +
 +   if (data & 0x2) {
>>>
>>> Can we have defines/enums for this please?
>>
>> Yes I will do.
>>
>>>
 +   debug("SF: quad enable bit is already set.\n");
 +   return ret;
 +   } else {
 +   debug("SF: need to set quad enable bit\n");
 +
 +   ret = spi_flash_cmd_write_config(flash, 0x0200);
>>>
>>> and here?
>>
>> Ok.
>>
>>>

Re: [U-Boot] [PATCH 01/11] usb: net: asix: Do a fast init if link already established

[Marek Vasut]

Dear Simon Glass,

> The Asix driver takes the link down during init() and then brings it back
> up. This commit changes this so that if a link has already been
> established successfully we simply check that the link is still good.
> 
> Also fix up asix_halt() to actually halt RX on the interface. Previously
> this was not done, so the device would continue to operate evern when
> halted, violating a U-Boot requirement.
> 
> This reduces the delay between successive network commands.
> Signed-off-by: Simon Glass 

Joe, this is yours. Gimme a go/no-go and an Ack ;-)

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 02/11] usb: ehci: Add 64-bit controller support

[Marek Vasut]

Dear Simon Glass,

> From: Vincent Palatin 
> 
> On EHCI controller with 64-bit address space support, we must initialize
> properly the high word for the PCI bus master accesses.
> 
> Signed-off-by: Vincent Palatin 
> Signed-off-by: Simon Glass 
> ---
>  drivers/usb/host/ehci-hcd.c |3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> index 7f98a63..20309ad 100644
> --- a/drivers/usb/host/ehci-hcd.c
> +++ b/drivers/usb/host/ehci-hcd.c
> @@ -870,6 +870,9 @@ int usb_lowlevel_init(int index, void **controller)
>   if (ehci_hcd_init(index, &ehcic[index].hccr, &ehcic[index].hcor))
>   return -1;
>  #endif
> + /* Set the high address word (aka segment) for 64-bit controller */
> + if (ehci_readl(&ehcic[index].hccr->cr_hccparams) & 1)
> + ehci_writel(ehcic[index].hcor->or_ctrldssegment, 0);
> 
>   qh_list = &ehcic[index].qh_list;

Applied, thanks

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 03/11] usb: ehci: generic PCI support

[Marek Vasut]

Dear Simon Glass,

> From: Vincent Palatin 
> 
> Instead of hardcoding the PCI IDs on the USB controller, use the PCI
> class to detect them.
> 
> Ensure the busmaster bit is properly set in the PCI configuration.
> 
> Signed-off-by: Simon Glass 
> ---
>  drivers/usb/host/ehci-pci.c |   37 +
>  1 files changed, 37 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
> index 29af02d..0dc0e6e 100644
> --- a/drivers/usb/host/ehci-pci.c
> +++ b/drivers/usb/host/ehci-pci.c
> @@ -32,6 +32,34 @@ static struct pci_device_id ehci_pci_ids[] = {
>   {0x12D8, 0x400F},   /* Pericom */
>   {0, 0}
>  };
> +#else
> +static pci_dev_t ehci_find_class(void)
> +{
> + int bus;
> + int devnum;
> + pci_dev_t bdf;
> + uint32_t class;
> +
> + for (bus = 0; bus < pci_last_busno(); bus++) {
> + for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES-1; devnum++) {
> + pci_read_config_dword(PCI_BDF(bus, devnum, 0),
> +   PCI_CLASS_REVISION, &class);
> + if (class >> 16 == 0x)
> + continue;
> +
> + for (bdf = PCI_BDF(bus, devnum, 0);
> + bdf <= PCI_BDF(bus, devnum,
> + PCI_MAX_PCI_FUNCTIONS - 1);
> + bdf += PCI_BDF(0, 0, 1)) {
> + pci_read_config_dword(bdf, PCI_CLASS_REVISION,
> +   &class);
> + if (class >> 8 == 0x0c0320)

Can we at least describe this magic please?

> + return bdf;
> + }
> + }
> + }
> + return -1;

Let's try to use errno.h please. It won't be consistent for a while, but we'll 
get there.

> +}
>  #endif
> 
>  /*
> @@ -41,8 +69,13 @@ static struct pci_device_id ehci_pci_ids[] = {
>  int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor
> **hcor) {
>   pci_dev_t pdev;
> + uint32_t cmd;
> 
> +#ifdef CONFIG_PCI_EHCI_DEVICE
>   pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
> +#else
> + pdev = ehci_find_class();
> +#endif
>   if (pdev == -1) {
>   printf("EHCI host controller not found\n");
>   return -1;
> @@ -57,6 +90,10 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
> struct ehci_hcor **hcor) (uint32_t)*hccr, (uint32_t)*hcor,
>   (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
> 
> + /* enable busmaster */
> + pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
> + cmd |= PCI_COMMAND_MASTER;
> + pci_write_config_dword(pdev, PCI_COMMAND, cmd);
>   return 0;
>  }

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 04/11] usb: ehci: Support interrupt transfers via periodic list

[Marek Vasut]

Dear Simon Glass,

> From: Patrick Georgi 
> 
> Interrupt transfers aren't meant to be used from the async list
> (the EHCI spec indicates trouble with low/full-speed intr on async).
> 
> Build a periodic list instead, and provide an API to make use of it.
> Then, use that API from the existing interrupt transfer API.
> 
> This provides support for USB keyboards using EHCI.
> 
> Signed-off-by: Patrick Georgi 
> Signed-off-by: Simon Glass 
[...]

Looks good in general. Clear up those ToDos please. Also, some while() cycles 
are endless, make use of some timeout please.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 06/11] usb: ehci: Add timeout on interrupt endpoint operations

[Marek Vasut]

Dear Simon Glass,

> From: Vincent Palatin 
> 
> Ensure we cannot get stuck in the keyboard scanning if something wrong
> happens (USB device unplugged or fatal I/O error)
> 
> Signed-off-by: Vincent Palatin 
> 
> Signed-off-by: Simon Glass 
> ---

I like it. Let's use errno.h and rebase on top of u-boot-usb.git ... I just 
pushed it.

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 07/11] usb: usbeth: smsc95xx: remove EEPROM loaded check

[Marek Vasut]

Dear Simon Glass,

> From: Michael Spang 
> 
> [port of Linux kernel commit bcd218be5aeb by Steve Glendinning]
> 
> The eeprom read & write commands currently check the E2P_CMD_LOADED_ bit is
> set before allowing any operations.  This prevents any reading or writing
> unless a correctly programmed EEPROM is installed.
> 
> Signed-off-by: Michael Spang 
> Signed-off-by: Simon Glass 

Acked-by: Marek Vasut 

> ---
>  drivers/usb/eth/smsc95xx.c |4 
>  1 files changed, 0 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c
> index dc5ca65..fd8f8a7 100644
> --- a/drivers/usb/eth/smsc95xx.c
> +++ b/drivers/usb/eth/smsc95xx.c
> @@ -265,10 +265,6 @@ static int smsc95xx_eeprom_confirm_not_busy(struct
> ueth_data *dev)
> 
>   do {
>   smsc95xx_read_reg(dev, E2P_CMD, &val);
> - if (!(val & E2P_CMD_LOADED_)) {
> - debug("No EEPROM present\n");
> - return -1;
> - }
>   if (!(val & E2P_CMD_BUSY_))
>   return 0;
>   udelay(40);

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 08/11] usb: Clean up newly allocated device nodes in case of configuration failure

[Marek Vasut]

Dear Simon Glass,

> From: Milind Choudhary 
> 
> If probe of a newly connected device fails for some reason, clean up
> the allocated entry in usb_dev array.

Applied, thanks

> Signed-off-by: Milind Choudhary 
> Signed-off-by: Simon Glass 
> ---
>  common/usb.c |   12 
>  common/usb_hub.c |2 ++
>  include/usb.h|1 +
>  3 files changed, 15 insertions(+), 0 deletions(-)
> 
> diff --git a/common/usb.c b/common/usb.c
> index ac9b4ca..6fc0fc1 100644
> --- a/common/usb.c
> +++ b/common/usb.c
> @@ -805,6 +805,18 @@ struct usb_device *usb_alloc_new_device(void
> *controller) return &usb_dev[dev_index - 1];
>  }
> 
> +/*
> + * Free the newly created device node.
> + * Called in error cases where configuring a newly attached
> + * device fails for some reason.
> + */
> +void usb_free_device(void)
> +{
> + dev_index--;
> + USB_PRINTF("Freeing device node: %d\n", dev_index);
> + memset(&usb_dev[dev_index], 0, sizeof(struct usb_device));
> + usb_dev[dev_index].devnum = -1;
> +}
> 
>  /*
>   * By the time we get here, the device has gotten a new device ID
> diff --git a/common/usb_hub.c b/common/usb_hub.c
> index e4a1201..a3c5f22 100644
> --- a/common/usb_hub.c
> +++ b/common/usb_hub.c
> @@ -259,6 +259,8 @@ void usb_hub_port_connect_change(struct usb_device
> *dev, int port) /* Run it through the hoops (find a driver, etc) */
>   if (usb_new_device(usb)) {
>   /* Woops, disable the port */
> + usb_free_device();
> + dev->children[port] = NULL;
>   USB_HUB_PRINTF("hub: disabling port %d\n", port + 1);
>   usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_ENABLE);
>   }
> diff --git a/include/usb.h b/include/usb.h
> index 8d8a2c9..d79c865 100644
> --- a/include/usb.h
> +++ b/include/usb.h
> @@ -392,5 +392,6 @@ int hub_port_reset(struct usb_device *dev, int port,
>  struct usb_device *usb_alloc_new_device(void *controller);
> 
>  int usb_new_device(struct usb_device *dev);
> +void usb_free_device(void);
> 
>  #endif /*_USB_H_ */

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 09/11] usb: properly detect empty mass storage media reader

[Marek Vasut]

Dear Simon Glass,

> From: Vincent Palatin 
> 
> When a USB card reader is empty, it will return "Not Ready - medium not
> present" as Key Code Qualifier. In that situation, it's useless waiting
> for the full timeout since the result won't change until the user
> inserts a card.

Applied, thanks!

> Signed-off-by: Vincent Palatin 
> Signed-off-by: Vadim Bendebury 
> Signed-off-by: Simon Glass 
> ---
>  common/usb_storage.c |   10 ++
>  1 files changed, 10 insertions(+), 0 deletions(-)
> 
> diff --git a/common/usb_storage.c b/common/usb_storage.c
> index 2d92ee1..fb322b4 100644
> --- a/common/usb_storage.c
> +++ b/common/usb_storage.c
> @@ -970,6 +970,16 @@ static int usb_test_unit_ready(ccb *srb, struct
> us_data *ss) return 0;
>   }
>   usb_request_sense(srb, ss);
> + /*
> +  * Check the Key Code Qualifier, if it matches
> +  * "Not Ready - medium not present"
> +  * (the sense Key equals 0x2 and the ASC is 0x3a)
> +  * return immediately as the medium being absent won't change
> +  * unless there is a user action.
> +  */
> + if ((srb->sense_buf[2] == 0x02) &&
> + (srb->sense_buf[12] == 0x3a))
> + return -1;
>   mdelay(100);
>   } while (retries--);

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 03/11] usb: ehci: generic PCI support

[Vincent Palatin]

On Thu, Dec 13, 2012 at 9:30 AM, Marek Vasut  wrote:
> Dear Simon Glass,
>
>> From: Vincent Palatin 
>>
>> Instead of hardcoding the PCI IDs on the USB controller, use the PCI
>> class to detect them.
>>
>> Ensure the busmaster bit is properly set in the PCI configuration.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>  drivers/usb/host/ehci-pci.c |   37 +
>>  1 files changed, 37 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
>> index 29af02d..0dc0e6e 100644
>> --- a/drivers/usb/host/ehci-pci.c
>> +++ b/drivers/usb/host/ehci-pci.c
>> @@ -32,6 +32,34 @@ static struct pci_device_id ehci_pci_ids[] = {
>>   {0x12D8, 0x400F},   /* Pericom */
>>   {0, 0}
>>  };
>> +#else
>> +static pci_dev_t ehci_find_class(void)
>> +{
>> + int bus;
>> + int devnum;
>> + pci_dev_t bdf;
>> + uint32_t class;
>> +
>> + for (bus = 0; bus < pci_last_busno(); bus++) {
>> + for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES-1; devnum++) {
>> + pci_read_config_dword(PCI_BDF(bus, devnum, 0),
>> +   PCI_CLASS_REVISION, &class);
>> + if (class >> 16 == 0x)
>> + continue;
>> +
>> + for (bdf = PCI_BDF(bus, devnum, 0);
>> + bdf <= PCI_BDF(bus, devnum,
>> + PCI_MAX_PCI_FUNCTIONS - 1);
>> + bdf += PCI_BDF(0, 0, 1)) {
>> + pci_read_config_dword(bdf, PCI_CLASS_REVISION,
>> +   &class);
>> + if (class >> 8 == 0x0c0320)
>
> Can we at least describe this magic please?

The PCI class word is something like that :
class = [31:24] class code [23:16] subclass [15:8] Prog if [7:0] Revision ID
For this use case :
class code = 0x0C (Serial bus controller)
subclass = 0x03 (USB controller)
Program interface = 0x20 (EHCI)

This is available in include/pci_ids.h as "#define
PCI_CLASS_SERIAL_USB_EHCI   0x0c0320"
so just replacing the numeric constant by this define should be ok ?

>> + return bdf;
>> + }
>> + }
>> + }
>> + return -1;
>
> Let's try to use errno.h please. It won't be consistent for a while, but we'll
> get there.
>
>> +}
>>  #endif
>>
>>  /*
>> @@ -41,8 +69,13 @@ static struct pci_device_id ehci_pci_ids[] = {
>>  int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor
>> **hcor) {
>>   pci_dev_t pdev;
>> + uint32_t cmd;
>>
>> +#ifdef CONFIG_PCI_EHCI_DEVICE
>>   pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
>> +#else
>> + pdev = ehci_find_class();
>> +#endif
>>   if (pdev == -1) {
>>   printf("EHCI host controller not found\n");
>>   return -1;
>> @@ -57,6 +90,10 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
>> struct ehci_hcor **hcor) (uint32_t)*hccr, (uint32_t)*hcor,
>>   (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
>>
>> + /* enable busmaster */
>> + pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
>> + cmd |= PCI_COMMAND_MASTER;
>> + pci_write_config_dword(pdev, PCI_COMMAND, cmd);
>>   return 0;
>>  }
>
> Best regards,
> Marek Vasut
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Re: [U-Boot] [PATCH 03/11] usb: ehci: generic PCI support

[Marek Vasut]

Dear Vincent Palatin,

> On Thu, Dec 13, 2012 at 9:30 AM, Marek Vasut  wrote:
> > Dear Simon Glass,
> > 
> >> From: Vincent Palatin 
> >> 
> >> Instead of hardcoding the PCI IDs on the USB controller, use the PCI
> >> class to detect them.
> >> 
> >> Ensure the busmaster bit is properly set in the PCI configuration.
> >> 
> >> Signed-off-by: Simon Glass 
> >> ---
> >> 
> >>  drivers/usb/host/ehci-pci.c |   37
> >>  + 1 files changed, 37
> >>  insertions(+), 0 deletions(-)
> >> 
> >> diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
> >> index 29af02d..0dc0e6e 100644
> >> --- a/drivers/usb/host/ehci-pci.c
> >> +++ b/drivers/usb/host/ehci-pci.c
> >> @@ -32,6 +32,34 @@ static struct pci_device_id ehci_pci_ids[] = {
> >> 
> >>   {0x12D8, 0x400F},   /* Pericom */
> >>   {0, 0}
> >>  
> >>  };
> >> 
> >> +#else
> >> +static pci_dev_t ehci_find_class(void)
> >> +{
> >> + int bus;
> >> + int devnum;
> >> + pci_dev_t bdf;
> >> + uint32_t class;
> >> +
> >> + for (bus = 0; bus < pci_last_busno(); bus++) {
> >> + for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES-1; devnum++)
> >> { + pci_read_config_dword(PCI_BDF(bus, devnum, 0),
> >> +   PCI_CLASS_REVISION,
> >> &class); + if (class >> 16 == 0x)
> >> + continue;
> >> +
> >> + for (bdf = PCI_BDF(bus, devnum, 0);
> >> + bdf <= PCI_BDF(bus, devnum,
> >> + PCI_MAX_PCI_FUNCTIONS -
> >> 1); + bdf += PCI_BDF(0, 0, 1)) { + 
> >>pci_read_config_dword(bdf,
> >> PCI_CLASS_REVISION, +  
> >> &class);
> >> + if (class >> 8 == 0x0c0320)
> > 
> > Can we at least describe this magic please?
> 
> The PCI class word is something like that :
> class = [31:24] class code [23:16] subclass [15:8] Prog if [7:0] Revision
> ID For this use case :
> class code = 0x0C (Serial bus controller)
> subclass = 0x03 (USB controller)
> Program interface = 0x20 (EHCI)
> 
> This is available in include/pci_ids.h as "#define
> PCI_CLASS_SERIAL_USB_EHCI   0x0c0320"
> so just replacing the numeric constant by this define should be ok ?

Of course :)
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Stephen Warren]

On 12/13/2012 03:29 AM, Wolfgang Denk wrote:
> Dear Stephen Warren,
> 
> In message <50c918a5.6090...@wwwdotorg.org> you wrote:
>>
>>> This seems reasonable in the interim while we are hard-coding things
>>> but needing more flexibility. How do you plan to configure the actual
>>> address - is it with the ODM data or FDT?
>>
>> I intend to use the ODMDATA. This already includes a field that
>> specifies which UART to use. I'm working on some patches (to
>> BCT-generation tools and U-Boot) that define an ODMDATA2 value, which
>> will indicate the complete pinmux configuration required for the UART,
>> so everything can be self-contained. I'm fairly close to publishing
>> these patches.
> 
> Arghh... Do we really, really have to invent yet another way to pass
> hardware configuration information?  Especially one totally
> incompatible to any other system?

This is a special case for the console UART. The idea is to get that up
and running well before device tree is parsed in any way. For example,
Tegra's SPL doesn't touch the device tree in any way (or even know one
exists) but does want to print (possibly error) messages in a generic
fashion. Similarly, many problems could occur before the device tree is
parsed (e.g. the user forgets to provide one...), and having
specifically the console UART set up before that allows those errors to
be reported, rather than requiring a JTAG or similar debugger.

My intent is that ODMDATA will definitely only be used for the console
UART, and will NOT be used for anything else like LCD, RTC, ... Those
other devices will certainly be configured via device tree.
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[U-Boot] Booting an i.MX53 from NAND with u-boot

[Bernhard Walle]

Hello,

we have a custom board with an Freescale i.MX 53 CPU and NAND flash
(MT29F1G08ABADAWP if it matters). It's quite similar to the i.MX 53 LOCO
("Quick Start Board"), but the LOCO has no Flash and only boots from
Micro SD card.

I'm using u-boot 2012.07 from mainline with some additional patches,
notably the patch to add i.M53 support to mxc_nand driver from
Benoît Thébaudeau that has been posted on the mailing list recently.

When booting from SD card, everything is fine, i.e. I can read and write
the flash from u-boot. And also from Linux. However, the goal is to boot
from NAND. :)

I used the kobs-ng-11.09.01 software from Freescale to write the
bootloader to NAND, since it also writes the necessary boot header and
has support for bad pages. Is it correct to use 'u-boot.bin' (and not
'u-boot.imx')?

There's some information floating around in the internet that I need
some proprietary tool to convert 'u-boot.bin' to some 'streaming'
format. But that information is for i.MX 28 and not for i.MX 53. I found
also tools/mxsboot.c in the u-boot sources which seems to be a
replacement for kobs-ng.

Some ideas what we're doing wrong or how to debug this? Of course it can
be also the boot GPIO settings, but I wanted to ask here if the
procedure looks correct from u-boot side.


Regards,
Bernhard

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Re: [U-Boot] Conflicting commits for seaboard USB keyboard handling

[Albert ARIBAUD]

Hi Tom,

On Mon, 10 Dec 2012 14:15:10 -0700, Tom Warren
 wrote:
> u-boot-arm/master and u-boot-tegra/next should have the same base
> commit (b8a7c46), so merging them isn't a big deal, and goes smoothly
> for me. If I then take u-boot/master and merge it, I see a conflict in
> drivers/power/power_fls.c and include/configs/mx35pdk.h and
> mx53loco.h, but no problems with Tegra code.  I could resolve those
> conflicts and continue with the rebase, but ...
> 
> Correct me if I'm wrong, but u-boot-tegra and u-boot-usb are both
> pulled into u-boot-arm, and (I thought) u-boot-arm is then (or
> eventually) pulled into u-boot/master.  I don't pull from u-boot-usb
> (or any other 'sub' repo), since that would appear to create conflicts
> when Albert pulls into u-boot-arm. I also don't pull from
> u-boot/master, since it's essentially 2 levels above me.
> 
> Albert - if you can, please show me exactly what fetch/merge or rebase
> command sequence is failing for you. I'm still not clear on what the
> exact merge conflict error is, nor how to fix it.  Or Allen, if you
> have better visibility into exactly what the merge conflict is w/Tegra
> that I'm just not seeing, maybe you could provide either a patchset
> that'll fix it or steps I can take to do the same.

As for what I did, it was simply to try and merge u-boot-tegra into
u-boot-arm.

Regarding u-boot-usb, it is not usually pulled into u-boot-arm; but
if it was needed by, and pulled into, u-boot-tegra, then it would have
automatically been pulled into u-boot-arm when I fetched u-boot-tegra,
and merged when I did the merge. Would it not?

Amicalement,
-- 
Albert.
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Re: [U-Boot] please pull u-boot-samsung/resolve

[Albert ARIBAUD]

Hi Minkyu,

On Tue, 11 Dec 2012 20:10:06 +0900, Minkyu Kang 
wrote:
> Dear Albert,
> 
> The following changes since commit fd4d564b3c80b111f18c93adb14233a6a7ddb0e9:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-x86 (2012-12-07 08:47:59 
> -0700)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-samsung resolve
> 
> for you to fetch changes up to fbef8e6e7f1233ed20f8c5045e12c9cf31b43540:
> 
>   universal_c210: check the NULL pointer when get the PMIC (2012-12-11 
> 17:37:28 +0900)
> 
> 
> Albert ARIBAUD (1):
>   Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
> 
> Allen Martin (1):
>   tegra: add CONSOLE_MUX support to tegra-kbc
> 
> Ashok Kumar Reddy (1):
>   ARM: arm1176: Define arch_cpu_init() for s3c64xx
> 
> Benoît Thébaudeau (17):
>   arm1136: Fix enable_caches()
>   mx31: Move EHCI definitions to ehci-fsl.h
>   ehci-mxc: Clean up
>   ehci-mx5: Clean up
>   ehci-mx5: Fix OC_DIS usage
>   ehci-mx5: Fix OPM usage
>   ehci-mx5: Fix *PM usage for i.MX53
>   ehci-mx5: Add missing OC_DIS for i.MX53
>   ehci-mxc: Make EHCI power/oc polarities configurable
>   ehci-mxc: Make i.MX25 EHCI configurable
>   ehci-mxc: Define host offsets
>   ehci-mxc: Add support for i.MX35
>   mx35pdk: Add support for OTG
>   ehci-mx5/6: Make board_ehci_hcd_init() optional
>   ehci-mxc: Fix host power mask bit for i.MX35
>   ehci-mxc: Fix host power mask bit for i.MX25
>   mx5: Mark lowlevel_init board-specific code
> 
> Chander Kashyap (1):
>   Exynos5250: Enable PXE Support
> 
> Fabio Estevam (24):
>   mx25pdk: Include CONFIG_MX25
>   mx25pdk: Add esdhc support
>   pmic_fsl: Introduce FSL_PMIC_I2C_LENGTH
>   mx25: Place common functions into sys_proto.h
>   pmic: Add support for mc34704
>   mx25pdk: Add Ethernet support
>   mx53loco: Allow booting a zImage kernel
>   mx25pdk: Allow booting a zImage kernel
>   mx51evk: Allow booting a zImage kernel
>   mx35pdk: Allow booting a zImage kernel
>   mx6qsabre_common: Allow booting a zImage kernel
>   mx5: Align SPI CS naming with i.MX53 reference manual
>   mx5: Print CSPI clock in 'clock' command
>   spi: mxc_spi: Fix handling of chip select
>   spi: mxc_spi: Fix spi clock glitch durant reset
>   mx6: clock: Only show CSPI clock if CSPI is enabled
>   mx28evk: Configure CONFIG_BOOTDELAY to one second
>   mx53loco: Configure CONFIG_BOOTDELAY to one second
>   mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second
>   mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second
>   mx51evk: Configure CONFIG_BOOTDELAY to one second
>   mx25pdk: Configure CONFIG_BOOTDELAY to one second
>   mx31pdk: Configure CONFIG_BOOTDELAY to one second
>   mx35pdk: Configure CONFIG_BOOTDELAY to one second
> 
> Hatim RV (3):
>   EXYNOS: Add clock for SPI
>   EXYNOS5: Add base address for SPI
>   EXYNOS5: Enable SPI
> 
> Marek Vasut (3):
>   dm: wdt: Move s5p watchdog timer to drivers/watchdog/
>   mx28: Fix typo in POWER_MINPWR_VBG_OFF
>   mx28: Fix typo in POWER_DCLIMITS_NEGLIMIT_OFFSET
> 
> Mayuresh Kulkarni (1):
>   tegra: Enable display/lcd support on Seaboard
> 
> Minkyu Kang (6):
>   ARCH: EXYNOS: add support to match product id
>   EXYNOS: Clock: Add common function for pll rate calculation
>   s3c64xx: fix the compiler error and warning
>   Merge branch 'master' of git://git.denx.de/u-boot into resolve
>   universal_c210: fix compiler error and compiler warning
>   universal_c210: check the NULL pointer when get the PMIC
> 
> Piotr Wilczek (12):
>   arm:exynos4:trats: Correct SDRAM configuration for trats
>   arm:exynos4:trats: Fix SDRAM size
>   arm:exynos4:pinmux: Modify the gpio function for mmc
>   arm:exynos4:trats: Use pinmux for mmc configuration
>   arm:exynos4:universal: Use pinmux for mmc configuration
>   arm:exynos4:universal: Eliminated low level init
>   arm: trats: Power down core 1
>   exynos4: universal_C210: use software SPI
>   misc:max8998 Add LDO macros
>   drivers: video: Add ld9040 video driver
>   drivers: video: fix image position
>   exynos4: universal_C210: add display support
> 
> Rajeshwari Shinde (16):
>   PMIC: MAX77686: Add support for MAX77686
>   SMDK5250: Config: Enable MAX77686 pmic chip
>   SOUND: SAMSUNG: Add I2S driver
>   SOUND: Add WM8994 codec
>   Sound: Add command for audio playback
>   EXYNOS: Add I2S registers
>   EXYNOS: Add parameters required by I2S
>   EXYNOS: Add pinmux for I2S
>   EXYNOS: Add I2S base address
>   EXYNOS: Add clock for I2S
>   SMDK5250: Enable Sound
>   EXYNOS5: Add pinmux support for SPI
>   SPI: Add SPI Driver for EXYNOS.
>   EXYNOS5: Enable SPI booting.
>   POWER: MAX77686: Modi

Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Wolfgang Denk]

Dear Stephen Warren,

In message <50ca1bb8.4000...@wwwdotorg.org> you wrote:
>
> > Arghh... Do we really, really have to invent yet another way to pass
> > hardware configuration information?  Especially one totally
> > incompatible to any other system?
> 
> This is a special case for the console UART. The idea is to get that up
> and running well before device tree is parsed in any way. For example,
> Tegra's SPL doesn't touch the device tree in any way (or even know one
> exists) but does want to print (possibly error) messages in a generic
> fashion. Similarly, many problems could occur before the device tree is
> parsed (e.g. the user forgets to provide one...), and having
> specifically the console UART set up before that allows those errors to
> be reported, rather than requiring a JTAG or similar debugger.
> 
> My intent is that ODMDATA will definitely only be used for the console
> UART, and will NOT be used for anything else like LCD, RTC, ... Those
> other devices will certainly be configured via device tree.

We've been there before, you know.

OK - what is the scope of visibility of such code?  Will it be
strictly board specific only?  Or SoC specific? Arch? Global?

Best regards,

Wolfgang Denk

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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Stephen Warren]

On 12/13/2012 01:36 PM, Wolfgang Denk wrote:
> Dear Stephen Warren,
> 
> In message <50ca1bb8.4000...@wwwdotorg.org> you wrote:
>>
>>> Arghh... Do we really, really have to invent yet another way to pass
>>> hardware configuration information?  Especially one totally
>>> incompatible to any other system?
>>
>> This is a special case for the console UART. The idea is to get that up
>> and running well before device tree is parsed in any way. For example,
>> Tegra's SPL doesn't touch the device tree in any way (or even know one
>> exists) but does want to print (possibly error) messages in a generic
>> fashion. Similarly, many problems could occur before the device tree is
>> parsed (e.g. the user forgets to provide one...), and having
>> specifically the console UART set up before that allows those errors to
>> be reported, rather than requiring a JTAG or similar debugger.
>>
>> My intent is that ODMDATA will definitely only be used for the console
>> UART, and will NOT be used for anything else like LCD, RTC, ... Those
>> other devices will certainly be configured via device tree.
> 
> We've been there before, you know.

I'm not quite sure what the implication is here.

> OK - what is the scope of visibility of such code?  Will it be
> strictly board specific only?  Or SoC specific? Arch? Global?

It's partially SoC-specific, partially global.

Note that by "all" and "global" here, I'm talking relative to all Tegra
SoCs, not about anything non-Tegra. "SoC-specific" means different for
Tegra20, Tegra30, Tegra114, etc.

In every Tegra SoC, the boot ROM reads a BCT (Boot Configuration Table)
at boot. The BCT contains e.g. SDRAM controller configuration and other
low-level boot information. The BCT is stored within the boot flash. The
ODMDATA fields are stored within the BCT. The offset of the ODMDATA
within the BCT is SoC-specific since the BCT structure is SoC-specific.

The ODMDATA for all Tegra SoCs includes fields that define (a) which
UART to use (so far, identical across all SoCs) (b) the pinmux
configuration to use, and other information (mainly SDRAM size at the
moment). Since the pinmux HW is SoC-specific, so is the exact format of
the UART pinmux configuration data.

For more details on Tegra BCTs, you may refer to:
ftp://download.nvidia.com/tegra-public-appnotes/index.html
http://nv-tegra.nvidia.com/gitweb/?p=tools/cbootimage.git;a=summary

Note that in the latter case, I haven't pushed out the patches which
document the UART pinmux fields yet, but will very soon; most likely as
soon as we've resolved this conversation.
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Tom Rini]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 12/13/12 15:45, Stephen Warren wrote:
> On 12/13/2012 01:36 PM, Wolfgang Denk wrote:
>> Dear Stephen Warren,
>> 
>> In message <50ca1bb8.4000...@wwwdotorg.org> you wrote:
>>> 
 Arghh... Do we really, really have to invent yet another way
 to pass hardware configuration information?  Especially one
 totally incompatible to any other system?
>>> 
>>> This is a special case for the console UART. The idea is to get
>>> that up and running well before device tree is parsed in any
>>> way. For example, Tegra's SPL doesn't touch the device tree in
>>> any way (or even know one exists) but does want to print
>>> (possibly error) messages in a generic fashion. Similarly, many
>>> problems could occur before the device tree is parsed (e.g. the
>>> user forgets to provide one...), and having specifically the
>>> console UART set up before that allows those errors to be
>>> reported, rather than requiring a JTAG or similar debugger.
>>> 
>>> My intent is that ODMDATA will definitely only be used for the
>>> console UART, and will NOT be used for anything else like LCD,
>>> RTC, ... Those other devices will certainly be configured via
>>> device tree.
>> 
>> We've been there before, you know.
> 
> I'm not quite sure what the implication is here.
> 
>> OK - what is the scope of visibility of such code?  Will it be 
>> strictly board specific only?  Or SoC specific? Arch? Global?
> 
> It's partially SoC-specific, partially global.

Right.  I see what Wolfgang was saying before, and I get it now.  This
is not how we want to open the can of worms for "lets do dynamic
locations of stuff".  We should start with being able to parse (some
form of the normal) device tree, and be able to say "I now know I have
a UART $HERE and $THERE".  And yes, that's too late for initial
console being in the right spot, at first, probably.  But now we've
moved in the direction of being able to dynamically assign things.
And from there we can move on and say "On ${SoC} we get a device tree
(that we can't quite parse as we don't have enough resources) AND
$some-data (OMDATA or an abbreviated device tree or $whatever), lets
translate that into something we can make use of very early rather
than a hard-coded initial console location"

In other words, we want to (re)start the conversation around lets get
device tree going.  Then we can deal with other things.

- -- 
Tom
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Stephen Warren]

On 12/13/2012 01:53 PM, Tom Rini wrote:
> On 12/13/12 15:45, Stephen Warren wrote:
>> On 12/13/2012 01:36 PM, Wolfgang Denk wrote:
>>> Dear Stephen Warren,
>>> 
>>> In message <50ca1bb8.4000...@wwwdotorg.org> you wrote:
 
> Arghh... Do we really, really have to invent yet another
> way to pass hardware configuration information?  Especially
> one totally incompatible to any other system?
 
 This is a special case for the console UART. The idea is to
 get that up and running well before device tree is parsed in
 any way. For example, Tegra's SPL doesn't touch the device
 tree in any way (or even know one exists) but does want to
 print (possibly error) messages in a generic fashion.
 Similarly, many problems could occur before the device tree
 is parsed (e.g. the user forgets to provide one...), and
 having specifically the console UART set up before that
 allows those errors to be reported, rather than requiring a
 JTAG or similar debugger.
 
 My intent is that ODMDATA will definitely only be used for
 the console UART, and will NOT be used for anything else like
 LCD, RTC, ... Those other devices will certainly be
 configured via device tree.
>>> 
>>> We've been there before, you know.
> 
>> I'm not quite sure what the implication is here.
> 
>>> OK - what is the scope of visibility of such code?  Will it be
>>>  strictly board specific only?  Or SoC specific? Arch? Global?
> 
>> It's partially SoC-specific, partially global.
> 
> Right.  I see what Wolfgang was saying before, and I get it now.
> This is not how we want to open the can of worms for "lets do
> dynamic locations of stuff".  We should start with being able to
> parse (some form of the normal) device tree, and be able to say "I
> now know I have a UART $HERE and $THERE".

So if Tegra were to statically define the location of all 5 on-SoC
UARTs, by defining CONFIG_SYS_NS16550_COM*, and then use the ODMDATA
to select which UART to use for the console, rather than using the
ODMDATA to dynamically change the value that CONFIG_SYS_NS16550_COM1
sets up, would that remove the objection? I haven't look into coding
that up, but I imagine it could be made to work...

> And yes, that's too late for initial console being in the right
> spot, at first, probably.  But now we've moved in the direction of
> being able to dynamically assign things.

I'm not sure about "at first"; on Tegra, I don't imagine the SPL would
ever use device tree. The only HW- (board-) specific thing that's
relevant to it is the UART and UART-pinmux, since the SPL only exists
to boot the main A9 cores, and doesn't ever access any kind of storage
device.

> And from there we can move on and say "On ${SoC} we get a device
> tree (that we can't quite parse as we don't have enough resources)
> AND $some-data (OMDATA or an abbreviated device tree or $whatever),
> lets translate that into something we can make use of very early
> rather than a hard-coded initial console location"

It seems like you're saying that once we have dynamic serial port
assignment working based on DT, you'll be fine using ODMDATA to
initialize the early console, but not before then? If so, I'm having a
hard time understanding why enabling the DT-based support blocks using
ODMDATA, since the code would be pretty orthogonal.
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Simon Glass]

Hi Stephen,

On Thu, Dec 13, 2012 at 1:07 PM, Stephen Warren  wrote:
> On 12/13/2012 01:53 PM, Tom Rini wrote:
>> On 12/13/12 15:45, Stephen Warren wrote:
>>> On 12/13/2012 01:36 PM, Wolfgang Denk wrote:
 Dear Stephen Warren,

 In message <50ca1bb8.4000...@wwwdotorg.org> you wrote:
>
>> Arghh... Do we really, really have to invent yet another
>> way to pass hardware configuration information?  Especially
>> one totally incompatible to any other system?
>
> This is a special case for the console UART. The idea is to
> get that up and running well before device tree is parsed in
> any way. For example, Tegra's SPL doesn't touch the device
> tree in any way (or even know one exists) but does want to
> print (possibly error) messages in a generic fashion.
> Similarly, many problems could occur before the device tree
> is parsed (e.g. the user forgets to provide one...), and
> having specifically the console UART set up before that
> allows those errors to be reported, rather than requiring a
> JTAG or similar debugger.
>
> My intent is that ODMDATA will definitely only be used for
> the console UART, and will NOT be used for anything else like
> LCD, RTC, ... Those other devices will certainly be
> configured via device tree.

 We've been there before, you know.
>>
>>> I'm not quite sure what the implication is here.
>>
 OK - what is the scope of visibility of such code?  Will it be
  strictly board specific only?  Or SoC specific? Arch? Global?
>>
>>> It's partially SoC-specific, partially global.
>>
>> Right.  I see what Wolfgang was saying before, and I get it now.
>> This is not how we want to open the can of worms for "lets do
>> dynamic locations of stuff".  We should start with being able to
>> parse (some form of the normal) device tree, and be able to say "I
>> now know I have a UART $HERE and $THERE".
>
> So if Tegra were to statically define the location of all 5 on-SoC
> UARTs, by defining CONFIG_SYS_NS16550_COM*, and then use the ODMDATA
> to select which UART to use for the console, rather than using the
> ODMDATA to dynamically change the value that CONFIG_SYS_NS16550_COM1
> sets up, would that remove the objection? I haven't look into coding
> that up, but I imagine it could be made to work...

Seems good to me.

>
>> And yes, that's too late for initial console being in the right
>> spot, at first, probably.  But now we've moved in the direction of
>> being able to dynamically assign things.
>
> I'm not sure about "at first"; on Tegra, I don't imagine the SPL would
> ever use device tree. The only HW- (board-) specific thing that's
> relevant to it is the UART and UART-pinmux, since the SPL only exists
> to boot the main A9 cores, and doesn't ever access any kind of storage
> device.

On Tegra, yes. On some chips, SPL accesses devices to read U-Boot.

In extremis we could use a very simple table (a C structure with a
couple of members) which is filled in by a tool from the device tree
as part of image creation, just to avoid the FDT overhead. However,
given that many of the SOCs I seem to be using have >100KB of SRAM,
it's not clear that we shouldn't just use FDT eventually.

>
>> And from there we can move on and say "On ${SoC} we get a device
>> tree (that we can't quite parse as we don't have enough resources)
>> AND $some-data (OMDATA or an abbreviated device tree or $whatever),
>> lets translate that into something we can make use of very early
>> rather than a hard-coded initial console location"
>
> It seems like you're saying that once we have dynamic serial port
> assignment working based on DT, you'll be fine using ODMDATA to
> initialize the early console, but not before then? If so, I'm having a
> hard time understanding why enabling the DT-based support blocks using
> ODMDATA, since the code would be pretty orthogonal.

Yes well dynamic console selection sounds find to me, ODMDATA or
otherwise. To me it is a Tegra feature that should be supported as
such. Perhaps we can allow the FDT console alias to specify "odmdata"
to mean that, and/or (as you suggest I think) set the console to
USE_ODMDATA, which then selects CONFIG_SYS_NS16550_COMx accordingly.

Regards,
Simon
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Re: [U-Boot] [PATCH v2] imls: Add support to list images in NAND device

[Scott Wood]

On 12/13/2012 12:10:58 AM, Vipin Kumar wrote:

Or better, just have one CONFIG_CMD_IMLS and have it operate on
whatever flash types are configured into U-Boot.



I didn't do it because until now the CONFIG_CMD_IMLS config is  
tightly bound with flash only eg config_cmd_default.h enables  
CONFIG_CMD_IMLS only when CONFIG_SYS_NO_FLASH is not defined. I  
thought there might be other places as well


Still, it might be better to fix that than to build upon a  
no-longer-accurate assumption.



+#if defined(CONFIG_CMD_IMLS_NAND)
+static void do_imls_nand(void)
+{
+   nand_info_t *nand;
+   int nand_dev = nand_curr_device;
+   size_t read_size;
+   loff_t off;
+   u8 buffer[512];


Why 512?



Basically there are 2 image types supported as of today.
 * Legacy: 64 byte header
 * FIT: < 512 byte header

After reading the first 512 bytes from each block of NAND, we try to  
validate the header and only if the header validation is successful,  
we malloc the space for the whole image and read the image into it


Do you really need 512 bytes for fdt_check_header() to work?


+   nand =&nand_info[nand_dev];
+   if (!nand->name || !nand->size)
+   continue;
+
+   for (off = 0; off<  nand->size; off += nand->erasesize)
{
+   int ret;
+   void *imgdata;
+
+   if (nand_block_isbad(nand, off))
+   goto next_block;
+
+   read_size = sizeof(buffer);
+
+   ret = nand_read(nand, off,&read_size, buffer);
+   if (ret<  0&&  ret != -EUCLEAN)
+   goto next_block;


s/goto next_block/continue/



hmmm, OK.
I copied the original code ie for listing images from nor flash.
Should I also correct it !!


If you want to do that as a separate patch, that's fine -- but the code  
is sufficiently different that I don't think there's a strong  
consistency argument to be made.



+   header = (const image_header_t *)buffer;
+
+   switch (genimg_get_format(buffer)) {
+   case IMAGE_FORMAT_LEGACY:
+   if (!image_check_hcrc(header))
+   goto next_block;
+
+   read_size =
image_get_image_size(header);
+
+   imgdata = malloc(read_size);
+   if (!imgdata) {
+   printf("Not able to list all
images " \
+   "(Low memory)\n");


Don't line-wrap error strings.



80 column ?


Error strings are an exception for the sake of greppability.  From  
Linux's Documentation/CodingStyle:


  Statements longer than 80 columns will be broken into sensible  
chunks, unless
  exceeding 80 columns significantly increases readability and does  
not hide
  information. Descendants are always substantially shorter than the  
parent and
  are placed substantially to the right. The same applies to function  
headers
  with a long argument list. However, never break user-visible strings  
such as

  printk messages, because that breaks the ability to grep for them.


Why is the no-memory error message different for FIT versus legacy
images?  I realize that at this point you don't know if it's a FIT
versus some other dtb, but why do you print the device and offset  
here
but not in the legacy case?  Why "Low memory(cannot allocate memory  
for

image)" versus just " (Low memory)"?



Typo :(
I would give the following print for both
printf("May be a FIT Image at NAND " \
"device %d offset %08llX:\n",
nand_dev, off);
printf("   Low memory(cannot allocate" \
" memory for image)\n");


It's a little more verbose than I'd have done, but OK.  Can you put a  
space between "memory" and "(cannot", though?


-Scott
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Re: [U-Boot] [PATCH v3] imls: Add support to list images in NAND device

[Scott Wood]

On 12/13/2012 04:38:18 AM, Vipin Kumar wrote:
+		for (off = 0; off < nand->size; off += nand->erasesize)  
{

+   const image_header_t *header;
+   int ret;
+
+   if (nand_block_isbad(nand, off))
+   continue;
+
+   len = sizeof(buffer);
+
+   ret = nand_read(nand, off, &len, (u8 *)buffer);
+   if (ret < 0 && ret != -EUCLEAN)
+   continue;


Might want to make some noise if you get an uncorrectable error.


+
+   switch (genimg_get_format(buffer)) {
+   case IMAGE_FORMAT_LEGACY:
+   header = (const image_header_t *)buffer;
+   len = image_get_image_size(header);
+
+ret = nand_imls_legacyimage(nand,  
nand_dev,

+   off, len);
+   if (ret < 0 && ret != -ENOMEM)
+   return ret;
+   break;
+#if defined(CONFIG_FIT)
+   case IMAGE_FORMAT_FIT:
+   len = fit_get_size(buffer);
+   ret = nand_imls_fitimage(nand, nand_dev,
+   off, len);
+   if (ret < 0 && ret != -ENOMEM)
+   return ret;
+   break;
+#endif
+   }


Do you really mean to return from the main imls function just because  
one image has an error?  By "use return" I meant return from the  
subfunction.


-Scott
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Re: [U-Boot] Booting an i.MX53 from NAND with u-boot

[Benoît Thébaudeau]

Dear Bernhard Walle,

On Thursday, December 13, 2012 5:01:00 PM, Bernhard Walle wrote:
> we have a custom board with an Freescale i.MX 53 CPU and NAND flash
> (MT29F1G08ABADAWP if it matters). It's quite similar to the i.MX 53
> LOCO
> ("Quick Start Board"), but the LOCO has no Flash and only boots from
> Micro SD card.
> 
> I'm using u-boot 2012.07 from mainline with some additional patches,
> notably the patch to add i.M53 support to mxc_nand driver from
> Benoît Thébaudeau that has been posted on the mailing list recently.
> 
> When booting from SD card, everything is fine, i.e. I can read and
> write
> the flash from u-boot. And also from Linux. However, the goal is to
> boot
> from NAND. :)

OK. FYI, I boot from NAND on a custom board with i.MX51 using the patches that
you refer to.

> I used the kobs-ng-11.09.01 software from Freescale to write the
> bootloader to NAND, since it also writes the necessary boot header
> and
> has support for bad pages. Is it correct to use 'u-boot.bin' (and not
> 'u-boot.imx')?
> 
> There's some information floating around in the internet that I need
> some proprietary tool to convert 'u-boot.bin' to some 'streaming'
> format. But that information is for i.MX 28 and not for i.MX 53. I
> found
> also tools/mxsboot.c in the u-boot sources which seems to be a
> replacement for kobs-ng.

There are several possible solutions. First, you need an SPL because the ROM
bootloader does not handle all bad blocks properly, especially if the bootloader
image spans several blocks. You have the choice between the old NAND SPL, which
is being obsoleted, and the new generic SPL, which still requires some
refinements to support NAND boot on i.MX. NAND SPL is currently the quickest
solution, but generic SPL is the long term solution.

For my board, I went with NAND SPL, which generates a u-boot-nand.bin file to
flash. I had to customize the linker script and the startup files to add the DCD
stuff to the image. Another solution could have been to generate a u-boot.imx
for NAND SPL, which I will do for generic SPL at some point.

> Some ideas what we're doing wrong or how to debug this? Of course it
> can
> be also the boot GPIO settings, but I wanted to ask here if the
> procedure looks correct from u-boot side.

For debugging, a JTAG probe is the best solution.

Best regards,
Benoît
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Wolfgang Denk]

Dear Stephen Warren,

In message <50ca3e7a.8020...@wwwdotorg.org> you wrote:
>
> >> My intent is that ODMDATA will definitely only be used for the console
> >> UART, and will NOT be used for anything else like LCD, RTC, ... Those
> >> other devices will certainly be configured via device tree.
> > 
> > We've been there before, you know.
> 
> I'm not quite sure what the implication is here.

What I mean is: there have been a number of times before when we
decided to do something more or less ugly because it appeared to be
the easiest / fastest / most simple approacht at that time,and we were
sure we would it need for this one special case only.  Then it gor
reused, and again, and it spread...

> > OK - what is the scope of visibility of such code?  Will it be
> > strictly board specific only?  Or SoC specific? Arch? Global?
> 
> It's partially SoC-specific, partially global.

Which exact parts would be global?

I am aware that the capability to set the UART is obviously part of
the global code.

But the actual implementation of such setting would be not global at
all, right?

> Note that by "all" and "global" here, I'm talking relative to all Tegra
> SoCs, not about anything non-Tegra. "SoC-specific" means different for
> Tegra20, Tegra30, Tegra114, etc.

OK.

> Note that in the latter case, I haven't pushed out the patches which
> document the UART pinmux fields yet, but will very soon; most likely as
> soon as we've resolved this conversation.

You guarantee that this all will remain strictly within Tegra specific
areas, only?  And only for the UART?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
"The whole world is about three drinks behind." - Humphrey Bogart
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Re: [U-Boot] [PATCH] ns16550: allow UART address to be set dynamically

[Stephen Warren]

On 12/13/2012 04:11 PM, Wolfgang Denk wrote:
> Dear Stephen Warren,
> 
> In message <50ca3e7a.8020...@wwwdotorg.org> you wrote:
>>
 My intent is that ODMDATA will definitely only be used for the console
 UART, and will NOT be used for anything else like LCD, RTC, ... Those
 other devices will certainly be configured via device tree.
>>>
>>> We've been there before, you know.
>>
>> I'm not quite sure what the implication is here.
> 
> What I mean is: there have been a number of times before when we
> decided to do something more or less ugly because it appeared to be
> the easiest / fastest / most simple approacht at that time,and we were
> sure we would it need for this one special case only.  Then it gor
> reused, and again, and it spread...
> 
>>> OK - what is the scope of visibility of such code?  Will it be
>>> strictly board specific only?  Or SoC specific? Arch? Global?
>>
>> It's partially SoC-specific, partially global.
> 
> Which exact parts would be global?

I guess by global you meant for any SoC/CPU/... U-Boot supports, whereas
I was treating global as across all Tegras.

So given that, the only global part would be the NS16550 patch I sent
out already. Anything else would be contained entirely within the Tegra
common board file.

> I am aware that the capability to set the UART is obviously part of
> the global code.

Right.

> But the actual implementation of such setting would be not global at
> all, right?

Right; it'd be part of that Tegra common board.c file, shared by all
Tegra boards, but should have zero impact outside any Tegra-specific code.

>> Note that by "all" and "global" here, I'm talking relative to all Tegra
>> SoCs, not about anything non-Tegra. "SoC-specific" means different for
>> Tegra20, Tegra30, Tegra114, etc.
> 
> OK.
> 
>> Note that in the latter case, I haven't pushed out the patches which
>> document the UART pinmux fields yet, but will very soon; most likely as
>> soon as we've resolved this conversation.
> 
> You guarantee that this all will remain strictly within Tegra specific
> areas, only?  And only for the UART?

Yes. I don't have any intention to use it for anything other than
console UART. I don't know of anyone else who wants to use it for
anything other than console UART. If anyone else tries to use it for
anything else, I'll give review comments not to, and direct them towards
device tree.

Of course, I can't predict the future, but that's just science, not my
trying to weasel out of a promise.
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Re: [U-Boot] please pull u-boot-samsung/resolve

[Minkyu Kang]

On 14/12/12 04:56, Albert ARIBAUD wrote:
> Hi Minkyu,
> 
> On Tue, 11 Dec 2012 20:10:06 +0900, Minkyu Kang 
> wrote:
>> Dear Albert,
>>
>> The following changes since commit fd4d564b3c80b111f18c93adb14233a6a7ddb0e9:
>>
>>   Merge branch 'master' of git://git.denx.de/u-boot-x86 (2012-12-07 08:47:59 
>> -0700)
>>
>> are available in the git repository at:
>>
>>
>>   git://git.denx.de/u-boot-samsung resolve
>>
>> for you to fetch changes up to fbef8e6e7f1233ed20f8c5045e12c9cf31b43540:
>>
>>   universal_c210: check the NULL pointer when get the PMIC (2012-12-11 
>> 17:37:28 +0900)
>>
>> 
>> Albert ARIBAUD (1):
>>   Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
>>
>> Allen Martin (1):
>>   tegra: add CONSOLE_MUX support to tegra-kbc
>>
>> Ashok Kumar Reddy (1):
>>   ARM: arm1176: Define arch_cpu_init() for s3c64xx
>>
>> Benoît Thébaudeau (17):
>>   arm1136: Fix enable_caches()
>>   mx31: Move EHCI definitions to ehci-fsl.h
>>   ehci-mxc: Clean up
>>   ehci-mx5: Clean up
>>   ehci-mx5: Fix OC_DIS usage
>>   ehci-mx5: Fix OPM usage
>>   ehci-mx5: Fix *PM usage for i.MX53
>>   ehci-mx5: Add missing OC_DIS for i.MX53
>>   ehci-mxc: Make EHCI power/oc polarities configurable
>>   ehci-mxc: Make i.MX25 EHCI configurable
>>   ehci-mxc: Define host offsets
>>   ehci-mxc: Add support for i.MX35
>>   mx35pdk: Add support for OTG
>>   ehci-mx5/6: Make board_ehci_hcd_init() optional
>>   ehci-mxc: Fix host power mask bit for i.MX35
>>   ehci-mxc: Fix host power mask bit for i.MX25
>>   mx5: Mark lowlevel_init board-specific code
>>
>> Chander Kashyap (1):
>>   Exynos5250: Enable PXE Support
>>
>> Fabio Estevam (24):
>>   mx25pdk: Include CONFIG_MX25
>>   mx25pdk: Add esdhc support
>>   pmic_fsl: Introduce FSL_PMIC_I2C_LENGTH
>>   mx25: Place common functions into sys_proto.h
>>   pmic: Add support for mc34704
>>   mx25pdk: Add Ethernet support
>>   mx53loco: Allow booting a zImage kernel
>>   mx25pdk: Allow booting a zImage kernel
>>   mx51evk: Allow booting a zImage kernel
>>   mx35pdk: Allow booting a zImage kernel
>>   mx6qsabre_common: Allow booting a zImage kernel
>>   mx5: Align SPI CS naming with i.MX53 reference manual
>>   mx5: Print CSPI clock in 'clock' command
>>   spi: mxc_spi: Fix handling of chip select
>>   spi: mxc_spi: Fix spi clock glitch durant reset
>>   mx6: clock: Only show CSPI clock if CSPI is enabled
>>   mx28evk: Configure CONFIG_BOOTDELAY to one second
>>   mx53loco: Configure CONFIG_BOOTDELAY to one second
>>   mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second
>>   mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second
>>   mx51evk: Configure CONFIG_BOOTDELAY to one second
>>   mx25pdk: Configure CONFIG_BOOTDELAY to one second
>>   mx31pdk: Configure CONFIG_BOOTDELAY to one second
>>   mx35pdk: Configure CONFIG_BOOTDELAY to one second
>>
>> Hatim RV (3):
>>   EXYNOS: Add clock for SPI
>>   EXYNOS5: Add base address for SPI
>>   EXYNOS5: Enable SPI
>>
>> Marek Vasut (3):
>>   dm: wdt: Move s5p watchdog timer to drivers/watchdog/
>>   mx28: Fix typo in POWER_MINPWR_VBG_OFF
>>   mx28: Fix typo in POWER_DCLIMITS_NEGLIMIT_OFFSET
>>
>> Mayuresh Kulkarni (1):
>>   tegra: Enable display/lcd support on Seaboard
>>
>> Minkyu Kang (6):
>>   ARCH: EXYNOS: add support to match product id
>>   EXYNOS: Clock: Add common function for pll rate calculation
>>   s3c64xx: fix the compiler error and warning
>>   Merge branch 'master' of git://git.denx.de/u-boot into resolve
>>   universal_c210: fix compiler error and compiler warning
>>   universal_c210: check the NULL pointer when get the PMIC
>>
>> Piotr Wilczek (12):
>>   arm:exynos4:trats: Correct SDRAM configuration for trats
>>   arm:exynos4:trats: Fix SDRAM size
>>   arm:exynos4:pinmux: Modify the gpio function for mmc
>>   arm:exynos4:trats: Use pinmux for mmc configuration
>>   arm:exynos4:universal: Use pinmux for mmc configuration
>>   arm:exynos4:universal: Eliminated low level init
>>   arm: trats: Power down core 1
>>   exynos4: universal_C210: use software SPI
>>   misc:max8998 Add LDO macros
>>   drivers: video: Add ld9040 video driver
>>   drivers: video: fix image position
>>   exynos4: universal_C210: add display support
>>
>> Rajeshwari Shinde (16):
>>   PMIC: MAX77686: Add support for MAX77686
>>   SMDK5250: Config: Enable MAX77686 pmic chip
>>   SOUND: SAMSUNG: Add I2S driver
>>   SOUND: Add WM8994 codec
>>   Sound: Add command for audio playback
>>   EXYNOS: Add I2S registers
>>   EXYNOS: Add parameters required by I2S
>>   EXYNOS: Add pinmux for I2S
>>   EXYNOS: Add I2S base address
>>   EXYNOS: Add clock for I2S
>>   SMDK5250: Enable Soun

Re: [U-Boot] [PATCH 3/4] sf: Add configuration register writing

[Simon Glass]

Hi Jagan,

On Thu, Dec 13, 2012 at 8:08 AM, Jagan Teki  wrote:
> Hi Simon,
>
> On Thu, Dec 13, 2012 at 4:03 AM, Simon Glass  wrote:
>> Hi Jagan,
>>
>> On Wed, Dec 12, 2012 at 8:21 AM, Jagan Teki  wrote:
>>> Hi Simon,
>>>
>>> On Wed, Dec 12, 2012 at 8:53 PM, Simon Glass  wrote:
 Hi Jagan,

 On Wed, Dec 12, 2012 at 7:20 AM, Jagan Teki  
 wrote:
> Hi Simon,
>
> On Wed, Dec 12, 2012 at 12:05 PM, Simon Glass  wrote:
>> Hi,
>>
>> On Mon, Dec 10, 2012 at 6:42 AM, Jagannadha Sutradharudu Teki
>>  wrote:
>>> This patch provides support to program a flash config register.
>>>
>>> Configuration register contains the control bits used to configure
>>> the different configurations and security features of a device.
>>>
>>> User need to set these bits through spi_flash_cmd_write_config()
>>> based on their usage.
>>>
>>> Signed-off-by: Jagannadha Sutradharudu Teki 
>>> ---
>>>  drivers/mtd/spi/spi_flash.c  |   27 +++
>>>  drivers/mtd/spi/spi_flash_internal.h |3 +++
>>>  2 files changed, 30 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
>>> index 800ed8b..a8f0af0 100644
>>> --- a/drivers/mtd/spi/spi_flash.c
>>> +++ b/drivers/mtd/spi/spi_flash.c
>>> @@ -274,6 +274,33 @@ int spi_flash_cmd_write_status(struct spi_flash 
>>> *flash, u8 sr)
>>> return 0;
>>>  }
>>>
>>> +int spi_flash_cmd_write_config(struct spi_flash *flash, u16 cr)
>>> +{
>>> +   u8 cmd;
>>> +   int ret;
>>> +
>>> +   ret = spi_flash_cmd_write_enable(flash);
>>> +   if (ret < 0) {
>>> +   debug("SF: enabling write failed\n");
>>> +   return ret;
>>> +   }
>>> +
>>> +   cmd = CMD_WRITE_STATUS;
>>> +   ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &cr, 2);
>>
>> Does this assume a particular endianness? Perhaps should put the
>> values into a byte array instead?
>
> Yes it follows the endianness.

 My concern was more that u16 is being used to send two bytes. How about:

 u8 data[2];
>>>
>>> Means I need to send status on data[1] and config on data[0].?
>>>

 put_unaligned_le16(cr, data)
>>>
>>> I couldn't understand this, may be for endianness.?
>>
>> Yes that's right. Just checking that your code will work correctly on
>> a big-endian machine. Will it? It is normally not a good idea to cast
>> a short into a char[2].
>
> OK.
>
> Let me explain my senario here.
> in below function I am passing 0x0200
> spi_flash_cmd_write_config(flash, 0x0200);
>
> out of 2-byte data 0x0200 first 00 will pass as a status register value
> and 0x02 will pass as a config value.it's took the bytes from LSB
> onwards.
>
> Can you please explain how put_unaligned_le16(cr, data will work
> for this case?

Possibly...

The prototype is:

int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
const void *data, size_t data_len);

You are doing:

u16 value;

ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &cr, 2);

Passing a u16 cast to a u8 * is probably not endian safe.

Instead I think you should do:

u8 cr[2];

(get bytes into cr)
ret = spi_flash_cmd_write(flash->spi, &cmd, 1, cr, 2);

Regards,
Simon

>
> Thanks,
> Jagan.
>
>>
>> Regards,
>> Simon
>>
>>>
>>> Thanks,
>>> Jagan.
>>>

>
> On my QPP patch,
> ret = spi_flash_cmd_write_config(flash, 0x0200);
>
> where 02 is config and 00 is status register
> WRR have CMD+status+config => for CMD+16 data format.
>
> Let me know if you need any info.

 OK.

 Regards,
 Simon

>
> Thanks,
> Jagan.
>
>>
>>> +   if (ret) {
>>> +   debug("SF: fail to write config register\n");
>>> +   return ret;
>>> +   }
>>> +
>>> +   ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
>>> +   if (ret < 0) {
>>> +   debug("SF: write config register timed out\n");
>>> +   return ret;
>>> +   }
>>> +
>>> +   return 0;
>>> +}
>>> +
>>>  /*
>>>   * The following table holds all device probe functions
>>>   *
>>> diff --git a/drivers/mtd/spi/spi_flash_internal.h 
>>> b/drivers/mtd/spi/spi_flash_internal.h
>>> index 141cfa8..9287778 100644
>>> --- a/drivers/mtd/spi/spi_flash_internal.h
>>> +++ b/drivers/mtd/spi/spi_flash_internal.h
>>> @@ -77,6 +77,9 @@ static inline int spi_flash_cmd_write_disable(struct 
>>> spi_flash *flash)
>>>  /* Program the status register. */
>>>  int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
>>>
>>> +/* Program the config register. */
>>> +int spi_flash_cmd_write_config(struct spi_flash *flash, u16 cr);
>>> +
>>>  /*
>>>

Re: [U-Boot] [PATCH 4/4] sf: Add Quad-input Page Program(32h) instruction support

[Simon Glass]

+Mike

Hi,

On Thu, Dec 13, 2012 at 8:21 AM, Jagan Teki  wrote:
> Hi Simon,
>
> On Thu, Dec 13, 2012 at 4:08 AM, Simon Glass  wrote:
>> Hi Jagan,
>>
>> On Wed, Dec 12, 2012 at 8:52 AM, Jagan Teki  wrote:
>>> Hi Simon,
>>>
>>> On Wed, Dec 12, 2012 at 12:11 PM, Simon Glass  wrote:
 Hi,

 On Mon, Dec 10, 2012 at 6:42 AM, Jagannadha Sutradharudu Teki
  wrote:
> This patch provides support to program a flash using
> Quad-input Page Program(32h) instruction.
>
> This will effectively increases the data transfer rate
> by up to four times, as compared to the Page Program(PP) instruction.
>
> Respective flash drivers need to use spi_flash_cmd_write_multi_qpp()
> based on their usage.
>
> Signed-off-by: Jagannadha Sutradharudu Teki 

 It's great to have this support. A few comments below.
>>>
>>> Thanks.
>>>

> ---
>  README   |1 +
>  common/cmd_sf.c  |   12 +++-
>  drivers/mtd/spi/spi_flash.c  |  108 
> ++
>  drivers/mtd/spi/spi_flash_internal.h |   13 
>  include/spi_flash.h  |   12 
>  5 files changed, 144 insertions(+), 2 deletions(-)
>
> diff --git a/README b/README
> index 5a86ae9..a01de13 100644
> --- a/README
> +++ b/README
> @@ -869,6 +869,7 @@ The following options need to be configured:
> CONFIG_CMD_SETGETDCR  Support for DCR Register access
>   (4xx only)
> CONFIG_CMD_SF   * Read/write/erase SPI NOR flash
> +   CONFIG_CMD_SF_QPP   * Program SPI flash using 
> Quad-input Page Program
> CONFIG_CMD_SHA1SUMprint sha1 memory digest
>   (requires CONFIG_CMD_MEMORY)
> CONFIG_CMD_SOURCE "source" command Support
> diff --git a/common/cmd_sf.c b/common/cmd_sf.c
> index 5ac1d0c..a449d2c 100644
> --- a/common/cmd_sf.c
> +++ b/common/cmd_sf.c
> @@ -228,6 +228,10 @@ static int do_spi_flash_read_write(int argc, char * 
> const argv[])
> ret = spi_flash_update(flash, offset, len, buf);
> else if (strcmp(argv[0], "read") == 0)
> ret = spi_flash_read(flash, offset, len, buf);
> +#ifdef CONFIG_CMD_SF_QPP
> +   else if (strcmp(argv[0], "write.qpp") == 0)
> +   ret = spi_flash_write_qpp(flash, offset, len, buf);
> +#endif
> else
> ret = spi_flash_write(flash, offset, len, buf);
>
> @@ -300,7 +304,7 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, 
> int argc, char * const argv[
> }
>
> if (strcmp(cmd, "read") == 0 || strcmp(cmd, "write") == 0 ||
> -   strcmp(cmd, "update") == 0)
> +   strcmp(cmd, "update") == 0 || strcmp(cmd, "write.qpp") == 0)
> ret = do_spi_flash_read_write(argc, argv);
> else if (strcmp(cmd, "erase") == 0)
> ret = do_spi_flash_erase(argc, argv);
> @@ -327,5 +331,9 @@ U_BOOT_CMD(
> "sf erase offset [+]len - erase `len' bytes from 
> `offset'\n"
> " `+len' round up `len' to block 
> size\n"
> "sf update addr offset len  - erase and write `len' bytes 
> from memory\n"
> -   " at `addr' to flash at `offset'"
> +   " at `addr' to flash at 
> `offset'\n"
> +#ifdef CONFIG_CMD_SF_QPP
> +   "sf write.qpp addr offset len   - write `len' bytes from memory\n"
> +   " at `addr' to flash at `offset' 
> using Quad-input Page Program(32h)"
> +#endif
>  );
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
> index a8f0af0..3545f59 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -122,6 +122,114 @@ int spi_flash_cmd_write_multi(struct spi_flash 
> *flash, u32 offset,
> return ret;
>  }
>
> +#ifdef CONFIG_CMD_SF_QPP
> +int spi_flash_set_quad_enable_bit(struct spi_flash *flash)
> +{
> +   u8 cmd = CMD_READ_CONFIG;
> +   u8 data = 0;
> +   int ret;
> +
> +   ret = spi_flash_read_common(flash,
> +   &cmd, sizeof(cmd), &data, sizeof(data));
> +   if (ret < 0) {
> +   debug("SF: fail to read config register\n");
> +   return ret;
> +   }
> +
> +   if (data & 0x2) {

 Can we have defines/enums for this please?
>>>
>>> Yes I will do.
>>>

> +   debug("SF: quad enable bit is already set.\n");
> +   return ret;
>

Re: [U-Boot] [PATCH 03/11] usb: ehci: generic PCI support

[Simon Glass]

Hi Marek,

On Thu, Dec 13, 2012 at 9:30 AM, Marek Vasut  wrote:
> Dear Simon Glass,
>
>> From: Vincent Palatin 
>>
>> Instead of hardcoding the PCI IDs on the USB controller, use the PCI
>> class to detect them.
>>
>> Ensure the busmaster bit is properly set in the PCI configuration.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>  drivers/usb/host/ehci-pci.c |   37 +
>>  1 files changed, 37 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
>> index 29af02d..0dc0e6e 100644
>> --- a/drivers/usb/host/ehci-pci.c
>> +++ b/drivers/usb/host/ehci-pci.c
>> @@ -32,6 +32,34 @@ static struct pci_device_id ehci_pci_ids[] = {
>>   {0x12D8, 0x400F},   /* Pericom */
>>   {0, 0}
>>  };
>> +#else
>> +static pci_dev_t ehci_find_class(void)
>> +{
>> + int bus;
>> + int devnum;
>> + pci_dev_t bdf;
>> + uint32_t class;
>> +
>> + for (bus = 0; bus < pci_last_busno(); bus++) {
>> + for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES-1; devnum++) {
>> + pci_read_config_dword(PCI_BDF(bus, devnum, 0),
>> +   PCI_CLASS_REVISION, &class);
>> + if (class >> 16 == 0x)
>> + continue;
>> +
>> + for (bdf = PCI_BDF(bus, devnum, 0);
>> + bdf <= PCI_BDF(bus, devnum,
>> + PCI_MAX_PCI_FUNCTIONS - 1);
>> + bdf += PCI_BDF(0, 0, 1)) {
>> + pci_read_config_dword(bdf, PCI_CLASS_REVISION,
>> +   &class);
>> + if (class >> 8 == 0x0c0320)
>
> Can we at least describe this magic please?

Changed to PCI_CLASS_SERIAL_USB_EHCI.

>
>> + return bdf;
>> + }
>> + }
>> + }
>> + return -1;
>
> Let's try to use errno.h please. It won't be consistent for a while, but we'll
> get there.

Yes, although pci_find_devices() doesn't, so I will just check for < 0 below.

>
>> +}
>>  #endif
>>
>>  /*
>> @@ -41,8 +69,13 @@ static struct pci_device_id ehci_pci_ids[] = {
>>  int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor
>> **hcor) {
>>   pci_dev_t pdev;
>> + uint32_t cmd;
>>
>> +#ifdef CONFIG_PCI_EHCI_DEVICE
>>   pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
>> +#else
>> + pdev = ehci_find_class();
>> +#endif
>>   if (pdev == -1) {
>>   printf("EHCI host controller not found\n");
>>   return -1;
>> @@ -57,6 +90,10 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
>> struct ehci_hcor **hcor) (uint32_t)*hccr, (uint32_t)*hcor,
>>   (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
>>
>> + /* enable busmaster */
>> + pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
>> + cmd |= PCI_COMMAND_MASTER;
>> + pci_write_config_dword(pdev, PCI_COMMAND, cmd);
>>   return 0;
>>  }
>
> Best regards,
> Marek Vasut

Regards,
Simon
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Re: [U-Boot] [PATCH 04/11] usb: ehci: Support interrupt transfers via periodic list

[Simon Glass]

Hi,

On Thu, Dec 13, 2012 at 9:32 AM, Marek Vasut  wrote:
> Dear Simon Glass,
>
>> From: Patrick Georgi 
>>
>> Interrupt transfers aren't meant to be used from the async list
>> (the EHCI spec indicates trouble with low/full-speed intr on async).
>>
>> Build a periodic list instead, and provide an API to make use of it.
>> Then, use that API from the existing interrupt transfer API.
>>
>> This provides support for USB keyboards using EHCI.
>>
>> Signed-off-by: Patrick Georgi 
>> Signed-off-by: Simon Glass 
> [...]
>
> Looks good in general. Clear up those ToDos please. Also, some while() cycles
> are endless, make use of some timeout please.

Not much ability to do anything other than remove them...

The timeouts come in the next patch - should I squash them?

Regards,
Simon

>
> Best regards,
> Marek Vasut
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Re: [U-Boot] [PATCH 04/11] usb: ehci: Support interrupt transfers via periodic list

[Marek Vasut]

Dear Simon Glass,

> Hi,
> 
> On Thu, Dec 13, 2012 at 9:32 AM, Marek Vasut  wrote:
> > Dear Simon Glass,
> > 
> >> From: Patrick Georgi 
> >> 
> >> Interrupt transfers aren't meant to be used from the async list
> >> (the EHCI spec indicates trouble with low/full-speed intr on async).
> >> 
> >> Build a periodic list instead, and provide an API to make use of it.
> >> Then, use that API from the existing interrupt transfer API.
> >> 
> >> This provides support for USB keyboards using EHCI.
> >> 
> >> Signed-off-by: Patrick Georgi 
> >> Signed-off-by: Simon Glass 
> > 
> > [...]
> > 
> > Looks good in general. Clear up those ToDos please. Also, some while()
> > cycles are endless, make use of some timeout please.
> 
> Not much ability to do anything other than remove them...
> 
> The timeouts come in the next patch - should I squash them?

Yeah, squash them. Was there any reason to split them ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 06/11] usb: ehci: Add timeout on interrupt endpoint operations

[Simon Glass]

Hi Marek,

On Thu, Dec 13, 2012 at 9:35 AM, Marek Vasut  wrote:
> Dear Simon Glass,
>
>> From: Vincent Palatin 
>>
>> Ensure we cannot get stuck in the keyboard scanning if something wrong
>> happens (USB device unplugged or fatal I/O error)
>>
>> Signed-off-by: Vincent Palatin 
>>
>> Signed-off-by: Simon Glass 
>> ---
>
> I like it. Let's use errno.h and rebase on top of u-boot-usb.git ... I just
> pushed it.

OK I have had a crack at that and will resend.

Regards,
Simon

>
> Best regards,
> Marek Vasut
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Re: [U-Boot] [PATCH 04/11] usb: ehci: Support interrupt transfers via periodic list

[Simon Glass]

Hi Marek,

On Thu, Dec 13, 2012 at 6:00 PM, Marek Vasut  wrote:
> Dear Simon Glass,
>
>> Hi,
>>
>> On Thu, Dec 13, 2012 at 9:32 AM, Marek Vasut  wrote:
>> > Dear Simon Glass,
>> >
>> >> From: Patrick Georgi 
>> >>
>> >> Interrupt transfers aren't meant to be used from the async list
>> >> (the EHCI spec indicates trouble with low/full-speed intr on async).
>> >>
>> >> Build a periodic list instead, and provide an API to make use of it.
>> >> Then, use that API from the existing interrupt transfer API.
>> >>
>> >> This provides support for USB keyboards using EHCI.
>> >>
>> >> Signed-off-by: Patrick Georgi 
>> >> Signed-off-by: Simon Glass 
>> >
>> > [...]
>> >
>> > Looks good in general. Clear up those ToDos please. Also, some while()
>> > cycles are endless, make use of some timeout please.
>>
>> Not much ability to do anything other than remove them...
>>
>> The timeouts come in the next patch - should I squash them?
>
> Yeah, squash them. Was there any reason to split them ?

Not really - just a bug fix that we did. Will squash.

Regards,
Simon

>
> Best regards,
> Marek Vasut
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[U-Boot] [PATCH v2 0/7] Various USB improvements

[Simon Glass]

This series adds a few USB improvements for Marek:

- Support for interupt transfers
- Faster start-up and proper shutdown of ASIX USB adapter
- Basic 64-bit controller support (used by x86)

Changes in v2:
- Use errno where possible
- Use PCI_CLASS_SERIAL_USB_EHCI instead of the number
- Update to use errno
- Remove TODOs
- Tidy code style a little
- Squash timeouts patch into interrupt patch
- Add blank line before function return

Michael Spang (1):
  usb: usbeth: smsc95xx: remove EEPROM loaded check

Patrick Georgi (1):
  usb: ehci: Support interrupt transfers via periodic list

Simon Glass (2):
  usb: net: asix: Do a fast init if link already established
  x86: Enable USB features for coreboot

Vincent Palatin (3):
  usb: ehci: generic PCI support
  usb: ehci: Fix aliasing issue in EHCI interrupt code
  usb: Add multiple controllers support for EHCI PCI

 drivers/usb/eth/asix.c  |   40 +-
 drivers/usb/eth/smsc95xx.c  |4 -
 drivers/usb/host/ehci-hcd.c |  315 ++-
 drivers/usb/host/ehci-pci.c |   61 -
 drivers/usb/host/ehci.h |6 +-
 include/configs/coreboot.h  |   17 +++
 include/usb_ether.h |1 +
 7 files changed, 420 insertions(+), 24 deletions(-)

-- 
1.7.7.3

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[U-Boot] [PATCH v2 1/7] usb: net: asix: Do a fast init if link already established

[Simon Glass]

The Asix driver takes the link down during init() and then brings it back up.
This commit changes this so that if a link has already been established
successfully we simply check that the link is still good.

Also fix up asix_halt() to actually halt RX on the interface. Previously this
was not done, so the device would continue to operate evern when halted,
violating a U-Boot requirement.

This reduces the delay between successive network commands.
Signed-off-by: Simon Glass 
---
Changes in v2: None

 drivers/usb/eth/asix.c |   40 
 include/usb_ether.h|1 +
 2 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c
index 75ec8f7..a991fea 100644
--- a/drivers/usb/eth/asix.c
+++ b/drivers/usb/eth/asix.c
@@ -84,6 +84,7 @@
 
 #define AX_DEFAULT_RX_CTL  \
(AX_RX_CTL_SO | AX_RX_CTL_AB)
+#define AX_DISABLE_RX_CTL  AX_RX_CTL_AB
 
 /* GPIO 2 toggles */
 #define AX_GPIO_GPO2EN 0x10/* GPIO2 Output enable */
@@ -410,17 +411,16 @@ static int asix_basic_reset(struct ueth_data *dev)
return 0;
 }
 
-/*
- * Asix callbacks
- */
-static int asix_init(struct eth_device *eth, bd_t *bd)
+static int full_init(struct eth_device *eth)
 {
-   struct ueth_data*dev = (struct ueth_data *)eth->priv;
-   int timeout = 0;
-#define TIMEOUT_RESOLUTION 50  /* ms */
-   int link_detected;
+   struct ueth_data *dev = (struct ueth_data *)eth->priv;
 
debug("** %s()\n", __func__);
+   if (asix_basic_reset(dev))
+   goto out_err;
+
+   if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0)
+   goto out_err;
 
dev->phy_id = asix_get_phy_addr(dev);
if (dev->phy_id < 0)
@@ -446,6 +446,25 @@ static int asix_init(struct eth_device *eth, bd_t *bd)
debug("Write IPG,IPG1,IPG2 failed\n");
goto out_err;
}
+   return 0;
+out_err:
+   return -1;
+}
+
+/*
+ * Asix callbacks
+ */
+static int asix_init(struct eth_device *eth, bd_t *bd)
+{
+   struct ueth_data *dev = (struct ueth_data *)eth->priv;
+   int timeout = 0;
+#define TIMEOUT_RESOLUTION 50  /* ms */
+   int link_detected;
+
+   debug("** %s()\n", __func__);
+
+   if (!dev->has_been_running && full_init(eth))
+   return -1;
 
if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0)
goto out_err;
@@ -467,6 +486,7 @@ static int asix_init(struct eth_device *eth, bd_t *bd)
printf("unable to connect.\n");
goto out_err;
}
+   dev->has_been_running = 1;
 
return 0;
 out_err:
@@ -571,7 +591,11 @@ static int asix_recv(struct eth_device *eth)
 
 static void asix_halt(struct eth_device *eth)
 {
+   struct ueth_data *dev = (struct ueth_data *)eth->priv;
+
+   /* Disable packet reception */
debug("** %s()\n", __func__);
+   (void)asix_write_rx_ctl(dev, AX_DISABLE_RX_CTL);
 }
 
 /*
diff --git a/include/usb_ether.h b/include/usb_ether.h
index 7c7aecb..6145210 100644
--- a/include/usb_ether.h
+++ b/include/usb_ether.h
@@ -49,6 +49,7 @@ struct ueth_data {
unsigned char   subclass;   /* as in overview */
unsigned char   protocol;   /* .. */
unsigned char   irqinterval;/* Intervall for IRQ Pipe */
+   char has_been_running;  /* PHY already inited */
 
/* driver private */
void *dev_priv;
-- 
1.7.7.3

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[U-Boot] [PATCH v2 5/7] usb: usbeth: smsc95xx: remove EEPROM loaded check

[Simon Glass]

From: Michael Spang 

[port of Linux kernel commit bcd218be5aeb by Steve Glendinning]

The eeprom read & write commands currently check the E2P_CMD_LOADED_ bit is
set before allowing any operations.  This prevents any reading or writing
unless a correctly programmed EEPROM is installed.

Signed-off-by: Michael Spang 
Signed-off-by: Simon Glass 
Acked-by: Marek Vasut 
---
Changes in v2: None

 drivers/usb/eth/smsc95xx.c |4 
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c
index dc5ca65..fd8f8a7 100644
--- a/drivers/usb/eth/smsc95xx.c
+++ b/drivers/usb/eth/smsc95xx.c
@@ -265,10 +265,6 @@ static int smsc95xx_eeprom_confirm_not_busy(struct 
ueth_data *dev)
 
do {
smsc95xx_read_reg(dev, E2P_CMD, &val);
-   if (!(val & E2P_CMD_LOADED_)) {
-   debug("No EEPROM present\n");
-   return -1;
-   }
if (!(val & E2P_CMD_BUSY_))
return 0;
udelay(40);
-- 
1.7.7.3

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[U-Boot] [PATCH v2 3/7] usb: ehci: Support interrupt transfers via periodic list

[Simon Glass]

From: Patrick Georgi 

Interrupt transfers aren't meant to be used from the async list
(the EHCI spec indicates trouble with low/full-speed intr on async).

Build a periodic list instead, and provide an API to make use of it.
Then, use that API from the existing interrupt transfer API.

This provides support for USB keyboards using EHCI.

Use timeouts to ensure we cannot get stuck in the keyboard scanning
if something wrong happens (USB device unplugged or fatal I/O error)

Signed-off-by: Vincent Palatin 
Signed-off-by: Simon Glass 
---
Changes in v2:
- Update to use errno
- Remove TODOs
- Tidy code style a little
- Squash timeouts patch into interrupt patch

 drivers/usb/host/ehci-hcd.c |  315 ++-
 drivers/usb/host/ehci.h |6 +-
 2 files changed, 316 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 20309ad..8b10b19 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -21,12 +21,14 @@
  * MA 02111-1307 USA
  */
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #include "ehci.h"
 
@@ -39,7 +41,10 @@ static struct ehci_ctrl {
struct ehci_hcor *hcor;
int rootdev;
uint16_t portreset;
-   struct QH qh_list __attribute__((aligned(USB_DMA_MINALIGN)));
+   struct QH qh_list __aligned(USB_DMA_MINALIGN);
+   struct QH periodic_queue __aligned(USB_DMA_MINALIGN);
+   uint32_t *periodic_list;
+   int ntds;
 } ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
 
 #define ALIGN_END_ADDR(type, ptr, size)\
@@ -858,6 +863,8 @@ int usb_lowlevel_init(int index, void **controller)
uint32_t reg;
uint32_t cmd;
struct QH *qh_list;
+   struct QH *periodic;
+   int i;
 
if (ehci_hcd_init(index, &ehcic[index].hccr, &ehcic[index].hcor))
return -1;
@@ -887,6 +894,40 @@ int usb_lowlevel_init(int index, void **controller)
qh_list->qh_overlay.qt_token =
cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
 
+   /* Set async. queue head pointer. */
+   ehci_writel(&ehcic[index].hcor->or_asynclistaddr, (uint32_t)qh_list);
+
+   /*
+* Set up periodic list
+* Step 1: Parent QH for all periodic transfers.
+*/
+   periodic = &ehcic[index].periodic_queue;
+   memset(periodic, 0, sizeof(*periodic));
+   periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
+   periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
+   periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
+
+   /*
+* Step 2: Setup frame-list: Every microframe, USB tries the same list.
+* In particular, device specifications on polling frequency
+* are disregarded. Keyboards seem to send NAK/NYet reliably
+* when polled with an empty buffer.
+*
+* Split Transactions will be spread across microframes using
+* S-mask and C-mask.
+*/
+   ehcic[index].periodic_list = memalign(4096, 1024*4);
+   if (!ehcic[index].periodic_list)
+   return -ENOMEM;
+   for (i = 0; i < 1024; i++) {
+   ehcic[index].periodic_list[i] = (uint32_t)periodic
+   | QH_LINK_TYPE_QH;
+   }
+
+   /* Set periodic list base address */
+   ehci_writel(&ehcic[index].hcor->or_periodiclistbase,
+   (uint32_t)ehcic[index].periodic_list);
+
reg = ehci_readl(&ehcic[index].hccr->cr_hcsparams);
descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
@@ -956,10 +997,254 @@ submit_control_msg(struct usb_device *dev, unsigned long 
pipe, void *buffer,
return ehci_submit_async(dev, pipe, buffer, length, setup);
 }
 
+struct int_queue {
+   struct QH *first;
+   struct QH *current;
+   struct QH *last;
+   struct qTD *tds;
+};
+
+#define NEXT_QH(qh) (struct QH *)((qh)->qh_link & ~0x1f)
+
+static int
+enable_periodic(struct ehci_ctrl *ctrl)
+{
+   uint32_t cmd;
+   struct ehci_hcor *hcor = ctrl->hcor;
+   int ret;
+
+   cmd = ehci_readl(&hcor->or_usbcmd);
+   cmd |= CMD_PSE;
+   ehci_writel(&hcor->or_usbcmd, cmd);
+
+   ret = handshake((uint32_t *)&hcor->or_usbsts,
+   STD_PSS, STD_PSS, 100 * 1000);
+   if (ret < 0) {
+   printf("EHCI failed: timeout when enabling periodic list\n");
+   return -ETIMEDOUT;
+   }
+   udelay(1000);
+   return 0;
+}
+
+static int
+disable_periodic(struct ehci_ctrl *ctrl)
+{
+   uint32_t cmd;
+   struct ehci_hcor *hcor = ctrl->hcor;
+   int ret;
+
+   cmd = ehci_readl(&hcor->or_usbcmd);
+   cmd &= ~CMD_PSE;
+   ehci_writel(&hcor->or_usbcmd, cmd);
+
+   ret = handshake((uint32_t *)&hc

[U-Boot] [PATCH v2 6/7] usb: Add multiple controllers support for EHCI PCI

[Simon Glass]

From: Vincent Palatin 

Use the ability to have several active EHCI controller on a system
in the PCI EHCI controller implementation.

Signed-off-by: Simon Glass 
---
Changes in v2:
- Add blank line before function return

 drivers/usb/host/ehci-pci.c |   26 +-
 1 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 8064a32..b258772 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -34,7 +34,7 @@ static struct pci_device_id ehci_pci_ids[] = {
{0, 0}
 };
 #else
-static pci_dev_t ehci_find_class(void)
+static pci_dev_t ehci_find_class(int index)
 {
int bus;
int devnum;
@@ -54,7 +54,8 @@ static pci_dev_t ehci_find_class(void)
bdf += PCI_BDF(0, 0, 1)) {
pci_read_config_dword(bdf, PCI_CLASS_REVISION,
  &class);
-   if (class >> 8 == PCI_CLASS_SERIAL_USB_EHCI)
+   if ((class >> 8 == PCI_CLASS_SERIAL_USB_EHCI)
+   && !index--)
return bdf;
}
}
@@ -68,34 +69,41 @@ static pci_dev_t ehci_find_class(void)
  * Create the appropriate control structures to manage
  * a new EHCI host controller.
  */
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr,
+   struct ehci_hcor **ret_hcor)
 {
pci_dev_t pdev;
uint32_t cmd;
+   struct ehci_hccr *hccr;
+   struct ehci_hcor *hcor;
 
 #ifdef CONFIG_PCI_EHCI_DEVICE
pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
 #else
-   pdev = ehci_find_class();
+   pdev = ehci_find_class(index);
 #endif
if (pdev < 0) {
printf("EHCI host controller not found\n");
return -1;
}
 
-   *hccr = (struct ehci_hccr *)pci_map_bar(pdev,
+   hccr = (struct ehci_hccr *)pci_map_bar(pdev,
PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
-   *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
-   HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
+   hcor = (struct ehci_hcor *)((uint32_t) hccr +
+   HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
-   (uint32_t)*hccr, (uint32_t)*hcor,
-   (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
+   (uint32_t)hccr, (uint32_t)hcor,
+   (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
/* enable busmaster */
pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MASTER;
pci_write_config_dword(pdev, PCI_COMMAND, cmd);
+
+   *ret_hccr = hccr;
+   *ret_hcor = hcor;
+
return 0;
 }
 
-- 
1.7.7.3

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[U-Boot] [PATCH v2 4/7] usb: ehci: Fix aliasing issue in EHCI interrupt code

[Simon Glass]

From: Vincent Palatin 

The interrupt endpoint handling code stores the buffer pointer in the QH
padding field. We need to make it the size of a pointer to avoid strict
aliasing issue with the compiler.

Signed-off-by: Vincent Palatin 

Signed-off-by: Simon Glass 
---
Changes in v2: None

 drivers/usb/host/ehci.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 8bc2ba1..5370eb0 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -247,7 +247,7 @@ struct QH {
 * aligned to 32 bytes
 */
union {
-   uint8_t fill[16];
+   uint32_t fill[4];
void *buffer;
};
 };
-- 
1.7.7.3

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[U-Boot] [PATCH v2 2/7] usb: ehci: generic PCI support

[Simon Glass]

From: Vincent Palatin 

Instead of hardcoding the PCI IDs on the USB controller, use the PCI
class to detect them.

Ensure the busmaster bit is properly set in the PCI configuration.

Signed-off-by: Simon Glass 
---
Changes in v2:
- Use errno where possible
- Use PCI_CLASS_SERIAL_USB_EHCI instead of the number

 drivers/usb/host/ehci-pci.c |   41 -
 1 files changed, 40 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 29af02d..8064a32 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -19,6 +19,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 
@@ -32,6 +33,35 @@ static struct pci_device_id ehci_pci_ids[] = {
{0x12D8, 0x400F},   /* Pericom */
{0, 0}
 };
+#else
+static pci_dev_t ehci_find_class(void)
+{
+   int bus;
+   int devnum;
+   pci_dev_t bdf;
+   uint32_t class;
+
+   for (bus = 0; bus < pci_last_busno(); bus++) {
+   for (devnum = 0; devnum < PCI_MAX_PCI_DEVICES-1; devnum++) {
+   pci_read_config_dword(PCI_BDF(bus, devnum, 0),
+ PCI_CLASS_REVISION, &class);
+   if (class >> 16 == 0x)
+   continue;
+
+   for (bdf = PCI_BDF(bus, devnum, 0);
+   bdf <= PCI_BDF(bus, devnum,
+   PCI_MAX_PCI_FUNCTIONS - 1);
+   bdf += PCI_BDF(0, 0, 1)) {
+   pci_read_config_dword(bdf, PCI_CLASS_REVISION,
+ &class);
+   if (class >> 8 == PCI_CLASS_SERIAL_USB_EHCI)
+   return bdf;
+   }
+   }
+   }
+
+   return -ENODEV;
+}
 #endif
 
 /*
@@ -41,9 +71,14 @@ static struct pci_device_id ehci_pci_ids[] = {
 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
pci_dev_t pdev;
+   uint32_t cmd;
 
+#ifdef CONFIG_PCI_EHCI_DEVICE
pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
-   if (pdev == -1) {
+#else
+   pdev = ehci_find_class();
+#endif
+   if (pdev < 0) {
printf("EHCI host controller not found\n");
return -1;
}
@@ -57,6 +92,10 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct 
ehci_hcor **hcor)
(uint32_t)*hccr, (uint32_t)*hcor,
(uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
 
+   /* enable busmaster */
+   pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
+   cmd |= PCI_COMMAND_MASTER;
+   pci_write_config_dword(pdev, PCI_COMMAND, cmd);
return 0;
 }
 
-- 
1.7.7.3

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[U-Boot] [PATCH v2 7/7] x86: Enable USB features for coreboot

[Simon Glass]

Enable PCI EHCI, storage, keyboard and Ethernet for USB.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 include/configs/coreboot.h |   17 +
 1 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index adeace0..79adbc0 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -267,6 +267,23 @@
  */
 #define CONFIG_PCI
 
+/*---
+ * USB configuration
+ */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_PCI
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12
+#define CONFIG_USB_MAX_CONTROLLER_COUNT2
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_KEYBOARD
+#define CONFIG_SYS_USB_EVENT_POLL
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_SMSC95XX
+
+#define CONFIG_CMD_USB
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_STD_DEVICES_SETTINGS
 
-- 
1.7.7.3

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Re: [U-Boot] [PATCH] common/command.c: revert chanches from commit 199adb60

[Rommel Custodio]

Dear Anatolij,

Anatolij Gustschin  denx.de> writes:

> 
> Hi Albert,
> 
> On Sat, 10 Nov 2012 12:21:55 +0100
> Albert ARIBAUD  aribaud.net> wrote:
> ...
> > > 
> > > Applied to u-boot-staging/agust  denx.de-urgent.

*bump*

This seems to be still missing in master.

All the best,
Rommel

> > 
> > Did you fix the typo in the commit summary/subject on the fly?
> 
> yes, I noticed it when applying, it wasn't worth it to resubmit the patch.
> 
> Thanks,
> Anatolij
> 




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[U-Boot] [PATCH] mmc: sdhci: return error when failed add_sdhci().

[Jaehoon Chung]

If failed the add_host(), it is reasonable that return value of
add_sdhci().

Signed-off-by: Jaehoon Chung 
Signed-off-by: Kyungmin Park 
---
 drivers/mmc/mv_sdhci.c  |3 +--
 drivers/mmc/s5p_sdhci.c |3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
index 2fe34b6..63e1f90 100644
--- a/drivers/mmc/mv_sdhci.c
+++ b/drivers/mmc/mv_sdhci.c
@@ -51,6 +51,5 @@ int mv_sdh_init(u32 regbase, u32 max_clk, u32 min_clk, u32 
quirks)
host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
else
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
-   add_sdhci(host, max_clk, min_clk);
-   return 0;
+   return add_sdhci(host, max_clk, min_clk);
 }
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index dc49d37..e50ff92 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -94,6 +94,5 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
 
host->host_caps = MMC_MODE_HC;
 
-   add_sdhci(host, 5200, 40);
-   return 0;
+   return add_sdhci(host, 5200, 40);
 }
-- 
1.7.5.4
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Re: [U-Boot] [PATCH 13/57] x86: Move new_gd_addr to arch_global_data

[Simon Glass]

Hi Graeme,

On Sat, Nov 17, 2012 at 5:07 PM, Graeme Russ  wrote:
> Hi Simon,
>
> On 11/17/2012 08:19 AM, Simon Glass wrote:
>> Move this field into arch_global_data and tidy up.
>>
>> This will certainly break x86, so will need Graeme's help to sort out
>
> Yes, it most certainly will break x86 :)
>
>> the problem. I would prefer not to put the architecture-specific stuff
>> at the top of global_data since we relying on that seems even more ugly.
>
> The fix is not that hard though...
>
> The whole point of putting gdt_addr at the top of the global data structure
> is to guarantee that is is the very fist void * in gd. The trick is how we
> use the 'F' segment. By loading the fs register with the physical address
> of gd, virtual address 0 of fs contains the address of gd.
>
> But really, we can put the address of gd anywhere, as long as we set fs to
> be that address
>
>>
>> Signed-off-by: Simon Glass 
>> ---
>>  arch/x86/cpu/cpu.c |2 +-
>>  arch/x86/include/asm/global_data.h |   12 +---
>>  arch/x86/lib/init_helpers.c|2 +-
>>  3 files changed, 11 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
>> index e9bb0d7..c276aa6 100644
>> --- a/arch/x86/cpu/cpu.c
>> +++ b/arch/x86/cpu/cpu.c
>> @@ -92,7 +92,7 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries)
>>
>>  void init_gd(gd_t *id, u64 *gdt_addr)
>>  {
>> - id->gd_addr = (ulong)id;
>> + id->arch.gd_addr = (ulong)id;
>>   setup_gdt(id, gdt_addr);
>
> If the original code had been:
>
> setup_gdt(&(id->gd_addr), gdt_addr);
>
> There would have been no reliance on gd_addr being the first member of gd.
> So change this to:
>
> setup_gdt(&(id->arch.gd_addr), gdt_addr);
>
> And you should be pretty much set - and gd_addr can be anywhere in the arch 
> gd.

Thanks for that. I actually understand it now, for better or worse. It
seems to work fine. Actually your clean-up of the global_data really
has paid dividends as things are so much nicer now.

I'm going to resend the whole series rebased to master.

Regards,
Simon

>
>>  }
>>
>> diff --git a/arch/x86/include/asm/global_data.h 
>> b/arch/x86/include/asm/global_data.h
>> index 3df83bb..d2eb00a 100644
>> --- a/arch/x86/include/asm/global_data.h
>> +++ b/arch/x86/include/asm/global_data.h
>> @@ -28,8 +28,16 @@
>>
>>  /* Architecture-specific global data */
>>  struct arch_global_data {
>> - unsigned long gdt_addr; /* Location of GDT */
>> + /*
>> +  * NOTE: gd_addr MUST be first member of struct global_data!
>> +  *
>> +  * But it now isn't, so this is sure to break x86. Can we change
>> +  * x86 to not require this? I don't think we should put the
>> +  * arch data first in global_data...
>> +  */
>
> Yes we can - see above
>
>>   unsigned long new_gd_addr;  /* New location of Global Data */
>> + unsigned long gd_addr;  /* Location of Global Data */
>> + unsigned long gdt_addr; /* Location of GDT */
>>  };
>>
>>  /*
>> @@ -41,8 +49,6 @@ struct arch_global_data {
>>   */
>>
>>  typedef  struct global_data {
>> - /* NOTE: gd_addr MUST be first member of struct global_data! */
>> - unsigned long   gd_addr;/* Location of Global Data */
>>   bd_t*bd;
>>   unsigned long   flags;
>>   unsigned intbaudrate;
>> diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
>> index 05cadcd..ac789c2 100644
>> --- a/arch/x86/lib/init_helpers.c
>> +++ b/arch/x86/lib/init_helpers.c
>> @@ -126,7 +126,7 @@ int copy_gd_to_ram_f_r(void)
>>* in-RAM copy of Global Data (calculate_relocation_address()
>>* has already calculated the in-RAM location of the GDT)
>>*/
>> - ram_gd->gd_addr = (ulong)ram_gd;
>> + ram_gd->arch.gd_addr = (ulong)ram_gd;
>>   init_gd(ram_gd, (u64 *)gd->arch.gdt_addr);
>>
>>   return 0;
>>
>
> Regards,
>
> Graeme
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[U-Boot] [PATCH v2 0/58] Move arch-specific global data into its own structure

[Simon Glass]

The previous generic board series hit a snag in that we needed generic
code to access some of the architecture-specific fields in global_data.

The solution eventually arrived at was to move these fields into a
separate structure, so that global_data has the generic fields,
and within that there is an arch_global_data structure holding the
architecture-specific ones.

This series makes that change. Assuming this is reasonable, the next
step is to bring back the generic board patches on top of this.

A couple of things are left undone in this series:
- possibly unify brg_clk on powerpc (but that would involve unifying some
ifdefs
- decide what to do about PCI clock being present with there is no
CONFIG_PCI. It seem wrong to me, but I haven't changed it for this series.

I have completed a build of all commits for all builds and see no
regressions. But the following boards had errors/warnings, so it seems I
need to continue working on my toolchains:

  blackfin:   + bf561-acvilon  + dnp5370  + cm-bf561  + blackstamp  + br4
+ bct-brettl2  + cm-bf527  + bf506f-ezkit  + ip04  + bf527-sdp  +
bf537-stamp  + bf527-ezkit-v2  + cm-bf537e  + tcm-bf518  + cm-bf537u  +
bf527-ezkit  + bf537-pnav  + cm-bf533  + pr1  + bf533-ezkit  + ibf-dsp561  +
bf537-srv1  + cm-bf548  + bf537-minotaur  + bf538f-ezkit  + bf548-ezkit  +
bf525-ucr2  + blackvme  + tcm-bf537  + bf533-stamp  + bf518f-ezbrd  +
bf527-ad7160-eval  + bf526-ezbrd  + bf561-ezkit
 avr32:   + hammerhead  + atngw100mkii  + grasshopper  + favr-32-ezkit
+ atstk1006  + atstk1004  + atstk1003  + atstk1002  + atngw100  + mimc200
  m68k:   + M5235EVB_Flash32  + M54455EVB_a66  + M5329AFEE  + M5249EVB
+ idmr  + M5208EVBE  + eb_cpu5282  + M5475FFE  + M54451EVB  + astro_mcf5373l
 + M54418TWR_serial_rmii  + M54455EVB_intel  + M5282EVB  + M54455EVB_i66  +
M5475GFE  + M5253DEMO  + M54455EVB_stm33  + M5253EVBE  + M5485BFE  +
M5485DFE  + M5329BFEE  + M52277EVB  + M5475EFE  + M5475CFE  + cobra5272  +
M5485AFE  + M53017EVB  + M5475AFE  + M5485HFE  + M5235EVB  + M5275EVB  +
M5271EVB  + M54418TWR_nand_mii  + M54418TWR_nand_rmii_lowfreq  + TASREG  +
M5475BFE  + M5475DFE  + M52277EVB_stmicro  + eb_cpu5282_internal  +
M54451EVB_stmicro  + M5485GFE  + M5373EVB  + M5485EFE  + M5485FFE  +
M54418TWR  + M54418TWR_nand_rmii  + M54418TWR_serial_mii  + M5485CFE  +
M54455EVB  + M5272C3
   powerpc:   + MVBLM7  + MVSMR
 sparc:   + grsim  + grsim_leon2  + gr_cpci_ax2000  + gr_xc3s_1500  +
gr_ep2s60
sh:   + rsk7269  + rsk7264  + sh7757lcr  + rsk7203
microblaze:   + microblaze-generic
  openrisc:   + openrisc-generic
  mips:   + incaip_150MHz  + pb1000  + vct_premium_onenand   +
vct_platinum  + qemu_mips  + vct_premium_small  + dbau1100  +
vct_platinumavc_small  + vct_premium_onenand_small  + incaip  +
vct_platinum_small  + dbau1550  + dbau1500  + qemu_mips64el  +
vct_platinumavc_onenand_small  + incaip_133MHz  + vct_platinum_onenand_small
 + vct_premium  + vct_platinumavc_onenand  + qemu_mips64  + qi_lb60  +
vct_platinumavc  + incaip_100MHz  + vct_platinum_onenand  + qemu_mipsel  +
dbau1550_el  + dbau1000
   arm:   + VCMA9  + smdk2410
 nds32:   + adp-ag101p  + adp-ag102  + adp-ag101


Changes in v2:
- Rebase to master
- Remove gdt_addr which is no longer used on x86
- Add new patch to move gd pointer by C to asm on x86
- Rebase to master
- Remove tabs after #ifdef and #define in generic global_data
- Rebase to master

Simon Glass (58):
  Add architecture-specific global data
  at91: Move at91 global data into arch_global_data
  arm: Move timer_rate_hz into arch_global_data
  arm: Move tbu to arch_global_data
  arm: Move tbl to arch_global_data
  arm: Move lastinc to arch_global_data
  arm: Move timer_reset_value to arch_global_data
  ixp: Move timestamp to arch_global_data
  nds32: Drop tlb_addr from global data
  arm: Move tlb_addr to arch_global_data
  x86: Remove gdt_addr from arch_global_data
  x86: Move gd_addr into arch_global_data
  x86: Set up the global data pointer in C instead of asm
  x86: Remove reset_status, relocoff from global_data
  ppc: Move brg_clk to arch_global_data
  ppc: Remove extra pci_clk fields from global_data
  ppc: Move clock fields to arch_global_data
  ppc: Move mpc83xx clock fields to arch_global_data
  ppc: Move lbc_clk and cpu to arch_global_data
  ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data
  ppc: Move CONFIG_QE to arch_global_data
  ppc: Move used_laws to arch_global_data
  ppc: Move used_tlb_cams to arch_global_data
  ppc: Move mpc5xxx clocks to arch_global_data
  ppc: Move mpc512x clocks to arch_global_data
  ppc: Move mpc8220 clocks to arch_global_data
  ppc: Move reset_status to arch_global_data
  ppc: Move arbiter fields to arch_global_data
  ppc: Move dp_alloc_base, dp_alloc_top to arch_global_data
  arm: Move uart_clk to arch_global_data
  ppc: Move mirror_hack to arch_global_data
  ppc: Remove console_addr from global data
  ppc: Move fpga_state to arch_global_data
  ppc: Move wdt_last to arch_global_data
  ppc: Mo

[U-Boot] [PATCH v2 11/58] x86: Remove gdt_addr from arch_global_data

[Simon Glass]

Remove this unused field.

Signed-off-by: Simon Glass 
---
Changes in v2:
- Remove gdt_addr which is no longer used on x86

 arch/x86/include/asm/global_data.h |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/global_data.h 
b/arch/x86/include/asm/global_data.h
index 39c1acf..9a4f141 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -61,7 +61,6 @@ struct global_data {
unsigned long   bus_clk;
unsigned long   relocaddr;  /* Start address of U-Boot in RAM */
unsigned long   start_addr_sp;  /* start_addr_stackpointer */
-   unsigned long   gdt_addr;   /* Location of GDT */
phys_size_t ram_size;   /* RAM size */
unsigned long   reset_status;   /* reset status register at boot */
const void  *fdt_blob;  /* Our device tree, NULL if none */
-- 
1.7.7.3

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[U-Boot] [PATCH v2 04/58] arm: Move tbu to arch_global_data

[Simon Glass]

Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 arch/arm/cpu/arm920t/a320/timer.c|6 +++---
 arch/arm/cpu/arm920t/s3c24x0/timer.c |   14 +++---
 arch/arm/cpu/arm926ejs/armada100/timer.c |   12 ++--
 arch/arm/cpu/arm926ejs/at91/timer.c  |6 +++---
 arch/arm/cpu/arm926ejs/davinci/timer.c   |4 ++--
 arch/arm/cpu/arm926ejs/pantheon/timer.c  |   12 ++--
 arch/arm/cpu/armv7/u8500/timer.c |2 +-
 arch/arm/include/asm/global_data.h   |2 +-
 8 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/arch/arm/cpu/arm920t/a320/timer.c 
b/arch/arm/cpu/arm920t/a320/timer.c
index 2873643..781533b 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -75,7 +75,7 @@ int timer_init(void)
writel(cr, &tmr->cr);
 
gd->arch.timer_rate_hz = TIMER_CLOCK;
-   gd->tbu = gd->tbl = 0;
+   gd->arch.tbu = gd->tbl = 0;
 
return 0;
 }
@@ -90,9 +90,9 @@ unsigned long long get_ticks(void)
 
/* increment tbu if tbl has rolled over */
if (now < gd->tbl)
-   gd->tbu++;
+   gd->arch.tbu++;
gd->tbl = now;
-   return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+   return (((unsigned long long)gd->arch.tbu) << 32) | gd->tbl;
 }
 
 void __udelay(unsigned long usec)
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c 
b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index 7694fea..e59e614 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -45,17 +45,17 @@ int timer_init(void)
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
writel(0x0f00, &timers->tcfg0);
-   if (gd->tbu == 0) {
+   if (gd->arch.tbu == 0) {
/*
 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
 * (default) and prescaler = 16. Should be 10390
 * @33.25MHz and 15625 @ 50 MHz
 */
-   gd->tbu = get_PCLK() / (2 * 16 * 100);
+   gd->arch.tbu = get_PCLK() / (2 * 16 * 100);
gd->arch.timer_rate_hz = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
-   writel(gd->tbu, &timers->tcntb4);
+   writel(gd->arch.tbu, &timers->tcntb4);
/* auto load, manual update of timer 4 */
tmr = (readl(&timers->tcon) & ~0x070) | 0x060;
writel(tmr, &timers->tcon);
@@ -82,7 +82,7 @@ void __udelay (unsigned long usec)
ulong start = get_ticks();
 
tmo = usec / 1000;
-   tmo *= (gd->tbu * 100);
+   tmo *= (gd->arch.tbu * 100);
tmo /= 1000;
 
while ((ulong) (get_ticks() - start) < tmo)
@@ -104,10 +104,10 @@ void udelay_masked(unsigned long usec)
 
if (usec >= 1000) {
tmo = usec / 1000;
-   tmo *= (gd->tbu * 100);
+   tmo *= (gd->arch.tbu * 100);
tmo /= 1000;
} else {
-   tmo = usec * (gd->tbu * 100);
+   tmo = usec * (gd->arch.tbu * 100);
tmo /= (1000 * 1000);
}
 
@@ -133,7 +133,7 @@ unsigned long long get_ticks(void)
gd->tbl += gd->lastinc - now;
} else {
/* we have an overflow ... */
-   gd->tbl += gd->lastinc + gd->tbu - now;
+   gd->tbl += gd->lastinc + gd->arch.tbu - now;
}
gd->lastinc = now;
 
diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c 
b/arch/arm/cpu/arm926ejs/armada100/timer.c
index 355cd6d..18ffd0c 100644
--- a/arch/arm/cpu/arm926ejs/armada100/timer.c
+++ b/arch/arm/cpu/arm926ejs/armada100/timer.c
@@ -61,7 +61,7 @@ struct armd1tmr_registers {
 #defineCOUNT_RD_REQ0x1
 
 DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->tbl for lastdec */
 
 /* For preventing risk of instability in reading counter value,
  * first set read request to register cvwr and then read same
@@ -84,14 +84,14 @@ ulong get_timer_masked(void)
 
if (now >= gd->tbl) {
/* normal mode */
-   gd->tbu += now - gd->tbl;
+   gd->arch.tbu += now - gd->tbl;
} else {
/* we have an overflow ... */
-   gd->tbu += now + TIMER_LOAD_VAL - gd->tbl;
+   gd->arch.tbu += now + TIMER_LOAD_VAL - gd->tbl;
}
gd->tbl = now;
 
-   return gd->tbu;
+   return gd->arch.tbu;
 }
 
 ulong get_timer(ulong base)
@@ -135,9 +135,9 @@ int timer_init(void)
 
/* Enable timer 0 */
writel(0x1, &armd1timers->cer);
-   /* init the gd->tbu and gd->tbl value */
+   /* init the gd->arch.tbu and gd->tbl value */
gd->tbl = read_timer();
-   gd->tbu = 0;
+   gd->arch.tbu = 0;
 
return 0;
 }
diff --git a/arch/arm/cpu/arm926ejs/at91/tim

[U-Boot] [PATCH v2 03/58] arm: Move timer_rate_hz into arch_global_data

[Simon Glass]

Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 arch/arm/cpu/arm920t/a320/timer.c  |8 
 arch/arm/cpu/arm920t/s3c24x0/timer.c   |4 ++--
 arch/arm/cpu/arm926ejs/at91/timer.c|8 
 arch/arm/cpu/arm926ejs/davinci/timer.c |9 +
 arch/arm/include/asm/global_data.h |3 ++-
 5 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/arm920t/a320/timer.c 
b/arch/arm/cpu/arm920t/a320/timer.c
index 4bfcef2..2873643 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -31,14 +31,14 @@ DECLARE_GLOBAL_DATA_PTR;
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
tick *= CONFIG_SYS_HZ;
-   do_div(tick, gd->timer_rate_hz);
+   do_div(tick, gd->arch.timer_rate_hz);
 
return tick;
 }
 
 static inline unsigned long long usec_to_tick(unsigned long long usec)
 {
-   usec *= gd->timer_rate_hz;
+   usec *= gd->arch.timer_rate_hz;
do_div(usec, 100);
 
return usec;
@@ -74,7 +74,7 @@ int timer_init(void)
cr |= FTTMR010_TM3_ENABLE;
writel(cr, &tmr->cr);
 
-   gd->timer_rate_hz = TIMER_CLOCK;
+   gd->arch.timer_rate_hz = TIMER_CLOCK;
gd->tbu = gd->tbl = 0;
 
return 0;
@@ -126,5 +126,5 @@ ulong get_timer(ulong base)
  */
 ulong get_tbclk(void)
 {
-   return gd->timer_rate_hz;
+   return gd->arch.timer_rate_hz;
 }
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c 
b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index d8668be..7694fea 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -52,7 +52,7 @@ int timer_init(void)
 * @33.25MHz and 15625 @ 50 MHz
 */
gd->tbu = get_PCLK() / (2 * 16 * 100);
-   gd->timer_rate_hz = get_PCLK() / (2 * 16);
+   gd->arch.timer_rate_hz = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
writel(gd->tbu, &timers->tcntb4);
@@ -93,7 +93,7 @@ ulong get_timer_masked(void)
 {
ulong tmr = get_ticks();
 
-   return tmr / (gd->timer_rate_hz / CONFIG_SYS_HZ);
+   return tmr / (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
 }
 
 void udelay_masked(unsigned long usec)
diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c 
b/arch/arm/cpu/arm926ejs/at91/timer.c
index 641ae3e..061ccaf 100644
--- a/arch/arm/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
@@ -52,14 +52,14 @@ DECLARE_GLOBAL_DATA_PTR;
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
tick *= CONFIG_SYS_HZ;
-   do_div(tick, gd->timer_rate_hz);
+   do_div(tick, gd->arch.timer_rate_hz);
 
return tick;
 }
 
 static inline unsigned long long usec_to_tick(unsigned long long usec)
 {
-   usec *= gd->timer_rate_hz;
+   usec *= gd->arch.timer_rate_hz;
do_div(usec, 100);
 
return usec;
@@ -79,7 +79,7 @@ int timer_init(void)
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
 
-   gd->timer_rate_hz = gd->arch.mck_rate_hz / 16;
+   gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
gd->tbu = gd->tbl = 0;
 
return 0;
@@ -132,5 +132,5 @@ ulong get_timer(ulong base)
  */
 ulong get_tbclk(void)
 {
-   return gd->timer_rate_hz;
+   return gd->arch.timer_rate_hz;
 }
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c 
b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 93c9e60..7e852b5 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -60,7 +60,7 @@ int timer_init(void)
writel(0x0, &timer->tim34);
writel(TIMER_LOAD_VAL, &timer->prd34);
writel(2 << 22, &timer->tcr);
-   gd->timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
+   gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
gd->timer_reset_value = 0;
 
return(0);
@@ -87,14 +87,15 @@ ulong get_timer(ulong base)
 
timer_diff = get_ticks() - gd->timer_reset_value;
 
-   return lldiv(timer_diff, (gd->timer_rate_hz / CONFIG_SYS_HZ)) - base;
+   return lldiv(timer_diff,
+(gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;
 }
 
 void __udelay(unsigned long usec)
 {
unsigned long long endtime;
 
-   endtime = lldiv((unsigned long long)usec * gd->timer_rate_hz,
+   endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
100UL);
endtime += get_ticks();
 
@@ -108,7 +109,7 @@ void __udelay(unsigned long usec)
  */
 ulong get_tbclk(void)
 {
-   return gd->timer_rate_hz;
+   return gd->arch.timer_rate_hz;
 }
 
 #ifdef CONFIG_HW_WATCHDOG
diff --git a/arch/arm/include/asm/global_data.h 
b/arch/arm/include/asm/global_data.h
index ba7814a..7a2f644 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -35,6 +35

[U-Boot] [PATCH v2 13/58] x86: Set up the global data pointer in C instead of asm

[Simon Glass]

We currently assume that the global data pointer is at the start of
struct global_data. We want to remove this restriction, and it is
easiest to do this in C.

Remove the asm code and add equivalent code in C.

This idea was proposed by Graeme Russ here:
   http://patchwork.ozlabs.org/patch/199741/

Signed-off-by: Simon Glass 
---
Changes in v2:
- Add new patch to move gd pointer by C to asm on x86

 arch/x86/cpu/cpu.c   |4 +++-
 arch/x86/cpu/start.S |6 --
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 315e87a..6a23974 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -100,7 +100,9 @@ void setup_gdt(gd_t *id, u64 *gdt_addr)
gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xf);
 
/* FS: data, read/write, 4 GB, base (Global Data Pointer) */
-   gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093, (ulong)id, 
0xf);
+   id->arch.gd_addr = id;
+   gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093,
+(ulong)&id->arch.gd_addr, 0xf);
 
/* 16-bit CS: code, read/execute, 64 kB, base 0 */
gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0);
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index e960e21..f389584 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -113,9 +113,6 @@ car_init_ret:
/* Set second parameter to setup_gdt */
movl%esp, %edx
 
-   /* gd->gd_addr = gd (Required to allow gd->xyz to work) */
-   movl%eax, (%eax)
-
/* Setup global descriptor table so gd->xyz works */
callsetup_gdt
 
@@ -171,9 +168,6 @@ board_init_f_r_trampoline:
/* Set second parameter to setup_gdt */
movl%esp, %edx
 
-   /* gd->gd_addr = gd (Required to allow gd->xyz to work) */
-   movl%eax, (%eax)
-
/* Setup global descriptor table so gd->xyz works */
callsetup_gdt
 
-- 
1.7.7.3

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[U-Boot] [PATCH v2 12/58] x86: Move gd_addr into arch_global_data

[Simon Glass]

Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 arch/x86/include/asm/global_data.h |3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/global_data.h 
b/arch/x86/include/asm/global_data.h
index 9a4f141..eded279 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -28,6 +28,7 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
+   struct global_data *gd_addr;/* Location of Global Data */
 };
 
 /*
@@ -44,8 +45,6 @@ typedef struct global_data gd_t;
 
 struct global_data {
struct arch_global_data arch;   /* architecture-specific data */
-   /* NOTE: gd_addr MUST be first member of struct global_data! */
-   gd_t *gd_addr;  /* Location of Global Data */
bd_t*bd;
unsigned long   flags;
unsigned intbaudrate;
-- 
1.7.7.3

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[U-Boot] [PATCH v2 14/58] x86: Remove reset_status, relocoff from global_data

[Simon Glass]

These fields are not used on x86, so punt them.

Signed-off-by: Simon Glass 
---
Changes in v2:
- Rebase to master

 arch/x86/include/asm/global_data.h |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/global_data.h 
b/arch/x86/include/asm/global_data.h
index eded279..06dd84f 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -53,7 +53,6 @@ struct global_data {
unsigned long   precon_buf_idx; /* Pre-Console buffer index */
 #endif
unsigned long   reloc_off;  /* Relocation Offset */
-   unsigned long   load_off;   /* Load Offset */
unsigned long   env_addr;   /* Address  of Environment struct */
unsigned long   env_valid;  /* Checksum of Environment valid? */
unsigned long   cpu_clk;/* CPU clock in Hz! */
@@ -61,7 +60,6 @@ struct global_data {
unsigned long   relocaddr;  /* Start address of U-Boot in RAM */
unsigned long   start_addr_sp;  /* start_addr_stackpointer */
phys_size_t ram_size;   /* RAM size */
-   unsigned long   reset_status;   /* reset status register at boot */
const void  *fdt_blob;  /* Our device tree, NULL if none */
void**jt;   /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
-- 
1.7.7.3

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[U-Boot] [PATCH v2 15/58] ppc: Move brg_clk to arch_global_data

[Simon Glass]

Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 arch/powerpc/cpu/mpc8260/commproc.c|2 +-
 arch/powerpc/cpu/mpc8260/i2c.c |2 +-
 arch/powerpc/cpu/mpc8260/speed.c   |4 ++--
 arch/powerpc/cpu/mpc83xx/speed.c   |5 +++--
 arch/powerpc/cpu/mpc85xx/commproc.c|2 +-
 arch/powerpc/cpu/mpc85xx/speed.c   |4 ++--
 arch/powerpc/cpu/mpc8xx/fdt.c  |2 +-
 arch/powerpc/cpu/mpc8xx/speed.c|2 +-
 arch/powerpc/include/asm/global_data.h |   14 +-
 arch/powerpc/lib/board.c   |2 +-
 common/cmd_immap.c |2 +-
 drivers/qe/fdt.c   |4 ++--
 drivers/qe/qe.c|2 +-
 13 files changed, 26 insertions(+), 21 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8260/commproc.c 
b/arch/powerpc/cpu/mpc8260/commproc.c
index 082957e..e5bfed1 100644
--- a/arch/powerpc/cpu/mpc8260/commproc.c
+++ b/arch/powerpc/cpu/mpc8260/commproc.c
@@ -101,7 +101,7 @@ m8260_cpm_hostalloc(uint size, uint align)
  * Baud rate clocks are zero-based in the driver code (as that maps
  * to port numbers).  Documentation uses 1-based numbering.
  */
-#define BRG_INT_CLKgd->brg_clk
+#define BRG_INT_CLKgd->arch.brg_clk
 #define BRG_UART_CLK   (BRG_INT_CLK / 16)
 
 /* This function is used by UARTs, or anything else that uses a 16x
diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c
index 7382cba..b720b1f 100644
--- a/arch/powerpc/cpu/mpc8260/i2c.c
+++ b/arch/powerpc/cpu/mpc8260/i2c.c
@@ -259,7 +259,7 @@ void i2c_init(int speed, int slaveadd)
 * divide BRGCLK by 1)
 */
debug("[I2C] Setting rate...\n");
-   i2c_setrate(gd->brg_clk, CONFIG_SYS_I2C_SPEED);
+   i2c_setrate(gd->arch.brg_clk, CONFIG_SYS_I2C_SPEED);
 
/* Set I2C controller in master mode */
i2c->i2c_i2com = 0x01;
diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c
index bb50dee..4ad1ec2 100644
--- a/arch/powerpc/cpu/mpc8260/speed.c
+++ b/arch/powerpc/cpu/mpc8260/speed.c
@@ -145,7 +145,7 @@ int get_clocks (void)
gd->cpm_clk = gd->vco_out / 2;
gd->bus_clk = clkin;
gd->scc_clk = gd->vco_out / 4;
-   gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+   gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
 
if (cp->b2c_mult > 0) {
gd->cpu_clk = (clkin * cp->b2c_mult) / 2;
@@ -231,7 +231,7 @@ int prt_8260_clks (void)
plldf, pllmf, pcidf);
 
printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
-   gd->vco_out, gd->scc_clk, gd->brg_clk);
+   gd->vco_out, gd->scc_clk, gd->arch.brg_clk);
 
printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index b8c05d1..21e8b0a 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -496,7 +496,7 @@ int get_clocks(void)
 #endif
 #if defined(CONFIG_QE)
gd->qe_clk = qe_clk;
-   gd->brg_clk = brg_clk;
+   gd->arch.brg_clk = brg_clk;
 #endif
 #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC837x)
@@ -540,7 +540,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
printf("  Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
 #if defined(CONFIG_QE)
printf("  QE:  %-4s MHz\n", strmhz(buf, gd->qe_clk));
-   printf("  BRG: %-4s MHz\n", strmhz(buf, gd->brg_clk));
+   printf("  BRG: %-4s MHz\n",
+  strmhz(buf, gd->arch.brg_clk));
 #endif
printf("  Local Bus Controller:%-4s MHz\n", strmhz(buf, gd->lbiu_clk));
printf("  Local Bus:   %-4s MHz\n", strmhz(buf, gd->lclk_clk));
diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c 
b/arch/powerpc/cpu/mpc85xx/commproc.c
index 292b723..7f10476 100644
--- a/arch/powerpc/cpu/mpc85xx/commproc.c
+++ b/arch/powerpc/cpu/mpc85xx/commproc.c
@@ -110,7 +110,7 @@ m8560_cpm_hostalloc(uint size, uint align)
  * Baud rate clocks are zero-based in the driver code (as that maps
  * to port numbers).  Documentation uses 1-based numbering.
  */
-#define BRG_INT_CLKgd->brg_clk
+#define BRG_INT_CLKgd->arch.brg_clk
 #define BRG_UART_CLK   ((BRG_INT_CLK + 15) / 16)
 
 /* This function is used by UARTS, or anything else that uses a 16x
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 801ee07..8a581ef 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -395,7 +395,7 @@ int get_clocks (void)
 
 #ifdef CONFIG_QE
gd->qe_clk = sys_info.freqQE;
-   gd->brg_clk = gd->qe_clk / 2;
+   gd->arch.brg_clk = gd->qe_clk / 2;
 #endif
 

[U-Boot] [PATCH v2 24/58] ppc: Move mpc5xxx clocks to arch_global_data

[Simon Glass]

Move ipb_clk and pci_clk into arch_global_data and tidy up.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 arch/powerpc/cpu/mpc5xxx/i2c.c |2 +-
 arch/powerpc/cpu/mpc5xxx/ide.c |2 +-
 arch/powerpc/cpu/mpc5xxx/serial.c  |4 ++--
 arch/powerpc/cpu/mpc5xxx/speed.c   |   18 --
 arch/powerpc/cpu/mpc8220/fec.c |8 +---
 arch/powerpc/include/asm/global_data.h |6 +++---
 arch/powerpc/lib/board.c   |2 +-
 board/inka4x0/inkadiag.c   |8 
 drivers/input/ps2ser.c |2 +-
 drivers/net/mpc5xxx_fec.c  |9 ++---
 10 files changed, 36 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c
index b423d2f..8d5f47b 100644
--- a/arch/powerpc/cpu/mpc5xxx/i2c.c
+++ b/arch/powerpc/cpu/mpc5xxx/i2c.c
@@ -310,7 +310,7 @@ static int mpc_get_fdr(int speed)
{126, 128}
};
 
-   ipb = gd->ipb_clk;
+   ipb = gd->arch.ipb_clk;
for (i = 7; i >= 0; i--) {
for (j = 7; j >= 0; j--) {
scl = 2 * (scltap[j].scl2tap +
diff --git a/arch/powerpc/cpu/mpc5xxx/ide.c b/arch/powerpc/cpu/mpc5xxx/ide.c
index d337abb..094f62b 100644
--- a/arch/powerpc/cpu/mpc5xxx/ide.c
+++ b/arch/powerpc/cpu/mpc5xxx/ide.c
@@ -75,7 +75,7 @@ int ide_preinit (void)
psdma->PtdCntrl |= 1;
 
/* Init timings : we use PIO mode 0 timings */
-   period = 10 / gd->ipb_clk;  /* period in ns */
+   period = 10 / gd->arch.ipb_clk; /* period in ns */
 
t0 = CALC_TIMING (600);
t2_8 = CALC_TIMING (290);
diff --git a/arch/powerpc/cpu/mpc5xxx/serial.c 
b/arch/powerpc/cpu/mpc5xxx/serial.c
index eb14161..1ccb4e3 100644
--- a/arch/powerpc/cpu/mpc5xxx/serial.c
+++ b/arch/powerpc/cpu/mpc5xxx/serial.c
@@ -89,7 +89,7 @@ int serial_init_dev (unsigned long dev_base)
 
/* select clock sources */
psc->psc_clock_select = 0;
-   baseclk = (gd->ipb_clk + 16) / 32;
+   baseclk = (gd->arch.ipb_clk + 16) / 32;
 
/* switch to UART mode */
psc->sicr = 0;
@@ -169,7 +169,7 @@ void serial_setbrg_dev (unsigned long dev_base)
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
unsigned long baseclk, div;
 
-   baseclk = (gd->ipb_clk + 16) / 32;
+   baseclk = (gd->arch.ipb_clk + 16) / 32;
 
/* set up UART divisor */
div = (baseclk + (gd->baudrate/2)) / gd->baudrate;
diff --git a/arch/powerpc/cpu/mpc5xxx/speed.c b/arch/powerpc/cpu/mpc5xxx/speed.c
index 8027d3e..5353e3d 100644
--- a/arch/powerpc/cpu/mpc5xxx/speed.c
+++ b/arch/powerpc/cpu/mpc5xxx/speed.c
@@ -66,14 +66,20 @@ int get_clocks (void)
 
val = *(vu_long *)MPC5XXX_CDM_CFG;
if (val & (1 << 8)) {
-   gd->ipb_clk = gd->bus_clk / 2;
+   gd->arch.ipb_clk = gd->bus_clk / 2;
} else {
-   gd->ipb_clk = gd->bus_clk;
+   gd->arch.ipb_clk = gd->bus_clk;
}
switch (val & 3) {
-   case 0: gd->pci_clk = gd->ipb_clk; break;
-   case 1: gd->pci_clk = gd->ipb_clk / 2; break;
-   default: gd->pci_clk = gd->bus_clk / 4; break;
+   case 0:
+   gd->pci_clk = gd->arch.ipb_clk;
+   break;
+   case 1:
+   gd->pci_clk = gd->arch.ipb_clk / 2;
+   break;
+   default:
+   gd->pci_clk = gd->bus_clk / 4;
+   break;
}
 
return (0);
@@ -85,7 +91,7 @@ int prt_mpc5xxx_clks (void)
 
printf ("   Bus %s MHz, IPB %s MHz, PCI %s MHz\n",
strmhz(buf1, gd->bus_clk),
-   strmhz(buf2, gd->ipb_clk),
+   strmhz(buf2, gd->arch.ipb_clk),
strmhz(buf3, gd->pci_clk)
);
return (0);
diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c
index aaf9be1..43fa802 100644
--- a/arch/powerpc/cpu/mpc8220/fec.c
+++ b/arch/powerpc/cpu/mpc8220/fec.c
@@ -288,9 +288,11 @@ static int mpc8220_fec_init (struct eth_device *dev, bd_t 
* bis)
 * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
 * and do not drop the Preamble.
 */
-   /* tbd - rtm */
-   /*fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); */
-   /* No MII for 7-wire mode */
+   /*
+* tbd - rtm
+* fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
+* No MII for 7-wire mode
+*/
fec->eth->mii_speed = 0x0030;
}
 
diff --git a/arch/powerpc/include/asm/global_data.h 
b/arch/powerpc/include/asm/global_data.h
index ca36ca3..423e792 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -94,6 +94,9 @@ struct arch_globa

[U-Boot] [PATCH v2 17/58] ppc: Move clock fields to arch_global_data

[Simon Glass]

Move vco_out, cpm_clk, scc_clk, brg_clk into arch_global_data and tidy
up. Leave pci_clk on its own since this should really depend only on
CONFIG_PCI and not any particular chip type.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 arch/powerpc/cpu/mpc8260/speed.c   |   16 
 arch/powerpc/cpu/mpc85xx/speed.c   |8 
 arch/powerpc/include/asm/global_data.h |4 
 arch/powerpc/lib/board.c   |6 +++---
 4 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c
index 4ad1ec2..7841e8a 100644
--- a/arch/powerpc/cpu/mpc8260/speed.c
+++ b/arch/powerpc/cpu/mpc8260/speed.c
@@ -135,17 +135,17 @@ int get_clocks (void)
(get_pvr () == PVR_8260_HIP7R1) ||
(get_pvr () == PVR_8260_HIP7RA)) {
pllmf = (scmr & SCMR_PLLMF_MSKH7) >> SCMR_PLLMF_SHIFT;
-   gd->vco_out = clkin * (pllmf + 1);
+   gd->arch.vco_out = clkin * (pllmf + 1);
} else {/* HiP3, HiP4 */
pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
-   gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
+   gd->arch.vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
}
 
-   gd->cpm_clk = gd->vco_out / 2;
+   gd->arch.cpm_clk = gd->arch.vco_out / 2;
gd->bus_clk = clkin;
-   gd->scc_clk = gd->vco_out / 4;
-   gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+   gd->arch.scc_clk = gd->arch.vco_out / 4;
+   gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));
 
if (cp->b2c_mult > 0) {
gd->cpu_clk = (clkin * cp->b2c_mult) / 2;
@@ -173,7 +173,7 @@ int get_clocks (void)
pci_div = pcidf + 1;
}
 
-   gd->pci_clk = (gd->cpm_clk * 2) / pci_div;
+   gd->pci_clk = (gd->arch.cpm_clk * 2) / pci_div;
}
 #endif
 
@@ -231,10 +231,10 @@ int prt_8260_clks (void)
plldf, pllmf, pcidf);
 
printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
-   gd->vco_out, gd->scc_clk, gd->arch.brg_clk);
+   gd->arch.vco_out, gd->arch.scc_clk, gd->arch.brg_clk);
 
printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
-   gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
+   gd->cpu_clk, gd->arch.cpm_clk, gd->bus_clk);
 #ifdef CONFIG_PCI
printf (" - pci_clk %10ld\n", gd->pci_clk);
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 8a581ef..c4ca481 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -435,10 +435,10 @@ int get_clocks (void)
 #endif /* defined(CONFIG_FSL_ESDHC) */
 
 #if defined(CONFIG_CPM2)
-   gd->vco_out = 2*sys_info.freqSystemBus;
-   gd->cpm_clk = gd->vco_out / 2;
-   gd->scc_clk = gd->vco_out / 4;
-   gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+   gd->arch.vco_out = 2*sys_info.freqSystemBus;
+   gd->arch.cpm_clk = gd->arch.vco_out / 2;
+   gd->arch.scc_clk = gd->arch.vco_out / 4;
+   gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));
 #endif
 
if(gd->cpu_clk != 0) return (0);
diff --git a/arch/powerpc/include/asm/global_data.h 
b/arch/powerpc/include/asm/global_data.h
index 8e3a726..7d0115d 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -33,6 +33,10 @@ struct arch_global_data {
unsigned long brg_clk;
 #endif
 #if defined(CONFIG_CPM2)
+   /* There are many clocks on the MPC8260 - see page 9-5 */
+   unsigned long vco_out;
+   unsigned long cpm_clk;
+   unsigned long scc_clk;
unsigned long brg_clk;
 #endif
 #if defined(CONFIG_QE)
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 4174a73..517560a 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -580,10 +580,10 @@ void board_init_f(ulong bootflag)
bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,  in Hz */
 #if defined(CONFIG_CPM2)
-   bd->bi_cpmfreq = gd->cpm_clk;
+   bd->bi_cpmfreq = gd->arch.cpm_clk;
bd->bi_brgfreq = gd->arch.brg_clk;
-   bd->bi_sccfreq = gd->scc_clk;
-   bd->bi_vco = gd->vco_out;
+   bd->bi_sccfreq = gd->arch.scc_clk;
+   bd->bi_vco = gd->arch.vco_out;
 #endif /* CONFIG_CPM2 */
 #if defined(CONFIG_MPC512X)
bd->bi_ipsfreq = gd->ips_clk;
-- 
1.7.7.3

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[U-Boot] [PATCH v2 10/58] arm: Move tlb_addr to arch_global_data

[Simon Glass]

Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass 
---
Changes in v2: None

 arch/arm/include/asm/global_data.h |6 +++---
 arch/arm/lib/board.c   |2 +-
 arch/arm/lib/cache-cp15.c  |4 ++--
 common/cmd_bdinfo.c|2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/include/asm/global_data.h 
b/arch/arm/include/asm/global_data.h
index 35d07d0..0d1ebfd 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -44,6 +44,9 @@ struct arch_global_data {
 #ifdef CONFIG_IXP425
unsigned long timestamp;
 #endif
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+   unsigned long tlb_addr;
+#endif
 };
 
 /*
@@ -74,9 +77,6 @@ typedef   struct  global_data {
unsigned long   irq_sp; /* irq stack pointer */
unsigned long   start_addr_sp;  /* start_addr_stackpointer */
unsigned long   reloc_off;
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-   unsigned long   tlb_addr;
-#endif
const void  *fdt_blob;  /* Our device tree, NULL if none */
void**jt;   /* jump table */
charenv_buf[32];/* buffer for getenv() before reloc. */
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 22a4d9c..637fb01 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -358,7 +358,7 @@ void board_init_f(ulong bootflag)
/* round down to next 64 kB limit */
addr &= ~(0x1 - 1);
 
-   gd->tlb_addr = addr;
+   gd->arch.tlb_addr = addr;
debug("TLB table at: %08lx\n", addr);
 #endif
 
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 939de10..5df6735 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -52,7 +52,7 @@ static void cp_delay (void)
 
 static inline void dram_bank_mmu_setup(int bank)
 {
-   u32 *page_table = (u32 *)gd->tlb_addr;
+   u32 *page_table = (u32 *)gd->arch.tlb_addr;
bd_t *bd = gd->bd;
int i;
 
@@ -67,7 +67,7 @@ static inline void dram_bank_mmu_setup(int bank)
 /* to activate the MMU we need to set up virtual memory: use 1M areas */
 static inline void mmu_setup(void)
 {
-   u32 *page_table = (u32 *)gd->tlb_addr;
+   u32 *page_table = (u32 *)gd->arch.tlb_addr;
int i;
u32 reg;
 
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 48cdd16..82a3693 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -371,7 +371,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 #endif
printf("baudrate= %u bps\n", bd->bi_baudrate);
 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
-   print_num("TLB addr", gd->tlb_addr);
+   print_num("TLB addr", gd->arch.tlb_addr);
 #endif
print_num("relocaddr", gd->relocaddr);
print_num("reloc off", gd->reloc_off);
-- 
1.7.7.3

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