Re: [U-Boot] [UBoot] Hows to boot Linux Kernel from USB

2008-10-02 Thread thaoth 

Hi, 

I tried to boot with ext2 file system and get this result:
=> usb start
(Re)start USB...
USB:   scanning bus for devices... cannot reset port 1!?
2 USB Device(s) found
   scanning bus for storage devices... 1 Storage Device(s) found
=>ext2load usb 0:1 0x0020 uImage
…….
1045127 bytes read
=> bootm 0x8c20
*  kernel: cmdline image address = 0x8c20
## Booting kernel from Legacy Image at 8c20 ...
   Image Name:   Linux-2.6.22.11
   Image Type:   SuperH Linux Kernel Image (gzip compressed)
   Data Size:974852 Bytes = 952 kB
   Load Address: 8c002000
   Entry Point:  8c002000
   Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!

Could you tell me an advice?

NOTE: I think I can have a problem with “Load Address: 8c002000”  ?
 
Best regard.

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[U-Boot] [PATCH v2 0/4] SGMII support for MPC8378E-MDS boards

2008-10-02 Thread Anton Vorontsov 
Hi all,

Here are the updated patches.

v2:
- Addressed Andy Fleming's comments. Now we don't need the exported
  tsec_info struct.


Thanks,

-- 
Anton Vorontsov
email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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[U-Boot] [PATCH 1/4] mpc83xx: fix serdes setup for the MPC8378E boards

2008-10-02 Thread Anton Vorontsov 
MPC837xE specs says that SerDes1 has:

— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

And for SerDes2:

— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

The spec also explicitly states that PEX options are not valid for
the SD1.

Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.

Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
 board/freescale/mpc837xemds/mpc837xemds.c |2 +-
 board/freescale/mpc837xerdb/mpc837xerdb.c |2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c 
b/board/freescale/mpc837xemds/mpc837xemds.c
index 40f1e63..581397d 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -44,7 +44,7 @@ int board_early_init_f(void)
 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
case SPR_8378:
-   fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
+   fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
case SPR_8379:
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c 
b/board/freescale/mpc837xerdb/mpc837xerdb.c
index aaefc18..3eb53d8 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -148,7 +148,7 @@ int board_early_init_f(void)
 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
case SPR_8378:
-   fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
+   fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
case SPR_8379:
-- 
1.5.6.3

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[U-Boot] [PATCH 2/4] mpc83xx: serdes: add forgotten shifts for rfcks

2008-10-02 Thread Anton Vorontsov 
The rfcks should be shifted by 28 bits left. We didn't notice the bug
because we were using only 100MHz clocks (for which rfcks == 0).

Though, for SGMII we'll need 125MHz clocks.

Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
 cpu/mpc83xx/serdes.c |2 +-
 include/asm-ppc/fsl_serdes.h |   10 +-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/cpu/mpc83xx/serdes.c b/cpu/mpc83xx/serdes.c
index 020c4c8..d1e0c97 100644
--- a/cpu/mpc83xx/serdes.c
+++ b/cpu/mpc83xx/serdes.c
@@ -42,7 +42,7 @@
 #define FSL_SRDSRSTCTL_RST 0x8000
 #define FSL_SRDSRSTCTL_SATA_RESET  0xf
 
-void fsl_setup_serdes(u32 offset, char proto, char rfcks, char vdd)
+void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd)
 {
void *regs = (void *)CFG_IMMR + offset;
u32 tmp;
diff --git a/include/asm-ppc/fsl_serdes.h b/include/asm-ppc/fsl_serdes.h
index 733f919..6da4b6f 100644
--- a/include/asm-ppc/fsl_serdes.h
+++ b/include/asm-ppc/fsl_serdes.h
@@ -3,9 +3,9 @@
 
 #include 
 
-#define FSL_SERDES_CLK_100 0
-#define FSL_SERDES_CLK_125 1
-#define FSL_SERDES_CLK_150 3
+#define FSL_SERDES_CLK_100 (0 << 28)
+#define FSL_SERDES_CLK_125 (1 << 28)
+#define FSL_SERDES_CLK_150 (3 << 28)
 #define FSL_SERDES_PROTO_SATA  0
 #define FSL_SERDES_PROTO_PEX   1
 #define FSL_SERDES_PROTO_PEX_X22
@@ -13,9 +13,9 @@
 #define FSL_SERDES_VDD_1V  1
 
 #ifdef CONFIG_FSL_SERDES
-extern void fsl_setup_serdes(u32 offset, char proto, char rfcks, char vdd);
+extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
 #else
-static void fsl_setup_serdes(u32 offset, char proto, char rfcks, char vdd) {}
+static void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd) {}
 #endif /* CONFIG_FSL_SERDES */
 
 #endif /* __FSL_SERDES_H */
-- 
1.5.6.3

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[U-Boot] [PATCH 3/4] mpc83xx: add TSECs' HRCWH masks for MPC837x processors

2008-10-02 Thread Anton Vorontsov 
We'll use these masks to parse TSEC modes out of HRCWH.

Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
 include/mpc83xx.h |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 5d82bb4..ee38191 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -544,12 +544,14 @@
 #define HRCWH_RL_EXT_LEGACY0x
 #define HRCWH_RL_EXT_NAND  0x0004
 
+#define HRCWH_TSEC1M_MASK  0xE000
 #define HRCWH_TSEC1M_IN_MII0x
 #define HRCWH_TSEC1M_IN_RMII   0x2000
 #define HRCWH_TSEC1M_IN_RGMII  0x6000
 #define HRCWH_TSEC1M_IN_RTBI   0xA000
 #define HRCWH_TSEC1M_IN_SGMII  0xC000
 
+#define HRCWH_TSEC2M_MASK  0x1C00
 #define HRCWH_TSEC2M_IN_MII0x
 #define HRCWH_TSEC2M_IN_RMII   0x0400
 #define HRCWH_TSEC2M_IN_RGMII  0x0C00
-- 
1.5.6.3

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[U-Boot] [PATCH 4/4] mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards

2008-10-02 Thread Anton Vorontsov 
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.

For Linux we also fix up the device tree.

Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
 board/freescale/mpc837xemds/mpc837xemds.c |  123 +
 include/configs/MPC837XEMDS.h |2 +
 2 files changed, 125 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c 
b/board/freescale/mpc837xemds/mpc837xemds.c
index 581397d..b6b9678 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #if defined(CONFIG_OF_LIBFDT)
 #include 
 #endif
@@ -44,6 +45,8 @@ int board_early_init_f(void)
 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
case SPR_8378:
+   fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SGMII,
+FSL_SERDES_CLK_125, FSL_SERDES_VDD_1V);
fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break;
@@ -62,6 +65,125 @@ int board_early_init_f(void)
return 0;
 }
 
+#if defined(CONFIG_TSEC1) || defined(CONFIG_TSEC2)
+int board_eth_init(bd_t *bd)
+{
+   struct tsec_info_struct tsec_info[2];
+   struct immap __iomem *im = (struct immap __iomem *)CFG_IMMR;
+   u32 rcwh = in_be32(&im->reset.rcwh);
+   u32 tsec_mode;
+   int num = 0;
+
+   /* New line after Net: */
+   printf("\n");
+
+#ifdef CONFIG_TSEC1
+   SET_STD_TSEC_INFO(tsec_info[num], 1);
+
+   printf(CONFIG_TSEC1_NAME ": ");
+
+   tsec_mode = rcwh & HRCWH_TSEC1M_MASK;
+   if (tsec_mode == HRCWH_TSEC1M_IN_RGMII) {
+   printf("RGMII\n");
+   /* this is default, no need to fixup */
+   } else if (tsec_mode == HRCWH_TSEC1M_IN_SGMII) {
+   printf("SGMII\n");
+   tsec_info[num].phyaddr = TSEC1_PHY_ADDR_SGMII;
+   tsec_info[num].flags = TSEC_GIGABIT;
+   } else {
+   printf("unsupported PHY type\n");
+   }
+   num++;
+#endif
+#ifdef CONFIG_TSEC2
+   SET_STD_TSEC_INFO(tsec_info[num], 2);
+
+   printf(CONFIG_TSEC2_NAME ": ");
+
+   tsec_mode = rcwh & HRCWH_TSEC2M_MASK;
+   if (tsec_mode == HRCWH_TSEC2M_IN_RGMII) {
+   printf("RGMII\n");
+   /* this is default, no need to fixup */
+   } else if (tsec_mode == HRCWH_TSEC2M_IN_SGMII) {
+   printf("SGMII\n");
+   tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII;
+   tsec_info[num].flags = TSEC_GIGABIT;
+   } else {
+   printf("unsupported PHY type\n");
+   }
+   num++;
+#endif
+   return tsec_eth_init(bd, tsec_info, num);
+}
+
+static void __ft_tsec_fixup(void *blob, bd_t *bd, const char *alias,
+   int phy_addr)
+{
+   const char *phy_type = "sgmii";
+   const u32 *ph;
+   int off;
+   int err;
+
+   off = fdt_path_offset(blob, alias);
+   if (off < 0) {
+   printf("WARNING: could not find %s alias: %s.\n", alias,
+   fdt_strerror(off));
+   return;
+   }
+
+   err = fdt_setprop(blob, off, "phy-connection-type", phy_type,
+ strlen(phy_type) + 1);
+   if (err) {
+   printf("WARNING: could not set phy-connection-type for %s: "
+   "%s.\n", alias, fdt_strerror(err));
+   return;
+   }
+
+   ph = (u32 *)fdt_getprop(blob, off, "phy-handle", 0);
+   if (!ph) {
+   printf("WARNING: could not get phy-handle for %s.\n",
+   alias);
+   return;
+   }
+
+   off = fdt_node_offset_by_phandle(blob, *ph);
+   if (off < 0) {
+   printf("WARNING: could not get phy node for %s: %s\n", alias,
+   fdt_strerror(off));
+   return;
+   }
+
+   phy_addr = cpu_to_fdt32(phy_addr);
+   err = fdt_setprop(blob, off, "reg", &phy_addr, sizeof(phy_addr));
+   if (err < 0) {
+   printf("WARNING: could not set phy node's reg for %s: "
+   "%s.\n", alias, fdt_strerror(err));
+   return;
+   }
+}
+
+static void ft_tsec_fixup(void *blob, bd_t *bd)
+{
+   struct immap __iomem *im = (struct immap __iomem *)CFG_IMMR;
+   u32 rcwh = in_be32(&im->reset.rcwh);
+   u32 tsec_mode;
+
+#ifdef CONFIG_TSEC1
+   tsec_mode = rcwh & HRCWH_TSEC1M_MASK;
+   if (tsec_mode == HRCWH_TSEC1M_IN_SGMII)
+   __ft_tsec_fixup(blob, bd, "ethernet0", TSEC1_PHY_ADDR_SGMII);
+#endif
+
+#ifdef CONFIG_TSEC2
+   tsec_mode = rcwh & HRCWH_TSEC2M_MASK;
+   if (tsec_mode == HRCWH_TSEC2M_IN_SGMII)
+   __ft_tsec_fixup(blob, bd, "ethernet1", TSEC2_PHY_ADDR_SGMII);
+#endif
+}
+#

[U-Boot] [PATCH] i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions

2008-10-02 Thread Timur Tabi 
All implementations of the functions i2c_reg_read() and i2c_reg_write() are
identical.  We can save space and simplify the code by converting these
functions into inlines and putting them in i2c.h.

Signed-off-by: Timur Tabi <[EMAIL PROTECTED]>
---

I'm posting this patch because I'm enhancing the I2C routines to support
multiple I2C busses more easily, but I need to clean up the existing code
first.

 cpu/arm920t/at91rm9200/i2c.c  |   14 --
 cpu/arm926ejs/davinci/i2c.c   |   17 -
 cpu/blackfin/i2c.c|   16 
 cpu/mpc512x/i2c.c |   17 -
 cpu/mpc5xxx/i2c.c |   16 
 cpu/mpc8220/i2c.c |   16 
 cpu/mpc824x/drivers/i2c/i2c.c |   14 --
 cpu/mpc8260/i2c.c |   16 
 cpu/mpc8xx/i2c.c  |   20 
 cpu/ppc4xx/i2c.c  |   20 
 cpu/pxa/i2c.c |   15 ---
 drivers/i2c/fsl_i2c.c |   16 
 drivers/i2c/soft_i2c.c|   19 ---
 include/i2c.h |   15 +--
 14 files changed, 13 insertions(+), 218 deletions(-)

diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c
index 90f95df..fb4725d 100644
--- a/cpu/arm920t/at91rm9200/i2c.c
+++ b/cpu/arm920t/at91rm9200/i2c.c
@@ -189,20 +189,6 @@ i2c_init(int speed, int slaveaddr)
return;
 }
 
-uchar i2c_reg_read(uchar i2c_addr, uchar reg)
-{
-   unsigned char buf;
-
-   i2c_read(i2c_addr, reg, 1, &buf, 1);
-
-   return(buf);
-}
-
-void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
-{
-   i2c_write(i2c_addr, reg, 1, &val, 1);
-}
-
 int i2c_set_bus_speed(unsigned int speed)
 {
return -1;
diff --git a/cpu/arm926ejs/davinci/i2c.c b/cpu/arm926ejs/davinci/i2c.c
index af9dc03..1029b03 100644
--- a/cpu/arm926ejs/davinci/i2c.c
+++ b/cpu/arm926ejs/davinci/i2c.c
@@ -331,21 +331,4 @@ int i2c_write(u_int8_t chip, u_int32_t addr, int alen, 
u_int8_t *buf, int len)
return(0);
 }
 
-
-u_int8_t i2c_reg_read(u_int8_t chip, u_int8_t reg)
-{
-   u_int8_ttmp;
-
-   i2c_read(chip, reg, 1, &tmp, 1);
-   return(tmp);
-}
-
-
-void i2c_reg_write(u_int8_t chip, u_int8_t reg, u_int8_t val)
-{
-   u_int8_ttmp;
-
-   i2c_write(chip, reg, 1, &tmp, 1);
-}
-
 #endif /* CONFIG_DRIVER_DAVINCI_I2C */
diff --git a/cpu/blackfin/i2c.c b/cpu/blackfin/i2c.c
index 60f03d4..2a3e223 100644
--- a/cpu/blackfin/i2c.c
+++ b/cpu/blackfin/i2c.c
@@ -425,20 +425,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar * 
buffer, int len)
 
 }
 
-uchar i2c_reg_read(uchar chip, uchar reg)
-{
-   uchar buf;
-
-   PRINTD("i2c_reg_read: chip=0x%02x, reg=0x%02x\n", chip, reg);
-   i2c_read(chip, reg, 0, &buf, 1);
-   return (buf);
-}
-
-void i2c_reg_write(uchar chip, uchar reg, uchar val)
-{
-   PRINTD("i2c_reg_write: chip=0x%02x, reg=0x%02x, val=0x%02x\n", chip,
-   reg, val);
-   i2c_write(chip, reg, 0, &val, 1);
-}
-
 #endif /* CONFIG_HARD_I2C */
diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c
index 56ba443..95cc942 100644
--- a/cpu/mpc512x/i2c.c
+++ b/cpu/mpc512x/i2c.c
@@ -382,23 +382,6 @@ Done:
return ret;
 }
 
-uchar i2c_reg_read (uchar chip, uchar reg)
-{
-   uchar buf;
-
-   i2c_read (chip, reg, 1, &buf, 1);
-
-   return buf;
-}
-
-void i2c_reg_write (uchar chip, uchar reg, uchar val)
-{
-   i2c_write (chip, reg, 1, &val, 1);
-
-   return;
-}
-
-
 int i2c_set_bus_num (unsigned int bus)
 {
if (bus >= I2C_BUS_CNT) {
diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c
index 0f02e78..015256f 100644
--- a/cpu/mpc5xxx/i2c.c
+++ b/cpu/mpc5xxx/i2c.c
@@ -380,20 +380,4 @@ Done:
return ret;
 }
 
-uchar i2c_reg_read(uchar chip, uchar reg)
-{
-   uchar buf;
-
-   i2c_read(chip, reg, 1, &buf, 1);
-
-   return buf;
-}
-
-void i2c_reg_write(uchar chip, uchar reg, uchar val)
-{
-   i2c_write(chip, reg, 1, &val, 1);
-
-   return;
-}
-
 #endif /* CONFIG_HARD_I2C */
diff --git a/cpu/mpc8220/i2c.c b/cpu/mpc8220/i2c.c
index d67936d..76ecdf1 100644
--- a/cpu/mpc8220/i2c.c
+++ b/cpu/mpc8220/i2c.c
@@ -387,20 +387,4 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * 
buf, int len)
return ret;
 }
 
-uchar i2c_reg_read (uchar chip, uchar reg)
-{
-   uchar buf;
-
-   i2c_read (chip, reg, 1, &buf, 1);
-
-   return buf;
-}
-
-void i2c_reg_write (uchar chip, uchar reg, uchar val)
-{
-   i2c_write (chip, reg, 1, &val, 1);
-
-   return;
-}
-
 #endif /* CONFIG_HARD_I2C */
diff --git a/cpu/mpc824x/drivers/i2c/i2c.c b/cpu/mpc824x/drivers/i2c/i2c.c
index 3add687..48d754e 100644
--- a/cpu/mpc824x/drivers/i2c/i2c.c
+++ b/cpu/mpc824x/drivers/i2c/i2c.c
@@ -267,18 +267,4 @@ int i2c_probe (uchar chip)
return i2c_read (chip, 0, 1, (uchar *) &tmp, 1);
 }
 
-uchar i2c_reg_read (uchar i2c_addr, uchar reg)
-{

[U-Boot] [PATCH] mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards

2008-10-02 Thread Anton Vorontsov 
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:

- When the CPLD recognizes its location on the PIB it automatically
  configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatically
  configured as an Agent and the PCI is configured to an external arbiter.

This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
any arbiter bad things will happen (here the board hangs during any config
space reads).

In this situation we must disable the PCI. And in case of anybody really
want to use an external arbiter, we provide "pci_external_aribter"
environment variable.

Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
 board/freescale/mpc837xemds/mpc837xemds.c |   41 +
 board/freescale/mpc837xemds/pci.c |3 ++
 include/configs/MPC837XEMDS.h |3 ++
 3 files changed, 47 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c 
b/board/freescale/mpc837xemds/mpc837xemds.c
index b6b9678..8bc54d1 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -270,6 +270,45 @@ int checkboard(void)
return 0;
 }
 
+#ifdef CONFIG_PCI
+int board_pci_host_broken(void)
+{
+   struct immap __iomem *im = (struct immap __iomem *)CFG_IMMR;
+   const u32 rcw_mask = HRCWH_PCI1_ARBITER_ENABLE | HRCWH_PCI_HOST;
+   const char *pci_ea = getenv("pci_external_arbiter");
+
+   /* It's always OK in case of external arbiter. */
+   if (pci_ea && !strcmp(pci_ea, "yes"))
+   return 0;
+
+   if ((in_be32(&im->reset.rcwh) & rcw_mask) != rcw_mask)
+   return 1;
+
+   return 0;
+}
+
+static void ft_pci_fixup(void *blob, bd_t *bd)
+{
+   const char *status = "broken (no arbiter)";
+   int off;
+   int err;
+
+   off = fdt_path_offset(blob, "pci0");
+   if (off < 0) {
+   printf("WARNING: could not find pci0 alias: %s.\n",
+   fdt_strerror(off));
+   return;
+   }
+
+   err = fdt_setprop(blob, off, "status", status, strlen(status) + 1);
+   if (err) {
+   printf("WARNING: could not set status for pci0: %s.\n",
+   fdt_strerror(err));
+   return;
+   }
+}
+#endif
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 void ft_board_setup(void *blob, bd_t *bd)
 {
@@ -277,6 +316,8 @@ void ft_board_setup(void *blob, bd_t *bd)
ft_tsec_fixup(blob, bd);
 #ifdef CONFIG_PCI
ft_pci_setup(blob, bd);
+   if (board_pci_host_broken())
+   ft_pci_fixup(blob, bd);
 #endif
 }
 #endif /* CONFIG_OF_BOARD_SETUP */
diff --git a/board/freescale/mpc837xemds/pci.c 
b/board/freescale/mpc837xemds/pci.c
index ab90979..0eba7df 100644
--- a/board/freescale/mpc837xemds/pci.c
+++ b/board/freescale/mpc837xemds/pci.c
@@ -47,6 +47,9 @@ void pci_init_board(void)
volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
struct pci_region *reg[] = { pci_regions };
 
+   if (board_pci_host_broken())
+   return;
+
/* Enable all 5 PCI_CLK_OUTPUTS */
clk->occr |= 0xf800;
udelay(2000);
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index ed70b9e..adf7c8c 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -347,6 +347,9 @@
 #define CFG_PCI_SLV_MEM_SIZE   0x8000
 
 #ifdef CONFIG_PCI
+#ifndef __ASSEMBLY__
+extern int board_pci_host_broken(void);
+#endif
 #define CONFIG_83XX_GENERIC_PCI1 /* Use generic PCI setup */
 #define CONFIG_PQ_MDS_PIB  1 /* PQ MDS Platform IO Board */
 
-- 
1.5.6.3
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Re: [U-Boot] [patch 0/3] Improve stability USB memory sticks for the common OHCI USB layer.

2008-10-02 Thread Stelian Pop 
Hi Remy,

Sorry it took so long but here are the results of the tests on my
AT91SAM9261-EK.

Le samedi 20 septembre 2008 à 22:14 +0200, Stelian Pop a écrit :

> > Also, it would be very helpful if you would test your sticks on a
> > SAM9261, because that SoC _must_ work. (I tested on AT91SAM9261-EK,
> > and custom board)
> > Then we can relate the problem to a specific USB stick, or to a
> certain SoC.
> 
> Hmm, I can do that, but not before September 29.

The stick is fine, it does work ok on the 9261:

usb reset
(Re)start USB...
USB:   scanning bus for devices... New Device 0
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x40
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x40
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x40
set address 1
usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 0x0
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x12
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 
0x8
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 
0x19
get_conf_no 0 Result 25, wLength 25
if 0, ep 0
##EP epmaxpacketin[1] = 2
set configuration 1
usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0
new device strings: Mfr=0, Product=1, SerialNumber=0
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 
0xFF
USB device number 1 default language ID 0x409
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 
length 0xFF
Manufacturer 
Product  OHCI Root Hub
SerialNumber 
usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 
0x4
usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 length 
0x9
usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 0x4
usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 0x0
usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x2 length 0x0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 
0x0
usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 
0x0
New Device 1
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x40
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x40
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x40
usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 0x0
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 0x4
usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 
0x0
set address 2
usb_control_msg: request: 0x5, requesttype: 0x0, value 0x2 index 0x0 length 0x0
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 length 
0x12
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 
0x8
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 length 
0x27
get_conf_no 0 Result 39, wLength 39
if 0, ep 0
if 0, ep 1
if 0, ep 2
##EP epmaxpacketout[1] = 64
##EP epmaxpacketin[2] = 64
##EP epmaxpacketin[3] = 64
set configuration 1
usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0
new device strings: Mfr=1, Product=2, SerialNumber=3
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 length 
0xFF
USB device number 2 default language ID 0x409
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 
length 0xFF
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 
length 0xFF
usb_control_msg: request: 0x6, requesttype: 0x80, value 0x303 index 0x409 
length 0xFF
Manufacturer P Technology
Product  USB Mass Storage Device
SerialNumber 000722
usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 0x4
2 USB Device(s) found
   scanning bus for storage devices... usb_control_msg: request: 0xFF, 
requesttype: 0x21, value 0x0 index 0x0 length 0x0
usb_control_msg: request: 0x1, requesttype: 0x2, value 0x0 index 0x82 length 0x0
usb_control_msg: request: 0x1, requesttype: 0x2, value 0x0 index 0x1 length 0x0
1 Storage Device(s) found
U-Boot> usb storage
  Device 0: Vendor: UT163Rev: 0.00 Prod: USB Flash Disk  
Type: Removable Hard Disk
Capacity: 963.9 MB = 0.9 GB (1974271 x 512)
U-Boot> 
U-Boot> fatls usb 0 1
.
 51878326   download.tgz 
20351   tp.tgz 

2 file(s), 0 dir(s)

U-Boot> 

-- 
Stelian Pop <[EMAIL PROTECTED]>

_

Re: [U-Boot] NAND flash driver for Samsung K9F1G08

2008-10-02 Thread Scott Wood 
On Wed, Oct 01, 2008 at 06:04:02PM -0700, Roman Mashak wrote:
> As far as I understand not all manufacturers adhere to CFI standards,
> so this is flash chip's problem rather then board itself.
> CFI is for both NAND and NOR flash devices (even though CFI stands for
> Common _Flash memory_ Interface)?

No, CFI is just for NOR.

-Scott
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Re: [U-Boot] [PATCH v2] net: ne2000: Divided a function of NE2000 driver

2008-10-02 Thread Ben Warren 
Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 23:07 Wed 01 Oct , Ben Warren wrote:
>   
>> Hi Nobuhiro-san,
>>
>> Nobuhiro Iwamatsu wrote:
>> 
>>> get_prom function was used __attriute__ , but it is not enable.
>>> ax88796.o does not do link besides ne2000.o. When ld is carried
>>> out, get_prom function of ax88796.c is ignored.
>>> This problem is a thing by specifications of ld.
>>> I checked and test this patch on SuperH and MIPS.
>>>   
>>>   
>> You're seeing a common problem with weak functions - namely that they
>> don't always get overridden. If there was a single function in ax88796.c
>> that had strong static linkage there wouldn't be a problem. Using the
>> weak attribute for get_prom() is an elegant solution that improves code
>> re-use, so I'm wondering if there's a way it can be made to work.
>>
>> If nobody has any suggestions over the next couple of days, I'll pull in
>> this patch.
>>
>> This get_prom() function was set as weak in commit
>> 2ef7503a593c77a80c2a054011970227c4b62774, labeled " NE2000: Fix
>> regresssion introduced by e710185aae90 on non AX88796" by
>> Jean-Christophe PLAGNIOL-VILLARD. It's a shame that this was done
>> without testing...
>> 
> The NE2000 is tested every modification and Release on qemu_mips by myself
>
> And I've no problem on this board.
>   
Sorry, I have a hard time believing that this works if you enable 
CONFIG_DRIVER_AX88796L.  Are you sure that the weak get_prom() is 
overridden?

regards,
Ben
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Re: [U-Boot] [PATCH v2] net: ne2000: Divided a function of NE2000 driver

2008-10-02 Thread Jean-Christophe PLAGNIOL-VILLARD 
On 23:07 Wed 01 Oct , Ben Warren wrote:
> Hi Nobuhiro-san,
> 
> Nobuhiro Iwamatsu wrote:
> > get_prom function was used __attriute__ , but it is not enable.
> > ax88796.o does not do link besides ne2000.o. When ld is carried
> > out, get_prom function of ax88796.c is ignored.
> > This problem is a thing by specifications of ld.
> > I checked and test this patch on SuperH and MIPS.
> >   
> You're seeing a common problem with weak functions - namely that they
> don't always get overridden. If there was a single function in ax88796.c
> that had strong static linkage there wouldn't be a problem. Using the
> weak attribute for get_prom() is an elegant solution that improves code
> re-use, so I'm wondering if there's a way it can be made to work.
> 
> If nobody has any suggestions over the next couple of days, I'll pull in
> this patch.
> 
> This get_prom() function was set as weak in commit
> 2ef7503a593c77a80c2a054011970227c4b62774, labeled " NE2000: Fix
> regresssion introduced by e710185aae90 on non AX88796" by
> Jean-Christophe PLAGNIOL-VILLARD. It's a shame that this was done
> without testing...
The NE2000 is tested every modification and Release on qemu_mips by myself

And I've no problem on this board.

Best Regards,
J.
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Re: [U-Boot] [patch 0/3] Improve stability USB memory sticks for the common OHCI USB layer.

2008-10-02 Thread Remy Bohmer 
Hello Stelian,

>> Hmm, I can do that, but not before September 29.
> The stick is fine, it does work ok on the 9261:

Thanks for testing it, it sounds good... But that does mean that there
is a SoC dependant issue here...
I looked at the code again, and found an oddity that I overlooked
before and that I need to investigate some more when I have our USB
analyser back. It could explain different behaviour across different
OHCI controllers.

I will keep you informed when I have more news. (maybe tomorrow, or
else beginning next week)


Kind Regards,

Remy


> usb reset
> (Re)start USB...
> USB:   scanning bus for devices... New Device 0
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x40
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x40
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x40
> set address 1
> usb_control_msg: request: 0x5, requesttype: 0x0, value 0x1 index 0x0 length 
> 0x0
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x12
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 
> length 0x8
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 
> length 0x19
> get_conf_no 0 Result 25, wLength 25
> if 0, ep 0
> ##EP epmaxpacketin[1] = 2
> set configuration 1
> usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 
> 0x0
> new device strings: Mfr=0, Product=1, SerialNumber=0
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 
> length 0xFF
> USB device number 1 default language ID 0x409
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 
> length 0xFF
> Manufacturer
> Product  OHCI Root Hub
> SerialNumber
> usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 
> length 0x4
> usb_control_msg: request: 0x6, requesttype: 0xA0, value 0x2900 index 0x0 
> length 0x9
> usb_control_msg: request: 0x0, requesttype: 0xA0, value 0x0 index 0x0 length 
> 0x4
> usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x1 length 
> 0x0
> usb_control_msg: request: 0x3, requesttype: 0x23, value 0x8 index 0x2 length 
> 0x0
> usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 
> 0x4
> usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 
> 0x4
> usb_control_msg: request: 0x1, requesttype: 0x23, value 0x10 index 0x1 length 
> 0x0
> usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 
> 0x0
> usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 
> 0x4
> usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 
> 0x0
> New Device 1
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x40
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x40
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x40
> usb_control_msg: request: 0x3, requesttype: 0x23, value 0x4 index 0x1 length 
> 0x0
> usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x1 length 
> 0x4
> usb_control_msg: request: 0x1, requesttype: 0x23, value 0x14 index 0x1 length 
> 0x0
> set address 2
> usb_control_msg: request: 0x5, requesttype: 0x0, value 0x2 index 0x0 length 
> 0x0
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x100 index 0x0 
> length 0x12
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 
> length 0x8
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x200 index 0x0 
> length 0x27
> get_conf_no 0 Result 39, wLength 39
> if 0, ep 0
> if 0, ep 1
> if 0, ep 2
> ##EP epmaxpacketout[1] = 64
> ##EP epmaxpacketin[2] = 64
> ##EP epmaxpacketin[3] = 64
> set configuration 1
> usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 
> 0x0
> new device strings: Mfr=1, Product=2, SerialNumber=3
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x300 index 0x0 
> length 0xFF
> USB device number 2 default language ID 0x409
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x301 index 0x409 
> length 0xFF
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x302 index 0x409 
> length 0xFF
> usb_control_msg: request: 0x6, requesttype: 0x80, value 0x303 index 0x409 
> length 0xFF
> Manufacturer P Technology
> Product  USB Mass Storage Device
> SerialNumber 000722
> usb_control_msg: request: 0x0, requesttype: 0xA3, value 0x0 index 0x2 length 
> 0x4
> 2 USB Device(s) found
>   scanning bus for storage devices... usb_control_msg: request: 0xFF, 
> requesttype: 0x21, value 0x0 index 0x0 length 0x0
> usb_control_msg: request: 0x1, requesttype: 0x2, value 0x0 index 0x82 length 
> 0x0
> usb_control_msg: request: 0x1, requesttype: 0x2, value 0x0 index 0x1 length 
> 0x0
> 1 Storage Device(s) found
> U-Boot> usb storage
>  Device 0: Vendor: UT163Rev: 0.

[U-Boot] [PATCH] ads5121: support for running from memory

2008-10-02 Thread Nikita V. Youshchenko 
commit 599e6d1ff1fbab0abda4ef685f6078c4d2f1d2eb
Author: Nikita V. Youshchenko <[EMAIL PROTECTED]>
Date:   Tue Sep 2 07:51:05 2008 +0400

ads5121: support for running from memory

This patch makes it possible to start u-boot from memory on ads5121 
board.

It does two simple things:
- skips initialization of memory controller if already running from 
memory,
- helps u-boot to find it's environment in flash when CFG_MONITOR_BASE 
does
  not point to u-boot flash address.

Signed-off-by: Nikita V. Youshchenko <[EMAIL PROTECTED]>

diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c
index deaa292..644d85e 100644
--- a/board/ads5121/ads5121.c
+++ b/board/ads5121/ads5121.c
@@ -120,8 +120,9 @@ phys_size_t initdram (int board_type)
  */
 long int fixed_sdram (void)
 {
-   volatile immap_t *im = (immap_t *) CFG_IMMR;
u32 msize = CFG_DDR_SIZE * 1024 * 1024;
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+   volatile immap_t *im = (immap_t *) CFG_IMMR;
u32 msize_log2 = __ilog2 (msize);
u32 i;
 
@@ -203,7 +204,7 @@ long int fixed_sdram (void)
/* Start MDDRC */
im->mddrc.ddr_time_config0 = CFG_MDDRC_TIME_CFG0_RUN;
im->mddrc.ddr_sys_config = CFG_MDDRC_SYS_CFG_RUN;
-
+#endif
return msize;
 }
 
diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h
index d6f7e02..6ff7762 100644
--- a/include/configs/ads5121.h
+++ b/include/configs/ads5121.h
@@ -322,7 +322,12 @@
  */
 #define CONFIG_ENV_IS_IN_FLASH 1
 /* This has to be a multiple of the Flash sector size */
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
 #define CONFIG_ENV_ADDR(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+#else
+#define CFG_MONITOR_FLASH_BASE 0xfff0
+#define CONFIG_ENV_ADDR(CFG_MONITOR_FLASH_BASE + 
CFG_MONITOR_LEN)
+#endif
 #define CONFIG_ENV_SIZE0x2000
 #ifdef CONFIG_BKUP_FLASH
 #define CONFIG_ENV_SECT_SIZE   0x2 /* one sector (256K) for env */


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[U-Boot] [PATCH] fsl_diu: fix alignment error that caused malloc corruption

2008-10-02 Thread Nikita V. Youshchenko 
commit 81489a85c4c3536ec54290ac9216b746ec346663
Author: Nikita V. Youshchenko <[EMAIL PROTECTED]>
Date:   Thu Sep 25 00:44:00 2008 +0400

fsl_diu: fix alignment error that caused malloc corruption

When aligning malloc()ed screen_base, invalid offset was added.
This not only caused misaligned result (which did not cause hardware
misbehaviour), but - worse - caused screen_base + smem_len to
be out of malloc()ed space, which in turn caused breakage of
futher malloc()/free() operation.

This patch fixes screen_base alignment.

Also this patch makes memset() that cleans framebuffer to be executed
on first initialization of diu, not only on re-initialization. It looks
correct to clean the framebuffer instead of displaying random garbage;
I believe that was disabled only because that memset caused breakage
of malloc/free described above - which no longer happens with the fix
described above.

Signed-off-by: Nikita V. Youshchenko <[EMAIL PROTECTED]>

diff --git a/board/freescale/common/fsl_diu_fb.c 
b/board/freescale/common/fsl_diu_fb.c
index 75f782e..4d4b0a1 100644
--- a/board/freescale/common/fsl_diu_fb.c
+++ b/board/freescale/common/fsl_diu_fb.c
@@ -242,10 +242,10 @@ int fsl_diu_init(int xres,
printf("Unable to allocate fb memory 1\n");
return -1;
}
-   } else {
-   memset(info->screen_base, 0, info->smem_len);
}
 
+   memset(info->screen_base, 0, info->smem_len);
+
dr.diu_reg->desc[0] = (unsigned int) &dummy_ad;
dr.diu_reg->desc[1] = (unsigned int) &dummy_ad;
dr.diu_reg->desc[2] = (unsigned int) &dummy_ad;
@@ -403,7 +403,7 @@ static int map_video_memory(struct fb_info *info, 
unsigned long bytes_align)
mask = bytes_align - 1;
offset = (unsigned long)info->screen_base & mask;
if (offset) {
-   info->screen_base += offset;
+   info->screen_base += (bytes_align - offset);
info->smem_len = info->smem_len - (bytes_align - offset);
} else
info->smem_len = info->smem_len - bytes_align;


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Re: [U-Boot] Unable to run Standalone applications on NGW100

2008-10-02 Thread Jerry Van Baren 
Martin Mroz wrote:
> Hello,
> I wanted to write in to ask if there was something I was doing wrong, with
> respect to running standalone applications on U-Boot on an ATNGW100 (AVR32).
> I uploaded one of the test programs (hello_world) to the SDRAM (0x1000)
> and verified the contents of memory, as compared to the source file and it
> matched up perfectly. However when I attempt to "go 0x1000" it just
   ^
   One of these things is not like the other
> crashes and burns:
> 
> U-Boot> go 0x1040
  ^ One of these things doesn't belong
> ## Starting application at 0x1040 ...
  ^
>  *** Unhandled exception 3 at PC=0xea00
  
If you guessed this thing is not like the others...
> Bus error at address 0x902901ff
>pc: ea00lr: 10400012sp: 11f6cb2c   r12: 00ea
>   r11: 11f6ce90   r10: 11f6ce90r9: 1040r8: 00c3
>r7: 0002r6: 11fc97ecr5: 11f6cfa0r4: 895c
>r3: 11f6ce90r2: 11f6ce90r1: r0: 
> Flags: qvnZc
> Mode bits: hrjeg
> CPU Mode: Supervisor
> 
> Stack pointer seems bogus, won't do stack dump
> Unhandled exception
> ?
> 
> LR=0x10400012 means that the error occured at:
> 
> /* Print the ABI version */
> app_startup(argv);
>4: 16 9c   mov r12,r11
>6: 16 93   mov r3,r11
>8: e0 6e 00 00 mov lr,0

This looks like an unlinked disassembly of the .o which means that the 
00 00 argument is not real.  You cannot tell much from this.

Check the FAQ, it probably applies:


Good luck,
gvb
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[U-Boot] [PATCH 1/3 v3] ppc4xx: Add AMCC Arches board support (dual 460GT)

2008-10-02 Thread Adam Graham 
The Arches Evaluation board is based on the AMCC 460GT SoC chip.  This board is 
a dual processor board with each processor providing independent resources for 
Rapid IO, Gigabit Ethernet, and serial communications.  Each 460GT has it's own 
512MB DDR2 memory, 32MB NOR FLASH, UART, EEPROM and temperature sensor, along 
with a shared debug port.  The two 460GT's will communicate with each other via 
shared memory, Gigabit Ethernet and x1 PCI-Express.

Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
---
  v2:
  - Added Arches (460GT) support to the existing Canyonlands (460) board
files since the Canyonlands board files support all current AMCC
PPC460EX/GT boards.
  v3:
  - Correct tab/spaces in canyonlands.h file.

 MAKEALL  |1 +
 Makefile |3 +-
 board/amcc/canyonlands/canyonlands.c |  143 
 board/amcc/canyonlands/init.S|   17 +++
 include/configs/amcc-common.h|   19 +++-
 include/configs/canyonlands.h|  240 +++--
 include/ppc440.h |3 +
 7 files changed, 409 insertions(+), 17 deletions(-)

diff --git a/MAKEALL b/MAKEALL
index 9ccb9ac..847c1fa 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -161,6 +161,7 @@ LIST_4xx="  \
alpr\
AP1000  \
AR405   \
+   arches  \
ASH405  \
bamboo  \
bamboo_nand \
diff --git a/Makefile b/Makefile
index 7c13ce8..2af11c4 100644
--- a/Makefile
+++ b/Makefile
@@ -1206,7 +1206,8 @@ bubinga_config:   unconfig
 CANBT_config:  unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx canbt esd
 
-# Canyonlands & Glacier use different U-Boot images
+# Arches, Canyonlands & Glacier use different U-Boot images
+arches_config \
 canyonlands_config \
 glacier_config:unconfig
@mkdir -p $(obj)include
diff --git a/board/amcc/canyonlands/canyonlands.c 
b/board/amcc/canyonlands/canyonlands.c
index e9eba49..3d39cbc 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -38,11 +38,52 @@ DECLARE_GLOBAL_DATA_PTR;
 #define BOARD_CANYONLANDS_PCIE 1
 #define BOARD_CANYONLANDS_SATA 2
 #define BOARD_GLACIER  3
+#define BOARD_ARCHES   4
+
+#if defined(CONFIG_ARCHES)
+/*
+ * FPGA read/write helper macros
+ */
+static inline int board_fpga_read(int offset)
+{
+   int data;
+
+   data = in_8((void *)(CFG_FPGA_BASE + offset));
+
+   return data;
+}
+
+static inline void board_fpga_write(int offset, int data)
+{
+   out_8((void *)(CFG_FPGA_BASE + offset), data);
+}
+
+/*
+ * CPLD read/write helper macros
+ */
+static inline int board_cpld_read(int offset)
+{
+   int data;
+
+   out_8((void *)(CFG_CPLD_ADDR), offset);
+   data = in_8((void *)(CFG_CPLD_DATA));
+
+   return data;
+}
+
+static inline void board_cpld_write(int offset, int data)
+{
+   out_8((void *)(CFG_CPLD_ADDR), offset);
+   out_8((void *)(CFG_CPLD_DATA), data);
+}
+#endif /* defined(CONFIG_ARCHES) */
 
 int board_early_init_f(void)
 {
+#if !defined(CONFIG_ARCHES)
u32 sdr0_cust0;
u32 pvr = get_pvr();
+#endif
 
/*
 * Setup the interrupt controller polarities, triggers, etc.
@@ -79,6 +120,7 @@ int board_early_init_f(void)
mtdcr(uic3vr, 0x);  /* int31 highest, base=0x000 */
mtdcr(uic3sr, 0x);  /* clear all */
 
+#if !defined(CONFIG_ARCHES)
/* SDR Setting - enable NDFC */
mfsdr(SDR0_CUST0, sdr0_cust0);
sdr0_cust0 = SDR0_CUST0_MUX_NDFC_SEL|
@@ -88,6 +130,7 @@ int board_early_init_f(void)
SDR0_CUST0_NDFC_BAC_ENCODE(3)   |
(0x8000 >> (28 + CFG_NAND_CS));
mtsdr(SDR0_CUST0, sdr0_cust0);
+#endif
 
/*
 * Configure PFC (Pin Function Control) registers
@@ -98,6 +141,7 @@ int board_early_init_f(void)
/* Enable PCI host functionality in SDR0_PCI0 */
mtsdr(SDR0_PCI0, 0xe000);
 
+#if !defined(CONFIG_ARCHES)
/* Enable ethernet and take out of reset */
out_8((void *)CFG_BCSR_BASE + 6, 0);
 
@@ -123,10 +167,12 @@ int board_early_init_f(void)
gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
}
+#endif
 
return 0;
 }
 
+#if !defined(CONFIG_ARCHES)
 static void canyonlands_sata_init(int board_type)
 {
u32 reg;
@@ -147,7 +193,26 @@ static void canyonlands_sata_init(int board_type)
SDR_WRITE(SDR0_SRST1, 0x);
}
 }
+#endif /* !defined(CONFIG_ARCHES) */
+
+int get_cpu_num(void)
+{
+   int cpu = __NA_OR_UNKNOWN_CPU;
+
+#if defined(CONFIG_ARCHES)
+   int cpu_num;
+
+   cpu_num = board_fpga_read(0x3);
+
+   /* sanity check; assume cpu numbering starts and increments from 0 */
+   if ((cpu_num >= 0) && (c

[U-Boot] [PATCH 2/3 v3] ppc4xx: Add static support for 44x IBM SDRAM Controller

2008-10-02 Thread Adam Graham 
This patch add the capability to configure a PPC440 based IBM SDRAM Controller 
with static, compiled-in, values.  PPC440 memory subsystem includes a Memory 
Queue core.

Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
---
  v2:
  - No changes.
  v3:
  - No changes.

 cpu/ppc4xx/44x_spd_ddr2.c |   71 +---
 1 files changed, 53 insertions(+), 18 deletions(-)

diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index f1d7684..735d476 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -60,6 +60,26 @@
   "SDRAM_" #mnemonic, SDRAM_##mnemonic, data); \
} while (0)
 
+#if defined(CONFIG_440)
+/*
+ * This DDR2 setup code can dynamically setup the TLB entries for the DDR2
+ * memory region. Right now the cache should still be disabled in U-Boot
+ * because of the EMAC driver, that need it's buffer descriptor to be located
+ * in non cached memory.
+ *
+ * If at some time this restriction doesn't apply anymore, just define
+ * CONFIG_4xx_DCACHE in the board config file and this code should setup
+ * everything correctly.
+ */
+#ifdef CONFIG_4xx_DCACHE
+/* enable caching on SDRAM */
+#define MY_TLB_WORD2_I_ENABLE  0
+#else
+/* disable caching on SDRAM */
+#define MY_TLB_WORD2_I_ENABLE  TLB_WORD2_I_ENABLE
+#endif /* CONFIG_4xx_DCACHE */
+#endif /* CONFIG_440 */
+
 #if defined(CONFIG_SPD_EEPROM)
 
 
/*-+
@@ -131,22 +151,6 @@
 #define NUMLOOPS   64  /* memory test loops */
 
 /*
- * This DDR2 setup code can dynamically setup the TLB entries for the DDR2 
memory
- * region. Right now the cache should still be disabled in U-Boot because of 
the
- * EMAC driver, that need it's buffer descriptor to be located in non cached
- * memory.
- *
- * If at some time this restriction doesn't apply anymore, just define
- * CONFIG_4xx_DCACHE in the board config file and this code should setup
- * everything correctly.
- */
-#ifdef CONFIG_4xx_DCACHE
-#define MY_TLB_WORD2_I_ENABLE  0   /* enable caching on 
SDRAM */
-#else
-#define MY_TLB_WORD2_I_ENABLE  TLB_WORD2_I_ENABLE  /* disable caching on 
SDRAM */
-#endif
-
-/*
  * Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of 
SDRAM.
  * To support such configurations, we "only" map the first 2GB via the TLB's. 
We
  * need some free virtual address space for the remaining peripherals like, SoC
@@ -2956,9 +2960,10 @@ static void test(void)
 
 /*-
  * Function:   initdram
- * Description: Configures the PPC405EX(r) DDR1/DDR2 SDRAM memory
- * banks. The configuration is performed using static, compile-
+ * Description: Configures the PPC4xx IBM DDR1/DDR2 SDRAM memory controller.
+ * The configuration is performed using static, compile-
  * time parameters.
+ * Configures the PPC405EX(r) and PPC460EX/GT
  *---*/
 phys_size_t initdram(int board_type)
 {
@@ -2974,6 +2979,18 @@ phys_size_t initdram(int board_type)
 #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
unsigned long val;
 
+#if defined(CONFIG_440)
+   mtdcr(SDRAM_R0BAS,  CFG_SDRAM_R0BAS);
+   mtdcr(SDRAM_R1BAS,  CFG_SDRAM_R1BAS);
+   mtdcr(SDRAM_R2BAS,  CFG_SDRAM_R2BAS);
+   mtdcr(SDRAM_R3BAS,  CFG_SDRAM_R3BAS);
+   mtdcr(SDRAM_PLBADDULL,  CFG_SDRAM_PLBADDULL);   /* MQ0_BAUL */
+   mtdcr(SDRAM_PLBADDUHB,  CFG_SDRAM_PLBADDUHB);   /* MQ0_BAUH */
+   mtdcr(SDRAM_CONF1LL,CFG_SDRAM_CONF1LL);
+   mtdcr(SDRAM_CONF1HB,CFG_SDRAM_CONF1HB);
+   mtdcr(SDRAM_CONFPATHB,  CFG_SDRAM_CONFPATHB);
+#endif
+
/* Set Memory Bank Configuration Registers */
 
mtsdram(SDRAM_MB0CF, CFG_SDRAM0_MB0CF);
@@ -3067,6 +3084,14 @@ phys_size_t initdram(int board_type)
mfsdram(SDRAM_MCOPT2, val);
mtsdram(SDRAM_MCOPT2, val | SDRAM_MCOPT2_DCEN_ENABLE);
 
+#if defined(CONFIG_440)
+   /*
+* Program TLB entries with caches enabled, for best performace
+* while auto-calibrating and ECC generation
+*/
+   program_tlb(0, 0, (CFG_MBYTES_SDRAM << 20), 0);
+#endif
+
 #if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION)
 #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
/*--
@@ -3080,6 +3105,16 @@ phys_size_t initdram(int board_type)
ecc_init(CFG_SDRAM_BASE, CFG_MBYTES_SDRAM << 20);
 #endif /* defined(CONFIG_DDR_ECC) */
 
+#if defined(CONFIG_440)
+   /*
+* Now after initialization (auto-calibration and ECC generation)
+* remove the TLB entries with caches enabled and program again with
+* desired cache functionality
+*/
+

[U-Boot] [PATCH 3/3 v3] ppc4xx: Add routine to retrieve CPU number

2008-10-02 Thread Adam Graham 
Provide a weak defined routine to retrieve the CPU number for reference boards 
that have multiple CPU's.  Default behavior is the existing single CPU print 
output.  Reference boards with multiple CPU's need to provide a board specific 
routine.  See board/amcc/arches/arches.c for an example.

Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
---
  v2:
  - Correct return code of the generic get_cpu_num routine and make the
return code a defined value.
  v3:
  - Correct tab/spaces in ppc4xx.h

 cpu/ppc4xx/cpu.c |   19 ++-
 include/ppc4xx.h |3 +++
 2 files changed, 21 insertions(+), 1 deletions(-)

diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index bc9335a..67f88f8 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -41,6 +41,18 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void board_reset(void);
 
+/*
+ * To provide an interface to detect CPU number for boards that support
+ * more then one CPU, we implement the "weak" default functions here.
+ *
+ * Returns CPU number
+ */
+int __get_cpu_num(void)
+{
+   return __NA_OR_UNKNOWN_CPU;
+}
+int get_cpu_num(void) __attribute__((weak, alias("__get_cpu_num")));
+
 #if defined(CONFIG_405GP) || \
 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
@@ -274,8 +286,13 @@ int checkcpu (void)
 #if !defined(CONFIG_IOP480)
char addstr[64] = "";
sys_info_t sys_info;
+   int cpu_num;
 
-   puts ("CPU:   ");
+   cpu_num = get_cpu_num();
+   if (cpu_num >= 0)
+   printf("CPU%d:  ", cpu_num);
+   else
+   puts("CPU:   ");
 
get_sys_info(&sys_info);
 
diff --git a/include/ppc4xx.h b/include/ppc4xx.h
index e216663..61209a7 100644
--- a/include/ppc4xx.h
+++ b/include/ppc4xx.h
@@ -218,4 +218,7 @@ static inline void set_mcsr(u32 val)
 
 #endif /* __ASSEMBLY__ */
 
+/* for multi-cpu support */
+#define __NA_OR_UNKNOWN_CPU-1
+
 #endif /* __PPC4XX_H__ */
-- 
1.5.5

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[U-Boot] [PATCH] libfdt: Add function to explicitly expand aliases

2008-10-02 Thread Jerry Van Baren 
Kumar has already added alias expansion to fdt_path_offset().
However, in some circumstances it may be convenient for the user of
libfdt to explicitly get the string expansion of an alias.  This patch
adds a function to do this, fdt_get_alias(), and uses it to implement
fdt_path_offset().

Signed-off-by: David Gibson <[EMAIL PROTECTED]>
---

Another patch hot off the dtc/libfdt repository.

gvb

 include/libfdt.h |   26 ++
 libfdt/fdt_ro.c  |   26 +++---
 2 files changed, 45 insertions(+), 7 deletions(-)

diff --git a/include/libfdt.h b/include/libfdt.h
index 5492a53..7cad68c 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -459,6 +459,32 @@ static inline void *fdt_getprop_w(void *fdt, int 
nodeoffset,
 uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
 
 /**
+ * fdt_get_namelen - get alias based on substring
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_get_alias(), but only examine the first namelen
+ * characters of name for matching the alias name.
+ */
+const char *fdt_get_alias_namelen(const void *fdt,
+ const char *name, int namelen);
+
+/**
+ * fdt_get_alias - retreive the path referenced by a given alias
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ *
+ * fdt_get_alias() retrieves the value of a given alias.  That is, the
+ * value of the property named 'name' in the node /aliases.
+ *
+ * returns:
+ * a pointer to the expansion of the alias named 'name', of it exists
+ * NULL, if the given alias or the /aliases node does not exist
+ */
+const char *fdt_get_alias(const void *fdt, const char *name);
+
+/**
  * fdt_get_path - determine the full path of a node
  * @fdt: pointer to the device tree blob
  * @nodeoffset: offset of the node whose path to find
diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
index f559eed..b705f91 100644
--- a/libfdt/fdt_ro.c
+++ b/libfdt/fdt_ro.c
@@ -145,17 +145,12 @@ int fdt_path_offset(const void *fdt, const char *path)
 
/* see if we have an alias */
if (*path != '/') {
-   const char *q;
-   int aliasoffset = fdt_path_offset(fdt, "/aliases");
-
-   if (aliasoffset < 0)
-   return -FDT_ERR_BADPATH;
+   const char *q = strchr(path, '/');
 
-   q = strchr(path, '/');
if (!q)
q = end;
 
-   p = fdt_getprop_namelen(fdt, aliasoffset, path, q - p, NULL);
+   p = fdt_get_alias_namelen(fdt, p, q - p);
if (!p)
return -FDT_ERR_BADPATH;
offset = fdt_path_offset(fdt, p);
@@ -306,6 +301,23 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
return fdt32_to_cpu(*php);
 }
 
+const char *fdt_get_alias_namelen(const void *fdt,
+ const char *name, int namelen)
+{
+   int aliasoffset;
+
+   aliasoffset = fdt_path_offset(fdt, "/aliases");
+   if (aliasoffset < 0)
+   return NULL;
+
+   return fdt_getprop_namelen(fdt, aliasoffset, name, namelen, NULL);
+}
+
+const char *fdt_get_alias(const void *fdt, const char *name)
+{
+   return fdt_get_alias_namelen(fdt, name, strlen(name));
+}
+
 int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
 {
int pdepth = 0, p = 0;
-- 
1.5.6.5

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[U-Boot] [PATCH 1/1] ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change

2008-10-02 Thread Adam Graham 
After changing SDRAM_CLKTR phase value rerun the memory preload initialization 
sequence (INITPLR) to reset and relock the memory DLL.  Changing the 
SDRAM_CLKTR memory clock phase coarse timing adjustment effects the phase 
relationship of the internal, to the PPC chip, and external, to the PPC chip, 
versions of MEMCLK_OUT.

Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
---
 cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c |   21 +
 1 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c 
b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
index 83b9883..47ab39b 100644
--- a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+++ b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
@@ -174,6 +174,23 @@ static inline void ecc_clear_status_reg(void)
 #endif
 }
 
+/*
+ * Reset and relock memory DLL after SDRAM_CLKTR change
+ */
+static inline void relock_memory_DLL(void)
+{
+   u32 reg;
+
+   mtsdram(SDRAM_MCOPT2, SDRAM_MCOPT2_IPTR_EXECUTE);
+
+   do {
+   mfsdram(SDRAM_MCSTAT, reg);
+   } while (!(reg & SDRAM_MCSTAT_MIC_COMP));
+
+   mfsdram(SDRAM_MCOPT2, reg);
+   mtsdram(SDRAM_MCOPT2, reg | SDRAM_MCOPT2_DCEN_ENABLE);
+}
+
 static int ecc_check_status_reg(void)
 {
u32 ecc_status;
@@ -981,6 +998,8 @@ u32 DQS_autocalibration(void)
 
mtsdram(SDRAM_CLKTR, clkp << 30);
 
+   relock_memory_DLL();
+
putc('\b');
putc(slash[loopi++ % 8]);
 
@@ -1170,6 +1189,8 @@ u32 DQS_autocalibration(void)
 
mtsdram(SDRAM_CLKTR, tcal.clocks.clktr << 30);
 
+   relock_memory_DLL();
+
mfsdram(SDRAM_RQDC, rqdc_reg);
rqdc_reg &= ~(SDRAM_RQDC_RQFD_MASK);
mtsdram(SDRAM_RQDC, rqdc_reg |
-- 
1.5.5

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Re: [U-Boot] [UBoot] Hows to boot Linux Kernel from USB

2008-10-02 Thread thaoth 

Hi, 

   Do i have a problem with "Verifying Checksum ... Bad Data CRC”?

Best regard.


-- 
View this message in context: 
http://www.nabble.com/-UBoot--Hows-to-boot-Linux-Kernel-from-USB-tp19740267p19790840.html
Sent from the Uboot - Users mailing list archive at Nabble.com.

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Re: [U-Boot] [PATCH v2] net: ne2000: Divided a function of NE2000 driver

2008-10-02 Thread Nobuhiro Iwamatsu 
Hi, all

2008/10/3 Ben Warren <[EMAIL PROTECTED]>:
> Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 23:07 Wed 01 Oct , Ben Warren wrote:
>>
>>> Hi Nobuhiro-san,
>>>
>>> Nobuhiro Iwamatsu wrote:
>>>
 get_prom function was used __attriute__ , but it is not enable.
 ax88796.o does not do link besides ne2000.o. When ld is carried
 out, get_prom function of ax88796.c is ignored.
 This problem is a thing by specifications of ld.
 I checked and test this patch on SuperH and MIPS.


>>> You're seeing a common problem with weak functions - namely that they
>>> don't always get overridden. If there was a single function in ax88796.c
>>> that had strong static linkage there wouldn't be a problem. Using the
>>> weak attribute for get_prom() is an elegant solution that improves code
>>> re-use, so I'm wondering if there's a way it can be made to work.
>>>
>>> If nobody has any suggestions over the next couple of days, I'll pull in
>>> this patch.
>>>
>>> This get_prom() function was set as weak in commit
>>> 2ef7503a593c77a80c2a054011970227c4b62774, labeled " NE2000: Fix
>>> regresssion introduced by e710185aae90 on non AX88796" by
>>> Jean-Christophe PLAGNIOL-VILLARD. It's a shame that this was done
>>> without testing...
>>>
>> The NE2000 is tested every modification and Release on qemu_mips by myself
>>
>> And I've no problem on this board.
>>
> Sorry, I have a hard time believing that this works if you enable
> CONFIG_DRIVER_AX88796L.  Are you sure that the weak get_prom() is
> overridden?

Thank you for your check.

When I enabled CONFIG_DRIVER_AX88796L on SH and MIPS, and checked
ne2000.o by nm,
get_prom is set in WEAK. But get_prom is not linked, and __get_prom is
linked in u-boot.
With the current code, get_prom of AX88796L is not linked.

If need nm and objdump output , I can attach.

Best regards,
 Nobuhiro

-- 
Nobuhiro Iwamatsu
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Re: [U-Boot] [UBoot] Hows to boot Linux Kernel from USB

2008-10-02 Thread michael 
Hi,

thaoth wrote:
> Hi, 
>
>Do i have a problem with "Verifying Checksum ... Bad Data CRC”?
>
> Best regard.
>
>
Have you try to load your image using tftpboot and put it in memory?
Are you sure that you don't have any problem with memory initialization?

Regards
Michael

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Re: [U-Boot] [UBoot] Hows to boot Linux Kernel from USB

2008-10-02 Thread thaoth 

Hi Michael,

>Have you try to load your image using tftpboot and put it in memory?
My board don't have Eth port, so we can't try tftpboot 
>Are you sure that you don't have any problem with memory initialization?
i think i don't have any problem with memory initialization, because i can
see my image(using iminfo) on memory.

Best regards,
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