svn commit: r333824 - head/sys/powerpc/include
Author: jhibbits Date: Sat May 19 03:23:46 2018 New Revision: 333824 URL: https://svnweb.freebsd.org/changeset/base/333824 Log: Add some Hypervisor interrupt definitions This mostly completes the interrupt definitions. There are still some left out, less likely to be used in the near term. Modified: head/sys/powerpc/include/trap.h Modified: head/sys/powerpc/include/trap.h == --- head/sys/powerpc/include/trap.h Sat May 19 02:17:18 2018 (r333823) +++ head/sys/powerpc/include/trap.h Sat May 19 03:23:46 2018 (r333824) @@ -77,11 +77,18 @@ #defineEXC_DSMISS 0x1200 /* Data store translation miss */ /* Power ISA 2.06+: */ +#defineEXC_HDSI0x0e00 /* Hypervisor Data Storage */ +#defineEXC_HISI0x0e20 /* Hypervisor Instruction Storage */ #defineEXC_HEA 0x0e40 /* Hypervisor Emulation Assistance */ +#defineEXC_HMI 0x0e60 /* Hypervisor Maintenance */ #defineEXC_VSX 0x0f40 /* VSX Unavailable */ /* Power ISA 2.07+: */ #defineEXC_FAC 0x0f60 /* Facility Unavailable */ +#defineEXC_HFAC0x0f80 /* Hypervisor Facility Unavailable */ + +/* Power ISA 3.0+: */ +#defineEXC_HVI 0x0ea0 /* Hypervisor Virtualization */ /* The following are available on 4xx and 85xx */ #defineEXC_CRIT0x0100 /* Critical Input Interrupt */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r333825 - head/sys/powerpc/ofw
Author: jhibbits Date: Sat May 19 03:45:38 2018 New Revision: 333825 URL: https://svnweb.freebsd.org/changeset/base/333825 Log: Add yet another option for gathering available memory On some POWER9 systems, 'reg' denotes the full memory in the system, while 'linux,usable-memory' denotes the usable memory. Some memory is reserved for NVLink usage, so is partitioned off. Submitted by: Breno Leitao Modified: head/sys/powerpc/ofw/ofw_machdep.c Modified: head/sys/powerpc/ofw/ofw_machdep.c == --- head/sys/powerpc/ofw/ofw_machdep.c Sat May 19 03:23:46 2018 (r333824) +++ head/sys/powerpc/ofw/ofw_machdep.c Sat May 19 03:45:38 2018 (r333825) @@ -342,6 +342,16 @@ ofw_mem_regions(struct mem_region *memp, int *memsz, res = parse_ofw_memory(phandle, "reg", &memp[msz]); msz += res/sizeof(struct mem_region); + + /* +* On POWER9 Systems we might have both linux,usable-memory and +* reg properties. 'reg' denotes all available memory, but we +* must use 'linux,usable-memory', a subset, as some memory +* regions are reserved for NVLink. +*/ + if (OF_getproplen(phandle, "linux,usable-memory") >= 0) + res = parse_ofw_memory(phandle, "linux,usable-memory", + &availp[asz]); if (OF_getproplen(phandle, "available") >= 0) res = parse_ofw_memory(phandle, "available", &availp[asz]); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r333825 - head/sys/powerpc/ofw
On Fri, May 18, 2018 at 10:45 PM, Justin Hibbits wrote: > Author: jhibbits > Date: Sat May 19 03:45:38 2018 > New Revision: 333825 > URL: https://svnweb.freebsd.org/changeset/base/333825 > > Log: > Add yet another option for gathering available memory > > On some POWER9 systems, 'reg' denotes the full memory in the system, while > 'linux,usable-memory' denotes the usable memory. Some memory is reserved > for > NVLink usage, so is partitioned off. > > Submitted by: Breno Leitao Differential Revision: https://reviews.freebsd.org/D15482 ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r333826 - head/sys/powerpc/ofw
Author: jhibbits Date: Sat May 19 03:47:28 2018 New Revision: 333826 URL: https://svnweb.freebsd.org/changeset/base/333826 Log: Fix a manual copy from the original diff for r333825 The 'else' was in the original diff. Submitted by: Breno Leitao Modified: head/sys/powerpc/ofw/ofw_machdep.c Modified: head/sys/powerpc/ofw/ofw_machdep.c == --- head/sys/powerpc/ofw/ofw_machdep.c Sat May 19 03:45:38 2018 (r333825) +++ head/sys/powerpc/ofw/ofw_machdep.c Sat May 19 03:47:28 2018 (r333826) @@ -352,7 +352,7 @@ ofw_mem_regions(struct mem_region *memp, int *memsz, if (OF_getproplen(phandle, "linux,usable-memory") >= 0) res = parse_ofw_memory(phandle, "linux,usable-memory", &availp[asz]); - if (OF_getproplen(phandle, "available") >= 0) + else if (OF_getproplen(phandle, "available") >= 0) res = parse_ofw_memory(phandle, "available", &availp[asz]); else ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r333836 - head/sys/powerpc/powernv
Author: jhibbits
Date: Sat May 19 04:01:15 2018
New Revision: 333836
URL: https://svnweb.freebsd.org/changeset/base/333836
Log:
powerpc64: Add OPAL definitions
Summary:
Add additional OPAL PCI definitions and expand the code to use them in order
to
ease the OPAL interface process for new comers.
These definitions came directly from the OPAL code and they are the same for
both PHB3 (POWER8) and PHB4 (POWER9).
Submitted by: Breno Leitao
Differential Revision: https://reviews.freebsd.org/D15432
Modified:
head/sys/powerpc/powernv/opal.h
head/sys/powerpc/powernv/opal_pci.c
Modified: head/sys/powerpc/powernv/opal.h
==
--- head/sys/powerpc/powernv/opal.h Sat May 19 03:58:40 2018
(r333835)
+++ head/sys/powerpc/powernv/opal.h Sat May 19 04:01:15 2018
(r333836)
@@ -79,6 +79,20 @@ int opal_call(uint64_t token, ...);
#defineOPAL_UNMAP_PE 0
#define OPAL_MAP_PE1
+#defineOPAL_PCI_BUS_ANY0
+#defineOPAL_PCI_BUS_3BITS 2
+#defineOPAL_PCI_BUS_4BITS 3
+#defineOPAL_PCI_BUS_5BITS 4
+#defineOPAL_PCI_BUS_6BITS 5
+#defineOPAL_PCI_BUS_7BITS 6
+#defineOPAL_PCI_BUS_ALL7 /* Match bus number exactly */
+
+#defineOPAL_IGNORE_RID_DEVICE_NUMBER 0
+#defineOPAL_COMPARE_RID_DEVICE_NUMBER 1
+
+#defineOPAL_IGNORE_RID_FUNC_NUMBER 0
+#defineOPAL_COMPARE_RID_FUNC_NUMBER1
+
#defineOPAL_SUCCESS0
#defineOPAL_PARAMETER -1
#defineOPAL_BUSY -2
Modified: head/sys/powerpc/powernv/opal_pci.c
==
--- head/sys/powerpc/powernv/opal_pci.c Sat May 19 03:58:40 2018
(r333835)
+++ head/sys/powerpc/powernv/opal_pci.c Sat May 19 04:01:15 2018
(r333836)
@@ -254,8 +254,8 @@ opalpci_attach(device_t dev)
* such time as we start wanting to do things like bhyve.
*/
err = opal_call(OPAL_PCI_SET_PE, sc->phb_id, OPAL_PCI_DEFAULT_PE,
- 0, 0, 0, 0, /* All devices */
- OPAL_MAP_PE);
+ 0, OPAL_PCI_BUS_ANY, OPAL_IGNORE_RID_DEVICE_NUMBER,
+ OPAL_IGNORE_RID_FUNC_NUMBER, OPAL_MAP_PE);
if (err != 0) {
device_printf(dev, "PE mapping failed: %d\n", err);
return (ENXIO);
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svn commit: r333846 - in head/sys/powerpc: aim powerpc
Author: jhibbits
Date: Sat May 19 04:21:50 2018
New Revision: 333846
URL: https://svnweb.freebsd.org/changeset/base/333846
Log:
Add hypervisor trap handling, using HSRR0/HSRR1
Summary:
Some hypervisor exceptions on POWER architecture only save state to
HSRR0/HSRR1.
Until we have bhyve on POWER, use a lightweight exception frontend which
copies
HSRR0/HSRR1 into SRR0/SRR1, and run the normal trap handler.
The first user of this is the Hypervisor Virtualization Interrupt, which
targets
the XIVE interrupt controller on POWER9.
Reviewed By: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D15487
Modified:
head/sys/powerpc/aim/aim_machdep.c
head/sys/powerpc/aim/trap_subr64.S
head/sys/powerpc/powerpc/interrupt.c
Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c Sat May 19 04:14:00 2018
(r333845)
+++ head/sys/powerpc/aim/aim_machdep.c Sat May 19 04:21:50 2018
(r333846)
@@ -148,6 +148,7 @@ extern Elf_Addr _GLOBAL_OFFSET_TABLE_[];
extern void*rstcode, *rstcodeend;
extern void*trapcode, *trapcodeend;
+extern void*hypertrapcode, *hypertrapcodeend;
extern void*generictrap, *generictrap64;
extern void*alitrap, *aliend;
extern void*dsitrap, *dsiend;
@@ -360,6 +361,11 @@ aim_cpu_init(vm_offset_t toc)
bcopy(&restorebridge, (void *)EXC_TRC, trap_offset);
bcopy(&restorebridge, (void *)EXC_BPT, trap_offset);
}
+ #else
+ trapsize = (size_t)&hypertrapcodeend - (size_t)&hypertrapcode;
+ bcopy(&hypertrapcode, (void *)(EXC_HEA + trap_offset), trapsize);
+ bcopy(&hypertrapcode, (void *)(EXC_HMI + trap_offset), trapsize);
+ bcopy(&hypertrapcode, (void *)(EXC_HVI + trap_offset), trapsize);
#endif
bcopy(&rstcode, (void *)(EXC_RST + trap_offset), (size_t)&rstcodeend -
Modified: head/sys/powerpc/aim/trap_subr64.S
==
--- head/sys/powerpc/aim/trap_subr64.S Sat May 19 04:14:00 2018
(r333845)
+++ head/sys/powerpc/aim/trap_subr64.S Sat May 19 04:21:50 2018
(r333846)
@@ -446,6 +446,20 @@ CNAME(trapcode):
blrl/* Branch to generictrap */
CNAME(trapcodeend):
+/* Same thing for traps setting HSRR0/HSS1 */
+ .globl CNAME(hypertrapcode),CNAME(hypertrapcodeend)
+ .p2align 3
+CNAME(hypertrapcode):
+ mtsprg1 %r1 /* save SP */
+ mflr%r1 /* Save the old LR in r1 */
+ mtsprg2 %r1 /* And then in SPRG2 */
+ ld %r1,TRAP_GENTRAP(0)
+ addi%r1,%r1,(generichypertrap-generictrap)
+ mtlr%r1
+ li %r1, 0xe0 /* How to get the vector from LR */
+ blrl/* Branch to generictrap */
+CNAME(hypertrapcodeend):
+
/*
* For SLB misses: do special things for the kernel
*
@@ -757,6 +771,13 @@ realtrap:
* SPRG2 - Original LR
*/
+generichypertrap:
+ mtsprg3 %r1
+ mfspr %r1, SPR_HSRR0
+ mtsrr0 %r1
+ mfspr %r1, SPR_HSRR1
+ mtsrr1 %r1
+ mfsprg3 %r1
.globl CNAME(generictrap)
generictrap:
/* Save R1 for computing the exception vector */
Modified: head/sys/powerpc/powerpc/interrupt.c
==
--- head/sys/powerpc/powerpc/interrupt.cSat May 19 04:14:00 2018
(r333845)
+++ head/sys/powerpc/powerpc/interrupt.cSat May 19 04:21:50 2018
(r333846)
@@ -86,6 +86,7 @@ powerpc_interrupt(struct trapframe *framep)
switch (framep->exc) {
case EXC_EXI:
+ case EXC_HVI:
critical_enter();
PIC_DISPATCH(root_pic, framep);
critical_exit();
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svn commit: r333851 - head/sys/powerpc/include
Author: jhibbits Date: Sat May 19 04:56:10 2018 New Revision: 333851 URL: https://svnweb.freebsd.org/changeset/base/333851 Log: Add SPR_HSRR0/SPR_HSRR1 definitions Reported by: Mark Millard Pointy-hat to:jhibbits Modified: head/sys/powerpc/include/spr.h Modified: head/sys/powerpc/include/spr.h == --- head/sys/powerpc/include/spr.h Sat May 19 04:48:26 2018 (r333850) +++ head/sys/powerpc/include/spr.h Sat May 19 04:56:10 2018 (r333851) @@ -239,6 +239,8 @@ #define EPCR_PMGS 0x0020 #defineSPR_SPEFSCR 0x200 /* ..8 Signal Processing Engine FSCR. */ +#defineSPR_HSRR0 0x13a +#defineSPR_HSRR1 0x13b #defineSPR_LPCR0x13e /* Logical Partitioning Control */ #define LPCR_LPES 0x008 /* Bit 60 */ #defineSPR_LPID0x13f /* Logical Partitioning Control */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r333912 - in head/sys/powerpc: aim include powernv powerpc pseries
Author: jhibbits
Date: Sun May 20 03:23:17 2018
New Revision: 333912
URL: https://svnweb.freebsd.org/changeset/base/333912
Log:
Add support for the XIVE XICS emulation mode for POWER9 systems
Summary:
POWER9 systems use a new interrupt controller, XIVE, managed through OPAL
firmware calls. The OPAL firmware includes support for emulating the previous
generation XICS presentation layer in addition to a new "XIVE Exploitation"
mode. As a stopgap until we have XIVE exploitation mode, enable XICS
emulation
mode so that we at least have an interrupt controller.
Since the CPPR is local to the current CPU, it cannot be updated for APs when
initializing on the BSP. This adds a new function, directly called by the
powernv platform code, to initialize the CPPR on AP bringup.
Reviewed by: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D15492
Modified:
head/sys/powerpc/aim/mp_cpudep.c
head/sys/powerpc/include/cpu.h
head/sys/powerpc/include/spr.h
head/sys/powerpc/powernv/opal.h
head/sys/powerpc/powernv/platform_powernv.c
head/sys/powerpc/powerpc/cpu.c
head/sys/powerpc/pseries/xics.c
Modified: head/sys/powerpc/aim/mp_cpudep.c
==
--- head/sys/powerpc/aim/mp_cpudep.cSun May 20 02:27:58 2018
(r333911)
+++ head/sys/powerpc/aim/mp_cpudep.cSun May 20 03:23:17 2018
(r333912)
@@ -96,7 +96,7 @@ cpudep_ap_early_bootstrap(void)
mtspr(SPR_LPID, 0);
isync();
- mtspr(SPR_LPCR, LPCR_LPES);
+ mtspr(SPR_LPCR, lpcr);
isync();
}
#endif
@@ -401,7 +401,7 @@ cpudep_ap_setup()
case IBMPOWER9:
#ifdef __powerpc64__
if (mfmsr() & PSL_HV) {
- mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_LPES |
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) | lpcr |
LPCR_PECE_WAKESET);
isync();
}
Modified: head/sys/powerpc/include/cpu.h
==
--- head/sys/powerpc/include/cpu.h Sun May 20 02:27:58 2018
(r333911)
+++ head/sys/powerpc/include/cpu.h Sun May 20 03:23:17 2018
(r333912)
@@ -135,6 +135,7 @@ extern char etext[];
#ifdef __powerpc64__
extern void enter_idle_powerx(void);
extern uint64_t can_wakeup;
+extern register_t lpcr;
#endif
void cpu_halt(void);
Modified: head/sys/powerpc/include/spr.h
==
--- head/sys/powerpc/include/spr.h Sun May 20 02:27:58 2018
(r333911)
+++ head/sys/powerpc/include/spr.h Sun May 20 03:23:17 2018
(r333912)
@@ -215,14 +215,6 @@
#define FSL_E300C3 0x8085
#define FSL_E300C4 0x8086
-#defineSPR_LPCR0x13e /* Logical Partitioning Control
*/
-#define LPCR_LPES 0x008 /* Bit 60 */
-#define LPCR_PECE_DRBL(1ULL << 16)/* Directed Privileged
Doorbell */
-#define LPCR_PECE_HDRBL (1ULL << 15)/* Directed Hypervisor
Doorbell */
-#define LPCR_PECE_EXT (1ULL << 14)/* External exceptions */
-#define LPCR_PECE_DECR(1ULL << 13)/* Decrementer exceptions */
-#define LPCR_PECE_ME (1ULL << 12)/* Machine Check and
Hypervisor */
-/* Maintenance exceptions */
#define LPCR_PECE_WAKESET (LPCR_PECE_EXT | LPCR_PECE_DECR | LPCR_PECE_ME)
#defineSPR_EPCR0x133
@@ -242,7 +234,14 @@
#defineSPR_HSRR0 0x13a
#defineSPR_HSRR1 0x13b
#defineSPR_LPCR0x13e /* Logical Partitioning Control
*/
-#define LPCR_LPES 0x008 /* Bit 60 */
+#define LPCR_LPES 0x008 /* Bit 60 */
+#define LPCR_HVICE 0x002 /* Hypervisor Virtualization
Interrupt (Arch 3.0) */
+#define LPCR_PECE_DRBL (1ULL << 16) /* Directed Privileged
Doorbell */
+#define LPCR_PECE_HDRBL (1ULL << 15) /* Directed Hypervisor
Doorbell */
+#define LPCR_PECE_EXT (1ULL << 14) /* External exceptions */
+#define LPCR_PECE_DECR (1ULL << 13) /* Decrementer
exceptions */
+#define LPCR_PECE_ME(1ULL << 12) /* Machine Check and
Hypervisor */
+ /* Maintenance exceptions */
#defineSPR_LPID0x13f /* Logical Partitioning Control
*/
#defineSPR_PTCR0x1d0 /* Partition Table Control
Register */
Modified: head/sys/powerpc/powernv/opal.h
==
--- head/sys/powerpc/powernv/op
svn commit: r334011 - in head/sys: conf powerpc/powernv
Author: jhibbits
Date: Tue May 22 02:42:53 2018
New Revision: 334011
URL: https://svnweb.freebsd.org/changeset/base/334011
Log:
Basic OPAL sensor support for POWER9 platforms
Summary:
PowerNV architectures (in the test case POWER9) export sensors via the device
tree, which are accessed via OPAL calls. This adds sysctl nodes for each
device in a generic fashion. New sysctl nodes are:
dev.opal_sensor.N.sensor
dev.opal_sensor.N.sensor_min
dev.opal_sensor.N.sensor_max
dev.opal_sensor.N.type
dev.opal_sensor.N.label
These are rooted at a parent attachment under opal, called opalsens. This
does
not add support for the "sensor groups" defined in the device tree.
Reviewed by: breno.leitao_gmail.com
Differential Revision: https://reviews.freebsd.org/D15362
Added:
head/sys/powerpc/powernv/opal_sensor.c (contents, props changed)
Modified:
head/sys/conf/files.powerpc
head/sys/powerpc/powernv/opal.h
Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Tue May 22 02:13:04 2018(r334010)
+++ head/sys/conf/files.powerpc Tue May 22 02:42:53 2018(r334011)
@@ -189,6 +189,7 @@ powerpc/powernv/opal_dev.c optionalpowernv
powerpc/powernv/opal_i2c.c optionaliicbus fdt powernv
powerpc/powernv/opal_i2cm.coptionaliicbus fdt powernv
powerpc/powernv/opal_pci.c optionalpowernv pci
+powerpc/powernv/opal_sensor.c optionalpowernv
powerpc/powernv/opalcall.S optionalpowernv
powerpc/powernv/platform_powernv.c optionalpowernv
powerpc/powernv/powernv_centaur.c optionalpowernv
Modified: head/sys/powerpc/powernv/opal.h
==
--- head/sys/powerpc/powernv/opal.h Tue May 22 02:13:04 2018
(r334010)
+++ head/sys/powerpc/powernv/opal.h Tue May 22 02:42:53 2018
(r334011)
@@ -72,6 +72,7 @@ int opal_call(uint64_t token, ...);
#defineOPAL_RETURN_CPU 69
#defineOPAL_REINIT_CPUS70
#defineOPAL_CHECK_ASYNC_COMPLETION 86
+#defineOPAL_SENSOR_READ88
#defineOPAL_I2C_REQUEST109
#defineOPAL_INT_GET_XIRR 122
#defineOPAL_INT_SET_CPPR 123
@@ -79,6 +80,9 @@ int opal_call(uint64_t token, ...);
#defineOPAL_INT_SET_MFRR 125
#defineOPAL_PCI_TCE_KILL 126
#defineOPAL_XIVE_RESET 128
+#defineOPAL_SENSOR_GROUP_CLEAR 156
+#defineOPAL_SENSOR_READ_U64162
+#defineOPAL_SENSOR_GROUP_ENABLE163
/* For OPAL_PCI_SET_PE */
#defineOPAL_UNMAP_PE 0
Added: head/sys/powerpc/powernv/opal_sensor.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/powerpc/powernv/opal_sensor.c Tue May 22 02:42:53 2018
(r334011)
@@ -0,0 +1,336 @@
+/*-
+ * Copyright (C) 2018 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+#include
+#include
+#include
+
+#include "opal.h"
+
+struct opal_sensor_softc {
+ device_t sc_dev;
+ struct mtx sc_mtx;
+ uint32_t sc_handle;
+ uint32_t sc_min_handle;
+ uint32_t sc_max_handle;
+ char*sc_label;
+
svn commit: r334014 - head/sys/powerpc/pseries
Author: jhibbits
Date: Tue May 22 03:24:16 2018
New Revision: 334014
URL: https://svnweb.freebsd.org/changeset/base/334014
Log:
Add a comment explaining the need of a global temporary variable
cpu_xirr is used only as a temporary location for the OPAL call in
PIC_DISPATCH().
Requested by: nwhitehorn
Modified:
head/sys/powerpc/pseries/xics.c
Modified: head/sys/powerpc/pseries/xics.c
==
--- head/sys/powerpc/pseries/xics.c Tue May 22 03:22:02 2018
(r334013)
+++ head/sys/powerpc/pseries/xics.c Tue May 22 03:24:16 2018
(r334014)
@@ -140,6 +140,15 @@ static driver_t xics_driver = {
};
#ifdef POWERNV
+/* We can only pass physical addresses into OPAL. Kernel stacks are in the
KVA,
+ * not in the direct map, so we need to somehow extract the physical address.
+ * However, pmap_kextract() takes locks, which is forbidden in a critical
region
+ * (which PMAP_DISPATCH() operates in). The kernel is mapped into the Direct
+ * Map (0xc000), and the CPU implicitly drops the top two bits when doing
+ * real address by nature that the bus width is smaller than 64-bits. Placing
+ * cpu_xirr into the DMAP lets us take advantage of this and avoids the
+ * pmap_kextract() that would otherwise be needed if using the stack variable.
+ */
static uint32_t cpu_xirr[MAXCPU];
#endif
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svn commit: r334015 - in head/sys: conf powerpc/powernv
Author: jhibbits
Date: Tue May 22 03:57:32 2018
New Revision: 334015
URL: https://svnweb.freebsd.org/changeset/base/334015
Log:
Add an IPMI attachment for PowerNV systems
IPMI access on PowerNV systems is done through the OPAL firmware. This adds a
simple attachment for communicating with the FSP/BMC on these machines. This
has been tested on a Talos POWER9 workstation, only in the bootup phase,
noting
the successful attachment messages:
...
ipmi0: IPMI device rev. 0, firmware rev. 2.00, version 2.0, device support
mask 0
ipmi0: Number of channels 2
...
The ipmi device has not been added to GENERIC64, but may be after further
testing. It may also eventually be added to the ipmi module at that point.
Added:
head/sys/powerpc/powernv/opal_ipmi.c (contents, props changed)
Modified:
head/sys/conf/files.powerpc
head/sys/powerpc/powernv/opal.h
Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Tue May 22 03:24:16 2018(r334014)
+++ head/sys/conf/files.powerpc Tue May 22 03:57:32 2018(r334015)
@@ -42,6 +42,7 @@ dev/iicbus/ds1631.c optionalds1631 powermac
dev/iicbus/ds1775.coptionalds1775 powermac
dev/iicbus/max6690.c optionalmax6690 powermac
dev/iicbus/ofw_iicbus.coptionaliicbus aim
+dev/ipmi/ipmi.coptionalipmi
dev/nand/nfc_fsl.c optionalnand mpc85xx
dev/nand/nfc_rb.c optionalnand mpc85xx
# Most ofw stuff below is brought in by conf/files for options FDT, but
@@ -188,6 +189,7 @@ powerpc/powernv/opal_console.c optionalpowernv
powerpc/powernv/opal_dev.c optionalpowernv
powerpc/powernv/opal_i2c.c optionaliicbus fdt powernv
powerpc/powernv/opal_i2cm.coptionaliicbus fdt powernv
+powerpc/powernv/opal_ipmi.coptionalpowernv ipmi
powerpc/powernv/opal_pci.c optionalpowernv pci
powerpc/powernv/opal_sensor.c optionalpowernv
powerpc/powernv/opalcall.S optionalpowernv
Modified: head/sys/powerpc/powernv/opal.h
==
--- head/sys/powerpc/powernv/opal.h Tue May 22 03:24:16 2018
(r334014)
+++ head/sys/powerpc/powernv/opal.h Tue May 22 03:57:32 2018
(r334015)
@@ -73,6 +73,8 @@ int opal_call(uint64_t token, ...);
#defineOPAL_REINIT_CPUS70
#defineOPAL_CHECK_ASYNC_COMPLETION 86
#defineOPAL_SENSOR_READ88
+#defineOPAL_IPMI_SEND 107
+#defineOPAL_IPMI_RECV 108
#defineOPAL_I2C_REQUEST109
#defineOPAL_INT_GET_XIRR 122
#defineOPAL_INT_SET_CPPR 123
@@ -106,8 +108,12 @@ int opal_call(uint64_t token, ...);
#defineOPAL_PARAMETER -1
#defineOPAL_BUSY -2
#defineOPAL_CLOSED -5
+#defineOPAL_HARDWARE -6
+#defineOPAL_UNSUPPORTED-7
+#defineOPAL_RESOURCE -10
#defineOPAL_BUSY_EVENT -12
#defineOPAL_ASYNC_COMPLETION -15
+#defineOPAL_EMPTY -16
struct opal_msg {
uint32_t msg_type;
@@ -125,6 +131,15 @@ enum opal_msg_type {
OPAL_MSG_PRD= 6,
OPAL_MSG_OCC= 7,
OPAL_MSG_TYPE_MAX,
+};
+
+#defineOPAL_IPMI_MSG_FORMAT_VERSION_1 1
+
+struct opal_ipmi_msg {
+ uint8_t version;
+ uint8_t netfn;
+ uint8_t cmd;
+ uint8_t data[];
};
#endif
Added: head/sys/powerpc/powernv/opal_ipmi.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/powerpc/powernv/opal_ipmi.cTue May 22 03:57:32 2018
(r334015)
@@ -0,0 +1,241 @@
+/*-
+ * Copyright (C) 2018 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE
svn commit: r334230 - head/sys/powerpc/aim
Author: jhibbits
Date: Sat May 26 00:41:50 2018
New Revision: 334230
URL: https://svnweb.freebsd.org/changeset/base/334230
Log:
Only crop the VPN on POWER4 and derivatives for TLBIE operations
Summary:
PowerISA 2.03 and later require bits 14:65 in the RB register argument,
which is the full value of the vpn argument post-shift. Only POWER4, POWER4+,
and PPC970* need the upper 16 bits cropped.
With this change FreeBSD can boot to multi-user on POWER9.
Reviewed by: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D15581
Modified:
head/sys/powerpc/aim/moea64_native.c
Modified: head/sys/powerpc/aim/moea64_native.c
==
--- head/sys/powerpc/aim/moea64_native.cFri May 25 23:18:06 2018
(r334229)
+++ head/sys/powerpc/aim/moea64_native.cSat May 26 00:41:50 2018
(r334230)
@@ -133,6 +133,8 @@ __FBSDID("$FreeBSD$");
/* POWER9 only permits a 64k partition table size. */
#definePART_SIZE 0x1
+static int moea64_crop_tlbie;
+
static __inline void
TLBIE(uint64_t vpn) {
#ifndef __powerpc64__
@@ -144,12 +146,14 @@ TLBIE(uint64_t vpn) {
static volatile u_int tlbie_lock = 0;
vpn <<= ADDR_PIDX_SHFT;
- vpn &= ~(0xULL << 48);
/* Hobo spinlock: we need stronger guarantees than mutexes provide */
while (!atomic_cmpset_int(&tlbie_lock, 0, 1));
isync(); /* Flush instruction queue once lock acquired */
+ if (moea64_crop_tlbie)
+ vpn &= ~(0xULL << 48);
+
#ifdef __powerpc64__
__asm __volatile("tlbie %0" :: "r"(vpn) : "memory");
__asm __volatile("eieio; tlbsync; ptesync" ::: "memory");
@@ -428,6 +432,15 @@ moea64_bootstrap_native(mmu_t mmup, vm_offset_t kernel
moea64_early_bootstrap(mmup, kernelstart, kernelend);
+ switch (mfpvr() >> 16) {
+ case IBMPOWER4:
+ case IBMPOWER4PLUS:
+ case IBM970:
+ case IBM970FX:
+ case IBM970GX:
+ case IBM970MP:
+ moea64_crop_tlbie = true;
+ }
/*
* Allocate PTEG table.
*/
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svn commit: r334232 - head/sys/powerpc/powernv
Author: jhibbits Date: Sat May 26 02:45:41 2018 New Revision: 334232 URL: https://svnweb.freebsd.org/changeset/base/334232 Log: Correct a typo for opal temperature sensor type constant Modified: head/sys/powerpc/powernv/opal_sensor.c Modified: head/sys/powerpc/powernv/opal_sensor.c == --- head/sys/powerpc/powernv/opal_sensor.c Sat May 26 00:46:08 2018 (r334231) +++ head/sys/powerpc/powernv/opal_sensor.c Sat May 26 02:45:41 2018 (r334232) @@ -228,7 +228,7 @@ opal_sensor_attach(device_t dev) SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "sensor_min", CTLTYPE_INT | CTLFLAG_RD, sc, sensor_id, opal_sensor_sysctl, - (sc->sc_type == OPAL_MSG_TYPE_MAX) ? "IK" : "I", + (sc->sc_type == OPAL_SENSOR_TEMP) ? "IK" : "I", "minimum value"); } @@ -238,7 +238,7 @@ opal_sensor_attach(device_t dev) SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "sensor_max", CTLTYPE_INT | CTLFLAG_RD, sc, sensor_id, opal_sensor_sysctl, - (sc->sc_type == OPAL_MSG_TYPE_MAX) ? "IK" : "I", + (sc->sc_type == OPAL_SENSOR_TEMP) ? "IK" : "I", "maximum value"); } ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r334234 - head/sys/powerpc/powernv
Author: jhibbits Date: Sat May 26 04:24:25 2018 New Revision: 334234 URL: https://svnweb.freebsd.org/changeset/base/334234 Log: Fix a typo missed in r334232 Modified: head/sys/powerpc/powernv/opal_sensor.c Modified: head/sys/powerpc/powernv/opal_sensor.c == --- head/sys/powerpc/powernv/opal_sensor.c Sat May 26 02:59:34 2018 (r334233) +++ head/sys/powerpc/powernv/opal_sensor.c Sat May 26 04:24:25 2018 (r334234) @@ -211,7 +211,7 @@ opal_sensor_attach(device_t dev) sc->sc_handle = sensor_id; SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "sensor", CTLTYPE_INT | CTLFLAG_RD, sc, sensor_id, - opal_sensor_sysctl, (sc->sc_type == OPAL_MSG_TYPE_MAX) ? "IK" : "I", + opal_sensor_sysctl, (sc->sc_type == OPAL_SENSOR_TEMP) ? "IK" : "I", "current value"); SYSCTL_ADD_STRING(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "type", ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r334235 - in head/sys/powerpc: aim include
Author: jhibbits
Date: Sat May 26 04:33:19 2018
New Revision: 334235
URL: https://svnweb.freebsd.org/changeset/base/334235
Log:
On POWER9 clear the HID0_RADIX before enabling the page tables
POWER9 supports Radix page tables in addition to Hashed page tables. When
Radix page tables are in use, the TLB is cut in half, so that half of the
TLB is used for the page walk cache. This is the default behavior, however
FreeBSD currently does not support Radix tables. Clear this bit so that we
can use the full TLB. Do this in the MMU logic so that configuration can be
localized to the specific translation format. Once we do support Radix
tables, the setup for that will be localized to the Radix MMU kobj.
Modified:
head/sys/powerpc/aim/moea64_native.c
head/sys/powerpc/include/hid.h
Modified: head/sys/powerpc/aim/moea64_native.c
==
--- head/sys/powerpc/aim/moea64_native.cSat May 26 04:24:25 2018
(r334234)
+++ head/sys/powerpc/aim/moea64_native.cSat May 26 04:33:19 2018
(r334235)
@@ -116,6 +116,7 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
#include
#include
@@ -383,6 +384,12 @@ moea64_cpu_bootstrap_native(mmu_t mmup, int ap)
*/
mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR);
+
+ switch (mfpvr() >> 16) {
+ case IBMPOWER9:
+ mtspr(SPR_HID0, mfspr(SPR_HID0) & ~HID0_RADIX);
+ break;
+ }
/*
* Install kernel SLB entries
Modified: head/sys/powerpc/include/hid.h
==
--- head/sys/powerpc/include/hid.h Sat May 26 04:24:25 2018
(r334234)
+++ head/sys/powerpc/include/hid.h Sat May 26 04:33:19 2018
(r334235)
@@ -33,6 +33,7 @@
#define _POWERPC_HID_H_
/* Hardware Implementation Dependent registers for the PowerPC */
+#defineHID0_RADIX 0x0080 /* Enable Radix page
tables (POWER9) */
#define HID0_EMCP 0x8000 /* Enable machine check pin */
#define HID0_DBP 0x4000 /* Disable 60x bus parity generation */
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svn commit: r334259 - in head/sys/powerpc: include powerpc
Author: jhibbits
Date: Sun May 27 20:24:24 2018
New Revision: 334259
URL: https://svnweb.freebsd.org/changeset/base/334259
Log:
Stop idle threads on power9 in the idle task until an interrupt.
This reduces the CPU cycle wastage on power9, which is SMT4. Any idle
thread that's spinning is simply starving working threads on the same core
of valuable resources.
This can be reduced further by taking more advantage of the PSSCR supported
states, as well as permitting state loss, as is currently done for power8.
The currently implemented stop state is the lowest latency, which may still
consume resources.
Modified:
head/sys/powerpc/include/spr.h
head/sys/powerpc/powerpc/cpu.c
Modified: head/sys/powerpc/include/spr.h
==
--- head/sys/powerpc/include/spr.h Sun May 27 19:27:34 2018
(r334258)
+++ head/sys/powerpc/include/spr.h Sun May 27 20:24:24 2018
(r334259)
@@ -383,6 +383,7 @@
#defineSPR_MD_CAM 0x338 /* ..8 IMMU CAM entry read */
#defineSPR_MD_RAM0 0x339 /* ..8 IMMU RAM entry read reg
0 */
#defineSPR_MD_RAM1 0x33a /* ..8 IMMU RAM entry read reg
1 */
+#defineSPR_PSSCR 0x357 /* Processor Stop Status and
Control Register (ISA 3.0) */
#defineSPR_UMMCR2 0x3a0 /* .6. User Monitor Mode
Control Register 2 */
#defineSPR_UMMCR0 0x3a8 /* .6. User Monitor Mode
Control Register 0 */
#defineSPR_USIA0x3ab /* .6. User Sampled Instruction
Address */
Modified: head/sys/powerpc/powerpc/cpu.c
==
--- head/sys/powerpc/powerpc/cpu.c Sun May 27 19:27:34 2018
(r334258)
+++ head/sys/powerpc/powerpc/cpu.c Sun May 27 20:24:24 2018
(r334259)
@@ -91,6 +91,7 @@ static void cpu_idle_60x(sbintime_t);
static voidcpu_idle_booke(sbintime_t);
#if defined(__powerpc64__) && defined(AIM)
static voidcpu_idle_powerx(sbintime_t);
+static voidcpu_idle_power9(sbintime_t sbt);
#endif
struct cputab {
@@ -181,7 +182,7 @@ static const struct cputab models[] = {
PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HTM | PPC_FEATURE2_DSCR |
PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO |
PPC_FEATURE2_ARCH_3_00 | PPC_FEATURE2_HAS_IEEE128 |
- PPC_FEATURE2_DARN, NULL },
+ PPC_FEATURE2_DARN, cpu_powerx_setup },
{ "Motorola PowerPC 7400", MPC7400,REVFMT_MAJMIN,
PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup },
{ "Motorola PowerPC 7410", MPC7410,REVFMT_MAJMIN,
@@ -660,7 +661,12 @@ cpu_powerx_setup(int cpuid, uint16_t vers)
switch (vers) {
case IBMPOWER8:
case IBMPOWER8E:
+ cpu_idle_hook = cpu_idle_powerx;
+ mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_PECE_WAKESET);
+ isync();
+ break;
case IBMPOWER9:
+ cpu_idle_hook = cpu_idle_power9;
mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_PECE_WAKESET);
isync();
break;
@@ -668,7 +674,6 @@ cpu_powerx_setup(int cpuid, uint16_t vers)
return;
}
- cpu_idle_hook = cpu_idle_powerx;
#endif
}
@@ -797,6 +802,27 @@ cpu_idle_powerx(sbintime_t sbt)
enter_idle_powerx();
spinlock_exit();
+}
+
+static void
+cpu_idle_power9(sbintime_t sbt)
+{
+ register_t msr;
+
+ msr = mfmsr();
+
+ /* Suspend external interrupts until stop instruction completes. */
+ mtmsr(msr & ~PSL_EE);
+ /* Set the stop state to lowest latency, wake up to next instruction */
+ mtspr(SPR_PSSCR, 0);
+ /* "stop" instruction (PowerISA 3.0) */
+ __asm __volatile (".long 0x4c0002e4");
+ /*
+* Re-enable external interrupts to capture the interrupt that caused
+* the wake up.
+*/
+ mtmsr(msr);
+
}
#endif
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svn commit: r334260 - head/sys/powerpc/powerpc
Author: jhibbits
Date: Sun May 27 20:36:43 2018
New Revision: 334260
URL: https://svnweb.freebsd.org/changeset/base/334260
Log:
Match style of the other prototypes, and don't name the argument.
Modified:
head/sys/powerpc/powerpc/cpu.c
Modified: head/sys/powerpc/powerpc/cpu.c
==
--- head/sys/powerpc/powerpc/cpu.c Sun May 27 20:24:24 2018
(r334259)
+++ head/sys/powerpc/powerpc/cpu.c Sun May 27 20:36:43 2018
(r334260)
@@ -91,7 +91,7 @@ static void cpu_idle_60x(sbintime_t);
static voidcpu_idle_booke(sbintime_t);
#if defined(__powerpc64__) && defined(AIM)
static voidcpu_idle_powerx(sbintime_t);
-static voidcpu_idle_power9(sbintime_t sbt);
+static voidcpu_idle_power9(sbintime_t);
#endif
struct cputab {
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svn commit: r334264 - head/sys/powerpc/booke
Author: jhibbits
Date: Mon May 28 00:19:08 2018
New Revision: 334264
URL: https://svnweb.freebsd.org/changeset/base/334264
Log:
Print the full-width pointer values in hex.
PRI0ptrX is used to print a zero-padded hex value of the architecture's
bitness,
so on 64-bit architectures it'll print the full 64 bit address.
Modified:
head/sys/powerpc/booke/pmap.c
Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c Sun May 27 23:52:41 2018
(r334263)
+++ head/sys/powerpc/booke/pmap.c Mon May 28 00:19:08 2018
(r334264)
@@ -1824,9 +1824,9 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_o
virtual_avail += PAGE_SIZE;
copy_page_dst_va = virtual_avail;
virtual_avail += PAGE_SIZE;
- debugf("zero_page_va = 0x%08x\n", zero_page_va);
- debugf("copy_page_src_va = 0x%08x\n", copy_page_src_va);
- debugf("copy_page_dst_va = 0x%08x\n", copy_page_dst_va);
+ debugf("zero_page_va = 0x%"PRI0ptrX"\n", zero_page_va);
+ debugf("copy_page_src_va = 0x"PRI0ptrX"\n", copy_page_src_va);
+ debugf("copy_page_dst_va = 0x"PRI0ptrX"\n", copy_page_dst_va);
/* Initialize page zero/copy mutexes. */
mtx_init(&zero_page_mutex, "mmu_booke_zero_page", NULL, MTX_DEF);
@@ -1835,15 +1835,15 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_o
/* Allocate KVA space for ptbl bufs. */
ptbl_buf_pool_vabase = virtual_avail;
virtual_avail += PTBL_BUFS * PTBL_PAGES * PAGE_SIZE;
- debugf("ptbl_buf_pool_vabase = 0x%08x end = 0x%08x\n",
+ debugf("ptbl_buf_pool_vabase = 0x"PRI0ptrX" end = 0x"PRI0ptrX"\n",
ptbl_buf_pool_vabase, virtual_avail);
/* Calculate corresponding physical addresses for the kernel region. */
phys_kernelend = kernload + kernsize;
debugf("kernel image and allocated data:\n");
debugf(" kernload= 0x%09llx\n", (uint64_t)kernload);
- debugf(" kernstart = 0x%08x\n", kernstart);
- debugf(" kernsize= 0x%08x\n", kernsize);
+ debugf(" kernstart = 0x"PRI0ptrX"\n", kernstart);
+ debugf(" kernsize= 0x"PRI0ptrX"\n", kernsize);
if (sizeof(phys_avail) / sizeof(phys_avail[0]) < availmem_regions_sz)
panic("mmu_booke_bootstrap: phys_avail too small");
@@ -2263,7 +2263,7 @@ mmu_booke_kremove(mmu_t mmu, vm_offset_t va)
{
pte_t *pte;
- CTR2(KTR_PMAP,"%s: s (va = 0x%08x)\n", __func__, va);
+ CTR2(KTR_PMAP,"%s: s (va = 0x"PRI0ptrX")\n", __func__, va);
KASSERT(((va >= VM_MIN_KERNEL_ADDRESS) &&
(va <= VM_MAX_KERNEL_ADDRESS)),
@@ -2720,7 +2720,7 @@ mmu_booke_activate(mmu_t mmu, struct thread *td)
pmap = &td->td_proc->p_vmspace->vm_pmap;
- CTR5(KTR_PMAP, "%s: s (td = %p, proc = '%s', id = %d, pmap = 0x%08x)",
+ CTR5(KTR_PMAP, "%s: s (td = %p, proc = '%s', id = %d, pmap =
0x"PRI0ptrX")",
__func__, td, td->td_proc->p_comm, td->td_proc->p_pid, pmap);
KASSERT((pmap != kernel_pmap), ("mmu_booke_activate: kernel_pmap!"));
@@ -2756,7 +2756,7 @@ mmu_booke_deactivate(mmu_t mmu, struct thread *td)
pmap = &td->td_proc->p_vmspace->vm_pmap;
- CTR5(KTR_PMAP, "%s: td=%p, proc = '%s', id = %d, pmap = 0x%08x",
+ CTR5(KTR_PMAP, "%s: td=%p, proc = '%s', id = %d, pmap = 0x"PRI0ptrX,
__func__, td, td->td_proc->p_comm, td->td_proc->p_pid, pmap);
td->td_pcb->pcb_cpu.booke.dbcr0 = mfspr(SPR_DBCR0);
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svn commit: r334266 - head/sys/powerpc/powernv
Author: jhibbits
Date: Mon May 28 01:59:48 2018
New Revision: 334266
URL: https://svnweb.freebsd.org/changeset/base/334266
Log:
Make ALT_BREAK_TO_DEBUGGER work with OPAL console
Match other consoles by using the higher level cngetc() in the interrupt
handler, so that kdb_alt_break() can check for console break.
Modified:
head/sys/powerpc/powernv/opal_console.c
Modified: head/sys/powerpc/powernv/opal_console.c
==
--- head/sys/powerpc/powernv/opal_console.c Mon May 28 01:58:49 2018
(r334265)
+++ head/sys/powerpc/powernv/opal_console.c Mon May 28 01:59:48 2018
(r334266)
@@ -475,11 +475,10 @@ uart_opal_intr(void *v)
{
struct uart_opal_softc *sc = v;
struct tty *tp = sc->tp;
- unsigned char c;
- int len;
+ int c;
tty_lock(tp);
- while ((len = uart_opal_get(sc, &c, 1)) > 0)
+ while ((c = uart_opal_cngetc(NULL)) > 0)
ttydisc_rint(tp, c, 0);
ttydisc_rint_done(tp);
tty_unlock(tp);
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svn commit: r334365 - head/sys/dev/pci
Author: jhibbits
Date: Wed May 30 02:41:47 2018
New Revision: 334365
URL: https://svnweb.freebsd.org/changeset/base/334365
Log:
Restrict PCIe maxslots to 0, instead of PCI_SLOTMAX
Summary:
PCIe only permits 1 device on an endpoint, so some devices ignore the device
part of B:D:F probing. Although ARI likely fixes this, not all platforms
support ARI completely or correctly, so some devices end up showing up 32
times on the bus.
This was found during bringup of POWER9/Talos, and has been tested on POWER9
and POWER8 hardware.
Reviewed by: leitao
Differential Revision: https://reviews.freebsd.org/D15461
Modified:
head/sys/dev/pci/pci_pci.c
Modified: head/sys/dev/pci/pci_pci.c
==
--- head/sys/dev/pci/pci_pci.c Wed May 30 02:26:36 2018(r334364)
+++ head/sys/dev/pci/pci_pci.c Wed May 30 02:41:47 2018(r334365)
@@ -2545,6 +2545,20 @@ pcib_enable_ari(struct pcib_softc *sc, uint32_t pcie_p
int
pcib_maxslots(device_t dev)
{
+ uint32_t pcie_pos;
+ uint16_t val;
+
+ /*
+* If this is a PCIe rootport or downstream switch port, there's only
+* one slot permitted.
+*/
+ if (pci_find_cap(dev, PCIY_EXPRESS, &pcie_pos) == 0) {
+ val = pci_read_config(dev, pcie_pos + PCIER_FLAGS, 2);
+ val &= PCIEM_FLAGS_TYPE;
+ if (val == PCIEM_TYPE_ROOT_PORT ||
+ val == PCIEM_TYPE_DOWNSTREAM_PORT)
+ return (0);
+ }
return (PCI_SLOTMAX);
}
@@ -2558,7 +2572,7 @@ pcib_ari_maxslots(device_t dev)
if (sc->flags & PCIB_ENABLE_ARI)
return (PCIE_ARI_SLOTMAX);
else
- return (PCI_SLOTMAX);
+ return (pcib_maxslots(dev));
}
static int
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svn commit: r334366 - head/sys/powerpc/powernv
Author: jhibbits
Date: Wed May 30 02:47:23 2018
New Revision: 334366
URL: https://svnweb.freebsd.org/changeset/base/334366
Log:
Cache the phandle of the PCI node in opal_pci_attach
Simple cleanup, no functional change. This is related to the fixups needed
for POWER9 support.
Modified:
head/sys/powerpc/powernv/opal_pci.c
Modified: head/sys/powerpc/powernv/opal_pci.c
==
--- head/sys/powerpc/powernv/opal_pci.c Wed May 30 02:41:47 2018
(r334365)
+++ head/sys/powerpc/powernv/opal_pci.c Wed May 30 02:47:23 2018
(r334366)
@@ -200,25 +200,27 @@ opalpci_attach(device_t dev)
{
struct opalpci_softc *sc;
cell_t id[2], m64window[6], npe;
+ phandle_t node;
int i, err;
uint64_t maxmem;
uint64_t entries;
int rid;
sc = device_get_softc(dev);
+ node = ofw_bus_get_node(dev);
- switch (OF_getproplen(ofw_bus_get_node(dev), "ibm,opal-phbid")) {
+ switch (OF_getproplen(node, "ibm,opal-phbid")) {
case 8:
- OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-phbid", id, 8);
+ OF_getencprop(node, "ibm,opal-phbid", id, 8);
sc->phb_id = ((uint64_t)id[0] << 32) | id[1];
break;
case 4:
- OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-phbid", id, 4);
+ OF_getencprop(node, "ibm,opal-phbid", id, 4);
sc->phb_id = id[0];
break;
default:
device_printf(dev, "PHB ID property had wrong length (%zd)\n",
- OF_getproplen(ofw_bus_get_node(dev), "ibm,opal-phbid"));
+ OF_getproplen(node, "ibm,opal-phbid"));
return (ENXIO);
}
@@ -264,8 +266,7 @@ opalpci_attach(device_t dev)
/*
* Turn on MMIO, mapped to PE 1
*/
- if (OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-num-pes", &npe, 4)
- != 4)
+ if (OF_getencprop(node, "ibm,opal-num-pes", &npe, 4) != 4)
npe = 1;
for (i = 0; i < npe; i++) {
err = opal_call(OPAL_PCI_MAP_PE_MMIO_WINDOW, sc->phb_id,
@@ -275,7 +276,7 @@ opalpci_attach(device_t dev)
}
/* XXX: multiple M64 windows? */
- if (OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-m64-window",
+ if (OF_getencprop(node, "ibm,opal-m64-window",
m64window, sizeof(m64window)) == sizeof(m64window)) {
opal_call(OPAL_PCI_PHB_MMIO_ENABLE, sc->phb_id,
OPAL_M64_WINDOW_TYPE, 0, 0);
@@ -342,9 +343,9 @@ opalpci_attach(device_t dev)
* Get MSI properties
*/
sc->msi_vmem = NULL;
- if (OF_getproplen(ofw_bus_get_node(dev), "ibm,opal-msi-ranges") > 0) {
+ if (OF_getproplen(node, "ibm,opal-msi-ranges") > 0) {
cell_t msi_ranges[2];
- OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-msi-ranges",
+ OF_getencprop(node, "ibm,opal-msi-ranges",
msi_ranges, sizeof(msi_ranges));
sc->msi_base = msi_ranges[0];
@@ -352,7 +353,7 @@ opalpci_attach(device_t dev)
msi_ranges[1], 1, 16, M_BESTFIT | M_WAITOK);
sc->base_msi_irq = powerpc_register_pic(dev,
- OF_xref_from_node(ofw_bus_get_node(dev)),
+ OF_xref_from_node(node),
msi_ranges[0] + msi_ranges[1], 0, FALSE);
if (bootverbose)
@@ -377,7 +378,7 @@ opalpci_attach(device_t dev)
/*
* OPAL stores 64-bit BARs in a special property rather than "ranges"
*/
- if (OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-m64-window",
+ if (OF_getencprop(node, "ibm,opal-m64-window",
m64window, sizeof(m64window)) == sizeof(m64window)) {
struct ofw_pci_range *rp;
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svn commit: r334367 - head/sys/powerpc/powernv
Author: jhibbits
Date: Wed May 30 03:00:57 2018
New Revision: 334367
URL: https://svnweb.freebsd.org/changeset/base/334367
Log:
Make opal_pci driver work with POWER9
Summary:
Coupled with r334365, this makes PCI work on POWER9. There is still more to
do to fully exploit the hardware capabilities, but this is sufficient to
enable USB and ethernet controllers on a POWER9 Talos II system.
Reviewed by: nwhitehorn, leitao
Differential Revision: https://reviews.freebsd.org/D15566
Modified:
head/sys/powerpc/powernv/opal_pci.c
Modified: head/sys/powerpc/powernv/opal_pci.c
==
--- head/sys/powerpc/powernv/opal_pci.c Wed May 30 02:47:23 2018
(r334366)
+++ head/sys/powerpc/powernv/opal_pci.c Wed May 30 03:00:57 2018
(r334367)
@@ -60,7 +60,7 @@ __FBSDID("$FreeBSD$");
#include "opal.h"
#defineOPAL_PCI_TCE_MAX_ENTRIES(1024*1024UL)
-#defineOPAL_PCI_TCE_SEG_SIZE (16*1024*1024UL)
+#defineOPAL_PCI_TCE_DEFAULT_SEG_SIZE (16*1024*1024UL)
#defineOPAL_PCI_TCE_R (1UL << 0)
#defineOPAL_PCI_TCE_W (1UL << 1)
#definePHB3_TCE_KILL_INVAL_ALL (1UL << 63)
@@ -195,15 +195,52 @@ pci_phb3_tce_invalidate_entire(struct opalpci_softc *s
mb();
}
+/* Simple function to round to a power of 2 */
+static uint64_t
+round_pow2(uint64_t val)
+{
+
+ return (1 << (flsl(val + (val - 1)) - 1));
+}
+
+/*
+ * Starting with skiboot 5.10 PCIe nodes have a new property,
+ * "ibm,supported-tce-sizes", to denote the TCE sizes available. This allows
us
+ * to avoid hard-coding the maximum TCE size allowed, and instead provide a
sane
+ * default (however, the "sane" default, which works for all targets, is 64k,
+ * limiting us to 64GB if we have 1M entries.
+ */
+static uint64_t
+max_tce_size(device_t dev)
+{
+ phandle_t node;
+ cell_t sizes[64]; /* Property is a list of bit-widths, up to 64-bits */
+ int count;
+
+ node = ofw_bus_get_node(dev);
+
+ count = OF_getencprop(node, "ibm,supported-tce-sizes",
+ sizes, sizeof(sizes));
+ if (count < sizeof(cell_t))
+ return OPAL_PCI_TCE_DEFAULT_SEG_SIZE;
+
+ count /= sizeof(cell_t);
+
+ return (1ULL << sizes[count - 1]);
+}
+
static int
opalpci_attach(device_t dev)
{
struct opalpci_softc *sc;
- cell_t id[2], m64window[6], npe;
+ cell_t id[2], m64ranges[2], m64window[6], npe;
phandle_t node;
int i, err;
uint64_t maxmem;
uint64_t entries;
+ uint64_t tce_size;
+ uint64_t tce_tbl_size;
+ int m64bar;
int rid;
sc = device_get_softc(dev);
@@ -236,6 +273,7 @@ opalpci_attach(device_t dev)
return (ENXIO);
}
+#if 0
/*
* Reset PCI IODA table
*/
@@ -245,11 +283,32 @@ opalpci_attach(device_t dev)
device_printf(dev, "IODA table reset failed: %d\n", err);
return (ENXIO);
}
- while ((err = opal_call(OPAL_PCI_POLL, sc->phb_id)) > 0)
- DELAY(1000*(err + 1)); /* Returns expected delay in ms */
+ err = opal_call(OPAL_PCI_RESET, sc->phb_id, OPAL_RESET_PHB_COMPLETE,
+ 1);
if (err < 0) {
+ device_printf(dev, "PHB reset failed: %d\n", err);
+ return (ENXIO);
+ }
+ if (err > 0) {
+ while ((err = opal_call(OPAL_PCI_POLL, sc->phb_id)) > 0) {
+ DELAY(1000*(err + 1)); /* Returns expected delay in ms
*/
+ }
+ }
+ if (err < 0) {
device_printf(dev, "WARNING: PHB IODA reset poll failed: %d\n",
err);
}
+ err = opal_call(OPAL_PCI_RESET, sc->phb_id, OPAL_RESET_PHB_COMPLETE,
+ 0);
+ if (err < 0) {
+ device_printf(dev, "PHB reset failed: %d\n", err);
+ return (ENXIO);
+ }
+ if (err > 0) {
+ while ((err = opal_call(OPAL_PCI_POLL, sc->phb_id)) > 0) {
+ DELAY(1000*(err + 1)); /* Returns expected delay in ms
*/
+ }
+ }
+#endif
/*
* Map all devices on the bus to partitionable endpoint one until
@@ -275,49 +334,58 @@ opalpci_attach(device_t dev)
device_printf(dev, "MMIO %d map failed: %d\n", i, err);
}
+ if (OF_getencprop(node, "ibm,opal-available-m64-ranges",
+ m64ranges, sizeof(m64ranges)) == sizeof(m64ranges))
+ m64bar = m64ranges[0];
+ else
+ m64bar = 0;
+
/* XXX: multiple M64 windows? */
if (OF_getencprop(node, "ibm,opal-m64-window",
m64window, sizeof(m64window)) == sizeof(m64window)) {
opal_call(OPAL_PCI_PHB_MMIO_ENABLE, sc->phb_id,
- OPAL_M64_WINDOW_TYPE, 0, 0);
+ OPAL_M64_WINDOW_TYPE, m64bar, 0);
svn commit: r334370 - head/sys/cddl/dev/dtrace/powerpc
Author: jhibbits
Date: Wed May 30 03:48:27 2018
New Revision: 334370
URL: https://svnweb.freebsd.org/changeset/base/334370
Log:
Protect dtrace_getpcstack() from a NULL stack pointer in a trap frame
Found when trying to use lockstat on a POWER9, the stack pointer (r1) could
be NULL, and result in a NULL pointer dereference, crashing the kernel.
Modified:
head/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
Modified: head/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c
==
--- head/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c Wed May 30 03:40:02
2018(r334369)
+++ head/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c Wed May 30 03:48:27
2018(r334370)
@@ -98,6 +98,7 @@ static __inline uintptr_t
dtrace_next_sp(uintptr_t sp)
{
vm_offset_t callpc;
+ uintptr_t *r1;
struct trapframe *frame;
#ifdef __powerpc64__
@@ -114,7 +115,10 @@ dtrace_next_sp(uintptr_t sp)
callpc + OFFSET == (vm_offset_t) &asttrapexit)) {
/* Access the trap frame */
frame = (struct trapframe *)(sp + FRAME_OFFSET);
- return (*(uintptr_t *)(frame->fixreg[1]));
+ r1 = (uintptr_t *)frame->fixreg[1];
+ if (r1 == NULL)
+ return (0);
+ return (*r1);
}
return (*(uintptr_t*)sp);
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Re: svn commit: r334367 - head/sys/powerpc/powernv
On Tue, May 29, 2018 at 10:00 PM, Justin Hibbits wrote: > Author: jhibbits > Date: Wed May 30 03:00:57 2018 > New Revision: 334367 > URL: https://svnweb.freebsd.org/changeset/base/334367 > > Log: > Make opal_pci driver work with POWER9 > > Summary: > Coupled with r334365, this makes PCI work on POWER9. There is still more to > do to fully exploit the hardware capabilities, but this is sufficient to > enable USB and ethernet controllers on a POWER9 Talos II system. As mmacy pointed out, it's PCIe. POWER9 has no PCI controller, only PCIe. - Justin ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r334365 - head/sys/dev/pci
On Wed, May 30, 2018 at 4:42 AM, Peter Grehan wrote: >>PCIe only permits 1 device on an endpoint, so some devices ignore the >> device >>part of B:D:F probing. Although ARI likely fixes this, not all >> platforms >>support ARI completely or correctly, so some devices end up showing up >> 32 >>times on the bus. > > > I think this might have broken bhyve - a fake PCIe capability is put on the > root port so that guests will use MSI/MSI-x, but otherwise it looks like > parallel PCI. Not exactly spec-compliant, but then neither is most of the > world of PCI/PCIe. > > It may be worth #ifdef'ing this with powerpc. > > later, > > Peter. I can special case i386 and amd64, but this change should (eventually) remove the majority of the current special case overrides for alternative architectures. I think it'd be better to have a bhyve root bridge driver that itself overrides pci_maxslots(), and have the 'compliant' path be the common. Thoughts? - Justin ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r334365 - head/sys/dev/pci
Hi Peter, On Wed, May 30, 2018, 15:44 Peter Grehan wrote: > Hi Nathan, > > > There are a ton of ARM boards that need this too. You can find one-off > > hacks all through the tree and one of the nice things about this change > > is that all of those can be consolidated/removed now. If we are going to > > have some #ifdef and special cases, it would be better to make them for > > bhyve. > > Sure, but there are multiple orders of magnitude more users of bhyve > than power9/affected ARM boards, so can a amd64/i386 ifdef be put there > until that work is done ? > I can add one either tonight or tomorrow. If bhyve has its own attachment id, it is trivial to add a special case on it quickly, too. > later, > > Peter. > - Justin > ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r334365 - head/sys/dev/pci
On Wed, May 30, 2018, 15:55 Peter Grehan wrote: > >> If bhyve has its own attachment id, it is trivial > >> to add a special case on it quickly, too. > > > > vendor_id -- 0x1275 > > Actually, this can also be AMD. A better check would be if the system > is running virtualized. > I'm thinking more of a root complex driver. If there is something characterized for bhyve, we can just make a driver that had the override. > later, > > Peter. > - Justin > ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r334407 - head/sys/dev/pci
Author: jhibbits
Date: Wed May 30 22:39:41 2018
New Revision: 334407
URL: https://svnweb.freebsd.org/changeset/base/334407
Log:
Only conform to PCIe spec of 1 device per bus on !x86
bhyve's root PCI complex shows up as PCIe, but behaves as traditional PCI.
Until that is special cased in a root complex driver, leave x86 as it was.
Requested by: grehan
Modified:
head/sys/dev/pci/pci_pci.c
Modified: head/sys/dev/pci/pci_pci.c
==
--- head/sys/dev/pci/pci_pci.c Wed May 30 22:36:09 2018(r334406)
+++ head/sys/dev/pci/pci_pci.c Wed May 30 22:39:41 2018(r334407)
@@ -2545,6 +2545,7 @@ pcib_enable_ari(struct pcib_softc *sc, uint32_t pcie_p
int
pcib_maxslots(device_t dev)
{
+#if !defined(__amd64__) && !defined(__i386__)
uint32_t pcie_pos;
uint16_t val;
@@ -2559,6 +2560,7 @@ pcib_maxslots(device_t dev)
val == PCIEM_TYPE_DOWNSTREAM_PORT)
return (0);
}
+#endif
return (PCI_SLOTMAX);
}
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svn commit: r334417 - head/sys/powerpc/powernv
Author: jhibbits
Date: Thu May 31 04:11:40 2018
New Revision: 334417
URL: https://svnweb.freebsd.org/changeset/base/334417
Log:
Remove a debug printf from opal_pci driver
Modified:
head/sys/powerpc/powernv/opal_pci.c
Modified: head/sys/powerpc/powernv/opal_pci.c
==
--- head/sys/powerpc/powernv/opal_pci.c Thu May 31 02:58:08 2018
(r334416)
+++ head/sys/powerpc/powernv/opal_pci.c Thu May 31 04:11:40 2018
(r334417)
@@ -364,7 +364,6 @@ opalpci_attach(device_t dev)
maxmem = roundup2(powerpc_ptob(Maxmem), tce_size);
entries = round_pow2(maxmem / tce_size);
tce_tbl_size = max(entries * sizeof(uint64_t), 4096);
- device_printf(dev, "Entries: %ld, tce_size: %#lx\n", entries, tce_size);
if (entries > OPAL_PCI_TCE_MAX_ENTRIES)
panic("POWERNV supports only %jdGB of memory space\n",
(uintmax_t)((OPAL_PCI_TCE_MAX_ENTRIES * tce_size) >> 30));
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svn commit: r334488 - head/sys/powerpc/include
Author: jhibbits
Date: Fri Jun 1 16:31:05 2018
New Revision: 334488
URL: https://svnweb.freebsd.org/changeset/base/334488
Log:
Unbreak 32-bit binaries on powerpc64
Recently a change was made which broke loading 32-bit binaries on powerpc64,
with an assertion in ld-elf32.so.1:
ld-elf32.so.1: assert failed:
/usr/local/poudriere/jails/ppc64/usr/src/libexec/rtld-elf/rtld.c:390
It turns out Elf32_AuxInfo was broken for a very long time on powerpc64, as
it uses long and pointers, which are both 64 bits on powerpc64, and only
manifested with the recent work on auxargs.
Modified:
head/sys/powerpc/include/elf.h
Modified: head/sys/powerpc/include/elf.h
==
--- head/sys/powerpc/include/elf.h Fri Jun 1 16:23:47 2018
(r334487)
+++ head/sys/powerpc/include/elf.h Fri Jun 1 16:31:05 2018
(r334488)
@@ -69,9 +69,13 @@
typedef struct { /* Auxiliary vector entry on initial stack */
int a_type; /* Entry type. */
union {
+#ifdef __powerpc64__
+ int a_val; /* Integer value */
+#else
longa_val; /* Integer value. */
void*a_ptr; /* Address. */
void(*a_fcn)(void); /* Function pointer (not used). */
+#endif
} a_un;
} Elf32_Auxinfo;
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svn commit: r334498 - head/sys/powerpc/include
Author: jhibbits Date: Fri Jun 1 21:37:20 2018 New Revision: 334498 URL: https://svnweb.freebsd.org/changeset/base/334498 Log: Increase powerpc64 KVA from ~7.25GB to 32GB This will let us use much more KVA for ZFS ARC where needed. This may be incresed in the future if memory requirements increase. Discussed with: nwhitehorn Modified: head/sys/powerpc/include/vmparam.h Modified: head/sys/powerpc/include/vmparam.h == --- head/sys/powerpc/include/vmparam.h Fri Jun 1 21:24:27 2018 (r334497) +++ head/sys/powerpc/include/vmparam.h Fri Jun 1 21:37:20 2018 (r334498) @@ -107,7 +107,7 @@ #ifdef __powerpc64__ #defineVM_MIN_KERNEL_ADDRESS 0xe000UL -#defineVM_MAX_KERNEL_ADDRESS 0xe001c7ffUL +#defineVM_MAX_KERNEL_ADDRESS 0xe007UL #defineVM_MAX_SAFE_KERNEL_ADDRESS VM_MAX_KERNEL_ADDRESS #endif ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r334535 - in head: lib/libc/sys sys/powerpc/include sys/powerpc/powerpc
Author: jhibbits
Date: Sat Jun 2 19:17:11 2018
New Revision: 334535
URL: https://svnweb.freebsd.org/changeset/base/334535
Log:
Added ptrace support for reading/writing powerpc VSX registers
Summary:
Added ptrace support for getting/setting the remaining part of the VSX
registers
(the part that's not already covered by FPR or VR registers).
This is necessary to add support for VSX registers in debuggers.
Submitted by: Luis Pires
Differential Revision: https://reviews.freebsd.org/D15458
Modified:
head/lib/libc/sys/ptrace.2
head/sys/powerpc/include/fpu.h
head/sys/powerpc/include/ptrace.h
head/sys/powerpc/powerpc/fpu.c
head/sys/powerpc/powerpc/ptrace_machdep.c
Modified: head/lib/libc/sys/ptrace.2
==
--- head/lib/libc/sys/ptrace.2 Sat Jun 2 18:03:35 2018(r334534)
+++ head/lib/libc/sys/ptrace.2 Sat Jun 2 19:17:11 2018(r334535)
@@ -2,7 +2,7 @@
.\"$NetBSD: ptrace.2,v 1.2 1995/02/27 12:35:37 cgd Exp $
.\"
.\" This file is in the public domain.
-.Dd May 22, 2018
+.Dd June 2, 2018
.Dt PTRACE 2
.Os
.Sh NAME
@@ -934,6 +934,24 @@ argument is ignored.
Set the thread's
.Dv ALTIVEC
machine state from the buffer pointed to by
+.Fa addr .
+.Pp
+The
+.Fa data
+argument is ignored.
+.It Dv PT_GETVSRREGS
+Return doubleword 1 of the thread's
+.Dv VSX
+registers VSR0-VSR31 in the buffer pointed to by
+.Fa addr .
+.Pp
+The
+.Fa data
+argument is ignored.
+.It Dv PT_SETVSRREGS
+Set doubleword 1 of the thread's
+.Dv VSX
+registers VSR0-VSR31 from the buffer pointed to by
.Fa addr .
.Pp
The
Modified: head/sys/powerpc/include/fpu.h
==
--- head/sys/powerpc/include/fpu.h Sat Jun 2 18:03:35 2018
(r334534)
+++ head/sys/powerpc/include/fpu.h Sat Jun 2 19:17:11 2018
(r334535)
@@ -74,6 +74,7 @@
voidenable_fpu(struct thread *);
voidsave_fpu(struct thread *);
+voidsave_fpu_nodrop(struct thread *);
#endif /* _KERNEL */
Modified: head/sys/powerpc/include/ptrace.h
==
--- head/sys/powerpc/include/ptrace.h Sat Jun 2 18:03:35 2018
(r334534)
+++ head/sys/powerpc/include/ptrace.h Sat Jun 2 19:17:11 2018
(r334535)
@@ -39,5 +39,7 @@
#define PT_GETVRREGS (PT_FIRSTMACH + 0)
#define PT_SETVRREGS (PT_FIRSTMACH + 1)
+#define PT_GETVSRREGS (PT_FIRSTMACH + 2)
+#define PT_SETVSRREGS (PT_FIRSTMACH + 3)
#endif
Modified: head/sys/powerpc/powerpc/fpu.c
==
--- head/sys/powerpc/powerpc/fpu.c Sat Jun 2 18:03:35 2018
(r334534)
+++ head/sys/powerpc/powerpc/fpu.c Sat Jun 2 19:17:11 2018
(r334535)
@@ -45,6 +45,60 @@ __FBSDID("$FreeBSD$");
#include
#include
+static void
+save_fpu_int(struct thread *td)
+{
+ int msr;
+ struct pcb *pcb;
+
+ pcb = td->td_pcb;
+
+ /*
+* Temporarily re-enable floating-point during the save
+*/
+ msr = mfmsr();
+ if (pcb->pcb_flags & PCB_VSX)
+ mtmsr(msr | PSL_FP | PSL_VSX);
+ else
+ mtmsr(msr | PSL_FP);
+
+ /*
+* Save the floating-point registers and FPSCR to the PCB
+*/
+ if (pcb->pcb_flags & PCB_VSX) {
+ #define SFP(n) __asm ("stxvw4x " #n ", 0,%0" \
+ :: "b"(&pcb->pcb_fpu.fpr[n]));
+ SFP(0); SFP(1); SFP(2); SFP(3);
+ SFP(4); SFP(5); SFP(6); SFP(7);
+ SFP(8); SFP(9); SFP(10);SFP(11);
+ SFP(12);SFP(13);SFP(14);SFP(15);
+ SFP(16);SFP(17);SFP(18);SFP(19);
+ SFP(20);SFP(21);SFP(22);SFP(23);
+ SFP(24);SFP(25);SFP(26);SFP(27);
+ SFP(28);SFP(29);SFP(30);SFP(31);
+ #undef SFP
+ } else {
+ #define SFP(n) __asm ("stfd " #n ", 0(%0)" \
+ :: "b"(&pcb->pcb_fpu.fpr[n]));
+ SFP(0); SFP(1); SFP(2); SFP(3);
+ SFP(4); SFP(5); SFP(6); SFP(7);
+ SFP(8); SFP(9); SFP(10);SFP(11);
+ SFP(12);SFP(13);SFP(14);SFP(15);
+ SFP(16);SFP(17);SFP(18);SFP(19);
+ SFP(20);SFP(21);SFP(22);SFP(23);
+ SFP(24);SFP(25);SFP(26);SFP(27);
+ SFP(28);SFP(29);SFP(30);SFP(31);
+ #undef SFP
+ }
+ __asm __volatile ("mffs 0; stfd 0,0(%0)" :: "b"(&pcb->pcb_fpu.fpscr));
+
+ /*
+* Disable fl
svn commit: r334538 - in head: sys/powerpc/powerpc sys/sys usr.bin/gcore
Author: jhibbits
Date: Sat Jun 2 20:28:58 2018
New Revision: 334538
URL: https://svnweb.freebsd.org/changeset/base/334538
Log:
Included VSX registers in powerpc core dumps
Summary: Included VSX registers in powerpc core dumps (both kernel and gcore)
Submitted by: Luis Pires
Differential Revision: https://reviews.freebsd.org/D15512
Modified:
head/sys/powerpc/powerpc/elf32_machdep.c
head/sys/powerpc/powerpc/elf64_machdep.c
head/sys/sys/elf_common.h
head/usr.bin/gcore/elfcore.c
Modified: head/sys/powerpc/powerpc/elf32_machdep.c
==
--- head/sys/powerpc/powerpc/elf32_machdep.cSat Jun 2 20:14:43 2018
(r334537)
+++ head/sys/powerpc/powerpc/elf32_machdep.cSat Jun 2 20:28:58 2018
(r334538)
@@ -52,6 +52,7 @@
#include
#include
+#include
#include
#include
#include
@@ -171,19 +172,44 @@ elf32_dump_thread(struct thread *td, void *dst, size_t
{
size_t len;
struct pcb *pcb;
+ uint64_t vshr[32];
+ uint64_t *vsr_dw1;
+ int vsr_idx;
len = 0;
pcb = td->td_pcb;
+
if (pcb->pcb_flags & PCB_VEC) {
save_vec_nodrop(td);
if (dst != NULL) {
len += elf32_populate_note(NT_PPC_VMX,
- &pcb->pcb_vec, dst,
+ &pcb->pcb_vec, (char *)dst + len,
sizeof(pcb->pcb_vec), NULL);
} else
len += elf32_populate_note(NT_PPC_VMX, NULL, NULL,
sizeof(pcb->pcb_vec), NULL);
}
+
+ if (pcb->pcb_flags & PCB_VSX) {
+ save_fpu_nodrop(td);
+ if (dst != NULL) {
+ /*
+* Doubleword 0 of VSR0-VSR31 overlap with FPR0-FPR31
and
+* VSR32-VSR63 overlap with VR0-VR31, so we only copy
+* the non-overlapping data, which is doubleword 1 of
VSR0-VSR31.
+*/
+ for (vsr_idx = 0; vsr_idx < nitems(vshr); vsr_idx++) {
+ vsr_dw1 = (uint64_t
*)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2];
+ vshr[vsr_idx] = *vsr_dw1;
+ }
+ len += elf32_populate_note(NT_PPC_VSX,
+ vshr, (char *)dst + len,
+ sizeof(vshr), NULL);
+ } else
+ len += elf32_populate_note(NT_PPC_VSX, NULL, NULL,
+ sizeof(vshr), NULL);
+ }
+
*off = len;
}
Modified: head/sys/powerpc/powerpc/elf64_machdep.c
==
--- head/sys/powerpc/powerpc/elf64_machdep.cSat Jun 2 20:14:43 2018
(r334537)
+++ head/sys/powerpc/powerpc/elf64_machdep.cSat Jun 2 20:28:58 2018
(r334538)
@@ -48,6 +48,7 @@
#include
#include
+#include
#include
#include
@@ -234,19 +235,44 @@ elf64_dump_thread(struct thread *td, void *dst, size_t
{
size_t len;
struct pcb *pcb;
+ uint64_t vshr[32];
+ uint64_t *vsr_dw1;
+ int vsr_idx;
len = 0;
pcb = td->td_pcb;
+
if (pcb->pcb_flags & PCB_VEC) {
save_vec_nodrop(td);
if (dst != NULL) {
len += elf64_populate_note(NT_PPC_VMX,
- &pcb->pcb_vec, dst,
+ &pcb->pcb_vec, (char *)dst + len,
sizeof(pcb->pcb_vec), NULL);
} else
len += elf64_populate_note(NT_PPC_VMX, NULL, NULL,
sizeof(pcb->pcb_vec), NULL);
}
+
+ if (pcb->pcb_flags & PCB_VSX) {
+ save_fpu_nodrop(td);
+ if (dst != NULL) {
+ /*
+* Doubleword 0 of VSR0-VSR31 overlap with FPR0-FPR31
and
+* VSR32-VSR63 overlap with VR0-VR31, so we only copy
+* the non-overlapping data, which is doubleword 1 of
VSR0-VSR31.
+*/
+ for (vsr_idx = 0; vsr_idx < nitems(vshr); vsr_idx++) {
+ vsr_dw1 = (uint64_t
*)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2];
+ vshr[vsr_idx] = *vsr_dw1;
+ }
+ len += elf64_populate_note(NT_PPC_VSX,
+ vshr, (char *)dst + len,
+ sizeof(vshr), NULL);
+ } else
+ len += elf64_populate_note(NT_PPC_VSX, NULL, NULL,
+ sizeof(vshr), NULL);
+ }
+
*off = len;
}
Modified: head/sys/sys/elf_common.h
==
--- head/sys/sys/elf_common.h Sat
svn commit: r334550 - head/sys/cddl/dev/profile
Author: jhibbits Date: Sun Jun 3 03:53:11 2018 New Revision: 334550 URL: https://svnweb.freebsd.org/changeset/base/334550 Log: Revert r326083, it doesn't behave as expected. Even though there do appear to be more artificial frames, with 12, stack traces no longer list at all. Revert until a better, more stable value can be determined. Modified: head/sys/cddl/dev/profile/profile.c Modified: head/sys/cddl/dev/profile/profile.c == --- head/sys/cddl/dev/profile/profile.c Sun Jun 3 02:58:53 2018 (r334549) +++ head/sys/cddl/dev/profile/profile.c Sun Jun 3 03:53:11 2018 (r334550) @@ -124,7 +124,7 @@ /* * This value is bogus just to make module compilable on powerpc */ -#definePROF_ARTIFICIAL_FRAMES 12 +#definePROF_ARTIFICIAL_FRAMES 3 #endif struct profile_probe_percpu; ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r334615 - head/usr.sbin/bsdinstall/scripts
Author: jhibbits
Date: Mon Jun 4 14:42:13 2018
New Revision: 334615
URL: https://svnweb.freebsd.org/changeset/base/334615
Log:
Set kernelname in bootconfig to the kernel file
Summary:
The kernel reads 'kernelname' to set the kern.bootfile sysctl. By setting
this,
'make installkernel' will backup the running kernel as appropriate.
Reviewed by: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D15660
Modified:
head/usr.sbin/bsdinstall/scripts/bootconfig
Modified: head/usr.sbin/bsdinstall/scripts/bootconfig
==
--- head/usr.sbin/bsdinstall/scripts/bootconfig Mon Jun 4 14:23:04 2018
(r334614)
+++ head/usr.sbin/bsdinstall/scripts/bootconfig Mon Jun 4 14:42:13 2018
(r334615)
@@ -31,7 +31,7 @@ if [ `uname -m` == powerpc ]; then
if [ "$platform" == ps3 -o "$platform" == powernv ]; then
rootpart=$(awk '{ if($2 == "/") printf("%s:%s\n", $3, $1); }'
$PATH_FSTAB)
mkdir -p $BSDINSTALL_CHROOT/boot/etc/
- echo FreeBSD=\'/kernel/kernel vfs.root.mountfrom=${rootpart}\'
> $BSDINSTALL_CHROOT/boot/etc/kboot.conf
+ echo FreeBSD=\'/kernel/kernel kernelname=/boot/kernel/kernel
vfs.root.mountfrom=${rootpart}\' > $BSDINSTALL_CHROOT/boot/etc/kboot.conf
fi
fi
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svn commit: r334618 - head/sys/vm
Author: jhibbits
Date: Mon Jun 4 15:44:17 2018
New Revision: 334618
URL: https://svnweb.freebsd.org/changeset/base/334618
Log:
Align UMA data to 128 byte cacheline size
Suggested by: mjg
Modified:
head/sys/vm/uma_int.h
Modified: head/sys/vm/uma_int.h
==
--- head/sys/vm/uma_int.h Mon Jun 4 15:17:24 2018(r334617)
+++ head/sys/vm/uma_int.h Mon Jun 4 15:44:17 2018(r334618)
@@ -176,7 +176,7 @@ struct uma_hash {
/*
* align field or structure to cache line
*/
-#if defined(__amd64__)
+#if defined(__amd64__) || defined(__powerpc64__)
#define UMA_ALIGN __aligned(128)
#else
#define UMA_ALIGN
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svn commit: r334708 - head/sys/kern
Author: jhibbits
Date: Wed Jun 6 12:57:11 2018
New Revision: 334708
URL: https://svnweb.freebsd.org/changeset/base/334708
Log:
Add a memory barrier after taking a reference on the vnode holdcnt in _vhold
This is needed to avoid a race between the VNASSERT() below, and another
thread updating the VI_FREE flag, on weakly-ordered architectures.
On a 72-thread POWER9, without this barrier a 'make -j72 buildworld' would
panic on the assert regularly.
It may be possible to use a weaker barrier, and I'll investigate that once
all stability issues are worked out on POWER9.
Modified:
head/sys/kern/vfs_subr.c
Modified: head/sys/kern/vfs_subr.c
==
--- head/sys/kern/vfs_subr.cWed Jun 6 10:46:24 2018(r334707)
+++ head/sys/kern/vfs_subr.cWed Jun 6 12:57:11 2018(r334708)
@@ -2807,6 +2807,9 @@ _vhold(struct vnode *vp, bool locked)
CTR2(KTR_VFS, "%s: vp %p", __func__, vp);
if (!locked) {
if (refcount_acquire_if_not_zero(&vp->v_holdcnt)) {
+#if !defined(__amd64__) && !defined(__i386__)
+ mb();
+#endif
VNASSERT((vp->v_iflag & VI_FREE) == 0, vp,
("_vhold: vnode with holdcnt is free"));
return;
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Re: svn commit: r334708 - head/sys/kern
On Wed, Jun 6, 2018 at 9:02 AM, Warner Losh wrote:
>
>
> On Wed, Jun 6, 2018 at 8:57 AM, Justin Hibbits wrote:
>>
>> Author: jhibbits
>> Date: Wed Jun 6 12:57:11 2018
>> New Revision: 334708
>> URL: https://svnweb.freebsd.org/changeset/base/334708
>>
>> Log:
>> Add a memory barrier after taking a reference on the vnode holdcnt in
>> _vhold
>>
>> This is needed to avoid a race between the VNASSERT() below, and another
>> thread updating the VI_FREE flag, on weakly-ordered architectures.
>>
>> On a 72-thread POWER9, without this barrier a 'make -j72 buildworld'
>> would
>> panic on the assert regularly.
>>
>> It may be possible to use a weaker barrier, and I'll investigate that
>> once
>> all stability issues are worked out on POWER9.
>>
>> Modified:
>> head/sys/kern/vfs_subr.c
>>
>> Modified: head/sys/kern/vfs_subr.c
>>
>> ==
>> --- head/sys/kern/vfs_subr.cWed Jun 6 10:46:24 2018(r334707)
>> +++ head/sys/kern/vfs_subr.cWed Jun 6 12:57:11 2018(r334708)
>> @@ -2807,6 +2807,9 @@ _vhold(struct vnode *vp, bool locked)
>> CTR2(KTR_VFS, "%s: vp %p", __func__, vp);
>> if (!locked) {
>> if (refcount_acquire_if_not_zero(&vp->v_holdcnt)) {
>> +#if !defined(__amd64__) && !defined(__i386__)
>> + mb();
>> +#endif
>> VNASSERT((vp->v_iflag & VI_FREE) == 0, vp,
>> ("_vhold: vnode with holdcnt is free"));
>> return;
>>
>
> So why isn't the refcount_acquire() enough?
>
> Warner
I'm not entirely sure. I had never seen this before, it's only
cropped up on my POWER9 system. The refcount_acquire doesn't include
a memory barrier, and mjg is reluctant to add one, since most refcount
users don't care about ordering. Adding the memory barrier appeases
the VNASSERT(). It may only be necessary for the VNASSERT(), and may
not be strictly necessary for proper operation, but I think it's
safest this way, until better performance metrics can be done.
- Justin
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svn commit: r334716 - head/sys/kern
Author: jhibbits
Date: Wed Jun 6 15:12:19 2018
New Revision: 334716
URL: https://svnweb.freebsd.org/changeset/base/334716
Log:
Revert r334708
This is the wrong place to put the barrier.
Requested by: kib,mjg
Modified:
head/sys/kern/vfs_subr.c
Modified: head/sys/kern/vfs_subr.c
==
--- head/sys/kern/vfs_subr.cWed Jun 6 15:10:11 2018(r334715)
+++ head/sys/kern/vfs_subr.cWed Jun 6 15:12:19 2018(r334716)
@@ -2807,9 +2807,6 @@ _vhold(struct vnode *vp, bool locked)
CTR2(KTR_VFS, "%s: vp %p", __func__, vp);
if (!locked) {
if (refcount_acquire_if_not_zero(&vp->v_holdcnt)) {
-#if !defined(__amd64__) && !defined(__i386__)
- mb();
-#endif
VNASSERT((vp->v_iflag & VI_FREE) == 0, vp,
("_vhold: vnode with holdcnt is free"));
return;
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svn commit: r334745 - head/usr.sbin/bsdinstall/partedit
Author: jhibbits
Date: Thu Jun 7 00:24:10 2018
New Revision: 334745
URL: https://svnweb.freebsd.org/changeset/base/334745
Log:
Add partition scheme for mpc85xx devices
Some mpc85xx devices with u-boot need MBR partitioning with a FAT boot
partition. Since the infrastructure is already in place to have a dedicated
boot partition, this adds the necessary bits to use that infrastructure with
mpc85xx boards.
Reviewed By: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D15664
Modified:
head/usr.sbin/bsdinstall/partedit/partedit_powerpc.c
Modified: head/usr.sbin/bsdinstall/partedit/partedit_powerpc.c
==
--- head/usr.sbin/bsdinstall/partedit/partedit_powerpc.cWed Jun 6
23:12:35 2018(r334744)
+++ head/usr.sbin/bsdinstall/partedit/partedit_powerpc.cThu Jun 7
00:24:10 2018(r334745)
@@ -44,7 +44,8 @@ default_scheme(void) {
if (strcmp(platform, "powermac") == 0)
return ("APM");
- if (strcmp(platform, "chrp") == 0 || strcmp(platform, "ps3") == 0)
+ if (strcmp(platform, "chrp") == 0 || strcmp(platform, "ps3") == 0 ||
+ strcmp(platform, "mpc85xx") == 0)
return ("MBR");
/* Pick GPT as a generic default */
@@ -65,6 +66,8 @@ is_scheme_bootable(const char *part_type) {
(strcmp(part_type, "MBR") == 0 || strcmp(part_type, "BSD") == 0 ||
strcmp(part_type, "GPT") == 0))
return (1);
+ if (strcmp(platform, "mpc85xx") == 0 && strcmp(part_type, "MBR") == 0)
+ return (1);
return (0);
}
@@ -91,7 +94,8 @@ bootpart_size(const char *part_type)
return (0);
if (strcmp(platform, "chrp") == 0)
return (800*1024);
- if (strcmp(platform, "ps3") == 0 || strcmp(platform, "powernv") == 0)
+ if (strcmp(platform, "ps3") == 0 || strcmp(platform, "powernv") == 0 ||
+ strcmp(platform, "mpc85xx") == 0)
return (512*1024*1024);
return (0);
}
@@ -107,7 +111,8 @@ bootpart_type(const char *scheme, const char **mountpo
return ("prep-boot");
if (strcmp(platform, "powermac") == 0)
return ("apple-boot");
- if (strcmp(platform, "powernv") == 0 || strcmp(platform, "ps3") == 0) {
+ if (strcmp(platform, "powernv") == 0 || strcmp(platform, "ps3") == 0 ||
+ strcmp(platform, "mpc85xx") == 0) {
*mountpoint = "/boot";
if (strcmp(scheme, "GPT") == 0)
return ("ms-basic-data");
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svn commit: r334754 - head/sbin/nvmecontrol
Author: jhibbits
Date: Thu Jun 7 04:02:09 2018
New Revision: 334754
URL: https://svnweb.freebsd.org/changeset/base/334754
Log:
Print Maximum Data Transfer Size as a long rather than int
PowerPC has PAGE_SIZE as a long, not an int. This causes the compiler to
throw
a format mismatch warning on this print. To work around the difference, print
it as a long instead of an int, and force the argument to a long.
Reviewed By: imp
Differential Revision: https://reviews.freebsd.org/D15653
Modified:
head/sbin/nvmecontrol/identify.c
Modified: head/sbin/nvmecontrol/identify.c
==
--- head/sbin/nvmecontrol/identify.cThu Jun 7 03:19:21 2018
(r334753)
+++ head/sbin/nvmecontrol/identify.cThu Jun 7 04:02:09 2018
(r334754)
@@ -119,7 +119,7 @@ print_controller(struct nvme_controller_data *cdata)
if (cdata->mdts == 0)
printf("Unlimited\n");
else
- printf("%d\n", PAGE_SIZE * (1 << cdata->mdts));
+ printf("%ld\n", PAGE_SIZE * (1L << cdata->mdts));
printf("Controller ID: 0x%02x\n", cdata->ctrlr_id);
printf("Version: %d.%d.%d\n",
(cdata->ver >> 16) & 0x, (cdata->ver >> 8) & 0xff,
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svn commit: r334755 - head/sbin
Author: jhibbits Date: Thu Jun 7 04:03:19 2018 New Revision: 334755 URL: https://svnweb.freebsd.org/changeset/base/334755 Log: Build nvmecontrol on powerpc64 The nvme driver is compiled for powerpc64 already, and the one fix required to build nvmecontrol on powerpc64 was fixed in r334754. Modified: head/sbin/Makefile.powerpc64 Modified: head/sbin/Makefile.powerpc64 == --- head/sbin/Makefile.powerpc64Thu Jun 7 04:02:09 2018 (r334754) +++ head/sbin/Makefile.powerpc64Thu Jun 7 04:03:19 2018 (r334755) @@ -2,3 +2,4 @@ SUBDIR += bsdlabel SUBDIR += fdisk +SUBDIR += nvmecontrol ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r334773 - in head: share/man/man4 sys/modules
Author: jhibbits
Date: Thu Jun 7 11:25:36 2018
New Revision: 334773
URL: https://svnweb.freebsd.org/changeset/base/334773
Log:
Build nvme modules for powerpc, and install man pages
NVMe builds for powerpc now, so just build modules for all powerpc targets,
and install NVMe man pages for all powerpc targets.
Modified:
head/share/man/man4/Makefile
head/sys/modules/Makefile
Modified: head/share/man/man4/Makefile
==
--- head/share/man/man4/MakefileThu Jun 7 10:58:48 2018
(r334772)
+++ head/share/man/man4/MakefileThu Jun 7 11:25:36 2018
(r334773)
@@ -888,6 +888,11 @@ _vmm.4=vmm.4
_nvram2env.4= nvram2env.4
.endif
+.if ${MACHINE_CPUARCH} == "powerpc"
+_nvd.4=nvd.4
+_nvme.4= nvme.4
+.endif
+
.if ${MACHINE_ARCH:Marmv[67]*} != "" || ${MACHINE_CPUARCH} == "aarch64"
_bcm283x_pwm.4= bcm283x_pwm.4
.endif
Modified: head/sys/modules/Makefile
==
--- head/sys/modules/Makefile Thu Jun 7 10:58:48 2018(r334772)
+++ head/sys/modules/Makefile Thu Jun 7 11:25:36 2018(r334773)
@@ -781,6 +781,8 @@ _cpufreq= cpufreq
_drm= drm
_exca= exca
_ffec= ffec
+_nvd= nvd
+_nvme= nvme
_pccard= pccard
_wi= wi
.endif
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Re: svn commit: r334814 - head/sbin/dump
On Fri, Jun 8, 2018 at 10:08 AM, Ed Maste wrote:
> On 7 June 2018 at 16:49, Kirk McKusick wrote:
>> Author: mckusick
>> Date: Thu Jun 7 20:49:01 2018
>> New Revision: 334814
>> URL: https://svnweb.freebsd.org/changeset/base/334814
>>
>> Log:
>> Ensure proper initialization of superblock.
>>
> ...
>> --- head/sbin/dump/main.c Thu Jun 7 19:57:55 2018(r334813)
>> +++ head/sbin/dump/main.c Thu Jun 7 20:49:01 2018(r334814)
>> @@ -433,6 +433,7 @@ main(int argc, char *argv[])
>> msgtail("to %s\n", tape);
>>
>> sync();
>> + sblock = NULL;
>> if ((ret = sbget(diskfd, &sblock, -1)) != 0) {
>
> sblock is initialized to NULL at the beginning of ffs_sbget, so I'm
> not really sure what's happening here.
>
Diane just found possibly the real cause of the problem. dump.h is
included by almost every .c file, but defines variables, doesn't just
declare them. I think the real solution would be to define them in
main.c, or somewhere else, and just declare them in dump.h. Or if
they're truly only needed on a per-file basis, not as globals, they
could be marked static so there is no chance of conflict, and they're
pre-initialized to 0. The linker "might" merge them into the common
section, or might not, resulting in bizarre conflicts like what she's
seeing. Though, I'm surprised we're not seeing a linker error or
warning anyway.
- Justin
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svn commit: r335146 - head/sys/powerpc/aim
Author: jhibbits Date: Thu Jun 14 16:01:11 2018 New Revision: 335146 URL: https://svnweb.freebsd.org/changeset/base/335146 Log: Fix CTR formatting for moea64_native bootstrap On very large memory systems 'size' can become 2GB or larger, resulting in a negative value being formatted. Also, moea64_pteg_count is already a long, so format it as such. Modified: head/sys/powerpc/aim/moea64_native.c Modified: head/sys/powerpc/aim/moea64_native.c == --- head/sys/powerpc/aim/moea64_native.cThu Jun 14 15:04:49 2018 (r335145) +++ head/sys/powerpc/aim/moea64_native.cThu Jun 14 16:01:11 2018 (r335146) @@ -453,7 +453,7 @@ moea64_bootstrap_native(mmu_t mmup, vm_offset_t kernel */ size = moea64_pteg_count * sizeof(struct lpteg); - CTR2(KTR_PMAP, "moea64_bootstrap: %d PTEGs, %d bytes", + CTR2(KTR_PMAP, "moea64_bootstrap: %lu PTEGs, %lu bytes", moea64_pteg_count, size); rw_init(&moea64_eviction_lock, "pte eviction"); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r335160 - in head/sys: conf powerpc/aim powerpc/include
Author: jhibbits
Date: Thu Jun 14 17:23:51 2018
New Revision: 335160
URL: https://svnweb.freebsd.org/changeset/base/335160
Log:
Split the PowerISA 3.0 HPT implementation from historic
PowerISA 3.0 makes several changes to not only the format of the HPT but
also the behavior surrounding it. For instance, TLBIE no longer requires
serialization. Removing this lock cuts buildworld time in half on a
18-core/72-thread POWER9 system, demonstrating that this lock is highly
contended on such a system.
There was odd behavior observed trying to make this change in a
backwards-compatible manner in moea64_native.c, so the best option was to
fully split it, and largely revert the original changes adding POWER9
support to the original file.
Suggested by: nwhitehorn
Added:
head/sys/powerpc/aim/isa3_hashtb.c
- copied, changed from r335146, head/sys/powerpc/aim/moea64_native.c
Modified:
head/sys/conf/files.powerpc
head/sys/powerpc/aim/aim_machdep.c
head/sys/powerpc/aim/moea64_native.c
head/sys/powerpc/include/mmuvar.h
Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Thu Jun 14 17:21:09 2018(r335159)
+++ head/sys/conf/files.powerpc Thu Jun 14 17:23:51 2018(r335160)
@@ -102,6 +102,7 @@ libkern/qdivrem.c optionalpowerpc |
powerpcspe
libkern/ucmpdi2.c optionalpowerpc | powerpcspe
libkern/udivdi3.c optionalpowerpc | powerpcspe
libkern/umoddi3.c optionalpowerpc | powerpcspe
+powerpc/aim/isa3_hashtb.c optionalaim powerpc64
powerpc/aim/locore.S optionalaim no-obj
powerpc/aim/aim_machdep.c optionalaim
powerpc/aim/mmu_oea.c optionalaim powerpc
Modified: head/sys/powerpc/aim/aim_machdep.c
==
--- head/sys/powerpc/aim/aim_machdep.c Thu Jun 14 17:21:09 2018
(r335159)
+++ head/sys/powerpc/aim/aim_machdep.c Thu Jun 14 17:23:51 2018
(r335160)
@@ -420,7 +420,9 @@ aim_cpu_init(vm_offset_t toc)
* in case the platform module had a better idea of what we
* should do.
*/
- if (cpu_features & PPC_FEATURE_64)
+ if (cpu_features2 & PPC_FEATURE2_ARCH_3_00)
+ pmap_mmu_install(MMU_TYPE_P9H, BUS_PROBE_GENERIC);
+ else if (cpu_features & PPC_FEATURE_64)
pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
else
pmap_mmu_install(MMU_TYPE_OEA, BUS_PROBE_GENERIC);
Copied and modified: head/sys/powerpc/aim/isa3_hashtb.c (from r335146,
head/sys/powerpc/aim/moea64_native.c)
==
--- head/sys/powerpc/aim/moea64_native.cThu Jun 14 16:01:11 2018
(r335146, copy source)
+++ head/sys/powerpc/aim/isa3_hashtb.c Thu Jun 14 17:23:51 2018
(r335160)
@@ -134,56 +134,13 @@ __FBSDID("$FreeBSD$");
/* POWER9 only permits a 64k partition table size. */
#definePART_SIZE 0x1
-static int moea64_crop_tlbie;
-
static __inline void
-TLBIE(uint64_t vpn) {
-#ifndef __powerpc64__
- register_t vpn_hi, vpn_lo;
- register_t msr;
- register_t scratch, intr;
-#endif
-
- static volatile u_int tlbie_lock = 0;
-
+TLBIE(uint64_t vpn)
+{
vpn <<= ADDR_PIDX_SHFT;
- /* Hobo spinlock: we need stronger guarantees than mutexes provide */
- while (!atomic_cmpset_int(&tlbie_lock, 0, 1));
- isync(); /* Flush instruction queue once lock acquired */
-
- if (moea64_crop_tlbie)
- vpn &= ~(0xULL << 48);
-
-#ifdef __powerpc64__
__asm __volatile("tlbie %0" :: "r"(vpn) : "memory");
__asm __volatile("eieio; tlbsync; ptesync" ::: "memory");
-#else
- vpn_hi = (uint32_t)(vpn >> 32);
- vpn_lo = (uint32_t)vpn;
-
- intr = intr_disable();
- __asm __volatile("\
- mfmsr %0; \
- mr %1, %0; \
- insrdi %1,%5,1,0; \
- mtmsrd %1; isync; \
- \
- sld %1,%2,%4; \
- or %1,%1,%3; \
- tlbie %1; \
- \
- mtmsrd %0; isync; \
- eieio; \
- tlbsync; \
- ptesync;"
- : "=r"(msr), "=r"(scratch) : "r"(vpn_hi), "r"(vpn_lo), "r"(32), "r"(1)
- : "memory");
- intr_restore(intr);
-#endif
-
- /* No barriers or special ops -- taken care of by ptesync above */
- tlbie_lock = 0;
}
#define DISABLE_TRANS(msr) msr = mfmsr(); mtmsr(msr & ~PSL_DR)
@@ -192,48 +149,48 @@ TLBIE(uint64_t vpn) {
/*
* PTEG data.
*/
-static volatile struct pate *moea64_part_table;
-static volatile struct lpte *moea64_pteg_table;
-static struct rwlock moea64_eviction_lock;
+static volatile struct pate *isa3_part_table;
+static volatile struct lpte *isa3_hashtb_pteg_table;
+st
svn commit: r335187 - head/sys/dev/ofw
Author: jhibbits
Date: Fri Jun 15 03:28:05 2018
New Revision: 335187
URL: https://svnweb.freebsd.org/changeset/base/335187
Log:
ofw_reg_to_paddr(): Fix minor typo in KASSERT message
Modified:
head/sys/dev/ofw/ofw_subr.c
Modified: head/sys/dev/ofw/ofw_subr.c
==
--- head/sys/dev/ofw/ofw_subr.c Fri Jun 15 02:28:36 2018(r335186)
+++ head/sys/dev/ofw/ofw_subr.c Fri Jun 15 03:28:05 2018(r335187)
@@ -170,7 +170,7 @@ ofw_reg_to_paddr(phandle_t dev, int regno, bus_addr_t
}
KASSERT(addr <= BUS_SPACE_MAXADDR,
- ("Bus sddress is too large: %jx", (uintmax_t)addr));
+ ("Bus address is too large: %jx", (uintmax_t)addr));
KASSERT(size <= BUS_SPACE_MAXSIZE,
("Bus size is too large: %jx", (uintmax_t)size));
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svn commit: r335226 - head/sys/dev/ofw
Author: jhibbits
Date: Fri Jun 15 18:55:02 2018
New Revision: 335226
URL: https://svnweb.freebsd.org/changeset/base/335226
Log:
Check for a 'pci' prefix rather than a full match in get_addr_props
Summary:
Newer OPAL device trees, such as those on POWER9 systems, use 'pciex' for
device_type, not 'pci'. Rather than enumerating all possible variants, just
check for a 'pci' prefix.
Reviewed by: nwhitehorn, breno.leitao_gmail.com
Differential Revision: https://reviews.freebsd.org/D15817
Modified:
head/sys/dev/ofw/ofw_subr.c
Modified: head/sys/dev/ofw/ofw_subr.c
==
--- head/sys/dev/ofw/ofw_subr.c Fri Jun 15 18:50:24 2018(r335225)
+++ head/sys/dev/ofw/ofw_subr.c Fri Jun 15 18:55:02 2018(r335226)
@@ -61,7 +61,9 @@ get_addr_props(phandle_t node, uint32_t *addrp, uint32
res = OF_getprop(node, "device_type", type, sizeof(type));
if (res != -1) {
type[sizeof(type) - 1] = '\0';
- pci = (strcmp(type, "pci") == 0) ? 1 : 0;
+ if (strcmp(type, "pci") == 0 ||
+ strcmp(type, "pciex")== 0)
+ pci = 1;
}
}
if (addrp != NULL)
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Re: svn commit: r335226 - head/sys/dev/ofw
On Fri, Jun 15, 2018, 13:55 Justin Hibbits wrote: > Author: jhibbits > Date: Fri Jun 15 18:55:02 2018 > New Revision: 335226 > URL: https://svnweb.freebsd.org/changeset/base/335226 > > Log: > Check for a 'pci' prefix rather than a full match in get_addr_props > > Summary: > Newer OPAL device trees, such as those on POWER9 systems, use 'pciex' for > device_type, not 'pci'. Rather than enumerating all possible variants, > just > check for a 'pci' prefix. > And, given the changes made, the commit message is incorrect. It does enumerate all current variants. - Justin ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r335442 - head/sys/dev/ofw
Author: jhibbits
Date: Wed Jun 20 13:30:35 2018
New Revision: 335442
URL: https://svnweb.freebsd.org/changeset/base/335442
Log:
Attach dev.cpu nodes on powerpc SMT cores, using only the first found thread
Summary: In order to use cpufreq(4), a dev.cpu attachment must be created. If
the IBM property is found denoting SMT, attach only to the first thread setup,
so that a cpufreq device can bind.
Reviewed by: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D15921
Modified:
head/sys/dev/ofw/ofw_cpu.c
Modified: head/sys/dev/ofw/ofw_cpu.c
==
--- head/sys/dev/ofw/ofw_cpu.c Wed Jun 20 11:42:06 2018(r335441)
+++ head/sys/dev/ofw/ofw_cpu.c Wed Jun 20 13:30:35 2018(r335442)
@@ -191,10 +191,6 @@ ofw_cpu_probe(device_t dev)
if (type == NULL || strcmp(type, "cpu") != 0)
return (ENXIO);
- /* Skip SMT CPUs, which we can't reasonably represent with this code */
- if (OF_hasprop(ofw_bus_get_node(dev), "ibm,ppc-interrupt-server#s"))
- return (ENXIO);
-
device_set_desc(dev, "Open Firmware CPU");
return (0);
}
@@ -233,6 +229,43 @@ ofw_cpu_attach(device_t dev)
} else
sc->sc_reg_valid = true;
+#ifdef __powerpc__
+ /*
+* On powerpc, "interrupt-servers" denotes a SMT CPU. Look for any
+* thread on this CPU, and assign that.
+*/
+ if (OF_hasprop(node, "ibm,ppc-interrupt-server#s")) {
+ struct cpuref cpuref;
+ cell_t *servers;
+ int i, nservers, rv;
+
+ if ((nservers = OF_getencprop_alloc(node,
+ "ibm,ppc-interrupt-server#s", (void **)&servers)) < 0)
+ return (ENXIO);
+ nservers /= sizeof(cell_t);
+ for (i = 0; i < nservers; i++) {
+ for (rv = platform_smp_first_cpu(&cpuref); rv == 0;
+ rv = platform_smp_next_cpu(&cpuref)) {
+ if (cpuref.cr_hwref == servers[i]) {
+ sc->sc_cpu_pcpu =
+ pcpu_find(cpuref.cr_cpuid);
+ if (sc->sc_cpu_pcpu == NULL) {
+ OF_prop_free(servers);
+ return (ENXIO);
+ }
+ break;
+ }
+ }
+ if (rv != ENOENT)
+ break;
+ }
+ OF_prop_free(servers);
+ if (sc->sc_cpu_pcpu == NULL) {
+ device_printf(dev, "No CPU found for this device.\n");
+ return (ENXIO);
+ }
+ } else
+#endif
sc->sc_cpu_pcpu = pcpu_find(device_get_unit(dev));
if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) < 0) {
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svn commit: r335481 - in head/sys: kern powerpc/cpufreq sys
Author: jhibbits
Date: Thu Jun 21 14:26:43 2018
New Revision: 335481
URL: https://svnweb.freebsd.org/changeset/base/335481
Log:
Introduce PMCR-based cpufreq(4) driver, for IBM POWER8 and POWER9 systems
Summary: POWER8 and POWER9 use a single CPU register, per core, to change
clock
speed. Everything else is handled by the on-chip controller. This change
necessitates a change to the cpufreq global kernel driver to bump supported
levels, as the device tree for these systems can have theoretically 256
different options. On my POWER9 Talos, the list consists of 100 items. At
16.67MHz intervals, that allows for a change of roughly 1.67GHz between lowest
and highest.
This has only been tested on the POWER9. However, since they're similar, this
should work on POWER8 as well.
Reviewed By: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D15932
Added:
head/sys/powerpc/cpufreq/pmcr.c (contents, props changed)
Modified:
head/sys/kern/kern_cpu.c
head/sys/sys/cpu.h
Modified: head/sys/kern/kern_cpu.c
==
--- head/sys/kern/kern_cpu.cThu Jun 21 14:21:11 2018(r335480)
+++ head/sys/kern/kern_cpu.cThu Jun 21 14:26:43 2018(r335481)
@@ -59,7 +59,7 @@ __FBSDID("$FreeBSD$");
* Number of levels we can handle. Levels are synthesized from settings
* so for M settings and N drivers, there may be M*N levels.
*/
-#define CF_MAX_LEVELS 64
+#define CF_MAX_LEVELS 256
struct cf_saved_freq {
struct cf_level level;
Added: head/sys/powerpc/cpufreq/pmcr.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/powerpc/cpufreq/pmcr.c Thu Jun 21 14:26:43 2018
(r335481)
@@ -0,0 +1,248 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include "cpufreq_if.h"
+
+static int pstate_ids[256];
+static int pstate_freqs[256];
+static int npstates;
+
+static void parse_pstates(void)
+{
+ phandle_t node;
+
+ node = OF_finddevice("/ibm,opal/power-mgt");
+
+ /* If this fails, npstates will remain 0, and any attachment will bail.
*/
+ if (node == -1)
+ return;
+
+ npstates = OF_getencprop(node, "ibm,pstate-ids", pstate_ids,
+ sizeof(pstate_ids));
+ if (npstates < 0) {
+ npstates = 0;
+ return;
+ }
+
+ if (OF_getencprop(node, "ibm,pstate-frequencies-mhz", pstate_freqs,
+ sizeof(pstate_freqs)) != npstates) {
+ npstates = 0;
+ return;
+ }
+ npstates /= sizeof(cell_t);
+
+}
+
+/* Make this a sysinit so it runs before the cpufreq driver attaches. */
+SYSINIT(parse_pstates, SI_SUB_DRIVERS, SI_ORDER_MIDDLE, parse_pstates, NULL);
+
+#definePMCR_UPPERPS_MASK 0xff00UL
+#definePMCR_UPPERPS_SHIFT 56
+#definePMCR_LOWERPS_MASK 0x00ffUL
+#definePMCR_LOWERPS_SHIFT 48
+#definePMCR_VERSION_MASK 0x000f
+#define PMCR_VERSION_1 1
+
+struct pmcr_softc {
+ device_t dev;
+};
+
+static voidpmcr_identify(driver_t *driver, device_t parent);
+static int pmcr_probe(device_t dev);
+static int pmcr_attach(device_t dev);
+static int pmcr_settings(device_t dev, struct cf_setting *sets, int
*count);
svn commit: r335483 - in head/sys: conf powerpc/include
Author: jhibbits Date: Thu Jun 21 14:30:14 2018 New Revision: 335483 URL: https://svnweb.freebsd.org/changeset/base/335483 Log: Add the rest of the files for r335481 Missed hooking PMCR cpufreq(4) to the build, and adding the SPR to the header. Modified: head/sys/conf/files.powerpc head/sys/powerpc/include/spr.h Modified: head/sys/conf/files.powerpc == --- head/sys/conf/files.powerpc Thu Jun 21 14:28:20 2018(r335482) +++ head/sys/conf/files.powerpc Thu Jun 21 14:30:14 2018(r335483) @@ -121,6 +121,7 @@ powerpc/booke/spe.c optionalpowerpcspe powerpc/cpufreq/dfs.c optionalcpufreq powerpc/cpufreq/mpc85xx_jog.c optionalcpufreq mpc85xx powerpc/cpufreq/pcr.c optionalcpufreq aim +powerpc/cpufreq/pmcr.c optionalcpufreq aim powerpc64 powerpc/cpufreq/pmufreq.c optionalcpufreq aim pmu powerpc/fpu/fpu_add.c optionalfpu_emu powerpc/fpu/fpu_compare.c optionalfpu_emu Modified: head/sys/powerpc/include/spr.h == --- head/sys/powerpc/include/spr.h Thu Jun 21 14:28:20 2018 (r335482) +++ head/sys/powerpc/include/spr.h Thu Jun 21 14:30:14 2018 (r335483) @@ -384,6 +384,7 @@ #defineSPR_MD_RAM0 0x339 /* ..8 IMMU RAM entry read reg 0 */ #defineSPR_MD_RAM1 0x33a /* ..8 IMMU RAM entry read reg 1 */ #defineSPR_PSSCR 0x357 /* Processor Stop Status and Control Register (ISA 3.0) */ +#defineSPR_PMCR0x374 /* Processor Management Control Register */ #defineSPR_UMMCR2 0x3a0 /* .6. User Monitor Mode Control Register 2 */ #defineSPR_UMMCR0 0x3a8 /* .6. User Monitor Mode Control Register 0 */ #defineSPR_USIA0x3ab /* .6. User Sampled Instruction Address */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r335491 - head/sys/powerpc/cpufreq
Author: jhibbits Date: Thu Jun 21 15:59:05 2018 New Revision: 335491 URL: https://svnweb.freebsd.org/changeset/base/335491 Log: Fix the build post-PMCR addition. Submitted by: lwhsu Modified: head/sys/powerpc/cpufreq/pmcr.c Modified: head/sys/powerpc/cpufreq/pmcr.c == --- head/sys/powerpc/cpufreq/pmcr.c Thu Jun 21 15:47:47 2018 (r335490) +++ head/sys/powerpc/cpufreq/pmcr.c Thu Jun 21 15:59:05 2018 (r335491) @@ -195,7 +195,7 @@ pmcr_set(device_t dev, const struct cf_setting *set) pmcr = ((long)pstate_ids[set->spec[0]] << PMCR_LOWERPS_SHIFT) & PMCR_LOWERPS_MASK; pmcr |= ((long)pstate_ids[set->spec[0]] << PMCR_UPPERPS_SHIFT) & - PMCR_UPPERPS_MASK + PMCR_UPPERPS_MASK; pmcr |= PMCR_VERSION_1; mtspr(SPR_PMCR, pmcr); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r335574 - head/sys/powerpc/aim
Author: jhibbits Date: Sat Jun 23 01:42:34 2018 New Revision: 335574 URL: https://svnweb.freebsd.org/changeset/base/335574 Log: powerpc64: Fix stack setup in dbtrap r330610 relocated the DMAP from the base of memory to the base of the fourth quadrant of memory. This broke synthetic traps, such as KDB forced breakpoints. Use GET_TOCBASE() so the DMAP offset is handled. Submitted by: git_bdragon.rkt0.net Differential Revision:https://reviews.freebsd.org/D15973 Modified: head/sys/powerpc/aim/trap_subr64.S Modified: head/sys/powerpc/aim/trap_subr64.S == --- head/sys/powerpc/aim/trap_subr64.S Sat Jun 23 00:48:45 2018 (r335573) +++ head/sys/powerpc/aim/trap_subr64.S Sat Jun 23 01:42:34 2018 (r335574) @@ -896,7 +896,7 @@ dbtrap: andi. %r1,%r1,0xff00 mtsprg3 %r1 - ld %r1,TRAP_TOCBASE(0) /* get new SP */ + GET_TOCBASE(%r1)/* get new SP */ ld %r1,TOC_REF(tmpstk)(%r1) addi%r1,%r1,(TMPSTKSZ-48) ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r326203 - head/sys/conf
On Sat, Nov 25, 2017 at 3:45 PM, Nathan Whitehorn
wrote:
> Author: nwhitehorn
> Date: Sat Nov 25 21:45:51 2017
> New Revision: 326203
> URL: https://svnweb.freebsd.org/changeset/base/326203
>
> Log:
> Avoid emitting a PT_INTERP section for powerpc64 kernels and arrange for
> the first instruction to be at the start of the text segment. This allows
> the kernel to be booted correctly by stock kexec-lite.
>
> MFC after:2 weeks
>
> Modified:
> head/sys/conf/ldscript.powerpc64
>
> Modified: head/sys/conf/ldscript.powerpc64
> ==
> --- head/sys/conf/ldscript.powerpc64Sat Nov 25 21:44:23 2017
> (r326202)
> +++ head/sys/conf/ldscript.powerpc64Sat Nov 25 21:45:51 2017
> (r326203)
> @@ -10,7 +10,7 @@ SECTIONS
> {
>/* Read-only sections, merged into text segment: */
>
> - . = kernbase + SIZEOF_HEADERS;
> + . = kernbase;
>PROVIDE (begin = . - SIZEOF_HEADERS);
>
>.text :
> @@ -24,7 +24,10 @@ SECTIONS
>_etext = .;
>PROVIDE (etext = .);
>
> - .interp : { *(.interp) }
> + /* Do not emit PT_INTERP section, which confuses some loaders (kexec-lite)
> */
> + .interpX: { *(.interp) } : NONE
> + /DISCARD/ : { *(.interp) }
> +
>.hash : { *(.hash) }
>.dynsym: { *(.dynsym)}
>.dynstr: { *(.dynstr)}
>
This broke powerpc64 Book-E kernels. It now puts a 1MB blank space
ahead of the kernel data (ELF header + 1MB - sizeof(header) of 0's),
meaning that now the kernel needs to be loaded by uboot 1MB earlier in
memory, rather than straight on the 64MB boundary as it has been.
- Justin
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Re: svn commit: r326203 - head/sys/conf
On Tue, Nov 28, 2017 at 10:13 AM, Nathan Whitehorn
wrote:
>
>
> On 11/28/17 07:27, Justin Hibbits wrote:
>>
>> On Sat, Nov 25, 2017 at 3:45 PM, Nathan Whitehorn
>> wrote:
>>>
>>> Author: nwhitehorn
>>> Date: Sat Nov 25 21:45:51 2017
>>> New Revision: 326203
>>> URL: https://svnweb.freebsd.org/changeset/base/326203
>>>
>>> Log:
>>>Avoid emitting a PT_INTERP section for powerpc64 kernels and arrange
>>> for
>>>the first instruction to be at the start of the text segment. This
>>> allows
>>>the kernel to be booted correctly by stock kexec-lite.
>>>
>>>MFC after:2 weeks
>>>
>>> Modified:
>>>head/sys/conf/ldscript.powerpc64
>>>
>>> Modified: head/sys/conf/ldscript.powerpc64
>>>
>>> ==
>>> --- head/sys/conf/ldscript.powerpc64Sat Nov 25 21:44:23 2017
>>> (r326202)
>>> +++ head/sys/conf/ldscript.powerpc64Sat Nov 25 21:45:51 2017
>>> (r326203)
>>> @@ -10,7 +10,7 @@ SECTIONS
>>> {
>>> /* Read-only sections, merged into text segment: */
>>>
>>> - . = kernbase + SIZEOF_HEADERS;
>>> + . = kernbase;
>>> PROVIDE (begin = . - SIZEOF_HEADERS);
>>>
>>> .text :
>>> @@ -24,7 +24,10 @@ SECTIONS
>>> _etext = .;
>>> PROVIDE (etext = .);
>>>
>>> - .interp : { *(.interp) }
>>> + /* Do not emit PT_INTERP section, which confuses some loaders
>>> (kexec-lite) */
>>> + .interpX: { *(.interp) } : NONE
>>> + /DISCARD/ : { *(.interp) }
>>> +
>>> .hash : { *(.hash) }
>>> .dynsym: { *(.dynsym)}
>>> .dynstr: { *(.dynstr)}
>>>
>> This broke powerpc64 Book-E kernels. It now puts a 1MB blank space
>> ahead of the kernel data (ELF header + 1MB - sizeof(header) of 0's),
>> meaning that now the kernel needs to be loaded by uboot 1MB earlier in
>> memory, rather than straight on the 64MB boundary as it has been.
>>
>> - Justin
>>
>
> How on Earth? It doesn't do that on my system. What binutils are you using?
> -Nathan
>
This is using base binutils (2.17.50...) I don't know why it's doing
this, but readelf shows that file offset 0x0010 maps to
0xc000, and it goes from there.
- Justin
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Re: svn commit: r326203 - head/sys/conf
On Tue, Nov 28, 2017 at 10:30 AM, Nathan Whitehorn
wrote:
>
>
> On 11/28/17 08:23, Justin Hibbits wrote:
>>
>> On Tue, Nov 28, 2017 at 10:13 AM, Nathan Whitehorn
>> wrote:
>>>
>>>
>>> On 11/28/17 07:27, Justin Hibbits wrote:
>>>>
>>>> On Sat, Nov 25, 2017 at 3:45 PM, Nathan Whitehorn
>>>> wrote:
>>>>>
>>>>> Author: nwhitehorn
>>>>> Date: Sat Nov 25 21:45:51 2017
>>>>> New Revision: 326203
>>>>> URL: https://svnweb.freebsd.org/changeset/base/326203
>>>>>
>>>>> Log:
>>>>> Avoid emitting a PT_INTERP section for powerpc64 kernels and
>>>>> arrange
>>>>> for
>>>>> the first instruction to be at the start of the text segment. This
>>>>> allows
>>>>> the kernel to be booted correctly by stock kexec-lite.
>>>>>
>>>>> MFC after:2 weeks
>>>>>
>>>>> Modified:
>>>>> head/sys/conf/ldscript.powerpc64
>>>>>
>>>>> Modified: head/sys/conf/ldscript.powerpc64
>>>>>
>>>>>
>>>>> ==
>>>>> --- head/sys/conf/ldscript.powerpc64Sat Nov 25 21:44:23 2017
>>>>> (r326202)
>>>>> +++ head/sys/conf/ldscript.powerpc64Sat Nov 25 21:45:51 2017
>>>>> (r326203)
>>>>> @@ -10,7 +10,7 @@ SECTIONS
>>>>>{
>>>>> /* Read-only sections, merged into text segment: */
>>>>>
>>>>> - . = kernbase + SIZEOF_HEADERS;
>>>>> + . = kernbase;
>>>>> PROVIDE (begin = . - SIZEOF_HEADERS);
>>>>>
>>>>> .text :
>>>>> @@ -24,7 +24,10 @@ SECTIONS
>>>>> _etext = .;
>>>>> PROVIDE (etext = .);
>>>>>
>>>>> - .interp : { *(.interp) }
>>>>> + /* Do not emit PT_INTERP section, which confuses some loaders
>>>>> (kexec-lite) */
>>>>> + .interpX: { *(.interp) } : NONE
>>>>> + /DISCARD/ : { *(.interp) }
>>>>> +
>>>>> .hash : { *(.hash) }
>>>>> .dynsym: { *(.dynsym)}
>>>>> .dynstr: { *(.dynstr)}
>>>>>
>>>> This broke powerpc64 Book-E kernels. It now puts a 1MB blank space
>>>> ahead of the kernel data (ELF header + 1MB - sizeof(header) of 0's),
>>>> meaning that now the kernel needs to be loaded by uboot 1MB earlier in
>>>> memory, rather than straight on the 64MB boundary as it has been.
>>>>
>>>> - Justin
>>>>
>>> How on Earth? It doesn't do that on my system. What binutils are you
>>> using?
>>> -Nathan
>>>
>> This is using base binutils (2.17.50...) I don't know why it's doing
>> this, but readelf shows that file offset 0x0010 maps to
>> 0xc000, and it goes from there.
>>
>> - Justin
>>
>
> Bizarre. Why don't you just revert for now (I need to run) and I can figure
> out what went wrong later?
> -Nathan
I reverted privately already. I doubt there are many/any other users
of Book-E powerpc64, so I can wait it out for now.
- Justin
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svn commit: r326354 - head/sys/powerpc/booke
Author: jhibbits
Date: Wed Nov 29 01:26:07 2017
New Revision: 326354
URL: https://svnweb.freebsd.org/changeset/base/326354
Log:
Only check the page tables if within the KVA.
Devices aren't mapped within the KVA, and with the way 64-bit hashes the
addresses pte_vatopa() may not return a 0 physical address for a device.
MFC after:1 week
Modified:
head/sys/powerpc/booke/pmap.c
Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c Wed Nov 29 00:46:36 2017
(r326353)
+++ head/sys/powerpc/booke/pmap.c Wed Nov 29 01:26:07 2017
(r326354)
@@ -2091,10 +2091,11 @@ static vm_paddr_t
mmu_booke_kextract(mmu_t mmu, vm_offset_t va)
{
tlb_entry_t e;
- vm_paddr_t p;
+ vm_paddr_t p = 0;
int i;
- p = pte_vatopa(mmu, kernel_pmap, va);
+ if (va >= VM_MIN_KERNEL_ADDRESS && va <= VM_MAX_KERNEL_ADDRESS)
+ p = pte_vatopa(mmu, kernel_pmap, va);
if (p == 0) {
/* Check TLB1 mappings */
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Re: svn commit: r326218 - head/sys/kern
On Wed, Nov 29, 2017 at 10:13 AM, Konstantin Belousov wrote: > On Wed, Nov 29, 2017 at 04:33:50PM +0100, Hans Petter Selasky wrote: >> Hi Nathan, >> >> The chunk below causes sched_pin() to stop working and should be removed >> from your commit ??!! >> >> It probably explains the hangs seen recently reported by various brave >> people running 12-current :-) >> >> Specifically I see threads migrating between CPUs when td->td_pinned > 0 >> using the LinuxKPI RCU API, which in turn leads to a hang when trying to >> synchronize RCU. >> >> --HPS >> >> diff --git a/sys/kern/sched_ule.c b/sys/kern/sched_ule.c >> index 5c8bae5afa1..bd4b505f6c3 100644 >> --- a/sys/kern/sched_ule.c >> +++ b/sys/kern/sched_ule.c >> @@ -2453,7 +2453,7 @@ sched_add(struct thread *td, int flags) >> * Pick the destination cpu and if it isn't ours transfer to the >> * target cpu. >> */ >> - td_get_sched(td)->ts_cpu = curcpu; /* Pick something valid to >> start */ >> +// td_get_sched(td)->ts_cpu = curcpu; /* Pick something valid to >> start */ >> cpu = sched_pickcpu(td, flags); >> tdq = sched_setcpu(td, cpu, flags); >> tdq_add(tdq, td, flags); > > To clarify. It seems that this change breaks sched_bind(). > > It might be that LinuxKPI does use sched_pin() in somewhat questionable > way. Namely, the code puts the thread off the CPU (e.g. by taking a > lock). Then, is it guaranteed that the pinned thread returns to the same > cpu after sched_add() ? > > I think that the second behaviour is not guaranteed, but it might > happens by the way the things are arranged. If guaranteed, then the > sched_pin() breakage is same as for sched_bind(). > I see the same breakage on PowerPC with the dtsec(4) driver, which pins interrupts to CPUs, now causing interrupts to migrate to cores without the matching portal mapping. - Justin ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r326453 - head/sys/powerpc/mpc85xx
Author: jhibbits Date: Sat Dec 2 01:42:07 2017 New Revision: 326453 URL: https://svnweb.freebsd.org/changeset/base/326453 Log: Override memattr for mmap on the Freescale DIU driver The Display Interface Unit (DIU) uses main memory for the framebuffer, which is already mapped as cache coherent physical memory. Prevent mmap() from using its own attributes which may otherwise conflict. Modified: head/sys/powerpc/mpc85xx/fsl_diu.c Modified: head/sys/powerpc/mpc85xx/fsl_diu.c == --- head/sys/powerpc/mpc85xx/fsl_diu.c Sat Dec 2 01:10:45 2017 (r326452) +++ head/sys/powerpc/mpc85xx/fsl_diu.c Sat Dec 2 01:42:07 2017 (r326453) @@ -414,6 +414,8 @@ diu_attach(device_t dev) sc->sc_info.fb_vbase = (intptr_t)contigmalloc(sc->sc_info.fb_size, M_DEVBUF, M_ZERO, 0, BUS_SPACE_MAXADDR_32BIT, PAGE_SIZE, 0); sc->sc_info.fb_pbase = (intptr_t)vtophys(sc->sc_info.fb_vbase); + sc->sc_info.fb_flags = FB_FLAG_MEMATTR; + sc->sc_info.fb_memattr = VM_MEMATTR_DEFAULT; /* Gamma table is 3 consecutive segments of 256 bytes. */ sc->sc_gamma = contigmalloc(3 * 256, M_DEVBUF, 0, 0, ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r326611 - head/sys/sys
Author: jhibbits
Date: Wed Dec 6 02:05:21 2017
New Revision: 326611
URL: https://svnweb.freebsd.org/changeset/base/326611
Log:
Use unsigned intptr_t type for framebuffer addresses
Summary:
Some architectures (powerpc Book-E) have a vm_paddr_t larger than intptr_t.
Casting from the intptr_t to vm_paddr_t causes sign extension, leading to a
potentially invalid address.
This was seen when running X on a PowerPC P1022 machine, which mapped the
backing framebuffer at 0xc180. When mmap()d by X, this yielded an invalid
address of 0xc180, or, as the hardware would see it, 0xfc180.
Reviewed By: ray
Differential Revision: https://reviews.freebsd.org/D13332
Modified:
head/sys/sys/fbio.h
Modified: head/sys/sys/fbio.h
==
--- head/sys/sys/fbio.h Wed Dec 6 02:00:09 2017(r326610)
+++ head/sys/sys/fbio.h Wed Dec 6 02:05:21 2017(r326611)
@@ -136,8 +136,8 @@ struct fb_info {
fb_leave_t *leave;
fb_setblankmode_t *setblankmode;
- intptr_tfb_pbase; /* For FB mmap. */
- intptr_tfb_vbase; /* if NULL, use fb_write/fb_read. */
+ uintptr_t fb_pbase; /* For FB mmap. */
+ uintptr_t fb_vbase; /* if NULL, use fb_write/fb_read. */
void*fb_priv; /* First argument for read/write. */
const char *fb_name;
uint32_tfb_flags;
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svn commit: r326612 - head/sys/dev/vt/hw/fb
Author: jhibbits
Date: Wed Dec 6 02:06:14 2017
New Revision: 326612
URL: https://svnweb.freebsd.org/changeset/base/326612
Log:
Allow custom overrides of mmap attribute for VT framebuffer
Summary:
As in /dev/fb, allow the framebuffer driver to override the default memattr
for
mmap(2). This is analogous to the change in 306555.
Reviewed By: ray
Differential Revision: https://reviews.freebsd.org/D13331
Modified:
head/sys/dev/vt/hw/fb/vt_fb.c
Modified: head/sys/dev/vt/hw/fb/vt_fb.c
==
--- head/sys/dev/vt/hw/fb/vt_fb.c Wed Dec 6 02:05:21 2017
(r326611)
+++ head/sys/dev/vt/hw/fb/vt_fb.c Wed Dec 6 02:06:14 2017
(r326612)
@@ -143,8 +143,11 @@ vt_fb_mmap(struct vt_device *vd, vm_ooffset_t offset,
*paddr = vtophys((uint8_t *)info->fb_vbase + offset);
} else {
*paddr = info->fb_pbase + offset;
+ if (info->fb_flags & FB_FLAG_MEMATTR)
+ *memattr = info->fb_memattr;
#ifdef VM_MEMATTR_WRITE_COMBINING
- *memattr = VM_MEMATTR_WRITE_COMBINING;
+ else
+ *memattr = VM_MEMATTR_WRITE_COMBINING;
#endif
}
return (0);
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svn commit: r326675 - head/sys/powerpc/booke
Author: jhibbits
Date: Fri Dec 8 03:49:53 2017
New Revision: 326675
URL: https://svnweb.freebsd.org/changeset/base/326675
Log:
Remove PTE VA mappings for tracked pages in 64-bit mode
This was done in 32-bit mode, but not duplicated when 64-bit mode was
brought in. Without this, stale mappings can be left, leading to odd
crashes when the wrong VA is checked in XX_PhysToVirt() (dpaa(4)).
Modified:
head/sys/powerpc/booke/pmap.c
Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c Fri Dec 8 00:57:13 2017
(r326674)
+++ head/sys/powerpc/booke/pmap.c Fri Dec 8 03:49:53 2017
(r326675)
@@ -1291,6 +1291,10 @@ pte_remove(mmu_t mmu, pmap_t pmap, vm_offset_t va, u_i
/* Remove pv_entry from pv_list. */
pv_remove(pmap, va, m);
+ } else if (m->md.pv_tracked) {
+ pv_remove(pmap, va, m);
+ if (TAILQ_EMPTY(&m->md.pv_list))
+ m->md.pv_tracked = false;
}
mtx_lock_spin(&tlbivax_mutex);
tlb_miss_lock();
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svn commit: r326739 - head/sys/powerpc/booke
Author: jhibbits
Date: Sun Dec 10 04:43:27 2017
New Revision: 326739
URL: https://svnweb.freebsd.org/changeset/base/326739
Log:
Retrieve the page outside of holding locks
pmap_track_page() only works with physical memory pages, which have a
constant vm_page_t address. Microoptimize pmap_track_page() to perform one
less operation under the lock.
Modified:
head/sys/powerpc/booke/pmap.c
Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c Sat Dec 9 23:34:00 2017
(r326738)
+++ head/sys/powerpc/booke/pmap.c Sun Dec 10 04:43:27 2017
(r326739)
@@ -4224,10 +4224,10 @@ pmap_track_page(pmap_t pmap, vm_offset_t va)
va = trunc_page(va);
pa = pmap_kextract(va);
+ page = PHYS_TO_VM_PAGE(pa);
rw_wlock(&pvh_global_lock);
PMAP_LOCK(pmap);
- page = PHYS_TO_VM_PAGE(pa);
TAILQ_FOREACH(pve, &page->md.pv_list, pv_link) {
if ((pmap == pve->pv_pmap) && (va == pve->pv_va)) {
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svn commit: r326789 - head/sys/powerpc/powerpc
Author: jhibbits
Date: Tue Dec 12 03:16:10 2017
New Revision: 326789
URL: https://svnweb.freebsd.org/changeset/base/326789
Log:
Decode some PowerPC trap registers
Decode on Book-E:
* ESR (Exception Syndrome Register)
* MCSR (Machine Check Status Register)
On AIM:
* MSSSR (Memory Subsystem Status Register)
Makes it easier to tell at a glance the type of trap and machine check
conditions now.
Modified:
head/sys/powerpc/powerpc/trap.c
Modified: head/sys/powerpc/powerpc/trap.c
==
--- head/sys/powerpc/powerpc/trap.c Tue Dec 12 01:20:45 2017
(r326788)
+++ head/sys/powerpc/powerpc/trap.c Tue Dec 12 03:16:10 2017
(r326789)
@@ -146,6 +146,26 @@ static struct powerpc_exception powerpc_exceptions[] =
{ EXC_LAST, NULL }
};
+#define ESR_BITMASK\
+"\20" \
+"\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP" \
+"\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE"\
+"\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \
+"\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31"
+#defineMCSR_BITMASK
\
+"\20" \
+"\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7"
\
+"\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF"\
+"\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23" \
+"\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR"
+#defineMSSSR_BITMASK
\
+"\20" \
+"\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \
+"\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG" \
+"\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23" \
+"\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31"
+
+
static const char *
trapname(u_int vector)
{
@@ -443,19 +463,20 @@ printtrap(u_int vector, struct trapframe *frame, int i
ver = mfpvr() >> 16;
#if defined(AIM)
if (MPC745X_P(ver))
- printf("msssr0 = 0x%lx\n",
- (u_long)mfspr(SPR_MSSSR0));
+ printf("msssr0 = 0x%b\n",
+ (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK);
#elif defined(BOOKE)
pa = mfspr(SPR_MCARU);
pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR);
- printf(" mcsr= 0x%lx\n", (u_long)mfspr(SPR_MCSR));
+ printf(" mcsr= 0x%b\n",
+ (int)mfspr(SPR_MCSR), MCSR_BITMASK);
printf(" mcar= 0x%jx\n", (uintmax_t)pa);
#endif
break;
}
#ifdef BOOKE
- printf(" esr = 0x%" PRIxPTR "\n",
- frame->cpu.booke.esr);
+ printf(" esr = 0x%b\n",
+ (int)frame->cpu.booke.esr, ESR_BITMASK);
#endif
printf(" srr0= 0x%" PRIxPTR "\n", frame->srr0);
printf(" srr1= 0x%lx\n", (u_long)frame->srr1);
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svn commit: r326840 - head/sys/dev/dpaa
Author: jhibbits
Date: Thu Dec 14 04:41:07 2017
New Revision: 326840
URL: https://svnweb.freebsd.org/changeset/base/326840
Log:
Allow bman-portals and qman-portals to attach to simple-bus
Official Linux dts's put the individual portals under a simple-bus, rather
than under a '*-portals' grouping. This adds a hack to permit that, which
gets us closer to using stock device trees for DPAA-based devices.
Modified:
head/sys/dev/dpaa/bman_fdt.c
head/sys/dev/dpaa/qman_fdt.c
Modified: head/sys/dev/dpaa/bman_fdt.c
==
--- head/sys/dev/dpaa/bman_fdt.cThu Dec 14 03:41:12 2017
(r326839)
+++ head/sys/dev/dpaa/bman_fdt.cThu Dec 14 04:41:07 2017
(r326840)
@@ -122,8 +122,17 @@ get_addr_props(phandle_t node, uint32_t *addrp, uint32
static int
bman_portals_fdt_probe(device_t dev)
{
+ phandle_t node;
- if (!ofw_bus_is_compatible(dev, "fsl,bman-portals"))
+ if (ofw_bus_is_compatible(dev, "simple-bus")) {
+ node = ofw_bus_get_node(dev);
+ for (node = OF_child(node); node > 0; node = OF_peer(node)) {
+ if (ofw_bus_node_is_compatible(node, "fsl,bman-portal"))
+ break;
+ }
+ if (node <= 0)
+ return (ENXIO);
+ } else if (!ofw_bus_is_compatible(dev, "fsl,bman-portals"))
return (ENXIO);
device_set_desc(dev, BMAN_PORT_DEVSTR);
Modified: head/sys/dev/dpaa/qman_fdt.c
==
--- head/sys/dev/dpaa/qman_fdt.cThu Dec 14 03:41:12 2017
(r326839)
+++ head/sys/dev/dpaa/qman_fdt.cThu Dec 14 04:41:07 2017
(r326840)
@@ -44,7 +44,7 @@ __FBSDID("$FreeBSD$");
#include "qman.h"
#include "portals.h"
-#defineFBMAN_DEVSTR"Freescale Queue Manager"
+#defineFQMAN_DEVSTR"Freescale Queue Manager"
static int qman_fdt_probe(device_t);
@@ -77,15 +77,15 @@ qman_fdt_probe(device_t dev)
if (!ofw_bus_is_compatible(dev, "fsl,qman"))
return (ENXIO);
- device_set_desc(dev, FBMAN_DEVSTR);
+ device_set_desc(dev, FQMAN_DEVSTR);
return (BUS_PROBE_DEFAULT);
}
/*
- * BMAN Portals
+ * QMAN Portals
*/
-#defineBMAN_PORT_DEVSTR"Freescale Queue Manager - Portals"
+#defineQMAN_PORT_DEVSTR"Freescale Queue Manager - Portals"
static device_probe_t qman_portals_fdt_probe;
static device_attach_t qman_portals_fdt_attach;
@@ -122,11 +122,20 @@ get_addr_props(phandle_t node, uint32_t *addrp, uint32
static int
qman_portals_fdt_probe(device_t dev)
{
+ phandle_t node;
- if (!ofw_bus_is_compatible(dev, "fsl,qman-portals"))
+ if (ofw_bus_is_compatible(dev, "simple-bus")) {
+ node = ofw_bus_get_node(dev);
+ for (node = OF_child(node); node > 0; node = OF_peer(node)) {
+ if (ofw_bus_node_is_compatible(node, "fsl,qman-portal"))
+ break;
+ }
+ if (node <= 0)
+ return (ENXIO);
+ } else if (!ofw_bus_is_compatible(dev, "fsl,qman-portals"))
return (ENXIO);
- device_set_desc(dev, BMAN_PORT_DEVSTR);
+ device_set_desc(dev, QMAN_PORT_DEVSTR);
return (BUS_PROBE_DEFAULT);
}
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svn commit: r326859 - head/sys/powerpc/powerpc
Author: jhibbits
Date: Thu Dec 14 20:01:04 2017
New Revision: 326859
URL: https://svnweb.freebsd.org/changeset/base/326859
Log:
Add identifier for POWER9 CPU to CPU list
Without the identifier in the list booting FreeBSD results in printing the
following (from a PowerKVM boot):
cpu0: Unknown PowerPC CPU revision 0x1201, 2550.00 MHz
For now, add the same feature list as POWER8. As new capabilities are added
to
support POWER9 specific features, they will be added to this.
PR: 224344
Submitted by: Breno Leitao
Modified:
head/sys/powerpc/powerpc/cpu.c
Modified: head/sys/powerpc/powerpc/cpu.c
==
--- head/sys/powerpc/powerpc/cpu.c Thu Dec 14 18:57:17 2017
(r326858)
+++ head/sys/powerpc/powerpc/cpu.c Thu Dec 14 20:01:04 2017
(r326859)
@@ -163,6 +163,12 @@ static const struct cputab models[] = {
PPC_FEATURE_HAS_VSX,
PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | PPC_FEATURE2_ISEL |
PPC_FEATURE2_HAS_VCRYPTO, NULL },
+{ "IBM POWER9",IBMPOWER9, REVFMT_MAJMIN,
+ PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU |
+ PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 |
+ PPC_FEATURE_HAS_VSX,
+ PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_HAS_HTM | PPC_FEATURE2_ISEL |
+ PPC_FEATURE2_HAS_VCRYPTO, NULL },
{ "Motorola PowerPC 7400", MPC7400,REVFMT_MAJMIN,
PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup },
{ "Motorola PowerPC 7410", MPC7410,REVFMT_MAJMIN,
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svn commit: r326870 - in head/sys/powerpc: include powerpc
Author: jhibbits
Date: Fri Dec 15 04:11:20 2017
New Revision: 326870
URL: https://svnweb.freebsd.org/changeset/base/326870
Log:
Handle the Facility Unavailable exception as a SIGILL
Currently Facility Unavailable is absent and once an application
tries to use or access a register from a feature disabled in the
CPU it causes a kernel panic.
A simple test-case is:
int main() { asm volatile ("tbegin.;"); }
which will use TM (Hardware Transactional Memory) feature which
is not supported by the kernel and so will trigger the following
kernel panic:
fatal user trap:
exception = 0xf60 (unknown)
srr0= 0x1890
srr1= 0x8000f032
lr = 0x14e4
curthread = 0x5f93000
pid = 1021, comm = htm
panic: unknown trap
cpuid = 40
KDB: stack backtrace:
Uptime: 3m18s
Dumping 10 MB (3 chunks)
chunk 0: 11MB (2648 pages) ... ok
chunk 1: 1MB (24 pages) ... ok
chunk 2: 1MB (2 pages)panic: IOMMU mapping error: -4
cpuid = 40
Uptime: 3m18s
Since Hardware Transactional Memory is not yet supported by FreeBSD, treat
this as an illegal instruction.
PR: 224350
Submitted by: Gustavo Romero
MFC after:2 weeks
Modified:
head/sys/powerpc/include/trap.h
head/sys/powerpc/powerpc/trap.c
Modified: head/sys/powerpc/include/trap.h
==
--- head/sys/powerpc/include/trap.h Fri Dec 15 03:46:52 2017
(r326869)
+++ head/sys/powerpc/include/trap.h Fri Dec 15 04:11:20 2017
(r326870)
@@ -80,6 +80,9 @@
#defineEXC_HEA 0x0e40 /* Hypervisor Emulation
Assistance */
#defineEXC_VSX 0x0f40 /* VSX Unavailable */
+/* Power ISA 2.07+: */
+#defineEXC_FAC 0x0f60 /* Facility Unavailable */
+
/* The following are available on 4xx and 85xx */
#defineEXC_CRIT0x0100 /* Critical Input Interrupt */
#defineEXC_PIT 0x1000 /* Programmable Interval Timer
*/
Modified: head/sys/powerpc/powerpc/trap.c
==
--- head/sys/powerpc/powerpc/trap.c Fri Dec 15 03:46:52 2017
(r326869)
+++ head/sys/powerpc/powerpc/trap.c Fri Dec 15 04:11:20 2017
(r326870)
@@ -135,6 +135,7 @@ static struct powerpc_exception powerpc_exceptions[] =
{ EXC_PERF, "performance monitoring" },
{ EXC_VEC, "altivec unavailable" },
{ EXC_VSX, "vsx unavailable" },
+ { EXC_FAC, "facility unavailable" },
{ EXC_ITMISS, "instruction tlb miss" },
{ EXC_DLMISS, "data load tlb miss" },
{ EXC_DSMISS, "data store tlb miss" },
@@ -277,6 +278,11 @@ trap(struct trapframe *frame)
save_fpu(td);
td->td_pcb->pcb_flags |= PCB_VSX;
enable_fpu(td);
+ break;
+
+ case EXC_FAC:
+ sig = SIGILL;
+ ucode = ILL_ILLOPC;
break;
case EXC_VECAST_E:
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Re: svn commit: r326870 - in head/sys/powerpc: include powerpc
On Thu, Dec 14, 2017 at 10:11 PM, Justin Hibbits wrote:
> Author: jhibbits
> Date: Fri Dec 15 04:11:20 2017
> New Revision: 326870
> URL: https://svnweb.freebsd.org/changeset/base/326870
>
> Log:
> Handle the Facility Unavailable exception as a SIGILL
>
> Currently Facility Unavailable is absent and once an application
> tries to use or access a register from a feature disabled in the
> CPU it causes a kernel panic.
>
> A simple test-case is:
>
> int main() { asm volatile ("tbegin.;"); }
>
> which will use TM (Hardware Transactional Memory) feature which
> is not supported by the kernel and so will trigger the following
> kernel panic:
>
>
>
> fatal user trap:
>
> exception = 0xf60 (unknown)
> srr0= 0x1890
> srr1= 0x8000f032
> lr = 0x14e4
> curthread = 0x5f93000
> pid = 1021, comm = htm
>
> panic: unknown trap
> cpuid = 40
> KDB: stack backtrace:
> Uptime: 3m18s
> Dumping 10 MB (3 chunks)
> chunk 0: 11MB (2648 pages) ... ok
> chunk 1: 1MB (24 pages) ... ok
> chunk 2: 1MB (2 pages)panic: IOMMU mapping error: -4
>
> cpuid = 40
> Uptime: 3m18s
>
>
>
> Since Hardware Transactional Memory is not yet supported by FreeBSD, treat
> this as an illegal instruction.
>
> PR: 224350
> Submitted by: Gustavo Romero
... and of course I can't read... missed part of the email address (br.ibm.com)
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svn commit: r327028 - head/sys/powerpc/include
Author: jhibbits Date: Wed Dec 20 16:49:45 2017 New Revision: 327028 URL: https://svnweb.freebsd.org/changeset/base/327028 Log: Increase default MAXDSIZ to 32G on powerpc64 Linking LLVM now seems to require more than 1GB data size, so increase the default to 32G, which matches amd64. Reviewed by: nwhitehorn Modified: head/sys/powerpc/include/vmparam.h Modified: head/sys/powerpc/include/vmparam.h == --- head/sys/powerpc/include/vmparam.h Wed Dec 20 16:02:11 2017 (r327027) +++ head/sys/powerpc/include/vmparam.h Wed Dec 20 16:49:45 2017 (r327028) @@ -48,7 +48,11 @@ #endif #ifndefMAXDSIZ +#ifdef __powerpc64__ +#defineMAXDSIZ (32UL*1024*1024*1024) /* max data size */ +#else #defineMAXDSIZ (1*1024*1024*1024) /* max data size */ +#endif #endif #ifndefDFLSSIZ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r327681 - head/sys/modules/gpio/gpiobus
Author: jhibbits
Date: Sun Jan 7 20:28:17 2018
New Revision: 327681
URL: https://svnweb.freebsd.org/changeset/base/327681
Log:
Add missing file to gpiobus module
ofw_gpiobus.c is needed when FDT is used.
MFC after:2 weeks
Modified:
head/sys/modules/gpio/gpiobus/Makefile
Modified: head/sys/modules/gpio/gpiobus/Makefile
==
--- head/sys/modules/gpio/gpiobus/Makefile Sun Jan 7 18:33:19 2018
(r327680)
+++ head/sys/modules/gpio/gpiobus/Makefile Sun Jan 7 20:28:17 2018
(r327681)
@@ -36,6 +36,10 @@ SRCS=gpiobus.c gpioc.c
SRCS+= gpio_if.c gpio_if.h gpiobus_if.c gpiobus_if.h ofw_bus_if.h
SRCS+= device_if.h bus_if.h opt_platform.h
+.if !empty(OPT_FDT)
+SRCS+= ofw_gpiobus.c
+.endif
+
CFLAGS+= -I. -I${SRCTOP}/sys/dev/gpio/
.include
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svn commit: r327906 - in head/sys: conf powerpc/mpc85xx
Author: jhibbits
Date: Sat Jan 13 01:36:37 2018
New Revision: 327906
URL: https://svnweb.freebsd.org/changeset/base/327906
Log:
Enable L2 cache on supported PowerQUICC and QorIQ platforms
Some PowerQUICC and QorIQ platforms have a L2 cache managed via the
memory-mapped configuration registers, and appear as a node in the device
tree. This adds basic support to enable the cache.
Added:
head/sys/powerpc/mpc85xx/mpc85xx_cache.c (contents, props changed)
Modified:
head/sys/conf/files.powerpc
Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Sat Jan 13 00:05:31 2018(r327905)
+++ head/sys/conf/files.powerpc Sat Jan 13 01:36:37 2018(r327906)
@@ -146,6 +146,7 @@ powerpc/mpc85xx/i2c.c optionaliicbus
fdt
powerpc/mpc85xx/isa.c optionalmpc85xx isa
powerpc/mpc85xx/lbc.c optionalmpc85xx
powerpc/mpc85xx/mpc85xx.c optionalmpc85xx
+powerpc/mpc85xx/mpc85xx_cache.coptionalmpc85xx
powerpc/mpc85xx/mpc85xx_gpio.c optionalmpc85xx gpio
powerpc/mpc85xx/platform_mpc85xx.c optionalmpc85xx
powerpc/mpc85xx/pci_mpc85xx.c optionalpci mpc85xx
Added: head/sys/powerpc/mpc85xx/mpc85xx_cache.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/powerpc/mpc85xx/mpc85xx_cache.cSat Jan 13 01:36:37 2018
(r327906)
@@ -0,0 +1,129 @@
+/*-
+ * Copyright (c) 2018 Justin Hibbits
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+/*
+ * From the P1022 manual, sequence for writing to L2CTL is:
+ * - mbar
+ * - isync
+ * - write
+ * - read
+ * - mbar
+ */
+#defineL2_CTL 0x0
+#define L2CTL_L2E 0x8000
+#define L2CTL_L2I 0x4000
+struct mpc85xx_cache_softc {
+ struct resource *sc_mem;
+};
+
+static int
+mpc85xx_cache_probe(device_t dev)
+{
+
+ if (!ofw_bus_is_compatible(dev, "cache"))
+ return (ENXIO);
+
+ device_set_desc(dev, "MPC85xx L2 cache");
+ return (0);
+}
+
+static int
+mpc85xx_cache_attach(device_t dev)
+{
+ struct mpc85xx_cache_softc *sc = device_get_softc(dev);
+ int rid;
+ int cache_line_size, cache_size;
+
+ /* Map registers. */
+ rid = 0;
+ sc->sc_mem = bus_alloc_resource_any(dev,
+SYS_RES_MEMORY, &rid, RF_ACTIVE);
+ if (sc->sc_mem == NULL)
+ return (ENOMEM);
+
+ /* Enable cache and flash invalidate. */
+ __asm __volatile ("mbar; isync" ::: "memory");
+ bus_write_4(sc->sc_mem, L2_CTL, L2CTL_L2E | L2CTL_L2I);
+ bus_read_4(sc->sc_mem, L2_CTL);
+ __asm __volatile ("mbar" ::: "memory");
+
+ cache_line_size = 0;
+ cache_size = 0;
+ OF_getencprop(ofw_bus_get_node(dev), "cache-size", &cache_size,
+ sizeof(cache_size));
+ OF_getencprop(ofw_bus_get_node(dev), "cache-line-size",
+ &cache_line_size, sizeof(cache_line_size));
+
+ if (cache_line_size != 0 && cache_size != 0)
+ device_printf(dev,
+ "L2 cache size: %dKB, cache line size: %d bytes\n",
+
svn commit: r327907 - in head/sys: conf dev/fdt dev/ofw
Author: jhibbits
Date: Sat Jan 13 02:56:09 2018
New Revision: 327907
URL: https://svnweb.freebsd.org/changeset/base/327907
Log:
Remove fdt fixups for powerpc, they are no longer needed.
If a fixup really is needed, it should be fixed in u-boot, not in FreeBSD.
Suggested by: nwhitehorn
Deleted:
head/sys/dev/fdt/fdt_powerpc.c
Modified:
head/sys/conf/files.powerpc
head/sys/dev/ofw/ofw_fdt.c
Modified: head/sys/conf/files.powerpc
==
--- head/sys/conf/files.powerpc Sat Jan 13 01:36:37 2018(r327906)
+++ head/sys/conf/files.powerpc Sat Jan 13 02:56:09 2018(r327907)
@@ -31,7 +31,6 @@ dev/adb/adb_if.m optionaladb
dev/adb/adb_buttons.c optionaladb
dev/agp/agp_apple.coptionalagp powermac
dev/fb/fb.coptionalsc
-dev/fdt/fdt_powerpc.c optionalfdt
# ofwbus depends on simplebus.
dev/fdt/simplebus.coptionalaim | fdt
dev/hwpmc/hwpmc_e500.c optionalhwpmc
Modified: head/sys/dev/ofw/ofw_fdt.c
==
--- head/sys/dev/ofw/ofw_fdt.c Sat Jan 13 01:36:37 2018(r327906)
+++ head/sys/dev/ofw/ofw_fdt.c Sat Jan 13 02:56:09 2018(r327907)
@@ -430,7 +430,7 @@ ofw_fdt_package_to_path(ofw_t ofw, phandle_t package,
return (-1);
}
-#if defined(FDT_MARVELL) || defined(__powerpc__)
+#if defined(FDT_MARVELL)
static int
ofw_fdt_fixup(ofw_t ofw)
{
@@ -477,7 +477,7 @@ ofw_fdt_fixup(ofw_t ofw)
static int
ofw_fdt_interpret(ofw_t ofw, const char *cmd, int nret, cell_t *retvals)
{
-#if defined(FDT_MARVELL) || defined(__powerpc__)
+#if defined(FDT_MARVELL)
int rv;
/*
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svn commit: r327911 - head/lib/libpmc
Author: jhibbits Date: Sat Jan 13 04:53:04 2018 New Revision: 327911 URL: https://svnweb.freebsd.org/changeset/base/327911 Log: Replace the PMC class struct copy with an explicit memcpy() This should be effectively a nop for all archs, but for some reason the codegen difference on the PowerPC 970 is such that the struct assignment doesn't work (unless a printf() using one of the elements in the copied struct follows it), while the memcpy() succeeds. On all archs the memcpy() should be expanded to an inline copy, since the copy is bounded to ~16 bytes. MFC after:3 weeks Modified: head/lib/libpmc/libpmc.c Modified: head/lib/libpmc/libpmc.c == --- head/lib/libpmc/libpmc.cSat Jan 13 04:00:55 2018(r327910) +++ head/lib/libpmc/libpmc.cSat Jan 13 04:53:04 2018(r327911) @@ -3270,7 +3270,8 @@ pmc_init(void) cpu_info.pm_npmc= op_cpu_info.pm_npmc; cpu_info.pm_nclass = op_cpu_info.pm_nclass; for (n = 0; n < cpu_info.pm_nclass; n++) - cpu_info.pm_classes[n] = op_cpu_info.pm_classes[n]; + memcpy(&cpu_info.pm_classes[n], &op_cpu_info.pm_classes[n], + sizeof(cpu_info.pm_classes[n])); pmc_class_table = malloc(PMC_CLASS_TABLE_SIZE * sizeof(struct pmc_class_descr *)); ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r327906 - in head/sys: conf powerpc/mpc85xx
On Jan 13, 2018 09:04, "Pedro Giffuni" wrote: On 12/01/2018 20:36, Justin Hibbits wrote: > Author: jhibbits > Date: Sat Jan 13 01:36:37 2018 > New Revision: 327906 > URL: https://svnweb.freebsd.org/changeset/base/327906 > ... > > > Added: head/sys/powerpc/mpc85xx/mpc85xx_cache.c > > == > --- /dev/null 00:00:00 1970 (empty, because file is newly added) > +++ head/sys/powerpc/mpc85xx/mpc85xx_cache.cSat Jan 13 01:36:37 2018 > (r327906) > @@ -0,0 +1,129 @@ > +/*- > + * Copyright (c) 2018 Justin Hibbits > + * All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * 1. Redistributions of source code must retain the above copyright > + *notice, this list of conditions and the following disclaimer. > + * 2. Redistributions in binary form must reproduce the above copyright > + *notice, this list of conditions and the following disclaimer in the > + *documentation and/or other materials provided with the distribution. > + * > + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND > + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR > PURPOSE > + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE > + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR > CONSEQUENTIAL > + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS > + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) > + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, > STRICT > + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY > WAY > + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF > + * SUCH DAMAGE. > + * > + * $FreeBSD$ > + */ > + > Can we please add SPDX ID tags, specially on new code? I had them added to the guidelines: https://www.freebsd.org/doc/en_US.ISO8859-1/articles/committ ers-guide/pref-license.html It is just not fun for me anymore to go hunting for untagged files and they keep appearing ;). Pedro. D'oh, sorry. I had used an existing boilerplate template I have lying around that didn't have the SPDX tags. I'll update and fix this. - Justin ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r327928 - head/sys/powerpc/mpc85xx
Author: jhibbits Date: Sat Jan 13 17:25:48 2018 New Revision: 327928 URL: https://svnweb.freebsd.org/changeset/base/327928 Log: Add SPDX identifier to header Reported by: pfg Modified: head/sys/powerpc/mpc85xx/mpc85xx_cache.c Modified: head/sys/powerpc/mpc85xx/mpc85xx_cache.c == --- head/sys/powerpc/mpc85xx/mpc85xx_cache.cSat Jan 13 17:21:45 2018 (r327927) +++ head/sys/powerpc/mpc85xx/mpc85xx_cache.cSat Jan 13 17:25:48 2018 (r327928) @@ -1,4 +1,6 @@ /*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * * Copyright (c) 2018 Justin Hibbits * All rights reserved. * ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r327943 - head/sys/powerpc/mpc85xx
Author: jhibbits
Date: Sat Jan 13 21:10:42 2018
New Revision: 327943
URL: https://svnweb.freebsd.org/changeset/base/327943
Log:
Include only the headers needed
The extra headers came through evolution of the file.
Modified:
head/sys/powerpc/mpc85xx/mpc85xx_cache.c
Modified: head/sys/powerpc/mpc85xx/mpc85xx_cache.c
==
--- head/sys/powerpc/mpc85xx/mpc85xx_cache.cSat Jan 13 21:08:38 2018
(r327942)
+++ head/sys/powerpc/mpc85xx/mpc85xx_cache.cSat Jan 13 21:10:42 2018
(r327943)
@@ -32,21 +32,12 @@
__FBSDID("$FreeBSD$");
#include
-#include
-#include
#include
#include
#include
-#include
-#include
-#include
-#include
#include
-#include
-#include
-#include
#include
#include
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svn commit: r328040 - head/sys/powerpc/mpc85xx
Author: jhibbits
Date: Tue Jan 16 04:50:23 2018
New Revision: 328040
URL: https://svnweb.freebsd.org/changeset/base/328040
Log:
Make fsl_sata driver work on P1022
P1022 SATA controller may set the wrong CCR bit for a command completion.
This would previously cause an interrupt storm. Solve this by marking all
commands complete, and letting the end_transaction deal with the successes.
Causes no problems on P5020.
While here, fix a minor bug in collision detection. The Freescale SATA
controller only has 16 slots, not 32.
Modified:
head/sys/powerpc/mpc85xx/fsl_sata.c
Modified: head/sys/powerpc/mpc85xx/fsl_sata.c
==
--- head/sys/powerpc/mpc85xx/fsl_sata.c Tue Jan 16 03:02:41 2018
(r328039)
+++ head/sys/powerpc/mpc85xx/fsl_sata.c Tue Jan 16 04:50:23 2018
(r328040)
@@ -822,11 +822,15 @@ fsl_sata_intr_main(struct fsl_sata_channel *ch, uint32
/* Complete all successful commands. */
ok = ATA_INL(ch->r_mem, FSL_SATA_P_CCR);
- if (ch->aslots == 0)
+ /* Mark all commands complete, to complete the interrupt. */
+ ATA_OUTL(ch->r_mem, FSL_SATA_P_CCR, ok);
+ if (ch->aslots == 0 && ok != 0) {
for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) {
if (((ok >> i) & 1) && ch->slot[i].ccb != NULL)
- fsl_sata_end_transaction(&ch->slot[i],
FSL_SATA_ERR_NONE);
+ fsl_sata_end_transaction(&ch->slot[i],
+ FSL_SATA_ERR_NONE);
}
+ }
/* Read command statuses. */
if (istatus & FSL_SATA_P_HSTS_SNTFU)
sntf = ATA_INL(ch->r_mem, FSL_SATA_P_SNTF);
@@ -882,8 +886,7 @@ fsl_sata_check_collision(struct fsl_sata_channel *ch,
if ((ccb->ccb_h.func_code == XPT_ATA_IO) &&
(ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) {
/* Tagged command while we have no supported tag free. */
- if (((~ch->oslots) & (0x >> (32 -
- ch->curr[t].tags))) == 0)
+ if (((~ch->oslots) & (0x >> (16 - ch->curr[t].tags))) == 0)
return (1);
/* Tagged command while untagged are active. */
if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0)
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svn commit: r328269 - head/sys/powerpc/include
Author: jhibbits Date: Tue Jan 23 02:52:12 2018 New Revision: 328269 URL: https://svnweb.freebsd.org/changeset/base/328269 Log: Fix 64-bit booke kernel builds after the ldscript changes Commits r326203 and r326978 broke 64-bit booke kernels by introducing a 1MB zero-pad between the ELF header and the start of the kernel. This didn't cause a build failure, but caused kernels to need to be loaded into memory 1MB lower, which could easily break scripts expecting previous behavior. This change matches the similar change made to AIM in r327358. Modified: head/sys/powerpc/include/vmparam.h Modified: head/sys/powerpc/include/vmparam.h == --- head/sys/powerpc/include/vmparam.h Tue Jan 23 02:29:39 2018 (r328268) +++ head/sys/powerpc/include/vmparam.h Tue Jan 23 02:52:12 2018 (r328269) @@ -134,9 +134,9 @@ #ifdef __powerpc64__ #ifndef LOCORE -#defineKERNBASE0xc000UL/* start of kernel virtual */ +#defineKERNBASE0xc100UL/* start of kernel virtual */ #else -#defineKERNBASE0xc000 /* start of kernel virtual */ +#defineKERNBASE0xc100 /* start of kernel virtual */ #endif #else #defineKERNBASE0xc000 /* start of kernel virtual */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r328424 - head/sys/compat/linuxkpi/common/src
Author: jhibbits
Date: Fri Jan 26 00:56:09 2018
New Revision: 328424
URL: https://svnweb.freebsd.org/changeset/base/328424
Log:
Minimal change to build linuxkpi on architectures with physical addresses
larger
than virtual
Summary:
Some architectures have physical/bus addresses that are much larger
than virtual addresses. This change just quiets a warning, as DMAP is not
used
on those architectures, and on 64-bit platforms uintptr_t is the same size as
vm_paddr_t and void *.
Reviewed By: hselasky
MFC after:1 week
Differential Revision:https://reviews.freebsd.org/D14043
Modified:
head/sys/compat/linuxkpi/common/src/linux_page.c
Modified: head/sys/compat/linuxkpi/common/src/linux_page.c
==
--- head/sys/compat/linuxkpi/common/src/linux_page.cFri Jan 26 00:45:40
2018(r328423)
+++ head/sys/compat/linuxkpi/common/src/linux_page.cFri Jan 26 00:56:09
2018(r328424)
@@ -69,7 +69,8 @@ linux_page_address(struct page *page)
if (page->object != kmem_object && page->object != kernel_object) {
return (PMAP_HAS_DMAP ?
- ((void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(page))) : NULL);
+ ((void *)(uintptr_t)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(page))) :
+ NULL);
}
return ((void *)(uintptr_t)(VM_MIN_KERNEL_ADDRESS +
IDX_TO_OFF(page->pindex)));
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svn commit: r328425 - head/sys/cam/ctl
Author: jhibbits
Date: Fri Jan 26 00:58:02 2018
New Revision: 328425
URL: https://svnweb.freebsd.org/changeset/base/328425
Log:
Minimum changes for ctl to build on architectures with non-matching physical
and
virtual address sizes
Summary:
Some architectures use physical addresses larger than virtual. This is the
minimal changeset needed to get CAM/CTL to build on these targets. No
functional changes. More changes would likely be needed for this to be fully
functional on said platforms, but they can be made when needed.
Reviewed By: mav, chuck
Differential Revision:https://reviews.freebsd.org/D14041
Modified:
head/sys/cam/ctl/ctl_frontend_cam_sim.c
head/sys/cam/ctl/scsi_ctl.c
Modified: head/sys/cam/ctl/ctl_frontend_cam_sim.c
==
--- head/sys/cam/ctl/ctl_frontend_cam_sim.c Fri Jan 26 00:56:09 2018
(r328424)
+++ head/sys/cam/ctl/ctl_frontend_cam_sim.c Fri Jan 26 00:58:02 2018
(r328425)
@@ -354,7 +354,7 @@ cfcs_datamove(union ctl_io *io)
case CAM_DATA_VADDR:
cam_sglist = &cam_sg_entry;
cam_sglist[0].ds_len = ccb->csio.dxfer_len;
- cam_sglist[0].ds_addr = (bus_addr_t)ccb->csio.data_ptr;
+ cam_sglist[0].ds_addr =
(bus_addr_t)(uintptr_t)ccb->csio.data_ptr;
cam_sg_count = 1;
cam_sg_start = 0;
cam_sg_offset = io->scsiio.kern_rel_offset;
@@ -382,7 +382,7 @@ cfcs_datamove(union ctl_io *io)
len_to_copy = MIN(cam_sglist[i].ds_len - cam_watermark,
ctl_sglist[j].len - ctl_watermark);
- cam_ptr = (uint8_t *)cam_sglist[i].ds_addr;
+ cam_ptr = (uint8_t *)(uintptr_t)cam_sglist[i].ds_addr;
cam_ptr = cam_ptr + cam_watermark;
if (io->io_hdr.flags & CTL_FLAG_BUS_ADDR) {
/*
Modified: head/sys/cam/ctl/scsi_ctl.c
==
--- head/sys/cam/ctl/scsi_ctl.c Fri Jan 26 00:56:09 2018(r328424)
+++ head/sys/cam/ctl/scsi_ctl.c Fri Jan 26 00:58:02 2018(r328425)
@@ -728,7 +728,7 @@ ctlfedata(struct ctlfe_lun_softc *softc, union ctl_io
cam_sglist = cmd_info->cam_sglist;
*dxfer_len = 0;
for (i = 0; i < io->scsiio.kern_sg_entries - idx; i++) {
- cam_sglist[i].ds_addr = (bus_addr_t)ctl_sglist[i +
idx].addr + off;
+ cam_sglist[i].ds_addr =
(bus_addr_t)(uintptr_t)ctl_sglist[i + idx].addr + off;
if (ctl_sglist[i + idx].len - off <= bus_softc->maxio -
*dxfer_len) {
cam_sglist[i].ds_len = ctl_sglist[idx + i].len
- off;
*dxfer_len += cam_sglist[i].ds_len;
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svn commit: r328516 - head/sys/powerpc/powerpc
Author: jhibbits
Date: Sun Jan 28 19:18:40 2018
New Revision: 328516
URL: https://svnweb.freebsd.org/changeset/base/328516
Log:
Consolidate trap instruction checks to a single function
Summary:
Rather than duplicating the checks for programmatic traps all over the code,
put
it all in one function. This helps to remove some of the #ifdefs between AIM
and Book-E.
Reviewed By: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D14082
Modified:
head/sys/powerpc/powerpc/trap.c
Modified: head/sys/powerpc/powerpc/trap.c
==
--- head/sys/powerpc/powerpc/trap.c Sun Jan 28 18:38:17 2018
(r328515)
+++ head/sys/powerpc/powerpc/trap.c Sun Jan 28 19:18:40 2018
(r328516)
@@ -183,6 +183,16 @@ trapname(u_int vector)
return ("unknown");
}
+static inline bool
+frame_is_trap_inst(struct trapframe *frame)
+{
+#ifdef AIM
+ return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
+#else
+ return (frame->exc == EXC_DEBUG || frame->cpu.booke.esr & ESR_PTR);
+#endif
+}
+
void
trap(struct trapframe *frame)
{
@@ -323,11 +333,7 @@ trap(struct trapframe *frame)
case EXC_PGM:
/* Identify the trap reason */
-#ifdef AIM
- if (frame->srr1 & EXC_PGM_TRAP) {
-#else
- if (frame->cpu.booke.esr & ESR_PTR) {
-#endif
+ if (frame_is_trap_inst(frame)) {
#ifdef KDTRACE_HOOKS
inst = fuword32((const void *)frame->srr0);
if (inst == 0x0FFF &&
@@ -371,11 +377,7 @@ trap(struct trapframe *frame)
switch (type) {
case EXC_PGM:
#ifdef KDTRACE_HOOKS
-#ifdef AIM
- if (frame->srr1 & EXC_PGM_TRAP) {
-#else
- if (frame->cpu.booke.esr & ESR_PTR) {
-#endif
+ if (frame_is_trap_inst(frame)) {
if (*(uint32_t *)frame->srr0 == EXC_DTRACE) {
if (dtrace_invop_jump_addr != NULL) {
dtrace_invop_jump_addr(frame);
@@ -886,13 +888,7 @@ db_trap_glue(struct trapframe *frame)
if (!(frame->srr1 & PSL_PR)
&& (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
-#ifdef AIM
- || (frame->exc == EXC_PGM
- && (frame->srr1 & EXC_PGM_TRAP))
-#else
- || (frame->exc == EXC_DEBUG)
- || (frame->cpu.booke.esr & ESR_PTR)
-#endif
+ || frame_is_trap_inst(frame)
|| frame->exc == EXC_BPT
|| frame->exc == EXC_DSI)) {
int type = frame->exc;
@@ -900,12 +896,7 @@ db_trap_glue(struct trapframe *frame)
/* Ignore DTrace traps. */
if (*(uint32_t *)frame->srr0 == EXC_DTRACE)
return (0);
-#ifdef AIM
- if (type == EXC_PGM && (frame->srr1 & EXC_PGM_TRAP)) {
-#else
- if (type == EXC_DEBUG ||
- (frame->cpu.booke.esr & ESR_PTR)) {
-#endif
+ if (frame_is_trap_inst(frame)) {
type = T_BREAKPOINT;
}
return (kdb_trap(type, 0, frame));
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svn commit: r328518 - head/sys/powerpc/conf
Author: jhibbits Date: Sun Jan 28 20:35:48 2018 New Revision: 328518 URL: https://svnweb.freebsd.org/changeset/base/328518 Log: Start building modules for QORIQ64 There's no reason not to build modules for 64-bit QorIQ devices. This config has evolved to be analogous to the AIM GENERIC64 kernel, so will grow to match it in more ways as well. Modified: head/sys/powerpc/conf/QORIQ64 Modified: head/sys/powerpc/conf/QORIQ64 == --- head/sys/powerpc/conf/QORIQ64 Sun Jan 28 19:37:30 2018 (r328517) +++ head/sys/powerpc/conf/QORIQ64 Sun Jan 28 20:35:48 2018 (r328518) @@ -15,7 +15,6 @@ include "dpaa/config.dpaa" makeoptionsDEBUG=-g#Build kernel with gdb(1) debug symbols makeoptionsWITH_CTF=1 makeoptionsWERROR="-Werror -Wno-format -Wno-redundant-decls" -makeoptionsNO_MODULES=yes optionsFPU_EMU ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r331347 - in head: etc/mtree include sys/conf sys/dev/tcp_log sys/kern sys/netinet usr.bin/netstat
On Thu, Mar 22, 2018 at 3:44 PM, Andriy Gapon wrote: > On 22/03/2018 17:39, Jonathan Looney wrote: >> A tinderbox build didn't complain about atomic_fetchadd_64, so I assume it >> is OK. >> >> Yes, this can be made optional, if there is a need for that. >> > > FWWI, TARGET=powerpc TARGET_ARCH=powerpc build failed for me. > > cc1: warnings being treated as errors > /usr/devel/svn/head/sys/netinet/tcp_log_buf.c: In function > 'tcp_log_selectauto': > /usr/devel/svn/head/sys/netinet/tcp_log_buf.c:286: warning: implicit > declaration > of function 'atomic_fetchadd_64' > /usr/devel/svn/head/sys/netinet/tcp_log_buf.c:286: warning: nested extern > declaration of 'atomic_fetchadd_64' [-Wnested-externs] > > -- > Andriy Gapon > mips complains, too. Check out https://ci.freebsd.org/tinderbox . - Justin ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r331369 - head/sys/vm
This broke gcc builds.
On Thu, Mar 22, 2018 at 2:21 PM, Jeff Roberson wrote:
> Author: jeff
> Date: Thu Mar 22 19:21:11 2018
> New Revision: 331369
> URL: https://svnweb.freebsd.org/changeset/base/331369
>
> Log:
> Lock reservations with a dedicated lock in each reservation. Protect the
> vmd_free_count with atomics.
>
> This allows us to allocate and free from reservations without the free lock
> except where a superpage is allocated from the physical layer, which is
> roughly 1/512 of the operations on amd64.
>
> Use the counter api to eliminate cache conention on counters.
>
> Reviewed by: markj
> Tested by:pho
> Sponsored by: Netflix, Dell/EMC Isilon
> Differential Revision:https://reviews.freebsd.org/D14707
>
> Modified:
> head/sys/vm/vm_page.c
> head/sys/vm/vm_pagequeue.h
> head/sys/vm/vm_reserv.c
> head/sys/vm/vm_reserv.h
>
> Modified: head/sys/vm/vm_page.c
> ==
> --- head/sys/vm/vm_page.c Thu Mar 22 19:11:43 2018(r331368)
> +++ head/sys/vm/vm_page.c Thu Mar 22 19:21:11 2018(r331369)
> @@ -177,7 +177,6 @@ static uma_zone_t fakepg_zone;
> static void vm_page_alloc_check(vm_page_t m);
> static void vm_page_clear_dirty_mask(vm_page_t m, vm_page_bits_t pagebits);
> static void vm_page_enqueue(uint8_t queue, vm_page_t m);
> -static void vm_page_free_phys(struct vm_domain *vmd, vm_page_t m);
> static void vm_page_init(void *dummy);
> static int vm_page_insert_after(vm_page_t m, vm_object_t object,
> vm_pindex_t pindex, vm_page_t mpred);
> @@ -1677,10 +1676,10 @@ vm_page_alloc_after(vm_object_t object, vm_pindex_t pi
> * for the request class and false otherwise.
> */
> int
> -vm_domain_available(struct vm_domain *vmd, int req, int npages)
> +vm_domain_allocate(struct vm_domain *vmd, int req, int npages)
> {
> + u_int limit, old, new;
>
> - vm_domain_free_assert_locked(vmd);
> req = req & VM_ALLOC_CLASS_MASK;
>
> /*
> @@ -1688,15 +1687,34 @@ vm_domain_available(struct vm_domain *vmd, int req, in
> */
> if (curproc == pageproc && req != VM_ALLOC_INTERRUPT)
> req = VM_ALLOC_SYSTEM;
> + if (req == VM_ALLOC_INTERRUPT)
> + limit = 0;
> + else if (req == VM_ALLOC_SYSTEM)
> + limit = vmd->vmd_interrupt_free_min;
> + else
> + limit = vmd->vmd_free_reserved;
>
> - if (vmd->vmd_free_count >= npages + vmd->vmd_free_reserved ||
> - (req == VM_ALLOC_SYSTEM &&
> - vmd->vmd_free_count >= npages + vmd->vmd_interrupt_free_min) ||
> - (req == VM_ALLOC_INTERRUPT &&
> - vmd->vmd_free_count >= npages))
> - return (1);
> + /*
> +* Attempt to reserve the pages. Fail if we're below the limit.
> +*/
> + limit += npages;
> + old = vmd->vmd_free_count;
> + do {
> + if (old < limit)
> + return (0);
> + new = old - npages;
> + } while (atomic_fcmpset_int(&vmd->vmd_free_count, &old, new) == 0);
>
> - return (0);
> + /* Wake the page daemon if we've crossed the threshold. */
> + if (vm_paging_needed(vmd, new) && !vm_paging_needed(vmd, old))
> + pagedaemon_wakeup(vmd->vmd_domain);
> +
> + /* Only update bitsets on transitions. */
> + if ((old >= vmd->vmd_free_min && new < vmd->vmd_free_min) ||
> + (old >= vmd->vmd_free_severe && new < vmd->vmd_free_severe))
> + vm_domain_set(vmd);
> +
> + return (1);
> }
>
> vm_page_t
> @@ -1723,44 +1741,34 @@ vm_page_alloc_domain_after(vm_object_t object, vm_pind
> again:
> m = NULL;
> #if VM_NRESERVLEVEL > 0
> + /*
> +* Can we allocate the page from a reservation?
> +*/
> if (vm_object_reserv(object) &&
> - (m = vm_reserv_extend(req, object, pindex, domain, mpred))
> - != NULL) {
> + ((m = vm_reserv_extend(req, object, pindex, domain, mpred)) !=
> NULL ||
> + (m = vm_reserv_alloc_page(req, object, pindex, domain, mpred)) !=
> NULL)) {
> domain = vm_phys_domain(m);
> vmd = VM_DOMAIN(domain);
> goto found;
> }
> #endif
> vmd = VM_DOMAIN(domain);
> - vm_domain_free_lock(vmd);
> - if (vm_domain_available(vmd, req, 1)) {
> + if (vm_domain_allocate(vmd, req, 1)) {
> /*
> -* Can we allocate the page from a reservation?
> +* If not, allocate it from the free page queues.
> */
> + vm_domain_free_lock(vmd);
> + m = vm_phys_alloc_pages(domain, object != NULL ?
> + VM_FREEPOOL_DEFAULT : VM_FREEPOOL_DIRECT, 0);
> + vm_domain_free_unlock(vmd);
> + if (m == NULL) {
> + vm_domain_freecnt_in
svn commit: r331401 - head/sys/powerpc/powerpc
Author: jhibbits
Date: Fri Mar 23 00:40:08 2018
New Revision: 331401
URL: https://svnweb.freebsd.org/changeset/base/331401
Log:
Debug interrupts aren't instruction traps
The EXC_DEBUG type is akin to the MPC74xx "Instruction Breakpoint" trap.
Don't treat it as a trap instruction.
Modified:
head/sys/powerpc/powerpc/trap.c
Modified: head/sys/powerpc/powerpc/trap.c
==
--- head/sys/powerpc/powerpc/trap.c Fri Mar 23 00:20:42 2018
(r331400)
+++ head/sys/powerpc/powerpc/trap.c Fri Mar 23 00:40:08 2018
(r331401)
@@ -189,7 +189,7 @@ frame_is_trap_inst(struct trapframe *frame)
#ifdef AIM
return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP);
#else
- return (frame->exc == EXC_DEBUG || frame->cpu.booke.esr & ESR_PTR);
+ return ((frame->cpu.booke.esr & ESR_PTR) != 0);
#endif
}
@@ -895,6 +895,7 @@ db_trap_glue(struct trapframe *frame)
&& (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
|| frame_is_trap_inst(frame)
|| frame->exc == EXC_BPT
+ || frame->exc == EXC_DEBUG
|| frame->exc == EXC_DSI)) {
int type = frame->exc;
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svn commit: r331658 - head/sys/conf
Author: jhibbits Date: Wed Mar 28 03:11:50 2018 New Revision: 331658 URL: https://svnweb.freebsd.org/changeset/base/331658 Log: Fix another optional standard. Build openpic_ofw again. Modified: head/sys/conf/files.powerpc Modified: head/sys/conf/files.powerpc == --- head/sys/conf/files.powerpc Wed Mar 28 03:07:02 2018(r331657) +++ head/sys/conf/files.powerpc Wed Mar 28 03:11:50 2018(r331658) @@ -158,7 +158,7 @@ powerpc/ofw/ofw_real.c optionalaim powerpc/ofw/ofw_syscons.c optionalsc aim powerpc/ofw/ofwcall32.Soptionalaim powerpc powerpc/ofw/ofwcall64.Soptionalaim powerpc64 -powerpc/ofw/openpic_ofw.c optionalstandard +powerpc/ofw/openpic_ofw.c standard powerpc/ofw/rtas.c optionalaim powerpc/powermac/ata_kauai.c optionalpowermac ata | powermac atamacio powerpc/powermac/ata_macio.c optionalpowermac ata | powermac atamacio ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r331900 - in head/sys/powerpc: booke include
Author: jhibbits
Date: Tue Apr 3 00:45:38 2018
New Revision: 331900
URL: https://svnweb.freebsd.org/changeset/base/331900
Log:
Add support for a pmap direct map for 64-bit Book-E
As with AIM64, map the DMAP at the beginning of the fourth "quadrant" of
memory, and move the KERNBASE to the the start of KVA.
Eventually we may run the kernel out of the DMAP, but for now, continue
booting as it has been.
Modified:
head/sys/powerpc/booke/pmap.c
head/sys/powerpc/include/vmparam.h
Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c Mon Apr 2 23:44:12 2018
(r331899)
+++ head/sys/powerpc/booke/pmap.c Tue Apr 3 00:45:38 2018
(r331900)
@@ -1724,7 +1724,11 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_o
debugf("mmu_booke_bootstrap: entered\n");
/* Set interesting system properties */
+#ifdef __powerpc64__
+ hw_direct_map = 1;
+#else
hw_direct_map = 0;
+#endif
#if defined(COMPAT_FREEBSD32) || !defined(__powerpc64__)
elf32_nxstack = 1;
#endif
@@ -1970,6 +1974,15 @@ mmu_booke_bootstrap(mmu_t mmu, vm_offset_t start, vm_o
debugf("phys_avail_count = %d\n", phys_avail_count);
debugf("physsz = 0x%09jx physmem = %jd (0x%09jx)\n",
(uintmax_t)physsz, (uintmax_t)physmem, (uintmax_t)physmem);
+
+#ifdef __powerpc64__
+ /*
+* Map the physical memory contiguously in TLB1.
+* Round so it fits into a single mapping.
+*/
+ tlb1_mapin_region(DMAP_BASE_ADDRESS, 0,
+ phys_avail[i + 1]);
+#endif
/***/
/* Initialize (statically allocated) kernel pmap. */
Modified: head/sys/powerpc/include/vmparam.h
==
--- head/sys/powerpc/include/vmparam.h Mon Apr 2 23:44:12 2018
(r331899)
+++ head/sys/powerpc/include/vmparam.h Tue Apr 3 00:45:38 2018
(r331900)
@@ -106,13 +106,8 @@
#defineFREEBSD32_USRSTACK FREEBSD32_SHAREDPAGE
#ifdef __powerpc64__
-#ifdef AIM
#defineVM_MIN_KERNEL_ADDRESS 0xe000UL
#defineVM_MAX_KERNEL_ADDRESS 0xe001c7ffUL
-#else
-#defineVM_MIN_KERNEL_ADDRESS 0xc000UL
-#defineVM_MAX_KERNEL_ADDRESS 0xc001c7ffUL
-#endif
#defineVM_MAX_SAFE_KERNEL_ADDRESS VM_MAX_KERNEL_ADDRESS
#endif
@@ -135,9 +130,9 @@
#ifdef __powerpc64__
#ifndef LOCORE
-#defineKERNBASE0xc100UL/* start of kernel
virtual */
+#defineKERNBASE0xe100UL/* start of kernel
virtual */
#else
-#defineKERNBASE0xc100 /* start of kernel
virtual */
+#defineKERNBASE0xe100 /* start of kernel
virtual */
#endif
#else
#defineKERNBASE0xc000 /* start of kernel
virtual */
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svn commit: r331970 - head/sys/powerpc/booke
Author: jhibbits
Date: Wed Apr 4 02:13:27 2018
New Revision: 331970
URL: https://svnweb.freebsd.org/changeset/base/331970
Log:
Correct the ilog2() for calculating memory sizes.
TLB1 can handle ranges up to 4GB (through e5500, larger in e6500), but
ilog2() took a unsigned int, which maxes out at 4GB-1, but truncates
silently. Increase the input range to the largest supported, at least for
64-bit targets. This lets the DMAP be completely mapped, instead of only
1GB blocks with it assuming being fully mapped.
Modified:
head/sys/powerpc/booke/pmap.c
Modified: head/sys/powerpc/booke/pmap.c
==
--- head/sys/powerpc/booke/pmap.c Wed Apr 4 02:00:10 2018
(r331969)
+++ head/sys/powerpc/booke/pmap.c Wed Apr 4 02:13:27 2018
(r331970)
@@ -234,7 +234,7 @@ static vm_size_t tlb1_mapin_region(vm_offset_t, vm_pad
static vm_size_t tsize2size(unsigned int);
static unsigned int size2tsize(vm_size_t);
-static unsigned int ilog2(unsigned int);
+static unsigned int ilog2(unsigned long);
static void set_mas4_defaults(void);
@@ -4020,12 +4020,17 @@ tlb1_write_entry(tlb_entry_t *e, unsigned int idx)
* Return the largest uint value log such that 2^log <= num.
*/
static unsigned int
-ilog2(unsigned int num)
+ilog2(unsigned long num)
{
- int lz;
+ long lz;
+#ifdef __powerpc64__
+ __asm ("cntlzd %0, %1" : "=r" (lz) : "r" (num));
+ return (63 - lz);
+#else
__asm ("cntlzw %0, %1" : "=r" (lz) : "r" (num));
return (31 - lz);
+#endif
}
/*
@@ -4163,7 +4168,8 @@ tlb1_mapin_region(vm_offset_t va, vm_paddr_t pa, vm_si
for (idx = 0; idx < nents; idx++) {
pgsz = pgs[idx];
- debugf("%u: %llx -> %x, size=%x\n", idx, pa, va, pgsz);
+ debugf("%u: %llx -> %jx, size=%jx\n", idx, pa,
+ (uintmax_t)va, (uintmax_t)pgsz);
tlb1_set_entry(va, pa, pgsz,
_TLB_ENTRY_SHARED | _TLB_ENTRY_MEM);
pa += pgsz;
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svn commit: r332286 - head/sys/powerpc/ofw
Author: jhibbits
Date: Sun Apr 8 16:43:56 2018
New Revision: 332286
URL: https://svnweb.freebsd.org/changeset/base/332286
Log:
powerpc/ofw: Fix malloc inside lock
Summary:
Currently ofw_real_bounce_alloc() is requesting memory, using WAITOK, holding
a
non-sleepable locks, called 'OF Bounce Page'.
Fix this by allocating the pages outside of the lock, and only updating the
global variables while holding the lock.
Submitted by: Breno Leitao
Differential Revision:https://reviews.freebsd.org/D14955
Modified:
head/sys/powerpc/ofw/ofw_real.c
Modified: head/sys/powerpc/ofw/ofw_real.c
==
--- head/sys/powerpc/ofw/ofw_real.c Sun Apr 8 16:34:10 2018
(r332285)
+++ head/sys/powerpc/ofw/ofw_real.c Sun Apr 8 16:43:56 2018
(r332286)
@@ -197,6 +197,8 @@ ofw_real_stop(void)
static void
ofw_real_bounce_alloc(void *junk)
{
+ caddr_t temp;
+
/*
* Check that ofw_real is actually in use before allocating wads
* of memory. Do this by checking if our mutex has been set up.
@@ -208,12 +210,15 @@ ofw_real_bounce_alloc(void *junk)
* Allocate a page of contiguous, wired physical memory that can
* fit into a 32-bit address space and accessed from real mode.
*/
+ temp = contigmalloc(4 * PAGE_SIZE, M_OFWREAL, 0, 0,
+ ulmin(platform_real_maxaddr(), BUS_SPACE_MAXADDR_32BIT), PAGE_SIZE,
+ 4 * PAGE_SIZE);
+ if (temp == NULL)
+ panic("%s: Not able to allocated contiguous memory\n",
__func__);
mtx_lock(&of_bounce_mtx);
- of_bounce_virt = contigmalloc(4 * PAGE_SIZE, M_OFWREAL, 0, 0,
- ulmin(platform_real_maxaddr(), BUS_SPACE_MAXADDR_32BIT), PAGE_SIZE,
- 4 * PAGE_SIZE);
+ of_bounce_virt = temp;
of_bounce_phys = vtophys(of_bounce_virt);
of_bounce_size = 4 * PAGE_SIZE;
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svn commit: r332287 - head/sys/powerpc/powerpc
Author: jhibbits Date: Sun Apr 8 16:46:24 2018 New Revision: 332287 URL: https://svnweb.freebsd.org/changeset/base/332287 Log: powerpc64: Avoid calling isync twice Summary: It is not necessary to call isync() after calling mtmsr() function, mainly because the mtmsr() calls 'isync' internally to synchronize the machine state register. Other than that, isync() just calls the 'isync' instruction, thus, the 'isync' instruction is being called twice, and that seems to be unnecessary. This patch just remove the unecessary calls to isync() after mtmsr(). Submitted by: Breno Leitao Differential Revision: https://reviews.freebsd.org/D14583 Modified: head/sys/powerpc/powerpc/altivec.c head/sys/powerpc/powerpc/cpu.c head/sys/powerpc/powerpc/fpu.c Modified: head/sys/powerpc/powerpc/altivec.c == --- head/sys/powerpc/powerpc/altivec.c Sun Apr 8 16:43:56 2018 (r332286) +++ head/sys/powerpc/powerpc/altivec.c Sun Apr 8 16:46:24 2018 (r332287) @@ -58,7 +58,6 @@ save_vec_int(struct thread *td) */ msr = mfmsr(); mtmsr(msr | PSL_VEC); - isync(); /* * Save the vector registers and VSCR to the PCB @@ -120,7 +119,6 @@ enable_vec(struct thread *td) */ msr = mfmsr(); mtmsr(msr | PSL_VEC); - isync(); /* * Restore VSCR by first loading it into a vector and then into VSCR. Modified: head/sys/powerpc/powerpc/cpu.c == --- head/sys/powerpc/powerpc/cpu.c Sun Apr 8 16:43:56 2018 (r332286) +++ head/sys/powerpc/powerpc/cpu.c Sun Apr 8 16:46:24 2018 (r332287) @@ -710,7 +710,6 @@ cpu_idle_60x(sbintime_t sbt) default: powerpc_sync(); mtmsr(msr | PSL_POW); - isync(); break; } #endif @@ -739,7 +738,6 @@ cpu_idle_booke(sbintime_t sbt) default: powerpc_sync(); mtmsr(msr | PSL_WE); - isync(); break; } #endif Modified: head/sys/powerpc/powerpc/fpu.c == --- head/sys/powerpc/powerpc/fpu.c Sun Apr 8 16:43:56 2018 (r332286) +++ head/sys/powerpc/powerpc/fpu.c Sun Apr 8 16:46:24 2018 (r332287) @@ -87,7 +87,6 @@ enable_fpu(struct thread *td) mtmsr(msr | PSL_FP | PSL_VSX); else mtmsr(msr | PSL_FP); - isync(); /* * Load the floating point registers and FPSCR from the PCB. @@ -143,7 +142,6 @@ save_fpu(struct thread *td) mtmsr(msr | PSL_FP | PSL_VSX); else mtmsr(msr | PSL_FP); - isync(); /* * Save the floating-point registers and FPSCR to the PCB ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332289 - head/sys/powerpc/powerpc
Author: jhibbits
Date: Sun Apr 8 16:55:28 2018
New Revision: 332289
URL: https://svnweb.freebsd.org/changeset/base/332289
Log:
powerpc64: Print current MSR on printtrap()
Summary:
Print current MSR on printtrap(). Currently, printtrap just prints srr1, which
contains part of the MSR prior to the exception. I find useful to dump the
current value of the MSR, since it changes when there is an interruption.
With this patch, this is the new printtrap model:
handled user trap:
exception = 0x700 (program)
srr0= 0x18a0 (0x18a0)
srr1= 0x8002f032
current msr = 0x80009032
lr = 0x189c (0x189c)
curthread = 0x7a5
pid = 714, comm = ttrap2
Submitted by: Breno Leitao
Reviewed by: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D14600
Modified:
head/sys/powerpc/powerpc/trap.c
Modified: head/sys/powerpc/powerpc/trap.c
==
--- head/sys/powerpc/powerpc/trap.c Sun Apr 8 16:54:07 2018
(r332288)
+++ head/sys/powerpc/powerpc/trap.c Sun Apr 8 16:55:28 2018
(r332289)
@@ -507,6 +507,7 @@ printtrap(u_int vector, struct trapframe *frame, int i
printf(" srr0= 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE));
printf(" srr1= 0x%lx\n", (u_long)frame->srr1);
+ printf(" current msr = 0x%" PRIxPTR "\n", mfmsr());
printf(" lr = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n",
frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE));
printf(" curthread = %p\n", curthread);
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svn commit: r332296 - in head/sys/powerpc: include powerpc
Author: jhibbits
Date: Sun Apr 8 19:11:25 2018
New Revision: 332296
URL: https://svnweb.freebsd.org/changeset/base/332296
Log:
Powerpc64: Add the facility unavailable trap subsystem
Summary:
This code adds the basic infrastructure for the facility subsystem. A facility
trap is raised when an unavailable instruction is executed. One example is
executing a Hardware Transactional Memory instruction while the MSR[TM] is
disabled. In the past, there was a specific interrupt for it (FP, VEC), but
the
new instructions seem to be multiplexed on this facility interrupt.
The root cause of the trap is provided on Facility Status and Control Register
(FSCR) register.
Submitted by: Breno Leitao
Reviewed by: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D14566
Modified:
head/sys/powerpc/include/spr.h
head/sys/powerpc/powerpc/trap.c
Modified: head/sys/powerpc/include/spr.h
==
--- head/sys/powerpc/include/spr.h Sun Apr 8 17:23:33 2018
(r332295)
+++ head/sys/powerpc/include/spr.h Sun Apr 8 19:11:25 2018
(r332296)
@@ -120,6 +120,20 @@
#defineSPR_EIE 0x050 /* ..8 Exception Interrupt ???
*/
#defineSPR_EID 0x051 /* ..8 Exception Interrupt ???
*/
#defineSPR_NRI 0x052 /* ..8 Exception Interrupt ???
*/
+#defineSPR_FSCR0x099 /* Facility Status and Control
Register */
+#define FSCR_IC_MASK 0xFF00ULL /* FSCR[0:7] is
Interrupt Cause */
+#define FSCR_IC_FP 0xULL /* FP unavailable */
+#define FSCR_IC_VSX 0x0100ULL /* VSX unavailable */
+#define FSCR_IC_DSCR 0x0200ULL /* Access to the DSCR
at SPRs 3 or 17 */
+#define FSCR_IC_PM 0x0300ULL /* Read or write access
of a Performance Monitor SPR in group A */
+#define FSCR_IC_BHRB 0x0400ULL /* Execution of a BHRB
Instruction */
+#define FSCR_IC_HTM 0x0500ULL /* Access to a
Transactional Memory */
+/* Reserved 0x0500ULL */
+#define FSCR_IC_EBB 0x0700ULL /* Access to
Event-Based Branch */
+#define FSCR_IC_TAR 0x0800ULL /* Access to Target
Address Register */
+#define FSCR_IC_STOP 0x0900ULL /* Access to the 'stop'
instruction in privileged non-hypervisor state */
+#define FSCR_IC_MSG 0x0A00ULL /* Access to 'msgsndp'
or 'msgclrp' instructions */
+#define FSCR_IC_SCV 0x0C00ULL /* Execution of a 'scv'
instruction */
#defineSPR_USPRG0 0x100 /* 4.. User SPR General 0 */
#defineSPR_VRSAVE 0x100 /* .6. AltiVec VRSAVE */
#defineSPR_SPRG0 0x110 /* 468 SPR General 0 */
Modified: head/sys/powerpc/powerpc/trap.c
==
--- head/sys/powerpc/powerpc/trap.c Sun Apr 8 17:23:33 2018
(r332295)
+++ head/sys/powerpc/powerpc/trap.c Sun Apr 8 19:11:25 2018
(r332296)
@@ -204,6 +204,7 @@ trap(struct trapframe *frame)
int sig, type, user;
u_int ucode;
ksiginfo_t ksi;
+ register_t fscr;
VM_CNT_INC(v_trap);
@@ -294,6 +295,13 @@ trap(struct trapframe *frame)
break;
case EXC_FAC:
+ fscr = mfspr(SPR_FSCR);
+ if ((fscr & FSCR_IC_MASK) == FSCR_IC_HTM) {
+ CTR0(KTR_TRAP, "Hardware Transactional Memory
subsystem disabled");
+ }
+ sig = SIGILL;
+ ucode = ILL_ILLOPC;
+ break;
case EXC_HEA:
sig = SIGILL;
ucode = ILL_ILLOPC;
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svn commit: r332299 - head/sys/powerpc/include
Author: jhibbits Date: Sun Apr 8 19:33:05 2018 New Revision: 332299 URL: https://svnweb.freebsd.org/changeset/base/332299 Log: Fix typo Reserved cause is 6, not 5. Reported by: cem Modified: head/sys/powerpc/include/spr.h Modified: head/sys/powerpc/include/spr.h == --- head/sys/powerpc/include/spr.h Sun Apr 8 19:24:49 2018 (r332298) +++ head/sys/powerpc/include/spr.h Sun Apr 8 19:33:05 2018 (r332299) @@ -128,7 +128,7 @@ #define FSCR_IC_PM 0x0300ULL /* Read or write access of a Performance Monitor SPR in group A */ #define FSCR_IC_BHRB 0x0400ULL /* Execution of a BHRB Instruction */ #define FSCR_IC_HTM 0x0500ULL /* Access to a Transactional Memory */ -/* Reserved 0x0500ULL */ +/* Reserved 0x0600ULL */ #define FSCR_IC_EBB 0x0700ULL /* Access to Event-Based Branch */ #define FSCR_IC_TAR 0x0800ULL /* Access to Target Address Register */ #define FSCR_IC_STOP 0x0900ULL /* Access to the 'stop' instruction in privileged non-hypervisor state */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332383 - head/sys/powerpc/booke
Author: jhibbits Date: Tue Apr 10 17:32:27 2018 New Revision: 332383 URL: https://svnweb.freebsd.org/changeset/base/332383 Log: Call through powerpc_interrupt for all Book-E interrupts Make int_external_input, int_decrementer, and int_performance_counter all now use trap_common, just like on AIM. The effects of this are: * All traps are now properly displayed in ddb. Previously traps from external input, decrementer, and performance counters, would display as just basic stack traces. Now the frame is displayed. * External interrupts are now handled with interrupts enabled, so handling can be preempted. This seems to fix a hang found post-r329882. Modified: head/sys/powerpc/booke/trap_subr.S Modified: head/sys/powerpc/booke/trap_subr.S == --- head/sys/powerpc/booke/trap_subr.S Tue Apr 10 17:00:37 2018 (r332382) +++ head/sys/powerpc/booke/trap_subr.S Tue Apr 10 17:32:27 2018 (r332383) @@ -563,11 +563,7 @@ INTERRUPT(int_instr_storage) INTERRUPT(int_external_input) STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_EXI) - GET_TOCBASE(%r2) - addi%r3, %r1, CALLSIZE - bl CNAME(powerpc_interrupt) - TOC_RESTORE - b trapexit + b trap_common INTERRUPT(int_alignment) @@ -603,11 +599,7 @@ INTERRUPT(int_syscall) INTERRUPT(int_decrementer) STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_DECR) - GET_TOCBASE(%r2) - addi%r3, %r1, CALLSIZE - bl CNAME(powerpc_interrupt) - TOC_RESTORE - b trapexit + b trap_common /* @@ -653,11 +645,7 @@ INTERRUPT(int_vecast) INTERRUPT(int_performance_counter) STANDARD_PROLOG(SPR_SPRG3, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) FRAME_SETUP(SPR_SPRG3, PC_TEMPSAVE, EXC_PERF) - GET_TOCBASE(%r2) - addi%r3, %r1, CALLSIZE - bl CNAME(powerpc_interrupt) - TOC_RESTORE - b trapexit + b trap_common #endif @@ -1002,7 +990,7 @@ trap_common: /* Call C trap dispatcher */ GET_TOCBASE(%r2) addi%r3, %r1, CALLSIZE - bl CNAME(trap) + bl CNAME(powerpc_interrupt) TOC_RESTORE .globl CNAME(trapexit) /* exported for db_backtrace use */ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332393 - head/sys/powerpc/powerpc
Author: jhibbits
Date: Tue Apr 10 21:14:54 2018
New Revision: 332393
URL: https://svnweb.freebsd.org/changeset/base/332393
Log:
Reenter KDB on fault on powerpc, instead of panicking
Most other architectures already re-enter KDB on faults, powerpc and mips
are the only outliers. Correct this for powerpc, so that now bad addresses
can be handled gracefully instead of panicking.
Modified:
head/sys/powerpc/powerpc/trap.c
Modified: head/sys/powerpc/powerpc/trap.c
==
--- head/sys/powerpc/powerpc/trap.c Tue Apr 10 20:31:25 2018
(r332392)
+++ head/sys/powerpc/powerpc/trap.c Tue Apr 10 21:14:54 2018
(r332393)
@@ -208,6 +208,13 @@ trap(struct trapframe *frame)
VM_CNT_INC(v_trap);
+#ifdef KDB
+ if (kdb_active) {
+ kdb_reenter();
+ return;
+ }
+#endif
+
td = curthread;
p = td->td_proc;
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Re: svn commit: r332423 - in head/sys: conf dev/cxgbe dev/ixgbe dev/ixl dev/netmap dev/re modules/netmap net sys
On Thu, Apr 12, 2018 at 2:20 AM, Vincenzo Maffione wrote: > Author: vmaffione > Date: Thu Apr 12 07:20:50 2018 > New Revision: 332423 > URL: https://svnweb.freebsd.org/changeset/base/332423 > > Log: > netmap: align codebase to the current upstream (commit id 3fb001303718146) > > Changelist: > - Turn tx_rings and rx_rings arrays into arrays of pointers to kring > structs. This patch includes fixes for ixv, ixl, ix, re, cxgbe, iflib, > vtnet and ptnet drivers to cope with the change. > - Generalize the nm_config() callback to accept a struct containing many > parameters. > - Introduce NKR_FAKERING to support buffers sharing (used for netmap > pipes) > - Improved API for external VALE modules. > - Various bug fixes and improvements to the netmap memory allocator, > including support for externally (userspace) allocated memory. > - Refactoring of netmap pipes: now linked rings share the same netmap > buffers, with a separate set of kring pointers (rhead, rcur, rtail). > Buffer swapping does not need to happen anymore. > - Large refactoring of the control API towards an extensible solution; > the goal is to allow the addition of more commands and extension of > existing ones (with new options) without the need of hacks or the > risk of running out of configuration space. > A new NIOCCTRL ioctl has been added to handle all the requests of the > new control API, which cover all the functionalities so far supported. > The netmap API bumps from 11 to 12 with this patch. Full backward > compatibility is provided for the old control command (NIOCREGIF), by > means of a new netmap_legacy module. Many parts of the old netmap.h > header has now been moved to netmap_legacy.h (included by netmap.h). > > Approved by: hrs (mentor) > > Added: > head/sys/dev/netmap/netmap_legacy.c (contents, props changed) > head/sys/net/netmap_legacy.h (contents, props changed) > Modified: > head/sys/conf/files > head/sys/dev/cxgbe/t4_netmap.c > head/sys/dev/ixgbe/if_ixv.c > head/sys/dev/ixl/ixl_pf_main.c > head/sys/dev/ixl/ixl_txrx.c > head/sys/dev/netmap/if_ptnet.c > head/sys/dev/netmap/if_re_netmap.h > head/sys/dev/netmap/if_vtnet_netmap.h > head/sys/dev/netmap/netmap.c > head/sys/dev/netmap/netmap_freebsd.c > head/sys/dev/netmap/netmap_generic.c > head/sys/dev/netmap/netmap_kern.h > head/sys/dev/netmap/netmap_mem2.c > head/sys/dev/netmap/netmap_mem2.h > head/sys/dev/netmap/netmap_monitor.c > head/sys/dev/netmap/netmap_pipe.c > head/sys/dev/netmap/netmap_pt.c > head/sys/dev/netmap/netmap_vale.c > head/sys/dev/re/if_re.c > head/sys/modules/netmap/Makefile > head/sys/net/iflib.c > head/sys/net/netmap.h > head/sys/net/netmap_user.h > head/sys/net/netmap_virt.h > head/sys/sys/param.h This breaks 32-bit powerpc LINT, with errors of: /usr/src/sys/dev/netmap/netmap.c: In function 'netmap_get_na': /usr/src/sys/dev/netmap/netmap.c:1479: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] /usr/src/sys/dev/netmap/netmap.c: In function 'netmap_ioctl': /usr/src/sys/dev/netmap/netmap.c:2329: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] /usr/src/sys/dev/netmap/netmap.c:2344: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] /usr/src/sys/dev/netmap/netmap.c:2447: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] /usr/src/sys/dev/netmap/netmap.c:2466: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] among others. struct nmreq_header->nr_body is a uint64_t, casting to 32-bit pointers needs to go through uintptr_t. - Justin ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332546 - head/sys/powerpc/mpc85xx
Author: jhibbits
Date: Mon Apr 16 04:02:53 2018
New Revision: 332546
URL: https://svnweb.freebsd.org/changeset/base/332546
Log:
Use a resource hint instead of environment variable for DIU mode
This makes it more consistent with FreeBSD norms, rather than using Linux's
norms. Now, instead of needing an environment variable
video-mode=fslfb:1280x1024@60
Now one would use a hint:
hint.fb.0.mode=1280x1024@60
Modified:
head/sys/powerpc/mpc85xx/fsl_diu.c
Modified: head/sys/powerpc/mpc85xx/fsl_diu.c
==
--- head/sys/powerpc/mpc85xx/fsl_diu.c Mon Apr 16 03:58:08 2018
(r332545)
+++ head/sys/powerpc/mpc85xx/fsl_diu.c Mon Apr 16 04:02:53 2018
(r332546)
@@ -363,12 +363,9 @@ diu_attach(device_t dev)
/* TODO: Eventually, allow EDID to be dynamically provided. */
if (OF_getprop_alloc(node, "edid", &edid_cells) <= 0) {
- /*
-* u-boot uses the environment variable name 'video-mode', so
-* just use the same name here. Should allow another variable
-* that better fits our design model, but this is fine.
-*/
- if ((vm_name = kern_getenv("video-mode")) == NULL) {
+ /* Get a resource hint: hint.fb.N.mode */
+ if (resource_string_value(device_get_name(dev),
+ device_get_unit(dev), "mode", &vm_name) != 0) {
device_printf(dev,
"No EDID data and no video-mode env set\n");
return (ENXIO);
@@ -383,7 +380,7 @@ diu_attach(device_t dev)
videomode = edid.edid_preferred_mode;
} else {
/* Parse video-mode kenv variable. */
- if ((err = sscanf(vm_name, "fslfb:%dx%d@%d", &w, &h, &r)) != 3)
{
+ if ((err = sscanf(vm_name, "%dx%d@%d", &w, &h, &r)) != 3) {
device_printf(dev,
"Cannot parse video mode: %s\n", vm_name);
return (ENXIO);
___
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svn commit: r332807 - in head/sys/powerpc: include powerpc
Author: jhibbits
Date: Fri Apr 20 03:19:44 2018
New Revision: 332807
URL: https://svnweb.freebsd.org/changeset/base/332807
Log:
powerpc64: Add DSCR support
Summary:
Powerpc64 has support for a register called Data Stream Control Register
(DSCR), which basically controls how the hardware controls the caching and
prefetch for stream operations.
Since mfdscr and mtdscr are privileged instructions, we need to emulate them,
and
keep the custom DSCR configuration per thread.
The purpose of this feature is to change DSCR depending on the operation, set
to DSCR Default Prefetch Depth to deepest on string operations, as memcpy.
Submitted by: Breno Leitao
Differential Revision: https://reviews.freebsd.org/D15081
Modified:
head/sys/powerpc/include/pcb.h
head/sys/powerpc/include/spr.h
head/sys/powerpc/powerpc/exec_machdep.c
head/sys/powerpc/powerpc/genassym.c
head/sys/powerpc/powerpc/swtch64.S
Modified: head/sys/powerpc/include/pcb.h
==
--- head/sys/powerpc/include/pcb.h Fri Apr 20 03:11:51 2018
(r332806)
+++ head/sys/powerpc/include/pcb.h Fri Apr 20 03:19:44 2018
(r332807)
@@ -46,14 +46,16 @@ struct pcb {
register_t pcb_sp; /* stack pointer */
register_t pcb_toc;/* toc pointer */
register_t pcb_lr; /* link register */
+ register_t pcb_dscr; /* dscr value */
struct pmap *pcb_pm; /* pmap of our vmspace */
jmp_buf *pcb_onfault; /* For use during
copyin/copyout */
int pcb_flags;
-#definePCB_FPU 1 /* Process uses FPU */
-#definePCB_FPREGS 2 /* Process had FPU registers
initialized */
-#definePCB_VEC 4 /* Process had Altivec initialized */
-#definePCB_VSX 8 /* Process had VSX initialized */
+#definePCB_FPU 0x1 /* Process uses FPU */
+#definePCB_FPREGS 0x2 /* Process had FPU registers
initialized */
+#definePCB_VEC 0x4 /* Process had Altivec initialized */
+#definePCB_VSX 0x8 /* Process had VSX initialized */
+#definePCB_CDSCR 0x10/* Process had Custom DSCR initialized
*/
struct fpu {
union {
double fpr;
Modified: head/sys/powerpc/include/spr.h
==
--- head/sys/powerpc/include/spr.h Fri Apr 20 03:11:51 2018
(r332806)
+++ head/sys/powerpc/include/spr.h Fri Apr 20 03:19:44 2018
(r332807)
@@ -97,6 +97,7 @@
#defineSPR_RTCL_R 0x005 /* .6. 601 RTC Lower - Read */
#defineSPR_LR 0x008 /* 468 Link Register */
#defineSPR_CTR 0x009 /* 468 Count Register */
+#defineSPR_DSCR0x011 /* Data Stream Control Register
*/
#defineSPR_DSISR 0x012 /* .68 DSI exception source */
#define DSISR_DIRECT0x8000 /* Direct-store error
exception */
#define DSISR_NOTFOUND 0x4000 /* Translation not found */
Modified: head/sys/powerpc/powerpc/exec_machdep.c
==
--- head/sys/powerpc/powerpc/exec_machdep.c Fri Apr 20 03:11:51 2018
(r332806)
+++ head/sys/powerpc/powerpc/exec_machdep.c Fri Apr 20 03:19:44 2018
(r332807)
@@ -1021,11 +1021,46 @@ cpu_set_upcall(struct thread *td, void (*entry)(void *
td->td_retval[1] = 0;
}
+static int
+emulate_mfspr(int spr, int reg, struct trapframe *frame){
+ struct thread *td;
+
+ td = curthread;
+
+ if (spr == SPR_DSCR) {
+ // If DSCR was never set, get the default DSCR
+ if ((td->td_pcb->pcb_flags & PCB_CDSCR) == 0)
+ td->td_pcb->pcb_dscr = mfspr(SPR_DSCR);
+
+ frame->fixreg[reg] = td->td_pcb->pcb_dscr;
+ frame->srr0 += 4;
+ return 0;
+ } else
+ return SIGILL;
+}
+
+static int
+emulate_mtspr(int spr, int reg, struct trapframe *frame){
+ struct thread *td;
+
+ td = curthread;
+
+ if (spr == SPR_DSCR) {
+ td->td_pcb->pcb_flags |= PCB_CDSCR;
+ td->td_pcb->pcb_dscr = frame->fixreg[reg];
+ frame->srr0 += 4;
+ return 0;
+ } else
+ return SIGILL;
+}
+
+#define XFX 0xFC0007FF
int
ppc_instr_emulate(struct trapframe *frame, struct pcb *pcb)
{
uint32_t instr;
int reg, sig;
+ int rs, spr;
instr = fuword32((void *)frame->srr0);
sig = SIGILL;
@@ -1035,9 +1070,15 @@ ppc_instr_emulate(str
svn commit: r332808 - head/sys/powerpc/aim
Author: jhibbits Date: Fri Apr 20 03:23:19 2018 New Revision: 332808 URL: https://svnweb.freebsd.org/changeset/base/332808 Log: powerpc64: Set n_slbs = 32 for POWER9 Summary: POWER9 also contains 32 slbs entries as explained by the POWER9 User Manual: "For HPT translation, the POWER9 core contains a unified (combined for both instruction and data), 32-entry, fully-associative SLB per thread" Submitted by: Breno Leitao Differential Revision: https://reviews.freebsd.org/D15128 Modified: head/sys/powerpc/aim/aim_machdep.c Modified: head/sys/powerpc/aim/aim_machdep.c == --- head/sys/powerpc/aim/aim_machdep.c Fri Apr 20 03:19:44 2018 (r332807) +++ head/sys/powerpc/aim/aim_machdep.c Fri Apr 20 03:23:19 2018 (r332808) @@ -212,6 +212,7 @@ aim_early_init(vm_offset_t fdt, vm_offset_t toc, vm_of case IBMPOWER7PLUS: case IBMPOWER8: case IBMPOWER8E: + case IBMPOWER9: /* XXX: get from ibm,slb-size in device tree */ n_slbs = 32; break; ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
