Author: jhibbits Date: Thu Jun 21 14:30:14 2018 New Revision: 335483 URL: https://svnweb.freebsd.org/changeset/base/335483
Log: Add the rest of the files for r335481 Missed hooking PMCR cpufreq(4) to the build, and adding the SPR to the header. Modified: head/sys/conf/files.powerpc head/sys/powerpc/include/spr.h Modified: head/sys/conf/files.powerpc ============================================================================== --- head/sys/conf/files.powerpc Thu Jun 21 14:28:20 2018 (r335482) +++ head/sys/conf/files.powerpc Thu Jun 21 14:30:14 2018 (r335483) @@ -121,6 +121,7 @@ powerpc/booke/spe.c optional powerpcspe powerpc/cpufreq/dfs.c optional cpufreq powerpc/cpufreq/mpc85xx_jog.c optional cpufreq mpc85xx powerpc/cpufreq/pcr.c optional cpufreq aim +powerpc/cpufreq/pmcr.c optional cpufreq aim powerpc64 powerpc/cpufreq/pmufreq.c optional cpufreq aim pmu powerpc/fpu/fpu_add.c optional fpu_emu powerpc/fpu/fpu_compare.c optional fpu_emu Modified: head/sys/powerpc/include/spr.h ============================================================================== --- head/sys/powerpc/include/spr.h Thu Jun 21 14:28:20 2018 (r335482) +++ head/sys/powerpc/include/spr.h Thu Jun 21 14:30:14 2018 (r335483) @@ -384,6 +384,7 @@ #define SPR_MD_RAM0 0x339 /* ..8 IMMU RAM entry read reg 0 */ #define SPR_MD_RAM1 0x33a /* ..8 IMMU RAM entry read reg 1 */ #define SPR_PSSCR 0x357 /* Processor Stop Status and Control Register (ISA 3.0) */ +#define SPR_PMCR 0x374 /* Processor Management Control Register */ #define SPR_UMMCR2 0x3a0 /* .6. User Monitor Mode Control Register 2 */ #define SPR_UMMCR0 0x3a8 /* .6. User Monitor Mode Control Register 0 */ #define SPR_USIA 0x3ab /* .6. User Sampled Instruction Address */ _______________________________________________ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
