svn commit: r244899 - head/sys/mips/beri
Author: rwatson
Date: Mon Dec 31 11:06:37 2012
New Revision: 244899
URL: http://svnweb.freebsd.org/changeset/base/244899
Log:
If FDT is compiled into a FreeBSD/beri kernel, initialise OpenFirmware.
Sponsored by: DARPA, AFRL
Modified:
head/sys/mips/beri/beri_machdep.c
Modified: head/sys/mips/beri/beri_machdep.c
==
--- head/sys/mips/beri/beri_machdep.c Mon Dec 31 07:50:02 2012
(r244898)
+++ head/sys/mips/beri/beri_machdep.c Mon Dec 31 11:06:37 2012
(r244899)
@@ -1,7 +1,12 @@
/*-
* Copyright (c) 2006 Wojciech A. Koszek
+ * Copyright (c) 2012 Robert N. M. Watson
* All rights reserved.
*
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -27,6 +32,7 @@
__FBSDID("$FreeBSD$");
#include "opt_ddb.h"
+#include "opt_platform.h"
#include
#include
@@ -49,6 +55,9 @@ __FBSDID("$FreeBSD$");
#include
#include
+#include
+#include
+
#include
#include
#include
@@ -76,6 +85,17 @@ mips_init(void)
{
int i;
+#ifdef FDT
+#ifndef FDT_DTB_STATIC
+#error "mips_init with FDT requires FDT_DTB_STATIC"
+#endif
+
+ if (OF_install(OFW_FDT, 0) == FALSE)
+ while (1);
+ if (OF_init(&fdt_static_dtb) != 0)
+ while (1);
+#endif
+
for (i = 0; i < 10; i++) {
phys_avail[i] = 0;
}
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svn commit: r244900 - in head: . sys/sys
Author: bz Date: Mon Dec 31 11:22:55 2012 New Revision: 244900 URL: http://svnweb.freebsd.org/changeset/base/244900 Log: Happy New Year 2013! Modified: head/COPYRIGHT head/sys/sys/copyright.h Modified: head/COPYRIGHT == --- head/COPYRIGHT Mon Dec 31 11:06:37 2012(r244899) +++ head/COPYRIGHT Mon Dec 31 11:22:55 2012(r244900) @@ -4,7 +4,7 @@ The compilation of software known as FreeBSD is distributed under the following terms: -Copyright (c) 1992-2012 The FreeBSD Project. All rights reserved. +Copyright (c) 1992-2013 The FreeBSD Project. All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions Modified: head/sys/sys/copyright.h == --- head/sys/sys/copyright.hMon Dec 31 11:06:37 2012(r244899) +++ head/sys/sys/copyright.hMon Dec 31 11:22:55 2012(r244900) @@ -1,5 +1,5 @@ /*- - * Copyright (C) 1992-2012 The FreeBSD Project. All rights reserved. + * Copyright (C) 1992-2013 The FreeBSD Project. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -30,7 +30,7 @@ /* FreeBSD */ #define COPYRIGHT_FreeBSD \ - "Copyright (c) 1992-2012 The FreeBSD Project.\n" + "Copyright (c) 1992-2013 The FreeBSD Project.\n" /* Foundation */ #defineTRADEMARK_Foundation \ ___ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r244865 - in head: . lib lib/libdisk share/mk
On 12/31/12 00:18, Juli Mallett wrote: > On Sun, Dec 30, 2012 at 6:54 PM, Adrian Chadd wrote: >> .. not that I mind old things being retired, but we really should >> announce things like this. >> >> Also - you disconnected libftpio too; is that intentional? > I would assume so, given that this only removed the static library > name, which nothing else could be using still, seeing as how the > library was disconnected and removed in r225952. > >> Just because libdisk/libftpio isn't used by anything in the base -HEAD >> doesn't mean that: >> >> * it's not used by third party programs in ports; >> * it's not used by any external, non open source utilities that people >> have read. >> >> So I'd suggest creating a port for them both and begin the process of >> deprecating the kernel side interfaces that are unique to this API. > Pretty sure the addition of and widespread use of GEOM things > initiated the deprecation of the really lousy and properly-disliked > kernel interfaces involved. > On a similar note, I am extremely doubtful that any external code used libdisk. It was basically an internal detail of sysinstall with an interface that hadn't worked properly for a lot of applications in a very long time. The only evidence I can find that anyone used it for anything in the last decade is bug reports related to how it makes sysinstall crash in even slightly unusual circumstances. That said, I'm perfectly happy to add it back or make a port or something, but I'd prefer some evidence that it was ever used outside of sysinstall before doing that. I think some of the kernel interfaces (kern.geom.conftxt, for instance) have ended up being used in various shell scripts and so should probably stay. -Nathan -Nathan ___ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r244912 - head/sys/arm/arm
Author: gonzo
Date: Mon Dec 31 21:00:38 2012
New Revision: 244912
URL: http://svnweb.freebsd.org/changeset/base/244912
Log:
Merge r234561 from busdma_machdep.c to ARMv6 version of busdma:
Interrupts must be disabled while handling a partial cache line flush,
as otherwise the interrupt handling code may modify data in the non-DMA
part of the cache line while we have it stashed away in the temporary
stack buffer, then we end up restoring a stale value.
PR: 160431
Submitted by: Ian Lepore
Modified:
head/sys/arm/arm/busdma_machdep-v6.c
Modified: head/sys/arm/arm/busdma_machdep-v6.c
==
--- head/sys/arm/arm/busdma_machdep-v6.cMon Dec 31 16:52:52 2012
(r244911)
+++ head/sys/arm/arm/busdma_machdep-v6.cMon Dec 31 21:00:38 2012
(r244912)
@@ -1347,35 +1347,49 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus
while (sl != NULL) {
/* write back the unaligned portions */
vm_paddr_t physaddr;
+ register_t s = 0;
+
buf = sl->vaddr;
len = sl->datacount;
physaddr = sl->busaddr;
bbuf = buf & ~arm_dcache_align_mask;
ebuf = buf + len;
physaddr = physaddr & ~arm_dcache_align_mask;
- unalign = buf & arm_dcache_align_mask;
- if (unalign) {
- memcpy(_tmp_cl, (void *)bbuf, unalign);
- len += unalign; /* inv entire cache
line */
- }
- unalign = ebuf & arm_dcache_align_mask;
- if (unalign) {
- unalign = arm_dcache_align - unalign;
- memcpy(_tmp_clend, (void *)ebuf,
unalign);
- len += unalign; /* inv entire cache
line */
+
+
+ if ((buf & arm_dcache_align_mask) ||
+ (ebuf & arm_dcache_align_mask)) {
+ s = intr_disable();
+ unalign = buf & arm_dcache_align_mask;
+ if (unalign) {
+ memcpy(_tmp_cl, (void *)bbuf,
unalign);
+ len += unalign; /* inv entire
cache line */
+ }
+
+ unalign = ebuf & arm_dcache_align_mask;
+ if (unalign) {
+ unalign = arm_dcache_align -
unalign;
+ memcpy(_tmp_clend, (void
*)ebuf, unalign);
+ len += unalign; /* inv entire
cache line */
+ }
}
- /* inv are cache length aligned */
+
+ /* inv are cache length aligned */
cpu_dcache_inv_range(bbuf, len);
l2cache_inv_range(bbuf, physaddr, len);
- unalign = (vm_offset_t)buf &
arm_dcache_align_mask;
- if (unalign) {
- memcpy((void *)bbuf, _tmp_cl, unalign);
- }
- unalign = ebuf & arm_dcache_align_mask;
- if (unalign) {
- unalign = arm_dcache_align - unalign;
- memcpy((void *)ebuf, _tmp_clend,
unalign);
+ if ((buf & arm_dcache_align_mask) ||
+ (ebuf & arm_dcache_align_mask)) {
+ unalign = (vm_offset_t)buf &
arm_dcache_align_mask;
+ if (unalign)
+ memcpy((void *)bbuf, _tmp_cl,
unalign);
+
+ unalign = ebuf & arm_dcache_align_mask;
+ if (unalign)
+ memcpy((void *)ebuf, _tmp_clend,
+ arm_dcache_align - unalign);
+
+ intr_restore(s);
}
sl = STAILQ_NEXT(sl, slinks);
}
___
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svn commit: r244914 - in head/sys/arm: arm include ti/omap4
Author: gonzo
Date: Mon Dec 31 21:19:44 2012
New Revision: 244914
URL: http://svnweb.freebsd.org/changeset/base/244914
Log:
PL310 driver update:
- Add pl310.disable tunable to disable L2 cache altogether. In
order to make sure that it's 100% disabled we use cache event
counters for cache line eviction and read allocate events
and panic if any of these counters increased. This is purely
for debugging purpose
- Direct access DEBUG_CTRL and CTRL might be unavailable in
unsecure mode, so use platform-specific functions for
these registers
- Replace #if 1 with proper erratum numbers
- Add erratum 753970 workaround
- Remove wait function for atomic operations
- Protect cache operations with spin mutex in order to prevent race condition
- Disable instruction cache prefetch and make sure data cache
prefetch is enabled in OMAP4-specific intialization
Modified:
head/sys/arm/arm/pl310.c
head/sys/arm/include/pl310.h
head/sys/arm/ti/omap4/omap4_l2cache.c
head/sys/arm/ti/omap4/omap4_smc.h
Modified: head/sys/arm/arm/pl310.c
==
--- head/sys/arm/arm/pl310.cMon Dec 31 21:09:39 2012(r244913)
+++ head/sys/arm/arm/pl310.cMon Dec 31 21:19:44 2012(r244914)
@@ -39,62 +39,39 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
-#include
-#include
+
#include
+#include
#include
#include
#include
#include
-/**
- * PL310 - L2 Cache Controller register offsets.
- *
+/*
+ * Define this if you need to disable PL310 for debugging purpose
+ * Spec:
+ *
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246e/DDI0246E_l2c310_r3p1_trm.pdf
+ */
+
+/*
+ * Hardcode errata for now
+ *
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0246b/pr01s02s02.html
*/
-#define PL310_CACHE_ID 0x000
-#define PL310_CACHE_TYPE0x004
-#define PL310_CTRL 0x100
-#define PL310_AUX_CTRL 0x104
-#define PL310_EVENT_COUNTER_CTRL0x200
-#define PL310_EVENT_COUNTER1_CONF 0x204
-#define PL310_EVENT_COUNTER0_CONF 0x208
-#define PL310_EVENT_COUNTER1_VAL0x20C
-#define PL310_EVENT_COUNTER0_VAL0x210
-#define PL310_INTR_MASK 0x214
-#define PL310_MASKED_INTR_STAT 0x218
-#define PL310_RAW_INTR_STAT 0x21C
-#define PL310_INTR_CLEAR0x220
-#define PL310_CACHE_SYNC0x730
-#define PL310_INV_LINE_PA 0x770
-#define PL310_INV_WAY 0x77C
-#define PL310_CLEAN_LINE_PA 0x7B0
-#define PL310_CLEAN_LINE_IDX0x7B8
-#define PL310_CLEAN_WAY 0x7BC
-#define PL310_CLEAN_INV_LINE_PA 0x7F0
-#define PL310_CLEAN_INV_LINE_IDX0x7F8
-#define PL310_CLEAN_INV_WAY 0x7FC
-#define PL310_LOCKDOWN_D_WAY(x)(0x900 + ((x) * 8))
-#define PL310_LOCKDOWN_I_WAY(x)(0x904 + ((x) * 8))
-#define PL310_LOCKDOWN_LINE_ENABLE 0x950
-#define PL310_UNLOCK_ALL_LINES_WAY 0x954
-#define PL310_ADDR_FILTER_START 0xC00
-#define PL310_ADDR_FILTER_END 0xC04
-#define PL310_DEBUG_CTRL0xF40
-
-
-#define PL310_AUX_CTRL_MASK 0xcfff
-#define PL310_AUX_CTRL_ASSOCIATIVITY_SHIFT 16
-#define PL310_AUX_CTRL_WAY_SIZE_SHIFT17
-#define PL310_AUX_CTRL_WAY_SIZE_MASK (0x7 << 17)
-#define PL310_AUX_CTRL_SHARE_OVERRIDE_SHIFT 22
-#define PL310_AUX_CTRL_NS_LOCKDOWN_SHIFT 26
-#define PL310_AUX_CTRL_NS_INT_CTRL_SHIFT 27
-#define PL310_AUX_CTRL_DATA_PREFETCH_SHIFT 28
-#define PL310_AUX_CTRL_INSTR_PREFETCH_SHIFT 29
-#define PL310_AUX_CTRL_EARLY_BRESP_SHIFT 30
+#definePL310_ERRATA_588369
+#definePL310_ERRATA_753970
+#definePL310_ERRATA_727915
+
+#definePL310_LOCK(sc) do { \
+ mtx_lock_spin(&(sc)->sc_mtx); \
+} while(0);
+
+#definePL310_UNLOCK(sc) do { \
+ mtx_unlock_spin(&(sc)->sc_mtx); \
+} while(0);
+static int pl310_enabled = 1;
+TUNABLE_INT("pl310.enabled", &pl310_enabled);
void omap4_l2cache_wbinv_range(vm_paddr_t physaddr, vm_size_t size);
void omap4_l2cache_inv_range(vm_paddr_t physaddr, vm_size_t size);
@@ -112,34 +89,31 @@ static uint32_t g_l2cache_size;
static struct pl310_softc *pl310_softc;
-/**
- * pl310_read4 - read a 32-bit value from the PL310 registers
- * pl310_write4 - write a 32-bit value from the PL310 registers
- * @off: byte offset within the register set to read from
- * @val: the value to write into the register
- *
- *
- * LOCKING:
- * None
- *
- * RETURNS:
- * nothing in case of write function, if read function returns the value
read.
- */
-static __inline uint32_t
-pl310_read4(bus_size_t off)
-{
- return bus_read_4(pl310_softc->sc_mem_res, off);
-}
-static __inline void
-pl310_write4(bus_size_t off, uint32_t val)
+static int
+pl310_filter(void *arg)
{
- bus_write_4(pl310
Re: svn commit: r244914 - in head/sys/arm: arm include ti/omap4
On Mon, 31 Dec 2012 21:19:44 + (UTC)
Oleksandr Tymoshenko wrote:
> Modified: head/sys/arm/arm/pl310.c
> ==
> --- head/sys/arm/arm/pl310.c Mon Dec 31 21:09:39 2012
> (r244913) +++ head/sys/arm/arm/pl310.cMon Dec 31 21:19:44
...
> @@ -157,29 +131,46 @@ pl310_wait_background_op(uint32_t off, u
> static __inline void
> pl310_cache_sync(void)
> {
> - pl310_write4(PL310_CACHE_SYNC, 0);
> + if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)
> + return;
> +
> +#ifdef PL310_ERRATA_753970
> + /* Write uncached PL310 register */
> + pl310_write4(pl310_softc, 0x740, 0x);
> +#else
> + pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
> +#endif
> }
How hard would it be to detect if we need this errata at boot? From the
errata document it appears to only be present in the r3p0 revision of
the controller. We can then do something like:
#ifdef PL310_ERRATA_753970
if (errata_753970)
pl310_write4(pl310_softc, 0x740, 0x);
else
#endif
pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
Andrew
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svn commit: r244915 - head/share/mk
Author: markj
Date: Mon Dec 31 21:54:43 2012
New Revision: 244915
URL: http://svnweb.freebsd.org/changeset/base/244915
Log:
Explicitly specify that the beforelinking target depends on the
generated object files, ensuring that the beforelinking recipe won't be
executed until compilation has finished.
Also define SHLIB_NAME_FULL to denote ${SHLIB_NAME}.debug if
DEBUG_FILES is set and ${SHLIB_NAME} otherwise, which helps avoid
obfuscating the compilation and linking rules.
Reviewed by: emaste
Approved by: emaste (co-mentor)
Modified:
head/share/mk/bsd.lib.mk
head/share/mk/bsd.prog.mk
Modified: head/share/mk/bsd.lib.mk
==
--- head/share/mk/bsd.lib.mkMon Dec 31 21:19:44 2012(r244914)
+++ head/share/mk/bsd.lib.mkMon Dec 31 21:54:43 2012(r244915)
@@ -165,19 +165,22 @@ SOBJS+= ${OBJS:.o=.So}
.if defined(SHLIB_NAME)
_LIBS+=${SHLIB_NAME}
+.if defined(DEBUG_FLAGS)
+SHLIB_NAME_FULL=${SHLIB_NAME}.debug
+.else
+SHLIB_NAME_FULL=${SHLIB_NAME}
+.endif
+
SOLINKOPTS=-shared -Wl,-x
.if !defined(ALLOW_SHARED_TEXTREL)
SOLINKOPTS+= -Wl,--fatal-warnings -Wl,--warn-shared-textrel
.endif
.if target(beforelinking)
-${SHLIB_NAME}: beforelinking
-.endif
-.if defined(DEBUG_FLAGS)
-${SHLIB_NAME}.debug: ${SOBJS}
-.else
-${SHLIB_NAME}: ${SOBJS}
+beforelinking: ${SOBJS}
+${SHLIB_NAME_FULL}: beforelinking
.endif
+${SHLIB_NAME_FULL}: ${SOBJS}
@${ECHO} building shared library ${SHLIB_NAME}
@rm -f ${SHLIB_NAME} ${SHLIB_LINK}
.if defined(SHLIB_LINK)
@@ -197,12 +200,12 @@ ${SHLIB_NAME}: ${SOBJS}
.endif
.if defined(DEBUG_FLAGS)
-${SHLIB_NAME}: ${SHLIB_NAME}.debug ${SHLIB_NAME}.symbols
+${SHLIB_NAME}: ${SHLIB_NAME_FULL} ${SHLIB_NAME}.symbols
${OBJCOPY} --strip-debug --add-gnu-debuglink=${SHLIB_NAME}.symbols \
- ${SHLIB_NAME}.debug ${.TARGET}
+ ${SHLIB_NAME_FULL} ${.TARGET}
-${SHLIB_NAME}.symbols: ${SHLIB_NAME}.debug
- ${OBJCOPY} --only-keep-debug ${SHLIB_NAME}.debug ${.TARGET}
+${SHLIB_NAME}.symbols: ${SHLIB_NAME_FULL}
+ ${OBJCOPY} --only-keep-debug ${SHLIB_NAME_FULL} ${.TARGET}
.endif
.endif
Modified: head/share/mk/bsd.prog.mk
==
--- head/share/mk/bsd.prog.mk Mon Dec 31 21:19:44 2012(r244914)
+++ head/share/mk/bsd.prog.mk Mon Dec 31 21:54:43 2012(r244915)
@@ -46,6 +46,7 @@ PROG= ${PROG_CXX}
OBJS+= ${SRCS:N*.h:R:S/$/.o/g}
.if target(beforelinking)
+beforelinking: ${OBJS}
${PROG}: beforelinking
.endif
${PROG}: ${OBJS}
@@ -75,6 +76,7 @@ SRCS= ${PROG}.c
OBJS= ${PROG}.o
.if target(beforelinking)
+beforelinking: ${OBJS}
${PROG}: beforelinking
.endif
${PROG}: ${OBJS}
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Re: svn commit: r244914 - in head/sys/arm: arm include ti/omap4
On 12/31/2012 1:53 PM, Andrew Turner wrote:
On Mon, 31 Dec 2012 21:19:44 + (UTC)
Oleksandr Tymoshenko wrote:
Modified: head/sys/arm/arm/pl310.c
==
--- head/sys/arm/arm/pl310.cMon Dec 31 21:09:39 2012
(r244913) +++ head/sys/arm/arm/pl310.c Mon Dec 31 21:19:44
...
@@ -157,29 +131,46 @@ pl310_wait_background_op(uint32_t off, u
static __inline void
pl310_cache_sync(void)
{
- pl310_write4(PL310_CACHE_SYNC, 0);
+ if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)
+ return;
+
+#ifdef PL310_ERRATA_753970
+ /* Write uncached PL310 register */
+ pl310_write4(pl310_softc, 0x740, 0x);
+#else
+ pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
+#endif
}
How hard would it be to detect if we need this errata at boot? From the
errata document it appears to only be present in the r3p0 revision of
the controller. We can then do something like:
#ifdef PL310_ERRATA_753970
if (errata_753970)
pl310_write4(pl310_softc, 0x740, 0x);
else
#endif
pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
I think we can use RTL release field of Cache ID register to determine
actual hardware release
and act accordingly.
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svn commit: r244916 - head/sys/boot/fdt/dts
Author: gonzo
Date: Mon Dec 31 22:48:54 2012
New Revision: 244916
URL: http://svnweb.freebsd.org/changeset/base/244916
Log:
Add interrupt for PL310 controller
Modified:
head/sys/boot/fdt/dts/pandaboard.dts
Modified: head/sys/boot/fdt/dts/pandaboard.dts
==
--- head/sys/boot/fdt/dts/pandaboard.dtsMon Dec 31 21:54:43 2012
(r244915)
+++ head/sys/boot/fdt/dts/pandaboard.dtsMon Dec 31 22:48:54 2012
(r244916)
@@ -67,6 +67,8 @@
pl310@48242000 {
compatible = "arm,pl310";
reg = < 0x48242000 0x1000 >;
+ interrupts = < 32 >;
+ interrupt-parent = < &GIC >;
};
mp_tmr@48240200 {
compatible = "arm,mpcore-timers";
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svn commit: r244919 - head/sys/arm/include
Author: andrew Date: Tue Jan 1 03:48:39 2013 New Revision: 244919 URL: http://svnweb.freebsd.org/changeset/base/244919 Log: Document the known values of the RTL release field in the cache is register Modified: head/sys/arm/include/pl310.h Modified: head/sys/arm/include/pl310.h == --- head/sys/arm/include/pl310.hTue Jan 1 00:45:28 2013 (r244918) +++ head/sys/arm/include/pl310.hTue Jan 1 03:48:39 2013 (r244919) @@ -37,8 +37,16 @@ #define PL310_CACHE_ID 0x000 #defineCACHE_ID_RELEASE_SHIFT 0 #defineCACHE_ID_RELEASE_MASK 0x3f +#defineCACHE_ID_RELEASE_r0p0 0x00 +#defineCACHE_ID_RELEASE_r1p0 0x02 +#defineCACHE_ID_RELEASE_r2p0 0x04 +#defineCACHE_ID_RELEASE_r3p0 0x05 +#defineCACHE_ID_RELEASE_r3p1 0x06 +#defineCACHE_ID_RELEASE_r3p2 0x08 +#defineCACHE_ID_RELEASE_r3p3 0x09 #defineCACHE_ID_PARTNUM_SHIFT 6 #defineCACHE_ID_PARTNUM_MASK 0xf +#defineCACHE_ID_PARTNUM_VALUE 0x3 #define PL310_CACHE_TYPE 0x004 #define PL310_CTRL 0x100 #defineCTRL_ENABLED0x01 ___ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r244914 - in head/sys/arm: arm include ti/omap4
On Mon, 31 Dec 2012 14:18:19 -0800
Oleksandr Tymoshenko wrote:
> On 12/31/2012 1:53 PM, Andrew Turner wrote:
> > On Mon, 31 Dec 2012 21:19:44 + (UTC)
> > Oleksandr Tymoshenko wrote:
> >> Modified: head/sys/arm/arm/pl310.c
> >> ==
> >> --- head/sys/arm/arm/pl310.c Mon Dec 31 21:09:39 2012
> >> (r244913) +++ head/sys/arm/arm/pl310.c Mon Dec 31 21:19:44
> > ...
> >> @@ -157,29 +131,46 @@ pl310_wait_background_op(uint32_t off, u
> >> static __inline void
> >> pl310_cache_sync(void)
> >> {
> >> - pl310_write4(PL310_CACHE_SYNC, 0);
> >> + if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)
> >> + return;
> >> +
> >> +#ifdef PL310_ERRATA_753970
> >> + /* Write uncached PL310 register */
> >> + pl310_write4(pl310_softc, 0x740, 0x);
> >> +#else
> >> + pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
> >> +#endif
> >> }
> > How hard would it be to detect if we need this errata at boot? From
> > the errata document it appears to only be present in the r3p0
> > revision of the controller. We can then do something like:
> >
> > #ifdef PL310_ERRATA_753970
> > if (errata_753970)
> > pl310_write4(pl310_softc, 0x740, 0x);
> > else
> > #endif
> > pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
> >
> >
>
>
> I think we can use RTL release field of Cache ID register to
> determine actual hardware release
> and act accordingly.
>
>
Yes, that appears to be correct, I have committed the known values of
the RTL release field, from the ARM documentation, in r244919. I can
have a look at detecting which cache controller we are on and adjust
our behaviour accordingly but won't have any hardware to test with
until the end of the week.
Andrew
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Re: svn commit: r244914 - in head/sys/arm: arm include ti/omap4
On Tue, 1 Jan 2013 16:59:15 +1300
Andrew Turner wrote:
> On Mon, 31 Dec 2012 14:18:19 -0800
> Oleksandr Tymoshenko wrote:
> > I think we can use RTL release field of Cache ID register to
> > determine actual hardware release
> > and act accordingly.
> >
> >
> Yes, that appears to be correct, I have committed the known values of
> the RTL release field, from the ARM documentation, in r244919. I can
> have a look at detecting which cache controller we are on and adjust
> our behaviour accordingly but won't have any hardware to test with
> until the end of the week.
I have this untested patch that should only enable the errata when we
detect it is required.
AndrewIndex: sys/arm/include/pl310.h
===
--- sys/arm/include/pl310.h (revision 244919)
+++ sys/arm/include/pl310.h (working copy)
@@ -131,6 +131,7 @@ struct pl310_softc {
void* sc_irq_h;
int sc_enabled;
struct mtx sc_mtx;
+ u_int sc_rtl_revision;
};
/**
Index: sys/arm/arm/pl310.c
===
--- sys/arm/arm/pl310.c (revision 244918)
+++ sys/arm/arm/pl310.c (working copy)
@@ -135,11 +135,12 @@ pl310_cache_sync(void)
return;
#ifdef PL310_ERRATA_753970
- /* Write uncached PL310 register */
- pl310_write4(pl310_softc, 0x740, 0x);
-#else
- pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
+ if (sc->sc_rtl_release == CACHE_ID_RELEASE_r3p0)
+ /* Write uncached PL310 register */
+ pl310_write4(pl310_softc, 0x740, 0x);
+ else
#endif
+ pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0x);
}
@@ -152,13 +153,17 @@ pl310_wbinv_all(void)
PL310_LOCK(pl310_softc);
#ifdef PL310_ERRATA_727915
- platform_pl310_write_debug(pl310_softc, 3);
+ if (sc->sc_rtl_release == CACHE_ID_RELEASE_r2p0 ||
+ sc->sc_rtl_release == CACHE_ID_RELEASE_r3p0)
+ platform_pl310_write_debug(pl310_softc, 3);
#endif
pl310_write4(pl310_softc, PL310_CLEAN_INV_WAY, g_l2cache_way_mask);
pl310_wait_background_op(PL310_CLEAN_INV_WAY, g_l2cache_way_mask);
pl310_cache_sync();
#ifdef PL310_ERRATA_727915
- platform_pl310_write_debug(pl310_softc, 0);
+ if (sc->sc_rtl_release == CACHE_ID_RELEASE_r2p0 ||
+ sc->sc_rtl_release == CACHE_ID_RELEASE_r3p0)
+ platform_pl310_write_debug(pl310_softc, 0);
#endif
PL310_UNLOCK(pl310_softc);
}
@@ -182,27 +187,32 @@ pl310_wbinv_range(vm_paddr_t start, vm_s
#ifdef PL310_ERRATA_727915
- platform_pl310_write_debug(pl310_softc, 3);
+ if (sc->sc_rtl_release == CACHE_ID_RELEASE_r2p0 ||
+ sc->sc_rtl_release == CACHE_ID_RELEASE_r3p0)
+ platform_pl310_write_debug(pl310_softc, 3);
#endif
while (size > 0) {
#ifdef PL310_ERRATA_588369
- /*
- * Errata 588369 says that clean + inv may keep the
- * cache line if it was clean, the recommanded workaround
- * is to clean then invalidate the cache line, with
- * write-back and cache linefill disabled
- */
-
- pl310_write4(pl310_softc, PL310_CLEAN_LINE_PA, start);
- pl310_write4(pl310_softc, PL310_INV_LINE_PA, start);
-#else
- pl310_write4(pl310_softc, PL310_CLEAN_INV_LINE_PA, start);
+ if (sc->sc_rtl_release <= CACHE_ID_RELEASE_r1p0) {
+ /*
+ * Errata 588369 says that clean + inv may keep the
+ * cache line if it was clean, the recommanded
+ * workaround is to clean then invalidate the cache
+ * line, with write-back and cache linefill disabled.
+ */
+ pl310_write4(pl310_softc, PL310_CLEAN_LINE_PA, start);
+ pl310_write4(pl310_softc, PL310_INV_LINE_PA, start);
+ } else
#endif
+ pl310_write4(pl310_softc, PL310_CLEAN_INV_LINE_PA,
+ start);
start += g_l2cache_line_size;
size -= g_l2cache_line_size;
}
#ifdef PL310_ERRATA_727915
- platform_pl310_write_debug(pl310_softc, 0);
+ if (sc->sc_rtl_release == CACHE_ID_RELEASE_r2p0 ||
+ sc->sc_rtl_release == CACHE_ID_RELEASE_r3p0)
+ platform_pl310_write_debug(pl310_softc, 0);
#endif
pl310_cache_sync();
@@ -307,6 +317,8 @@ pl310_attach(device_t dev)
pl310_filter, NULL, sc, &sc->sc_irq_h);
cache_id = pl310_read4(sc, PL310_CACHE_ID);
+ sc->sc_rtl_release = (cache_id >> CACHE_ID_RELEASE_SHIFT) &
+ CACHE_ID_RELEASE_MASK;
device_printf(dev, "Part number: 0x%x, release: 0x%x\n",
(cache_id >> CACHE_ID_PARTNUM_SHIFT) & CACHE_ID_PARTNUM_MASK,
(cache_id >> CACHE_ID_RELEASE_SHIFT) & CACHE_ID_RELEASE_MASK);
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