Re: [Sdcc-user] 8051-variant dev board recommendations
On 09.07.2016 09:25, Maarten Brock wrote: >> On 07.07.2016 05:42, Sab V wrote: >>> This may not meet all your requirements, but you should look at the FX2 >>> from cypress. >> >> FX2LP looks good: 16 KB shared data/code RAM. Free fxload tool (even >> already in Debian GNU/Linux). Cheap (approx. 10 € dev boards). AMD >> 80C521-like dual dptr. >> >> Philipp > > Yes, just no debugger. And the Cypress devkit is pretty expensive (~500 €). > I have some experience with using the FX2 with SDCC and libusb. > > Maarten And unfortunately, all currently available affordable boards use the 56-pin version of the FX2LP. Which means that no UART pins are exposed. Apparently there used to be cheap boards with the 100 and 128 pin versions by SainSmart and by ZTEX, but those are no longer available. Philipp -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
[Sdcc-user] FX2LP timer 1 issue
Hello,
I wrote my first little mcs51 program today, for the Cypress FX2LP. But
I encountered a problem: Timer 1 runs too fast. When I set up Timer 0
and Timer 1 the same, Timer 1 runs about 4 times faster.
I first noticed the problem when trying to do a software UART, which
worked with Tiemr 1, but not with Timer 2.
I have attached programs for a 2-bit counter on the LEDs of my board a
bits 0 and 1 of port A. With Timer 1, the counter increments once per
second.
I compile my programs using
sdcc -mmcs51 test2.c
and put them onto the FX2LP using
cycfx2prog prg:test2.ihx run
Philipp
#include
__sfr __at(0x80) IOA;
__sfr __at(0xb2) OEA;
__sfr __at(0x88) TCON;
__sfr __at(0x89) TMOD;
__sfr __at(0x8b) TL1;
__sfr __at(0x8d) TH1;
__sfr __at(0xa8) IE;
volatile unsigned long int clocktime;
volatile _Bool clockupdate;
void clockinc(void) __interrupt(3)
{
TH1 = (65536 - 1000) / 256;
TL1 = (65536 - 1000) % 256;
clocktime++;
clockupdate = true;
}
unsigned long int clock(void)
{
unsigned long int ctmp;
do
{
clockupdate = false;
ctmp = clocktime;
} while (clockupdate);
return(ctmp);
}
void main(void)
{
// Configure timer
// 1000 ticks per second
TH1 = (65536 - 1000) / 256;
TL1 = (65536 - 1000) % 256;
TMOD = 0x04;
IE |= 0x88;
TCON |= 0x40; // Start timer
OEA=0x03; // port A as output
for(;;)
IOA = ~(clock() / 1000) & 0x03;
}
#include
__sfr __at(0x80) IOA;
__sfr __at(0xb2) OEA;
__sfr __at(0x88) TCON;
__sfr __at(0x89) TMOD;
__sfr __at(0x8a) TL0;
__sfr __at(0x8c) TH0;
__sfr __at(0xa8) IE;
volatile unsigned long int clocktime;
volatile _Bool clockupdate;
void clockinc(void) __interrupt(1)
{
TH0 = (65536 - 1000) / 256;
TL0 = (65536 - 1000) % 256;
clocktime++;
clockupdate = true;
}
unsigned long int clock(void)
{
unsigned long int ctmp;
do
{
clockupdate = false;
ctmp = clocktime;
} while (clockupdate);
return(ctmp);
}
void main(void)
{
// Configure timer
// 1000 ticks per second
TH0 = (65536 - 1000) / 256;
TL0 = (65536 - 1000) % 256;
TMOD = 0x01;
IE |= 0x82;
TCON |= 0x10; // Start timer
OEA=0x03; // port A as output
for(;;)
IOA = ~(clock() / 1000) & 0x03;
}
--
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patterns at an interface-level. Reveals which users, apps, and protocols are
consuming the most bandwidth. Provides multi-vendor support for NetFlow,
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Re: [Sdcc-user] FX2LP timer 1 issue
On 15.08.2016 20:01, Philipp Klaus Krause wrote: > Hello, > > I wrote my first little mcs51 program today, for the Cypress FX2LP. But > I encountered a problem: Timer 1 runs too fast. When I set up Timer 0 > and Timer 1 the same, Timer 1 runs about 4 times faster. > > I first noticed the problem when trying to do a software UART, which > worked with Tiemr 1, but not with Timer 2. > > I have attached programs for a 2-bit counter on the LEDs of my board a > bits 0 and 1 of port A. With Timer 1, the counter increments once per > second. The previous two paragraphs were meant to be: I first noticed the problem when trying to do a software UART, which worked with Tiemer 0, but not with Timer 1. I have attached programs for a 2-bit counter on the LEDs of my board a bits 0 and 1 of port A. With Timer 0, the counter increments once per second. > I compile my programs using > sdcc -mmcs51 test2.c > and put them onto the FX2LP using > cycfx2prog prg:test2.ihx run > > Philipp -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
Re: [Sdcc-user] FX2LP timer 1 issue
> On 15.08.2016 20:01, Philipp Klaus Krause wrote: >> Hello, >> >> I wrote my first little mcs51 program today, for the Cypress FX2LP. But >> I encountered a problem: Timer 1 runs too fast. When I set up Timer 0 >> and Timer 1 the same, Timer 1 runs about 4 times faster. >> >> I first noticed the problem when trying to do a software UART, which >> worked with Tiemr 1, but not with Timer 2. >> >> I have attached programs for a 2-bit counter on the LEDs of my board a >> bits 0 and 1 of port A. With Timer 1, the counter increments once per >> second. > > The previous two paragraphs were meant to be: > > I first noticed the problem when trying to do a software UART, which > worked with Tiemer 0, but not with Timer 1. > > I have attached programs for a 2-bit counter on the LEDs of my board a > bits 0 and 1 of port A. With Timer 0, the counter increments once per > second. > >> I compile my programs using >> sdcc -mmcs51 test2.c >> and put them onto the FX2LP using >> cycfx2prog prg:test2.ihx run >> >> Philipp Hello Philipp, You did not set CKCON which selects the prescaler clk/4 or clk/12. T0M and T1M should be 0 after reset, but the loader may have left them differently. Maarten -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
Re: [Sdcc-user] FX2LP timer 1 issue
On 08/15/2016 08:01 PM, Philipp Klaus Krause wrote: > Hello, > > I wrote my first little mcs51 program today, for the Cypress FX2LP. But > I encountered a problem: Timer 1 runs too fast. When I set up Timer 0 > and Timer 1 the same, Timer 1 runs about 4 times faster. > I have very little experience with the FX2 and then only with the Sigrok fx2lafw. http://sigrok.org/gitweb/?p=sigrok-firmware-fx2lafw.git;a=tree In my code I used timer 2 and in the comments I saw that self sampling of this pin only worked well up to around 8MHz of gpif data. So load in one hardware block affected timer 2. I remember that increasing the cpu clock mitigated the effect. MvH Benjamin Larsson -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
Re: [Sdcc-user] FX2LP timer 1 issue
On 15.08.2016 20:54, Maarten Brock wrote: >> On 15.08.2016 20:01, Philipp Klaus Krause wrote: >>> Hello, >>> >>> I wrote my first little mcs51 program today, for the Cypress FX2LP. But >>> I encountered a problem: Timer 1 runs too fast. When I set up Timer 0 >>> and Timer 1 the same, Timer 1 runs about 4 times faster. >>> >>> I first noticed the problem when trying to do a software UART, which >>> worked with Tiemr 1, but not with Timer 2. >>> >>> I have attached programs for a 2-bit counter on the LEDs of my board a >>> bits 0 and 1 of port A. With Timer 1, the counter increments once per >>> second. >> >> The previous two paragraphs were meant to be: >> >> I first noticed the problem when trying to do a software UART, which >> worked with Tiemer 0, but not with Timer 1. >> >> I have attached programs for a 2-bit counter on the LEDs of my board a >> bits 0 and 1 of port A. With Timer 0, the counter increments once per >> second. >> >>> I compile my programs using >>> sdcc -mmcs51 test2.c >>> and put them onto the FX2LP using >>> cycfx2prog prg:test2.ihx run >>> >>> Philipp > > Hello Philipp, > > You did not set CKCON which selects the prescaler clk/4 or clk/12. T0M and > T1M should be 0 after reset, but the loader may have left them > differently. > > Maarten I didn't set it. But by setting it I can make the timer run even faster. Philipp -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
Re: [Sdcc-user] FX2LP timer 1 issue
On 15.08.2016 20:57, Benjamin Larsson wrote: > On 08/15/2016 08:01 PM, Philipp Klaus Krause wrote: >> Hello, >> >> I wrote my first little mcs51 program today, for the Cypress FX2LP. But >> I encountered a problem: Timer 1 runs too fast. When I set up Timer 0 >> and Timer 1 the same, Timer 1 runs about 4 times faster. >> > > I have very little experience with the FX2 and then only with the Sigrok > fx2lafw. > > http://sigrok.org/gitweb/?p=sigrok-firmware-fx2lafw.git;a=tree > > In my code I used timer 2 and in the comments I saw that self sampling > of this pin only worked well up to around 8MHz of gpif data. So load in > one hardware block affected timer 2. I remember that increasing the cpu > clock mitigated the effect. > > MvH > Benjamin Larsson > I tried the 48 Mhz clock (was using 12 Mhz before). Now all timers run 4 times faster, but timer 1 still runs faster than timer 0. Philipp -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
Re: [Sdcc-user] FX2LP timer 1 issue
> On 15.08.2016 20:54, Maarten Brock wrote: >>> On 15.08.2016 20:01, Philipp Klaus Krause wrote: Hello, I wrote my first little mcs51 program today, for the Cypress FX2LP. But I encountered a problem: Timer 1 runs too fast. When I set up Timer 0 and Timer 1 the same, Timer 1 runs about 4 times faster. I first noticed the problem when trying to do a software UART, which worked with Tiemr 1, but not with Timer 2. I have attached programs for a 2-bit counter on the LEDs of my board a bits 0 and 1 of port A. With Timer 1, the counter increments once per second. >>> >>> The previous two paragraphs were meant to be: >>> >>> I first noticed the problem when trying to do a software UART, which >>> worked with Tiemer 0, but not with Timer 1. >>> >>> I have attached programs for a 2-bit counter on the LEDs of my board a >>> bits 0 and 1 of port A. With Timer 0, the counter increments once per >>> second. >>> I compile my programs using sdcc -mmcs51 test2.c and put them onto the FX2LP using cycfx2prog prg:test2.ihx run Philipp >> >> Hello Philipp, >> >> You did not set CKCON which selects the prescaler clk/4 or clk/12. T0M >> and T1M should be 0 after reset, but the loader may have left them >> differently. >> >> Maarten > > I didn't set it. But by setting it I can make the timer run even faster. > > Philipp Then maybe you didn't clear TMOD.2 (C/T0) when using timer 0? Then you would be counting whatever happens on T0. Maarten -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
Re: [Sdcc-user] FX2LP timer 1 issue
On 15.08.2016 21:42, Maarten Brock wrote: >> On 15.08.2016 20:54, Maarten Brock wrote: On 15.08.2016 20:01, Philipp Klaus Krause wrote: > Hello, > > I wrote my first little mcs51 program today, for the Cypress FX2LP. > But > I encountered a problem: Timer 1 runs too fast. When I set up Timer 0 > and Timer 1 the same, Timer 1 runs about 4 times faster. > > I first noticed the problem when trying to do a software UART, which > worked with Tiemr 1, but not with Timer 2. > > I have attached programs for a 2-bit counter on the LEDs of my board a > bits 0 and 1 of port A. With Timer 1, the counter increments once per > second. The previous two paragraphs were meant to be: I first noticed the problem when trying to do a software UART, which worked with Tiemer 0, but not with Timer 1. I have attached programs for a 2-bit counter on the LEDs of my board a bits 0 and 1 of port A. With Timer 0, the counter increments once per second. > I compile my programs using > sdcc -mmcs51 test2.c > and put them onto the FX2LP using > cycfx2prog prg:test2.ihx run > > Philipp >>> >>> Hello Philipp, >>> >>> You did not set CKCON which selects the prescaler clk/4 or clk/12. T0M >>> and T1M should be 0 after reset, but the loader may have left them >>> differently. >>> >>> Maarten >> >> I didn't set it. But by setting it I can make the timer run even faster. >> >> Philipp > > Then maybe you didn't clear TMOD.2 (C/T0) when using timer 0? Then you > would be counting whatever happens on T0. > > Maarten The problem was indeed a wrong TMOD setting. I was running in 13-Bit timer mode for timer 1, while using 16-but timer mode for timer 0. Philipp -- What NetFlow Analyzer can do for you? Monitors network bandwidth and traffic patterns at an interface-level. Reveals which users, apps, and protocols are consuming the most bandwidth. Provides multi-vendor support for NetFlow, J-Flow, sFlow and other flows. Make informed decisions using capacity planning reports. http://sdm.link/zohodev2dev ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
[Sdcc-user] mcs51 / FX2LP performance - 0.0096 DMIPS / Mhz correct?
I have proted Dhrystone to the FX2LP, and ran it at 48 Mhz. I get the results below, which translates to 0.0096 DMIPS / Mhz (vs. 0.355 DMIPS / Mhz for stm8 in current SDCC). So the STM8 is about 37 times faster per Mhz than the FX2LP. Does that seem about right? For the FX2LP I Used --model-large and otherwise default options, while for the stm8 I used heavy optimization for code speed - AFAIK the optimization options don't make a big difference for mcs51 yet. Does anyone have numbers for other compilers or mcs51 variants? Philipp Dhrystone Benchmark, Version 2.1 (Language: C) Program compiled with 'register' attribute Please give the number of runs through the benchmark: Execution starts, 1 runs through Dhrystone Execution ends Final values of the variables used in the benchmark: Int_Glob:5 should be: 5 Bool_Glob: 1 should be: 1 Ch_1_Glob: A should be: A Ch_2_Glob: B should be: B Arr_1_Glob[8]: 7 should be: 7 Arr_2_Glob[8][7]:10010 should be: Number_Of_Runs + 10 Ptr_Glob-> Ptr_Comp: 15884 should be: (implementation-dependent) Discr: 0 should be: 0 Enum_Comp: 2 should be: 2 Int_Comp: 17 should be: 17 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Next_Ptr_Glob-> Ptr_Comp: 15884 should be: (implementation-dependent), same as above Discr: 0 should be: 0 Enum_Comp: 1 should be: 1 Int_Comp: 18 should be: 18 Str_Comp: DHRYSTONE PROGRAM, SOME STRING should be: DHRYSTONE PROGRAM, SOME STRING Int_1_Loc: 5 should be: 5 Int_2_Loc: 13 should be: 13 Int_3_Loc: 7 should be: 7 Enum_Loc:1 should be: 1 Str_1_Loc: DHRYSTONE PROGRAM, 1'ST STRING should be: DHRYSTONE PROGRAM, 1'ST STRING Str_2_Loc: DHRYSTONE PROGRAM, 2'ND STRING should be: DHRYSTONE PROGRAM, 2'ND STRING Microsecons for one run through Dhrystone: 1232 Dhrystones per Second: 811 -- ___ Sdcc-user mailing list Sdcc-user@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sdcc-user
