Re: [Qemu-devel] [PATCH 3/5] target-i386: call x86_cpu_realize() after APIC is initialized.

[igor]

On 06/20/2012 03:35 PM, Andreas Färber wrote:

Am 20.06.2012 14:59, schrieb Igor Mammedov:

It's not correct to make CPU runnable (i.e. calling x86_cpu_realize())
when not all properties are set (APIC in this case).

Fix it by calling x86_cpu_realize() at board level after APIC is
initialized, right before cpu_reset().

Signed-off-by: Igor Mammedov 
---
  hw/pc.c  |1 +
  target-i386/helper.c |2 --
  2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 8368701..8a662cf 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -948,6 +948,7 @@ static X86CPU *pc_new_cpu(const char *cpu_model)
  env->apic_state = apic_init(env, env->cpuid_apic_id);
  }
  qemu_register_reset(pc_cpu_reset, cpu);
+x86_cpu_realize(OBJECT(cpu), NULL);
  pc_cpu_reset(cpu);
  return cpu;
  }
diff --git a/target-i386/helper.c b/target-i386/helper.c
index c52ec13..b38ea7f 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1161,8 +1161,6 @@ X86CPU *cpu_x86_init(const char *cpu_model)
  return NULL;
  }

-x86_cpu_realize(OBJECT(cpu), NULL);
-
  return cpu;
  }



This will require changes in linux-user and possibly bsd-user. Having a
cpu_realize() would probably help with avoiding #ifdef'ery.
Unfortunately deriving CPUState from DeviceState proves a bit difficult
in the meantime (it worked at one point, now there's lots of circular
header dependencies), and realize support for Object got stopped.

Andreas

As alternative to keep, I could leave x86_cpu_realize() in 
cpu_x86_init() and keep pc_cpu_reset() in pc_new_cpu(). That will result 
in calling cpu_reset() 3 instead of 2 times.
Later when apic_init is moved inside cpu.c, a pc_cpu_reset() in 
pc_new_cpu() would be unnecessary and could be cleaned up then.

[Qemu-devel] [Bug 1805445] [NEW] QEMU arm virt machine was stopped by STMFD command while debug process

[Igor]

Public bug reported:

Hello, i have a big problem with QEMU arm virtual machine. So...
I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
[CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
Then, i attach to gdb qemu process from IDA and run code step-by-step.
[IMG]https://pp.userapi.com/c847218/v847218546/13ec1c/iSIcre5-js4.jpg[/IMG]

When the IDA run 00032534 STR R11, [R10] command
[IMG]https://pp.userapi.com/c846416/v846416708/133f60/GQzxORvf4Tg.jpg[/IMG]

instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...
[IMG]https://pp.userapi.com/c847218/v847218546/13ec26/32A0VcaJywg.jpg[/IMG]
and virt machine not execute new instruction... 
[IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]

and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
without rebuild qemu?

** Affects: qemu
 Importance: Undecided
 Status: New


** Tags: arm emulation stop

** Attachment added: "3.jpg"
   https://bugs.launchpad.net/bugs/1805445/+attachment/5216795/+files/3.jpg

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Title:
  QEMU arm virt machine was stopped by STMFD command while debug process

Status in QEMU:
  New

Bug description:
  Hello, i have a big problem with QEMU arm virtual machine. So...
  I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
  [CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
  I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
  Then, i attach to gdb qemu process from IDA and run code step-by-step.
  [IMG]https://pp.userapi.com/c847218/v847218546/13ec1c/iSIcre5-js4.jpg[/IMG]

  When the IDA run 00032534 STR R11, [R10] command
  [IMG]https://pp.userapi.com/c846416/v846416708/133f60/GQzxORvf4Tg.jpg[/IMG]

  instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...
  [IMG]https://pp.userapi.com/c847218/v847218546/13ec26/32A0VcaJywg.jpg[/IMG]
  and virt machine not execute new instruction... 
  [IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]

  and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
  without rebuild qemu?

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[Qemu-devel] [Bug 1805445] Re: QEMU arm virt machine was stopped by STMFD command while debug process

[Igor]

Okey, thank you for attentioned me to arm mode.
The STR instruction is STR R11, [0x8212]. Can I set rule for qemu to write 
RAM from 0x8000 to 0x8FFF for execute basic arm instruction, Or need 
fix source and rebuild qemu?

I have experience to rebuild source qemu for change spi flash from
n25q256a to n25q032a11. Do you include to wishlist change flash-chip
function?

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Title:
  QEMU arm virt machine was stopped by STMFD command while debug process

Status in QEMU:
  New

Bug description:
  Hello, i have a big problem with QEMU arm virtual machine. So...
  I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
  [CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
  I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
  Then, i attach to gdb qemu process from IDA and run code step-by-step.
  [IMG]https://pp.userapi.com/c847218/v847218546/13ec1c/iSIcre5-js4.jpg[/IMG]

  When the IDA run 00032534 STR R11, [R10] command
  [IMG]https://pp.userapi.com/c846416/v846416708/133f60/GQzxORvf4Tg.jpg[/IMG]

  instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...
  [IMG]https://pp.userapi.com/c847218/v847218546/13ec26/32A0VcaJywg.jpg[/IMG]
  and virt machine not execute new instruction... 
  [IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]

  and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
  without rebuild qemu?

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https://bugs.launchpad.net/qemu/+bug/1805445/+subscriptions

[Qemu-devel] [Bug 1805445] Re: QEMU arm virt machine was stopped by STMFD command while debug process

[Igor]

Maybe this is correct for palmetto-board, but qemu user should be able
to debug any basic arm instructions for generic arm board with general
purpose SPI, I2C etc... My SPI Flash has 4 Mb, and RAM adress may start
from 0x40, This is impossible for 256 Mb Flash. It would be great,
if qemu can build general arm device with var ram adr, cpu core and
block dev.

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Title:
  QEMU arm virt machine was stopped by STMFD command while debug process

Status in QEMU:
  New

Bug description:
  Hello, i have a big problem with QEMU arm virtual machine. So...
  I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
  [CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
  I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
  Then, i attach to gdb qemu process from IDA and run code step-by-step.
  [IMG]https://pp.userapi.com/c847218/v847218546/13ec1c/iSIcre5-js4.jpg[/IMG]

  When the IDA run 00032534 STR R11, [R10] command
  [IMG]https://pp.userapi.com/c846416/v846416708/133f60/GQzxORvf4Tg.jpg[/IMG]

  instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...
  [IMG]https://pp.userapi.com/c847218/v847218546/13ec26/32A0VcaJywg.jpg[/IMG]
  and virt machine not execute new instruction... 
  [IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]

  and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
  without rebuild qemu?

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https://bugs.launchpad.net/qemu/+bug/1805445/+subscriptions

[Qemu-devel] [Bug 1805445] Re: QEMU arm virt machine was stopped by STMFD command while debug process

[Igor]

** Description changed:

  Hello, i have a big problem with QEMU arm virtual machine. So...
  I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
  [CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
  I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
  Then, i attach to gdb qemu process from IDA and run code step-by-step.
- [IMG]https://pp.userapi.com/c847218/v847218546/13ec1c/iSIcre5-js4.jpg[/IMG]
+ 
  
  When the IDA run 00032534 STR R11, [R10] command
- [IMG]https://pp.userapi.com/c846416/v846416708/133f60/GQzxORvf4Tg.jpg[/IMG]
+ 
  
  instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...
- [IMG]https://pp.userapi.com/c847218/v847218546/13ec26/32A0VcaJywg.jpg[/IMG]
- and virt machine not execute new instruction... 
+ 
+ and virt machine not execute new instruction...
  [IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]
  
  and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
  without rebuild qemu?

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https://bugs.launchpad.net/bugs/1805445

Title:
  QEMU arm virt machine was stopped by STMFD command while debug process

Status in QEMU:
  New

Bug description:
  Hello, i have a big problem with QEMU arm virtual machine. So...
  I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
  [CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
  I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
  Then, i attach to gdb qemu process from IDA and run code step-by-step.

  
  When the IDA run 00032534 STR R11, [R10] command

  
  instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...

  and virt machine not execute new instruction...
  [IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]

  and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
  without rebuild qemu?

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https://bugs.launchpad.net/qemu/+bug/1805445/+subscriptions

[Qemu-devel] [Bug 1805445] Re: QEMU arm virt machine was stopped by STMFD command while debug process

[Igor]

Hm, I am create a new machine based on palmetto-bmc 
static const AspeedBoardConfig aspeed_boards[] = ...{
.name  = MACHINE_TYPE_NAME("texet-tm-333"),
.desc  = "Spreadtrum teXet TM-333 (ARM926EJ-S)",
.soc_name  = "ast2500-a1", 
.hw_strap1 = SPREADTRUM_BMC_HW_STRAP1,
.fmc_model = "n25q032a11",h
.spi_model = "mx25l3205d",
.num_cs= 1,
.i2c_init  = spreadtrum_bmc_i2c_init,
},...

and change soc_name to the ast2500-a1, because #define AST2500_SDRAM_BASE 
0x8000 on the aspeed_soc.c also i change flash for my 4Mb fullflash image. 
Building qemu and this is work fine!
The STR command work correctly and STMFD/PUSH/POP also work fine. (The SP 
register was equal 0 in past bug)

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Title:
  QEMU arm virt machine was stopped by STMFD command while debug process

Status in QEMU:
  New

Bug description:
  Hello, i have a big problem with QEMU arm virtual machine. So...
  I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
  [CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
  I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
  Then, i attach to gdb qemu process from IDA and run code step-by-step.

  
  When the IDA run 00032534 STR R11, [R10] command

  
  instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...

  and virt machine not execute new instruction...
  [IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]

  and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
  without rebuild qemu?

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https://bugs.launchpad.net/qemu/+bug/1805445/+subscriptions

[Qemu-devel] [Bug 1805445] Re: QEMU arm virt machine was stopped by STMFD command while debug process

[Igor]

/*
 * Allocate RAM after the memory controller has checked the size
 * was valid. If not, a default value is used.
 */
ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size", 
&error_abort);

memory_region_allocate_system_memory(&bmc->ram1, NULL, "ram1", ram_size);
memory_region_allocate_system_memory(&bmc->ram2, NULL, "ram2", ram_size);
memory_region_allocate_system_memory(&bmc->ram3, NULL, "ram3", ram_size);

  memory_region_add_subregion(get_system_memory(), sc->info->sdram_base[1], 
&bmc->ram1);
  memory_region_add_subregion(get_system_memory(), sc->info->sdram_base[0], 
&bmc->ram2);
  memory_region_add_subregion(get_system_memory(), sc->info->sdram_base[2], 
&bmc->ram3);

object_property_add_const_link(OBJECT(&bmc->soc), "ram1", 
OBJECT(&bmc->ram1), &error_abort);
object_property_add_const_link(OBJECT(&bmc->soc), "ram2", 
OBJECT(&bmc->ram2), &error_abort);
object_property_add_const_link(OBJECT(&bmc->soc), "ram3", 
OBJECT(&bmc->ram3), &error_abort);

And I can create 3 RAM section for avoid exeption handler! Maybe any
devices from this adress does not appear in qemu...

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Title:
  QEMU arm virt machine was stopped by STMFD command while debug process

Status in QEMU:
  New

Bug description:
  Hello, i have a big problem with QEMU arm virtual machine. So...
  I run QEMU machine with bare-metal ThreadX fullflash from Texet TM-333 phone  
(Spreadtrum platform)
  [CODE]qemu-system-arm -S -gdb tcp::1234,ipv4 -drive 
file=C:\cygwin64\home\flash.bin,if=mtd,format=raw -M palmetto-bmc -cpu arm926 
-m 64M[/CODE]
  I use palmetto-bmc platform because it have ARM926EJ-S core and support SPI 
Flash.
  Then, i attach to gdb qemu process from IDA and run code step-by-step.

  
  When the IDA run 00032534 STR R11, [R10] command

  
  instead of store R11 on R10 adress, it jump 000328DC STMFD SP!, {R0-R12,LR} 
instruction...

  and virt machine not execute new instruction...
  [IMG]https://pp.userapi.com/c850624/v850624111/528f3/N7FTpgloWVU.jpg[/IMG]

  and why i did not change flash from n25q256a to n25q032a11 in aspeed.c
  without rebuild qemu?

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Re: [Qemu-devel] [Bug 1715700] Re: Windows 7 guest won't boot on qemu 2.10 (works on 2.9)

[Igor]

On Tue, 19 Sep 2017 10:39:00 -
Gerd Hoffmann <1715...@bugs.launchpad.net> wrote:

> could be this commit breaks vbeshim ...
> 

is there a way to fix vbeshim instead of reverting RO limitation that
commit introduced?

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Title:
  Windows 7 guest won't boot on qemu 2.10 (works on 2.9)

Status in QEMU:
  New

Bug description:
  Qemu version: 2.10 stable.
  Guest: Windows 7 SP1 x64, virtio drivers are already installed in the guest.
  Command line:
  qemu-system-x86_64 \
  -nodefaults \
  -nodefconfig \
  -machine type=q35,accel=kvm \
  -enable-kvm \
  -cpu host \
  -m 2048 \
  -vga virtio \
  -boot menu=on \
  -smbios file=/path/dmidecode_BIOS.bin \
  -acpitable file=/path/acpi_slic.bin \
  -bios /path/OVMF_CODE.fd \
  -net none \
  -drive if=virtio,media=disk,file=/media/win7.qcow2 \
  -device pcie-root-port \
  -device ich9-usb-ehci1 \
  -device ich9-usb-uhci1 \
  -device ich9-usb-uhci2 \
  -device ich9-usb-uhci3

  Windows hangs at boot with waving flag screen (flag doesn't freeze,
  keeps waving indefinitely). Same command line boots fine with Qemu
  2.9. I tried changing machine type to pc-q35-2.9 - same result.

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Re: [Qemu-devel] [Bug 1715700] Re: Windows 7 guest won't boot on qemu 2.10 (works on 2.9)

[Igor]

On Tue, 19 Sep 2017 10:39:00 -
Gerd Hoffmann <1715...@bugs.launchpad.net> wrote:

> could be this commit breaks vbeshim ...
> 

Did a bit of testing: w7 iso boots to install screen with seabios but
stuck at win boot logo with ovmf.

I've heard (maybe wrongly) that seabios would also break in that case.

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Title:
  Windows 7 guest won't boot on qemu 2.10 (works on 2.9)

Status in QEMU:
  New

Bug description:
  Qemu version: 2.10 stable.
  Guest: Windows 7 SP1 x64, virtio drivers are already installed in the guest.
  Command line:
  qemu-system-x86_64 \
  -nodefaults \
  -nodefconfig \
  -machine type=q35,accel=kvm \
  -enable-kvm \
  -cpu host \
  -m 2048 \
  -vga virtio \
  -boot menu=on \
  -smbios file=/path/dmidecode_BIOS.bin \
  -acpitable file=/path/acpi_slic.bin \
  -bios /path/OVMF_CODE.fd \
  -net none \
  -drive if=virtio,media=disk,file=/media/win7.qcow2 \
  -device pcie-root-port \
  -device ich9-usb-ehci1 \
  -device ich9-usb-uhci1 \
  -device ich9-usb-uhci2 \
  -device ich9-usb-uhci3

  Windows hangs at boot with waving flag screen (flag doesn't freeze,
  keeps waving indefinitely). Same command line boots fine with Qemu
  2.9. I tried changing machine type to pc-q35-2.9 - same result.

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Re: [Qemu-devel] [Bug 1715700] Re: Windows 7 guest won't boot on qemu 2.10 (works on 2.9)

[Igor]

On Tue, 19 Sep 2017 10:59:51 -
"Laszlo Ersek \(Red Hat\)"  wrote:

> Thanks, Gerd, for the CC -- I agree, this commit (208fa0e43645) almost
> certainly breaks the VBE Shim. Displaying the patch with a bit larger
> context,
> 
> > diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> > index 22e16031b03b..59435390ba62 100644
> > --- a/hw/i386/pc.c
> > +++ b/hw/i386/pc.c
> > @@ -1442,8 +1442,11 @@ void pc_memory_init(PCMachineState *pcms,
> >  
> >  option_rom_mr = g_malloc(sizeof(*option_rom_mr));
> >  memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE,
> > &error_fatal);
> > +if (pcmc->pci_enabled) {
> > +memory_region_set_readonly(option_rom_mr, true);
> > +}
> >  memory_region_add_subregion_overlap(rom_memory,
> >  PC_ROM_MIN_VGA,
> >  option_rom_mr,
> >  1);
looking at it more, question is why do we have a separate
piece of ram mapped here that overlays system ram.
Can we remove this memory region and let guest use
underling initial memory?


> 
> and PC_ROM_MIN_VGA is #defined as 0xc in "include/hw/loader.h".
> 
> OVMF places the VBE Shim into the C segment, and points the 0x10
> interrupt vector at it. See "OvmfPkg/QemuVideoDxe/VbeShim.c", function
> InstallVbeShim():
> 
> >   SegmentC = 0xC;
> > 
> >   [...]
> > 
> >   //
> >   // Put the shim in place first.
> >   //
> >   Pam1Address = PCI_LIB_ADDRESS (0, 0, 0, 0x5A);
> >   //
> >   // low nibble covers 0xC to 0xC3FFF
> >   // high nibble covers 0xC4000 to 0xC7FFF
> >   // bit1 in each nibble is Write Enable
> >   // bit0 in each nibble is Read Enable
> >   //
> >   Pam1 = PciRead8 (Pam1Address);
> >   PciWrite8 (Pam1Address, Pam1 | (BIT1 | BIT0));
> > 
> >   //
> >   // We never added memory space during PEI or DXE for the C segment, so we
> >   // don't need to (and can't) allocate from there. Also, guest operating
> >   // systems will see a hole in the UEFI memory map there.
> >   //
> >   SegmentCPages = 4;
> > 
> >   ASSERT (sizeof mVbeShim <= EFI_PAGES_TO_SIZE (SegmentCPages));
> >   CopyMem ((VOID *)(UINTN)SegmentC, mVbeShim, sizeof mVbeShim);
> > 
> >   [...]
> > 
> >   //
> >   // Clear Write Enable (bit1), keep Read Enable (bit0) set
> >   //
> >   PciWrite8 (Pam1Address, (Pam1 & ~BIT1) | BIT0);
> > 
> >   //
> >   // Second, point the Int10h vector at the shim.
> >   //
> >   Int0x10->Segment = (UINT16) ((UINT32)SegmentC >> 4);
> >   Int0x10->Offset  = (UINT16) ((UINTN) (VbeModeInfo + 1) - SegmentC);  
>

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https://bugs.launchpad.net/bugs/1715700

Title:
  Windows 7 guest won't boot on qemu 2.10 (works on 2.9)

Status in QEMU:
  New

Bug description:
  Qemu version: 2.10 stable.
  Guest: Windows 7 SP1 x64, virtio drivers are already installed in the guest.
  Command line:
  qemu-system-x86_64 \
  -nodefaults \
  -nodefconfig \
  -machine type=q35,accel=kvm \
  -enable-kvm \
  -cpu host \
  -m 2048 \
  -vga virtio \
  -boot menu=on \
  -smbios file=/path/dmidecode_BIOS.bin \
  -acpitable file=/path/acpi_slic.bin \
  -bios /path/OVMF_CODE.fd \
  -net none \
  -drive if=virtio,media=disk,file=/media/win7.qcow2 \
  -device pcie-root-port \
  -device ich9-usb-ehci1 \
  -device ich9-usb-uhci1 \
  -device ich9-usb-uhci2 \
  -device ich9-usb-uhci3

  Windows hangs at boot with waving flag screen (flag doesn't freeze,
  keeps waving indefinitely). Same command line boots fine with Qemu
  2.9. I tried changing machine type to pc-q35-2.9 - same result.

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[Qemu-devel] [Bug 1821884] [NEW] Extend uefi-test-tools to report SMBIOS location

[Igor]

Public bug reported:

UEFI helper app exposes the pointer to RSDP ACPI table that firmware allocates 
in guest's RAM
but it doesn't do so for SMBIOS tables. Hence bios table test would skip 
testing SMBIOS tables
to workaround shortcoming. This bug is a request to expose two new entry point 
fields (one for SMBIOS 2 and another for SMBIOS 3) so test could check SMBIOS 
tables when guest is started a with  UEFI firmware.

** Affects: qemu
 Importance: Undecided
 Status: New

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https://bugs.launchpad.net/bugs/1821884

Title:
  Extend uefi-test-tools to report SMBIOS location

Status in QEMU:
  New

Bug description:
  UEFI helper app exposes the pointer to RSDP ACPI table that firmware 
allocates in guest's RAM
  but it doesn't do so for SMBIOS tables. Hence bios table test would skip 
testing SMBIOS tables
  to workaround shortcoming. This bug is a request to expose two new entry 
point fields (one for SMBIOS 2 and another for SMBIOS 3) so test could check 
SMBIOS tables when guest is started a with  UEFI firmware.

To manage notifications about this bug go to:
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Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API.

[Igor Mitsyanko]

On 08/06/2012 06:16 AM, Peter A. G. Crosthwaite wrote:

Added a FIFO API that can be used to create and operate byte FIFOs.

Signed-off-by: Peter A. G. Crosthwaite 
---
  hw/Makefile.objs |1 +
  hw/fifo.c|   79 ++
  hw/fifo.h|   47 
  3 files changed, 127 insertions(+), 0 deletions(-)
  create mode 100644 hw/fifo.c
  create mode 100644 hw/fifo.h

diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 8327e55..6ba570e 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -15,6 +15,7 @@ hw-obj-$(CONFIG_ECC) += ecc.o
  hw-obj-$(CONFIG_NAND) += nand.o
  hw-obj-$(CONFIG_PFLASH_CFI01) += pflash_cfi01.o
  hw-obj-$(CONFIG_PFLASH_CFI02) += pflash_cfi02.o
+hw-obj-y += fifo.o
Perhaps it'd be better to make it common object and put it into root 
directory, like its done for bitops.c and bitmap.c
  
  hw-obj-$(CONFIG_M48T59) += m48t59.o

  hw-obj-$(CONFIG_ESCC) += escc.o
diff --git a/hw/fifo.c b/hw/fifo.c
new file mode 100644
index 000..5e14e1e
--- /dev/null
+++ b/hw/fifo.c
@@ -0,0 +1,79 @@
+/*
+ * Generic FIFO component, implemented as a circular buffer.
+ *
+ * Copyright (c) 2012 Peter A. G. Crosthwaite
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see .
+ */
+
+#include "fifo.h"
+
+void fifo8_create(Fifo8 *fifo, uint32_t capacity)
+{
+fifo->data = g_new(uint8_t, capacity);
+fifo->capacity = capacity;
+fifo->head = 0;
+fifo->num = 0;
+}
+
+void fifo8_destroy(Fifo8 *fifo)
+{
+g_free(fifo->data);
+}
+
+void fifo8_push(Fifo8 *fifo, uint8_t data)
+{
+if (fifo->num == fifo->capacity) {
+abort();
+}
I think its too harsh to abort here (and in pop() too), fifo 
overrun/underrun condition is absolutely normal for most of the devices, 
usually it would just trigger an  interrupt. I suggest return a error 
code instead and let a caller decide what should happen in this situation.

+fifo->data[(fifo->head + fifo->num) % fifo->capacity] = data;
+fifo->num++;
+}
+
+uint8_t fifo8_pop(Fifo8 *fifo)
+{
+uint8_t ret;
+
+if (fifo->num == 0) {
+abort();
+}
+ret = fifo->data[fifo->head++];
+fifo->head %= fifo->capacity;
+fifo->num--;
+return ret;
+}
+
+void fifo8_reset(Fifo8 *fifo)
+{
+fifo->num = 0;
+}
+
+bool fifo8_is_empty(Fifo8 *fifo)
+{
+return (fifo->num == 0);
+}
+
+bool fifo8_is_full(Fifo8 *fifo)
+{
+return (fifo->num == fifo->capacity);
+}
+
+const VMStateDescription vmstate_fifo8 = {
+.name = "SSISlave",

thats not a good name for a generic fifo)

+.version_id = 1,
+.minimum_version_id = 1,
+.minimum_version_id_old = 1,
+.fields  = (VMStateField[]) {

too much spaces here

+VMSTATE_VBUFFER_UINT32(data, Fifo8, 1, NULL, 0, capacity),
+VMSTATE_UINT32(head, Fifo8),
+VMSTATE_UINT32(num, Fifo8),
+VMSTATE_END_OF_LIST()
+}
+};
+
diff --git a/hw/fifo.h b/hw/fifo.h
new file mode 100644
index 000..3fb09ff
--- /dev/null
+++ b/hw/fifo.h
@@ -0,0 +1,47 @@
+#ifndef FIFO_H
+#define FIFO_H
+
+#include "hw.h"
+
+typedef struct {
+/* All fields are private */
+uint8_t *data;
+uint32_t capacity;
+uint32_t head;
+uint32_t num;
+} Fifo8;
+
+/* create a fifo of the specified size */
+
+void fifo8_create(Fifo8 *, uint32_t);
+
+/* cleanup a fifo */
+
+void fifo8_destroy(Fifo8 *);
+
+/* push a data byte to the fifo. Behaviour is undefined if the fifo is full */
+
+void fifo8_push(Fifo8 *, uint8_t);
+
+/* pop a data byte from the fifo. Behviour is undefined if the fifo is empty */
+
+uint8_t fifo8_pop(Fifo8 *);
+
+/* reset (empty) the fifo */
+
+void fifo8_reset(Fifo8 *);
+
+bool fifo8_is_empty(Fifo8 *);
+bool fifo8_is_full(Fifo8 *);
+
+extern const VMStateDescription vmstate_fifo8;
+
+#define VMSTATE_FIFO8(_field, _state) {  \
+.name   = (stringify(_field)),   \
+.size   = sizeof(Fifo8), \
+.vmsd   = &vmstate_fifo8,\
+.flags  = VMS_STRUCT,\
+.offset = vmstate_offset_value(_state, _field, Fifo8),   \
+}
+
+#endif /* FIFO_H */

Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API.

[Igor Mitsyanko]

On 08/06/2012 06:16 AM, Peter A. G. Crosthwaite wrote:

Added a FIFO API that can be used to create and operate byte FIFOs.

Signed-off-by: Peter A. G. Crosthwaite 
---
  hw/Makefile.objs |1 +
  hw/fifo.c|   79 ++
  hw/fifo.h|   47 
  3 files changed, 127 insertions(+), 0 deletions(-)
  create mode 100644 hw/fifo.c
  create mode 100644 hw/fifo.h

diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 8327e55..6ba570e 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -15,6 +15,7 @@ hw-obj-$(CONFIG_ECC) += ecc.o
  hw-obj-$(CONFIG_NAND) += nand.o
  hw-obj-$(CONFIG_PFLASH_CFI01) += pflash_cfi01.o
  hw-obj-$(CONFIG_PFLASH_CFI02) += pflash_cfi02.o
+hw-obj-y += fifo.o
  
  hw-obj-$(CONFIG_M48T59) += m48t59.o

  hw-obj-$(CONFIG_ESCC) += escc.o
diff --git a/hw/fifo.c b/hw/fifo.c
new file mode 100644
index 000..5e14e1e
--- /dev/null
+++ b/hw/fifo.c
@@ -0,0 +1,79 @@
+/*
+ * Generic FIFO component, implemented as a circular buffer.
+ *
+ * Copyright (c) 2012 Peter A. G. Crosthwaite
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see .
+ */
+
+#include "fifo.h"
+
+void fifo8_create(Fifo8 *fifo, uint32_t capacity)
+{
+fifo->data = g_new(uint8_t, capacity);
+fifo->capacity = capacity;
+fifo->head = 0;
+fifo->num = 0;
+}
+
+void fifo8_destroy(Fifo8 *fifo)
+{
+g_free(fifo->data);
+}
+
+void fifo8_push(Fifo8 *fifo, uint8_t data)
+{
+if (fifo->num == fifo->capacity) {
+abort();
+}
+fifo->data[(fifo->head + fifo->num) % fifo->capacity] = data;
+fifo->num++;
+}
+
+uint8_t fifo8_pop(Fifo8 *fifo)
+{
+uint8_t ret;
+
+if (fifo->num == 0) {
+abort();
+}
+ret = fifo->data[fifo->head++];
+fifo->head %= fifo->capacity;
+fifo->num--;
+return ret;
+}
+
+void fifo8_reset(Fifo8 *fifo)
+{
+fifo->num = 0;
+}
+
+bool fifo8_is_empty(Fifo8 *fifo)
+{
+return (fifo->num == 0);
+}
+
+bool fifo8_is_full(Fifo8 *fifo)
+{
+return (fifo->num == fifo->capacity);
+}
+
+const VMStateDescription vmstate_fifo8 = {
+.name = "SSISlave",
+.version_id = 1,
+.minimum_version_id = 1,
+.minimum_version_id_old = 1,
+.fields  = (VMStateField[]) {
+VMSTATE_VBUFFER_UINT32(data, Fifo8, 1, NULL, 0, capacity),
+VMSTATE_UINT32(head, Fifo8),
+VMSTATE_UINT32(num, Fifo8),
+VMSTATE_END_OF_LIST()
+}
+};
+
diff --git a/hw/fifo.h b/hw/fifo.h
new file mode 100644
index 000..3fb09ff
--- /dev/null
+++ b/hw/fifo.h
@@ -0,0 +1,47 @@
+#ifndef FIFO_H
+#define FIFO_H
+
+#include "hw.h"
+
+typedef struct {
+/* All fields are private */
+uint8_t *data;
+uint32_t capacity;
+uint32_t head;
+uint32_t num;
+} Fifo8;
+
+/* create a fifo of the specified size */
+
+void fifo8_create(Fifo8 *, uint32_t);
+
+/* cleanup a fifo */
+
+void fifo8_destroy(Fifo8 *);
+
+/* push a data byte to the fifo. Behaviour is undefined if the fifo is full */
+
+void fifo8_push(Fifo8 *, uint8_t);
+
+/* pop a data byte from the fifo. Behviour is undefined if the fifo is empty */
+
+uint8_t fifo8_pop(Fifo8 *);
+
+/* reset (empty) the fifo */
+
+void fifo8_reset(Fifo8 *);
+
+bool fifo8_is_empty(Fifo8 *);
+bool fifo8_is_full(Fifo8 *);
+
+extern const VMStateDescription vmstate_fifo8;
+
+#define VMSTATE_FIFO8(_field, _state) {  \
+.name   = (stringify(_field)),   \
+.size   = sizeof(Fifo8), \
+.vmsd   = &vmstate_fifo8,\
+.flags  = VMS_STRUCT,\
+.offset = vmstate_offset_value(_state, _field, Fifo8),   \
+}


how about implementing this as a wrapper to VMSTATE_STRUCT_TEST() macro 
instead? And maybe this should go to vmstate.h header



+
+#endif /* FIFO_H */

Re: [Qemu-devel] [PATCH v6 1/4] hw: introduce standard SD host controller

[Igor Mitsyanko]

On 08/06/2012 02:30 PM, Peter Maydell wrote:

On 6 August 2012 04:25, Peter A. G. Crosthwaite
 wrote:


+static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
+{
+bool page_aligned = false;
+unsigned int n, begin;
+const uint16_t block_size = s->blksize & 0x0fff;
+uint32_t boundary_chk = 1 << (((s->blksize & 0xf000) >> 12) + 12);
+uint32_t boundary_count = boundary_chk - (s->sdmasysad % boundary_chk);
+
+/* XXX: Some sd/mmc drivers (for example, u-boot-slp) do not account for
+ * possible stop at page boundary if initial address is not page aligned,
+ * allow them to work properly */
+if ((s->sdmasysad % boundary_chk) == 0) {
+page_aligned = true;
+}

It's not quite clear to me what this comment is indicating. Is it
a bit of behaviour which is "not specified but behave as hardware
happens to do because software is accidentally relying on it", or
are we behaving differently from hardware here?


Spec states that DMA transfer should stop when controller detects a 
carry out of specified address bits and interrupt should be generated to 
stimulate software to update DMA address register. There's no way to 
disable this behaviour, software can only regulate boundary size through 
bits in BLKSIZE register (4K - 512K). That's how it was implemented 
initially, but it caused u-boot mmc driver (which works fine on real 
hardware) to hang.
The reason for hang is that when u-boot performs large continuous data 
transfer (>512K) to an arbitrary (non page-aligned) address, it doesn't 
care about "stop at page boundary" interrupt at all. It just loops 
forefer, waiting for a DMA transfer completion, which will never 
complete if it stopped at page boundary until software updates address 
register.
The fact that it somehow manages to work on hardware got me thinking 
that it only applies to initially aligned addresses.



+static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
+{
+uint32_t adma1 = 0;
+uint64_t adma2 = 0;
+target_phys_addr_t entry_addr = (target_phys_addr_t)s->admasysaddr;
+
+switch (SDHC_DMA_TYPE(s->hostctl)) {
+case SDHC_CTRL_ADMA2_32:
+cpu_physical_memory_read(entry_addr, (uint8_t *)&adma2, sizeof(adma2));
+dscr->addr = (target_phys_addr_t)((adma2 >> 32) & 0xfffc);
+dscr->length = (uint16_t)((adma2 >> 16) & 0x);
+dscr->attr = (uint8_t)(adma2 & 0x3F);

Does the SDHCI spec define that these words are interpreted like
this regardless of system endianness, or is this an accidental
assumption of little-endian behaviour?


Spec never says it explicitly, but it's quite obvious that descriptor 
table has a little endian format. There is even a comment in linux SDHCI 
driver that says:


/*
 * The spec does not specify endianness of descriptor table.
 * We currently guess that it is LE.
 */



-- PMM

Re: [Qemu-devel] [PATCH v6 1/4] hw: introduce standard SD host controller

[Igor Mitsyanko]

On 08/06/2012 03:15 PM, Peter Maydell wrote:

On 6 August 2012 04:25, Peter A. G. Crosthwaite
 wrote:

From: Igor Mitsyanko 

Device model for standard SD Host Controller Interface (SDHCI) compliant with
version 2.00 of SD association specification.
+typedef struct ADMADescr {
+target_phys_addr_t addr;
+uint16_t length;
+uint8_t attr;
+uint8_t incr;
+} ADMADescr;
+
+static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
+{
+uint32_t adma1 = 0;
+uint64_t adma2 = 0;
+target_phys_addr_t entry_addr = (target_phys_addr_t)s->admasysaddr;
+
+switch (SDHC_DMA_TYPE(s->hostctl)) {
+case SDHC_CTRL_ADMA2_32:
+cpu_physical_memory_read(entry_addr, (uint8_t *)&adma2, sizeof(adma2));
+dscr->addr = (target_phys_addr_t)((adma2 >> 32) & 0xfffc);
+dscr->length = (uint16_t)((adma2 >> 16) & 0x);
+dscr->attr = (uint8_t)(adma2 & 0x3F);
+dscr->incr = 8;
+break;
+case SDHC_CTRL_ADMA1_32:
+cpu_physical_memory_read(entry_addr, (uint8_t *)&adma1, sizeof(adma1));
+dscr->addr = (target_phys_addr_t)(adma1 & 0xF000);
+dscr->attr = (uint8_t)(adma1 & 0x3F);
+dscr->incr = 4;
+if ((dscr->attr & SDHC_ADMA_ATTR_ACT_MASK) == SDHC_ADMA_ATTR_SET_LEN) {
+dscr->length = (uint16_t)((adma1 >> 12) & 0x);
+} else {
+dscr->length = 4096;
+}
+break;
+case SDHC_CTRL_ADMA2_64:
+cpu_physical_memory_read(entry_addr, (uint8_t *)(&dscr->attr), 1);
+cpu_physical_memory_read(entry_addr + 2, (uint8_t *)(&dscr->length), 
2);
+cpu_physical_memory_read(entry_addr + 4, (uint8_t *)(&dscr->addr), 8);
+dscr->attr &= 0xfff8;
+dscr->incr = 12;
+break;
+}
+}
+
+/* Advanced DMA data transfer */
+static void sdhci_start_adma(SDHCIState *s)
+{
+unsigned int n, begin, length;
+const uint16_t block_size = s->blksize & 0x0fff;
+ADMADescr dscr;
+s->admaerr &= ~SDHC_ADMAERR_LENGTH_MISMATCH;
+
+while (1) {
+get_adma_description(s, &dscr);
+DPRINT_L2("ADMA loop: addr=" TARGET_FMT_plx ", len=%d, attr=%x\n",
+dscr.addr, dscr.length, dscr.attr);
+
+if ((dscr.attr & SDHC_ADMA_ATTR_VALID) == 0) {
+/* Indicate that error occurred in ST_FDS state */
+s->admaerr &= ~SDHC_ADMAERR_STATE_MASK;
+s->admaerr |= SDHC_ADMAERR_STATE_ST_FDS;
+
+/* Generate ADMA error interrupt */
+if (s->errintstsen & SDHC_EISEN_ADMAERR) {
+s->errintsts |= SDHC_EIS_ADMAERR;
+s->norintsts |= SDHC_NIS_ERR;
+}
+
+sdhci_update_irq(s);
+break;
+}
+
+length = dscr.length ? dscr.length : 65536;
+
+switch (dscr.attr & SDHC_ADMA_ATTR_ACT_MASK) {
+case SDHC_ADMA_ATTR_ACT_TRAN:  /* data transfer */
+
+if (s->trnmod & SDHC_TRNS_READ) {
+while (length) {
+if (s->data_count == 0) {
+for (n = 0; n < block_size; n++) {
+s->fifo_buffer[n] = sd_read_data(s->card);
+}
+}
+begin = s->data_count;
+if ((length + begin) < block_size) {
+s->data_count = length + begin;
+length = 0;
+ } else {
+s->data_count = block_size;
+length -= block_size - begin;
+}
+cpu_physical_memory_write(dscr.addr, 
&s->fifo_buffer[begin],
+s->data_count - begin);
+dscr.addr += s->data_count - begin;
+if (s->data_count == block_size) {
+s->data_count = 0;
+if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) {
+s->blkcnt--;
+if (s->blkcnt == 0) {
+break;
+}
+}
+}
+}
+} else {
+while (length) {
+begin = s->data_count;
+if ((length + begin) < block_size) {
+s->data_count = length + begin;
+length = 0;
+ } else {
+s->data_count = block_size;
+length -= block_size - begin;
+}
+cpu_physical_memory_read(dscr.addr,
+&s->fifo_

Re: [Qemu-devel] [PATCH v6 2/4] exynos4210: Added SD host controller model

[Igor Mitsyanko]

On 08/06/2012 02:56 PM, Peter Maydell wrote:

On 6 August 2012 04:25, Peter A. G. Crosthwaite
 wrote:


+static uint64_t
+exynos4210_sdhci_readfn(void *opaque, target_phys_addr_t offset, unsigned size)
+{
+Exynos4SDHCIState *s = (Exynos4SDHCIState *)opaque;
+uint32_t ret;
+
+switch (offset & ~0x3) {
+case SDHC_BDATA:
+/* Buffer data port read can be disabled by CONTROL2 register */
+if (s->control2 & EXYNOS4_SDHC_DISBUFRD) {
+ret = 0;
+} else {
+ret = SDHCI_GET_CLASS(s)->mem_read(SDHCI(s), offset, size);
+}
+break;
+case SDHC_ADMAERR:
+ret = (s->admaerr >> 8 * (offset - SDHC_ADMAERR)) &
+((1 << 8 * size) - 1);

If size == 4 you've just shifted right by 32, which is undefined behaviour
when ints are 32 bits. Try

ret = extract32(s->admaerr, (offset & 3) << 3, size * 8);

and similarly below.


Ok


+static void exynos4210_sdhci_writefn(void *opaque, target_phys_addr_t offset,
+uint64_t val, unsigned size)
+{
+Exynos4SDHCIState *s = (Exynos4SDHCIState *)opaque;
+SDHCIState *sdhci = SDHCI(s);
+unsigned shift;
+
+DPRINT_L2("write %ub: addr[0x%04x] <- %u(0x%x)\n", size, (uint32_t)offset,
+(uint32_t)val, (uint32_t)val);
+
+switch (offset) {
+case SDHC_CLKCON:
+if ((val & SDHC_CLOCK_SDCLK_EN) &&
+(sdhci->prnsts & SDHC_CARD_PRESENT)) {
+val |= EXYNOS4_SDHC_SDCLK_STBL;
+} else {
+val &= ~EXYNOS4_SDHC_SDCLK_STBL;
+}
+/* Break out to superclass write to handle the rest of this register */
+break;
+case EXYNOS4_SDHC_CONTROL2 ... EXYNOS4_SDHC_CONTROL2 + 3:

Why do we switch (offset & 3) in the readfn but switch (offset)
and use case FOO ... FOO + 3 in the writefn? Consistency would be
nice.


I think I'll change readfn() switch to match writefn then, to avoid 
complicating SDHC_CLKON case.



+shift = (offset - EXYNOS4_SDHC_CONTROL2) * 8;
+s->control2 = (s->control2 & ~(((1 << 8 * size) - 1) << shift)) |
+(val << shift);

   s->control2 = deposit32(s->control2, (offset & 3) << 3, size * 8, val);

and similarly below.


+case SDHC_ADMAERR ... SDHC_ADMAERR + 3:
+if (size == 4 || (size == 2 && offset == SDHC_ADMAERR) ||
+(size == 1 && offset == (SDHC_ADMAERR + 1))) {
+uint32_t mask = 0;
+
+if (size == 2) {
+mask = 0x;
+} else if (size == 1) {
+mask = 0x00FF;
+val <<= 8;
+}
+
+s->admaerr = (s->admaerr & (mask | EXYNOS4_SDHC_FINAL_BLOCK |
+   EXYNOS4_SDHC_IRQ_STAT)) | (val & ~(EXYNOS4_SDHC_FINAL_BLOCK |
+   EXYNOS4_SDHC_IRQ_STAT | EXYNOS4_SDHC_CONTINUE_REQ));
+s->admaerr &= ~(val & EXYNOS4_SDHC_IRQ_STAT);
+if ((s->stopped_adma) && (val & EXYNOS4_SDHC_CONTINUE_REQ) &&
+(SDHC_DMA_TYPE(sdhci->hostctl) == SDHC_CTRL_ADMA2_32)) {
+s->stopped_adma = false;
+SDHCI_GET_CLASS(sdhci)->do_adma(sdhci);
+}
+} else {
+uint32_t mask = (1 << (size * 8)) - 1;
+shift = 8 * (offset & 0x3);
+val <<= shift;
+mask = ~(mask << shift);
+s->admaerr = (s->admaerr & mask) | val;
+}
+return;

This case just looks odd. I think it would be clearer to first
calculate the updated value of admaerr (using deposit32) and
then act on the changes (xor of old and new value is handy
to identify which bits are changed).


ok


-- PMM

Re: [Qemu-devel] [PATCH v6 1/4] hw: introduce standard SD host controller

[Igor Mitsyanko]

Recently I've noticed that drive_get_next() usage is not very convenient 
if you want to use specific SD controller interface. Maybe we should 
switch from drive_get_next() to DEFINE_PROP_DRIVE()? It'll still 
preserve "-sd .." behaviour. What do you think Peter?

Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API.

[Igor Mitsyanko]

On 08/06/2012 01:48 PM, Peter Maydell wrote:

On 6 August 2012 03:16, Peter A. G. Crosthwaite
 wrote:

Added a FIFO API that can be used to create and operate byte FIFOs.

I'm not asking for actual conversions, but it would be nice to see a
list of some devices that could in principle be moved to using this FIFO,
as an indication of its general utility.

Would it make sense for the FIFO to be a QOM object, or is that a
silly idea?

-- PMM

FIFO introspection capability could be useful I think, and we could 
implement device-specific fifo "mutants" then (for example, PL330 fifo 
could be a general FIFO object + "tag" variable).

Re: [Qemu-devel] [PATCH v5 09/15] hw: Added generic FIFO API.

[Igor Mitsyanko]

On 08/07/2012 10:10 AM, Peter Crosthwaite wrote:

+
+extern const VMStateDescription vmstate_fifo8;
+
+#define VMSTATE_FIFO8(_field, _state) {  \
+.name   = (stringify(_field)),   \
+.size   = sizeof(Fifo8), \
+.vmsd   = &vmstate_fifo8,\
+.flags  = VMS_STRUCT,\
+.offset = vmstate_offset_value(_state, _field, Fifo8),   \
+}


how about implementing this as a wrapper to VMSTATE_STRUCT_TEST() macro
instead?

This has no existing precedent in QEMU so I am unsure of what you mean?


I meant VMSTATE_TIMER_TEST() in vmstate.h as an example, which is a 
wrapper to VMSTATE_POINTER_TEST(). With this approach, fifo macro could be


#define VMSTATE_FIFO8(_field, _state) \
VMSTATE_STRUCT(_field, _state, 0, vmstate_fifo8, Fifo8)




And maybe this should go to vmstate.h header

I disagree. All other clients of VMS_STRUCT are out in their repective
device specific headers (pci.h, i2c.h) etc. Unless this is new
established policy, I dont really want to change the current adopted
approach.


Yeah, looks like you're right.


Regards,
Peter




+
+#endif /* FIFO_H */

Re: [Qemu-devel] [PATCH 0/4 v2] target-i386: move tcg intialization inside CPU object

[Igor Mammedov]

ping

- Original Message -
> From: "Igor Mammedov" 
> To: qemu-devel@nongnu.org
> Cc: "peter maydell" , aligu...@us.ibm.com, 
> ehabk...@redhat.com, s...@weilnetz.de,
> mtosa...@redhat.com, ag...@suse.de, mdr...@linux.vnet.ibm.com, 
> blauwir...@gmail.com, jcmvb...@gmail.com,
> a...@redhat.com, "jan kiszka" , afaer...@suse.de, 
> r...@twiddle.net
> Sent: Monday, June 25, 2012 3:55:03 PM
> Subject: [Qemu-devel] [PATCH 0/4 v2] target-i386: move tcg intialization  
> inside CPU object
> 
> v2:
>   - drop usage of prev_debug_excp_handler consistently in all users
>   - split from reset patches to avoid confusion of inter-dependency
> 
> Compile & Run tested:
>   target-i386: tcg and kvm mode
>   i386-linux-user: running of /bin/ls
> Compile tested:
>   xtensa-softmmu && xtensaeb-softmmu
> 
> git tree for testing:
>   https://github.com/imammedo/qemu/tree/x86cpu_qom_tcg_v2
> 
> 
> Igor Mammedov (4):
>   target-i386: drop usage of prev_debug_excp_handler
>   target-xtensa: drop usage of prev_debug_excp_handler
>   cleanup cpu_set_debug_excp_handler
>   target-i386: move tcg initialization into x86_cpu_initfn()
> 
>  cpu-exec.c |5 +
>  exec-all.h |2 +-
>  target-i386/cpu.c  |   10 ++
>  target-i386/cpu.h  |1 +
>  target-i386/helper.c   |   16 +---
>  target-xtensa/helper.c |8 +---
>  6 files changed, 15 insertions(+), 27 deletions(-)
> 
> --
> 1.7.10.2
> 
> 
> 

Re: [Qemu-devel] KVM call agenda for tuesday 31

[Igor Mitsyanko]

On 08/08/2012 08:25 PM, Andreas Färber wrote:

Am 31.01.2012 15:01, schrieb Mitsyanko Igor:

On 01/31/2012 05:15 PM, Andreas Färber wrote:

Am 31.01.2012 00:53, schrieb Anthony Liguori:

On 01/30/2012 05:41 PM, Andreas Färber wrote:

Am 30.01.2012 19:55, schrieb Juan Quintela:

Please send in any agenda items you are interested in covering.

VMState:
Anthony specifically said that VMState were not affected by QOM and
that
patches should not be deferred until the merge. Yet there's no review
and/or decision-making for a month now. Ping^2 for AHCI+SDHC.

Do you have pointers (to pending VMState patches)?

http://patchwork.ozlabs.org/patch/137732/ (PATCH v4)

It's basically about how to deal with variable-sized arrays. (Alex
mentioned it on one call around November.) I found ways to deal with
subsets of arrays embedded within the struct and variable-sized list of
pointers to structs but no solution for a malloc()'ed array of structs.
Maybe I'm just too stupid to see. Anyway, no one commented since Xmas.

Igor posted (and refined for v2) a patch with a callback-based approach
that I find promising. From my view, unofficially Juan is the VMState
guy, he's been cc'ed. Are we lacking an official maintainer that cares?
Or is Juan the official, undocumented maintainer but simply busy?

SUSE's interest is making AHCI migratable, and my VMState workaround for
that is simply ugly:

http://patchwork.ozlabs.org/patch/133066/ (RFC)


If I'm not mistaken, if you change AHCIState's ".ports" type to uint32_t
you can use existing VMSTATE_BUFFER_MULTIPLY macro like this:

VMSTATE_BUFFER_MULTIPLY(dev, AHCIState, 0, NULL, 0, ports,
sizeof(AHCIDevice))

Igor, I finally got around to rebasing and trying this: Am I seeing
correctly that this tries to serialize the whole of AHCIDevice as an
opaque buffer? The difficulty here was that we were looking for a way to
serialize a variable number of structured elements with their own
&vmstate_ahci_device specifying what fields to serialize.

Juan, how should we proceed there? Do as Igor suggested? Some VMSTATE_
macro I'm overlooking? Or do we need some new macro for this use case?

Regards,
Andreas


Hi Andreas, that was a bad suggestion, sorry for that, we can't treat 
structures as opaque buffers because that wouldn't work when migrating 
between hosts with different alignment/endianess.
Perhaps you can use VMSTATE_STRUCT_VARRAY_UINT32 for this, if I'm not 
again mistaken.



VMSTATE_BUFFER_MULTIPLY currently lacks VMS_POINTER flag and therefore
doesn't make any use of _start field (you don't need it anyway)

Nevertheless, VMSTATE_BUFFER_MULTIPLY is just a partial solution to a
bigger set of possible problems. SD card's vmstate implementation
requires shift operation, SDHC gets size from switch {} statement,
something else later may require division or addition e.t.c.,
get_bufsize callback will cover all possible cases.

[Qemu-devel] [RFC 00/20] target-i386: convert CPU features into properties

[Igor Mammedov]

build and run tested in FC17 host with x86_64-linux-user, x86_64-softmmu
targets

Igor Mammedov (20):
  target-i386: return Error from cpu_x86_find_by_name()
  target-i386: cpu_x86_register(): report error from property setter
  target-i386: if x86_cpu_realize() failed report error and do cleanup
  target-i386: filter out not TCG features if running without kvm at
realize time
  target-i386: move out CPU features initialization in separate func
  target-i386: xlevel should be more than 0x8000, move fixup into
setter
  target-i386: convert cpuid features into properties
  target-i386: convert 'hv_spinlocks' feature into property
  target-i386: convert 'hv_relaxed' feature into property
  target-i386: convert 'hv_vapic' feature into property
  target-i386: convert 'check' and 'enforce' features into properties
  add visitor for parsing hz[KMG] input string
  target-i386: use visit_type_hz to parse tsc_freq property value
  target-i386: introduce vendor-override property
  target-i386: use define for cpuid vendor string size
  target-i386: replace uint32_t vendor fields by vendor string in
x86_def_t
  target-i386: parse cpu_model string into set of stringified
properties
  target-i386: use properties to set/unset user specified features on
CPU
  target-i386: move init of "hypervisor" feature into CPU initializer
from cpudef
  target-i386: move default init of cpuid_kvm_features bitmap into CPU
initializer from cpudef

 qapi/qapi-visit-core.c  |  11 +
 qapi/qapi-visit-core.h  |   2 +
 qapi/string-input-visitor.c |  22 ++
 target-i386/cpu.c   | 669 +++-
 target-i386/cpu.h   |  14 +-
 target-i386/helper.c|   9 +-
 6 files changed, 464 insertions(+), 263 deletions(-)

-- 
1.7.11.2

[Qemu-devel] [RFC 01/20] target-i386: return Error from cpu_x86_find_by_name()

[Igor Mammedov]

it will allow to use property setters there later.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 18 +++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 880cfea..ee25309 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -858,7 +858,8 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, 
void *opaque,
 cpu->env.tsc_khz = value / 1000;
 }
 
-static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
+static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
+const char *cpu_model, Error **errp)
 {
 unsigned int i;
 x86_def_t *def;
@@ -1003,6 +1004,11 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, 
const char *cpu_model)
 fprintf(stderr, "feature string `%s' not in format 
(+feature|-feature|feature=xyz)\n", featurestr);
 goto error;
 }
+
+if (error_is_set(errp)) {
+goto error;
+}
+
 featurestr = strtok(NULL, ",");
 }
 x86_cpu_def->features |= plus_features;
@@ -1026,6 +1032,9 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, 
const char *cpu_model)
 
 error:
 g_free(s);
+if (!error_is_set(errp)) {
+error_set(errp, QERR_INVALID_PARAMETER_COMBINATION);
+}
 return -1;
 }
 
@@ -1133,8 +1142,9 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 
 memset(def, 0, sizeof(*def));
 
-if (cpu_x86_find_by_name(def, cpu_model) < 0)
-return -1;
+if (cpu_x86_find_by_name(cpu, def, cpu_model, &error) < 0)
+goto out;
+
 if (def->vendor1) {
 env->cpuid_vendor1 = def->vendor1;
 env->cpuid_vendor2 = def->vendor2;
@@ -1173,6 +1183,8 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 env->cpuid_svm_features &= TCG_SVM_FEATURES;
 }
 object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error);
+
+out:
 if (error_is_set(&error)) {
 error_free(error);
 return -1;
-- 
1.7.11.2

[Qemu-devel] [RFC 16/20] target-i386: replace uint32_t vendor fields by vendor string in x86_def_t

[Igor Mammedov]

Vendor property setter takes string as vendor value but cpudefs
use uint32_t vendor[123] fields to define vendor value. It makes it
difficult to unify and use property setter for values from cpudefs.

To allow simplify code by using vendor property setter, vendor[123]
fields are converted into vendor[13] array to keep its value. And
vendor property setter is used to access/set value on CPU.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 76 +--
 target-i386/cpu.h | 10 +++-
 2 files changed, 20 insertions(+), 66 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 368360f..6f1b66e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -226,7 +226,7 @@ typedef struct x86_def_t {
 struct x86_def_t *next;
 const char *name;
 uint32_t level;
-uint32_t vendor1, vendor2, vendor3;
+char vendor[CPUID_VENDOR_SZ + 1];
 int family;
 int model;
 int stepping;
@@ -292,9 +292,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "qemu64",
 .level = 4,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
 .family = 6,
 .model = 2,
 .stepping = 3,
@@ -311,9 +309,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "phenom",
 .level = 5,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
 .family = 16,
 .model = 2,
 .stepping = 3,
@@ -357,9 +353,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "kvm64",
 .level = 5,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
 .family = 15,
 .model = 6,
 .stepping = 1,
@@ -458,9 +452,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "athlon",
 .level = 2,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
 .family = 6,
 .model = 2,
 .stepping = 3,
@@ -506,13 +498,16 @@ static int cpu_x86_fill_model_id(char *str)
 static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
 {
 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
+int i;
 
 x86_cpu_def->name = "host";
 host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
 x86_cpu_def->level = eax;
-x86_cpu_def->vendor1 = ebx;
-x86_cpu_def->vendor2 = edx;
-x86_cpu_def->vendor3 = ecx;
+for (i = 0; i < 4; i++) {
+x86_cpu_def->vendor[i] = ebx >> (8 * i);
+x86_cpu_def->vendor[i + 4] = edx >> (8 * i);
+x86_cpu_def->vendor[i + 8] = ecx >> (8 * i);
+}
 
 host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
 x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
@@ -537,9 +532,7 @@ static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
 x86_cpu_def->vendor_override = 0;
 
 /* Call Centaur's CPUID instruction. */
-if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
-x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
-x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
+if (!strcmp(x86_cpu_def->vendor, CPUID_VENDOR_VIA)) {
 host_cpuid(0xC000, 0, &eax, &ebx, &ecx, &edx);
 if (eax >= 0xC001) {
 /* Support VIA max extended level */
@@ -1096,15 +1089,8 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t 
*def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
 
-if (def->vendor1) {
-env->cpuid_vendor1 = def->vendor1;
-env->cpuid_vendor2 = def->vendor2;
-env->cpuid_vendor3 = def->vendor3;
-} else {
-env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
-env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
-env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
-}
+object_property_set_str(OBJECT(cpu), def->vendor[0] ?
+def->vendor : CPUID_VENDOR_INTEL, "vendor", errp);
 object_property_set_bool(OBJECT(cpu), true, "vendor-override", errp);
 object_property_set_int(OBJECT(cpu), def->level, "level", errp);
 object_property_set_int(OBJECT(cpu), def->family, "family", errp);
@@ -1128,7 +1114,6 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
-unsigned int i;
 x86_def_t *def;

[Qemu-devel] [RFC 11/20] target-i386: convert 'check' and 'enforce' features into properties

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 68 ++-
 1 file changed, 57 insertions(+), 11 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 7734613..a154e89 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -106,8 +106,8 @@ typedef struct model_features_t {
 uint32_t cpuid;
 } model_features_t;
 
-int check_cpuid = 0;
-int enforce_cpuid = 0;
+bool check_cpuid;
+bool enforce_cpuid;
 
 void host_cpuid(uint32_t function, uint32_t count,
 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
@@ -579,19 +579,20 @@ static int unavailable_host_feature(struct 
model_features_t *f, uint32_t mask)
  * their way to the guest.  Note: ft[].check_feat ideally should be
  * specified via a guest_def field to suppress report of extraneous flags.
  */
-static int check_features_against_host(x86_def_t *guest_def)
+static int check_features_against_host(X86CPU *cpu)
 {
+CPUX86State *env = &cpu->env;
 x86_def_t host_def;
 uint32_t mask;
 int rv, i;
 struct model_features_t ft[] = {
-{&guest_def->features, &host_def.features,
+{&env->cpuid_features, &host_def.features,
 ~0, feature_name, 0x},
-{&guest_def->ext_features, &host_def.ext_features,
+{&env->cpuid_ext_features, &host_def.ext_features,
 ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x0001},
-{&guest_def->ext2_features, &host_def.ext2_features,
+{&env->cpuid_ext2_features, &host_def.ext2_features,
 ~PPRO_FEATURES, ext2_feature_name, 0x8000},
-{&guest_def->ext3_features, &host_def.ext3_features,
+{&env->cpuid_ext3_features, &host_def.ext3_features,
 ~CPUID_EXT3_SVM, ext3_feature_name, 0x8001}};
 
 cpu_x86_fill_host(&host_def);
@@ -1030,6 +1031,43 @@ static void x86_set_hv_vapic(Object *obj, Visitor *v, 
void *opaque,
 }
 #endif
 
+static void x86_cpuid_get_check(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+visit_type_bool(v, &check_cpuid, name, errp);
+}
+
+static void x86_cpuid_set_check(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+check_cpuid = value;
+}
+
+static void x86_cpuid_get_enforce(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+visit_type_bool(v, &enforce_cpuid, name, errp);
+}
+
+static void x86_cpuid_set_enforce(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+enforce_cpuid = value;
+object_property_set_bool(obj, value, "check", errp);
+}
+
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
@@ -1225,10 +1263,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 x86_cpu_def->ext3_features &= ~minus_ext3_features;
 x86_cpu_def->kvm_features &= ~minus_kvm_features;
 x86_cpu_def->svm_features &= ~minus_svm_features;
-if (check_cpuid) {
-if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
-goto error;
-}
 g_free(s);
 return 0;
 
@@ -1923,6 +1957,12 @@ void x86_cpu_realize(Object *obj, Error **errp)
 env->cpuid_svm_features &= TCG_SVM_FEATURES;
 }
 
+if (check_cpuid && check_features_against_host(cpu)
+&& enforce_cpuid) {
+error_set(errp, QERR_PERMISSION_DENIED);
+return;
+}
+
 #ifndef CONFIG_USER_ONLY
 qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
 #endif
@@ -1964,6 +2004,12 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "tsc-frequency", "int",
 x86_cpuid_get_tsc_freq,
 x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
+object_property_add(obj, "check", "bool",
+x86_cpuid_get_check,
+x86_cpuid_set_check, NULL, NULL, NULL);
+object_property_add(obj, "enforce", "bool",
+x86_cpuid_get_enforce,
+x86_cpuid_set_enforce, NULL, NULL, NULL);
 #if !defined(CONFIG_USER_ONLY)
 object_property_add(obj, "hv_spinlocks", "int",
 x86_get_hv_spinlocks,
-- 
1.7.11.2

[Qemu-devel] [RFC 20/20] target-i386: move default init of cpuid_kvm_features bitmap into CPU initializer from cpudef

[Igor Mammedov]

Moving it inside CPU initializer from cpudef will help to split
cpu_x86_find_by_name() into default init and user settable properties.

PS:
  Is kvm_features field necessary in cpudef, what the point
  if it's almost imediately overwritten to ~0? Could it be removed
  from cpudef?

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 43601a3..e266792 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1093,6 +1093,9 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
 env->cpuid_xlevel2 = def->xlevel2;
 
+/* not supported bits will be filtered out later */
+env->cpuid_kvm_features = ~0;
+
 object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
 }
 
@@ -1175,9 +1178,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 
 cpudef_2_x86_cpu(cpu, def, errp);
 
-/* not supported bits will be filtered out later */
-env->cpuid_kvm_features = ~0;
-
 for (ent = qdict_first(features); ent; ent = qdict_next(features, ent)) {
 const QString *qval = qobject_to_qstring(qdict_entry_value(ent));
 object_property_parse(OBJECT(cpu), qstring_get_str(qval),
-- 
1.7.11.2

[Qemu-devel] [RFC 07/20] target-i386: convert cpuid features into properties

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 103 ++
 1 file changed, 103 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index a47cc12..4b22598 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -605,6 +605,103 @@ static int check_features_against_host(x86_def_t 
*guest_def)
 return rv;
 }
 
+static bool is_feature_set(const char *name, const uint32_t featbitmap,
+  const char **featureset)
+{
+uint32_t mask;
+
+for (mask = 1; mask; mask <<= 1) {
+if (featureset[ffs(mask) - 1] &&
+!altcmp(name, NULL, featureset[ffs(mask) - 1])) {
+break;
+}
+}
+if (featbitmap & mask) {
+return true;
+}
+return false;
+}
+
+static void x86_cpuid_get_feature(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+bool value = true;
+
+if (!is_feature_set(name, env->cpuid_features, feature_name) &&
+   !is_feature_set(name, env->cpuid_ext_features, ext_feature_name) &&
+   !is_feature_set(name, env->cpuid_ext2_features, ext2_feature_name) &&
+   !is_feature_set(name, env->cpuid_ext3_features, ext3_feature_name) &&
+   !is_feature_set(name, env->cpuid_kvm_features, kvm_feature_name) &&
+   !is_feature_set(name, env->cpuid_svm_features, svm_feature_name)) {
+value = false;
+}
+
+visit_type_bool(v, &value, name, errp);
+}
+
+static void x86_cpuid_set_feature(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+uint32_t mask = 0;
+uint32_t *dst_features;
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+
+if (lookup_feature(&mask, name, NULL, feature_name)) {
+dst_features = &env->cpuid_features;
+} else if (lookup_feature(&mask, name, NULL, ext_feature_name)) {
+dst_features = &env->cpuid_ext_features;
+} else if (lookup_feature(&mask, name, NULL, ext2_feature_name)) {
+dst_features = &env->cpuid_ext2_features;
+} else if (lookup_feature(&mask, name, NULL, ext3_feature_name)) {
+dst_features = &env->cpuid_ext3_features;
+} else if (lookup_feature(&mask, name, NULL, kvm_feature_name)) {
+dst_features = &env->cpuid_kvm_features;
+} else if (lookup_feature(&mask, name, NULL, svm_feature_name)) {
+dst_features = &env->cpuid_svm_features;
+} else {
+error_set(errp, QERR_PROPERTY_NOT_FOUND, "", name);
+return;
+}
+
+if (value) {
+*dst_features |= mask;
+} else {
+*dst_features &= ~mask;
+}
+}
+
+static void x86_register_cpuid_properties(Object *obj, const char **featureset)
+{
+uint32_t mask;
+
+for (mask = 1; mask; mask <<= 1) {
+if (featureset[ffs(mask) - 1]) {
+char *feature_name, *save_ptr;
+char buf[32];
+if (strlen(featureset[ffs(mask) - 1]) > sizeof(buf) - 1) {
+abort();
+}
+pstrcpy(buf, sizeof(buf), featureset[ffs(mask) - 1]);
+feature_name = strtok_r(buf, "|", &save_ptr);
+while (feature_name) {
+object_property_add(obj, feature_name, "bool",
+x86_cpuid_get_feature,
+x86_cpuid_set_feature, NULL, NULL, NULL);
+feature_name = strtok_r(NULL, "|", &save_ptr);
+}
+}
+}
+}
+
 static void x86_cpuid_version_get_family(Object *obj, Visitor *v, void *opaque,
  const char *name, Error **errp)
 {
@@ -1801,6 +1898,12 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "tsc-frequency", "int",
 x86_cpuid_get_tsc_freq,
 x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
+x86_register_cpuid_properties(obj, feature_name);
+x86_register_cpuid_properties(obj, ext_feature_name);
+x86_register_cpuid_properties(obj, ext2_feature_name);
+x86_register_cpuid_properties(obj, ext3_feature_name);
+x86_register_cpuid_properties(obj, kvm_feature_name);
+x86_register_cpuid_properties(obj, svm_feature_name);
 
 env->cpuid_apic_id = env->cpu_index;
 
-- 
1.7.11.2

Re: [Qemu-devel] [RFC 00/20] target-i386: convert CPU features into properties

[Igor Mammedov]

PS:
forgot to add git tree for testing:
https://github.com/imammedo/qemu/tree/x86-cpu-properties_RFC

- Original Message -
> From: "Igor Mammedov" 
> To: qemu-devel@nongnu.org
> Cc: aligu...@us.ibm.com, stefa...@linux.vnet.ibm.com, g...@redhat.com, "jan 
> kiszka" ,
> mtosa...@redhat.com, mdr...@linux.vnet.ibm.com, blauwir...@gmail.com, 
> a...@redhat.com, pbonz...@redhat.com,
> ak...@redhat.com, ler...@redhat.com, afaer...@suse.de, ehabk...@redhat.com
> Sent: Friday, August 10, 2012 1:22:16 PM
> Subject: [Qemu-devel] [RFC 00/20] target-i386: convert CPU features into  
> properties
> 
> build and run tested in FC17 host with x86_64-linux-user,
> x86_64-softmmu
> targets
> 
> Igor Mammedov (20):
>   target-i386: return Error from cpu_x86_find_by_name()
>   target-i386: cpu_x86_register(): report error from property setter
>   target-i386: if x86_cpu_realize() failed report error and do
>   cleanup
>   target-i386: filter out not TCG features if running without kvm at
> realize time
>   target-i386: move out CPU features initialization in separate func
>   target-i386: xlevel should be more than 0x8000, move fixup into
> setter
>   target-i386: convert cpuid features into properties
>   target-i386: convert 'hv_spinlocks' feature into property
>   target-i386: convert 'hv_relaxed' feature into property
>   target-i386: convert 'hv_vapic' feature into property
>   target-i386: convert 'check' and 'enforce' features into properties
>   add visitor for parsing hz[KMG] input string
>   target-i386: use visit_type_hz to parse tsc_freq property value
>   target-i386: introduce vendor-override property
>   target-i386: use define for cpuid vendor string size
>   target-i386: replace uint32_t vendor fields by vendor string in
> x86_def_t
>   target-i386: parse cpu_model string into set of stringified
> properties
>   target-i386: use properties to set/unset user specified features on
> CPU
>   target-i386: move init of "hypervisor" feature into CPU initializer
> from cpudef
>   target-i386: move default init of cpuid_kvm_features bitmap into
>   CPU
> initializer from cpudef
> 
>  qapi/qapi-visit-core.c  |  11 +
>  qapi/qapi-visit-core.h  |   2 +
>  qapi/string-input-visitor.c |  22 ++
>  target-i386/cpu.c   | 669
>  +++-
>  target-i386/cpu.h   |  14 +-
>  target-i386/helper.c|   9 +-
>  6 files changed, 464 insertions(+), 263 deletions(-)
> 
> --
> 1.7.11.2
> 
> 
> 

[Qemu-devel] [RFC 12/20] add visitor for parsing hz[KMG] input string

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 qapi/qapi-visit-core.c  | 11 +++
 qapi/qapi-visit-core.h  |  2 ++
 qapi/string-input-visitor.c | 22 ++
 3 files changed, 35 insertions(+)

diff --git a/qapi/qapi-visit-core.c b/qapi/qapi-visit-core.c
index 7a82b63..322cfa6 100644
--- a/qapi/qapi-visit-core.c
+++ b/qapi/qapi-visit-core.c
@@ -311,3 +311,14 @@ void input_type_enum(Visitor *v, int *obj, const char 
*strings[],
 g_free(enum_str);
 *obj = value;
 }
+
+void visit_type_hz(Visitor *v, int64_t *obj, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+if (v->type_hz) {
+v->type_hz(v, obj, name, errp);
+} else {
+v->type_int(v, obj, name, errp);
+}
+}
+}
diff --git a/qapi/qapi-visit-core.h b/qapi/qapi-visit-core.h
index 60aceda..29d3038 100644
--- a/qapi/qapi-visit-core.h
+++ b/qapi/qapi-visit-core.h
@@ -62,6 +62,7 @@ struct Visitor
 void (*type_int64)(Visitor *v, int64_t *obj, const char *name, Error 
**errp);
 /* visit_type_size() falls back to (*type_uint64)() if type_size is unset 
*/
 void (*type_size)(Visitor *v, uint64_t *obj, const char *name, Error 
**errp);
+void (*type_hz)(Visitor *v, int64_t *obj, const char *name, Error **errp);
 };
 
 void visit_start_handle(Visitor *v, void **obj, const char *kind,
@@ -91,5 +92,6 @@ void visit_type_size(Visitor *v, uint64_t *obj, const char 
*name, Error **errp);
 void visit_type_bool(Visitor *v, bool *obj, const char *name, Error **errp);
 void visit_type_str(Visitor *v, char **obj, const char *name, Error **errp);
 void visit_type_number(Visitor *v, double *obj, const char *name, Error 
**errp);
+void visit_type_hz(Visitor *v, int64_t *obj, const char *name, Error **errp);
 
 #endif
diff --git a/qapi/string-input-visitor.c b/qapi/string-input-visitor.c
index 497eb9a..32e3780 100644
--- a/qapi/string-input-visitor.c
+++ b/qapi/string-input-visitor.c
@@ -110,6 +110,27 @@ static void parse_start_optional(Visitor *v, bool *present,
 *present = true;
 }
 
+static void parse_type_hz(Visitor *v, int64_t *obj, const char *name,
+ Error **errp)
+{
+StringInputVisitor *siv = DO_UPCAST(StringInputVisitor, visitor, v);
+char *endp = (char *) siv->string;
+long long val;
+
+errno = 0;
+if (siv->string) {
+val = strtosz_suffix_unit(siv->string, &endp,
+ STRTOSZ_DEFSUFFIX_B, 1000);
+}
+if (!siv->string || val == -1 || *endp) {
+error_set(errp, QERR_INVALID_PARAMETER_VALUE, name,
+  "a value representible as a non-negative int64");
+return;
+}
+
+*obj = val;
+}
+
 Visitor *string_input_get_visitor(StringInputVisitor *v)
 {
 return &v->visitor;
@@ -132,6 +153,7 @@ StringInputVisitor *string_input_visitor_new(const char 
*str)
 v->visitor.type_str = parse_type_str;
 v->visitor.type_number = parse_type_number;
 v->visitor.start_optional = parse_start_optional;
+v->visitor.type_hz = parse_type_hz;
 
 v->string = str;
 return v;
-- 
1.7.11.2

[Qemu-devel] [RFC 19/20] target-i386: move init of "hypervisor" feature into CPU initializer from cpudef

[Igor Mammedov]

"hypervisor" CPU feature is unconditionally enabled/overridden even if it's 
cleared
in cpudef. Moving it inside CPU initializer from cpudef will help to
split cpu_x86_find_by_name() into default init and user settable properties.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0174c4d..43601a3 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1092,6 +1092,8 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_ext4_features = def->ext4_features;
 env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
 env->cpuid_xlevel2 = def->xlevel2;
+
+object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
 }
 
 /* convert legacy cpumodel string to string cpu_name and
@@ -1176,8 +1178,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 /* not supported bits will be filtered out later */
 env->cpuid_kvm_features = ~0;
 
-object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
-
 for (ent = qdict_first(features); ent; ent = qdict_next(features, ent)) {
 const QString *qval = qobject_to_qstring(qdict_entry_value(ent));
 object_property_parse(OBJECT(cpu), qstring_get_str(qval),
-- 
1.7.11.2

[Qemu-devel] [RFC 17/20] target-i386: parse cpu_model string into set of stringified properties

[Igor Mammedov]

cpu_model string does represent features in following format:
 ([+-]feat)|(feat=foo)|(feat)
which makes it impossible directly use property infrastructure
to set features on CPU.
This patch introduces parser that splits CPU name from cpu_model and
converts legacy features string into canonized set of strings that
is compatible with property manipulation infrastructure.

PS:
  * later it could be used as a hook to convert legacy command line
features to global properties. Then marked as deprecated and
removed with -cpu option in the future.
  * compiler complains that it's unused function but I guess it is
easier for review this way

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 52 
 1 file changed, 52 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 6f1b66e..7555b08 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -,6 +,58 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t 
*def, Error **errp)
 env->cpuid_xlevel2 = def->xlevel2;
 }
 
+/* convert legacy cpumodel string to string cpu_name and
+ * a uniforms set of custom features that will be applied to CPU
+ * using object_property_parse()
+ */
+static void compat_normalize_cpu_model(const char *cpu_model, char **cpu_name,
+QDict **features, Error **errp)
+{
+
+char *s = g_strdup(cpu_model);
+char *featurestr, *sptr;
+
+*cpu_name = strtok_r(s, ",", &sptr);
+*features = qdict_new();
+
+featurestr = strtok_r(NULL, ",", &sptr);
+while (featurestr) {
+char *val;
+if (featurestr[0] == '+') {
+/*
+ * preseve legacy behaviour, if feature was disabled once
+ * do not allow to enable it again
+ */
+if (!qdict_haskey(*features, featurestr + 1)) {
+qdict_put(*features, featurestr + 1, qstring_from_str("on"));
+}
+} else if (featurestr[0] == '-') {
+qdict_put(*features, featurestr + 1, qstring_from_str("off"));
+} else {
+val = strchr(featurestr, '=');
+if (val) {
+*val = 0; val++;
+if (!strcmp(featurestr, "vendor")) {
+qdict_put(*features, "vendor-override",
+  qstring_from_str("on"));
+qdict_put(*features, featurestr, qstring_from_str(val));
+} else if (!strcmp(featurestr, "tsc_freq")) {
+qdict_put(*features, "tsc-frequency",
+  qstring_from_str(val));
+} else {
+qdict_put(*features, featurestr, qstring_from_str(val));
+}
+} else {
+qdict_put(*features, featurestr, qstring_from_str("on"));
+}
+}
+
+featurestr = strtok_r(NULL, ",", &sptr);
+}
+
+return;
+}
+
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
-- 
1.7.11.2

[Qemu-devel] [RFC 13/20] target-i386: use visit_type_hz to parse tsc_freq property value

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index a154e89..c935c04 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -952,7 +952,7 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, 
void *opaque,
 const int64_t max = INT_MAX;
 int64_t value;
 
-visit_type_int(v, &value, name, errp);
+visit_type_hz(v, &value, name, errp);
 if (error_is_set(errp)) {
 return;
 }
-- 
1.7.11.2

Re: [Qemu-devel] [RFC 12/20] add visitor for parsing hz[KMG] input string

[Igor Mammedov]

- Original Message -
> From: "Andreas Färber" 
> To: "Igor Mammedov" 
> Cc: qemu-devel@nongnu.org, g...@redhat.com, ler...@redhat.com, 
> pbonz...@redhat.com, stefa...@linux.vnet.ibm.com,
> mdr...@linux.vnet.ibm.com, ak...@redhat.com, ehabk...@redhat.com, 
> aligu...@us.ibm.com, mtosa...@redhat.com, "jan
> kiszka" , blauwir...@gmail.com, a...@redhat.com
> Sent: Friday, August 10, 2012 1:57:42 PM
> Subject: Re: [RFC 12/20] add visitor for parsing hz[KMG] input string
> 
> Am 10.08.2012 13:22, schrieb Igor Mammedov:
> > Signed-off-by: Igor Mammedov 
> > ---
> >  qapi/qapi-visit-core.c  | 11 +++
> >  qapi/qapi-visit-core.h  |  2 ++
> >  qapi/string-input-visitor.c | 22 ++
> >  3 files changed, 35 insertions(+)
> > 
> > diff --git a/qapi/qapi-visit-core.c b/qapi/qapi-visit-core.c
> > index 7a82b63..322cfa6 100644
> > --- a/qapi/qapi-visit-core.c
> > +++ b/qapi/qapi-visit-core.c
> > @@ -311,3 +311,14 @@ void input_type_enum(Visitor *v, int *obj,
> > const char *strings[],
> >  g_free(enum_str);
> >  *obj = value;
> >  }
> > +
> > +void visit_type_hz(Visitor *v, int64_t *obj, const char *name,
> > Error **errp)
> > +{
> > +if (!error_is_set(errp)) {
> > +if (v->type_hz) {
> > +v->type_hz(v, obj, name, errp);
> > +} else {
> > +v->type_int(v, obj, name, errp);
> > +}
> > +}
> > +}
> > diff --git a/qapi/qapi-visit-core.h b/qapi/qapi-visit-core.h
> > index 60aceda..29d3038 100644
> > --- a/qapi/qapi-visit-core.h
> > +++ b/qapi/qapi-visit-core.h
> > @@ -62,6 +62,7 @@ struct Visitor
> >  void (*type_int64)(Visitor *v, int64_t *obj, const char *name,
> >  Error **errp);
> >  /* visit_type_size() falls back to (*type_uint64)() if
> >  type_size is unset */
> >  void (*type_size)(Visitor *v, uint64_t *obj, const char *name,
> >  Error **errp);
> > +void (*type_hz)(Visitor *v, int64_t *obj, const char *name,
> > Error **errp);
> >  };
> >  
> >  void visit_start_handle(Visitor *v, void **obj, const char *kind,
> > @@ -91,5 +92,6 @@ void visit_type_size(Visitor *v, uint64_t *obj,
> > const char *name, Error **errp);
> >  void visit_type_bool(Visitor *v, bool *obj, const char *name,
> >  Error **errp);
> >  void visit_type_str(Visitor *v, char **obj, const char *name,
> >  Error **errp);
> >  void visit_type_number(Visitor *v, double *obj, const char *name,
> >  Error **errp);
> > +void visit_type_hz(Visitor *v, int64_t *obj, const char *name,
> > Error **errp);
> >  
> >  #endif
> > diff --git a/qapi/string-input-visitor.c
> > b/qapi/string-input-visitor.c
> > index 497eb9a..32e3780 100644
> > --- a/qapi/string-input-visitor.c
> > +++ b/qapi/string-input-visitor.c
> > @@ -110,6 +110,27 @@ static void parse_start_optional(Visitor *v,
> > bool *present,
> >  *present = true;
> >  }
> >  
> > +static void parse_type_hz(Visitor *v, int64_t *obj, const char
> > *name,
> > + Error **errp)
> > +{
> > +StringInputVisitor *siv = DO_UPCAST(StringInputVisitor,
> > visitor, v);
> > +char *endp = (char *) siv->string;
> > +long long val;
> > +
> > +errno = 0;
> > +if (siv->string) {
> > +val = strtosz_suffix_unit(siv->string, &endp,
> > + STRTOSZ_DEFSUFFIX_B, 1000);
> > +}
> > +if (!siv->string || val == -1 || *endp) {
> > +error_set(errp, QERR_INVALID_PARAMETER_VALUE, name,
> > +  "a value representible as a non-negative int64");
> 
> Thunderbird suggests "representable".
copy paste error, I'll fix source and here.

> 
> > +return;
> > +}
> > +
> > +*obj = val;
> > +}
> > +
> >  Visitor *string_input_get_visitor(StringInputVisitor *v)
> >  {
> >  return &v->visitor;
> > @@ -132,6 +153,7 @@ StringInputVisitor
> > *string_input_visitor_new(const char *str)
> >  v->visitor.type_str = parse_type_str;
> >  v->visitor.type_number = parse_type_number;
> >  v->visitor.start_optional = parse_start_optional;
> > +v->visitor.type_hz = parse_type_hz;
> >  
> >  v->string = str;
> >  return v;
> 
> I would prefer to stay physically exact and do s/hz/freq/g. ;)
I'll do it next respin.

> 
> Seems like a good idea to have a specialized visitor, didn't think of
> that. Quite possibly there's use cases beyond tsc_freq that we might
> want to switch as follow-ups.
> 
> Regards,
> Andreas
> 
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG
> Nürnberg
> 
Thanks,
  Igor

[Qemu-devel] [RFC 06/20] target-i386: xlevel should be more than 0x80000000, move fixup into setter

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 14 ++
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 783c6f4..a47cc12 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -745,8 +745,17 @@ static void x86_cpuid_set_xlevel(Object *obj, Visitor *v, 
void *opaque,
  const char *name, Error **errp)
 {
 X86CPU *cpu = X86_CPU(obj);
+uint32_t value;
 
-visit_type_uint32(v, &cpu->env.cpuid_xlevel, name, errp);
+visit_type_uint32(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+
+if (value < 0x8000) {
+value += 0x8000;
+}
+cpu->env.cpuid_xlevel = value;
 }
 
 static char *x86_cpuid_get_vendor(Object *obj, Error **errp)
@@ -981,9 +990,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 fprintf(stderr, "bad numerical value %s\n", val);
 goto error;
 }
-if (numvalue < 0x8000) {
-numvalue += 0x8000;
-}
 x86_cpu_def->xlevel = numvalue;
 } else if (!strcmp(featurestr, "vendor")) {
 if (strlen(val) != 12) {
-- 
1.7.11.2

[Qemu-devel] [RFC 02/20] target-i386: cpu_x86_register(): report error from property setter

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index ee25309..17e98e1 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1186,6 +1186,7 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 
 out:
 if (error_is_set(&error)) {
+fprintf(stderr, "%s\n", error_get_pretty(error));
 error_free(error);
 return -1;
 }
-- 
1.7.11.2

[Qemu-devel] [RFC 14/20] target-i386: introduce vendor-override property

[Igor Mammedov]

currently 'cpuid_vendor_override' can be set only via cmd line cpu_model
string. But setting it in 'vendor' property prevents using 'vendor'
property on its own without setting cpuid_vendor_override.

So fix/remove enabling cpuid_vendor_override from "vendor" property setter.
It's up-to cpu_model string parser to maintain legacy behavior when user
overrides vendor on command line.

v2:
  - convert cpuid_vendor_override to bool to reflect its real usage

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 31 +--
 target-i386/cpu.h |  2 +-
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c935c04..d3ce849 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -894,7 +894,6 @@ static void x86_cpuid_set_vendor(Object *obj, const char 
*value,
 env->cpuid_vendor2 |= ((uint8_t)value[i + 4]) << (8 * i);
 env->cpuid_vendor3 |= ((uint8_t)value[i + 8]) << (8 * i);
 }
-env->cpuid_vendor_override = 1;
 }
 
 static char *x86_cpuid_get_model_id(Object *obj, Error **errp)
@@ -1068,6 +1067,31 @@ static void x86_cpuid_set_enforce(Object *obj, Visitor 
*v, void *opaque,
 object_property_set_bool(obj, value, "check", errp);
 }
 
+static void
+x86_cpuid_get_vendor_override(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+
+visit_type_bool(v, &env->cpuid_vendor_override, name, errp);
+}
+
+static void
+x86_cpuid_set_vendor_override(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+env->cpuid_vendor_override = value;
+}
+
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
@@ -1081,7 +1105,7 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
 env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
 }
-env->cpuid_vendor_override = def->vendor_override;
+object_property_set_bool(OBJECT(cpu), true, "vendor-override", errp);
 object_property_set_int(OBJECT(cpu), def->level, "level", errp);
 object_property_set_int(OBJECT(cpu), def->family, "family", errp);
 object_property_set_int(OBJECT(cpu), def->model, "model", errp);
@@ -1998,6 +2022,9 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add_str(obj, "vendor",
 x86_cpuid_get_vendor,
 x86_cpuid_set_vendor, NULL);
+object_property_add(obj, "vendor-override", "bool",
+x86_cpuid_get_vendor_override,
+x86_cpuid_set_vendor_override, NULL, NULL, NULL);
 object_property_add_str(obj, "model-id",
 x86_cpuid_get_model_id,
 x86_cpuid_set_model_id, NULL);
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 60f9e97..979682a 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -739,7 +739,7 @@ typedef struct CPUX86State {
 uint32_t cpuid_ext2_features;
 uint32_t cpuid_ext3_features;
 uint32_t cpuid_apic_id;
-int cpuid_vendor_override;
+bool cpuid_vendor_override;
 /* Store the results of Centaur's CPUID instructions */
 uint32_t cpuid_xlevel2;
 uint32_t cpuid_ext4_features;
-- 
1.7.11.2

[Qemu-devel] [RFC 05/20] target-i386: move out CPU features initialization in separate func

[Igor Mammedov]

later it could be used in cpu_x86_find_by_name() to init
CPU from found cpu_def

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 62 ++-
 1 file changed, 34 insertions(+), 28 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d0dec63..783c6f4 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -858,6 +858,39 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor 
*v, void *opaque,
 cpu->env.tsc_khz = value / 1000;
 }
 
+static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
+{
+CPUX86State *env = &cpu->env;
+
+if (def->vendor1) {
+env->cpuid_vendor1 = def->vendor1;
+env->cpuid_vendor2 = def->vendor2;
+env->cpuid_vendor3 = def->vendor3;
+} else {
+env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
+env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
+env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
+}
+env->cpuid_vendor_override = def->vendor_override;
+object_property_set_int(OBJECT(cpu), def->level, "level", errp);
+object_property_set_int(OBJECT(cpu), def->family, "family", errp);
+object_property_set_int(OBJECT(cpu), def->model, "model", errp);
+object_property_set_int(OBJECT(cpu), def->stepping, "stepping", errp);
+object_property_set_int(OBJECT(cpu), def->xlevel, "xlevel", errp);
+object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp);
+object_property_set_int(OBJECT(cpu), (int64_t)def->tsc_khz * 1000,
+"tsc-frequency", errp);
+env->cpuid_features = def->features;
+env->cpuid_ext_features = def->ext_features;
+env->cpuid_ext2_features = def->ext2_features;
+env->cpuid_ext3_features = def->ext3_features;
+env->cpuid_kvm_features = def->kvm_features;
+env->cpuid_svm_features = def->svm_features;
+env->cpuid_ext4_features = def->ext4_features;
+env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
+env->cpuid_xlevel2 = def->xlevel2;
+}
+
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
@@ -1136,7 +1169,6 @@ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, 
const char *optarg)
 
 int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 {
-CPUX86State *env = &cpu->env;
 x86_def_t def1, *def = &def1;
 Error *error = NULL;
 
@@ -1145,33 +1177,7 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 if (cpu_x86_find_by_name(cpu, def, cpu_model, &error) < 0)
 goto out;
 
-if (def->vendor1) {
-env->cpuid_vendor1 = def->vendor1;
-env->cpuid_vendor2 = def->vendor2;
-env->cpuid_vendor3 = def->vendor3;
-} else {
-env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
-env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
-env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
-}
-env->cpuid_vendor_override = def->vendor_override;
-object_property_set_int(OBJECT(cpu), def->level, "level", &error);
-object_property_set_int(OBJECT(cpu), def->family, "family", &error);
-object_property_set_int(OBJECT(cpu), def->model, "model", &error);
-object_property_set_int(OBJECT(cpu), def->stepping, "stepping", &error);
-env->cpuid_features = def->features;
-env->cpuid_ext_features = def->ext_features;
-env->cpuid_ext2_features = def->ext2_features;
-env->cpuid_ext3_features = def->ext3_features;
-object_property_set_int(OBJECT(cpu), def->xlevel, "xlevel", &error);
-env->cpuid_kvm_features = def->kvm_features;
-env->cpuid_svm_features = def->svm_features;
-env->cpuid_ext4_features = def->ext4_features;
-env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
-env->cpuid_xlevel2 = def->xlevel2;
-object_property_set_int(OBJECT(cpu), (int64_t)def->tsc_khz * 1000,
-"tsc-frequency", &error);
-object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error);
+cpudef_2_x86_cpu(cpu, def, &error);
 
 out:
 if (error_is_set(&error)) {
-- 
1.7.11.2

[Qemu-devel] [RFC 08/20] target-i386: convert 'hv_spinlocks' feature into property

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 4b22598..fb98bbd 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -964,6 +964,32 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor 
*v, void *opaque,
 cpu->env.tsc_khz = value / 1000;
 }
 
+#if !defined(CONFIG_USER_ONLY)
+static void x86_get_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+int64_t value = hyperv_get_spinlock_retries();
+
+visit_type_int(v, &value, name, errp);
+}
+
+static void x86_set_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+int64_t value;
+
+visit_type_int(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+if (!value) {
+error_set(errp, QERR_PROPERTY_VALUE_BAD, "", name, "0");
+return;
+}
+hyperv_set_spinlock_retries(value);
+}
+#endif
+
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
@@ -1898,6 +1924,11 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "tsc-frequency", "int",
 x86_cpuid_get_tsc_freq,
 x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
+#if !defined(CONFIG_USER_ONLY)
+object_property_add(obj, "hv_spinlocks", "int",
+x86_get_hv_spinlocks,
+x86_set_hv_spinlocks, NULL, NULL, NULL);
+#endif
 x86_register_cpuid_properties(obj, feature_name);
 x86_register_cpuid_properties(obj, ext_feature_name);
 x86_register_cpuid_properties(obj, ext2_feature_name);
-- 
1.7.11.2

[Qemu-devel] [RFC 03/20] target-i386: if x86_cpu_realize() failed report error and do cleanup

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/helper.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index 8a5da3d..a0e4c89 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1151,6 +1151,7 @@ X86CPU *cpu_x86_init(const char *cpu_model)
 {
 X86CPU *cpu;
 CPUX86State *env;
+Error *error = NULL;
 
 cpu = X86_CPU(object_new(TYPE_X86_CPU));
 env = &cpu->env;
@@ -1161,8 +1162,12 @@ X86CPU *cpu_x86_init(const char *cpu_model)
 return NULL;
 }
 
-x86_cpu_realize(OBJECT(cpu), NULL);
-
+x86_cpu_realize(OBJECT(cpu), &error);
+if (error_is_set(&error)) {
+error_free(error);
+object_delete(OBJECT(cpu));
+return NULL;
+}
 return cpu;
 }
 
-- 
1.7.11.2

[Qemu-devel] [RFC 18/20] target-i386: use properties to set/unset user specified features on CPU

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 167 +++---
 1 file changed, 20 insertions(+), 147 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 7555b08..0174c4d 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -206,22 +206,6 @@ static bool lookup_feature(uint32_t *pval, const char *s, 
const char *e,
 return found;
 }
 
-static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
-uint32_t *ext_features,
-uint32_t *ext2_features,
-uint32_t *ext3_features,
-uint32_t *kvm_features,
-uint32_t *svm_features)
-{
-if (!lookup_feature(features, flagname, NULL, feature_name) &&
-!lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
-!lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
-!lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
-!lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
-!lookup_feature(svm_features, flagname, NULL, svm_feature_name))
-fprintf(stderr, "CPU feature %s not found\n", flagname);
-}
-
 typedef struct x86_def_t {
 struct x86_def_t *next;
 const char *name;
@@ -1104,7 +1088,6 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_ext_features = def->ext_features;
 env->cpuid_ext2_features = def->ext2_features;
 env->cpuid_ext3_features = def->ext3_features;
-env->cpuid_kvm_features = def->kvm_features;
 env->cpuid_svm_features = def->svm_features;
 env->cpuid_ext4_features = def->ext4_features;
 env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
@@ -1168,17 +1151,14 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 {
 x86_def_t *def;
 
-char *s = g_strdup(cpu_model);
-char *featurestr, *name = strtok(s, ",");
-/* Features to be added*/
-uint32_t plus_features = 0, plus_ext_features = 0;
-uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
-uint32_t plus_kvm_features = 0, plus_svm_features = 0;
-/* Features to be removed */
-uint32_t minus_features = 0, minus_ext_features = 0;
-uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
-uint32_t minus_kvm_features = 0, minus_svm_features = 0;
-uint32_t numvalue;
+QDict *features;
+const QDictEntry *ent;
+char *name;
+
+compat_normalize_cpu_model(cpu_model, &name, &features, errp);
+if (error_is_set(errp)) {
+goto error;
+}
 
 for (def = x86_defs; def; def = def->next)
 if (name && !strcmp(name, def->name))
@@ -1191,133 +1171,28 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 memcpy(x86_cpu_def, def, sizeof(*def));
 }
 
-plus_kvm_features = ~0; /* not supported bits will be filtered out later */
-
-add_flagname_to_bitmaps("hypervisor", &plus_features,
-&plus_ext_features, &plus_ext2_features, &plus_ext3_features,
-&plus_kvm_features, &plus_svm_features);
+cpudef_2_x86_cpu(cpu, def, errp);
 
-featurestr = strtok(NULL, ",");
+/* not supported bits will be filtered out later */
+env->cpuid_kvm_features = ~0;
 
-while (featurestr) {
-char *val;
-if (featurestr[0] == '+') {
-add_flagname_to_bitmaps(featurestr + 1, &plus_features,
-&plus_ext_features, &plus_ext2_features,
-&plus_ext3_features, &plus_kvm_features,
-&plus_svm_features);
-} else if (featurestr[0] == '-') {
-add_flagname_to_bitmaps(featurestr + 1, &minus_features,
-&minus_ext_features, &minus_ext2_features,
-&minus_ext3_features, &minus_kvm_features,
-&minus_svm_features);
-} else if ((val = strchr(featurestr, '='))) {
-*val = 0; val++;
-if (!strcmp(featurestr, "family")) {
-char *err;
-numvalue = strtoul(val, &err, 0);
-if (!*val || *err || numvalue > 0xff + 0xf) {
-fprintf(stderr, "bad numerical value %s\n", val);
-goto error;
-}
-x86_cpu_def->family = numvalue;
-} else if (!strcmp(featurestr, "model")) {
-char *err;
-numvalue = strtoul(val, &err, 0);
-if (!*val || *err || numvalue > 0xff) {
- 

[Qemu-devel] [RFC 15/20] target-i386: use define for cpuid vendor string size

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 6 +++---
 target-i386/cpu.h | 2 ++
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d3ce849..368360f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -863,13 +863,13 @@ static char *x86_cpuid_get_vendor(Object *obj, Error 
**errp)
 char *value;
 int i;
 
-value = (char *)g_malloc(12 + 1);
+value = (char *)g_malloc(CPUID_VENDOR_SZ + 1);
 for (i = 0; i < 4; i++) {
 value[i] = env->cpuid_vendor1 >> (8 * i);
 value[i + 4] = env->cpuid_vendor2 >> (8 * i);
 value[i + 8] = env->cpuid_vendor3 >> (8 * i);
 }
-value[12] = '\0';
+value[CPUID_VENDOR_SZ] = '\0';
 return value;
 }
 
@@ -880,7 +880,7 @@ static void x86_cpuid_set_vendor(Object *obj, const char 
*value,
 CPUX86State *env = &cpu->env;
 int i;
 
-if (strlen(value) != 12) {
+if (strlen(value) != CPUID_VENDOR_SZ) {
 error_set(errp, QERR_PROPERTY_VALUE_BAD, "",
   "vendor", value);
 return;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 979682a..5c75704 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -440,6 +440,8 @@
 #define CPUID_SVM_PAUSEFILTER  (1 << 10)
 #define CPUID_SVM_PFTHRESHOLD  (1 << 12)
 
+#define CPUID_VENDOR_SZ  12
+
 #define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */
 #define CPUID_VENDOR_INTEL_2 0x49656e69 /* "ineI" */
 #define CPUID_VENDOR_INTEL_3 0x6c65746e /* "ntel" */
-- 
1.7.11.2

[Qemu-devel] [RFC 09/20] target-i386: convert 'hv_relaxed' feature into property

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index fb98bbd..f73309e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -988,6 +988,26 @@ static void x86_set_hv_spinlocks(Object *obj, Visitor *v, 
void *opaque,
 }
 hyperv_set_spinlock_retries(value);
 }
+
+static void x86_get_hv_relaxed(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value = hyperv_relaxed_timing_enabled();
+
+visit_type_bool(v, &value, name, errp);
+}
+
+static void x86_set_hv_relaxed(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+hyperv_enable_relaxed_timing(value);
+}
 #endif
 
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
@@ -1928,6 +1948,9 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "hv_spinlocks", "int",
 x86_get_hv_spinlocks,
 x86_set_hv_spinlocks, NULL, NULL, NULL);
+object_property_add(obj, "hv_relaxed", "bool",
+x86_get_hv_relaxed,
+x86_set_hv_relaxed, NULL, NULL, NULL);
 #endif
 x86_register_cpuid_properties(obj, feature_name);
 x86_register_cpuid_properties(obj, ext_feature_name);
-- 
1.7.11.2

[Qemu-devel] [RFC 04/20] target-i386: filter out not TCG features if running without kvm at realize time

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 24 +---
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 17e98e1..d0dec63 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1171,17 +1171,6 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 env->cpuid_xlevel2 = def->xlevel2;
 object_property_set_int(OBJECT(cpu), (int64_t)def->tsc_khz * 1000,
 "tsc-frequency", &error);
-if (!kvm_enabled()) {
-env->cpuid_features &= TCG_FEATURES;
-env->cpuid_ext_features &= TCG_EXT_FEATURES;
-env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
-#ifdef TARGET_X86_64
-| CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
-#endif
-);
-env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
-env->cpuid_svm_features &= TCG_SVM_FEATURES;
-}
 object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error);
 
 out:
@@ -1745,6 +1734,19 @@ static void mce_init(X86CPU *cpu)
 void x86_cpu_realize(Object *obj, Error **errp)
 {
 X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+
+if (!kvm_enabled()) {
+env->cpuid_features &= TCG_FEATURES;
+env->cpuid_ext_features &= TCG_EXT_FEATURES;
+env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
+#ifdef TARGET_X86_64
+| CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
+#endif
+);
+env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
+env->cpuid_svm_features &= TCG_SVM_FEATURES;
+}
 
 #ifndef CONFIG_USER_ONLY
 qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
-- 
1.7.11.2

[Qemu-devel] [RFC 10/20] target-i386: convert 'hv_vapic' feature into property

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f73309e..7734613 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1008,6 +1008,26 @@ static void x86_set_hv_relaxed(Object *obj, Visitor *v, 
void *opaque,
 }
 hyperv_enable_relaxed_timing(value);
 }
+
+static void x86_get_hv_vapic(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value = hyperv_vapic_recommended();
+
+visit_type_bool(v, &value, name, errp);
+}
+
+static void x86_set_hv_vapic(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+hyperv_enable_vapic_recommended(value);
+}
 #endif
 
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
@@ -1951,6 +1971,9 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "hv_relaxed", "bool",
 x86_get_hv_relaxed,
 x86_set_hv_relaxed, NULL, NULL, NULL);
+object_property_add(obj, "hv_vapic", "bool",
+x86_set_hv_vapic,
+x86_get_hv_vapic, NULL, NULL, NULL);
 #endif
 x86_register_cpuid_properties(obj, feature_name);
 x86_register_cpuid_properties(obj, ext_feature_name);
-- 
1.7.11.2

[Qemu-devel] [PATCH] exec.c: fix dirty bitmap reallocation

[Igor Mitsyanko]

For each newly created RAM block, dirty bitmap is reallocated with g_realloc, 
which doesn't
make any promises on initial content of new extra data in returned buffer. In 
theory,
we initialize this new data with cpu_physical_memory_set_dirty_range() call. The
problem is, cpu_physical_memory_set_dirty_range() has a side effect of 
incrementing
ram_list.dirty_pages variable, but only for pages which are not already dirty. 
And
page "cleanliness" is determined using the same not yet uninitialized dirty 
bitmap
we've just reallocated. This results in inconsistency between real dirty page 
number
and value in ram_list.dirty_pages variable, which in turn could (and will) 
result
in errors during VM migration.
Zero initialize new dirty bitmap bytes to fix this problem.

Signed-off-by: Igor Mitsyanko 
---
 exec.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/exec.c b/exec.c
index a42a0b5..929db5c 100644
--- a/exec.c
+++ b/exec.c
@@ -2550,6 +2550,8 @@ ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void 
*host,
 
 ram_list.phys_dirty = g_realloc(ram_list.phys_dirty,
last_ram_offset() >> TARGET_PAGE_BITS);
+memset(ram_list.phys_dirty + (new_block->offset >> TARGET_PAGE_BITS),
+   0, size >> TARGET_PAGE_BITS);
 cpu_physical_memory_set_dirty_range(new_block->offset, size, 0xff);
 
 if (kvm_enabled())
-- 
1.7.5.4

Re: [Qemu-devel] [PATCH] vmstate: Add support for saving/loading bitmaps

[Igor Mitsyanko]

On 08/09/2012 03:54 PM, Peter Maydell wrote:

Add support for saving/loading bitmap.h bitmaps in vmstate.

Signed-off-by: Peter Maydell 
---
This will be needed for saving/restoring the bitmap in sd.c which
is introduced by Igor's latest patchset; the relevant VMSTATE line is:
 VMSTATE_BITMAP(wp_groups, SDState, 1, wpgrps_size),
(and you'll need to make wpgrps_size an int32_t, not uint32_t).

Igor: I've only tested this fairly lightly, you'll probably want to
do things like testing save on 32 bit and load on 64 bit and
vice-versa.

  savevm.c  |   41 +
  vmstate.h |   13 +
  2 files changed, 54 insertions(+)

diff --git a/savevm.c b/savevm.c
index 6e82b2d..0e2de97 100644
--- a/savevm.c
+++ b/savevm.c
@@ -86,6 +86,7 @@
  #include "memory.h"
  #include "qmp-commands.h"
  #include "trace.h"
+#include "bitops.h"
  
  #define SELF_ANNOUNCE_ROUNDS 5
  
@@ -1159,6 +1160,46 @@ const VMStateInfo vmstate_info_unused_buffer = {

  .put  = put_unused_buffer,
  };
  
+/* bitmaps (as defined by bitmap.h). Note that size here is the size

+ * of the bitmap in bits. The on-the-wire format of a bitmap is 64
+ * bit words with the bits in big endian order. The in-memory format
+ * is an array of 'unsigned long', which may be either 32 or 64 bits.
+ */
+/* This is the number of 64 bit words sent over the wire */
+#define BITS_TO_U64S(nr) DIV_ROUND_UP(nr, 64)
+static int get_bitmap(QEMUFile *f, void *pv, size_t size)
+{
+unsigned long *bmp = pv;
+int i, idx = 0;
+for (i = 0; i < BITS_TO_U64S(size); i++) {
+uint64_t w = qemu_get_be64(f);
+bmp[idx++] = w;
+if (sizeof(unsigned long) == 4 && idx < BITS_TO_LONGS(size)) {
+bmp[idx++] = w >> 32;
+}
+}
+return 0;
+}
+
+static void put_bitmap(QEMUFile *f, void *pv, size_t size)
+{
+unsigned long *bmp = pv;
+int i, idx = 0;
+for (i = 0; i < BITS_TO_U64S(size); i++) {
+uint64_t w = bmp[idx++];
+if (sizeof(unsigned long) == 4 && idx < BITS_TO_LONGS(size)) {
+w |= ((uint64_t)bmp[idx++]) << 32;
+}
+qemu_put_be64(f, w);
+}
+}
+
+const VMStateInfo vmstate_info_bitmap = {
+.name = "bitmap",
+.get = get_bitmap,
+.put = put_bitmap,
+};
+
  typedef struct CompatEntry {
  char idstr[256];
  int instance_id;
diff --git a/vmstate.h b/vmstate.h
index 5bd2b76..c45f46e 100644
--- a/vmstate.h
+++ b/vmstate.h
@@ -139,6 +139,7 @@ extern const VMStateInfo vmstate_info_uint64;
  extern const VMStateInfo vmstate_info_timer;
  extern const VMStateInfo vmstate_info_buffer;
  extern const VMStateInfo vmstate_info_unused_buffer;
+extern const VMStateInfo vmstate_info_bitmap;
  
  #define type_check_array(t1,t2,n) ((t1(*)[n])0 - (t2*)0)

  #define type_check_pointer(t1,t2) ((t1**)0 - (t2*)0)
@@ -411,6 +412,18 @@ extern const VMStateInfo vmstate_info_unused_buffer;
  .flags= VMS_BUFFER,  \
  }
  
+/* _field_size should be a uint32_t field in the _state struct giving the


"..should be an int32_t.."


+ * size of the bitmap _field in bits.
+ */
+#define VMSTATE_BITMAP(_field, _state, _version, _field_size) {  \
+.name = (stringify(_field)), \
+.version_id   = (_version),  \
+.size_offset  = vmstate_offset_value(_state, _field_size, int32_t),\
+.info = &vmstate_info_bitmap,\
+.flags= VMS_VBUFFER|VMS_POINTER, \
+.offset   = offsetof(_state, _field),\
+}
+
  /* _f : field name
 _f_n : num of elements field_name
 _n : num of elements


I've successfully tested this patch with migration from 32bit to 64bit 
little endian host and vice versa. Haven’t tested with 
bigendian-littleendian migration since I don't have a bigendian machine 
at my disposal.


Tested-by: Igor Mitsyanko 

Re: [Qemu-devel] [PATCH V4 00/12] SD save/load support, SD qomification and bug fixes

[Igor Mitsyanko]

On 08/10/2012 07:06 PM, Peter Maydell wrote:

On 27 July 2012 20:29, Igor Mitsyanko  wrote:

Igor Mitsyanko (12):
   hw/sd.c: convert wp_groups in SDState to bitfield
   hw/sd.c: make sd_wp_addr() accept 64 bit address argument
   hw/sd.c: introduce wrapper for conversion address to wp group
   hw/sd.c: favour SD card type (SDSC or SDHC) when performing erase
   hw/sd.c: convert binary variables to bool
   hw/sd.c: make sd_dataready() return bool
   hw/sd.c: make sd_wp_addr() return bool
   hw/sd.c: add SD card save/load support
   hw/sd.c: convert SD state to QOM object
   SD card users: optimize access to SDClass methods
   SD card: introduce "spi" property for SD card objects
   hw/sd.c: introduce SD card "drive" property

I'm taking patches 1,2,3,5,6,7 into arm-devs.next because they're
uncontroversial standalone cleanup patches.

-- PMM


Ok, nice

Re: [Qemu-devel] [PATCH] vmstate: Add support for saving/loading bitmaps

[Igor Mitsyanko]

On 08/10/2012 08:30 PM, Peter Maydell wrote:

On 10 August 2012 17:22, Igor Mitsyanko  wrote:

On 08/09/2012 03:54 PM, Peter Maydell wrote:

--- a/vmstate.h
+++ b/vmstate.h
@@ -139,6 +139,7 @@ extern const VMStateInfo vmstate_info_uint64;
   extern const VMStateInfo vmstate_info_timer;
   extern const VMStateInfo vmstate_info_buffer;
   extern const VMStateInfo vmstate_info_unused_buffer;
+extern const VMStateInfo vmstate_info_bitmap;
 #define type_check_array(t1,t2,n) ((t1(*)[n])0 - (t2*)0)
   #define type_check_pointer(t1,t2) ((t1**)0 - (t2*)0)
@@ -411,6 +412,18 @@ extern const VMStateInfo vmstate_info_unused_buffer;
   .flags= VMS_BUFFER,  \
   }
   +/* _field_size should be a uint32_t field in the _state struct giving
the


"..should be an int32_t.."

Er, yes. This patch should probably go in as part of your series
to add save/load to sd.c -- could you just fix this when you resend
the patch as part of that, please?

thanks
-- PMM



sure

[Qemu-devel] [PATCH 0/3 RESEND] Exynos4210: license and RAM vmstate fixes

[Igor Mitsyanko]

PATCH1 drops "All rights reserved" from all exynos-related file's licenses.

PATCH2 registers RO MemoryRegions for live migration. This is needed because
ram_save_live saves all MemoryRegions no matter if they were registered or not.
This is probably a bug in QEMU because It's not written anywhere that 
vmstate_register_ram_global()
is mandatory for every created MemoryRegion.

PATCH3 sets chipid_and_omr static array size to TARGET_PAGE_SIZE because 
memory_region_init_ram_ptr()
implicitly assumes that its size argument is a multiple of TARGET_PAGE_SIZE. 
This is probably a bug too,
but still..

Igor Mitsyanko (3):
  exynos4210: drop "All rights reserved" line from files license
  exynos4210.c: register chipid_mem and rom_mem with vmstate
  hw/exynos4210.c: set chipid_and_omr array size to TARGET_PAGE_SIZE

 hw/exynos4210.c  |6 --
 hw/exynos4210.h  |2 +-
 hw/exynos4210_combiner.c |3 +--
 hw/exynos4210_fimd.c |3 +--
 hw/exynos4210_gic.c  |3 +--
 hw/exynos4210_mct.c  |3 +--
 hw/exynos4210_pwm.c  |3 +--
 hw/exynos4_boards.c  |2 +-
 8 files changed, 11 insertions(+), 14 deletions(-)

-- 
1.7.4.1

[Qemu-devel] [PATCH 3/3] hw/exynos4210.c: set chipid_and_omr array size to TARGET_PAGE_SIZE

[Igor Mitsyanko]

chipid_mem is initialized with memory_region_init_ram_ptr() function with 
chipid_and_omr
array as buffer argument. During initialization memory region size is aligned 
to page size,
but size of static array chipid_and_omr is less then TARGET_PAGE_SIZE. This 
could result
in errors in some cases, specifically, it could cause segfault during VM saving.
Setting chipid_and_omr aray size to TARGET_PAGE_SIZE helps us to avoid any 
problems.

Signed-off-by: Igor Mitsyanko 
---
 hw/exynos4210.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index 94d2e41..3568ada 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -62,7 +62,7 @@
 /* Display controllers (FIMD) */
 #define EXYNOS4210_FIMD0_BASE_ADDR  0x11C0
 
-static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
+static uint8_t chipid_and_omr[TARGET_PAGE_SIZE] = { 0x11, 0x02, 0x21, 0x43,
 0x09, 0x00, 0x00, 0x00 };
 
 void exynos4210_write_secondary(ARMCPU *cpu,
-- 
1.7.4.1

[Qemu-devel] [PATCH 2/3] exynos4210.c: register chipid_mem and rom_mem with vmstate

[Igor Mitsyanko]

Even if we do not register newly created RAM MemoryRegion for migration with
vmstate_register_ram_global() function, ram_save_live() still saves this region
to snapshot file with empty idstr=="". Consequently this results in error during
VM restoration in ram_load().
Register chipid_mem and rom_mem for migration to avoid this problem.

Signed-off-by: Igor Mitsyanko 
---
 hw/exynos4210.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index a3a06f7..94d2e41 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -201,6 +201,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
 memory_region_init_ram_ptr(&s->chipid_mem, "exynos4210.chipid",
 sizeof(chipid_and_omr), chipid_and_omr);
 memory_region_set_readonly(&s->chipid_mem, true);
+vmstate_register_ram_global(&s->chipid_mem);
 memory_region_add_subregion(system_mem, EXYNOS4210_CHIPID_ADDR,
 &s->chipid_mem);
 
@@ -208,6 +209,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
 memory_region_init_ram(&s->irom_mem, "exynos4210.irom",
EXYNOS4210_IROM_SIZE);
 memory_region_set_readonly(&s->irom_mem, true);
+vmstate_register_ram_global(&s->irom_mem);
 memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR,
 &s->irom_mem);
 /* mirror of iROM */
-- 
1.7.4.1

[Qemu-devel] [PATCH 1/3] exynos4210: drop "All rights reserved" line from files license

[Igor Mitsyanko]

It has been noted that "All rights reserved" statement conflicts with GPL,
remove it.

Signed-off-by: Igor Mitsyanko 
---
 hw/exynos4210.c  |2 +-
 hw/exynos4210.h  |2 +-
 hw/exynos4210_combiner.c |3 +--
 hw/exynos4210_fimd.c |3 +--
 hw/exynos4210_gic.c  |3 +--
 hw/exynos4210_mct.c  |3 +--
 hw/exynos4210_pwm.c  |3 +--
 hw/exynos4_boards.c  |2 +-
 8 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index afc4bdc..a3a06f7 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -1,7 +1,7 @@
 /*
  *  Samsung exynos4210 SoC emulation
  *
- *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
+ *  Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *Maksim Kozlov 
  *Evgeny Voevodin 
  *Igor Mitsyanko  
diff --git a/hw/exynos4210.h b/hw/exynos4210.h
index f7c7027..79c1b78 100644
--- a/hw/exynos4210.h
+++ b/hw/exynos4210.h
@@ -1,7 +1,7 @@
 /*
  *  Samsung exynos4210 SoC emulation
  *
- *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
+ *  Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *Maksim Kozlov 
  *Evgeny Voevodin 
  *Igor Mitsyanko 
diff --git a/hw/exynos4210_combiner.c b/hw/exynos4210_combiner.c
index 80af22c..a4a159a 100644
--- a/hw/exynos4210_combiner.c
+++ b/hw/exynos4210_combiner.c
@@ -1,8 +1,7 @@
 /*
  * Samsung exynos4210 Interrupt Combiner
  *
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
- * All rights reserved.
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *
  * Evgeny Voevodin 
  *
diff --git a/hw/exynos4210_fimd.c b/hw/exynos4210_fimd.c
index 3313f00..0cedf6b 100644
--- a/hw/exynos4210_fimd.c
+++ b/hw/exynos4210_fimd.c
@@ -1,8 +1,7 @@
 /*
  * Samsung exynos4210 Display Controller (FIMD)
  *
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
- * All rights reserved.
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  * Based on LCD controller for Samsung S5PC1xx-based board emulation
  * by Kirill Batuzov 
  *
diff --git a/hw/exynos4210_gic.c b/hw/exynos4210_gic.c
index e1b215e..3bd4f3e 100644
--- a/hw/exynos4210_gic.c
+++ b/hw/exynos4210_gic.c
@@ -1,8 +1,7 @@
 /*
  * Samsung exynos4210 GIC implementation. Based on hw/arm_gic.c
  *
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
- * All rights reserved.
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *
  * Evgeny Voevodin 
  *
diff --git a/hw/exynos4210_mct.c b/hw/exynos4210_mct.c
index 7474fcf..8838126 100644
--- a/hw/exynos4210_mct.c
+++ b/hw/exynos4210_mct.c
@@ -1,8 +1,7 @@
 /*
  * Samsung exynos4210 Multi Core timer
  *
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
- * All rights reserved.
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *
  * Evgeny Voevodin 
  *
diff --git a/hw/exynos4210_pwm.c b/hw/exynos4210_pwm.c
index 6243e59..98227e5 100644
--- a/hw/exynos4210_pwm.c
+++ b/hw/exynos4210_pwm.c
@@ -1,8 +1,7 @@
 /*
  * Samsung exynos4210 Pulse Width Modulation Timer
  *
- * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
- * All rights reserved.
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  *
  * Evgeny Voevodin 
  *
diff --git a/hw/exynos4_boards.c b/hw/exynos4_boards.c
index ea32c51..b794fa8 100644
--- a/hw/exynos4_boards.c
+++ b/hw/exynos4_boards.c
@@ -1,7 +1,7 @@
 /*
  *  Samsung exynos4 SoC based boards emulation
  *
- *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
+ *  Copyright (c) 2011 Samsung Electronics Co.
  *Maksim Kozlov 
  *Evgeny Voevodin 
  *Igor Mitsyanko  
-- 
1.7.4.1

Re: [Qemu-devel] ARM patches for QEMU 1.2: final call

[Igor Mitsyanko]

On 08/10/2012 08:21 PM, Peter Maydell wrote:

Last call for any ARM related patches to go into 1.2. My current
queue looks like this:

59cbd70 hw/sd.c: make sd_wp_addr() return bool
8b4cc14 hw/sd.c: make sd_dataready() return bool
025caa6 hw/sd.c: convert binary variables to bool
38d24e6 hw/sd.c: introduce wrapper for conversion address to wp group
1835455 hw/sd.c: make sd_wp_addr() accept 64 bit address argument
34f99a8 hw/sd.c: convert wp_groups in SDState to bitfield
0b7ede9 armv7m: Guard against no -kernel argument
62140f8 hw/armv7m_nvic: Fix incorrect default for num-irqs property

http://git.linaro.org/gitweb?p=people/pmaydell/qemu-arm.git;a=shortlog;h=refs/heads/arm-devs.next

and I plan to send a pullreq Monday.
(My target-arm queue is currently empty.)

-- PMM




That would be nice to also pull "Exynos4210: license and RAM vmstate 
fixes" patchset I sent long time ago. I've just resent it to list:

http://comments.gmane.org/gmane.comp.emulators.qemu/164752

[Qemu-devel] [NOT RFC] target-i386: prepare for convertion to subclasses

[Igor Mammedov]

crude attempt to show how to move out cpu_model string handling out of cpu.c
and make CPU more suitable to converting into subclasses.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c| 83 
 target-i386/helper.c | 89 +++-
 2 files changed, 94 insertions(+), 78 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index e266792..b5dcf56 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1099,76 +1099,15 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t 
*def, Error **errp)
 object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
 }
 
-/* convert legacy cpumodel string to string cpu_name and
- * a uniforms set of custom features that will be applied to CPU
- * using object_property_parse()
- */
-static void compat_normalize_cpu_model(const char *cpu_model, char **cpu_name,
-QDict **features, Error **errp)
-{
-
-char *s = g_strdup(cpu_model);
-char *featurestr, *sptr;
-
-*cpu_name = strtok_r(s, ",", &sptr);
-*features = qdict_new();
-
-featurestr = strtok_r(NULL, ",", &sptr);
-while (featurestr) {
-char *val;
-if (featurestr[0] == '+') {
-/*
- * preseve legacy behaviour, if feature was disabled once
- * do not allow to enable it again
- */
-if (!qdict_haskey(*features, featurestr + 1)) {
-qdict_put(*features, featurestr + 1, qstring_from_str("on"));
-}
-} else if (featurestr[0] == '-') {
-qdict_put(*features, featurestr + 1, qstring_from_str("off"));
-} else {
-val = strchr(featurestr, '=');
-if (val) {
-*val = 0; val++;
-if (!strcmp(featurestr, "vendor")) {
-qdict_put(*features, "vendor-override",
-  qstring_from_str("on"));
-qdict_put(*features, featurestr, qstring_from_str(val));
-} else if (!strcmp(featurestr, "tsc_freq")) {
-qdict_put(*features, "tsc-frequency",
-  qstring_from_str(val));
-} else {
-qdict_put(*features, featurestr, qstring_from_str(val));
-}
-} else {
-qdict_put(*features, featurestr, qstring_from_str("on"));
-}
-}
-
-featurestr = strtok_r(NULL, ",", &sptr);
-}
-
-return;
-}
-
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
 x86_def_t *def;
 
-QDict *features;
-const QDictEntry *ent;
-char *name;
-
-compat_normalize_cpu_model(cpu_model, &name, &features, errp);
-if (error_is_set(errp)) {
-goto error;
-}
-
 for (def = x86_defs; def; def = def->next)
-if (name && !strcmp(name, def->name))
+if (cpu_model && !strcmp(cpu_model, def->name))
 break;
-if (kvm_enabled() && name && strcmp(name, "host") == 0) {
+if (kvm_enabled() && cpu_model && strcmp(cpu_model, "host") == 0) {
 cpu_x86_fill_host(x86_cpu_def);
 } else if (!def) {
 goto error;
@@ -1176,23 +1115,9 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 memcpy(x86_cpu_def, def, sizeof(*def));
 }
 
-cpudef_2_x86_cpu(cpu, def, errp);
-
-for (ent = qdict_first(features); ent; ent = qdict_next(features, ent)) {
-const QString *qval = qobject_to_qstring(qdict_entry_value(ent));
-object_property_parse(OBJECT(cpu), qstring_get_str(qval),
-  qdict_entry_key(ent), errp);
-if (error_is_set(errp)) {
-goto error;
-}
-}
-QDECREF(features);
-
-g_free(name);
 return 0;
 
 error:
-g_free(name);
 if (!error_is_set(errp)) {
 error_set(errp, QERR_INVALID_PARAMETER_COMBINATION);
 }
@@ -1302,6 +1227,10 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 if (cpu_x86_find_by_name(cpu, def, cpu_model, &error) < 0)
 goto out;
 
+/* ==> should go into initfn */
+cpudef_2_x86_cpu(cpu, def, &error);
+/* <== */
+
 out:
 if (error_is_set(&error)) {
 fprintf(stderr, "%s\n", error_get_pretty(error));
diff --git a/target-i386/helper.c b/target-i386/helper.c
index a0e4c89..17acb4e 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -23,6 +23,8 @@
 #include "sysemu.h"
 #include "monitor.h"
 #endif
+#include "qdict.h"
+#include "qstring.h&quo

Re: [Qemu-devel] [RFC 01/15] cpus.h: include cpu-common.h

[Igor Mammedov]

On 08/07/2012 09:56 PM, Eduardo Habkost wrote:

Needed for the definition of fprint_function.

This is not necessary right now, but it will be necessary if code that
doesn't include cpu-common.h includes cpus.h.

could fprint_function declaration be moved somewhere else?
A lot of headers include cpu-common.h just for the sake of these 
simple/independent declarations and forward declared structures 
pointers. Maybe these trivial cases could be moved in separate
header qemu-common-trivial.h. It could replace cpu-common.h in most 
headers and would help to untangle circular deps between cpu-common.h 
and cpu.h and reduce complications when one tries to embed in cpu some 
Device/SysBusDevice as a child.




Signed-off-by: Eduardo Habkost 
---
  cpus.h | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/cpus.h b/cpus.h
index 81bd817..061ff7f 100644
--- a/cpus.h
+++ b/cpus.h
@@ -1,6 +1,8 @@
  #ifndef QEMU_CPUS_H
  #define QEMU_CPUS_H

+#include "qemu-common.h"
+
  /* cpus.c */
  void qemu_init_cpu_loop(void);
  void resume_all_vcpus(void);




--
Regards,
  Igor

Re: [Qemu-devel] [RFC 02/15] hw/apic.c: rename bit functions to not conflict with bitops.h (v2)

[Igor Mammedov]

On 08/07/2012 09:56 PM, Eduardo Habkost wrote:

Changes v1 -> v2:
  - Coding style change: break too-long line

Signed-off-by: Eduardo Habkost 
---
  hw/apic.c | 35 ++-
  1 file changed, 18 insertions(+), 17 deletions(-)

diff --git a/hw/apic.c b/hw/apic.c
index 38e..e1f633a 100644
--- a/hw/apic.c
+++ b/hw/apic.c
@@ -51,7 +51,7 @@ static int ffs_bit(uint32_t value)
  return ctz32(value);
  }

-static inline void set_bit(uint32_t *tab, int index)
+static inline void apic_set_bit(uint32_t *tab, int index)
  {
  int i, mask;
  i = index >> 5;
@@ -59,7 +59,7 @@ static inline void set_bit(uint32_t *tab, int index)
  tab[i] |= mask;
  }

-static inline void reset_bit(uint32_t *tab, int index)
+static inline void apic_reset_bit(uint32_t *tab, int index)
  {
  int i, mask;
  i = index >> 5;
@@ -67,7 +67,7 @@ static inline void reset_bit(uint32_t *tab, int index)
  tab[i] &= ~mask;
  }

-static inline int get_bit(uint32_t *tab, int index)
+static inline int apic_get_bit(uint32_t *tab, int index)
  {
  int i, mask;
  i = index >> 5;
@@ -184,7 +184,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level)
  case APIC_DM_FIXED:
  if (!(lvt & APIC_LVT_LEVEL_TRIGGER))
  break;
-reset_bit(s->irr, lvt & 0xff);
+apic_reset_bit(s->irr, lvt & 0xff);
  /* fall through */
  case APIC_DM_EXTINT:
  cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
@@ -379,13 +379,13 @@ void apic_poll_irq(DeviceState *d)

  static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode)
  {
-apic_report_irq_delivered(!get_bit(s->irr, vector_num));
+apic_report_irq_delivered(!apic_get_bit(s->irr, vector_num));

-set_bit(s->irr, vector_num);
+apic_set_bit(s->irr, vector_num);
  if (trigger_mode)
-set_bit(s->tmr, vector_num);
+apic_set_bit(s->tmr, vector_num);
  else
-reset_bit(s->tmr, vector_num);
+apic_reset_bit(s->tmr, vector_num);
  if (s->vapic_paddr) {
  apic_sync_vapic(s, SYNC_ISR_IRR_TO_VAPIC);
  /*
@@ -405,8 +405,9 @@ static void apic_eoi(APICCommonState *s)
  isrv = get_highest_priority_int(s->isr);
  if (isrv < 0)
  return;
-reset_bit(s->isr, isrv);
-if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) && get_bit(s->tmr, isrv)) {
+apic_reset_bit(s->isr, isrv);
+if (!(s->spurious_vec & APIC_SV_DIRECTED_IO) &&
+apic_get_bit(s->tmr, isrv)) {
  ioapic_eoi_broadcast(isrv);
  }
  apic_sync_vapic(s, SYNC_FROM_VAPIC | SYNC_TO_VAPIC);
@@ -445,7 +446,7 @@ static void apic_get_delivery_bitmask(uint32_t 
*deliver_bitmask,
  int idx = apic_find_dest(dest);
  memset(deliver_bitmask, 0x00, MAX_APIC_WORDS * sizeof(uint32_t));
  if (idx >= 0)
-set_bit(deliver_bitmask, idx);
+apic_set_bit(deliver_bitmask, idx);
  }
  } else {
  /* XXX: cluster mode */
@@ -455,11 +456,11 @@ static void apic_get_delivery_bitmask(uint32_t 
*deliver_bitmask,
  if (apic_iter) {
  if (apic_iter->dest_mode == 0xf) {
  if (dest & apic_iter->log_dest)
-set_bit(deliver_bitmask, i);
+apic_set_bit(deliver_bitmask, i);
  } else if (apic_iter->dest_mode == 0x0) {
  if ((dest & 0xf0) == (apic_iter->log_dest & 0xf0) &&
  (dest & apic_iter->log_dest & 0x0f)) {
-set_bit(deliver_bitmask, i);
+apic_set_bit(deliver_bitmask, i);
  }
  }
  } else {
@@ -502,14 +503,14 @@ static void apic_deliver(DeviceState *d, uint8_t dest, 
uint8_t dest_mode,
  break;
  case 1:
  memset(deliver_bitmask, 0x00, sizeof(deliver_bitmask));
-set_bit(deliver_bitmask, s->idx);
+apic_set_bit(deliver_bitmask, s->idx);
  break;
  case 2:
  memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask));
  break;
  case 3:
  memset(deliver_bitmask, 0xff, sizeof(deliver_bitmask));
-reset_bit(deliver_bitmask, s->idx);
+apic_reset_bit(deliver_bitmask, s->idx);
  break;
  }

@@ -566,8 +567,8 @@ int apic_get_interrupt(DeviceState *d)
  apic_sync_vapic(s, SYNC_TO_VAPIC);
  return s->spurious_vec & 0xff;
  }
-reset_bit(s->irr, intno);
-set_bit(s->isr, intno);
+apic_reset_bit(s->irr, intno);
+apic_set_bit(s->isr, intno);
  apic_sync_vapic(s, SYNC_TO_VAPIC);

  /* re-inject if there is still a pending PIC interrupt */


Looks good to me.

--
Regards,
  Igor

Re: [Qemu-devel] [RFC 03/15] kvm: set vcpu_id to APIC ID instead of CPU index

[Igor Mammedov]

On 08/07/2012 09:56 PM, Eduardo Habkost wrote:

The CPU ID in KVM is supposed to be the APIC ID, so change the
KVM_CREATE_VCPU call to match it. It didn't break anything yet because
today the APIC ID is assumed to be == the CPU index, but this won't be
true in the future.

What it would break if APIC ID != CPU index ?



Signed-off-by: Eduardo Habkost 
---
  kvm-all.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kvm-all.c b/kvm-all.c
index 2148b20..38de992 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -213,7 +213,7 @@ int kvm_init_vcpu(CPUArchState *env)

  DPRINTF("kvm_init_vcpu\n");

-ret = kvm_vm_ioctl(s, KVM_CREATE_VCPU, env->cpu_index);
+ret = kvm_vm_ioctl(s, KVM_CREATE_VCPU, env->cpuid_apic_id);
  if (ret < 0) {
  DPRINTF("kvm_create_vcpu failed\n");
      goto err;




--
Regards,
  Igor

Re: [Qemu-devel] [RFC 06/15] pc: set FW_CFG data based on APIC ID calculation

[Igor Mammedov]

On 08/07/2012 09:56 PM, Eduardo Habkost wrote:

This changes FW_CFG_MAX_CPUS and FW_CFG_NUMA to use apic_id_for_cpu(),
so the NUMA table can be based on the APIC IDs, instead of CPU index
(SeaBIOS knows nothing about CPU indexes, just APIC IDs).

Signed-off-by: Eduardo Habkost 
---
  hw/pc.c   | 23 ---
  target-i386/cpu.h |  7 +++
  2 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/hw/pc.c b/hw/pc.c
index 10449bd..9afb838 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -581,6 +581,11 @@ int e820_add_entry(uint64_t address, uint64_t length, 
uint32_t type)
  return index;
  }

+unsigned int apic_id_limit(void)
+{
+return apic_id_for_cpu(max_cpus - 1) + 1;
+}
+
  static void *bochs_bios_init(void)
  {
  void *fw_cfg;
@@ -588,6 +593,7 @@ static void *bochs_bios_init(void)
  size_t smbios_len;
  uint64_t *numa_fw_cfg;
  int i, j;
+unsigned int max_apic_id = apic_id_limit();

  register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
  register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
@@ -602,7 +608,7 @@ static void *bochs_bios_init(void)
  register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);

  fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
-fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_apic_id);
FW_CFG_MAX_CPUS becoming not MAX_CPUS sounds a bit confusing, perhaps 
short comment should be here to document this and why it's not? So code 
reader won't make false assumptions?



  fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
  fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
  fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
@@ -622,21 +628,24 @@ static void *bochs_bios_init(void)
   * of nodes, one word for each VCPU->node and one word for each node to
   * hold the amount of memory.
   */
-numa_fw_cfg = g_malloc0((1 + max_cpus + nb_numa_nodes) * 8);
+numa_fw_cfg = g_malloc0((1 + max_apic_id + nb_numa_nodes) * 8);
  numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
-for (i = 0; i < max_cpus; i++) {
+unsigned int cpu_idx;
+for (cpu_idx = 0; cpu_idx < max_cpus; cpu_idx++) {
+unsigned int apic_id = apic_id_for_cpu(cpu_idx);
+assert(apic_id < max_apic_id);
  for (j = 0; j < nb_numa_nodes; j++) {
-if (test_bit(i, node_cpumask[j])) {
-numa_fw_cfg[i + 1] = cpu_to_le64(j);
+if (test_bit(cpu_idx, node_cpumask[j])) {
+numa_fw_cfg[apic_id + 1] = cpu_to_le64(j);
  break;
  }
  }
  }
  for (i = 0; i < nb_numa_nodes; i++) {
-numa_fw_cfg[max_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
+numa_fw_cfg[max_apic_id + 1 + i] = cpu_to_le64(node_mem[i]);
  }
  fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
- (1 + max_cpus + nb_numa_nodes) * 8);
+ (1 + max_apic_id + nb_numa_nodes) * 8);

  return fw_cfg;
  }
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 39ea005..257d6c7 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -919,6 +919,13 @@ void host_cpuid(uint32_t function, uint32_t count,
   */
  unsigned int apic_id_for_cpu(int cpu_index);

+/* Calculate limit for the APIC ID value, based on max_cpus
+ *
+ * On PC, FW_CFG_MAX_CPUS is not max_cpus, but the limit for the APIC IDs
+ * of all CPUs (so that of all CPUs APIC ID < MAX_CPUS).
+ */
+unsigned int apic_id_limit(void);
+

  /* helper.c */
  int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,




--
Regards,
  Igor

Re: [Qemu-devel] [RFC 14/15] i386: topology & APIC ID utility functions (v2)

[Igor Mammedov]

 copy
> + * of this software and associated documentation files (the "Software"), to 
> deal
> + * in the Software without restriction, including without limitation the 
> rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
> FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#include 
> +
> +/*FIXME: this should be built inside the i386 target directory instead */
> +#include "topology.h"
> +
> +static void test_topo_bits(void)
> +{
> +/* simple tests for 1 thread per core, 1 core per socket */
> +g_assert_cmpuint(apicid_smt_width(1, 1), ==, 0);
> +g_assert_cmpuint(apicid_core_width(1, 1), ==, 0);
> +
> +g_assert_cmpuint(topo_apicid_for_cpu(1, 1, 0), ==, 0);
> +g_assert_cmpuint(topo_apicid_for_cpu(1, 1, 1), ==, 1);
> +g_assert_cmpuint(topo_apicid_for_cpu(1, 1, 2), ==, 2);
> +g_assert_cmpuint(topo_apicid_for_cpu(1, 1, 3), ==, 3);
> +
> +
> +/* Test field width calculation for multiple values
> + */
> +g_assert_cmpuint(apicid_smt_width(1, 2), ==, 1);
> +g_assert_cmpuint(apicid_smt_width(1, 3), ==, 2);
> +g_assert_cmpuint(apicid_smt_width(1, 4), ==, 2);
> +
> +g_assert_cmpuint(apicid_smt_width(1, 14), ==, 4);
> +g_assert_cmpuint(apicid_smt_width(1, 15), ==, 4);
> +g_assert_cmpuint(apicid_smt_width(1, 16), ==, 4);
> +g_assert_cmpuint(apicid_smt_width(1, 17), ==, 5);
> +
> +
> +g_assert_cmpuint(apicid_core_width(30, 2), ==, 5);
> +g_assert_cmpuint(apicid_core_width(31, 2), ==, 5);
> +g_assert_cmpuint(apicid_core_width(32, 2), ==, 5);
> +g_assert_cmpuint(apicid_core_width(33, 2), ==, 6);
> +
> +
> +/* build a weird topology and see if IDs are calculated correctly
> + */
> +
> +/* This will use 2 bits for thread ID and 3 bits for core ID
> + */
> +g_assert_cmpuint( apicid_smt_width(6, 3), ==, 2);
> +g_assert_cmpuint(apicid_core_width(6, 3), ==, 3);
> +g_assert_cmpuint(apicid_pkg_offset(6, 3), ==, 5);
> +
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 0), ==, 0);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 1), ==, 1);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 2), ==, 2);
> +
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 1 * 3 + 0), ==, (1 << 2) | 0);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 1 * 3 + 1), ==, (1 << 2) | 1);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 1 * 3 + 2), ==, (1 << 2) | 2);
> +
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 2 * 3 + 0), ==, (2 << 2) | 0);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 2 * 3 + 1), ==, (2 << 2) | 1);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 2 * 3 + 2), ==, (2 << 2) | 2);
> +
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 5 * 3 + 0), ==, (5 << 2) | 0);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 5 * 3 + 1), ==, (5 << 2) | 1);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 5 * 3 + 2), ==, (5 << 2) | 2);
> +
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 1 * 6 * 3 + 0 * 3 + 0), ==,
> + (1 << 5));
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 1 * 6 * 3 + 1 * 3 + 1), ==,
> + (1 << 5) | (1 << 2) | 1);
> +g_assert_cmpuint(topo_apicid_for_cpu(6, 3, 3 * 6 * 3 + 5 * 3 + 2), ==,
> + (3 << 5) | (5 << 2) | 2);
> +
> +
> +/* Check the APIC ID -> {pkg,core,thread} ID functions */
> +g_assert_cmpuint( apicid_pkg_id(6, 3, (3 << 5) | (5 << 2) | 2), ==, 3);
> +g_assert_cmpuint(apicid_core_id(6, 3, (3 << 5) | (5 << 2) | 2), ==, 5);
> +g_assert_cmpuint( apicid_smt_id(6, 3, (3 << 5) | (5 << 2) | 2), ==, 2);
> +}
> +
> +int main(int argc, char **argv)
> +{
> +g_test_init(&argc, &argv, NULL);
> +
> +g_test_add_func("/cpuid/topology/basic", test_topo_bits);
> +
> +g_test_run();
> +
> +return 0;
> +}
> -- 
> 1.7.11.2
> 
> 


-- 
Regards,
  Igor

Re: [Qemu-devel] [RFC 11/20] target-i386: convert 'check' and 'enforce' features into properties

[Igor Mammedov]

On Fri, 10 Aug 2012 12:09:04 -0300
Eduardo Habkost  wrote:

> On Fri, Aug 10, 2012 at 01:22:27PM +0200, Igor Mammedov wrote:
> > Signed-off-by: Igor Mammedov 
> > ---
> >  target-i386/cpu.c | 68 
> > ++-
> >  1 file changed, 57 insertions(+), 11 deletions(-)
> > 
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 7734613..a154e89 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -106,8 +106,8 @@ typedef struct model_features_t {
> >  uint32_t cpuid;
> >  } model_features_t;
> >  
> > -int check_cpuid = 0;
> > -int enforce_cpuid = 0;
> > +bool check_cpuid;
> > +bool enforce_cpuid;
> >  
> >  void host_cpuid(uint32_t function, uint32_t count,
> >  uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
> > @@ -579,19 +579,20 @@ static int unavailable_host_feature(struct 
> > model_features_t *f, uint32_t mask)
> >   * their way to the guest.  Note: ft[].check_feat ideally should be
> >   * specified via a guest_def field to suppress report of extraneous flags.
> >   */
> > -static int check_features_against_host(x86_def_t *guest_def)
> > +static int check_features_against_host(X86CPU *cpu)
> >  {
> > +CPUX86State *env = &cpu->env;
> >  x86_def_t host_def;
> >  uint32_t mask;
> >  int rv, i;
> >  struct model_features_t ft[] = {
> > -{&guest_def->features, &host_def.features,
> > +{&env->cpuid_features, &host_def.features,
> >  ~0, feature_name, 0x},
> > -{&guest_def->ext_features, &host_def.ext_features,
> > +{&env->cpuid_ext_features, &host_def.ext_features,
> >  ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x0001},
> > -{&guest_def->ext2_features, &host_def.ext2_features,
> > +{&env->cpuid_ext2_features, &host_def.ext2_features,
> >  ~PPRO_FEATURES, ext2_feature_name, 0x8000},
> > -{&guest_def->ext3_features, &host_def.ext3_features,
> > +{&env->cpuid_ext3_features, &host_def.ext3_features,
> >  ~CPUID_EXT3_SVM, ext3_feature_name, 0x8001}};
> >  
> >  cpu_x86_fill_host(&host_def);
> > @@ -1030,6 +1031,43 @@ static void x86_set_hv_vapic(Object *obj, Visitor 
> > *v, void *opaque,
> >  }
> >  #endif
> >  
> > +static void x86_cpuid_get_check(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +visit_type_bool(v, &check_cpuid, name, errp);
> > +}
> > +
> > +static void x86_cpuid_set_check(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +bool value;
> > +
> > +visit_type_bool(v, &value, name, errp);
> > +if (error_is_set(errp)) {
> > +return;
> > +}
> > +check_cpuid = value;
> > +}
> > +
> > +static void x86_cpuid_get_enforce(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +visit_type_bool(v, &enforce_cpuid, name, errp);
> > +}
> > +
> > +static void x86_cpuid_set_enforce(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +bool value;
> > +
> > +visit_type_bool(v, &value, name, errp);
> > +if (error_is_set(errp)) {
> > +return;
> > +}
> > +enforce_cpuid = value;
> > +object_property_set_bool(obj, value, "check", errp);
> > +}
> > +
> >  static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
> >  {
> >  CPUX86State *env = &cpu->env;
> > @@ -1225,10 +1263,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, 
> > x86_def_t *x86_cpu_def,
> >  x86_cpu_def->ext3_features &= ~minus_ext3_features;
> >  x86_cpu_def->kvm_features &= ~minus_kvm_features;
> >  x86_cpu_def->svm_features &= ~minus_svm_features;
> > -if (check_cpuid) {
> > -if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
> > -goto error;
> > -}
> >  g_free(s);
> >  return 0;
> >  
> > @@ -1923,6 +1957,12 @@ void x86_cpu_realize(Object *obj, Error **errp)

Re: [Qemu-devel] [RFC 18/20] target-i386: use properties to set/unset user specified features on CPU

[Igor Mammedov]

On Mon, 13 Aug 2012 17:48:24 -0300
Eduardo Habkost  wrote:

> On Fri, Aug 10, 2012 at 01:22:34PM +0200, Igor Mammedov wrote:
> > Signed-off-by: Igor Mammedov 
> > ---
> >  target-i386/cpu.c | 167 
> > +++---
> >  1 file changed, 20 insertions(+), 147 deletions(-)
> > 
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 7555b08..0174c4d 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -206,22 +206,6 @@ static bool lookup_feature(uint32_t *pval, const char 
> > *s, const char *e,
> >  return found;
> >  }
> >  
> > -static void add_flagname_to_bitmaps(const char *flagname, uint32_t 
> > *features,
> > -uint32_t *ext_features,
> > -uint32_t *ext2_features,
> > -uint32_t *ext3_features,
> > -uint32_t *kvm_features,
> > -uint32_t *svm_features)
> > -{
> > -if (!lookup_feature(features, flagname, NULL, feature_name) &&
> > -!lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
> > -!lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) 
> > &&
> > -!lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) 
> > &&
> > -!lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
> > -!lookup_feature(svm_features, flagname, NULL, svm_feature_name))
> > -fprintf(stderr, "CPU feature %s not found\n", flagname);
> > -}
> > -
> >  typedef struct x86_def_t {
> >  struct x86_def_t *next;
> >  const char *name;
> > @@ -1104,7 +1088,6 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t 
> > *def, Error **errp)
> >  env->cpuid_ext_features = def->ext_features;
> >  env->cpuid_ext2_features = def->ext2_features;
> >  env->cpuid_ext3_features = def->ext3_features;
> > -env->cpuid_kvm_features = def->kvm_features;
> >  env->cpuid_svm_features = def->svm_features;
> >  env->cpuid_ext4_features = def->ext4_features;
> >  env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
> > @@ -1168,17 +1151,14 @@ static int cpu_x86_find_by_name(X86CPU *cpu, 
> > x86_def_t *x86_cpu_def,
> >  {
> >  x86_def_t *def;
> >  
> > -char *s = g_strdup(cpu_model);
> > -char *featurestr, *name = strtok(s, ",");
> > -/* Features to be added*/
> > -uint32_t plus_features = 0, plus_ext_features = 0;
> > -uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
> > -uint32_t plus_kvm_features = 0, plus_svm_features = 0;
> > -/* Features to be removed */
> > -uint32_t minus_features = 0, minus_ext_features = 0;
> > -uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
> > -uint32_t minus_kvm_features = 0, minus_svm_features = 0;
> > -uint32_t numvalue;
> > +QDict *features;
> > +const QDictEntry *ent;
> > +char *name;
> > +
> > +compat_normalize_cpu_model(cpu_model, &name, &features, errp);
> > +if (error_is_set(errp)) {
> > +goto error;
> > +}
> >  
> >  for (def = x86_defs; def; def = def->next)
> >  if (name && !strcmp(name, def->name))
> > @@ -1191,133 +1171,28 @@ static int cpu_x86_find_by_name(X86CPU *cpu, 
> > x86_def_t *x86_cpu_def,
> >  memcpy(x86_cpu_def, def, sizeof(*def));
> >  }
> >  
> > -plus_kvm_features = ~0; /* not supported bits will be filtered out 
> > later */
> > -
> > -add_flagname_to_bitmaps("hypervisor", &plus_features,
> > -&plus_ext_features, &plus_ext2_features, &plus_ext3_features,
> > -&plus_kvm_features, &plus_svm_features);
> > +cpudef_2_x86_cpu(cpu, def, errp);
> 
> It looks like you have to use 'x86_cpu_def' instead of 'def', here, as
> 'def' is the variable for the x86_defs name-lookup loop, only,
> 'x86_cpu_def' is the actual CPU definition.
yep, I'll fix it.

> 
> 
> >  
> > -featurestr = strtok(NULL, ",");
> > +/* not supported bits will be filtered out later */
> > +env->cpuid_kvm_features = ~0;
> >  
> > -while (featurestr) {
> > -char *val;
> > -if (featurestr

Re: [Qemu-devel] [RFC 11/20] target-i386: convert 'check' and 'enforce' features into properties

[Igor Mammedov]

On Wed, 15 Aug 2012 08:39:54 -0300
Eduardo Habkost  wrote:

> On Tue, Aug 14, 2012 at 11:18:47PM +0200, Igor Mammedov wrote:
> > On Fri, 10 Aug 2012 12:09:04 -0300
> > Eduardo Habkost  wrote:
> > 
> > > On Fri, Aug 10, 2012 at 01:22:27PM +0200, Igor Mammedov wrote:
> > > > Signed-off-by: Igor Mammedov 
> > > > ---
> > > >  target-i386/cpu.c | 68 
> > > > ++-
> > > >  1 file changed, 57 insertions(+), 11 deletions(-)
> > > > 
> > > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > > > index 7734613..a154e89 100644
> > > > --- a/target-i386/cpu.c
> > > > +++ b/target-i386/cpu.c
> > > > @@ -106,8 +106,8 @@ typedef struct model_features_t {
> > > >  uint32_t cpuid;
> > > >  } model_features_t;
> > > >  
> > > > -int check_cpuid = 0;
> > > > -int enforce_cpuid = 0;
> > > > +bool check_cpuid;
> > > > +bool enforce_cpuid;
> > > >  
> > > >  void host_cpuid(uint32_t function, uint32_t count,
> > > >  uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t 
> > > > *edx)
> > > > @@ -579,19 +579,20 @@ static int unavailable_host_feature(struct 
> > > > model_features_t *f, uint32_t mask)
> > > >   * their way to the guest.  Note: ft[].check_feat ideally should be
> > > >   * specified via a guest_def field to suppress report of extraneous 
> > > > flags.
> > > >   */
> > > > -static int check_features_against_host(x86_def_t *guest_def)
> > > > +static int check_features_against_host(X86CPU *cpu)
> > > >  {
> > > > +CPUX86State *env = &cpu->env;
> > > >  x86_def_t host_def;
> > > >  uint32_t mask;
> > > >  int rv, i;
> > > >  struct model_features_t ft[] = {
> > > > -{&guest_def->features, &host_def.features,
> > > > +{&env->cpuid_features, &host_def.features,
> > > >  ~0, feature_name, 0x},
> > > > -{&guest_def->ext_features, &host_def.ext_features,
> > > > +{&env->cpuid_ext_features, &host_def.ext_features,
> > > >  ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x0001},
> > > > -{&guest_def->ext2_features, &host_def.ext2_features,
> > > > +{&env->cpuid_ext2_features, &host_def.ext2_features,
> > > >  ~PPRO_FEATURES, ext2_feature_name, 0x8000},
> > > > -{&guest_def->ext3_features, &host_def.ext3_features,
> > > > +{&env->cpuid_ext3_features, &host_def.ext3_features,
> > > >  ~CPUID_EXT3_SVM, ext3_feature_name, 0x8001}};
> > > >  
> > > >  cpu_x86_fill_host(&host_def);
> > > > @@ -1030,6 +1031,43 @@ static void x86_set_hv_vapic(Object *obj, 
> > > > Visitor *v, void *opaque,
> > > >  }
> > > >  #endif
> > > >  
> > > > +static void x86_cpuid_get_check(Object *obj, Visitor *v, void *opaque,
> > > > + const char *name, Error 
> > > > **errp)
> > > > +{
> > > > +visit_type_bool(v, &check_cpuid, name, errp);
> > > > +}
> > > > +
> > > > +static void x86_cpuid_set_check(Object *obj, Visitor *v, void *opaque,
> > > > + const char *name, Error 
> > > > **errp)
> > > > +{
> > > > +bool value;
> > > > +
> > > > +visit_type_bool(v, &value, name, errp);
> > > > +if (error_is_set(errp)) {
> > > > +return;
> > > > +}
> > > > +check_cpuid = value;
> > > > +}
> > > > +
> > > > +static void x86_cpuid_get_enforce(Object *obj, Visitor *v, void 
> > > > *opaque,
> > > > + const char *name, Error 
> > > > **errp)
> > > > +{
> > > > +visit_type_bool(v, &enforce_cpuid, name, errp);
> > > > +}
> > > > +
> > > > +static void x86_cpuid_set_enforce(Object *obj, Visitor *v, void 
> > > > *opaque,
> > > > + const char *name, Error 
> > > > **err

Re: [Qemu-devel] [RFC 20/20] target-i386: move default init of cpuid_kvm_features bitmap into CPU initializer from cpudef

[Igor Mammedov]

On Fri, 10 Aug 2012 12:24:48 -0300
Eduardo Habkost  wrote:

> On Fri, Aug 10, 2012 at 01:22:36PM +0200, Igor Mammedov wrote:
> > Moving it inside CPU initializer from cpudef will help to split
> > cpu_x86_find_by_name() into default init and user settable properties.
> > 
> > PS:
> >   Is kvm_features field necessary in cpudef, what the point
> >   if it's almost imediately overwritten to ~0? Could it be removed
> >   from cpudef?
> 
> We could probably drop it, but: maybe better than dropping it is to
> initialize it properly with all the currently-supported KVM feature
> flags, instead of initializing it to ~0 and then filter the bits later.
> Otherwise "-cpu enforce" would not be able to check the KVM feature bits
> properly.
Looking at current core, It should be doable, lets postpone it to a separate
series.
For now lets keep it initialized to ~0 and plan to improve it later.

> 
> > 
> > Signed-off-by: Igor Mammedov 
> > ---
> >  target-i386/cpu.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 43601a3..e266792 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -1093,6 +1093,9 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t 
> > *def, Error **errp)
> >  env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
> >  env->cpuid_xlevel2 = def->xlevel2;
> >  
> > +/* not supported bits will be filtered out later */
> > +env->cpuid_kvm_features = ~0;
> > +
> >  object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
> >  }
> >  
> > @@ -1175,9 +1178,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, 
> > x86_def_t *x86_cpu_def,
> >  
> >  cpudef_2_x86_cpu(cpu, def, errp);
> >  
> > -/* not supported bits will be filtered out later */
> > -env->cpuid_kvm_features = ~0;
> > -
> >  for (ent = qdict_first(features); ent; ent = qdict_next(features, 
> > ent)) {
> >  const QString *qval = qobject_to_qstring(qdict_entry_value(ent));
> >  object_property_parse(OBJECT(cpu), qstring_get_str(qval),
> > -- 
> > 1.7.11.2
> > 
> 
> -- 
> Eduardo
> 


-- 
Regards,
  Igor

Re: [Qemu-devel] [RFC 18/20] target-i386: use properties to set/unset user specified features on CPU

[Igor Mammedov]

On Wed, 15 Aug 2012 09:37:22 -0300
Eduardo Habkost  wrote:

> Another issue:
> 
> On Fri, Aug 10, 2012 at 01:22:34PM +0200, Igor Mammedov wrote:
> > Signed-off-by: Igor Mammedov 
> > ---
> >  target-i386/cpu.c | 167 
> > +++---
> >  1 file changed, 20 insertions(+), 147 deletions(-)
> > 
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 7555b08..0174c4d 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> [...]
> > @@ -1191,133 +1171,28 @@ static int cpu_x86_find_by_name(X86CPU *cpu, 
> > x86_def_t *x86_cpu_def,
> >  memcpy(x86_cpu_def, def, sizeof(*def));
> >  }
> >  
> > -plus_kvm_features = ~0; /* not supported bits will be filtered out 
> > later */
> > -
> > -add_flagname_to_bitmaps("hypervisor", &plus_features,
> > -&plus_ext_features, &plus_ext2_features, &plus_ext3_features,
> > -&plus_kvm_features, &plus_svm_features);
> > +cpudef_2_x86_cpu(cpu, def, errp);
> >  
> > -featurestr = strtok(NULL, ",");
> > +/* not supported bits will be filtered out later */
> > +env->cpuid_kvm_features = ~0;
> 
> This doesn't compile. The 'env' variable doesn't exist inside
> cpu_x86_find_by_name().
Thanks, it's fixed now.
> 
> >  
> > -while (featurestr) {
> > -char *val;
> > -if (featurestr[0] == '+') {
> > -add_flagname_to_bitmaps(featurestr + 1, &plus_features,
> > -&plus_ext_features, &plus_ext2_features,
> > -&plus_ext3_features, &plus_kvm_features,
> > -&plus_svm_features);
> > -} else if (featurestr[0] == '-') {
> > -add_flagname_to_bitmaps(featurestr + 1, &minus_features,
> > -&minus_ext_features, &minus_ext2_features,
> > -&minus_ext3_features, &minus_kvm_features,
> > -&minus_svm_features);
> > -} else if ((val = strchr(featurestr, '='))) {
> > -*val = 0; val++;
> > -if (!strcmp(featurestr, "family")) {
> > -char *err;
> > -numvalue = strtoul(val, &err, 0);
> > -if (!*val || *err || numvalue > 0xff + 0xf) {
> > -fprintf(stderr, "bad numerical value %s\n", val);
> > -goto error;
> > -}
> > -x86_cpu_def->family = numvalue;
> > -} else if (!strcmp(featurestr, "model")) {
> > -char *err;
> > -numvalue = strtoul(val, &err, 0);
> > -if (!*val || *err || numvalue > 0xff) {
> > -fprintf(stderr, "bad numerical value %s\n", val);
> > -goto error;
> > -}
> > -x86_cpu_def->model = numvalue;
> > -} else if (!strcmp(featurestr, "stepping")) {
> > -char *err;
> > -numvalue = strtoul(val, &err, 0);
> > -if (!*val || *err || numvalue > 0xf) {
> > -fprintf(stderr, "bad numerical value %s\n", val);
> > -goto error;
> > -}
> > -x86_cpu_def->stepping = numvalue ;
> > -} else if (!strcmp(featurestr, "level")) {
> > -char *err;
> > -numvalue = strtoul(val, &err, 0);
> > -if (!*val || *err) {
> > -fprintf(stderr, "bad numerical value %s\n", val);
> > -goto error;
> > -}
> > -x86_cpu_def->level = numvalue;
> > -} else if (!strcmp(featurestr, "xlevel")) {
> > -char *err;
> > -numvalue = strtoul(val, &err, 0);
> > -if (!*val || *err) {
> > -fprintf(stderr, "bad numerical value %s\n", val);
> > -goto error;
> > -}
> > -x86_cpu_def->xlevel = numvalue;
> > -} else if (!strcmp(featurestr, "vendor")) {
> > -pstrcpy(x86_cpu_def->vendor, sizeof(x86_cpu_def->vendor), 
> >

[Qemu-devel] [PATCH 00/21] target-i386: convert CPU features into properties

[Igor Mammedov]

build and run tested in FC17 host with x86_64-linux-user, x86_64-softmmu
targets

changes since RFC are documented in idividual patch descriptions
Thanks Andreas, Blue, Eduardo for reviews and suggestions.

git tree for testing: 
https://github.com/imammedo/qemu/tree/x86-cpu-properties_v1

Igor Mammedov (21):
  target-i386: return Error from cpu_x86_find_by_name()
  target-i386: cpu_x86_register(): report error from property setter
  target-i386: if x86_cpu_realize() failed report error and do cleanup
  target-i386: filter out not TCG features if running without kvm at
realize time
  target-i386: move out CPU features initialization in separate func
  target-i386: xlevel should be more than 0x8000, move fixup into
setter
  target-i386: convert cpuid features into properties
  target-i386: convert 'hv_spinlocks' feature into property
  target-i386: convert 'hv_relaxed' feature into property
  target-i386: convert 'hv_vapic' feature into property
  target-i386: convert 'check' and 'enforce' features into properties
  add visitor for parsing hz[KMG] input string
  target-i386: use visit_type_hz to parse tsc_freq property value
  target-i386: introduce vendor-override property
  target-i386: use define for cpuid vendor string size
  target-i386: replace uint32_t vendor fields by vendor string in
x86_def_t
  target-i386: parse cpu_model string into set of stringified
properties
  target-i386: use properties to set/unset user specified features on
CPU
  target-i386: move init of "hypervisor" feature into CPU initializer
from cpudef
  target-i386: move default init of cpuid_kvm_features bitmap into CPU
initializer from cpudef
  target-i386: cleanup cpu_x86_find_by_name(), only fill x86_def_t in
it

 qapi/qapi-visit-core.c  |  11 +
 qapi/qapi-visit-core.h  |   2 +
 qapi/string-input-visitor.c |  22 ++
 target-i386/cpu.c   | 691 +++-
 target-i386/cpu.h   |  14 +-
 target-i386/helper.c|   9 +-
 6 files changed, 479 insertions(+), 270 deletions(-)

-- 
1.7.11.2

[Qemu-devel] [PATCH 01/21] target-i386: return Error from cpu_x86_find_by_name()

[Igor Mammedov]

it will allow to use property setters there later.

Signed-off-by: Igor Mammedov 
--
v2:
style change, add braces (reqested by Blue Swirl)
---
 target-i386/cpu.c | 19 ---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 6d5d0d6..49286ca 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -859,7 +859,8 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, 
void *opaque,
 cpu->env.tsc_khz = value / 1000;
 }
 
-static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
+static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
+const char *cpu_model, Error **errp)
 {
 unsigned int i;
 x86_def_t *def;
@@ -1004,6 +1005,11 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, 
const char *cpu_model)
 fprintf(stderr, "feature string `%s' not in format 
(+feature|-feature|feature=xyz)\n", featurestr);
 goto error;
 }
+
+if (error_is_set(errp)) {
+goto error;
+}
+
 featurestr = strtok(NULL, ",");
 }
 x86_cpu_def->features |= plus_features;
@@ -1027,6 +1033,9 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, 
const char *cpu_model)
 
 error:
 g_free(s);
+if (!error_is_set(errp)) {
+error_set(errp, QERR_INVALID_PARAMETER_COMBINATION);
+}
 return -1;
 }
 
@@ -1155,8 +1164,10 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 
 memset(def, 0, sizeof(*def));
 
-if (cpu_x86_find_by_name(def, cpu_model) < 0)
-return -1;
+if (cpu_x86_find_by_name(cpu, def, cpu_model, &error) < 0) {
+goto out;
+}
+
 if (def->vendor1) {
 env->cpuid_vendor1 = def->vendor1;
 env->cpuid_vendor2 = def->vendor2;
@@ -1195,6 +1206,8 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 env->cpuid_svm_features &= TCG_SVM_FEATURES;
 }
 object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error);
+
+out:
 if (error_is_set(&error)) {
 error_free(error);
 return -1;
-- 
1.7.11.2

[Qemu-devel] [PATCH 11/21] target-i386: convert 'check' and 'enforce' features into properties

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
--
v2:
  * restore original behavior, check features against host before
they might be filtered out by TCG masks. spotted-by: Eduardo Habkost
---
 target-i386/cpu.c | 68 ++-
 1 file changed, 57 insertions(+), 11 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 4e7f22b..33326cc 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -107,8 +107,8 @@ typedef struct model_features_t {
 uint32_t cpuid;
 } model_features_t;
 
-int check_cpuid = 0;
-int enforce_cpuid = 0;
+bool check_cpuid;
+bool enforce_cpuid;
 
 void host_cpuid(uint32_t function, uint32_t count,
 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
@@ -580,19 +580,20 @@ static int unavailable_host_feature(struct 
model_features_t *f, uint32_t mask)
  * their way to the guest.  Note: ft[].check_feat ideally should be
  * specified via a guest_def field to suppress report of extraneous flags.
  */
-static int check_features_against_host(x86_def_t *guest_def)
+static int check_features_against_host(X86CPU *cpu)
 {
+CPUX86State *env = &cpu->env;
 x86_def_t host_def;
 uint32_t mask;
 int rv, i;
 struct model_features_t ft[] = {
-{&guest_def->features, &host_def.features,
+{&env->cpuid_features, &host_def.features,
 ~0, feature_name, 0x},
-{&guest_def->ext_features, &host_def.ext_features,
+{&env->cpuid_ext_features, &host_def.ext_features,
 ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x0001},
-{&guest_def->ext2_features, &host_def.ext2_features,
+{&env->cpuid_ext2_features, &host_def.ext2_features,
 ~PPRO_FEATURES, ext2_feature_name, 0x8000},
-{&guest_def->ext3_features, &host_def.ext3_features,
+{&env->cpuid_ext3_features, &host_def.ext3_features,
 ~CPUID_EXT3_SVM, ext3_feature_name, 0x8001}};
 
 cpu_x86_fill_host(&host_def);
@@ -1029,6 +1030,43 @@ static void x86_set_hv_vapic(Object *obj, Visitor *v, 
void *opaque,
 }
 #endif
 
+static void x86_cpuid_get_check(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+visit_type_bool(v, &check_cpuid, name, errp);
+}
+
+static void x86_cpuid_set_check(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+check_cpuid = value;
+}
+
+static void x86_cpuid_get_enforce(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+visit_type_bool(v, &enforce_cpuid, name, errp);
+}
+
+static void x86_cpuid_set_enforce(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+enforce_cpuid = value;
+object_property_set_bool(obj, value, "check", errp);
+}
+
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
@@ -1224,10 +1262,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 x86_cpu_def->ext3_features &= ~minus_ext3_features;
 x86_cpu_def->kvm_features &= ~minus_kvm_features;
 x86_cpu_def->svm_features &= ~minus_svm_features;
-if (check_cpuid) {
-if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
-goto error;
-}
 g_free(s);
 return 0;
 
@@ -1932,6 +1966,12 @@ void x86_cpu_realize(Object *obj, Error **errp)
 X86CPU *cpu = X86_CPU(obj);
 CPUX86State *env = &cpu->env;
 
+if (check_cpuid && check_features_against_host(cpu)
+&& enforce_cpuid) {
+error_set(errp, QERR_PERMISSION_DENIED);
+return;
+}
+
 if (!kvm_enabled()) {
 env->cpuid_features &= TCG_FEATURES;
 env->cpuid_ext_features &= TCG_EXT_FEATURES;
@@ -1985,6 +2025,12 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "tsc-frequency", "int",
 x86_cpuid_get_tsc_freq,
 x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
+object_property_add(obj, "check", "bool",
+x86_cpuid_get_check,
+x86_cpuid_set_check, NULL, NULL, NULL);
+object_property_add(obj, "enforce", "bool",
+x86_cpuid_get_enforce,
+x86_cpuid_set_enforce, NULL, NULL, NULL);
 #if !defined(CONFIG_USER_ONLY)
 object_property_add(obj, "hv_spinlocks", "int",
 x86_get_hv_spinlocks,
-- 
1.7.11.2

[Qemu-devel] [PATCH 12/21] add visitor for parsing hz[KMG] input string

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
--
v2:
  * replaced _hz suffix for frequency visitor by _freq suffix
suggested-by: Andreas Färber
  * fixed typo, spotted-by: Andreas Färber
---
 qapi/qapi-visit-core.c  | 11 +++
 qapi/qapi-visit-core.h  |  2 ++
 qapi/string-input-visitor.c | 22 ++
 3 files changed, 35 insertions(+)

diff --git a/qapi/qapi-visit-core.c b/qapi/qapi-visit-core.c
index 7a82b63..5c8705e 100644
--- a/qapi/qapi-visit-core.c
+++ b/qapi/qapi-visit-core.c
@@ -311,3 +311,14 @@ void input_type_enum(Visitor *v, int *obj, const char 
*strings[],
 g_free(enum_str);
 *obj = value;
 }
+
+void visit_type_freq(Visitor *v, int64_t *obj, const char *name, Error **errp)
+{
+if (!error_is_set(errp)) {
+if (v->type_freq) {
+v->type_freq(v, obj, name, errp);
+} else {
+v->type_int(v, obj, name, errp);
+}
+}
+}
diff --git a/qapi/qapi-visit-core.h b/qapi/qapi-visit-core.h
index 60aceda..e5e7dd7 100644
--- a/qapi/qapi-visit-core.h
+++ b/qapi/qapi-visit-core.h
@@ -62,6 +62,7 @@ struct Visitor
 void (*type_int64)(Visitor *v, int64_t *obj, const char *name, Error 
**errp);
 /* visit_type_size() falls back to (*type_uint64)() if type_size is unset 
*/
 void (*type_size)(Visitor *v, uint64_t *obj, const char *name, Error 
**errp);
+void (*type_freq)(Visitor *v, int64_t *obj, const char *name, Error 
**errp);
 };
 
 void visit_start_handle(Visitor *v, void **obj, const char *kind,
@@ -91,5 +92,6 @@ void visit_type_size(Visitor *v, uint64_t *obj, const char 
*name, Error **errp);
 void visit_type_bool(Visitor *v, bool *obj, const char *name, Error **errp);
 void visit_type_str(Visitor *v, char **obj, const char *name, Error **errp);
 void visit_type_number(Visitor *v, double *obj, const char *name, Error 
**errp);
+void visit_type_freq(Visitor *v, int64_t *obj, const char *name, Error **errp);
 
 #endif
diff --git a/qapi/string-input-visitor.c b/qapi/string-input-visitor.c
index 497eb9a..9ec0895 100644
--- a/qapi/string-input-visitor.c
+++ b/qapi/string-input-visitor.c
@@ -110,6 +110,27 @@ static void parse_start_optional(Visitor *v, bool *present,
 *present = true;
 }
 
+static void parse_type_freq(Visitor *v, int64_t *obj, const char *name,
+ Error **errp)
+{
+StringInputVisitor *siv = DO_UPCAST(StringInputVisitor, visitor, v);
+char *endp = (char *) siv->string;
+long long val;
+
+errno = 0;
+if (siv->string) {
+val = strtosz_suffix_unit(siv->string, &endp,
+ STRTOSZ_DEFSUFFIX_B, 1000);
+}
+if (!siv->string || val == -1 || *endp) {
+error_set(errp, QERR_INVALID_PARAMETER_VALUE, name,
+  "a value representable as a non-negative int64");
+return;
+}
+
+*obj = val;
+}
+
 Visitor *string_input_get_visitor(StringInputVisitor *v)
 {
 return &v->visitor;
@@ -132,6 +153,7 @@ StringInputVisitor *string_input_visitor_new(const char 
*str)
 v->visitor.type_str = parse_type_str;
 v->visitor.type_number = parse_type_number;
 v->visitor.start_optional = parse_start_optional;
+v->visitor.type_freq = parse_type_freq;
 
 v->string = str;
 return v;
-- 
1.7.11.2

Re: [Qemu-devel] [PATCH 06/11] Add xbzrle_encode_buffer and xbzrle_decode_buffer functions

[Igor Mitsyanko]

This patch broke master build, it causes compilation error with gcc 4.6.1:

/home/mackross/eclipse_linux_cdt_space/qemu_exynos4/savevm.c: In 
function ‘xbzrle_encode_buffer’:
/home/mackross/eclipse_linux_cdt_space/qemu_exynos4/savevm.c:2476:13: 
error: overflow in implicit constant conversion [-Werror=overflow]

cc1: all warnings being treated as errors

make[1]: *** [savevm.o] Error 1
make[1]: *** Waiting for unfinished jobs
make: *** [subdir-arm-softmmu] Error 2



On 07/25/2012 06:50 PM, Orit Wasserman wrote:

For performance we are encoding long word at a time.
For nzrun we use long-word-at-a-time NULL-detection tricks from strcmp():
using ((lword - 0x0101010101010101) & (~lword) & 0x8080808080808080) test
to find out if any byte in the long word is zero.

Signed-off-by: Benoit Hudzia 
Signed-off-by: Petter Svard 
Signed-off-by: Aidan Shribman 
Signed-off-by: Orit Wasserman 
Signed-off-by: Eric Blake 
---
  migration.h |4 ++
  savevm.c|  159 +++
  2 files changed, 163 insertions(+), 0 deletions(-)

diff --git a/migration.h b/migration.h
index 713aae0..743c366 100644
--- a/migration.h
+++ b/migration.h
@@ -100,4 +100,8 @@ void migrate_add_blocker(Error *reason);
   */
  void migrate_del_blocker(Error *reason);

+int xbzrle_encode_buffer(uint8_t *old_buf, uint8_t *new_buf, int slen,
+ uint8_t *dst, int dlen);
+int xbzrle_decode_buffer(uint8_t *src, int slen, uint8_t *dst, int dlen);
+
  #endif
diff --git a/savevm.c b/savevm.c
index 6e82b2d..c5fd13f 100644
--- a/savevm.c
+++ b/savevm.c
@@ -2392,3 +2392,162 @@ void vmstate_register_ram_global(MemoryRegion *mr)
  {
  vmstate_register_ram(mr, NULL);
  }
+
+/*
+  page = zrun nzrun
+   | zrun nzrun page
+
+  zrun = length
+
+  nzrun = length byte...
+
+  length = uleb128 encoded integer
+ */
+int xbzrle_encode_buffer(uint8_t *old_buf, uint8_t *new_buf, int slen,
+ uint8_t *dst, int dlen)
+{
+uint32_t zrun_len = 0, nzrun_len = 0;
+int d = 0, i = 0;
+long res, xor;
+uint8_t *nzrun_start = NULL;
+
+g_assert(!(((uintptr_t)old_buf | (uintptr_t)new_buf | slen) %
+   sizeof(long)));
+
+while (i < slen) {
+/* overflow */
+if (d + 2 > dlen) {
+return -1;
+}
+
+/* not aligned to sizeof(long) */
+res = (slen - i) % sizeof(long);
+while (res && old_buf[i] == new_buf[i]) {
+zrun_len++;
+i++;
+res--;
+}
+
+/* word at a time for speed */
+if (!res) {
+while (i < slen &&
+   (*(long *)(old_buf + i)) == (*(long *)(new_buf + i))) {
+i += sizeof(long);
+zrun_len += sizeof(long);
+}
+
+/* go over the rest */
+while (i < slen && old_buf[i] == new_buf[i]) {
+zrun_len++;
+i++;
+}
+}
+
+/* buffer unchanged */
+if (zrun_len == slen) {
+return 0;
+}
+
+/* skip last zero run */
+if (i == slen) {
+return d;
+}
+
+d += uleb128_encode_small(dst + d, zrun_len);
+
+zrun_len = 0;
+nzrun_start = new_buf + i;
+
+/* overflow */
+if (d + 2 > dlen) {
+return -1;
+}
+/* not aligned to sizeof(long) */
+res = (slen - i) % sizeof(long);
+while (res && old_buf[i] != new_buf[i]) {
+i++;
+nzrun_len++;
+res--;
+}
+
+/* word at a time for speed, use of 32-bit long okay */
+if (!res) {
+/* truncation to 32-bit long okay */
+long mask = 0x0101010101010101ULL;
+while (i < slen) {
+xor = *(long *)(old_buf + i) ^ *(long *)(new_buf + i);
+if ((xor - mask) & ~xor & (mask << 7)) {
+/* found the end of an nzrun within the current long */
+while (old_buf[i] != new_buf[i]) {
+nzrun_len++;
+i++;
+}
+break;
+} else {
+i += sizeof(long);
+nzrun_len += sizeof(long);
+}
+}
+}
+
+d += uleb128_encode_small(dst + d, nzrun_len);
+/* overflow */
+if (d + nzrun_len > dlen) {
+return -1;
+}
+memcpy(dst + d, nzrun_start, nzrun_len);
+d += nzrun_len;
+nzrun_len = 0;
+}
+
+return d;
+}
+
+int xbzrle_decode_buffer(uint8_t *src, int slen, uint8_t *dst, int dlen)
+{
+int i = 0, d = 0;
+int ret;
+uint32_t count = 0;
+
+while (i < slen) {
+
+/* zrun */
+if ((slen - i) < 2) {
+return -1;
+}
+
+ret = uleb128_decode_small(src + i, &count);
+if (ret < 0 || (i && !count)) {
+  

[Qemu-devel] [PATCH 18/21] target-i386: use properties to set/unset user specified features on CPU

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
Signed-off-by: Eduardo Habkost 
--
v2:
  * fix error of initializing from incorrect cpu model definition
use x86_cpu_def instead of def. spotted-by: Eduardo Habkost
  * add missing env in cpu_x86_find_by_name()
  * added cpu_x86_set_props() to make following code movement more
clean. suggested-by: Eduardo Habkost
---
 target-i386/cpu.c | 184 ++
 1 file changed, 34 insertions(+), 150 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 98b6bbd..73dbf32 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -207,22 +207,6 @@ static bool lookup_feature(uint32_t *pval, const char *s, 
const char *e,
 return found;
 }
 
-static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
-uint32_t *ext_features,
-uint32_t *ext2_features,
-uint32_t *ext3_features,
-uint32_t *kvm_features,
-uint32_t *svm_features)
-{
-if (!lookup_feature(features, flagname, NULL, feature_name) &&
-!lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
-!lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
-!lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
-!lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
-!lookup_feature(svm_features, flagname, NULL, svm_feature_name))
-fprintf(stderr, "CPU feature %s not found\n", flagname);
-}
-
 typedef struct x86_def_t {
 struct x86_def_t *next;
 const char *name;
@@ -1103,7 +1087,6 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_ext_features = def->ext_features;
 env->cpuid_ext2_features = def->ext2_features;
 env->cpuid_ext3_features = def->ext3_features;
-env->cpuid_kvm_features = def->kvm_features;
 env->cpuid_svm_features = def->svm_features;
 env->cpuid_ext4_features = def->ext4_features;
 env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
@@ -1162,22 +1145,34 @@ static void compat_normalize_cpu_model(const char 
*cpu_model, char **cpu_name,
 return;
 }
 
+/* Set features on X86CPU object based on a QDict */
+static void cpu_x86_set_props(X86CPU *cpu, QDict *features, Error **errp)
+{
+const QDictEntry *ent;
+
+for (ent = qdict_first(features); ent; ent = qdict_next(features, ent)) {
+const QString *qval = qobject_to_qstring(qdict_entry_value(ent));
+object_property_parse(OBJECT(cpu), qstring_get_str(qval),
+  qdict_entry_key(ent), errp);
+if (error_is_set(errp)) {
+return;
+}
+}
+}
+
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
 x86_def_t *def;
 
-char *s = g_strdup(cpu_model);
-char *featurestr, *name = strtok(s, ",");
-/* Features to be added*/
-uint32_t plus_features = 0, plus_ext_features = 0;
-uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
-uint32_t plus_kvm_features = 0, plus_svm_features = 0;
-/* Features to be removed */
-uint32_t minus_features = 0, minus_ext_features = 0;
-uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
-uint32_t minus_kvm_features = 0, minus_svm_features = 0;
-uint32_t numvalue;
+CPUX86State *env = &cpu->env;
+QDict *features;
+char *name;
+
+compat_normalize_cpu_model(cpu_model, &name, &features, errp);
+if (error_is_set(errp)) {
+goto error;
+}
 
 for (def = x86_defs; def; def = def->next)
 if (name && !strcmp(name, def->name))
@@ -1190,133 +1185,24 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 memcpy(x86_cpu_def, def, sizeof(*def));
 }
 
-plus_kvm_features = ~0; /* not supported bits will be filtered out later */
+cpudef_2_x86_cpu(cpu, x86_cpu_def, errp);
 
-add_flagname_to_bitmaps("hypervisor", &plus_features,
-&plus_ext_features, &plus_ext2_features, &plus_ext3_features,
-&plus_kvm_features, &plus_svm_features);
+/* not supported bits will be filtered out later */
+env->cpuid_kvm_features = ~0;
 
-featurestr = strtok(NULL, ",");
+object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
 
-while (featurestr) {
-char *val;
-if (featurestr[0] == '+') {
-add_flagname_to_bitmaps(featurestr + 1, &plus_features,
-&plus_ext_features, &plus_ext2_features,
- 

[Qemu-devel] [PATCH 08/21] target-i386: convert 'hv_spinlocks' feature into property

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 440e724..777b8ce 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -963,6 +963,32 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor 
*v, void *opaque,
 cpu->env.tsc_khz = value / 1000;
 }
 
+#if !defined(CONFIG_USER_ONLY)
+static void x86_get_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+int64_t value = hyperv_get_spinlock_retries();
+
+visit_type_int(v, &value, name, errp);
+}
+
+static void x86_set_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+int64_t value;
+
+visit_type_int(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+if (!value) {
+error_set(errp, QERR_PROPERTY_VALUE_BAD, "", name, "0");
+return;
+}
+hyperv_set_spinlock_retries(value);
+}
+#endif
+
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
@@ -1919,6 +1945,11 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "tsc-frequency", "int",
 x86_cpuid_get_tsc_freq,
 x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
+#if !defined(CONFIG_USER_ONLY)
+object_property_add(obj, "hv_spinlocks", "int",
+x86_get_hv_spinlocks,
+x86_set_hv_spinlocks, NULL, NULL, NULL);
+#endif
 x86_register_cpuid_properties(obj, feature_name);
 x86_register_cpuid_properties(obj, ext_feature_name);
 x86_register_cpuid_properties(obj, ext2_feature_name);
-- 
1.7.11.2

[Qemu-devel] [PATCH 13/21] target-i386: use visit_type_hz to parse tsc_freq property value

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
v2:
  * use visit_type_freq() which replaced visit_type_hz()
---
 target-i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 33326cc..3952368 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -951,7 +951,7 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, 
void *opaque,
 const int64_t max = INT_MAX;
 int64_t value;
 
-visit_type_int(v, &value, name, errp);
+visit_type_freq(v, &value, name, errp);
 if (error_is_set(errp)) {
 return;
 }
-- 
1.7.11.2

[Qemu-devel] [PATCH 20/21] target-i386: move default init of cpuid_kvm_features bitmap into CPU initializer from cpudef

[Igor Mammedov]

Moving it inside CPU initializer from cpudef will help to split
cpu_x86_find_by_name() into default init and user settable properties.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 59ebe40..75cbf48 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1092,6 +1092,9 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
 env->cpuid_xlevel2 = def->xlevel2;
 
+/* not supported bits will be filtered out later */
+env->cpuid_kvm_features = ~0;
+
 object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
 }
 
@@ -1167,7 +1170,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 {
 x86_def_t *def;
 
-CPUX86State *env = &cpu->env;
 QDict *features;
 char *name;
 
@@ -1189,9 +1191,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 
 cpudef_2_x86_cpu(cpu, x86_cpu_def, errp);
 
-/* not supported bits will be filtered out later */
-env->cpuid_kvm_features = ~0;
-
 cpu_x86_set_props(cpu, features, errp);
 QDECREF(features);
 if (error_is_set(errp)) {
-- 
1.7.11.2

[Qemu-devel] [PATCH 16/21] target-i386: replace uint32_t vendor fields by vendor string in x86_def_t

[Igor Mammedov]

Vendor property setter takes string as vendor value but cpudefs
use uint32_t vendor[123] fields to define vendor value. It makes it
difficult to unify and use property setter for values from cpudefs.

To allow simplify code by using vendor property setter, vendor[123]
fields are converted into vendor[13] array to keep its value. And
vendor property setter is used to access/set value on CPU.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 76 +--
 target-i386/cpu.h | 10 +++-
 2 files changed, 20 insertions(+), 66 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index af6c9a3..d24ef84 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -227,7 +227,7 @@ typedef struct x86_def_t {
 struct x86_def_t *next;
 const char *name;
 uint32_t level;
-uint32_t vendor1, vendor2, vendor3;
+char vendor[CPUID_VENDOR_SZ + 1];
 int family;
 int model;
 int stepping;
@@ -293,9 +293,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "qemu64",
 .level = 4,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
 .family = 6,
 .model = 2,
 .stepping = 3,
@@ -312,9 +310,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "phenom",
 .level = 5,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
 .family = 16,
 .model = 2,
 .stepping = 3,
@@ -358,9 +354,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "kvm64",
 .level = 5,
-.vendor1 = CPUID_VENDOR_INTEL_1,
-.vendor2 = CPUID_VENDOR_INTEL_2,
-.vendor3 = CPUID_VENDOR_INTEL_3,
+.vendor = CPUID_VENDOR_INTEL,
 .family = 15,
 .model = 6,
 .stepping = 1,
@@ -459,9 +453,7 @@ static x86_def_t builtin_x86_defs[] = {
 {
 .name = "athlon",
 .level = 2,
-.vendor1 = CPUID_VENDOR_AMD_1,
-.vendor2 = CPUID_VENDOR_AMD_2,
-.vendor3 = CPUID_VENDOR_AMD_3,
+.vendor = CPUID_VENDOR_AMD,
 .family = 6,
 .model = 2,
 .stepping = 3,
@@ -507,13 +499,16 @@ static int cpu_x86_fill_model_id(char *str)
 static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
 {
 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
+int i;
 
 x86_cpu_def->name = "host";
 host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
 x86_cpu_def->level = eax;
-x86_cpu_def->vendor1 = ebx;
-x86_cpu_def->vendor2 = edx;
-x86_cpu_def->vendor3 = ecx;
+for (i = 0; i < 4; i++) {
+x86_cpu_def->vendor[i] = ebx >> (8 * i);
+x86_cpu_def->vendor[i + 4] = edx >> (8 * i);
+x86_cpu_def->vendor[i + 8] = ecx >> (8 * i);
+}
 
 host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
 x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
@@ -538,9 +533,7 @@ static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
 x86_cpu_def->vendor_override = 0;
 
 /* Call Centaur's CPUID instruction. */
-if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
-x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
-x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
+if (!strcmp(x86_cpu_def->vendor, CPUID_VENDOR_VIA)) {
 host_cpuid(0xC000, 0, &eax, &ebx, &ecx, &edx);
 if (eax >= 0xC001) {
 /* Support VIA max extended level */
@@ -1095,15 +1088,8 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t 
*def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
 
-if (def->vendor1) {
-env->cpuid_vendor1 = def->vendor1;
-env->cpuid_vendor2 = def->vendor2;
-env->cpuid_vendor3 = def->vendor3;
-} else {
-env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
-env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
-env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
-}
+object_property_set_str(OBJECT(cpu), def->vendor[0] ?
+def->vendor : CPUID_VENDOR_INTEL, "vendor", errp);
 object_property_set_bool(OBJECT(cpu), true, "vendor-override", errp);
 object_property_set_int(OBJECT(cpu), def->level, "level", errp);
 object_property_set_int(OBJECT(cpu), def->family, "family", errp);
@@ -1127,7 +1113,6 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
-unsigned int i;
 x86_def_t *def;

[Qemu-devel] [PATCH 02/21] target-i386: cpu_x86_register(): report error from property setter

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 49286ca..b655dbc 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1209,6 +1209,7 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 
 out:
 if (error_is_set(&error)) {
+fprintf(stderr, "%s\n", error_get_pretty(error));
 error_free(error);
 return -1;
 }
-- 
1.7.11.2

[Qemu-devel] [PATCH 21/21] target-i386: cleanup cpu_x86_find_by_name(), only fill x86_def_t in it

[Igor Mammedov]

Do in cpu_x86_find_by_name() only what name implies. i.e. leave only
cpudef search and copy/fill passed in x86_def_t structure.

and move out of it cpu_model parsing and CPU initializing into
cpu_x86_register(). Plus add hints to where blocks should go when
cpu_x86_register() is disbanded.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 55 +++
 1 file changed, 27 insertions(+), 28 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 75cbf48..ee2a90f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1170,42 +1170,26 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 {
 x86_def_t *def;
 
-QDict *features;
-char *name;
-
-compat_normalize_cpu_model(cpu_model, &name, &features, errp);
-if (error_is_set(errp)) {
-goto error;
+if (!cpu_model) {
+error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu_model", "NULL");
+return -1;
 }
 
-for (def = x86_defs; def; def = def->next)
-if (name && !strcmp(name, def->name))
+for (def = x86_defs; def; def = def->next) {
+if (!strcmp(cpu_model, def->name)) {
 break;
-if (kvm_enabled() && name && strcmp(name, "host") == 0) {
+}
+}
+if (kvm_enabled() && strcmp(cpu_model, "host") == 0) {
 cpu_x86_fill_host(x86_cpu_def);
 } else if (!def) {
-goto error;
+error_set(errp, QERR_DEVICE_NOT_FOUND, cpu_model);
+return -1;
 } else {
 memcpy(x86_cpu_def, def, sizeof(*def));
 }
 
-cpudef_2_x86_cpu(cpu, x86_cpu_def, errp);
-
-cpu_x86_set_props(cpu, features, errp);
-QDECREF(features);
-if (error_is_set(errp)) {
-goto error;
-}
-
-g_free(name);
 return 0;
-
-error:
-g_free(name);
-if (!error_is_set(errp)) {
-error_set(errp, QERR_INVALID_PARAMETER_COMBINATION);
-}
-return -1;
 }
 
 /* generate a composite string into buf of all cpuid names in featureset
@@ -1326,14 +1310,29 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 {
 x86_def_t def1, *def = &def1;
 Error *error = NULL;
+QDict *features;
+char *name;
 
-memset(def, 0, sizeof(*def));
+/* for CPU subclasses should go into cpu_x86_init() before object_new() */
+compat_normalize_cpu_model(cpu_model, &name, &features, &error);
+if (error_is_set(&error)) {
+goto out;
+}
 
-if (cpu_x86_find_by_name(cpu, def, cpu_model, &error) < 0) {
+/* this block should be replaced by CPU subclasses */
+memset(def, 0, sizeof(*def));
+if (cpu_x86_find_by_name(cpu, def, name, &error) < 0) {
 goto out;
 }
+cpudef_2_x86_cpu(cpu, def, &error);
+
+/* for CPU subclasses should go between object_new() and
+ * x86_cpu_realize() */
+cpu_x86_set_props(cpu, features, &error);
 
 out:
+QDECREF(features);
+g_free(name);
 if (error_is_set(&error)) {
 fprintf(stderr, "%s\n", error_get_pretty(error));
 error_free(error);
-- 
1.7.11.2

[Qemu-devel] [PATCH 07/21] target-i386: convert cpuid features into properties

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
--
v2:
  * replaced mask/ffs tricks by plain 'for (bit = 0; bit < 32; bit++)'
as suggested by Eduardo Habkost
---
 target-i386/cpu.c | 101 ++
 1 file changed, 101 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 37ba5ef..440e724 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -606,6 +606,101 @@ static int check_features_against_host(x86_def_t 
*guest_def)
 return rv;
 }
 
+static bool is_feature_set(const char *name, const uint32_t featbitmap,
+  const char **featureset)
+{
+uint32_t bit;
+
+for (bit = 0; bit < 32; ++bit) {
+if (featureset[bit] && !altcmp(name, NULL, featureset[bit])) {
+if (featbitmap & (1 << bit)) {
+return true;
+}
+}
+}
+return false;
+}
+
+static void x86_cpuid_get_feature(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+bool value = true;
+
+if (!is_feature_set(name, env->cpuid_features, feature_name) &&
+   !is_feature_set(name, env->cpuid_ext_features, ext_feature_name) &&
+   !is_feature_set(name, env->cpuid_ext2_features, ext2_feature_name) &&
+   !is_feature_set(name, env->cpuid_ext3_features, ext3_feature_name) &&
+   !is_feature_set(name, env->cpuid_kvm_features, kvm_feature_name) &&
+   !is_feature_set(name, env->cpuid_svm_features, svm_feature_name)) {
+value = false;
+}
+
+visit_type_bool(v, &value, name, errp);
+}
+
+static void x86_cpuid_set_feature(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+uint32_t mask = 0;
+uint32_t *dst_features;
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+
+if (lookup_feature(&mask, name, NULL, feature_name)) {
+dst_features = &env->cpuid_features;
+} else if (lookup_feature(&mask, name, NULL, ext_feature_name)) {
+dst_features = &env->cpuid_ext_features;
+} else if (lookup_feature(&mask, name, NULL, ext2_feature_name)) {
+dst_features = &env->cpuid_ext2_features;
+} else if (lookup_feature(&mask, name, NULL, ext3_feature_name)) {
+dst_features = &env->cpuid_ext3_features;
+} else if (lookup_feature(&mask, name, NULL, kvm_feature_name)) {
+dst_features = &env->cpuid_kvm_features;
+} else if (lookup_feature(&mask, name, NULL, svm_feature_name)) {
+dst_features = &env->cpuid_svm_features;
+} else {
+error_set(errp, QERR_PROPERTY_NOT_FOUND, "", name);
+return;
+}
+
+if (value) {
+*dst_features |= mask;
+} else {
+*dst_features &= ~mask;
+}
+}
+
+static void x86_register_cpuid_properties(Object *obj, const char **featureset)
+{
+uint32_t bit;
+
+for (bit = 0; bit < 32; ++bit) {
+if (featureset[bit]) {
+char *feature_name, *save_ptr;
+char buf[32];
+if (strlen(featureset[bit]) > sizeof(buf) - 1) {
+abort();
+}
+pstrcpy(buf, sizeof(buf), featureset[bit]);
+feature_name = strtok_r(buf, "|", &save_ptr);
+while (feature_name) {
+object_property_add(obj, feature_name, "bool",
+x86_cpuid_get_feature,
+x86_cpuid_set_feature, NULL, NULL, NULL);
+feature_name = strtok_r(NULL, "|", &save_ptr);
+}
+}
+}
+}
+
 static void x86_cpuid_version_get_family(Object *obj, Visitor *v, void *opaque,
  const char *name, Error **errp)
 {
@@ -1824,6 +1919,12 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "tsc-frequency", "int",
 x86_cpuid_get_tsc_freq,
 x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
+x86_register_cpuid_properties(obj, feature_name);
+x86_register_cpuid_properties(obj, ext_feature_name);
+x86_register_cpuid_properties(obj, ext2_feature_name);
+x86_register_cpuid_properties(obj, ext3_feature_name);
+x86_register_cpuid_properties(obj, kvm_feature_name);
+x86_register_cpuid_properties(obj, svm_feature_name);
 
 env->cpuid_apic_id = env->cpu_index;
 
-- 
1.7.11.2

[Qemu-devel] [PATCH 10/21] target-i386: convert 'hv_vapic' feature into property

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index edf277e..4e7f22b 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1007,6 +1007,26 @@ static void x86_set_hv_relaxed(Object *obj, Visitor *v, 
void *opaque,
 }
 hyperv_enable_relaxed_timing(value);
 }
+
+static void x86_get_hv_vapic(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value = hyperv_vapic_recommended();
+
+visit_type_bool(v, &value, name, errp);
+}
+
+static void x86_set_hv_vapic(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+hyperv_enable_vapic_recommended(value);
+}
 #endif
 
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
@@ -1972,6 +1992,9 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "hv_relaxed", "bool",
 x86_get_hv_relaxed,
 x86_set_hv_relaxed, NULL, NULL, NULL);
+object_property_add(obj, "hv_vapic", "bool",
+x86_set_hv_vapic,
+x86_get_hv_vapic, NULL, NULL, NULL);
 #endif
 x86_register_cpuid_properties(obj, feature_name);
 x86_register_cpuid_properties(obj, ext_feature_name);
-- 
1.7.11.2

[Qemu-devel] [PATCH 03/21] target-i386: if x86_cpu_realize() failed report error and do cleanup

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
Acked-by: Andreas Färber 
---
 target-i386/helper.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index 8a5da3d..a0e4c89 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1151,6 +1151,7 @@ X86CPU *cpu_x86_init(const char *cpu_model)
 {
 X86CPU *cpu;
 CPUX86State *env;
+Error *error = NULL;
 
 cpu = X86_CPU(object_new(TYPE_X86_CPU));
 env = &cpu->env;
@@ -1161,8 +1162,12 @@ X86CPU *cpu_x86_init(const char *cpu_model)
 return NULL;
 }
 
-x86_cpu_realize(OBJECT(cpu), NULL);
-
+x86_cpu_realize(OBJECT(cpu), &error);
+if (error_is_set(&error)) {
+error_free(error);
+object_delete(OBJECT(cpu));
+return NULL;
+}
 return cpu;
 }
 
-- 
1.7.11.2

[Qemu-devel] [PATCH 06/21] target-i386: xlevel should be more than 0x80000000, move fixup into setter

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
Reviewed-by: Eduardo Habkost 
---
 target-i386/cpu.c | 14 ++
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index f31462a..37ba5ef 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -746,8 +746,17 @@ static void x86_cpuid_set_xlevel(Object *obj, Visitor *v, 
void *opaque,
  const char *name, Error **errp)
 {
 X86CPU *cpu = X86_CPU(obj);
+uint32_t value;
 
-visit_type_uint32(v, &cpu->env.cpuid_xlevel, name, errp);
+visit_type_uint32(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+
+if (value < 0x8000) {
+value += 0x8000;
+}
+cpu->env.cpuid_xlevel = value;
 }
 
 static char *x86_cpuid_get_vendor(Object *obj, Error **errp)
@@ -982,9 +991,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 fprintf(stderr, "bad numerical value %s\n", val);
 goto error;
 }
-if (numvalue < 0x8000) {
-numvalue += 0x8000;
-}
 x86_cpu_def->xlevel = numvalue;
 } else if (!strcmp(featurestr, "vendor")) {
 if (strlen(val) != 12) {
-- 
1.7.11.2

[Qemu-devel] [PATCH 19/21] target-i386: move init of "hypervisor" feature into CPU initializer from cpudef

[Igor Mammedov]

"hypervisor" CPU feature is unconditionally enabled/overridden even if it's 
cleared
in cpudef. Moving it inside CPU initializer from cpudef will help to
split cpu_x86_find_by_name() into default init and user settable properties.

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 73dbf32..59ebe40 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1091,6 +1091,8 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_ext4_features = def->ext4_features;
 env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
 env->cpuid_xlevel2 = def->xlevel2;
+
+object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
 }
 
 /* convert legacy cpumodel string to string cpu_name and
@@ -1190,8 +1192,6 @@ static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t 
*x86_cpu_def,
 /* not supported bits will be filtered out later */
 env->cpuid_kvm_features = ~0;
 
-object_property_set_bool(OBJECT(cpu), true, "hypervisor", errp);
-
 cpu_x86_set_props(cpu, features, errp);
 QDECREF(features);
 if (error_is_set(errp)) {
-- 
1.7.11.2

Re: [Qemu-devel] [PATCH 12/21] add visitor for parsing hz[KMG] input string

[Igor Mammedov]

On Wed, 15 Aug 2012 18:44:59 +0200
Andreas Färber  wrote:

> Am 15.08.2012 18:13, schrieb Igor Mammedov:
> > Signed-off-by: Igor Mammedov 
> > --
> > v2:
> >   * replaced _hz suffix for frequency visitor by _freq suffix
> > suggested-by: Andreas Färber
> >   * fixed typo, spotted-by: Andreas Färber
> > ---
> >  qapi/qapi-visit-core.c  | 11 +++
> >  qapi/qapi-visit-core.h  |  2 ++
> >  qapi/string-input-visitor.c | 22 ++
> >  3 files changed, 35 insertions(+)
> > 
> > diff --git a/qapi/qapi-visit-core.c b/qapi/qapi-visit-core.c
> > index 7a82b63..5c8705e 100644
> > --- a/qapi/qapi-visit-core.c
> > +++ b/qapi/qapi-visit-core.c
> > @@ -311,3 +311,14 @@ void input_type_enum(Visitor *v, int *obj, const char 
> > *strings[],
> >  g_free(enum_str);
> >  *obj = value;
> >  }
> > +
> > +void visit_type_freq(Visitor *v, int64_t *obj, const char *name, Error 
> > **errp)
> > +{
> > +if (!error_is_set(errp)) {
> > +if (v->type_freq) {
> > +v->type_freq(v, obj, name, errp);
> > +} else {
> > +v->type_int(v, obj, name, errp);
> > +}
> > +}
> > +}
> > diff --git a/qapi/qapi-visit-core.h b/qapi/qapi-visit-core.h
> > index 60aceda..e5e7dd7 100644
> > --- a/qapi/qapi-visit-core.h
> > +++ b/qapi/qapi-visit-core.h
> > @@ -62,6 +62,7 @@ struct Visitor
> >  void (*type_int64)(Visitor *v, int64_t *obj, const char *name, Error 
> > **errp);
> >  /* visit_type_size() falls back to (*type_uint64)() if type_size is 
> > unset */
> >  void (*type_size)(Visitor *v, uint64_t *obj, const char *name, Error 
> > **errp);
> > +void (*type_freq)(Visitor *v, int64_t *obj, const char *name, Error 
> > **errp);
> >  };
> >  
> >  void visit_start_handle(Visitor *v, void **obj, const char *kind,
> > @@ -91,5 +92,6 @@ void visit_type_size(Visitor *v, uint64_t *obj, const 
> > char *name, Error **errp);
> >  void visit_type_bool(Visitor *v, bool *obj, const char *name, Error 
> > **errp);
> >  void visit_type_str(Visitor *v, char **obj, const char *name, Error 
> > **errp);
> >  void visit_type_number(Visitor *v, double *obj, const char *name, Error 
> > **errp);
> > +void visit_type_freq(Visitor *v, int64_t *obj, const char *name, Error 
> > **errp);
> >  
> >  #endif
> > diff --git a/qapi/string-input-visitor.c b/qapi/string-input-visitor.c
> > index 497eb9a..9ec0895 100644
> > --- a/qapi/string-input-visitor.c
> > +++ b/qapi/string-input-visitor.c
> > @@ -110,6 +110,27 @@ static void parse_start_optional(Visitor *v, bool 
> > *present,
> >  *present = true;
> >  }
> >  
> > +static void parse_type_freq(Visitor *v, int64_t *obj, const char *name,
> > + Error **errp)
> 
> Tiny glitch here, one space too much it seems.
> 
> If you fix that:
> Acked-by: Andreas Färber 
Done.
Thanks!
updated tree at: https://github.com/imammedo/qemu/tree/x86-cpu-properties.WIP

> 
> > +{
> > +StringInputVisitor *siv = DO_UPCAST(StringInputVisitor, visitor, v);
> > +char *endp = (char *) siv->string;
> > +long long val;
> > +
> > +errno = 0;
> > +if (siv->string) {
> > +val = strtosz_suffix_unit(siv->string, &endp,
> > + STRTOSZ_DEFSUFFIX_B, 1000);
> 
> Please also check here...
> 
> > +}
> > +if (!siv->string || val == -1 || *endp) {
> > +error_set(errp, QERR_INVALID_PARAMETER_VALUE, name,
> > +  "a value representable as a non-negative int64");
> 
> ...and here.
> 
> > +return;
> > +}
> > +
> > +*obj = val;
> > +}
> > +
> >  Visitor *string_input_get_visitor(StringInputVisitor *v)
> >  {
> >  return &v->visitor;
> > @@ -132,6 +153,7 @@ StringInputVisitor *string_input_visitor_new(const char 
> > *str)
> >  v->visitor.type_str = parse_type_str;
> >  v->visitor.type_number = parse_type_number;
> >  v->visitor.start_optional = parse_start_optional;
> > +v->visitor.type_freq = parse_type_freq;
> 
> Optionally reorder this, so that it's alongside the other type_*?
> 
> >  
> >  v->string = str;
> >  return v;
> > 
> 
> Thanks,
> Andreas
> 
> 
> -- 
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg


-- 
Regards,
  Igor

[Qemu-devel] [PATCH 04/21] target-i386: filter out not TCG features if running without kvm at realize time

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
Reviewed-by: Eduardo Habkost 
---
 target-i386/cpu.c | 24 +---
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b655dbc..cc6ce48 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1194,17 +1194,6 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 env->cpuid_xlevel2 = def->xlevel2;
 object_property_set_int(OBJECT(cpu), (int64_t)def->tsc_khz * 1000,
 "tsc-frequency", &error);
-if (!kvm_enabled()) {
-env->cpuid_features &= TCG_FEATURES;
-env->cpuid_ext_features &= TCG_EXT_FEATURES;
-env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
-#ifdef TARGET_X86_64
-| CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
-#endif
-);
-env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
-env->cpuid_svm_features &= TCG_SVM_FEATURES;
-}
 object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error);
 
 out:
@@ -1768,6 +1757,19 @@ static void mce_init(X86CPU *cpu)
 void x86_cpu_realize(Object *obj, Error **errp)
 {
 X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+
+if (!kvm_enabled()) {
+env->cpuid_features &= TCG_FEATURES;
+env->cpuid_ext_features &= TCG_EXT_FEATURES;
+env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
+#ifdef TARGET_X86_64
+| CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
+#endif
+);
+env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
+env->cpuid_svm_features &= TCG_SVM_FEATURES;
+}
 
 #ifndef CONFIG_USER_ONLY
 qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
-- 
1.7.11.2

[Qemu-devel] [PATCH 15/21] target-i386: use define for cpuid vendor string size

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 6 +++---
 target-i386/cpu.h | 2 ++
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index cb6ada0..af6c9a3 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -862,13 +862,13 @@ static char *x86_cpuid_get_vendor(Object *obj, Error 
**errp)
 char *value;
 int i;
 
-value = (char *)g_malloc(12 + 1);
+value = (char *)g_malloc(CPUID_VENDOR_SZ + 1);
 for (i = 0; i < 4; i++) {
 value[i] = env->cpuid_vendor1 >> (8 * i);
 value[i + 4] = env->cpuid_vendor2 >> (8 * i);
 value[i + 8] = env->cpuid_vendor3 >> (8 * i);
 }
-value[12] = '\0';
+value[CPUID_VENDOR_SZ] = '\0';
 return value;
 }
 
@@ -879,7 +879,7 @@ static void x86_cpuid_set_vendor(Object *obj, const char 
*value,
 CPUX86State *env = &cpu->env;
 int i;
 
-if (strlen(value) != 12) {
+if (strlen(value) != CPUID_VENDOR_SZ) {
 error_set(errp, QERR_PROPERTY_VALUE_BAD, "",
   "vendor", value);
 return;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 979682a..5c75704 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -440,6 +440,8 @@
 #define CPUID_SVM_PAUSEFILTER  (1 << 10)
 #define CPUID_SVM_PFTHRESHOLD  (1 << 12)
 
+#define CPUID_VENDOR_SZ  12
+
 #define CPUID_VENDOR_INTEL_1 0x756e6547 /* "Genu" */
 #define CPUID_VENDOR_INTEL_2 0x49656e69 /* "ineI" */
 #define CPUID_VENDOR_INTEL_3 0x6c65746e /* "ntel" */
-- 
1.7.11.2

[Qemu-devel] [PATCH 09/21] target-i386: convert 'hv_relaxed' feature into property

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 777b8ce..edf277e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -987,6 +987,26 @@ static void x86_set_hv_spinlocks(Object *obj, Visitor *v, 
void *opaque,
 }
 hyperv_set_spinlock_retries(value);
 }
+
+static void x86_get_hv_relaxed(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value = hyperv_relaxed_timing_enabled();
+
+visit_type_bool(v, &value, name, errp);
+}
+
+static void x86_set_hv_relaxed(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+hyperv_enable_relaxed_timing(value);
+}
 #endif
 
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
@@ -1949,6 +1969,9 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add(obj, "hv_spinlocks", "int",
 x86_get_hv_spinlocks,
 x86_set_hv_spinlocks, NULL, NULL, NULL);
+object_property_add(obj, "hv_relaxed", "bool",
+x86_get_hv_relaxed,
+x86_set_hv_relaxed, NULL, NULL, NULL);
 #endif
 x86_register_cpuid_properties(obj, feature_name);
 x86_register_cpuid_properties(obj, ext_feature_name);
-- 
1.7.11.2

[Qemu-devel] [PATCH 05/21] target-i386: move out CPU features initialization in separate func

[Igor Mammedov]

later it could be used in cpu_x86_find_by_name() to init
CPU from found cpu_def

Signed-off-by: Igor Mammedov 
Reviewed-by: Eduardo Habkost 
---
 target-i386/cpu.c | 62 ++-
 1 file changed, 34 insertions(+), 28 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index cc6ce48..f31462a 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -859,6 +859,39 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor 
*v, void *opaque,
 cpu->env.tsc_khz = value / 1000;
 }
 
+static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
+{
+CPUX86State *env = &cpu->env;
+
+if (def->vendor1) {
+env->cpuid_vendor1 = def->vendor1;
+env->cpuid_vendor2 = def->vendor2;
+env->cpuid_vendor3 = def->vendor3;
+} else {
+env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
+env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
+env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
+}
+env->cpuid_vendor_override = def->vendor_override;
+object_property_set_int(OBJECT(cpu), def->level, "level", errp);
+object_property_set_int(OBJECT(cpu), def->family, "family", errp);
+object_property_set_int(OBJECT(cpu), def->model, "model", errp);
+object_property_set_int(OBJECT(cpu), def->stepping, "stepping", errp);
+object_property_set_int(OBJECT(cpu), def->xlevel, "xlevel", errp);
+object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp);
+object_property_set_int(OBJECT(cpu), (int64_t)def->tsc_khz * 1000,
+"tsc-frequency", errp);
+env->cpuid_features = def->features;
+env->cpuid_ext_features = def->ext_features;
+env->cpuid_ext2_features = def->ext2_features;
+env->cpuid_ext3_features = def->ext3_features;
+env->cpuid_kvm_features = def->kvm_features;
+env->cpuid_svm_features = def->svm_features;
+env->cpuid_ext4_features = def->ext4_features;
+env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
+env->cpuid_xlevel2 = def->xlevel2;
+}
+
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
@@ -1158,7 +1191,6 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Error 
**errp)
 
 int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 {
-CPUX86State *env = &cpu->env;
 x86_def_t def1, *def = &def1;
 Error *error = NULL;
 
@@ -1168,33 +1200,7 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model)
 goto out;
 }
 
-if (def->vendor1) {
-env->cpuid_vendor1 = def->vendor1;
-env->cpuid_vendor2 = def->vendor2;
-env->cpuid_vendor3 = def->vendor3;
-} else {
-env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
-env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
-env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
-}
-env->cpuid_vendor_override = def->vendor_override;
-object_property_set_int(OBJECT(cpu), def->level, "level", &error);
-object_property_set_int(OBJECT(cpu), def->family, "family", &error);
-object_property_set_int(OBJECT(cpu), def->model, "model", &error);
-object_property_set_int(OBJECT(cpu), def->stepping, "stepping", &error);
-env->cpuid_features = def->features;
-env->cpuid_ext_features = def->ext_features;
-env->cpuid_ext2_features = def->ext2_features;
-env->cpuid_ext3_features = def->ext3_features;
-object_property_set_int(OBJECT(cpu), def->xlevel, "xlevel", &error);
-env->cpuid_kvm_features = def->kvm_features;
-env->cpuid_svm_features = def->svm_features;
-env->cpuid_ext4_features = def->ext4_features;
-env->cpuid_7_0_ebx = def->cpuid_7_0_ebx_features;
-env->cpuid_xlevel2 = def->xlevel2;
-object_property_set_int(OBJECT(cpu), (int64_t)def->tsc_khz * 1000,
-"tsc-frequency", &error);
-object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error);
+cpudef_2_x86_cpu(cpu, def, &error);
 
 out:
 if (error_is_set(&error)) {
-- 
1.7.11.2

[Qemu-devel] [PATCH 14/21] target-i386: introduce vendor-override property

[Igor Mammedov]

currently 'cpuid_vendor_override' can be set only via cmd line cpu_model
string. But setting it in 'vendor' property prevents using 'vendor'
property on its own without setting cpuid_vendor_override.

So fix/remove enabling cpuid_vendor_override from "vendor" property setter.
It's up-to cpu_model string parser to maintain legacy behavior when user
overrides vendor on command line.

v2:
  - convert cpuid_vendor_override to bool to reflect its real usage

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 31 +--
 target-i386/cpu.h |  2 +-
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 3952368..cb6ada0 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -893,7 +893,6 @@ static void x86_cpuid_set_vendor(Object *obj, const char 
*value,
 env->cpuid_vendor2 |= ((uint8_t)value[i + 4]) << (8 * i);
 env->cpuid_vendor3 |= ((uint8_t)value[i + 8]) << (8 * i);
 }
-env->cpuid_vendor_override = 1;
 }
 
 static char *x86_cpuid_get_model_id(Object *obj, Error **errp)
@@ -1067,6 +1066,31 @@ static void x86_cpuid_set_enforce(Object *obj, Visitor 
*v, void *opaque,
 object_property_set_bool(obj, value, "check", errp);
 }
 
+static void
+x86_cpuid_get_vendor_override(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+
+visit_type_bool(v, &env->cpuid_vendor_override, name, errp);
+}
+
+static void
+x86_cpuid_set_vendor_override(Object *obj, Visitor *v, void *opaque,
+ const char *name, Error **errp)
+{
+X86CPU *cpu = X86_CPU(obj);
+CPUX86State *env = &cpu->env;
+bool value;
+
+visit_type_bool(v, &value, name, errp);
+if (error_is_set(errp)) {
+return;
+}
+env->cpuid_vendor_override = value;
+}
+
 static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
 {
 CPUX86State *env = &cpu->env;
@@ -1080,7 +1104,7 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, 
Error **errp)
 env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
 env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
 }
-env->cpuid_vendor_override = def->vendor_override;
+object_property_set_bool(OBJECT(cpu), true, "vendor-override", errp);
 object_property_set_int(OBJECT(cpu), def->level, "level", errp);
 object_property_set_int(OBJECT(cpu), def->family, "family", errp);
 object_property_set_int(OBJECT(cpu), def->model, "model", errp);
@@ -2019,6 +2043,9 @@ static void x86_cpu_initfn(Object *obj)
 object_property_add_str(obj, "vendor",
 x86_cpuid_get_vendor,
 x86_cpuid_set_vendor, NULL);
+object_property_add(obj, "vendor-override", "bool",
+x86_cpuid_get_vendor_override,
+x86_cpuid_set_vendor_override, NULL, NULL, NULL);
 object_property_add_str(obj, "model-id",
 x86_cpuid_get_model_id,
 x86_cpuid_set_model_id, NULL);
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 60f9e97..979682a 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -739,7 +739,7 @@ typedef struct CPUX86State {
 uint32_t cpuid_ext2_features;
 uint32_t cpuid_ext3_features;
 uint32_t cpuid_apic_id;
-int cpuid_vendor_override;
+bool cpuid_vendor_override;
 /* Store the results of Centaur's CPUID instructions */
 uint32_t cpuid_xlevel2;
 uint32_t cpuid_ext4_features;
-- 
1.7.11.2

[Qemu-devel] [PATCH 17/21] target-i386: parse cpu_model string into set of stringified properties

[Igor Mammedov]

cpu_model string does represent features in following format:
 ([+-]feat)|(feat=foo)|(feat)
which makes it impossible directly use property infrastructure
to set features on CPU.
This patch introduces parser that splits CPU name from cpu_model and
converts legacy features string into canonized set of strings that
is compatible with property manipulation infrastructure.

PS:
  * later it could be used as a hook to convert legacy command line
features to global properties. Then marked as deprecated and
removed with -cpu option in the future.
  * compiler complains that it's unused function but I guess it is
easier for review this way

Signed-off-by: Igor Mammedov 
---
 target-i386/cpu.c | 52 
 1 file changed, 52 insertions(+)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d24ef84..98b6bbd 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1110,6 +1110,58 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t 
*def, Error **errp)
 env->cpuid_xlevel2 = def->xlevel2;
 }
 
+/* convert legacy cpumodel string to string cpu_name and
+ * a uniforms set of custom features that will be applied to CPU
+ * using object_property_parse()
+ */
+static void compat_normalize_cpu_model(const char *cpu_model, char **cpu_name,
+QDict **features, Error **errp)
+{
+
+char *s = g_strdup(cpu_model);
+char *featurestr, *sptr;
+
+*cpu_name = strtok_r(s, ",", &sptr);
+*features = qdict_new();
+
+featurestr = strtok_r(NULL, ",", &sptr);
+while (featurestr) {
+char *val;
+if (featurestr[0] == '+') {
+/*
+ * preseve legacy behaviour, if feature was disabled once
+ * do not allow to enable it again
+ */
+if (!qdict_haskey(*features, featurestr + 1)) {
+qdict_put(*features, featurestr + 1, qstring_from_str("on"));
+}
+} else if (featurestr[0] == '-') {
+qdict_put(*features, featurestr + 1, qstring_from_str("off"));
+} else {
+val = strchr(featurestr, '=');
+if (val) {
+*val = 0; val++;
+if (!strcmp(featurestr, "vendor")) {
+qdict_put(*features, "vendor-override",
+  qstring_from_str("on"));
+qdict_put(*features, featurestr, qstring_from_str(val));
+} else if (!strcmp(featurestr, "tsc_freq")) {
+qdict_put(*features, "tsc-frequency",
+  qstring_from_str(val));
+} else {
+qdict_put(*features, featurestr, qstring_from_str(val));
+}
+} else {
+qdict_put(*features, featurestr, qstring_from_str("on"));
+}
+}
+
+featurestr = strtok_r(NULL, ",", &sptr);
+}
+
+return;
+}
+
 static int cpu_x86_find_by_name(X86CPU *cpu, x86_def_t *x86_cpu_def,
 const char *cpu_model, Error **errp)
 {
-- 
1.7.11.2

Re: [Qemu-devel] [PATCH 08/21] target-i386: convert 'hv_spinlocks' feature into property

[Igor Mammedov]

On Wed, 15 Aug 2012 17:43:31 -0300
Eduardo Habkost  wrote:

> 
> On 15/08/2012, at 13:13, Igor Mammedov  wrote:
> 
> > Signed-off-by: Igor Mammedov 
> > ---
> > target-i386/cpu.c | 31 +++
> > 1 file changed, 31 insertions(+)
> > 
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 440e724..777b8ce 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -963,6 +963,32 @@ static void x86_cpuid_set_tsc_freq(Object *obj, 
> > Visitor *v, void *opaque,
> > cpu->env.tsc_khz = value / 1000;
> > }
> > 
> > +#if !defined(CONFIG_USER_ONLY)
> > +static void x86_get_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +int64_t value = hyperv_get_spinlock_retries();
> 
> This breaks build if compiling without KVM support, as 
> hyperv_get_spinlock_retries() is available only if CONFIG_KVM is set 
> (hyperv_set_spinlock_retries(), on the other hand, is defined as an empty 
> function if CONFIG_KVM is not set).
Fixed by 
https://github.com/imammedo/qemu/commit/3172153a73c6912bd90a7226a0343c6601ed1d04
on x86-cpu-properties.WIP branch.

Thanks,
  Igor
> 
> > +
> > +visit_type_int(v, &value, name, errp);
> > +}
> > +
> > +static void x86_set_hv_spinlocks(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +int64_t value;
> > +
> > +visit_type_int(v, &value, name, errp);
> > +if (error_is_set(errp)) {
> > +return;
> > +}
> > +if (!value) {
> > +error_set(errp, QERR_PROPERTY_VALUE_BAD, "", name, "0");
> > +return;
> > +}
> > +hyperv_set_spinlock_retries(value);
> > +}
> > +#endif
> > +
> > static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp)
> > {
> > CPUX86State *env = &cpu->env;
> > @@ -1919,6 +1945,11 @@ static void x86_cpu_initfn(Object *obj)
> > object_property_add(obj, "tsc-frequency", "int",
> > x86_cpuid_get_tsc_freq,
> > x86_cpuid_set_tsc_freq, NULL, NULL, NULL);
> > +#if !defined(CONFIG_USER_ONLY)
> > +object_property_add(obj, "hv_spinlocks", "int",
> > +x86_get_hv_spinlocks,
> > +x86_set_hv_spinlocks, NULL, NULL, NULL);
> > +#endif
> > x86_register_cpuid_properties(obj, feature_name);
> > x86_register_cpuid_properties(obj, ext_feature_name);
> > x86_register_cpuid_properties(obj, ext2_feature_name);
> > -- 
> > 1.7.11.2
> > 
> 
> -- 
> Eduardo   
> 
> 

[Qemu-devel] [PATCH 0/5 v2] cpu: make a child of DeviceState

[Igor Mammedov]

this is th 3rd approach to make CPU a child of DeviceState
for both kinds of targets *-user and *-softmmu. It seems
with current state of qemu it doesn't take too much effort
to make it compile. Please check if it doesn't break
something on other targets/archs/hosts than i386.

what's tested:
  - compile tested building all targets on FC17x64 host.
  - briefly tested i386 user and softmmu targets

Anthony Liguori (1):
  qdev: split up header so it can be used in cpu.h

Igor Mammedov (4):
  move qemu_irq typedef out of cpu-common.h
  qapi-types.h doesn't really need to include qemu-common.h
  cleanup error.h, included qapi-types.h aready has stdbool.h
  make CPU a child of DeviceState

 error.h   |1 -
 hw/arm-misc.h |1 +
 hw/bt.h   |2 +
 hw/devices.h  |2 +
 hw/irq.h  |2 +
 hw/mc146818rtc.c  |1 +
 hw/omap.h |1 +
 hw/qdev-addr.c|1 +
 hw/qdev-core.h|  240 
 hw/qdev-monitor.h |   16 ++
 hw/qdev-properties.c  |1 +
 hw/qdev-properties.h  |  128 +
 hw/qdev.c |1 +
 hw/qdev.h |  371 +
 hw/soc_dma.h  |1 +
 hw/xen.h  |1 +
 include/qemu/cpu.h|6 +-
 qemu-common.h |1 -
 scripts/qapi-types.py |2 +-
 sysemu.h  |1 +
 20 files changed, 407 insertions(+), 373 deletions(-)
 create mode 100644 hw/qdev-core.h
 create mode 100644 hw/qdev-monitor.h
 create mode 100644 hw/qdev-properties.h

[Qemu-devel] [PATCH 1/5] move qemu_irq typedef out of cpu-common.h

[Igor Mammedov]

it's necessary for making CPU child of DEVICE without
causing circular header deps.

Signed-off-by: Igor Mammedov 
---
 hw/arm-misc.h |1 +
 hw/bt.h   |2 ++
 hw/devices.h  |2 ++
 hw/irq.h  |2 ++
 hw/omap.h |1 +
 hw/soc_dma.h  |1 +
 hw/xen.h  |1 +
 qemu-common.h |1 -
 sysemu.h  |1 +
 9 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index bdd8fec..b13aa59 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -12,6 +12,7 @@
 #define ARM_MISC_H 1
 
 #include "memory.h"
+#include "hw/irq.h"
 
 /* The CPU is also modeled as an interrupt controller.  */
 #define ARM_PIC_CPU_IRQ 0
diff --git a/hw/bt.h b/hw/bt.h
index a48b8d4..ebf6a37 100644
--- a/hw/bt.h
+++ b/hw/bt.h
@@ -23,6 +23,8 @@
  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 
+#include "hw/irq.h"
+
 /* BD Address */
 typedef struct {
 uint8_t b[6];
diff --git a/hw/devices.h b/hw/devices.h
index 1a55c1e..c60bcab 100644
--- a/hw/devices.h
+++ b/hw/devices.h
@@ -1,6 +1,8 @@
 #ifndef QEMU_DEVICES_H
 #define QEMU_DEVICES_H
 
+#include "hw/irq.h"
+
 /* ??? Not all users of this file can include cpu-common.h.  */
 struct MemoryRegion;
 
diff --git a/hw/irq.h b/hw/irq.h
index 56c55f0..1339a3a 100644
--- a/hw/irq.h
+++ b/hw/irq.h
@@ -3,6 +3,8 @@
 
 /* Generic IRQ/GPIO pin infrastructure.  */
 
+typedef struct IRQState *qemu_irq;
+
 typedef void (*qemu_irq_handler)(void *opaque, int n, int level);
 
 void qemu_set_irq(qemu_irq irq, int level);
diff --git a/hw/omap.h b/hw/omap.h
index 413851b..8b08462 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -19,6 +19,7 @@
 #ifndef hw_omap_h
 #include "memory.h"
 # define hw_omap_h "omap.h"
+#include "hw/irq.h"
 
 # define OMAP_EMIFS_BASE   0x
 # define OMAP2_Q0_BASE 0x
diff --git a/hw/soc_dma.h b/hw/soc_dma.h
index 904b26c..e386ace 100644
--- a/hw/soc_dma.h
+++ b/hw/soc_dma.h
@@ -19,6 +19,7 @@
  */
 
 #include "memory.h"
+#include "hw/irq.h"
 
 struct soc_dma_s;
 struct soc_dma_ch_s;
diff --git a/hw/xen.h b/hw/xen.h
index e5926b7..ff11dfd 100644
--- a/hw/xen.h
+++ b/hw/xen.h
@@ -8,6 +8,7 @@
  */
 #include 
 
+#include "hw/irq.h"
 #include "qemu-common.h"
 
 /* xen-machine.c */
diff --git a/qemu-common.h b/qemu-common.h
index e5c2bcd..6677a30 100644
--- a/qemu-common.h
+++ b/qemu-common.h
@@ -273,7 +273,6 @@ typedef struct PCIEPort PCIEPort;
 typedef struct PCIESlot PCIESlot;
 typedef struct MSIMessage MSIMessage;
 typedef struct SerialState SerialState;
-typedef struct IRQState *qemu_irq;
 typedef struct PCMCIACardState PCMCIACardState;
 typedef struct MouseTransformInfo MouseTransformInfo;
 typedef struct uWireSlave uWireSlave;
diff --git a/sysemu.h b/sysemu.h
index 65552ac..f765821 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -9,6 +9,7 @@
 #include "qapi-types.h"
 #include "notify.h"
 #include "main-loop.h"
+#include "hw/irq.h"
 
 /* vl.c */
 
-- 
1.7.1

[Qemu-devel] [PATCH 4/5] cleanup error.h, included qapi-types.h aready has stdbool.h

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 error.h |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/error.h b/error.h
index 96fc203..643a372 100644
--- a/error.h
+++ b/error.h
@@ -14,7 +14,6 @@
 
 #include "compiler.h"
 #include "qapi-types.h"
-#include 
 
 /**
  * A class representing internal errors within QEMU.  An error has a ErrorClass
-- 
1.7.1

[Qemu-devel] [PATCH 5/5] make CPU a child of DeviceState

[Igor Mammedov]

Signed-off-by: Igor Mammedov 
---
 include/qemu/cpu.h |6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
index ad706a6..ac44057 100644
--- a/include/qemu/cpu.h
+++ b/include/qemu/cpu.h
@@ -20,7 +20,7 @@
 #ifndef QEMU_CPU_H
 #define QEMU_CPU_H
 
-#include "qemu/object.h"
+#include "hw/qdev-core.h"
 #include "qemu-thread.h"
 
 /**
@@ -46,7 +46,7 @@ typedef struct CPUState CPUState;
  */
 typedef struct CPUClass {
 /*< private >*/
-ObjectClass parent_class;
+DeviceClass parent_class;
 /*< public >*/
 
 void (*reset)(CPUState *cpu);
@@ -59,7 +59,7 @@ typedef struct CPUClass {
  */
 struct CPUState {
 /*< private >*/
-Object parent_obj;
+DeviceState parent_obj;
 /*< public >*/
 
 struct QemuThread *thread;
-- 
1.7.1

[Qemu-devel] [PATCH 3/5] qapi-types.h doesn't really need to include qemu-common.h

[Igor Mammedov]

needed to prevent build breakage when CPU becomes a child of DeviceState

Signed-off-by: Igor Mammedov 
---
 scripts/qapi-types.py |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/scripts/qapi-types.py b/scripts/qapi-types.py
index cf601ae..f34addb 100644
--- a/scripts/qapi-types.py
+++ b/scripts/qapi-types.py
@@ -263,7 +263,7 @@ fdecl.write(mcgen('''
 #ifndef %(guard)s
 #define %(guard)s
 
-#include "qemu-common.h"
+#include 
 
 ''',
   guard=guardname(h_file)))
-- 
1.7.1

[Qemu-devel] [PATCH 2/5] qdev: split up header so it can be used in cpu.h

[Igor Mammedov]

From: Anthony Liguori 

Header file dependency is a frickin' nightmare right now.  cpu.h tends to get
included in our 'include everything' header files but qdev also needs to include
those headers mainly for qdev-properties since it knows about CharDriverState
and friends.

We can solve this for now by splitting out qdev.h along the same lines that we
previously split the C file.  Then cpu.h just needs to include qdev-core.h

v1->v2:
  move qemu_irq typedef out of this patch into a separate one with an additional
  cleanup of headers to fix build breakage

Signed-off-by: Anthony Liguori 
Signed-off-by: Igor Mammedov 
---
 hw/mc146818rtc.c |1 +
 hw/qdev-addr.c   |1 +
 hw/qdev-core.h   |  240 
 hw/qdev-monitor.h|   16 ++
 hw/qdev-properties.c |1 +
 hw/qdev-properties.h |  128 +
 hw/qdev.c|1 +
 hw/qdev.h|  371 +-
 8 files changed, 392 insertions(+), 367 deletions(-)
 create mode 100644 hw/qdev-core.h
 create mode 100644 hw/qdev-monitor.h
 create mode 100644 hw/qdev-properties.h

diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 3777f85..3780617 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -25,6 +25,7 @@
 #include "qemu-timer.h"
 #include "sysemu.h"
 #include "mc146818rtc.h"
+#include "qapi/qapi-visit-core.h"
 
 #ifdef TARGET_I386
 #include "apic.h"
diff --git a/hw/qdev-addr.c b/hw/qdev-addr.c
index b711b6b..5b5d38f 100644
--- a/hw/qdev-addr.c
+++ b/hw/qdev-addr.c
@@ -1,6 +1,7 @@
 #include "qdev.h"
 #include "qdev-addr.h"
 #include "targphys.h"
+#include "qapi/qapi-visit-core.h"
 
 /* --- target physical address --- */
 
diff --git a/hw/qdev-core.h b/hw/qdev-core.h
new file mode 100644
index 000..ca205fc
--- /dev/null
+++ b/hw/qdev-core.h
@@ -0,0 +1,240 @@
+#ifndef QDEV_CORE_H
+#define QDEV_CORE_H
+
+#include "qemu-queue.h"
+#include "qemu-option.h"
+#include "qemu/object.h"
+#include "hw/irq.h"
+#include "error.h"
+
+typedef struct Property Property;
+
+typedef struct PropertyInfo PropertyInfo;
+
+typedef struct CompatProperty CompatProperty;
+
+typedef struct BusState BusState;
+
+typedef struct BusClass BusClass;
+
+enum DevState {
+DEV_STATE_CREATED = 1,
+DEV_STATE_INITIALIZED,
+};
+
+enum {
+DEV_NVECTORS_UNSPECIFIED = -1,
+};
+
+#define TYPE_DEVICE "device"
+#define DEVICE(obj) OBJECT_CHECK(DeviceState, (obj), TYPE_DEVICE)
+#define DEVICE_CLASS(klass) OBJECT_CLASS_CHECK(DeviceClass, (klass), 
TYPE_DEVICE)
+#define DEVICE_GET_CLASS(obj) OBJECT_GET_CLASS(DeviceClass, (obj), TYPE_DEVICE)
+
+typedef int (*qdev_initfn)(DeviceState *dev);
+typedef int (*qdev_event)(DeviceState *dev);
+typedef void (*qdev_resetfn)(DeviceState *dev);
+
+struct VMStateDescription;
+
+typedef struct DeviceClass {
+ObjectClass parent_class;
+
+const char *fw_name;
+const char *desc;
+Property *props;
+int no_user;
+
+/* callbacks */
+void (*reset)(DeviceState *dev);
+
+/* device state */
+const struct VMStateDescription *vmsd;
+
+/* Private to qdev / bus.  */
+qdev_initfn init;
+qdev_event unplug;
+qdev_event exit;
+const char *bus_type;
+} DeviceClass;
+
+/* This structure should not be accessed directly.  We declare it here
+   so that it can be embedded in individual device state structures.  */
+struct DeviceState {
+Object parent_obj;
+
+const char *id;
+enum DevState state;
+struct QemuOpts *opts;
+int hotplugged;
+BusState *parent_bus;
+int num_gpio_out;
+qemu_irq *gpio_out;
+int num_gpio_in;
+qemu_irq *gpio_in;
+QLIST_HEAD(, BusState) child_bus;
+int num_child_bus;
+int instance_id_alias;
+int alias_required_for_version;
+};
+
+/*
+ * This callback is used to create Open Firmware device path in accordance with
+ * OF spec http://forthworks.com/standards/of1275.pdf. Indicidual bus bindings
+ * can be found here http://playground.sun.com/1275/bindings/.
+ */
+
+#define TYPE_BUS "bus"
+#define BUS(obj) OBJECT_CHECK(BusState, (obj), TYPE_BUS)
+#define BUS_CLASS(klass) OBJECT_CLASS_CHECK(BusClass, (klass), TYPE_BUS)
+#define BUS_GET_CLASS(obj) OBJECT_GET_CLASS(BusClass, (obj), TYPE_BUS)
+
+struct BusClass {
+ObjectClass parent_class;
+
+/* FIXME first arg should be BusState */
+void (*print_dev)(Monitor *mon, DeviceState *dev, int indent);
+char *(*get_dev_path)(DeviceState *dev);
+char *(*get_fw_dev_path)(DeviceState *dev);
+int (*reset)(BusState *bus);
+};
+
+typedef struct BusChild {
+DeviceState *child;
+int index;
+QTAILQ_ENTRY(BusChild) sibling;
+} BusChild;
+
+/**
+ * BusState:
+ * @qom_allocated: Indicates whether the object was allocated by QOM.
+ * @glib_allocated: Indicates whether the object was initialized i

Re: [Qemu-devel] [PATCH 1/5] move qemu_irq typedef out of cpu-common.h

[Igor Mammedov]

On Mon, 20 Aug 2012 06:41:04 +0200
Stefan Weil  wrote:

> Am 20.08.2012 01:39, schrieb Igor Mammedov:
> > it's necessary for making CPU child of DEVICE without
> > causing circular header deps.
> >
> > Signed-off-by: Igor Mammedov 
> > ---
> >   hw/arm-misc.h |1 +
> >   hw/bt.h   |2 ++
> >   hw/devices.h  |2 ++
> >   hw/irq.h  |2 ++
> >   hw/omap.h |1 +
> >   hw/soc_dma.h  |1 +
> >   hw/xen.h  |1 +
> >   qemu-common.h |1 -
> >   sysemu.h  |1 +
> >   9 files changed, 11 insertions(+), 1 deletions(-)
> >
> > diff --git a/hw/arm-misc.h b/hw/arm-misc.h
> > index bdd8fec..b13aa59 100644
> > --- a/hw/arm-misc.h
> > +++ b/hw/arm-misc.h
> > @@ -12,6 +12,7 @@
> >   #define ARM_MISC_H 1
> >   
> >   #include "memory.h"
> > +#include "hw/irq.h"
> >   
> >   /* The CPU is also modeled as an interrupt controller.  */
> >   #define ARM_PIC_CPU_IRQ 0
> > diff --git a/hw/bt.h b/hw/bt.h
> > index a48b8d4..ebf6a37 100644
> > --- a/hw/bt.h
> > +++ b/hw/bt.h
> > @@ -23,6 +23,8 @@
> >* along with this program; if not, see <http://www.gnu.org/licenses/>.
> >*/
> >   
> > +#include "hw/irq.h"
> > +
> >   /* BD Address */
> >   typedef struct {
> >   uint8_t b[6];
> > diff --git a/hw/devices.h b/hw/devices.h
> > index 1a55c1e..c60bcab 100644
> > --- a/hw/devices.h
> > +++ b/hw/devices.h
> > @@ -1,6 +1,8 @@
> >   #ifndef QEMU_DEVICES_H
> >   #define QEMU_DEVICES_H
> >   
> > +#include "hw/irq.h"
> > +
> >   /* ??? Not all users of this file can include cpu-common.h.  */
> >   struct MemoryRegion;
> >   
> > diff --git a/hw/irq.h b/hw/irq.h
> > index 56c55f0..1339a3a 100644
> > --- a/hw/irq.h
> > +++ b/hw/irq.h
> > @@ -3,6 +3,8 @@
> >   
> >   /* Generic IRQ/GPIO pin infrastructure.  */
> >   
> > +typedef struct IRQState *qemu_irq;
> > +
> >   typedef void (*qemu_irq_handler)(void *opaque, int n, int level);
> >   
> >   void qemu_set_irq(qemu_irq irq, int level);
> > diff --git a/hw/omap.h b/hw/omap.h
> > index 413851b..8b08462 100644
> > --- a/hw/omap.h
> > +++ b/hw/omap.h
> > @@ -19,6 +19,7 @@
> >   #ifndef hw_omap_h
> >   #include "memory.h"
> >   # define hw_omap_h"omap.h"
> > +#include "hw/irq.h"
> >   
> >   # define OMAP_EMIFS_BASE  0x
> >   # define OMAP2_Q0_BASE0x
> > diff --git a/hw/soc_dma.h b/hw/soc_dma.h
> > index 904b26c..e386ace 100644
> > --- a/hw/soc_dma.h
> > +++ b/hw/soc_dma.h
> > @@ -19,6 +19,7 @@
> >*/
> >   
> >   #include "memory.h"
> > +#include "hw/irq.h"
> >   
> >   struct soc_dma_s;
> >   struct soc_dma_ch_s;
> > diff --git a/hw/xen.h b/hw/xen.h
> > index e5926b7..ff11dfd 100644
> > --- a/hw/xen.h
> > +++ b/hw/xen.h
> > @@ -8,6 +8,7 @@
> >*/
> >   #include 
> >   
> > +#include "hw/irq.h"
> >   #include "qemu-common.h"
> >   
> >   /* xen-machine.c */
> > diff --git a/qemu-common.h b/qemu-common.h
> > index e5c2bcd..6677a30 100644
> > --- a/qemu-common.h
> > +++ b/qemu-common.h
> > @@ -273,7 +273,6 @@ typedef struct PCIEPort PCIEPort;
> >   typedef struct PCIESlot PCIESlot;
> >   typedef struct MSIMessage MSIMessage;
> >   typedef struct SerialState SerialState;
> > -typedef struct IRQState *qemu_irq;
> >   typedef struct PCMCIACardState PCMCIACardState;
> >   typedef struct MouseTransformInfo MouseTransformInfo;
> >   typedef struct uWireSlave uWireSlave;
> 
> Just move the declaration of qemu_irq to the beginning of qemu-common.h
> and leave the rest of files untouched. That also fixes the circular 
> dependency.
> 
> I already have a patch that does this, so you can integrate it in your 
> series
> instead of this one.
No doubt it's more simpler way, but IMHO It's more of a hack than fixing
problem.
It works for now but doesn't alleviate problem with header nightmare in qemu,
where everything is included in qemu-common.h and everything includes it as
well.

Any way if majority prefer simple move, I'll drop this patch in favor of yours.
 
> 
> 
> > diff --git a/sysemu.h b/sysemu.h
> > index 65552ac..f765821 100644
> > --- a/sysemu.h
> > +++ b/sysemu.h
> > @@ -9,6 +9,7 @@
> >   #include "qapi-types.h"
> >   #include "notify.h"
> >   #include "main-loop.h"
> > +#include "hw/irq.h"
> >   
> >   /* vl.c */
> >   
> 


-- 
Regards,
  Igor

Re: [Qemu-devel] [PATCH 0/5 v2] cpu: make a child of DeviceState

[Igor Mammedov]

On Mon, 20 Aug 2012 06:52:51 +0200
Stefan Weil  wrote:

> Am 20.08.2012 01:39, schrieb Igor Mammedov:
> > this is th 3rd approach to make CPU a child of DeviceState
> > for both kinds of targets *-user and *-softmmu. It seems
> > with current state of qemu it doesn't take too much effort
> > to make it compile. Please check if it doesn't break
> > something on other targets/archs/hosts than i386.
> >
> > what's tested:
> >- compile tested building all targets on FC17x64 host.
> >- briefly tested i386 user and softmmu targets
> >
> > Anthony Liguori (1):
> >qdev: split up header so it can be used in cpu.h
> >
> > Igor Mammedov (4):
> >move qemu_irq typedef out of cpu-common.h
> >qapi-types.h doesn't really need to include qemu-common.h
> >cleanup error.h, included qapi-types.h aready has stdbool.h
> >make CPU a child of DeviceState
> >
> >   error.h   |1 -
> >   hw/arm-misc.h |1 +
> >   hw/bt.h   |2 +
> >   hw/devices.h  |2 +
> >   hw/irq.h  |2 +
> >   hw/mc146818rtc.c  |1 +
> >   hw/omap.h |1 +
> >   hw/qdev-addr.c|1 +
> >   hw/qdev-core.h|  240 
> >   hw/qdev-monitor.h |   16 ++
> >   hw/qdev-properties.c  |1 +
> >   hw/qdev-properties.h  |  128 +
> >   hw/qdev.c |1 +
> >   hw/qdev.h |  371 
> > +
> >   hw/soc_dma.h  |1 +
> >   hw/xen.h  |1 +
> >   include/qemu/cpu.h|6 +-
> >   qemu-common.h |1 -
> >   scripts/qapi-types.py |2 +-
> >   sysemu.h  |1 +
> >   20 files changed, 407 insertions(+), 373 deletions(-)
> >   create mode 100644 hw/qdev-core.h
> >   create mode 100644 hw/qdev-monitor.h
> >   create mode 100644 hw/qdev-properties.h
> >
> 
> I'd prefer if you could keep the following simple pattern:
> 
> * Start includes in *.c files with config.h (optionally)
>and qemu-common.h.
Can't agree with you on this. I'd say that every header should be be self
sufficient, include other headers if it uses types from them and NOT depend on
the position where it's included, it should provide all its own deps.

> 
> * Don't include standard include files which are already
>included in qemu-common.h
Probably initially qemu-common.h was intended to simplify inclusion
of standard headers and glue stuff in multi-os build environment. but it seems
to be become misused. It includes now a lot of stuff that is not common to
every file it's included in.
Perhaps we should split out of it std includes and glue layer into something
like std/host-common.h and case on case basis move out other type
definitions that are not common into there appropriate places. Like with
qemu_irq.

> 
> * Don't include qemu-common.h in *.h files.
I'm all for it. But it's difficult right now because it tends to be included
in a lot of headers that don't really need it and then other headers happens
to depend on previous inclusion of it. It's difficult to untangle this in one
take, but could be possible in small steps.

[1/1] is a direction that could be used to put type custom types in their
proper places. It would be better way long term and help to avoid problems
with including one header in another. 

> 
> Regards,
> 
> Stefan Weil
> 


-- 
Regards,
  Igor

Re: [Qemu-devel] [RFC 2/6] i386: kill cpudef config section support

[Igor Mammedov]

ot;)) {
> -setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
> -} else if (!strcmp(name, "extfeature_ecx")) {
> -setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
> -} else if (!strcmp(name, "xlevel")) {
> -setscalar(&def->xlevel, str, &err)
> -} else {
> -fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
> -return (1);
> -}
> -if (err) {
> -fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
> -return (1);
> -}
> -return (0);
> -}
> -
> -/* register config file entry as x86_def_t
> - */
> -static int cpudef_register(QemuOpts *opts, void *opaque)
> -{
> -x86_def_t *def = g_malloc0(sizeof (x86_def_t));
> -
> -qemu_opt_foreach(opts, cpudef_setfield, def, 1);
> -def->next = x86_defs;
> -x86_defs = def;
> -return (0);
> -}
> -
>  void cpu_clear_apic_feature(CPUX86State *env)
>  {
>  env->cpuid_features &= ~CPUID_APIC;
> @@ -1491,8 +1399,7 @@ void cpu_clear_apic_feature(CPUX86State *env)
>  
>  #endif /* !CONFIG_USER_ONLY */
>  
> -/* register "cpudef" models defined in configuration file.  Here we first
> - * preload any built-in definitions
> +/* Initialize list of CPU models, filling some non-static fields if necessary
>   */
>  void x86_cpudef_setup(void)
>  {
> @@ -1502,7 +1409,6 @@ void x86_cpudef_setup(void)
>  for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
>  x86_def_t *def = &builtin_x86_defs[i];
>  def->next = x86_defs;
> -def->flags = 1;
>  
>  /* Look for specific "cpudef" models that */
>  /* have the QEMU version in .model_id */
> @@ -1518,9 +1424,6 @@ void x86_cpudef_setup(void)
>  
>  x86_defs = def;
>  }
> -#if !defined(CONFIG_USER_ONLY)
> -qemu_opts_foreach(qemu_find_opts("cpudef"), cpudef_register, NULL, 0);
> -#endif
>  }
>  
>  static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
> -- 
> 1.7.11.2
> 
> 


-- 
Regards,
  Igor

Re: [Qemu-devel] [RFC 0/6] i386: CPU: remove duplicate feature names

[Igor Mammedov]

On Fri, 17 Aug 2012 14:53:36 -0300
Eduardo Habkost  wrote:

> The problem:
> 
>  - Some features are report at the same time on both CPUID[1].EDX and
>CPUID[8000_0001].EDX on AMD CPUs (e.g. fpu, tsc, msr, pae, mmx).
>  - "-cpu ,+feature" should enable the bit only on CPUID[1] if
>it's not an AMD CPU, but it should enable the bit on both CPUID[1] and
>CPUID[8000_0001] if it's an AMD CPU.
>  - The same should happen when implementing CPU properties: setting the
>property that enables a feature should set the duplicate 
> CPUID[8000_0001].EDX
>bit only if CPU vendor is AMD.
> 
> Reference: http://article.gmane.org/gmane.comp.emulators.qemu/166024
> 
> The solution implemented by this series is:
>  - On the CPU model table and while parsing CPU options/properties, set the 
> bit
>only on CPUID[1] (the x86_def_t.features field).
>  - When finishing initialization of the CPU cpuid fields, duplicate those
>feature bits on cpuid_ext2_features if and only if the CPU vendor is AMD.
> 
> This series also removes the "cpudef" config support, to make this work easier
> (because the cpudef interface is based on low-level CPUID leaf+register
> specification, instead of a set of higher-level per-feature object 
> properties).
> 
> Eduardo Habkost (6):
>   x86_cpudef_setup: coding style change
>   i386: kill cpudef config section support

>   i386: kvm: bit 10 of CPUID[8000_0001].EDX is reserved
>   i386: kvm: use a #define for the set of alias feature bits
>   i386: cpu: eliminate duplicate feature names
above 3 patches should go before cpu properties

>   i386: -cpu help: remove reference to specific CPUID leaves/registers
> 
>  target-i386/cpu.c | 153 
> +-
>  target-i386/cpu.h |  12 +
>  target-i386/kvm.c |   2 +-
>  3 files changed, 50 insertions(+), 117 deletions(-)
> 
> -- 
> 1.7.11.2
> 
> 


-- 
Regards,
  Igor

Re: [Qemu-devel] [PATCH 07/21] target-i386: convert cpuid features into properties

[Igor Mammedov]

On Thu, 16 Aug 2012 15:10:50 -0300
Eduardo Habkost  wrote:

> On Wed, Aug 15, 2012 at 06:13:27PM +0200, Igor Mammedov wrote:
> > Signed-off-by: Igor Mammedov 
> > --
> > v2:
> >   * replaced mask/ffs tricks by plain 'for (bit = 0; bit < 32; bit++)'
> > as suggested by Eduardo Habkost
> > ---
> >  target-i386/cpu.c | 101 
> > ++
> >  1 file changed, 101 insertions(+)
> > 
> > diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> > index 37ba5ef..440e724 100644
> > --- a/target-i386/cpu.c
> > +++ b/target-i386/cpu.c
> > @@ -606,6 +606,101 @@ static int check_features_against_host(x86_def_t 
> > *guest_def)
> >  return rv;
> >  }
> >  
> > +static bool is_feature_set(const char *name, const uint32_t featbitmap,
> > +  const char **featureset)
> > +{
> > +uint32_t bit;
> > +
> > +for (bit = 0; bit < 32; ++bit) {
> > +if (featureset[bit] && !altcmp(name, NULL, featureset[bit])) {
> > +if (featbitmap & (1 << bit)) {
> > +return true;
> > +}
> > +}
> > +}
> > +return false;
> > +}
> > +
> > +static void x86_cpuid_get_feature(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +X86CPU *cpu = X86_CPU(obj);
> > +CPUX86State *env = &cpu->env;
> > +bool value = true;
> > +
> > +if (!is_feature_set(name, env->cpuid_features, feature_name) &&
> > +   !is_feature_set(name, env->cpuid_ext_features, ext_feature_name) &&
> > +   !is_feature_set(name, env->cpuid_ext2_features, ext2_feature_name) 
> > &&
> > +   !is_feature_set(name, env->cpuid_ext3_features, ext3_feature_name) 
> > &&
> > +   !is_feature_set(name, env->cpuid_kvm_features, kvm_feature_name) &&
> > +   !is_feature_set(name, env->cpuid_svm_features, svm_feature_name)) {
> > +value = false;
> > +}
> > +
> > +visit_type_bool(v, &value, name, errp);
> > +}
> > +
> > +static void x86_cpuid_set_feature(Object *obj, Visitor *v, void *opaque,
> > + const char *name, Error **errp)
> > +{
> > +X86CPU *cpu = X86_CPU(obj);
> > +CPUX86State *env = &cpu->env;
> > +uint32_t mask = 0;
> > +uint32_t *dst_features;
> > +bool value;
> > +
> > +visit_type_bool(v, &value, name, errp);
> > +if (error_is_set(errp)) {
> > +return;
> > +}
> > +
> > +if (lookup_feature(&mask, name, NULL, feature_name)) {
> > +dst_features = &env->cpuid_features;
> > +} else if (lookup_feature(&mask, name, NULL, ext_feature_name)) {
> > +dst_features = &env->cpuid_ext_features;
> > +} else if (lookup_feature(&mask, name, NULL, ext2_feature_name)) {
> > +dst_features = &env->cpuid_ext2_features;
> > +} else if (lookup_feature(&mask, name, NULL, ext3_feature_name)) {
> > +dst_features = &env->cpuid_ext3_features;
> > +} else if (lookup_feature(&mask, name, NULL, kvm_feature_name)) {
> > +dst_features = &env->cpuid_kvm_features;
> > +} else if (lookup_feature(&mask, name, NULL, svm_feature_name)) {
> > +dst_features = &env->cpuid_svm_features;
> > +} else {
> > +error_set(errp, QERR_PROPERTY_NOT_FOUND, "", name);
> > +return;
> > +}
> 
> Some feature names are duplicated on feature_names and
> ext_feature_names. On AMD CPU models, we have to set both, on Intel
> models we need to set the bits only on cpuid_features.
> 
> Maybe it's better to:
> 
> 1) eliminate the duplication and set the names only on feature_name
>array;
> 2) At the end of CPU initialization, set the features on
>cpuid_ext2_features as copies of the corresponding cpuid_features
>bits if CPU vendor == AMD (or, maybe, if some boolean
>"ext2_features_aliases" flag is set, to make it not
>vendor-dependent).

So far I was trying to keep original behavior and keep scope of this series
only on moving CPU features into properties. I'll rebase this series on top
of what you proposed in a week when I'm back from vacation.
 
> 
> > +
> > +if (value) {
> > +