[PULL 19/26] target/ppc: powerpc_excp: Add excp_vectors bounds check
From: Fabiano Rosas
The next patch will start accessing the excp_vectors array earlier in
the function, so add a bounds check as first thing here.
This converts the empty return on POWERPC_EXCP_NONE to an error. This
exception number never reaches this function and if it does it
probably means something else went wrong up the line.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Reviewed-by: Richard Henderson
Reviewed-by: David Gibson
Message-Id: <20211229165751.3774248-3-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/excp_helper.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index c7efbdc3051b..9e7c428821e1 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -372,6 +372,10 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp_model,
int excp)
target_ulong msr, new_msr, vector;
int srr0, srr1, lev = -1;
+if (excp <= POWERPC_EXCP_NONE || excp >= POWERPC_EXCP_NB) {
+cpu_abort(cs, "Invalid PowerPC exception %d. Aborting\n", excp);
+}
+
qemu_log_mask(CPU_LOG_INT, "Raise exception at " TARGET_FMT_lx
" => %s (%d) error=%02x\n", env->nip,
powerpc_excp_name(excp),
excp, env->error_code);
@@ -426,9 +430,6 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp_model,
int excp)
#endif
switch (excp) {
-case POWERPC_EXCP_NONE:
-/* Should never happen */
-return;
case POWERPC_EXCP_CRITICAL:/* Critical input */
switch (excp_model) {
case POWERPC_EXCP_40x:
--
2.31.1
[PULL 21/26] target/ppc: powerpc_excp: Move system call vectored code together
From: Fabiano Rosas
Now that 'vector' is known before calling the interrupt-specific setup
code, we can move all of the scv setup into one place.
No functional change intended.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Reviewed-by: Richard Henderson
Message-Id: <20211229165751.3774248-5-faro...@linux.ibm.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/excp_helper.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 35ac450590f5..2c20a8060cf9 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -623,6 +623,11 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp_model,
int excp)
env->nip += 4;
new_msr |= env->msr & ((target_ulong)1 << MSR_EE);
new_msr |= env->msr & ((target_ulong)1 << MSR_RI);
+
+vector += lev * 0x20;
+
+env->lr = env->nip;
+env->ctr = msr;
break;
case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
@@ -936,14 +941,6 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp_model,
int excp)
/* Save MSR */
env->spr[srr1] = msr;
-
-#if defined(TARGET_PPC64)
-} else {
-vector += lev * 0x20;
-
-env->lr = env->nip;
-env->ctr = msr;
-#endif
}
/* This can update new_msr and vector if AIL applies */
--
2.31.1
[PULL 17/26] target/ppc: do not silence snan in xscvspdpn
From: Matheus Ferst
The non-signalling versions of VSX scalar convert to shorter/longer
precision insns doesn't silence SNaNs in the hardware. To better match
this behavior, use the non-arithmatic conversion of helper_todouble
instead of float32_to_float64. A test is added to prevent future
regressions.
Signed-off-by: Matheus Ferst
Message-Id: <20211228120310.1957990-1-matheus.fe...@eldorado.org.br>
Signed-off-by: Cédric Le Goater
---
target/ppc/fpu_helper.c | 5 +---
tests/tcg/ppc64le/non_signalling_xscv.c | 37 +
tests/tcg/ppc64/Makefile.target | 4 +--
tests/tcg/ppc64le/Makefile.target | 4 +--
4 files changed, 42 insertions(+), 8 deletions(-)
create mode 100644 tests/tcg/ppc64le/non_signalling_xscv.c
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 700c79156b06..e5c29b53b8b5 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2816,10 +2816,7 @@ uint64_t helper_xscvdpspn(CPUPPCState *env, uint64_t xb)
uint64_t helper_xscvspdpn(CPUPPCState *env, uint64_t xb)
{
-float_status tstat = env->fp_status;
-set_float_exception_flags(0, &tstat);
-
-return float32_to_float64(xb >> 32, &tstat);
+return helper_todouble(xb >> 32);
}
/*
diff --git a/tests/tcg/ppc64le/non_signalling_xscv.c
b/tests/tcg/ppc64le/non_signalling_xscv.c
new file mode 100644
index ..91e25cad4681
--- /dev/null
+++ b/tests/tcg/ppc64le/non_signalling_xscv.c
@@ -0,0 +1,37 @@
+#include
+#include
+#include
+#include
+
+#define TEST(INSN, B_HI, B_LO, T_HI, T_LO) \
+do {\
+uint64_t th, tl, bh = B_HI, bl = B_LO; \
+asm("mtvsrd 0, %2\n\t" \
+"mtvsrd 1, %3\n\t" \
+"xxmrghd 0, 0, 1\n\t" \
+INSN " 0, 0\n\t"\
+"mfvsrd %0, 0\n\t" \
+"xxswapd 0, 0\n\t" \
+"mfvsrd %1, 0\n\t" \
+: "=r" (th), "=r" (tl) \
+: "r" (bh), "r" (bl)\
+: "vs0", "vs1");\
+printf(INSN "(0x%016" PRIx64 "%016" PRIx64 ") = 0x%016" PRIx64 \
+ "%016" PRIx64 "\n", bh, bl, th, tl); \
+assert(th == T_HI && tl == T_LO); \
+} while (0)
+
+int main(void)
+{
+/* SNaN shouldn't be silenced */
+TEST("xscvspdpn", 0x7fbfULL, 0x0, 0x7ff7e000ULL, 0x0);
+TEST("xscvdpspn", 0x7ff7ULL, 0x0, 0x7fbf7fbfULL, 0x0);
+
+/*
+ * SNaN inputs having no significant bits in the upper 23 bits of the
+ * signifcand will return Infinity as the result.
+ */
+TEST("xscvdpspn", 0x7ff01fffULL, 0x0, 0x7f807f80ULL, 0x0);
+
+return 0;
+}
diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target
index 8f4c7ac4ed7d..0368007028c9 100644
--- a/tests/tcg/ppc64/Makefile.target
+++ b/tests/tcg/ppc64/Makefile.target
@@ -6,9 +6,9 @@ VPATH += $(SRC_PATH)/tests/tcg/ppc64
VPATH += $(SRC_PATH)/tests/tcg/ppc64le
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
-PPC64_TESTS=bcdsub
+PPC64_TESTS=bcdsub non_signalling_xscv
endif
-bcdsub: CFLAGS += -mpower8-vector
+$(PPC64_TESTS): CFLAGS += -mpower8-vector
PPC64_TESTS += byte_reverse
PPC64_TESTS += mtfsf
diff --git a/tests/tcg/ppc64le/Makefile.target
b/tests/tcg/ppc64le/Makefile.target
index e031f65adcb3..480ff0898d7e 100644
--- a/tests/tcg/ppc64le/Makefile.target
+++ b/tests/tcg/ppc64le/Makefile.target
@@ -5,9 +5,9 @@
VPATH += $(SRC_PATH)/tests/tcg/ppc64le
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER8_VECTOR),)
-PPC64LE_TESTS=bcdsub
+PPC64LE_TESTS=bcdsub non_signalling_xscv
endif
-bcdsub: CFLAGS += -mpower8-vector
+$(PPC64LE_TESTS): CFLAGS += -mpower8-vector
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_POWER10),)
PPC64LE_TESTS += byte_reverse
--
2.31.1
[PULL 15/26] ppc/ppc405: Introduce a store helper for SPR_40x_PID
The PID SPR of the 405 CPU contains the translation ID of the TLB
which is a 8-bit field. Enforce the mask with a store helper.
Cc: Christophe Leroy
Reviewed-by: Richard Henderson
Signed-off-by: Cédric Le Goater
Message-Id: <20211222064025.1541490-8-...@kaod.org>
Signed-off-by: Cédric Le Goater
Message-Id: <20220103063441.3424853-9-...@kaod.org>
Signed-off-by: Cédric Le Goater
---
target/ppc/spr_tcg.h | 1 +
target/ppc/cpu_init.c | 2 +-
target/ppc/translate.c | 8
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h
index 64cf5302cb86..89ff111724dc 100644
--- a/target/ppc/spr_tcg.h
+++ b/target/ppc/spr_tcg.h
@@ -89,6 +89,7 @@ void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int
gprn);
void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn);
void spr_write_40x_tcr(DisasContext *ctx, int sprn, int gprn);
void spr_write_40x_tsr(DisasContext *ctx, int sprn, int gprn);
+void spr_write_40x_pid(DisasContext *ctx, int sprn, int gprn);
void spr_write_booke_tcr(DisasContext *ctx, int sprn, int gprn);
void spr_write_booke_tsr(DisasContext *ctx, int sprn, int gprn);
void spr_read_403_pbr(DisasContext *ctx, int gprn, int sprn);
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index b5e2fde9ec4d..9ef9a1a5ddd5 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -1454,7 +1454,7 @@ static void register_405_sprs(CPUPPCState *env)
/* MMU */
spr_register(env, SPR_40x_PID, "PID",
SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_40x_pid,
0x);
spr_register(env, SPR_4xx_CCR0, "CCR0",
SPR_NOACCESS, SPR_NOACCESS,
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index eb45f679d34f..cb8ab4d67635 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -890,6 +890,14 @@ void spr_write_40x_tsr(DisasContext *ctx, int sprn, int
gprn)
gen_helper_store_40x_tsr(cpu_env, cpu_gpr[gprn]);
}
+void spr_write_40x_pid(DisasContext *ctx, int sprn, int gprn)
+{
+TCGv t0 = tcg_temp_new();
+tcg_gen_andi_tl(t0, cpu_gpr[gprn], 0xFF);
+gen_store_spr(SPR_40x_PID, t0);
+tcg_temp_free(t0);
+}
+
void spr_write_booke_tcr(DisasContext *ctx, int sprn, int gprn)
{
gen_icount_io_start(ctx);
--
2.31.1
Re: [PATCH v3 0/4] Reorg ppc64 pmu insn counting
On 1/3/22 23:47, Daniel Henrique Barboza wrote: Hi, This new version implements Richard's suggestions made in the v2 review. Changes from v2: - Patch 1: * fixed "PMC[1-5]" comment in target/ppc/cpu.h - Former patch 4: squashed into patch 1 - Patch 4 (former 5): * use boolean variables instead of uint32_t * added Richard's r-b - v2 link: https://lists.gnu.org/archive/html/qemu-devel/2022-01/msg00117.html Applied in ppc-next. Thanks, C.
[PULL 26/26] target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0()
From: Daniel Henrique Barboza
MMCR0 writes will change only MMCR0 bits which are used to calculate
HFLAGS_PMCC0, HFLAGS_PMCC1 and HFLAGS_INSN_CNT hflags. No other machine
register will be changed during this operation. This means that
hreg_compute_hflags() is overkill for what we need to do.
pmu_update_summaries() is already updating HFLAGS_INSN_CNT without
calling hreg_compure_hflags(). Let's do the same for the other 2 MMCR0
hflags.
Reviewed-by: Richard Henderson
Signed-off-by: Daniel Henrique Barboza
Message-Id: <20220103224746.167831-5-danielhb...@gmail.com>
Signed-off-by: Cédric Le Goater
---
target/ppc/power8-pmu.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c
index 73713ca2a320..236e8e66e966 100644
--- a/target/ppc/power8-pmu.c
+++ b/target/ppc/power8-pmu.c
@@ -224,12 +224,17 @@ static void pmu_update_overflow_timers(CPUPPCState *env)
void helper_store_mmcr0(CPUPPCState *env, target_ulong value)
{
+bool hflags_pmcc0 = (value & MMCR0_PMCC0) != 0;
+bool hflags_pmcc1 = (value & MMCR0_PMCC1) != 0;
+
pmu_update_cycles(env);
env->spr[SPR_POWER_MMCR0] = value;
/* MMCR0 writes can change HFLAGS_PMCC[01] and HFLAGS_INSN_CNT */
-hreg_compute_hflags(env);
+env->hflags = deposit32(env->hflags, HFLAGS_PMCC0, 1, hflags_pmcc0);
+env->hflags = deposit32(env->hflags, HFLAGS_PMCC1, 1, hflags_pmcc1);
+
pmu_update_summaries(env);
/* Update cycle overflow timers with the current MMCR0 state */
--
2.31.1
Re: [PATCH v2 0/5] target/ppc: powerpc_excp improvements (1/n)
On 12/29/21 17:57, Fabiano Rosas wrote: This series comprises of the first 4 patches from the RFC v2 plus an extra patch addressing review comments. Patch 1,3,4,5 have been reviewed. Patch 2 addresses prior comments from patch 3 and has not been reviewed. RFC v1: https://lists.nongnu.org/archive/html/qemu-ppc/2021-06/msg00026.html RFC v2: https://lists.nongnu.org/archive/html/qemu-ppc/2021-12/msg00542.html Applied in ppc-next. Thanks, C.
Re: [PATCH 00/17] ppc/pnv: enable pnv-phb4 user devices
On 12/28/21 20:37, Daniel Henrique Barboza wrote: Hi, This series implements pnv-phb4 user devices for the powernv9 machine. It also includes a couple of pnv-phb3 and pnv-phb3-root-port fixes that were also applied for the pnv4 equivalents. During the enablement I had to rollback from the previously added support for user creatable pnv-phb4-pec devices. The most important reason is user experience. PEC devices that doesn't spawn the PHB devices will be just a placeholder to add PHBs, having no use of their own as far as the user sees it. From this standpoint it makes more sense to just create all PECs and attach the PHBs the user wants on them. Patch 14 also describes technical reasons to rollback this support. The series is rebased using Cedric's 'powernv-6.2' branch [1]i, which includes the '[PATCH 0/5] ppc/pnv: Preliminary cleanups before user created PHBs' patches [2]. [1] https://github.com/legoater/qemu/tree/powernv-6.2 [2] https://lists.gnu.org/archive/html/qemu-devel/2021-12/msg03810.html Applied patches 2-16 in ppc-next. Thanks, C.
Re: [PATCH v2] target/ppc: do not silence snan in xscvspdpn
On 12/28/21 13:03, matheus.fe...@eldorado.org.br wrote: From: Matheus Ferst The non-signalling versions of VSX scalar convert to shorter/longer precision insns doesn't silence SNaNs in the hardware. To better match this behavior, use the non-arithmatic conversion of helper_todouble instead of float32_to_float64. A test is added to prevent future regressions. Signed-off-by: Matheus Ferst Applied in ppc-next. Thanks, C.
Re: [PATCH v2 0/9] ppc/ppc405: Fixes
On 1/3/22 07:34, Cédric Le Goater wrote: Hello, The series starts with a couple of cleanups helping debug. It then adds back support for 405 timers which was broken 10 years ago. Thanks, C. Changes in v2: - removed inlining from powerpc_excp() routines - fixed a compile breakage with CONFIG_USER_ONLY - removed all DEBUG defines from MMU models Applied in ppc-next. Thanks, C.
[PATCH] docs/sphinx: fix compatibility with sphinx < 1.8
From: Marc-André Lureau SphinxDirective was added with sphinx 1.8 (2018-09-13). Reported-by: Thomas Huth Signed-off-by: Marc-André Lureau --- docs/sphinx/fakedbusdoc.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/sphinx/fakedbusdoc.py b/docs/sphinx/fakedbusdoc.py index a680b257547f..d2c507904654 100644 --- a/docs/sphinx/fakedbusdoc.py +++ b/docs/sphinx/fakedbusdoc.py @@ -7,12 +7,12 @@ # Author: Marc-André Lureau """dbus-doc is a Sphinx extension that provides documentation from D-Bus XML.""" +from docutils.parsers.rst import Directive from sphinx.application import Sphinx -from sphinx.util.docutils import SphinxDirective from typing import Any, Dict -class FakeDBusDocDirective(SphinxDirective): +class FakeDBusDocDirective(Directive): has_content = True required_arguments = 1 -- 2.34.1.8.g35151cf07204
Re: [PATCH 0/5] ppc/pnv: Preliminary cleanups before user created PHBs
On 12/22/21 07:38, Cédric Le Goater wrote: Hello, There are the last cleanups preparing ground for PHBs created on the command line and possibly libvirt support. Thanks, C. Cédric Le Goater (5): ppc/pnv: Change the maximum of PHB3 devices for Power8NVL ppc/pnv: Remove PHB4 reset handler ppc/pnv: Remove the PHB4 "device-id" property ppc/pnv: Attach PHB3 root port device when defaults are enabled ppc/pnv: Attach PHB4 root port device when defaults are enabled Applied patches 1-3 in ppc-next. Thanks, C.
[PULL 1/2] hw/sd/sdcard: Rename Write Protect Group variables
'wp_groups' holds a bitmap, rename it as 'wp_group_bmap'.
'wpgrps_size' is the bitmap size (in bits), rename it as
'wp_group_bits'.
Patch created mechanically using:
$ sed -i -e s/wp_groups/wp_group_bmap/ \
-e s/wpgrps_size/wp_group_bits/ hw/sd/sd.c
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210728181728.2012952-4-f4...@amsat.org>
Reviewed-by: Alexander Bulekov
---
hw/sd/sd.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index bb5dbff68c0..0bb99352cc1 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -116,8 +116,8 @@ struct SDState {
int32_t state;/* current card state, one of SDCardStates */
uint32_t vhs;
bool wp_switch;
-unsigned long *wp_groups;
-int32_t wpgrps_size;
+unsigned long *wp_group_bmap;
+int32_t wp_group_bits;
uint64_t size;
uint32_t blk_len;
uint32_t multi_blk_cnt;
@@ -567,10 +567,10 @@ static void sd_reset(DeviceState *dev)
sd_set_cardstatus(sd);
sd_set_sdstatus(sd);
-g_free(sd->wp_groups);
+g_free(sd->wp_group_bmap);
sd->wp_switch = sd->blk ? !blk_is_writable(sd->blk) : false;
-sd->wpgrps_size = sect;
-sd->wp_groups = bitmap_new(sd->wpgrps_size);
+sd->wp_group_bits = sect;
+sd->wp_group_bmap = bitmap_new(sd->wp_group_bits);
memset(sd->function_group, 0, sizeof(sd->function_group));
sd->erase_start = INVALID_ADDRESS;
sd->erase_end = INVALID_ADDRESS;
@@ -673,7 +673,7 @@ static const VMStateDescription sd_vmstate = {
VMSTATE_UINT32(card_status, SDState),
VMSTATE_PARTIAL_BUFFER(sd_status, SDState, 1),
VMSTATE_UINT32(vhs, SDState),
-VMSTATE_BITMAP(wp_groups, SDState, 0, wpgrps_size),
+VMSTATE_BITMAP(wp_group_bmap, SDState, 0, wp_group_bits),
VMSTATE_UINT32(blk_len, SDState),
VMSTATE_UINT32(multi_blk_cnt, SDState),
VMSTATE_UINT32(erase_start, SDState),
@@ -803,8 +803,8 @@ static void sd_erase(SDState *sd)
if (sdsc) {
/* Only SDSC cards support write protect groups */
wpnum = sd_addr_to_wpnum(erase_addr);
-assert(wpnum < sd->wpgrps_size);
-if (test_bit(wpnum, sd->wp_groups)) {
+assert(wpnum < sd->wp_group_bits);
+if (test_bit(wpnum, sd->wp_group_bmap)) {
sd->card_status |= WP_ERASE_SKIP;
continue;
}
@@ -869,7 +869,7 @@ static void sd_function_switch(SDState *sd, uint32_t arg)
static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
{
-return test_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
+return test_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
}
static void sd_lock_command(SDState *sd)
@@ -897,7 +897,7 @@ static void sd_lock_command(SDState *sd)
sd->card_status |= LOCK_UNLOCK_FAILED;
return;
}
-bitmap_zero(sd->wp_groups, sd->wpgrps_size);
+bitmap_zero(sd->wp_group_bmap, sd->wp_group_bits);
sd->csd[14] &= ~0x10;
sd->card_status &= ~CARD_IS_LOCKED;
sd->pwd_len = 0;
@@ -1348,7 +1348,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
SDRequest req)
}
sd->state = sd_programming_state;
-set_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
+set_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
/* Bzzztt Operation complete. */
sd->state = sd_transfer_state;
return sd_r1b;
@@ -1370,7 +1370,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
SDRequest req)
}
sd->state = sd_programming_state;
-clear_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
+clear_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
/* Bzzztt Operation complete. */
sd->state = sd_transfer_state;
return sd_r1b;
--
2.33.1
[PULL 0/2] SD/MMC patches for 2022-01-04
The following changes since commit b5a3d8bc9146ba22a25116cb748c97341bf99737: Merge tag 'pull-misc-20220103' of https://gitlab.com/rth7680/qemu into staging (2022-01-03 09:34:41 -0800) are available in the Git repository at: https://github.com/philmd/qemu.git tags/sdmmc-20220104 for you to fetch changes up to d666c7b529c503381a714b97d2e174848b5aad8d: hw/sd: Add SDHC support for SD card SPI-mode (2022-01-04 08:50:27 +0100) SD/MMC patches queue - Add SDHC support for SD card SPI-mode (Frank Chang) Frank Chang (1): hw/sd: Add SDHC support for SD card SPI-mode Philippe Mathieu-Daudé (1): hw/sd/sdcard: Rename Write Protect Group variables hw/sd/sd.c | 48 +--- 1 file changed, 29 insertions(+), 19 deletions(-) -- 2.33.1
Re: [PATCH] docs/sphinx: fix compatibility with sphinx < 1.8
On 04/01/2022 08.46, marcandre.lur...@redhat.com wrote: From: Marc-André Lureau SphinxDirective was added with sphinx 1.8 (2018-09-13). Reported-by: Thomas Huth Signed-off-by: Marc-André Lureau --- docs/sphinx/fakedbusdoc.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/sphinx/fakedbusdoc.py b/docs/sphinx/fakedbusdoc.py index a680b257547f..d2c507904654 100644 --- a/docs/sphinx/fakedbusdoc.py +++ b/docs/sphinx/fakedbusdoc.py @@ -7,12 +7,12 @@ # Author: Marc-André Lureau """dbus-doc is a Sphinx extension that provides documentation from D-Bus XML.""" +from docutils.parsers.rst import Directive from sphinx.application import Sphinx -from sphinx.util.docutils import SphinxDirective from typing import Any, Dict -class FakeDBusDocDirective(SphinxDirective): +class FakeDBusDocDirective(Directive): has_content = True required_arguments = 1 Thanks, that fixes my issue, indeed! Tested-by: Thomas Huth I wonder whether we could turn such sphinx warnings during the configure phase into a hard failure so that such bugs would fail in the CI instead of getting merge without notice...? Thomas
[PULL 2/2] hw/sd: Add SDHC support for SD card SPI-mode
From: Frank Chang
In SPI-mode, SD card's OCR register: Card Capacity Status (CCS) bit
is not set to 1 correclty when the assigned SD image size is larger
than 2GB (SDHC). This will cause the SD card to be indentified as SDSC
incorrectly. CCS bit should be set to 1 if we are using SDHC.
Also, as there's no power up emulation in SPI-mode.
The OCR register: Card power up status bit bit (busy) should also
be set to 1 when reset. (busy bit is set to LOW if the card has not
finished the power up routine.)
Signed-off-by: Frank Chang
Reviewed-by: Jim Shu
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20211228125719.14712-1-frank.ch...@sifive.com>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 0bb99352cc1..551d03cf5ec 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -290,12 +290,6 @@ FIELD(OCR, CARD_POWER_UP, 31, 1)
| R_OCR_CARD_CAPACITY_MASK \
| R_OCR_CARD_POWER_UP_MASK)
-static void sd_set_ocr(SDState *sd)
-{
-/* All voltages OK */
-sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
-}
-
static void sd_ocr_powerup(void *opaque)
{
SDState *sd = opaque;
@@ -311,6 +305,22 @@ static void sd_ocr_powerup(void *opaque)
}
}
+static void sd_set_ocr(SDState *sd)
+{
+/* All voltages OK */
+sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
+
+if (sd->spi) {
+/*
+ * We don't need to emulate power up sequence in SPI-mode.
+ * Thus, the card's power up status bit should be set to 1 when reset.
+ * The card's capacity status bit should also be set if SD card size
+ * is larger than 2GB for SDHC support.
+ */
+sd_ocr_powerup(sd);
+}
+}
+
static void sd_set_scr(SDState *sd)
{
sd->scr[0] = 0 << 4;/* SCR structure version 1.0 */
@@ -560,6 +570,7 @@ static void sd_reset(DeviceState *dev)
sd->state = sd_idle_state;
sd->rca = 0x;
+sd->size = size;
sd_set_ocr(sd);
sd_set_scr(sd);
sd_set_cid(sd);
@@ -574,7 +585,6 @@ static void sd_reset(DeviceState *dev)
memset(sd->function_group, 0, sizeof(sd->function_group));
sd->erase_start = INVALID_ADDRESS;
sd->erase_end = INVALID_ADDRESS;
-sd->size = size;
sd->blk_len = 0x200;
sd->pwd_len = 0;
sd->expecting_acmd = false;
--
2.33.1
Re: Something broke "make html" and "make man"
On 03/01/2022 21.33, Thomas Huth wrote: Hi! "make html" and "make man" do not work anymore: $ make help | grep -B1 html Documentation targets: html man - Build documentation in specified format $ make html GIT ui/keycodemapdb meson tests/fp/berkeley-testfloat-3 tests/fp/berkeley-softfloat-3 dtc capstone slirp make: *** No rule to make target 'html'. Stop. $ make man GIT ui/keycodemapdb meson tests/fp/berkeley-testfloat-3 tests/fp/berkeley-softfloat-3 dtc capstone slirp make: *** No rule to make target 'man'. Stop. Anybody any ideas how to fix it? Never mind, the problem was this one here: https://lists.gnu.org/archive/html/qemu-devel/2022-01/msg00222.html After applying that patch, "make html" works fine for me again. Thomas
Re: [PATCH] docs/sphinx: fix compatibility with sphinx < 1.8
Hi Thomas On Tue, Jan 4, 2022 at 12:11 PM Thomas Huth wrote: > > On 04/01/2022 08.46, marcandre.lur...@redhat.com wrote: > > From: Marc-André Lureau > > > > SphinxDirective was added with sphinx 1.8 (2018-09-13). > > > > Reported-by: Thomas Huth > > Signed-off-by: Marc-André Lureau > > --- > > docs/sphinx/fakedbusdoc.py | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/docs/sphinx/fakedbusdoc.py b/docs/sphinx/fakedbusdoc.py > > index a680b257547f..d2c507904654 100644 > > --- a/docs/sphinx/fakedbusdoc.py > > +++ b/docs/sphinx/fakedbusdoc.py > > @@ -7,12 +7,12 @@ > > # Author: Marc-André Lureau > > """dbus-doc is a Sphinx extension that provides documentation from D-Bus > > XML.""" > > > > +from docutils.parsers.rst import Directive > > from sphinx.application import Sphinx > > -from sphinx.util.docutils import SphinxDirective > > from typing import Any, Dict > > > > > > -class FakeDBusDocDirective(SphinxDirective): > > +class FakeDBusDocDirective(Directive): > > has_content = True > > required_arguments = 1 > > Thanks, that fixes my issue, indeed! > > Tested-by: Thomas Huth > > I wonder whether we could turn such sphinx warnings during the configure > phase into a hard failure so that such bugs would fail in the CI instead of > getting merge without notice...? > I don't think there is a way to set the max sphinx version (an argument such as --max-version=1.7.9) The only way I can think of is to cover building with that version in the CI, as long as it is supported. thanks
Re: [PATCH 3/8] hw/pci: Document pci_dma_map()
On Tue, Jan 4, 2022 at 8:27 AM Peter Xu wrote: > > On Fri, Dec 31, 2021 at 12:48:56PM +0100, Philippe Mathieu-Daudé wrote: > > +/** > > + * pci_dma_map: Map a physical memory region into a device PCI address > > space. > > Shouldn't this be: "Map device PCI address space range into host virtual > address"? Yes, certainly... Thank you!
Re: [PATCH] migration: Don't return for postcopy_send_discard_bm_ram()
On Thursday, 2021-12-30 at 17:05:25 +01, Philippe Mathieu-Daudé wrote:
> postcopy_send_discard_bm_ram() always return zero. Since it can't
> fail, simplify and do not return anything.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: David Edmondson
> ---
> Based-on: <20211224065000.97572-1-pet...@redhat.com>
> ---
> migration/ram.c | 6 +-
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/migration/ram.c b/migration/ram.c
> index 5234d1ece11..e241ce98461 100644
> --- a/migration/ram.c
> +++ b/migration/ram.c
> @@ -2433,14 +2433,12 @@ void
> ram_postcopy_migrated_memory_release(MigrationState *ms)
> /**
> * postcopy_send_discard_bm_ram: discard a RAMBlock
> *
> - * Returns zero on success
> - *
> * Callback from postcopy_each_ram_send_discard for each RAMBlock
> *
> * @ms: current migration state
> * @block: RAMBlock to discard
> */
> -static int postcopy_send_discard_bm_ram(MigrationState *ms, RAMBlock *block)
> +static void postcopy_send_discard_bm_ram(MigrationState *ms, RAMBlock *block)
> {
> unsigned long end = block->used_length >> TARGET_PAGE_BITS;
> unsigned long current;
> @@ -2464,8 +2462,6 @@ static int postcopy_send_discard_bm_ram(MigrationState
> *ms, RAMBlock *block)
> postcopy_discard_send_range(ms, one, discard_length);
> current = one + discard_length;
> }
> -
> -return 0;
> }
>
> static void postcopy_chunk_hostpages_pass(MigrationState *ms, RAMBlock
> *block);
dme.
--
Tell me sweet little lies.
Re: [PATCH 7/8] hw/dma: Introduce dma_size_t type definition
On Mon, Jan 3, 2022 at 11:22 AM David Hildenbrand wrote:
> > /*
> > * When an IOMMU is present, bus addresses become distinct from
> > * CPU/memory physical addresses and may be a different size. Because
> > @@ -39,9 +28,22 @@ struct QEMUSGList {
> > * least most) cases.
> > */
> > typedef uint64_t dma_addr_t;
> > +typedef uint64_t dma_size_t;
>
> This is a bit inconsistent with other address types (hwaddr,
> ram_addr_t), no?
Indeed.
> -> git grep "_size_t"
>
> What sticks out are "external" mach_vm_size_t and png_size_t.
>
> To me, it logically makes sense that both types are equal, because we're
> operating on the same address space (with the same size).
>
> So at least I don't see the benefit here, but I'd love to be enlightened :)
No, you are right, I was not convinced either. I'll stick to dma_addr_t.
[PATCH v2 0/9] hw/dma: Use dma_addr_t type definition when relevant
Since v1: - Addressed David review comment (stick to dma_addr_t type) - Addressed Peter review comment (incorrect doc string) Hi, This series aims to clarify a bit the DMA API, in particular the 'size' argument which is not clear enough (as we use multiple types for it). This helps avoiding build failures on 32-bit host [*] (and likely overflows calculation too IMO). Some units using the DMA API are first removed from user-mode emulation to avoid build failure (they shouldn't be there in the first place). Then some variables are renamed for clarity (no functional change). Finally we replace misuses with dma_addr_t typedef. The previous patch which failed on 32-bit host applied on top (not failing anymore). Regards, Phil. [*] https://www.mail-archive.com/qemu-devel@nongnu.org/msg858825.html Supersedes: <20211231114901.976937-1-phi...@redhat.com> Philippe Mathieu-Daudé (9): hw/nvram: Restrict stub to sysemu and tools hw/pci: Restrict pci-bus stub to sysemu hw/pci: Document pci_dma_map() hw/dma: Remove CONFIG_USER_ONLY check hw/rdma/rdma_utils: Rename rdma_pci_dma_map 'len' argument hw/scsi: Rename SCSIRequest::resid as 'residual' hw/dma: Fix format string issues using dma_addr_t hw/dma: Use dma_addr_t type definition when relevant hw/dma: Let dma_buf_read() / dma_buf_write() propagate MemTxResult hw/rdma/rdma_utils.h | 2 +- include/hw/pci/pci.h | 12 ++ include/hw/scsi/scsi.h | 4 +- include/sysemu/dma.h | 31 --- hw/ide/ahci.c | 10 ++--- hw/nvme/ctrl.c | 6 +-- hw/rdma/rdma_utils.c | 14 +++ hw/scsi/megasas.c | 85 +- hw/scsi/scsi-bus.c | 12 +++--- hw/scsi/scsi-disk.c| 4 +- softmmu/dma-helpers.c | 34 +++-- hw/nvram/meson.build | 6 ++- hw/rdma/trace-events | 2 +- stubs/meson.build | 4 +- 14 files changed, 134 insertions(+), 92 deletions(-) -- 2.33.1
[PATCH v2 1/9] hw/nvram: Restrict stub to sysemu and tools
From: Philippe Mathieu-Daudé
User-mode emulation doesn't need the fw_cfg stub.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
hw/nvram/meson.build | 6 --
stubs/meson.build| 2 +-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build
index 202a5466e63..f5ee9f6b88c 100644
--- a/hw/nvram/meson.build
+++ b/hw/nvram/meson.build
@@ -1,5 +1,7 @@
-# QOM interfaces must be available anytime QOM is used.
-qom_ss.add(files('fw_cfg-interface.c'))
+if have_system or have_tools
+ # QOM interfaces must be available anytime QOM is used.
+ qom_ss.add(files('fw_cfg-interface.c'))
+endif
softmmu_ss.add(files('fw_cfg.c'))
softmmu_ss.add(when: 'CONFIG_CHRP_NVRAM', if_true: files('chrp_nvram.c'))
diff --git a/stubs/meson.build b/stubs/meson.build
index 71469c1d50a..363f6fa785d 100644
--- a/stubs/meson.build
+++ b/stubs/meson.build
@@ -11,7 +11,6 @@
stub_ss.add(files('dump.c'))
stub_ss.add(files('error-printf.c'))
stub_ss.add(files('fdset.c'))
-stub_ss.add(files('fw_cfg.c'))
stub_ss.add(files('gdbstub.c'))
stub_ss.add(files('get-vm-name.c'))
if linux_io_uring.found()
@@ -51,6 +50,7 @@
stub_ss.add(files('replay-tools.c'))
endif
if have_system
+ stub_ss.add(files('fw_cfg.c'))
stub_ss.add(files('semihost.c'))
stub_ss.add(files('usb-dev-stub.c'))
stub_ss.add(files('xen-hw-stub.c'))
--
2.33.1
[PATCH v2 2/9] hw/pci: Restrict pci-bus stub to sysemu
From: Philippe Mathieu-Daudé
Neither tools nor user-mode emulation require the PCI bus stub.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
stubs/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/stubs/meson.build b/stubs/meson.build
index 363f6fa785d..d359cbe1ad7 100644
--- a/stubs/meson.build
+++ b/stubs/meson.build
@@ -26,7 +26,6 @@
stub_ss.add(files('module-opts.c'))
stub_ss.add(files('monitor.c'))
stub_ss.add(files('monitor-core.c'))
-stub_ss.add(files('pci-bus.c'))
stub_ss.add(files('qemu-timer-notify-cb.c'))
stub_ss.add(files('qmp_memory_device.c'))
stub_ss.add(files('qmp-command-available.c'))
@@ -51,6 +50,7 @@
endif
if have_system
stub_ss.add(files('fw_cfg.c'))
+ stub_ss.add(files('pci-bus.c'))
stub_ss.add(files('semihost.c'))
stub_ss.add(files('usb-dev-stub.c'))
stub_ss.add(files('xen-hw-stub.c'))
--
2.33.1
[PATCH v2 4/9] hw/dma: Remove CONFIG_USER_ONLY check
From: Philippe Mathieu-Daudé
DMA API should not be included in user-mode emulation.
If so, build should fail. Remove the CONFIG_USER_ONLY check.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/dma.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index b3faef41b2f..0db2478a506 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -31,8 +31,6 @@ struct QEMUSGList {
AddressSpace *as;
};
-#ifndef CONFIG_USER_ONLY
-
/*
* When an IOMMU is present, bus addresses become distinct from
* CPU/memory physical addresses and may be a different size. Because
@@ -288,7 +286,6 @@ void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev,
int alloc_hint,
AddressSpace *as);
void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
void qemu_sglist_destroy(QEMUSGList *qsg);
-#endif
typedef BlockAIOCB *DMAIOFunc(int64_t offset, QEMUIOVector *iov,
BlockCompletionFunc *cb, void *cb_opaque,
--
2.33.1
[PATCH v2 3/9] hw/pci: Document pci_dma_map()
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/pci/pci.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 5b36334a28a..07f08aa0626 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -876,6 +876,18 @@ PCI_DMA_DEFINE_LDST(q_be, q_be, 64);
#undef PCI_DMA_DEFINE_LDST
+/**
+ * pci_dma_map: Map device PCI address space range into host virtual address
+ *
+ * May map a subset of the requested range, given by and returned in @plen.
+ * May return %NULL and set *@plen to zero(0), if resources needed to perform
+ * the mapping are exhausted.
+ *
+ * @dev: #PCIDevice to be accessed
+ * @addr: address within that device's address space
+ * @plen: pointer to length of buffer; updated on return
+ * @dir: indicates the transfer direction
+ */
static inline void *pci_dma_map(PCIDevice *dev, dma_addr_t addr,
dma_addr_t *plen, DMADirection dir)
{
--
2.33.1
[PATCH v2 5/9] hw/rdma/rdma_utils: Rename rdma_pci_dma_map 'len' argument
From: Philippe Mathieu-Daudé
Various APIs use 'pval' naming for 'pointer to val'.
rdma_pci_dma_map() uses 'plen' for 'PCI length', but since
'PCI' is already explicit in the function name, simplify
and rename the argument 'len'. No logical change.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
hw/rdma/rdma_utils.h | 2 +-
hw/rdma/rdma_utils.c | 14 +++---
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/rdma/rdma_utils.h b/hw/rdma/rdma_utils.h
index 9fd0efd940b..0c6414e7e0a 100644
--- a/hw/rdma/rdma_utils.h
+++ b/hw/rdma/rdma_utils.h
@@ -38,7 +38,7 @@ typedef struct RdmaProtectedGSList {
GSList *list;
} RdmaProtectedGSList;
-void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t plen);
+void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t len);
void rdma_pci_dma_unmap(PCIDevice *dev, void *buffer, dma_addr_t len);
void rdma_protected_gqueue_init(RdmaProtectedGQueue *list);
void rdma_protected_gqueue_destroy(RdmaProtectedGQueue *list);
diff --git a/hw/rdma/rdma_utils.c b/hw/rdma/rdma_utils.c
index 98df58f6897..61cb8ede0fd 100644
--- a/hw/rdma/rdma_utils.c
+++ b/hw/rdma/rdma_utils.c
@@ -17,29 +17,29 @@
#include "trace.h"
#include "rdma_utils.h"
-void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t plen)
+void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t len)
{
void *p;
-hwaddr len = plen;
+hwaddr pci_len = len;
if (!addr) {
rdma_error_report("addr is NULL");
return NULL;
}
-p = pci_dma_map(dev, addr, &len, DMA_DIRECTION_TO_DEVICE);
+p = pci_dma_map(dev, addr, &pci_len, DMA_DIRECTION_TO_DEVICE);
if (!p) {
rdma_error_report("pci_dma_map fail, addr=0x%"PRIx64", len=%"PRId64,
- addr, len);
+ addr, pci_len);
return NULL;
}
-if (len != plen) {
-rdma_pci_dma_unmap(dev, p, len);
+if (pci_len != len) {
+rdma_pci_dma_unmap(dev, p, pci_len);
return NULL;
}
-trace_rdma_pci_dma_map(addr, p, len);
+trace_rdma_pci_dma_map(addr, p, pci_len);
return p;
}
--
2.33.1
[PATCH v2 6/9] hw/scsi: Rename SCSIRequest::resid as 'residual'
From: Philippe Mathieu-Daudé
The 'resid' field is slightly confusing and could be
interpreted as some ID. Rename it as 'residual' which
is clearer to review. No logical change.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/scsi/scsi.h | 4 ++--
hw/scsi/megasas.c | 42 +-
hw/scsi/scsi-bus.c | 10 +-
hw/scsi/scsi-disk.c| 4 ++--
softmmu/dma-helpers.c | 26 +-
5 files changed, 47 insertions(+), 39 deletions(-)
diff --git a/include/hw/scsi/scsi.h b/include/hw/scsi/scsi.h
index 2ef80af6dca..b27d133b113 100644
--- a/include/hw/scsi/scsi.h
+++ b/include/hw/scsi/scsi.h
@@ -30,7 +30,7 @@ struct SCSIRequest {
int16_t status;
int16_t host_status;
void *hba_private;
-size_tresid;
+size_tresidual;
SCSICommand cmd;
NotifierList cancel_notifiers;
@@ -125,7 +125,7 @@ struct SCSIBusInfo {
void *hba_private);
void (*transfer_data)(SCSIRequest *req, uint32_t arg);
void (*fail)(SCSIRequest *req);
-void (*complete)(SCSIRequest *req, size_t resid);
+void (*complete)(SCSIRequest *req, size_t residual);
void (*cancel)(SCSIRequest *req);
void (*change)(SCSIBus *bus, SCSIDevice *dev, SCSISense sense);
QEMUSGList *(*get_sg_list)(SCSIRequest *req);
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index dc9bbdb740e..cb019549371 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -1045,7 +1045,8 @@ static int megasas_pd_get_info_submit(SCSIDevice *sdev,
int lun,
uint64_t pd_size;
uint16_t pd_id = ((sdev->id & 0xFF) << 8) | (lun & 0xFF);
uint8_t cmdbuf[6];
-size_t len, resid;
+size_t len;
+size_t residual;
if (!cmd->iov_buf) {
cmd->iov_buf = g_malloc0(dcmd_size);
@@ -1112,9 +1113,10 @@ static int megasas_pd_get_info_submit(SCSIDevice *sdev,
int lun,
info->connected_port_bitmap = 0x1;
info->device_speed = 1;
info->link_speed = 1;
-resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
+residual = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg,
+MEMTXATTRS_UNSPECIFIED);
g_free(cmd->iov_buf);
-cmd->iov_size = dcmd_size - resid;
+cmd->iov_size = dcmd_size - residual;
cmd->iov_buf = NULL;
return MFI_STAT_OK;
}
@@ -1149,7 +1151,8 @@ static int megasas_dcmd_pd_get_info(MegasasState *s,
MegasasCmd *cmd)
static int megasas_dcmd_ld_get_list(MegasasState *s, MegasasCmd *cmd)
{
struct mfi_ld_list info;
-size_t dcmd_size = sizeof(info), resid;
+size_t dcmd_size = sizeof(info);
+size_t residual;
uint32_t num_ld_disks = 0, max_ld_disks;
uint64_t ld_size;
BusChild *kid;
@@ -1184,8 +1187,9 @@ static int megasas_dcmd_ld_get_list(MegasasState *s,
MegasasCmd *cmd)
info.ld_count = cpu_to_le32(num_ld_disks);
trace_megasas_dcmd_ld_get_list(cmd->index, num_ld_disks, max_ld_disks);
-resid = dma_buf_read(&info, dcmd_size, &cmd->qsg, MEMTXATTRS_UNSPECIFIED);
-cmd->iov_size = dcmd_size - resid;
+residual = dma_buf_read(&info, dcmd_size, &cmd->qsg,
+MEMTXATTRS_UNSPECIFIED);
+cmd->iov_size = dcmd_size - residual;
return MFI_STAT_OK;
}
@@ -1193,7 +1197,8 @@ static int megasas_dcmd_ld_list_query(MegasasState *s,
MegasasCmd *cmd)
{
uint16_t flags;
struct mfi_ld_targetid_list info;
-size_t dcmd_size = sizeof(info), resid;
+size_t dcmd_size = sizeof(info);
+size_t residual;
uint32_t num_ld_disks = 0, max_ld_disks = s->fw_luns;
BusChild *kid;
@@ -1233,8 +1238,9 @@ static int megasas_dcmd_ld_list_query(MegasasState *s,
MegasasCmd *cmd)
info.size = dcmd_size;
trace_megasas_dcmd_ld_get_list(cmd->index, num_ld_disks, max_ld_disks);
-resid = dma_buf_read(&info, dcmd_size, &cmd->qsg, MEMTXATTRS_UNSPECIFIED);
-cmd->iov_size = dcmd_size - resid;
+residual = dma_buf_read(&info, dcmd_size, &cmd->qsg,
+MEMTXATTRS_UNSPECIFIED);
+cmd->iov_size = dcmd_size - residual;
return MFI_STAT_OK;
}
@@ -1244,7 +1250,8 @@ static int megasas_ld_get_info_submit(SCSIDevice *sdev,
int lun,
struct mfi_ld_info *info = cmd->iov_buf;
size_t dcmd_size = sizeof(struct mfi_ld_info);
uint8_t cdb[6];
-ssize_t len, resid;
+ssize_t len;
+size_t residual;
uint16_t sdev_id = ((sdev->id & 0xFF) << 8) | (lun & 0xFF);
uint64_t ld_size;
@@ -1283,9 +1290,10 @@ static int megasas_ld_get_info_submit(SCSIDevice *sdev,
int lun,
info->ld_config.span[0].num_blocks = info->size;
info->ld_config.span[0].array_ref = cpu_to_le16(sdev_id);
-resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
+residual = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg,
+MEMTXATTRS_UNSP
[PATCH v2 9/9] hw/dma: Let dma_buf_read() / dma_buf_write() propagate MemTxResult
From: Philippe Mathieu-Daudé
Since the previous commit, dma_buf_rw() returns a MemTxResult
type. Do not discard it, return it to the caller.
Since both dma_buf_read/dma_buf_write functions were previously
returning the QEMUSGList size not consumed, add an extra argument
where the unconsummed size can be stored.
Update the few callers.
Reviewed-by: Klaus Jensen
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/scsi/scsi.h | 2 +-
include/sysemu/dma.h | 6 +++--
hw/ide/ahci.c | 8 +++---
hw/nvme/ctrl.c | 4 +--
hw/scsi/megasas.c | 59 ++
hw/scsi/scsi-bus.c | 6 +++--
softmmu/dma-helpers.c | 18 +
7 files changed, 63 insertions(+), 40 deletions(-)
diff --git a/include/hw/scsi/scsi.h b/include/hw/scsi/scsi.h
index b27d133b113..1ffb367f94f 100644
--- a/include/hw/scsi/scsi.h
+++ b/include/hw/scsi/scsi.h
@@ -30,7 +30,7 @@ struct SCSIRequest {
int16_t status;
int16_t host_status;
void *hba_private;
-size_tresidual;
+uint64_t residual;
SCSICommand cmd;
NotifierList cancel_notifiers;
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 7a8ae4fcd0b..a1ac5bc1b54 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -301,8 +301,10 @@ BlockAIOCB *dma_blk_read(BlockBackend *blk,
BlockAIOCB *dma_blk_write(BlockBackend *blk,
QEMUSGList *sg, uint64_t offset, uint32_t align,
BlockCompletionFunc *cb, void *opaque);
-uint64_t dma_buf_read(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs
attrs);
-uint64_t dma_buf_write(void *ptr, int32_t len, QEMUSGList *sg, MemTxAttrs
attrs);
+MemTxResult dma_buf_read(void *ptr, dma_addr_t len, dma_addr_t *residual,
+ QEMUSGList *sg, MemTxAttrs attrs);
+MemTxResult dma_buf_write(void *ptr, dma_addr_t len, dma_addr_t *residual,
+ QEMUSGList *sg, MemTxAttrs attrs);
void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
QEMUSGList *sg, enum BlockAcctType type);
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 6c727dd0c08..7ce001cacdb 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1384,9 +1384,9 @@ static void ahci_pio_transfer(const IDEDMA *dma)
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
if (is_write) {
-dma_buf_write(s->data_ptr, size, &s->sg, attrs);
+dma_buf_write(s->data_ptr, size, NULL, &s->sg, attrs);
} else {
-dma_buf_read(s->data_ptr, size, &s->sg, attrs);
+dma_buf_read(s->data_ptr, size, NULL, &s->sg, attrs);
}
}
@@ -1479,9 +1479,9 @@ static int ahci_dma_rw_buf(const IDEDMA *dma, bool
is_write)
}
if (is_write) {
-dma_buf_read(p, l, &s->sg, MEMTXATTRS_UNSPECIFIED);
+dma_buf_read(p, l, NULL, &s->sg, MEMTXATTRS_UNSPECIFIED);
} else {
-dma_buf_write(p, l, &s->sg, MEMTXATTRS_UNSPECIFIED);
+dma_buf_write(p, l, NULL, &s->sg, MEMTXATTRS_UNSPECIFIED);
}
/* free sglist, update byte count */
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index c3c49176110..1f62116af98 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -1150,9 +1150,9 @@ static uint16_t nvme_tx(NvmeCtrl *n, NvmeSg *sg, uint8_t
*ptr, uint32_t len,
dma_addr_t residual;
if (dir == NVME_TX_DIRECTION_TO_DEVICE) {
-residual = dma_buf_write(ptr, len, &sg->qsg, attrs);
+dma_buf_write(ptr, len, &residual, &sg->qsg, attrs);
} else {
-residual = dma_buf_read(ptr, len, &sg->qsg, attrs);
+dma_buf_read(ptr, len, &residual, &sg->qsg, attrs);
}
if (unlikely(residual)) {
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index 6c1ae6b980f..de613c8b355 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -750,6 +750,7 @@ static int megasas_ctrl_get_info(MegasasState *s,
MegasasCmd *cmd)
size_t dcmd_size = sizeof(info);
BusChild *kid;
int num_pd_disks = 0;
+dma_addr_t residual;
memset(&info, 0x0, dcmd_size);
if (cmd->iov_size < dcmd_size) {
@@ -860,7 +861,9 @@ static int megasas_ctrl_get_info(MegasasState *s,
MegasasCmd *cmd)
MFI_INFO_PDMIX_SATA |
MFI_INFO_PDMIX_LD);
-cmd->iov_size -= dma_buf_read(&info, dcmd_size, &cmd->qsg,
MEMTXATTRS_UNSPECIFIED);
+dma_buf_read(&info, dcmd_size, &residual, &cmd->qsg,
+ MEMTXATTRS_UNSPECIFIED);
+cmd->iov_size -= residual;
return MFI_STAT_OK;
}
@@ -868,6 +871,7 @@ static int megasas_mfc_get_defaults(MegasasState *s,
MegasasCmd *cmd)
{
struct mfi_defaults info;
size_t dcmd_size = sizeof(struct mfi_defaults);
+dma_addr_t residual;
memset(&info, 0x0, dcmd_size);
if (cmd->iov_size < dcmd_siz
[PATCH v2 8/9] hw/dma: Use dma_addr_t type definition when relevant
From: Philippe Mathieu-Daudé
Update the obvious places where dma_addr_t should be used
(instead of uint64_t, hwaddr, size_t, int32_t types).
This allows to have &dma_addr_t type portable on 32/64-bit
hosts.
Move QEMUSGList declaration after dma_addr_t declaration
so this structure can use the new type.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/dma.h | 22 +++---
hw/nvme/ctrl.c| 2 +-
hw/rdma/rdma_utils.c | 2 +-
hw/scsi/megasas.c | 10 +-
softmmu/dma-helpers.c | 6 +++---
5 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h
index 0db2478a506..7a8ae4fcd0b 100644
--- a/include/sysemu/dma.h
+++ b/include/sysemu/dma.h
@@ -15,22 +15,11 @@
#include "block/block.h"
#include "block/accounting.h"
-typedef struct ScatterGatherEntry ScatterGatherEntry;
-
typedef enum {
DMA_DIRECTION_TO_DEVICE = 0,
DMA_DIRECTION_FROM_DEVICE = 1,
} DMADirection;
-struct QEMUSGList {
-ScatterGatherEntry *sg;
-int nsg;
-int nalloc;
-size_t size;
-DeviceState *dev;
-AddressSpace *as;
-};
-
/*
* When an IOMMU is present, bus addresses become distinct from
* CPU/memory physical addresses and may be a different size. Because
@@ -43,6 +32,17 @@ typedef uint64_t dma_addr_t;
#define DMA_ADDR_BITS 64
#define DMA_ADDR_FMT "%" PRIx64
+typedef struct ScatterGatherEntry ScatterGatherEntry;
+
+struct QEMUSGList {
+ScatterGatherEntry *sg;
+int nsg;
+int nalloc;
+dma_addr_t size;
+DeviceState *dev;
+AddressSpace *as;
+};
+
static inline void dma_barrier(AddressSpace *as, DMADirection dir)
{
/*
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 462f79a1f60..c3c49176110 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -1147,7 +1147,7 @@ static uint16_t nvme_tx(NvmeCtrl *n, NvmeSg *sg, uint8_t
*ptr, uint32_t len,
if (sg->flags & NVME_SG_DMA) {
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
-uint64_t residual;
+dma_addr_t residual;
if (dir == NVME_TX_DIRECTION_TO_DEVICE) {
residual = dma_buf_write(ptr, len, &sg->qsg, attrs);
diff --git a/hw/rdma/rdma_utils.c b/hw/rdma/rdma_utils.c
index 61cb8ede0fd..5a7ef63ad28 100644
--- a/hw/rdma/rdma_utils.c
+++ b/hw/rdma/rdma_utils.c
@@ -20,7 +20,7 @@
void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t len)
{
void *p;
-hwaddr pci_len = len;
+dma_addr_t pci_len = len;
if (!addr) {
rdma_error_report("addr is NULL");
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index cb019549371..6c1ae6b980f 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -1046,7 +1046,7 @@ static int megasas_pd_get_info_submit(SCSIDevice *sdev,
int lun,
uint16_t pd_id = ((sdev->id & 0xFF) << 8) | (lun & 0xFF);
uint8_t cmdbuf[6];
size_t len;
-size_t residual;
+dma_addr_t residual;
if (!cmd->iov_buf) {
cmd->iov_buf = g_malloc0(dcmd_size);
@@ -1152,7 +1152,7 @@ static int megasas_dcmd_ld_get_list(MegasasState *s,
MegasasCmd *cmd)
{
struct mfi_ld_list info;
size_t dcmd_size = sizeof(info);
-size_t residual;
+dma_addr_t residual;
uint32_t num_ld_disks = 0, max_ld_disks;
uint64_t ld_size;
BusChild *kid;
@@ -1198,7 +1198,7 @@ static int megasas_dcmd_ld_list_query(MegasasState *s,
MegasasCmd *cmd)
uint16_t flags;
struct mfi_ld_targetid_list info;
size_t dcmd_size = sizeof(info);
-size_t residual;
+dma_addr_t residual;
uint32_t num_ld_disks = 0, max_ld_disks = s->fw_luns;
BusChild *kid;
@@ -1251,7 +1251,7 @@ static int megasas_ld_get_info_submit(SCSIDevice *sdev,
int lun,
size_t dcmd_size = sizeof(struct mfi_ld_info);
uint8_t cdb[6];
ssize_t len;
-size_t residual;
+dma_addr_t residual;
uint16_t sdev_id = ((sdev->id & 0xFF) << 8) | (lun & 0xFF);
uint64_t ld_size;
@@ -1625,7 +1625,7 @@ static int megasas_handle_dcmd(MegasasState *s,
MegasasCmd *cmd)
}
static int megasas_finish_internal_dcmd(MegasasCmd *cmd,
-SCSIRequest *req, size_t residual)
+SCSIRequest *req, dma_addr_t residual)
{
int retval = MFI_STAT_OK;
int lun = req->lun;
diff --git a/softmmu/dma-helpers.c b/softmmu/dma-helpers.c
index 4563a775aa7..54340929334 100644
--- a/softmmu/dma-helpers.c
+++ b/softmmu/dma-helpers.c
@@ -294,12 +294,12 @@ BlockAIOCB *dma_blk_write(BlockBackend *blk,
}
-static MemTxResult dma_buf_rw(void *buf, int32_t len, uint64_t *residual,
+static MemTxResult dma_buf_rw(void *buf, dma_addr_t len, dma_addr_t *residual,
QEMUSGList *sg, DMADirection dir,
MemTxAttrs attrs)
{
uint8_t *ptr = buf;
-uint64_t xresidual;
+dma_addr_t xresidual;
int sg_cur_index;
MemTxResult res = MEMTX_OK;
@@ -308,7 +308,7 @
[PATCH v2 7/9] hw/dma: Fix format string issues using dma_addr_t
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/ahci.c| 2 +-
hw/rdma/trace-events | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 205dfdc6622..6c727dd0c08 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -1159,7 +1159,7 @@ static void process_ncq_command(AHCIState *s, int port,
const uint8_t *cmd_fis,
ahci_populate_sglist(ad, &ncq_tfs->sglist, ncq_tfs->cmdh, size, 0);
if (ncq_tfs->sglist.size < size) {
-error_report("ahci: PRDT length for NCQ command (0x%zx) "
+error_report("ahci: PRDT length for NCQ command (0x" DMA_ADDR_FMT ") "
"is smaller than the requested size (0x%zx)",
ncq_tfs->sglist.size, size);
ncq_err(ncq_tfs);
diff --git a/hw/rdma/trace-events b/hw/rdma/trace-events
index 9accb149734..c23175120e1 100644
--- a/hw/rdma/trace-events
+++ b/hw/rdma/trace-events
@@ -27,5 +27,5 @@ rdma_rm_alloc_qp(uint32_t rm_qpn, uint32_t backend_qpn,
uint8_t qp_type) "rm_qpn
rdma_rm_modify_qp(uint32_t qpn, uint32_t attr_mask, int qp_state, uint8_t
sgid_idx) "qpn=0x%x, attr_mask=0x%x, qp_state=%d, sgid_idx=%d"
# rdma_utils.c
-rdma_pci_dma_map(uint64_t addr, void *vaddr, uint64_t len) "0x%"PRIx64" -> %p
(len=%" PRId64")"
+rdma_pci_dma_map(uint64_t addr, void *vaddr, uint64_t len) "0x%"PRIx64" -> %p
(len=%" PRIu64")"
rdma_pci_dma_unmap(void *vaddr) "%p"
--
2.33.1
Re: [PATCH] docs/sphinx: fix compatibility with sphinx < 1.8
On 04/01/2022 09.15, Marc-André Lureau wrote: Hi Thomas On Tue, Jan 4, 2022 at 12:11 PM Thomas Huth wrote: On 04/01/2022 08.46, marcandre.lur...@redhat.com wrote: From: Marc-André Lureau SphinxDirective was added with sphinx 1.8 (2018-09-13). Reported-by: Thomas Huth Signed-off-by: Marc-André Lureau --- docs/sphinx/fakedbusdoc.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/sphinx/fakedbusdoc.py b/docs/sphinx/fakedbusdoc.py index a680b257547f..d2c507904654 100644 --- a/docs/sphinx/fakedbusdoc.py +++ b/docs/sphinx/fakedbusdoc.py @@ -7,12 +7,12 @@ # Author: Marc-André Lureau """dbus-doc is a Sphinx extension that provides documentation from D-Bus XML.""" +from docutils.parsers.rst import Directive from sphinx.application import Sphinx -from sphinx.util.docutils import SphinxDirective from typing import Any, Dict -class FakeDBusDocDirective(SphinxDirective): +class FakeDBusDocDirective(Directive): has_content = True required_arguments = 1 Thanks, that fixes my issue, indeed! Tested-by: Thomas Huth I wonder whether we could turn such sphinx warnings during the configure phase into a hard failure so that such bugs would fail in the CI instead of getting merge without notice...? I don't think there is a way to set the max sphinx version (an argument such as --max-version=1.7.9) Yes, I didn't expect that... I was rather wondering whether warnings could be turned into errors - and there seems to be "-W" option indeed ... and looking at docs/meson.build, we even use it if configuration has been done with --enable-werror ! The only way I can think of is to cover building with that version in the CI, as long as it is supported. I thought that it would have slipped through the CI since the warning was ignored - but it rather seems like it slipped through since the CentOS job is not building the docs at all! See: https://gitlab.com/qemu-project/qemu/-/jobs/1937664125#L260 I'll send a patch to use --enable-docs there, too: https://gitlab.com/thuth/qemu/-/jobs/1938762318#L4071 Thomas
Re: [PATCH v3 kvm/queue 14/16] KVM: Handle page fault for private memory
On Tue, Jan 04, 2022 at 09:46:35AM +0800, Yan Zhao wrote:
> On Thu, Dec 23, 2021 at 08:30:09PM +0800, Chao Peng wrote:
> > When a page fault from the secondary page table while the guest is
> > running happens in a memslot with KVM_MEM_PRIVATE, we need go
> > different paths for private access and shared access.
> >
> > - For private access, KVM checks if the page is already allocated in
> > the memory backend, if yes KVM establishes the mapping, otherwise
> > exits to userspace to convert a shared page to private one.
> >
> will this conversion be atomical or not?
> For example, after punching a hole in a private memory slot, will KVM
> see two notifications: one for invalidation of the whole private memory
> slot, and one for fallocate of the rest ranges besides the hole?
> Or, KVM only sees one invalidation notification for the hole?
Punching hole doesn't need to invalidate the whole memory slot. It only
send one invalidation notification to KVM for the 'hole' part.
Taking shared-to-private conversion as example it only invalidates the
'hole' part (that usually only the portion of the whole memory) on the
shared fd,, and then fallocate the private memory in the private fd at
the 'hole'. The KVM invalidation notification happens when the shared
hole gets invalidated. The establishment of the private mapping happens
at subsequent KVM page fault handlers.
> Could you please show QEMU code about this conversion?
See below for the QEMU side conversion code. The above described
invalidation and fallocation will be two steps in this conversion. If
error happens in the middle then this error will be propagated to
kvm_run to do the proper action (e.g. may kill the guest?).
int ram_block_convert_range(RAMBlock *rb, uint64_t start, size_t length,
bool shared_to_private)
{
int ret;
int fd_from, fd_to;
if (!rb || rb->private_fd <= 0) {
return -1;
}
if (!QEMU_PTR_IS_ALIGNED(start, rb->page_size) ||
!QEMU_PTR_IS_ALIGNED(length, rb->page_size)) {
return -1;
}
if (length > rb->max_length) {
return -1;
}
if (shared_to_private) {
fd_from = rb->fd;
fd_to = rb->private_fd;
} else {
fd_from = rb->private_fd;
fd_to = rb->fd;
}
ret = ram_block_discard_range_fd(rb, start, length, fd_from);
if (ret) {
return ret;
}
if (fd_to > 0) {
return fallocate(fd_to, 0, start, length);
}
return 0;
}
>
>
> > - For shared access, KVM also checks if the page is already allocated
> > in the memory backend, if yes then exit to userspace to convert a
> > private page to shared one, otherwise it's treated as a traditional
> > hva-based shared memory, KVM lets existing code to obtain a pfn with
> > get_user_pages() and establish the mapping.
> >
> > The above code assume private memory is persistent and pre-allocated in
> > the memory backend so KVM can use this information as an indicator for
> > a page is private or shared. The above check is then performed by
> > calling kvm_memfd_get_pfn() which currently is implemented as a
> > pagecache search but in theory that can be implemented differently
> > (i.e. when the page is even not mapped into host pagecache there should
> > be some different implementation).
> >
> > Signed-off-by: Yu Zhang
> > Signed-off-by: Chao Peng
> > ---
> > arch/x86/kvm/mmu/mmu.c | 73 --
> > arch/x86/kvm/mmu/paging_tmpl.h | 11 +++--
> > 2 files changed, 77 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> > index 2856eb662a21..fbcdf62f8281 100644
> > --- a/arch/x86/kvm/mmu/mmu.c
> > +++ b/arch/x86/kvm/mmu/mmu.c
> > @@ -2920,6 +2920,9 @@ int kvm_mmu_max_mapping_level(struct kvm *kvm,
> > if (max_level == PG_LEVEL_4K)
> > return PG_LEVEL_4K;
> >
> > + if (kvm_slot_is_private(slot))
> > + return max_level;
> > +
> > host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot);
> > return min(host_level, max_level);
> > }
> > @@ -3950,7 +3953,59 @@ static bool kvm_arch_setup_async_pf(struct kvm_vcpu
> > *vcpu, gpa_t cr2_or_gpa,
> > kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
> > }
> >
> > -static bool kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault
> > *fault, int *r)
> > +static bool kvm_vcpu_is_private_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
> > +{
> > + /*
> > +* At this time private gfn has not been supported yet. Other patch
> > +* that enables it should change this.
> > +*/
> > + return false;
> > +}
> > +
> > +static bool kvm_faultin_pfn_private(struct kvm_vcpu *vcpu,
> > + struct kvm_page_fault *fault,
> > + bool *is_private_pfn, int *r)
> > +{
> > + int order;
> > + int mem_convert_type;
> > + struct kvm_memory_slot *slot
[PATCH 0/2] hw/display/vmware_vga: supress debug output and fix
Two patches addressing the following in the vmware vga display code - only show debug output if DEBUG is explicitly enabled - do not discard display updates This prevents an issue that can cause garbled display output when a high number of screen updates are being requested. The FIFO queue size has been increased and all display update events are now processed ensuring correct display output even during periods of high activity. Carwyn Ellis (2): hw/display/vmware_vga: only show debug output if DEBUG enabled hw/display/vmware_vga: do not discard screen updates hw/display/vmware_vga.c | 50 +++-- 1 file changed, 33 insertions(+), 17 deletions(-) -- 2.34.1
[PATCH 2/2] hw/display/vmware_vga: do not discard screen updates
In certain circumstances, typically when there is lots changing on the
screen, updates will be discarded resulting in garbled output.
This change firstly increases the screen update FIFO size to ensure it's
large enough to accomodate all updates deferred in a given screen
refresh cycle.
When updating the screen all updates are applied to ensure the display
output is rendered correctly.
Signed-off-by: Carwyn Ellis
---
hw/display/vmware_vga.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index 8080e085d1..28556f39c6 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -82,7 +82,7 @@ struct vmsvga_state_s {
uint32_t fifo_next;
uint32_t fifo_stop;
-#define REDRAW_FIFO_LEN 512
+#define REDRAW_FIFO_LEN 8192
struct vmsvga_rect_s {
int x, y, w, h;
} redraw_fifo[REDRAW_FIFO_LEN];
@@ -385,7 +385,14 @@ static inline void vmsvga_update_rect_delayed(struct
vmsvga_state_s *s,
{
struct vmsvga_rect_s *rect = &s->redraw_fifo[s->redraw_fifo_last++];
-s->redraw_fifo_last &= REDRAW_FIFO_LEN - 1;
+if (s->redraw_fifo_last >= REDRAW_FIFO_LEN) {
+VMWARE_VGA_DEBUG("%s: Discarding updates - FIFO length %d exceeded\n",
+"vmsvga_update_rect_delayed",
+REDRAW_FIFO_LEN
+);
+s->redraw_fifo_last = REDRAW_FIFO_LEN - 1;
+}
+
rect->x = x;
rect->y = y;
rect->w = w;
@@ -402,11 +409,13 @@ static inline void vmsvga_update_rect_flush(struct
vmsvga_state_s *s)
}
/* Overlapping region updates can be optimised out here - if someone
* knows a smart algorithm to do that, please share. */
-while (s->redraw_fifo_first != s->redraw_fifo_last) {
-rect = &s->redraw_fifo[s->redraw_fifo_first++];
-s->redraw_fifo_first &= REDRAW_FIFO_LEN - 1;
+for (int i = 0; i < s->redraw_fifo_last; i++) {
+rect = &s->redraw_fifo[i];
vmsvga_update_rect(s, rect->x, rect->y, rect->w, rect->h);
}
+
+s->redraw_fifo_first = 0;
+s->redraw_fifo_last = 0;
}
#ifdef HW_RECT_ACCEL
@@ -607,13 +616,14 @@ static inline uint32_t vmsvga_fifo_read(struct
vmsvga_state_s *s)
static void vmsvga_fifo_run(struct vmsvga_state_s *s)
{
uint32_t cmd, colour;
-int args, len, maxloop = 1024;
+int args, len = 1024;
int x, y, dx, dy, width, height;
struct vmsvga_cursor_definition_s cursor;
uint32_t cmd_start;
len = vmsvga_fifo_length(s);
-while (len > 0 && --maxloop > 0) {
+
+while (len > 0) {
/* May need to go back to the start of the command if incomplete */
cmd_start = s->fifo_stop;
--
2.34.1
[PATCH] gitlab-ci: Enable docs in the centos job
We just ran into a problem that the docs don't build on RHEL8 / CentOS 8 anymore. Seems like these distros are using one of the oldest Sphinx versions that we still have to support. Thus enable the docs build in the CI on CentOS so that such bugs don't slip in so easily again. Signed-off-by: Thomas Huth --- Based-on: <20220104074649.1712440-1-marcandre.lur...@redhat.com> .gitlab-ci.d/buildtest.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml index d52fde23ec..083d1b25e5 100644 --- a/.gitlab-ci.d/buildtest.yml +++ b/.gitlab-ci.d/buildtest.yml @@ -164,7 +164,7 @@ build-system-centos: variables: IMAGE: centos8 CONFIGURE_ARGS: --disable-nettle --enable-gcrypt --enable-fdt=system ---enable-modules --enable-trace-backends=dtrace + --enable-modules --enable-trace-backends=dtrace --enable-docs TARGETS: ppc64-softmmu or1k-softmmu s390x-softmmu x86_64-softmmu rx-softmmu sh4-softmmu nios2-softmmu MAKE_CHECK_ARGS: check-build -- 2.27.0
[PATCH 1/2] hw/display/vmware_vga: only show debug output if DEBUG enabled
Debug output was always being sent to STDERR. This has been replaced by
a define that will only show this output when DEBUG is set to true.
Signed-off-by: Carwyn Ellis
---
hw/display/vmware_vga.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index e2969a6c81..8080e085d1 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -43,6 +43,12 @@
/* See http://vmware-svga.sf.net/ for some documentation on VMWare SVGA */
+#ifdef DEBUG
+#define VMWARE_VGA_DEBUG(...) { (void) fprintf(stdout, __VA_ARGS__); }
+#else
+#define VMWARE_VGA_DEBUG(...) ((void) 0)
+#endif
+
struct vmsvga_state_s {
VGACommonState vga;
@@ -297,45 +303,45 @@ static inline bool vmsvga_verify_rect(DisplaySurface
*surface,
int x, int y, int w, int h)
{
if (x < 0) {
-fprintf(stderr, "%s: x was < 0 (%d)\n", name, x);
+VMWARE_VGA_DEBUG("%s: x was < 0 (%d)\n", name, x);
return false;
}
if (x > SVGA_MAX_WIDTH) {
-fprintf(stderr, "%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x);
+VMWARE_VGA_DEBUG("%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x);
return false;
}
if (w < 0) {
-fprintf(stderr, "%s: w was < 0 (%d)\n", name, w);
+VMWARE_VGA_DEBUG("%s: w was < 0 (%d)\n", name, w);
return false;
}
if (w > SVGA_MAX_WIDTH) {
-fprintf(stderr, "%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w);
+VMWARE_VGA_DEBUG("%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w);
return false;
}
if (x + w > surface_width(surface)) {
-fprintf(stderr, "%s: width was > %d (x: %d, w: %d)\n",
+VMWARE_VGA_DEBUG("%s: width was > %d (x: %d, w: %d)\n",
name, surface_width(surface), x, w);
return false;
}
if (y < 0) {
-fprintf(stderr, "%s: y was < 0 (%d)\n", name, y);
+VMWARE_VGA_DEBUG("%s: y was < 0 (%d)\n", name, y);
return false;
}
if (y > SVGA_MAX_HEIGHT) {
-fprintf(stderr, "%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y);
+VMWARE_VGA_DEBUG("%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y);
return false;
}
if (h < 0) {
-fprintf(stderr, "%s: h was < 0 (%d)\n", name, h);
+VMWARE_VGA_DEBUG("%s: h was < 0 (%d)\n", name, h);
return false;
}
if (h > SVGA_MAX_HEIGHT) {
-fprintf(stderr, "%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h);
+VMWARE_VGA_DEBUG("%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h);
return false;
}
if (y + h > surface_height(surface)) {
-fprintf(stderr, "%s: update height > %d (y: %d, h: %d)\n",
+VMWARE_VGA_DEBUG("%s: update height > %d (y: %d, h: %d)\n",
name, surface_height(surface), y, h);
return false;
}
--
2.34.1
Re: [PATCH] migration: Don't return for postcopy_send_discard_bm_ram()
Philippe Mathieu-Daudé wrote:
> postcopy_send_discard_bm_ram() always return zero. Since it can't
> fail, simplify and do not return anything.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Based-on: <20211224065000.97572-1-pet...@redhat.com>
> ---
> migration/ram.c | 6 +-
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/migration/ram.c b/migration/ram.c
> index 5234d1ece11..e241ce98461 100644
> --- a/migration/ram.c
> +++ b/migration/ram.c
> @@ -2433,14 +2433,12 @@ void
> ram_postcopy_migrated_memory_release(MigrationState *ms)
> /**
> * postcopy_send_discard_bm_ram: discard a RAMBlock
> *
> - * Returns zero on success
> - *
> * Callback from postcopy_each_ram_send_discard for each RAMBlock
> *
> * @ms: current migration state
> * @block: RAMBlock to discard
> */
> -static int postcopy_send_discard_bm_ram(MigrationState *ms, RAMBlock *block)
> +static void postcopy_send_discard_bm_ram(MigrationState *ms, RAMBlock *block)
> {
> unsigned long end = block->used_length >> TARGET_PAGE_BITS;
> unsigned long current;
> @@ -2464,8 +2462,6 @@ static int postcopy_send_discard_bm_ram(MigrationState
> *ms, RAMBlock *block)
> postcopy_discard_send_range(ms, one, discard_length);
> current = one + discard_length;
> }
> -
> -return 0;
> }
>
> static void postcopy_chunk_hostpages_pass(MigrationState *ms, RAMBlock
> *block);
Nack.
You need to change the only caller (postcopy_each_send_discard) also.
ret = postcopy_send_discard_bm_ram(ms, block);
postcopy_discard_send_finish(ms);
if (ret) {
return ret;
}
Not sure if doing the same operation with
postcopy_each_send_discard/ram_postcopy_send_discard_bitmap() and
postcopy_chunk_hugepages makes sense.
Later, Juan.
Re: [PATCH 1/2] hw/display/vmware_vga: only show debug output if DEBUG enabled
Le 04/01/2022 à 10:11, Carwyn Ellis a écrit :
Debug output was always being sent to STDERR. This has been replaced by
a define that will only show this output when DEBUG is set to true.
Signed-off-by: Carwyn Ellis
---
hw/display/vmware_vga.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index e2969a6c81..8080e085d1 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -43,6 +43,12 @@
/* See http://vmware-svga.sf.net/ for some documentation on VMWare SVGA */
+#ifdef DEBUG
+#define VMWARE_VGA_DEBUG(...) { (void) fprintf(stdout, __VA_ARGS__); }
+#else
+#define VMWARE_VGA_DEBUG(...) ((void) 0)
+#endif
+
Could you replace this macro by adding some trace-events instead.
See https://qemu-project.gitlab.io/qemu/devel/tracing.html#using-trace-events
Thanks,
Laurent
struct vmsvga_state_s {
VGACommonState vga;
@@ -297,45 +303,45 @@ static inline bool vmsvga_verify_rect(DisplaySurface *surface,
int x, int y, int w, int h)
{
if (x < 0) {
-fprintf(stderr, "%s: x was < 0 (%d)\n", name, x);
+VMWARE_VGA_DEBUG("%s: x was < 0 (%d)\n", name, x);
return false;
}
if (x > SVGA_MAX_WIDTH) {
-fprintf(stderr, "%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x);
+VMWARE_VGA_DEBUG("%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x);
return false;
}
if (w < 0) {
-fprintf(stderr, "%s: w was < 0 (%d)\n", name, w);
+VMWARE_VGA_DEBUG("%s: w was < 0 (%d)\n", name, w);
return false;
}
if (w > SVGA_MAX_WIDTH) {
-fprintf(stderr, "%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w);
+VMWARE_VGA_DEBUG("%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w);
return false;
}
if (x + w > surface_width(surface)) {
-fprintf(stderr, "%s: width was > %d (x: %d, w: %d)\n",
+VMWARE_VGA_DEBUG("%s: width was > %d (x: %d, w: %d)\n",
name, surface_width(surface), x, w);
return false;
}
if (y < 0) {
-fprintf(stderr, "%s: y was < 0 (%d)\n", name, y);
+VMWARE_VGA_DEBUG("%s: y was < 0 (%d)\n", name, y);
return false;
}
if (y > SVGA_MAX_HEIGHT) {
-fprintf(stderr, "%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y);
+VMWARE_VGA_DEBUG("%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y);
return false;
}
if (h < 0) {
-fprintf(stderr, "%s: h was < 0 (%d)\n", name, h);
+VMWARE_VGA_DEBUG("%s: h was < 0 (%d)\n", name, h);
return false;
}
if (h > SVGA_MAX_HEIGHT) {
-fprintf(stderr, "%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h);
+VMWARE_VGA_DEBUG("%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h);
return false;
}
if (y + h > surface_height(surface)) {
-fprintf(stderr, "%s: update height > %d (y: %d, h: %d)\n",
+VMWARE_VGA_DEBUG("%s: update height > %d (y: %d, h: %d)\n",
name, surface_height(surface), y, h);
return false;
}
Re: [PATCH 1/2] hw/display/vmware_vga: only show debug output if DEBUG enabled
Hey,
Thanks for getting back to me.
Yeah will take a look and update when I have a mo.
Cheers
Carwyn
> On 4 Jan 2022, at 09:18, Laurent Vivier wrote:
>
> Le 04/01/2022 à 10:11, Carwyn Ellis a écrit :
>> Debug output was always being sent to STDERR. This has been replaced by
>> a define that will only show this output when DEBUG is set to true.
>> Signed-off-by: Carwyn Ellis
>> ---
>> hw/display/vmware_vga.c | 26 --
>> 1 file changed, 16 insertions(+), 10 deletions(-)
>> diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
>> index e2969a6c81..8080e085d1 100644
>> --- a/hw/display/vmware_vga.c
>> +++ b/hw/display/vmware_vga.c
>> @@ -43,6 +43,12 @@
>>/* See http://vmware-svga.sf.net/ for some documentation on VMWare SVGA */
>> +#ifdef DEBUG
>> +#define VMWARE_VGA_DEBUG(...) { (void) fprintf(stdout, __VA_ARGS__); }
>> +#else
>> +#define VMWARE_VGA_DEBUG(...) ((void) 0)
>> +#endif
>> +
>
> Could you replace this macro by adding some trace-events instead.
>
> See https://qemu-project.gitlab.io/qemu/devel/tracing.html#using-trace-events
>
> Thanks,
> Laurent
>
>> struct vmsvga_state_s {
>> VGACommonState vga;
>> @@ -297,45 +303,45 @@ static inline bool vmsvga_verify_rect(DisplaySurface
>> *surface,
>>int x, int y, int w, int h)
>> {
>> if (x < 0) {
>> -fprintf(stderr, "%s: x was < 0 (%d)\n", name, x);
>> +VMWARE_VGA_DEBUG("%s: x was < 0 (%d)\n", name, x);
>> return false;
>> }
>> if (x > SVGA_MAX_WIDTH) {
>> -fprintf(stderr, "%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x);
>> +VMWARE_VGA_DEBUG("%s: x was > %d (%d)\n", name, SVGA_MAX_WIDTH, x);
>> return false;
>> }
>> if (w < 0) {
>> -fprintf(stderr, "%s: w was < 0 (%d)\n", name, w);
>> +VMWARE_VGA_DEBUG("%s: w was < 0 (%d)\n", name, w);
>> return false;
>> }
>> if (w > SVGA_MAX_WIDTH) {
>> -fprintf(stderr, "%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w);
>> +VMWARE_VGA_DEBUG("%s: w was > %d (%d)\n", name, SVGA_MAX_WIDTH, w);
>> return false;
>> }
>> if (x + w > surface_width(surface)) {
>> -fprintf(stderr, "%s: width was > %d (x: %d, w: %d)\n",
>> +VMWARE_VGA_DEBUG("%s: width was > %d (x: %d, w: %d)\n",
>> name, surface_width(surface), x, w);
>> return false;
>> }
>>if (y < 0) {
>> -fprintf(stderr, "%s: y was < 0 (%d)\n", name, y);
>> +VMWARE_VGA_DEBUG("%s: y was < 0 (%d)\n", name, y);
>> return false;
>> }
>> if (y > SVGA_MAX_HEIGHT) {
>> -fprintf(stderr, "%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y);
>> +VMWARE_VGA_DEBUG("%s: y was > %d (%d)\n", name, SVGA_MAX_HEIGHT, y);
>> return false;
>> }
>> if (h < 0) {
>> -fprintf(stderr, "%s: h was < 0 (%d)\n", name, h);
>> +VMWARE_VGA_DEBUG("%s: h was < 0 (%d)\n", name, h);
>> return false;
>> }
>> if (h > SVGA_MAX_HEIGHT) {
>> -fprintf(stderr, "%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h);
>> +VMWARE_VGA_DEBUG("%s: h was > %d (%d)\n", name, SVGA_MAX_HEIGHT, h);
>> return false;
>> }
>> if (y + h > surface_height(surface)) {
>> -fprintf(stderr, "%s: update height > %d (y: %d, h: %d)\n",
>> +VMWARE_VGA_DEBUG("%s: update height > %d (y: %d, h: %d)\n",
>> name, surface_height(surface), y, h);
>> return false;
>> }
>
Re: [PATCH] gitlab-ci: Enable docs in the centos job
On Tue, Jan 4, 2022 at 1:12 PM Thomas Huth wrote: > > We just ran into a problem that the docs don't build on RHEL8 / CentOS 8 > anymore. Seems like these distros are using one of the oldest Sphinx > versions that we still have to support. Thus enable the docs build in > the CI on CentOS so that such bugs don't slip in so easily again. > > Signed-off-by: Thomas Huth Reviewed-by: Marc-André Lureau > --- > Based-on: <20220104074649.1712440-1-marcandre.lur...@redhat.com> > > .gitlab-ci.d/buildtest.yml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml > index d52fde23ec..083d1b25e5 100644 > --- a/.gitlab-ci.d/buildtest.yml > +++ b/.gitlab-ci.d/buildtest.yml > @@ -164,7 +164,7 @@ build-system-centos: >variables: > IMAGE: centos8 > CONFIGURE_ARGS: --disable-nettle --enable-gcrypt --enable-fdt=system > ---enable-modules --enable-trace-backends=dtrace > + --enable-modules --enable-trace-backends=dtrace --enable-docs > TARGETS: ppc64-softmmu or1k-softmmu s390x-softmmu >x86_64-softmmu rx-softmmu sh4-softmmu nios2-softmmu > MAKE_CHECK_ARGS: check-build > -- > 2.27.0 >
Re: [PATCH] migration: Don't return for postcopy_send_discard_bm_ram()
On Tue, Jan 04, 2022 at 10:15:16AM +0100, Juan Quintela wrote:
> Philippe Mathieu-Daudé wrote:
> > postcopy_send_discard_bm_ram() always return zero. Since it can't
> > fail, simplify and do not return anything.
> >
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > Based-on: <20211224065000.97572-1-pet...@redhat.com>
> > ---
> > migration/ram.c | 6 +-
> > 1 file changed, 1 insertion(+), 5 deletions(-)
> >
> > diff --git a/migration/ram.c b/migration/ram.c
> > index 5234d1ece11..e241ce98461 100644
> > --- a/migration/ram.c
> > +++ b/migration/ram.c
> > @@ -2433,14 +2433,12 @@ void
> > ram_postcopy_migrated_memory_release(MigrationState *ms)
> > /**
> > * postcopy_send_discard_bm_ram: discard a RAMBlock
> > *
> > - * Returns zero on success
> > - *
> > * Callback from postcopy_each_ram_send_discard for each RAMBlock
> > *
> > * @ms: current migration state
> > * @block: RAMBlock to discard
> > */
> > -static int postcopy_send_discard_bm_ram(MigrationState *ms, RAMBlock
> > *block)
> > +static void postcopy_send_discard_bm_ram(MigrationState *ms, RAMBlock
> > *block)
> > {
> > unsigned long end = block->used_length >> TARGET_PAGE_BITS;
> > unsigned long current;
> > @@ -2464,8 +2462,6 @@ static int
> > postcopy_send_discard_bm_ram(MigrationState *ms, RAMBlock *block)
> > postcopy_discard_send_range(ms, one, discard_length);
> > current = one + discard_length;
> > }
> > -
> > -return 0;
> > }
> >
> > static void postcopy_chunk_hostpages_pass(MigrationState *ms, RAMBlock
> > *block);
>
> Nack.
>
> You need to change the only caller (postcopy_each_send_discard) also.
>
> ret = postcopy_send_discard_bm_ram(ms, block);
> postcopy_discard_send_finish(ms);
> if (ret) {
> return ret;
> }
>
> Not sure if doing the same operation with
> postcopy_each_send_discard/ram_postcopy_send_discard_bitmap() and
> postcopy_chunk_hugepages makes sense.
Juan,
Phil's patch has a based-on dependency with the other patch:
https://lore.kernel.org/qemu-devel/20211224065000.97572-6-pet...@redhat.com/
Thanks,
--
Peter Xu
Re: [PATCH 1/2] hw/display/vmware_vga: only show debug output if DEBUG enabled
Le 04/01/2022 à 10:20, Carwyn Ellis a écrit :
Hey,
Thanks for getting back to me.
Yeah will take a look and update when I have a mo.
It's really easy to do, see below for an example:
...
@@ -297,45 +303,45 @@ static inline bool vmsvga_verify_rect(DisplaySurface
*surface,
int x, int y, int w, int h)
{
if (x < 0) {
-fprintf(stderr, "%s: x was < 0 (%d)\n", name, x);
+VMWARE_VGA_DEBUG("%s: x was < 0 (%d)\n", name, x);
replace it by:
trace_vmsvga_verify_rect_check_neg(name, x);
and in hw/display/trace-events you add:
vmsvga_verify_rect_check_neg(const char *name, int x) "%s: x was < 0 (%d)"
Thanks,
Laurent
Re: [PATCH 1/2] hw/display/vmware_vga: only show debug output if DEBUG enabled
Ok cool.
Thanks for the info!
> On 4 Jan 2022, at 09:27, Laurent Vivier wrote:
>
> Le 04/01/2022 à 10:20, Carwyn Ellis a écrit :
>> Hey,
>> Thanks for getting back to me.
>> Yeah will take a look and update when I have a mo.
>
> It's really easy to do, see below for an example:
>
> ...
@@ -297,45 +303,45 @@ static inline bool
vmsvga_verify_rect(DisplaySurface *surface,
int x, int y, int w, int h)
{
if (x < 0) {
-fprintf(stderr, "%s: x was < 0 (%d)\n", name, x);
+VMWARE_VGA_DEBUG("%s: x was < 0 (%d)\n", name, x);
>
> replace it by:
>
>trace_vmsvga_verify_rect_check_neg(name, x);
>
> and in hw/display/trace-events you add:
>
>vmsvga_verify_rect_check_neg(const char *name, int x) "%s: x was < 0 (%d)"
>
> Thanks,
> Laurent
Re: Meeting today?
On Tue, Dec 14, 2021 at 3:49 PM Markus Armbruster wrote: > Daniel P. Berrangé writes: > > > On Tue, Dec 14, 2021 at 12:37:43PM +0100, Markus Armbruster wrote: > >> Mark Burton writes: > >> > >> > I realise it’s very short notice, but what about having a discussion > today at 15:00 ? > >> > >> I have a conflict today. I could try to reschedule, but I'd prefer to > >> talk next week instead. Less stress, better prep. > > > > I fear we've run out of time for this year if we want all interested > > parties to be able to attend. I'll be off on PTO from end of this > > week until the new year, and I know alot of folk are doing similar. > > Right. I'll be off from Dec 23 to Jan 9. Can we all make Jan 11? > Jan 11th works for me! Thanks, Edgar
Re: [PATCH 1/9] target/ppc: powerpc_excp: Extract software TLB logging into a function
Hello Fabiano,
On 1/3/22 23:07, Fabiano Rosas wrote:
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 63 +++-
1 file changed, 36 insertions(+), 27 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index c7e55800af..002a42261b 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -63,6 +63,41 @@ static inline void dump_hcall(CPUPPCState *env)
env->nip);
}
+static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp)
+{
+#if defined(DEBUG_SOFTWARE_TLB)
I would get rid of the define
+const char *es;
+target_ulong *miss, *cmp;
+int en;
+
+if (!qemu_log_enabled()) {
+return;
+}
+
+if (excp == POWERPC_EXCP_IFTLB) {
+es = "I";
+en = 'I';
+miss = &env->spr[SPR_IMISS];
+cmp = &env->spr[SPR_ICMP];
+} else {
+if (excp == POWERPC_EXCP_DLTLB) {
+es = "DL";
+} else {
+es = "DS";
+}
+en = 'D';
+miss = &env->spr[SPR_DMISS];
+cmp = &env->spr[SPR_DCMP];
+}
and simply use :
qemu_log_mask(CPU_LOG_MMU, ...
Thanks,
C.
+qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
+ TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 "
+ TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
+ env->spr[SPR_HASH1], env->spr[SPR_HASH2],
+ env->error_code);
+#endif
+}
+
+
static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp,
target_ulong *msr)
{
@@ -704,34 +739,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp)
}
/* fall through */
case POWERPC_EXCP_7x5:
-#if defined(DEBUG_SOFTWARE_TLB)
-if (qemu_log_enabled()) {
-const char *es;
-target_ulong *miss, *cmp;
-int en;
+ppc_excp_debug_sw_tlb(env, excp);
-if (excp == POWERPC_EXCP_IFTLB) {
-es = "I";
-en = 'I';
-miss = &env->spr[SPR_IMISS];
-cmp = &env->spr[SPR_ICMP];
-} else {
-if (excp == POWERPC_EXCP_DLTLB) {
-es = "DL";
-} else {
-es = "DS";
-}
-en = 'D';
-miss = &env->spr[SPR_DMISS];
-cmp = &env->spr[SPR_DCMP];
-}
-qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
- TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 "
- TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
- env->spr[SPR_HASH1], env->spr[SPR_HASH2],
- env->error_code);
-}
-#endif
msr |= env->crf[0] << 28;
msr |= env->error_code; /* key, D/I, S/L bits */
/* Set way using a LRU mechanism */
Re: [PATCH 2/9] target/ppc: powerpc_excp: Keep 60x soft MMU logs active
On 1/3/22 23:07, Fabiano Rosas wrote:
Remove the compile time definition and make the logging be controlled
by the `-d mmu` option in the cmdline.
Signed-off-by: Fabiano Rosas
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
target/ppc/excp_helper.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 002a42261b..4769abfb0c 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -30,8 +30,6 @@
#include "exec/cpu_ldst.h"
#endif
-/* #define DEBUG_SOFTWARE_TLB */
-
/*/
/* Exception processing */
#if !defined(CONFIG_USER_ONLY)
@@ -65,7 +63,6 @@ static inline void dump_hcall(CPUPPCState *env)
static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int excp)
{
-#if defined(DEBUG_SOFTWARE_TLB)
const char *es;
target_ulong *miss, *cmp;
int en;
@@ -89,12 +86,12 @@ static void ppc_excp_debug_sw_tlb(CPUPPCState *env, int
excp)
miss = &env->spr[SPR_DMISS];
cmp = &env->spr[SPR_DCMP];
}
-qemu_log("6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
- TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 "
- TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
- env->spr[SPR_HASH1], env->spr[SPR_HASH2],
- env->error_code);
-#endif
+
+qemu_log_mask(CPU_LOG_MMU, "6xx %sTLB miss: %cM " TARGET_FMT_lx " %cC "
+ TARGET_FMT_lx " H1 " TARGET_FMT_lx " H2 "
+ TARGET_FMT_lx " %08x\n", es, en, *miss, en, *cmp,
+ env->spr[SPR_HASH1], env->spr[SPR_HASH2],
+ env->error_code);
}
Re: [PATCH v1] hw/smbios: verify header type for file before using it
On Mon, 29 Nov 2021 16:52:11 +0300
Daniil Tatianin wrote:
here should be more verbose description of the issue
preferably with a way to reproduce it.
and what/why patch does what it does.
> Signed-off-by: Daniil Tatianin
> ---
> hw/smbios/smbios.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
> index 7397e56737..c55f77368a 100644
> --- a/hw/smbios/smbios.c
> +++ b/hw/smbios/smbios.c
> @@ -1163,6 +1163,12 @@ void smbios_entry_add(QemuOpts *opts, Error **errp)
> return;
> }
>
> +if (header->type > SMBIOS_MAX_TYPE) {
> +error_setg(errp,
> + "invalid header type %d!", header->type);
3.0 spec says that types over 127 are valid and for use by OEM/etc,
but QEMU doesn't support anything over 127 due to limited size of
have_fields_bitmap.
So I'd rephrase it as "unsupported header type"
> +return;
> +}
> +
> if (test_bit(header->type, have_fields_bitmap)) {
> error_setg(errp,
> "can't load type %d struct, fields already
> specified!",
Re: [PATCH] sysemu: Cleanup qemu_run_machine_init_done_notifiers()
On Tue, Jan 4, 2022 at 3:41 AM Xiaoyao Li wrote:
>
> Remove qemu_run_machine_init_done_notifiers() since no implementation
> and user.
Fixes: f66dc8737c9 ("vl: move all generic initialization out of vl.c")
Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Xiaoyao Li
> ---
> include/sysemu/sysemu.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h
> index 8fae667172ac..b9421e03ffdd 100644
> --- a/include/sysemu/sysemu.h
> +++ b/include/sysemu/sysemu.h
> @@ -16,7 +16,6 @@ extern bool qemu_uuid_set;
> void qemu_add_exit_notifier(Notifier *notify);
> void qemu_remove_exit_notifier(Notifier *notify);
>
> -void qemu_run_machine_init_done_notifiers(void);
> void qemu_add_machine_init_done_notifier(Notifier *notify);
> void qemu_remove_machine_init_done_notifier(Notifier *notify);
>
> --
> 2.27.0
>
>
Re: [PATCH 3/9] target/ppc: powerpc_excp: Group unimplemented exceptions
On 1/3/22 23:07, Fabiano Rosas wrote:
(I'll alter this to use powerpc_excp_name once it is merged)
Sure.
Reviewed-by: Cédric Le Goater
Thanks,
C.
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 76
1 file changed, 7 insertions(+), 69 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 4769abfb0c..160e06e3a3 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -628,23 +628,6 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable/VPU
*/
env->spr[SPR_BOOKE_ESR] = ESR_SPV;
break;
-case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt */
-/* XXX: TODO */
-cpu_abort(cs, "Embedded floating point data exception "
- "is not implemented yet !\n");
-env->spr[SPR_BOOKE_ESR] = ESR_SPV;
-break;
-case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrupt */
-/* XXX: TODO */
-cpu_abort(cs, "Embedded floating point round exception "
- "is not implemented yet !\n");
-env->spr[SPR_BOOKE_ESR] = ESR_SPV;
-break;
-case POWERPC_EXCP_EPERFM:/* Embedded performance monitor interrupt */
-/* XXX: TODO */
-cpu_abort(cs,
- "Performance counter exception is not implemented yet !\n");
-break;
case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt
*/
break;
case POWERPC_EXCP_DOORCI:/* Embedded doorbell critical interrupt
*/
@@ -709,19 +692,6 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt
*/
trace_ppc_excp_print("PIT");
break;
-case POWERPC_EXCP_IO:/* IO error exception */
-/* XXX: TODO */
-cpu_abort(cs, "601 IO error exception is not implemented yet !\n");
-break;
-case POWERPC_EXCP_RUNM: /* Run mode exception */
-/* XXX: TODO */
-cpu_abort(cs, "601 run mode exception is not implemented yet !\n");
-break;
-case POWERPC_EXCP_EMUL: /* Emulation trap exception */
-/* XXX: TODO */
-cpu_abort(cs, "602 emulation trap exception "
- "is not implemented yet !\n");
-break;
case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error
*/
case POWERPC_EXCP_DLTLB: /* Data load TLB miss
*/
case POWERPC_EXCP_DSTLB: /* Data store TLB miss
*/
@@ -748,56 +718,24 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp)
break;
}
break;
+case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt */
+case POWERPC_EXCP_EFPRI: /* Embedded floating-point round interrupt */
+case POWERPC_EXCP_EPERFM:/* Embedded performance monitor interrupt */
+case POWERPC_EXCP_IO:/* IO error exception */
+case POWERPC_EXCP_RUNM: /* Run mode exception */
+case POWERPC_EXCP_EMUL: /* Emulation trap exception */
case POWERPC_EXCP_FPA: /* Floating-point assist exception
*/
-/* XXX: TODO */
-cpu_abort(cs, "Floating point assist exception "
- "is not implemented yet !\n");
-break;
case POWERPC_EXCP_DABR: /* Data address breakpoint
*/
-/* XXX: TODO */
-cpu_abort(cs, "DABR exception is not implemented yet !\n");
-break;
case POWERPC_EXCP_IABR: /* Instruction address breakpoint
*/
-/* XXX: TODO */
-cpu_abort(cs, "IABR exception is not implemented yet !\n");
-break;
case POWERPC_EXCP_SMI: /* System management interrupt
*/
-/* XXX: TODO */
-cpu_abort(cs, "SMI exception is not implemented yet !\n");
-break;
case POWERPC_EXCP_THERM: /* Thermal interrupt
*/
-/* XXX: TODO */
-cpu_abort(cs, "Thermal management exception "
- "is not implemented yet !\n");
-break;
case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt
*/
-/* XXX: TODO */
-cpu_abort(cs,
- "Performance counter exception is not implemented yet !\n");
-break;
case POWERPC_EXCP_VPUA: /* Vector assist exception
*/
-/* XXX: TODO */
-cpu_abort(cs, "VPU assist exception is not implemented yet !\n");
-break;
case POWERPC_EXCP_SOFTP: /* Soft patch exception
*/
-/* XXX: TODO */
-cpu_abort(cs,
-
Re: [PATCH v2 19/19] ppc/pnv: Move num_phbs under Pnv8Chip
On 12/13/21 10:28, Cédric Le Goater wrote:
It is not used elsewhere so that's where it belongs.
Signed-off-by: Cédric Le Goater
---
I am/was using this patch and didn't provide my r-b on it:
Reviewed-by: Daniel Henrique Barboza
include/hw/ppc/pnv.h | 4 ++--
hw/ppc/pnv.c | 7 +++
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index ca27bd39f0ac..251c9854329d 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -52,7 +52,6 @@ struct PnvChip {
uint64_t cores_mask;
PnvCore **cores;
-uint32_t num_phbs;
uint32_t num_pecs;
MemoryRegion xscom_mmio;
@@ -82,6 +81,7 @@ struct Pnv8Chip {
#define PNV8_CHIP_PHB3_MAX 4
PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX];
+uint32_t num_phbs;
XICSFabric*xics;
};
@@ -136,8 +136,8 @@ struct PnvChipClass {
/*< public >*/
uint64_t chip_cfam_id;
uint64_t cores_mask;
-uint32_t num_phbs;
uint32_t num_pecs;
+uint32_t num_phbs;
DeviceRealize parent_realize;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 2b027e299d27..8a3732c982e5 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1099,7 +1099,6 @@ static void pnv_chip_power10_intc_print_info(PnvChip
*chip, PowerPCCPU *cpu,
static void pnv_chip_power8_instance_init(Object *obj)
{
-PnvChip *chip = PNV_CHIP(obj);
Pnv8Chip *chip8 = PNV8_CHIP(obj);
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(obj);
int i;
@@ -1118,10 +1117,10 @@ static void pnv_chip_power8_instance_init(Object *obj)
object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER);
if (defaults_enabled()) {
-chip->num_phbs = pcc->num_phbs;
+chip8->num_phbs = pcc->num_phbs;
}
-for (i = 0; i < chip->num_phbs; i++) {
+for (i = 0; i < chip8->num_phbs; i++) {
object_initialize_child(obj, "phb[*]", &chip8->phbs[i],
TYPE_PNV_PHB3);
}
@@ -1239,7 +1238,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
&chip8->homer.regs);
/* PHB3 controllers */
-for (i = 0; i < chip->num_phbs; i++) {
+for (i = 0; i < chip8->num_phbs; i++) {
PnvPHB3 *phb = &chip8->phbs[i];
object_property_set_int(OBJECT(phb), "index", i, &error_fatal);
Re: [PATCH v4 2/3] acpi: tpm: Add missing device identification objects
On Wed, 22 Dec 2021 21:23:09 -0500
Stefan Berger wrote:
> Add missing device identification objects _STR and _UID. They will appear
why, does it break anything or it's just cosmetic?
> as files 'description' and 'uid' under Linux sysfs.
>
> Cc: Shannon Zhao
> Cc: Michael S. Tsirkin
> Cc: Igor Mammedov
> Cc: Ani Sinha
> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/708
> Signed-off-by: Stefan Berger
> Message-id: 2020133559.3370990-3-stef...@linux.ibm.com
> ---
> hw/arm/virt-acpi-build.c | 1 +
> hw/i386/acpi-build.c | 8
> 2 files changed, 9 insertions(+)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index d0f4867fdf..f2514ce77c 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -229,6 +229,7 @@ static void acpi_dsdt_add_tpm(Aml *scope,
> VirtMachineState *vms)
>
> Aml *dev = aml_device("TPM0");
> aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> +aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
> aml_append(dev, aml_name_decl("_UID", aml_int(0)));
>
> Aml *crs = aml_resource_template();
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 8383b83ee3..2fb70847cb 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1812,11 +1812,15 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> dev = aml_device("TPM");
> aml_append(dev, aml_name_decl("_HID",
>aml_string("MSFT0101")));
> +aml_append(dev,
> + aml_name_decl("_STR",
> + aml_string("TPM 2.0 Device")));
> } else {
> dev = aml_device("ISA.TPM");
> aml_append(dev, aml_name_decl("_HID",
>aml_eisaid("PNP0C31")));
> }
> +aml_append(dev, aml_name_decl("_UID", aml_int(1)));
why it's 1, and not 0 as in virt-arm?
>
> aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
> crs = aml_resource_template();
> @@ -1844,6 +1848,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> if (TPM_IS_CRB(tpm)) {
> dev = aml_device("TPM");
> aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
> +aml_append(dev, aml_name_decl("_STR",
> + aml_string("TPM 2.0 Device")));
> crs = aml_resource_template();
> aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
> TPM_CRB_ADDR_SIZE,
> AML_READ_WRITE));
> @@ -1851,6 +1857,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
>
> aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
>
no necessary ^^^ empty line
> +aml_append(dev, aml_name_decl("_UID", aml_int(1)));
> +
> tpm_build_ppi_acpi(tpm, dev);
>
> aml_append(sb_scope, dev);
Re: [PATCH v2 8/9] hw/dma: Use dma_addr_t type definition when relevant
On Tue, Jan 04, 2022 at 09:54:30AM +0100, Philippe Mathieu-Daudé wrote:
> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> index 462f79a1f60..c3c49176110 100644
> --- a/hw/nvme/ctrl.c
> +++ b/hw/nvme/ctrl.c
> @@ -1147,7 +1147,7 @@ static uint16_t nvme_tx(NvmeCtrl *n, NvmeSg *sg,
> uint8_t *ptr, uint32_t len,
>
> if (sg->flags & NVME_SG_DMA) {
> const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
> -uint64_t residual;
> +dma_addr_t residual;
>
> if (dir == NVME_TX_DIRECTION_TO_DEVICE) {
> residual = dma_buf_write(ptr, len, &sg->qsg, attrs);
If there's a new version: Maybe also change the return value types of
dma_buf_write|read() to dma_addr_t?
It'll be changed anyway in the next patch, so not a big deal.
The rest patches looks good to me. Thanks.
--
Peter Xu
Re: [PATCH v2 00/19] ppc/pnv: Add support for user created PHB3/PHB4 devices
On 12/15/21 13:56, Cédric Le Goater wrote: On 12/13/21 14:28, Cédric Le Goater wrote: Hello, On the POWER8 processor, powernv8 machine, PHB3 devices can simply be created with : -device pnv-phb3,chip-id=0,index=1 with a maximum of 3 PHB3s per chip, each PHB3 adding a new PCIe bus. On the POWER9 processor, powernv9 machine, the logic is different. The the chip comes with 3 PHB4 PECs (PCI Express Controller) and each PEC can have several PHBs : * PEC0 provides 1 PHB (PHB0) * PEC1 provides 2 PHBs (PHB1 and PHB2) * PEC2 provides 3 PHBs (PHB3, PHB4 and PHB5) The PEC devices can be created with : -device pnv-phb4-pec,chip-id=0,index=1 And the number of added PHB4 devices depends on the PEC index. Each PHB4 adds a new PCIe bus. The following changes are mostly cleanups and improvements of the PHB3/4 realize routines to enable support. One important change is related to the way the powernv machine populates the device tree. It depends on the object hierarchy and it is necessary to reparent user created devices to the chip they belong to (see PATCH 5). PHB3 is a little more sophisticated because of its SysBusDevice nature (see PATCH 6). It would be preferable for libvirt and user to add one PHB4 (one PCIe bus) at a time but that's another step. The plan is to merge real soon the first patches which are required cleanups of the models and give some more time for the last ones. Applied patches 1-14 which are simple cleanups to ppc-next. Did you also push patches 15-19? Or these were the ones that you decided to discard? Thanks, Daniel Thanks, C.
Re: [PATCH v2 00/19] ppc/pnv: Add support for user created PHB3/PHB4 devices
On 1/4/22 10:56, Daniel Henrique Barboza wrote: On 12/15/21 13:56, Cédric Le Goater wrote: On 12/13/21 14:28, Cédric Le Goater wrote: Hello, On the POWER8 processor, powernv8 machine, PHB3 devices can simply be created with : -device pnv-phb3,chip-id=0,index=1 with a maximum of 3 PHB3s per chip, each PHB3 adding a new PCIe bus. On the POWER9 processor, powernv9 machine, the logic is different. The the chip comes with 3 PHB4 PECs (PCI Express Controller) and each PEC can have several PHBs : * PEC0 provides 1 PHB (PHB0) * PEC1 provides 2 PHBs (PHB1 and PHB2) * PEC2 provides 3 PHBs (PHB3, PHB4 and PHB5) The PEC devices can be created with : -device pnv-phb4-pec,chip-id=0,index=1 And the number of added PHB4 devices depends on the PEC index. Each PHB4 adds a new PCIe bus. The following changes are mostly cleanups and improvements of the PHB3/4 realize routines to enable support. One important change is related to the way the powernv machine populates the device tree. It depends on the object hierarchy and it is necessary to reparent user created devices to the chip they belong to (see PATCH 5). PHB3 is a little more sophisticated because of its SysBusDevice nature (see PATCH 6). It would be preferable for libvirt and user to add one PHB4 (one PCIe bus) at a time but that's another step. The plan is to merge real soon the first patches which are required cleanups of the models and give some more time for the last ones. Applied patches 1-14 which are simple cleanups to ppc-next. Did you also push patches 15-19? Or these were the ones that you decided to discard? 1-14 are now merged in mainline. I dropped patches 15-19 because they are in the way for your changes. Thanks, C.
Re: [PATCH v2 19/19] ppc/pnv: Move num_phbs under Pnv8Chip
On 1/4/22 10:53, Daniel Henrique Barboza wrote:
On 12/13/21 10:28, Cédric Le Goater wrote:
It is not used elsewhere so that's where it belongs.
Signed-off-by: Cédric Le Goater
---
I am/was using this patch and didn't provide my r-b on it:
Reviewed-by: Daniel Henrique Barboza
Yes. Just resend with your next series.
Thanks,
C.
include/hw/ppc/pnv.h | 4 ++--
hw/ppc/pnv.c | 7 +++
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index ca27bd39f0ac..251c9854329d 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -52,7 +52,6 @@ struct PnvChip {
uint64_t cores_mask;
PnvCore **cores;
- uint32_t num_phbs;
uint32_t num_pecs;
MemoryRegion xscom_mmio;
@@ -82,6 +81,7 @@ struct Pnv8Chip {
#define PNV8_CHIP_PHB3_MAX 4
PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX];
+ uint32_t num_phbs;
XICSFabric *xics;
};
@@ -136,8 +136,8 @@ struct PnvChipClass {
/*< public >*/
uint64_t chip_cfam_id;
uint64_t cores_mask;
- uint32_t num_phbs;
uint32_t num_pecs;
+ uint32_t num_phbs;
DeviceRealize parent_realize;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 2b027e299d27..8a3732c982e5 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1099,7 +1099,6 @@ static void pnv_chip_power10_intc_print_info(PnvChip
*chip, PowerPCCPU *cpu,
static void pnv_chip_power8_instance_init(Object *obj)
{
- PnvChip *chip = PNV_CHIP(obj);
Pnv8Chip *chip8 = PNV8_CHIP(obj);
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(obj);
int i;
@@ -1118,10 +1117,10 @@ static void pnv_chip_power8_instance_init(Object *obj)
object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER);
if (defaults_enabled()) {
- chip->num_phbs = pcc->num_phbs;
+ chip8->num_phbs = pcc->num_phbs;
}
- for (i = 0; i < chip->num_phbs; i++) {
+ for (i = 0; i < chip8->num_phbs; i++) {
object_initialize_child(obj, "phb[*]", &chip8->phbs[i],
TYPE_PNV_PHB3);
}
@@ -1239,7 +1238,7 @@ static void pnv_chip_power8_realize(DeviceState *dev,
Error **errp)
&chip8->homer.regs);
/* PHB3 controllers */
- for (i = 0; i < chip->num_phbs; i++) {
+ for (i = 0; i < chip8->num_phbs; i++) {
PnvPHB3 *phb = &chip8->phbs[i];
object_property_set_int(OBJECT(phb), "index", i, &error_fatal);
Re: [PATCH 5/9] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp
On 1/3/22 23:07, Fabiano Rosas wrote:
The ppc_interrupts_little_endian function is suitable for determining
the endianness of interrupts for all Book3S CPUs.
(I'm keeping the MSR check for the rest of the CPUs, but it will go
away in the next patch.)
Signed-off-by: Fabiano Rosas
---
target/ppc/excp_helper.c | 21 ++---
1 file changed, 2 insertions(+), 19 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 0dbadc5d07..5d31940426 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -760,25 +760,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp)
* CPU, the HV mode, etc...
*/
#ifdef TARGET_PPC64
-if (excp_model == POWERPC_EXCP_POWER7) {
-if (!(new_msr & MSR_HVB) && (env->spr[SPR_LPCR] & LPCR_ILE)) {
-new_msr |= (target_ulong)1 << MSR_LE;
-}
-} else if (excp_model == POWERPC_EXCP_POWER8) {
-if (new_msr & MSR_HVB) {
-if (env->spr[SPR_HID0] & HID0_HILE) {
-new_msr |= (target_ulong)1 << MSR_LE;
-}
-} else if (env->spr[SPR_LPCR] & LPCR_ILE) {
-new_msr |= (target_ulong)1 << MSR_LE;
-}
-} else if (excp_model == POWERPC_EXCP_POWER9 ||
- excp_model == POWERPC_EXCP_POWER10) {
-if (new_msr & MSR_HVB) {
-if (env->spr[SPR_HID0] & HID0_POWER9_HILE) {
-new_msr |= (target_ulong)1 << MSR_LE;
-}
-} else if (env->spr[SPR_LPCR] & LPCR_ILE) {
+if (excp_model >= POWERPC_EXCP_970) {
why include POWERPC_EXCP_970 ? These CPUs do not support Little Endian.
Thanks,
C.
+if (ppc_interrupts_little_endian(cpu, !!(new_msr & MSR_HVB))) {
new_msr |= (target_ulong)1 << MSR_LE;
}
} else if (msr_ile) {
Re: [PATCH v3 kvm/queue 14/16] KVM: Handle page fault for private memory
On Tue, Jan 04, 2022 at 05:10:08PM +0800, Chao Peng wrote:
> On Tue, Jan 04, 2022 at 09:46:35AM +0800, Yan Zhao wrote:
> > On Thu, Dec 23, 2021 at 08:30:09PM +0800, Chao Peng wrote:
> > > When a page fault from the secondary page table while the guest is
> > > running happens in a memslot with KVM_MEM_PRIVATE, we need go
> > > different paths for private access and shared access.
> > >
> > > - For private access, KVM checks if the page is already allocated in
> > > the memory backend, if yes KVM establishes the mapping, otherwise
> > > exits to userspace to convert a shared page to private one.
> > >
> > will this conversion be atomical or not?
> > For example, after punching a hole in a private memory slot, will KVM
> > see two notifications: one for invalidation of the whole private memory
> > slot, and one for fallocate of the rest ranges besides the hole?
> > Or, KVM only sees one invalidation notification for the hole?
>
> Punching hole doesn't need to invalidate the whole memory slot. It only
> send one invalidation notification to KVM for the 'hole' part.
good :)
>
> Taking shared-to-private conversion as example it only invalidates the
> 'hole' part (that usually only the portion of the whole memory) on the
> shared fd,, and then fallocate the private memory in the private fd at
> the 'hole'. The KVM invalidation notification happens when the shared
> hole gets invalidated. The establishment of the private mapping happens
> at subsequent KVM page fault handlers.
>
> > Could you please show QEMU code about this conversion?
>
> See below for the QEMU side conversion code. The above described
> invalidation and fallocation will be two steps in this conversion. If
> error happens in the middle then this error will be propagated to
> kvm_run to do the proper action (e.g. may kill the guest?).
>
> int ram_block_convert_range(RAMBlock *rb, uint64_t start, size_t length,
> bool shared_to_private)
> {
> int ret;
> int fd_from, fd_to;
>
> if (!rb || rb->private_fd <= 0) {
> return -1;
> }
>
> if (!QEMU_PTR_IS_ALIGNED(start, rb->page_size) ||
> !QEMU_PTR_IS_ALIGNED(length, rb->page_size)) {
> return -1;
> }
>
> if (length > rb->max_length) {
> return -1;
> }
>
> if (shared_to_private) {
> fd_from = rb->fd;
> fd_to = rb->private_fd;
> } else {
> fd_from = rb->private_fd;
> fd_to = rb->fd;
> }
>
> ret = ram_block_discard_range_fd(rb, start, length, fd_from);
> if (ret) {
> return ret;
> }
>
> if (fd_to > 0) {
> return fallocate(fd_to, 0, start, length);
> }
>
> return 0;
> }
>
Thanks. So QEMU will re-generate memslots and set KVM_MEM_PRIVATE
accordingly? Will it involve slot deletion and create?
> >
> >
> > > - For shared access, KVM also checks if the page is already allocated
> > > in the memory backend, if yes then exit to userspace to convert a
> > > private page to shared one, otherwise it's treated as a traditional
> > > hva-based shared memory, KVM lets existing code to obtain a pfn with
> > > get_user_pages() and establish the mapping.
> > >
> > > The above code assume private memory is persistent and pre-allocated in
> > > the memory backend so KVM can use this information as an indicator for
> > > a page is private or shared. The above check is then performed by
> > > calling kvm_memfd_get_pfn() which currently is implemented as a
> > > pagecache search but in theory that can be implemented differently
> > > (i.e. when the page is even not mapped into host pagecache there should
> > > be some different implementation).
> > >
> > > Signed-off-by: Yu Zhang
> > > Signed-off-by: Chao Peng
> > > ---
> > > arch/x86/kvm/mmu/mmu.c | 73 --
> > > arch/x86/kvm/mmu/paging_tmpl.h | 11 +++--
> > > 2 files changed, 77 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> > > index 2856eb662a21..fbcdf62f8281 100644
> > > --- a/arch/x86/kvm/mmu/mmu.c
> > > +++ b/arch/x86/kvm/mmu/mmu.c
> > > @@ -2920,6 +2920,9 @@ int kvm_mmu_max_mapping_level(struct kvm *kvm,
> > > if (max_level == PG_LEVEL_4K)
> > > return PG_LEVEL_4K;
> > >
> > > + if (kvm_slot_is_private(slot))
> > > + return max_level;
> > > +
> > > host_level = host_pfn_mapping_level(kvm, gfn, pfn, slot);
> > > return min(host_level, max_level);
> > > }
> > > @@ -3950,7 +3953,59 @@ static bool kvm_arch_setup_async_pf(struct
> > > kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
> > > kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
> > > }
> > >
> > > -static bool kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault
> > > *fault, int *r)
> > > +static bool kvm_vcpu_is_private_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
> > > +{
> > > + /*
> > > + * At this time private gfn has not be
[PATCH] docs/tools/qemu-trace-stap.rst: Do not hard-code the QEMU binary name
In downstream, we want to use a different name for the QEMU binary, and some people might also use the docs for non-x86 binaries, that's why we already created the |qemu_system| placeholder in the past. Use it now in the stap trace doc, too. Signed-off-by: Thomas Huth --- docs/tools/qemu-trace-stap.rst | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/docs/tools/qemu-trace-stap.rst b/docs/tools/qemu-trace-stap.rst index d53073b52b..2169ce5d17 100644 --- a/docs/tools/qemu-trace-stap.rst +++ b/docs/tools/qemu-trace-stap.rst @@ -46,19 +46,19 @@ The following commands are valid: any of the listed names. If no *PATTERN* is given, the all possible probes will be listed. - For example, to list all probes available in the ``qemu-system-x86_64`` + For example, to list all probes available in the |qemu_system| binary: - :: + .. parsed-literal:: -$ qemu-trace-stap list qemu-system-x86_64 +$ qemu-trace-stap list |qemu_system| To filter the list to only cover probes related to QEMU's cryptographic subsystem, in a binary outside ``$PATH`` - :: + .. parsed-literal:: -$ qemu-trace-stap list /opt/qemu/4.0.0/bin/qemu-system-x86_64 'qcrypto*' +$ qemu-trace-stap list /opt/qemu/|version|/bin/|qemu_system| 'qcrypto*' .. option:: run OPTIONS BINARY PATTERN... @@ -90,26 +90,26 @@ The following commands are valid: Restrict the tracing session so that it only triggers for the process identified by *PID*. - For example, to monitor all processes executing ``qemu-system-x86_64`` + For example, to monitor all processes executing |qemu_system| as found on ``$PATH``, displaying all I/O related probes: - :: + .. parsed-literal:: -$ qemu-trace-stap run qemu-system-x86_64 'qio*' +$ qemu-trace-stap run |qemu_system| 'qio*' To monitor only the QEMU process with PID 1732 - :: + .. parsed-literal:: -$ qemu-trace-stap run --pid=1732 qemu-system-x86_64 'qio*' +$ qemu-trace-stap run --pid=1732 |qemu_system| 'qio*' To monitor QEMU processes running an alternative binary outside of ``$PATH``, displaying verbose information about setup of the tracing environment: - :: + .. parsed-literal:: -$ qemu-trace-stap -v run /opt/qemu/4.0.0/qemu-system-x86_64 'qio*' +$ qemu-trace-stap -v run /opt/qemu/|version|/bin/|qemu_system| 'qio*' See also -- 2.27.0
Re: [PATCH 0/3] Reorg ppc64 pmu insn counting
Daniel Henrique Barboza writes: > On 1/3/22 12:07, Alex Bennée wrote: >> Daniel Henrique Barboza writes: >> >>> On 12/23/21 00:01, Richard Henderson wrote: In contrast to Daniel's version, the code stays in power8-pmu.c, but is better organized to not take so much overhead. Before: 32.97% qemu-system-ppc qemu-system-ppc64 [.] pmc_get_event 20.22% qemu-system-ppc qemu-system-ppc64 [.] helper_insns_inc 4.52% qemu-system-ppc qemu-system-ppc64 [.] hreg_compute_hflags_value 3.30% qemu-system-ppc qemu-system-ppc64 [.] helper_lookup_tb_ptr 2.68% qemu-system-ppc qemu-system-ppc64 [.] tcg_gen_code 2.28% qemu-system-ppc qemu-system-ppc64 [.] cpu_exec 1.84% qemu-system-ppc qemu-system-ppc64 [.] pmu_insn_cnt_enabled After: 8.42% qemu-system-ppc qemu-system-ppc64 [.] hreg_compute_hflags_value 6.65% qemu-system-ppc qemu-system-ppc64 [.] cpu_exec 6.63% qemu-system-ppc qemu-system-ppc64 [.] helper_insns_inc >>> >>> Thanks for looking this up. I had no idea the original C code was that slow. >>> >> >>> >>> With that in mind I decided to post a new version of my TCG rework, with >>> less repetition and >>> a bit more concise, to have an alternative that can be used upstream to fix >>> the Avocado tests. >>> Meanwhile I'll see if I can get your reorg working with all EBB tests we >>> need. All things >>> equal - similar performance, all EBB tests passing - I'd rather stay with >>> your C code than my >>> TCG rework since yours doesn't rely on TCG Ops knowledge to maintain >>> it. >> Reading this series did make me wonder if we need a more generic >> service >> from the TCG for helping with "internal" instrumentation needed for >> things like decent PMU emulation. We haven't gone as much for it in ARM >> yet but it would be nice to. It would be even nicer if such a facility >> could be used by stuff like icount as well so we don't end up doing the >> same thing twice. > > Back in May 2021 when I first starting working on this code I tried to base > myself in the > ARM PMU code. In fact, the cycle and insn calculation done in the very first > version of > this work was based on what ARM does in target/arm/helper.c, > cycles_get_count() and > instructions_get_count(). The cycle calculation got simplified because our > PPC64 CPU > has a 1Ghz clock so it's easier to just consider 1ns = 1 cycle. > > For instruction count, aside from my 2-3 weeks of spectacular failures trying > to count > instructions inside translate.c, I also looked into how TCG plugins work and > tried to do > something similar to what plugin_gen_tb_end() does at the end of the > translator_loop() > in accel/tcg/translator.c. For some reason I wasn't able to replicate the > same behavior > that I would have if I used the TCG plugin framework in the > 'canonical' way. plugin_gen_tb_end is probably overkill because we should already know how many instructions there are in a translated block on account of the insn_start and insn_end ops that mark them. In fact see gen_tb_end() which is where icount updates the value used in the decrement at the start of each block. Assuming no synchronous exceptions occur you could just increment a counter at the end of the block as no async IRQs will occur until we have executed all of those instructions. Of course it's never quite so simple and when running in full icount mode we have to take into account exceptions that can be triggered by IO accesses. This involves doing a re-translation to ensures the IO instruction is always the last we execute. I'm guessing for PMU counters to be somewhat correct we would want to ensure updates throughout the block (before each memory op and helper call). This would hopefully avoid the cost of "full" icount support which is only single threaded. However this is the opposite to icount's budget and pre-decrement approach which feels messier than it could be. > I ended up doing something similar to what instructions_get_count() from ARM > does, which > relies on icount. Richard then aided me in figuring out that I could count > instructions > directly by tapping into the end of each TB. instructions_get_count will also work without icount but is affected by wall clock time distortions in that case. > So, for a generic service of sorts I believe it would be nice to re-use the > TCG plugins > API in the internal instrumentation (I tried it once, failed, not sure if I > messed up > or it's not possible ATM). That would be a good start to try to get all this > logic in a > generic code for internal translate code to use. Agreed - although the plugin specific stuff is really just focused on our limited visibility API. Unless you are referring to accel/tcg/plugin-gen.c which are just helpers for manipulating the TCG ops after the initial translation. -- Alex Bennée
Re: [PATCH] docs/tools/qemu-trace-stap.rst: Do not hard-code the QEMU binary name
On 4/1/22 11:33, Thomas Huth wrote: In downstream, we want to use a different name for the QEMU binary, and some people might also use the docs for non-x86 binaries, that's why we already created the |qemu_system| placeholder in the past. Use it now in the stap trace doc, too. Signed-off-by: Thomas Huth --- docs/tools/qemu-trace-stap.rst | 24 1 file changed, 12 insertions(+), 12 deletions(-) Reviewed-by: Philippe Mathieu-Daudé
Re: [RFC PATCH 2/2] tests/tcg/mips64el: Run float tests
Philippe Mathieu-Daudé writes: > On 12/26/21 03:25, Jiaxun Yang wrote: >> 在2021年12月26日十二月 上午12:19，Philippe Mathieu-Daudé写道： >>> Unfortunately this fails: >>> >>> $ make run-tcg-tests-mips64el-linux-user >>> ... >>> Files float_convs.out and tests/tcg/mips64el/float_convs.ref differ >>> --- float_convs.out 2021-12-26 01:03:48.585973637 +0100 >>> +++ tests/tcg/mips64el/float_convs.ref 2021-12-26 00:29:35.804465340 >>> +0100 >>> @@ -1,40 +1,40 @@ >>>### Rounding to nearest >>> -from single: f32(nan:0x) >>> - to double: f64(nan:0x007ff7) (INVALID) >>> - to int32: 2147483647 (INVALID) >>> - to int64: 9223372036854775807 (INVALID) >>> - to uint32: 2147483647 (INVALID) >>> - to uint64: 9223372036854775807 (INVALID) >>> make[2]: *** [tests/tcg/multiarch/Makefile.target:32: run-float_convs] >>> Error 1 >>> >>> Signed-off-by: Philippe Mathieu-Daudé >>> --- >>> tests/tcg/mips64el/Makefile.target | 2 ++ >>> 1 file changed, 2 insertions(+) >>> create mode 100644 tests/tcg/mips64el/Makefile.target >>> >>> diff --git a/tests/tcg/mips64el/Makefile.target >>> b/tests/tcg/mips64el/Makefile.target >>> new file mode 100644 >>> index 000..dcb1e9d72ac >>> --- /dev/null >>> +++ b/tests/tcg/mips64el/Makefile.target >>> @@ -0,0 +1,2 @@ >>> +float_%: CFLAGS+=-march=loongson3a >>> +float_%: QEMU_OPTS+=-cpu Loongson-3A4000 >> >> Hmm, -march=loongson3a assumed legacy NaN while our -cpu Loongson-3A4000 >> assumed IEEE 754-2008 style NaN. >> >> I guess switch to Loongson-3A1000 can help? > > Nop, exactly the same error. > > Also, float_madds fails as: > > Files float_madds.out and tests/tcg/mips64el/float_madds.ref differ > --- float_madds.out 2021-12-26 11:49:06.018532269 +0100 > +++ tests/tcg/mips64el/float_madds.ref 2021-12-26 01:16:02.269497182 +0100 > @@ -1,16 +1,16 @@ > ### Rounding to nearest > -op : f32(nan:0x) * f32(nan:0xffbf) + f32(-inf:0xff80) > -res: f32(nan:0x7fbf) flags=INVALID (0/0) > -op : f32(nan:0xffbf) * f32(-inf:0xff80) + f32(nan:0x) > -res: f32(nan:0x7fbf) flags=INVALID (0/1) > -op : f32(-inf:0xff80) * f32(nan:0x) + f32(nan:0xffbf) > -res: f32(nan:0x7fbf) flags=INVALID (0/2) > make[2]: *** [tests/tcg/multiarch/Makefile.target:30: run-float_madds] > Error 1 That looks like the test just stops (rather than differs slightly) - which is weird because I would expect that to fail before attempting to compare to the reference. -- Alex Bennée
Re: [PATCH] gitlab-ci: Enable docs in the centos job
On Tue, Jan 4, 2022 at 10:12 AM Thomas Huth wrote: > > We just ran into a problem that the docs don't build on RHEL8 / CentOS 8 > anymore. Seems like these distros are using one of the oldest Sphinx > versions that we still have to support. Thus enable the docs build in > the CI on CentOS so that such bugs don't slip in so easily again. > > Signed-off-by: Thomas Huth > --- > Based-on: <20220104074649.1712440-1-marcandre.lur...@redhat.com> > > .gitlab-ci.d/buildtest.yml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Philippe Mathieu-Daudé
[PATCH v2] linux-user: don't adjust base of found hole
The pgb_find_hole function goes to the trouble of taking account of
both mmap_min_addr and any offset we've applied to decide the starting
address of a potential hole. This is especially important for
emulating 32bit ARM in a 32bit build as we have applied the offset to
ensure there will be space to map the ARM_COMMPAGE bellow the main
guest map (using wrapped arithmetic).
Signed-off-by: Alex Bennée
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/690
---
v2
- also make same adjustment to fallback
---
linux-user/elfload.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 238979b8b6..fa9dae5f3f 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -2293,8 +2293,7 @@ static uintptr_t pgb_find_hole(uintptr_t guest_loaddr,
uintptr_t guest_size,
brk = (uintptr_t)sbrk(0);
if (!maps) {
-ret = pgd_find_hole_fallback(guest_size, brk, align, offset);
-return ret == -1 ? -1 : ret - guest_loaddr;
+return pgd_find_hole_fallback(guest_size, brk, align, offset);
}
/* The first hole is before the first map entry. */
@@ -2334,7 +2333,7 @@ static uintptr_t pgb_find_hole(uintptr_t guest_loaddr,
uintptr_t guest_size,
/* Record the lowest successful match. */
if (ret < 0) {
-ret = align_start - guest_loaddr;
+ret = align_start;
}
/* If this hole contains the identity map, select it. */
if (align_start <= guest_loaddr &&
--
2.30.2
Re: [PATCH v2 1/6] linux-user: Split out do_prctl and subroutines
Le 27/12/2021 à 16:01, Richard Henderson a écrit :
Since the prctl constants are supposed to be generic, supply
any that are not provided by the host.
Split out subroutines for PR_GET_FP_MODE, PR_SET_FP_MODE,
PR_GET_VL, PR_SET_VL, PR_RESET_KEYS, PR_SET_TAGGED_ADDR_CTRL,
PR_GET_TAGGED_ADDR_CTRL. Return EINVAL for guests that do
not support these options rather than pass them on to the host.
Reviewed-by: Laurent Vivier
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
linux-user/aarch64/target_prctl.h| 160 ++
linux-user/aarch64/target_syscall.h | 23 --
linux-user/alpha/target_prctl.h | 1 +
linux-user/arm/target_prctl.h| 1 +
linux-user/cris/target_prctl.h | 1 +
linux-user/hexagon/target_prctl.h| 1 +
linux-user/hppa/target_prctl.h | 1 +
linux-user/i386/target_prctl.h | 1 +
linux-user/m68k/target_prctl.h | 1 +
linux-user/microblaze/target_prctl.h | 1 +
linux-user/mips/target_prctl.h | 88 ++
linux-user/mips/target_syscall.h | 6 -
linux-user/mips64/target_prctl.h | 1 +
linux-user/mips64/target_syscall.h | 6 -
linux-user/nios2/target_prctl.h | 1 +
linux-user/openrisc/target_prctl.h | 1 +
linux-user/ppc/target_prctl.h| 1 +
linux-user/riscv/target_prctl.h | 1 +
linux-user/s390x/target_prctl.h | 1 +
linux-user/sh4/target_prctl.h| 1 +
linux-user/sparc/target_prctl.h | 1 +
linux-user/x86_64/target_prctl.h | 1 +
linux-user/xtensa/target_prctl.h | 1 +
linux-user/syscall.c | 433 +--
24 files changed, 414 insertions(+), 320 deletions(-)
create mode 100644 linux-user/aarch64/target_prctl.h
create mode 100644 linux-user/alpha/target_prctl.h
create mode 100644 linux-user/arm/target_prctl.h
create mode 100644 linux-user/cris/target_prctl.h
create mode 100644 linux-user/hexagon/target_prctl.h
create mode 100644 linux-user/hppa/target_prctl.h
create mode 100644 linux-user/i386/target_prctl.h
create mode 100644 linux-user/m68k/target_prctl.h
create mode 100644 linux-user/microblaze/target_prctl.h
create mode 100644 linux-user/mips/target_prctl.h
create mode 100644 linux-user/mips64/target_prctl.h
create mode 100644 linux-user/nios2/target_prctl.h
create mode 100644 linux-user/openrisc/target_prctl.h
create mode 100644 linux-user/ppc/target_prctl.h
create mode 100644 linux-user/riscv/target_prctl.h
create mode 100644 linux-user/s390x/target_prctl.h
create mode 100644 linux-user/sh4/target_prctl.h
create mode 100644 linux-user/sparc/target_prctl.h
create mode 100644 linux-user/x86_64/target_prctl.h
create mode 100644 linux-user/xtensa/target_prctl.h
diff --git a/linux-user/aarch64/target_prctl.h
b/linux-user/aarch64/target_prctl.h
new file mode 100644
index 00..3f5a5d3933
--- /dev/null
+++ b/linux-user/aarch64/target_prctl.h
@@ -0,0 +1,160 @@
+/*
+ * AArch64 specific prctl functions for linux-user
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#ifndef AARCH64_TARGET_PRCTL_H
+#define AARCH64_TARGET_PRCTL_H
+
+static abi_long do_prctl_get_vl(CPUArchState *env)
+{
+ARMCPU *cpu = env_archcpu(env);
+if (cpu_isar_feature(aa64_sve, cpu)) {
+return ((cpu->env.vfp.zcr_el[1] & 0xf) + 1) * 16;
+}
+return -TARGET_EINVAL;
+}
+#define do_prctl_get_vl do_prctl_get_vl
+
+static abi_long do_prctl_set_vl(CPUArchState *env, abi_long arg2)
+{
+/*
+ * We cannot support either PR_SVE_SET_VL_ONEXEC or PR_SVE_VL_INHERIT.
+ * Note the kernel definition of sve_vl_valid allows for VQ=512,
+ * i.e. VL=8192, even though the current architectural maximum is VQ=16.
+ */
+if (cpu_isar_feature(aa64_sve, env_archcpu(env))
+&& arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
+ARMCPU *cpu = env_archcpu(env);
+uint32_t vq, old_vq;
+
+old_vq = (env->vfp.zcr_el[1] & 0xf) + 1;
+vq = MAX(arg2 / 16, 1);
+vq = MIN(vq, cpu->sve_max_vq);
+
+if (vq < old_vq) {
+aarch64_sve_narrow_vq(env, vq);
+}
+env->vfp.zcr_el[1] = vq - 1;
+arm_rebuild_hflags(env);
+return vq * 16;
+}
+return -TARGET_EINVAL;
+}
+#define do_prctl_set_vl do_prctl_set_vl
+
+static abi_long do_prctl_reset_keys(CPUArchState *env, abi_long arg2)
+{
+ARMCPU *cpu = env_archcpu(env);
+
+if (cpu_isar_feature(aa64_pauth, cpu)) {
+int all = (PR_PAC_APIAKEY | PR_PAC_APIBKEY |
+ PR_PAC_APDAKEY | PR_PAC_APDBKEY | PR_PAC_APGAKEY);
+int ret = 0;
+Error *err = NULL;
+
+if (arg2 == 0) {
+arg2 = all;
+} else if (arg2 & ~all) {
+return -TARGET_EINVAL;
+}
+if (arg2 & PR_PAC_APIAKEY) {
+ret |= qemu_guest_getrandom(&env->keys.apia,
+sizeof(ARMPACKey), &err);
+}
+if (arg2 &
Re: [PATCH v2 2/6] linux-user: Disable more prctl subcodes
Le 27/12/2021 à 16:01, Richard Henderson a écrit : Create a list of subcodes that we want to pass on, a list of subcodes that should not be passed on because they would affect the running qemu itself, and a list that probably could be implemented but require extra work. Do not pass on unknown subcodes. Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- v2: Log unknown prctl options. --- linux-user/syscall.c | 58 +--- 1 file changed, 55 insertions(+), 3 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 0f0f67d567..d868ef2910 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -6337,6 +6337,13 @@ abi_long do_arch_prctl(CPUX86State *env, int code, abi_ulong addr) # define PR_MTE_TAG_SHIFT 3 # define PR_MTE_TAG_MASK(0xUL << PR_MTE_TAG_SHIFT) #endif +#ifndef PR_SET_IO_FLUSHER +# define PR_SET_IO_FLUSHER 57 +# define PR_GET_IO_FLUSHER 58 +#endif +#ifndef PR_SET_SYSCALL_USER_DISPATCH +# define PR_SET_SYSCALL_USER_DISPATCH 59 +#endif #include "target_prctl.h" @@ -6433,13 +6440,58 @@ static abi_long do_prctl(CPUArchState *env, abi_long option, abi_long arg2, return -TARGET_EINVAL; } return do_prctl_get_tagged_addr_ctrl(env); + +case PR_GET_DUMPABLE: +case PR_SET_DUMPABLE: +case PR_GET_KEEPCAPS: +case PR_SET_KEEPCAPS: +case PR_GET_TIMING: +case PR_SET_TIMING: +case PR_GET_TIMERSLACK: +case PR_SET_TIMERSLACK: +case PR_MCE_KILL: +case PR_MCE_KILL_GET: +case PR_GET_NO_NEW_PRIVS: +case PR_SET_NO_NEW_PRIVS: +case PR_GET_IO_FLUSHER: +case PR_SET_IO_FLUSHER: +/* Some prctl options have no pointer arguments and we can pass on. */ +return get_errno(prctl(option, arg2, arg3, arg4, arg5)); + +case PR_GET_CHILD_SUBREAPER: +case PR_SET_CHILD_SUBREAPER: +case PR_GET_SPECULATION_CTRL: +case PR_SET_SPECULATION_CTRL: +case PR_GET_TID_ADDRESS: +/* TODO */ +return -TARGET_EINVAL; + +case PR_GET_FPEXC: +case PR_SET_FPEXC: +/* Was used for SPE on PowerPC. */ +return -TARGET_EINVAL; + +case PR_GET_ENDIAN: +case PR_SET_ENDIAN: +case PR_GET_FPEMU: +case PR_SET_FPEMU: +case PR_SET_MM: case PR_GET_SECCOMP: case PR_SET_SECCOMP: -/* Disable seccomp to prevent the target disabling syscalls we need. */ +case PR_SET_SYSCALL_USER_DISPATCH: +case PR_GET_THP_DISABLE: +case PR_SET_THP_DISABLE: +case PR_GET_TSC: +case PR_SET_TSC: +case PR_GET_UNALIGN: +case PR_SET_UNALIGN: +/* Disable to prevent the target disabling stuff we need. */ return -TARGET_EINVAL; + default: -/* Most prctl options have no pointer arguments */ -return get_errno(prctl(option, arg2, arg3, arg4, arg5)); +qemu_log_mask(LOG_UNIMP, "Unsupported prctl: " TARGET_ABI_FMT_ld "\n", + option); +return -TARGET_EINVAL; } } Applied to my linux-user-for-7.0 branch. Thanks, Laurent
Re: [PATCH v2 5/6] target/hppa: Implement prctl_unalign_sigbus
Le 27/12/2021 à 16:01, Richard Henderson a écrit :
Leave TARGET_ALIGNED_ONLY set, but use the new CPUState
flag to set MO_UNALN for the instructions that the kernel
handles in the unaligned trap.
Signed-off-by: Richard Henderson
---
linux-user/hppa/target_prctl.h | 2 +-
target/hppa/cpu.h | 5 -
target/hppa/translate.c| 19 +++
3 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/linux-user/hppa/target_prctl.h b/linux-user/hppa/target_prctl.h
index eb53b31ad5..5629ddbf39 100644
--- a/linux-user/hppa/target_prctl.h
+++ b/linux-user/hppa/target_prctl.h
@@ -1 +1 @@
-/* No special prctl support required. */
+#include "../generic/target_prctl_unalign.h"
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 294fd7297f..45fd338b02 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -259,12 +259,14 @@ static inline target_ulong hppa_form_gva(CPUHPPAState
*env, uint64_t spc,
return hppa_form_gva_psw(env->psw, spc, off);
}
-/* Since PSW_{I,CB} will never need to be in tb->flags, reuse them.
+/*
+ * Since PSW_{I,CB} will never need to be in tb->flags, reuse them.
* TB_FLAG_SR_SAME indicates that SR4 through SR7 all contain the
* same value.
*/
#define TB_FLAG_SR_SAME PSW_I
#define TB_FLAG_PRIV_SHIFT 8
+#define TB_FLAG_UNALIGN 0x400
static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, target_ulong *pc,
target_ulong *cs_base,
@@ -279,6 +281,7 @@ static inline void cpu_get_tb_cpu_state(CPUHPPAState *env,
target_ulong *pc,
#ifdef CONFIG_USER_ONLY
*pc = env->iaoq_f & -4;
*cs_base = env->iaoq_b & -4;
+flags |= TB_FLAG_UNALIGN * !env_cpu(env)->prctl_unalign_sigbus;
#else
/* ??? E, T, H, L, B, P bits need to be here, when implemented. */
flags |= env->psw & (PSW_W | PSW_C | PSW_D);
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 952027a28e..a2392a1b64 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -274,8 +274,18 @@ typedef struct DisasContext {
int mmu_idx;
int privilege;
bool psw_n_nonzero;
+
+#ifdef CONFIG_USER_ONLY
+MemOp unalign;
+#endif
} DisasContext;
+#ifdef CONFIG_USER_ONLY
+#define UNALIGN(C) (C)->unalign
+#else
+#define UNALIGN(C) 0
+#endif
+
/* Note that ssm/rsm instructions number PSW_W and PSW_E differently. */
static int expand_sm_imm(DisasContext *ctx, int val)
{
@@ -1475,7 +1485,7 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest,
unsigned rb,
form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
ctx->mmu_idx == MMU_PHYS_IDX);
-tcg_gen_qemu_ld_reg(dest, addr, ctx->mmu_idx, mop);
+tcg_gen_qemu_ld_reg(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
if (modify) {
save_gpr(ctx, rb, ofs);
}
@@ -1493,7 +1503,7 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest,
unsigned rb,
form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
ctx->mmu_idx == MMU_PHYS_IDX);
-tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop);
+tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
if (modify) {
save_gpr(ctx, rb, ofs);
}
@@ -1511,7 +1521,7 @@ static void do_store_32(DisasContext *ctx, TCGv_i32 src,
unsigned rb,
form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
ctx->mmu_idx == MMU_PHYS_IDX);
-tcg_gen_qemu_st_i32(src, addr, ctx->mmu_idx, mop);
+tcg_gen_qemu_st_i32(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
if (modify) {
save_gpr(ctx, rb, ofs);
}
@@ -1529,7 +1539,7 @@ static void do_store_64(DisasContext *ctx, TCGv_i64 src,
unsigned rb,
form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
ctx->mmu_idx == MMU_PHYS_IDX);
-tcg_gen_qemu_st_i64(src, addr, ctx->mmu_idx, mop);
+tcg_gen_qemu_st_i64(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
if (modify) {
save_gpr(ctx, rb, ofs);
}
@@ -4107,6 +4117,7 @@ static void hppa_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
ctx->mmu_idx = MMU_USER_IDX;
ctx->iaoq_f = ctx->base.pc_first | MMU_USER_IDX;
ctx->iaoq_b = ctx->base.tb->cs_base | MMU_USER_IDX;
+ctx->unalign = (ctx->tb_flags & TB_FLAG_UNALIGN ? MO_UNALN : MO_ALIGN);
#else
ctx->privilege = (ctx->tb_flags >> TB_FLAG_PRIV_SHIFT) & 3;
ctx->mmu_idx = (ctx->tb_flags & PSW_D ? ctx->privilege : MMU_PHYS_IDX);
Applied to my linux-user-for-7.0 branch.
Thanks,
Laurent
Re: [PATCH v2 4/6] target/alpha: Implement prctl_unalign_sigbus
Le 27/12/2021 à 16:01, Richard Henderson a écrit :
Leave TARGET_ALIGNED_ONLY set, but use the new CPUState
flag to set MO_UNALN for the instructions that the kernel
handles in the unaligned trap.
Signed-off-by: Richard Henderson
---
linux-user/alpha/target_prctl.h | 2 +-
target/alpha/cpu.h | 5 +
target/alpha/translate.c| 31 ++-
3 files changed, 28 insertions(+), 10 deletions(-)
diff --git a/linux-user/alpha/target_prctl.h b/linux-user/alpha/target_prctl.h
index eb53b31ad5..5629ddbf39 100644
--- a/linux-user/alpha/target_prctl.h
+++ b/linux-user/alpha/target_prctl.h
@@ -1 +1 @@
-/* No special prctl support required. */
+#include "../generic/target_prctl_unalign.h"
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index afd975c878..e819211503 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -383,6 +383,8 @@ enum {
#define ENV_FLAG_TB_MASK \
(ENV_FLAG_PAL_MODE | ENV_FLAG_PS_USER | ENV_FLAG_FEN)
+#define TB_FLAG_UNALIGN (1u << 1)
+
static inline int cpu_mmu_index(CPUAlphaState *env, bool ifetch)
{
int ret = env->flags & ENV_FLAG_PS_USER ? MMU_USER_IDX : MMU_KERNEL_IDX;
@@ -470,6 +472,9 @@ static inline void cpu_get_tb_cpu_state(CPUAlphaState *env,
target_ulong *pc,
*pc = env->pc;
*cs_base = 0;
*pflags = env->flags & ENV_FLAG_TB_MASK;
+#ifdef CONFIG_USER_ONLY
+*pflags |= TB_FLAG_UNALIGN * !env_cpu(env)->prctl_unalign_sigbus;
+#endif
}
#ifdef CONFIG_USER_ONLY
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index a4c3f43e72..208ae5fbd5 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -45,7 +45,9 @@ typedef struct DisasContext DisasContext;
struct DisasContext {
DisasContextBase base;
-#ifndef CONFIG_USER_ONLY
+#ifdef CONFIG_USER_ONLY
+MemOp unalign;
+#else
uint64_t palbr;
#endif
uint32_t tbflags;
@@ -68,6 +70,12 @@ struct DisasContext {
TCGv sink;
};
+#ifdef CONFIG_USER_ONLY
+#define UNALIGN(C) (C)->unalign
+#else
+#define UNALIGN(C) 0
+#endif
+
/* Target-specific return values from translate_one, indicating the
state of the TB. Note that DISAS_NEXT indicates that we are not
exiting the TB. */
@@ -270,7 +278,7 @@ static inline DisasJumpType gen_invalid(DisasContext *ctx)
static void gen_ldf(DisasContext *ctx, TCGv dest, TCGv addr)
{
TCGv_i32 tmp32 = tcg_temp_new_i32();
-tcg_gen_qemu_ld_i32(tmp32, addr, ctx->mem_idx, MO_LEUL);
+tcg_gen_qemu_ld_i32(tmp32, addr, ctx->mem_idx, MO_LEUL | UNALIGN(ctx));
gen_helper_memory_to_f(dest, tmp32);
tcg_temp_free_i32(tmp32);
}
@@ -278,7 +286,7 @@ static void gen_ldf(DisasContext *ctx, TCGv dest, TCGv addr)
static void gen_ldg(DisasContext *ctx, TCGv dest, TCGv addr)
{
TCGv tmp = tcg_temp_new();
-tcg_gen_qemu_ld_i64(tmp, addr, ctx->mem_idx, MO_LEQ);
+tcg_gen_qemu_ld_i64(tmp, addr, ctx->mem_idx, MO_LEQ | UNALIGN(ctx));
gen_helper_memory_to_g(dest, tmp);
tcg_temp_free(tmp);
}
@@ -286,14 +294,14 @@ static void gen_ldg(DisasContext *ctx, TCGv dest, TCGv
addr)
static void gen_lds(DisasContext *ctx, TCGv dest, TCGv addr)
{
TCGv_i32 tmp32 = tcg_temp_new_i32();
-tcg_gen_qemu_ld_i32(tmp32, addr, ctx->mem_idx, MO_LEUL);
+tcg_gen_qemu_ld_i32(tmp32, addr, ctx->mem_idx, MO_LEUL | UNALIGN(ctx));
gen_helper_memory_to_s(dest, tmp32);
tcg_temp_free_i32(tmp32);
}
static void gen_ldt(DisasContext *ctx, TCGv dest, TCGv addr)
{
-tcg_gen_qemu_ld_i64(dest, addr, ctx->mem_idx, MO_LEQ);
+tcg_gen_qemu_ld_i64(dest, addr, ctx->mem_idx, MO_LEQ | UNALIGN(ctx));
}
static void gen_load_fp(DisasContext *ctx, int ra, int rb, int32_t disp16,
@@ -324,6 +332,8 @@ static void gen_load_int(DisasContext *ctx, int ra, int rb,
int32_t disp16,
tcg_gen_addi_i64(addr, load_gpr(ctx, rb), disp16);
if (clear) {
tcg_gen_andi_i64(addr, addr, ~0x7);
+} else if (!locked) {
+op |= UNALIGN(ctx);
}
dest = ctx->ir[ra];
@@ -340,7 +350,7 @@ static void gen_stf(DisasContext *ctx, TCGv src, TCGv addr)
{
TCGv_i32 tmp32 = tcg_temp_new_i32();
gen_helper_f_to_memory(tmp32, addr);
-tcg_gen_qemu_st_i32(tmp32, addr, ctx->mem_idx, MO_LEUL);
+tcg_gen_qemu_st_i32(tmp32, addr, ctx->mem_idx, MO_LEUL | UNALIGN(ctx));
tcg_temp_free_i32(tmp32);
}
@@ -348,7 +358,7 @@ static void gen_stg(DisasContext *ctx, TCGv src, TCGv addr)
{
TCGv tmp = tcg_temp_new();
gen_helper_g_to_memory(tmp, src);
-tcg_gen_qemu_st_i64(tmp, addr, ctx->mem_idx, MO_LEQ);
+tcg_gen_qemu_st_i64(tmp, addr, ctx->mem_idx, MO_LEQ | UNALIGN(ctx));
tcg_temp_free(tmp);
}
@@ -356,13 +366,13 @@ static void gen_sts(DisasContext *ctx, TCGv src, TCGv addr)
{
TCGv_i32 tmp32 = tcg_temp_new_i32();
gen_helper_s_to_memory(tmp32, src);
-tcg_gen_qemu_st_i32(tmp32, addr, ctx->mem_idx, MO_LEUL);
+tcg_gen_qemu_st_i32
Re: [PATCH v2 6/6] target/sh4: Implement prctl_unalign_sigbus
Le 27/12/2021 à 16:01, Richard Henderson a écrit :
Leave TARGET_ALIGNED_ONLY set, but use the new CPUState
flag to set MO_UNALN for the instructions that the kernel
handles in the unaligned trap.
The Linux kernel does not handle all memory operations: no
floating-point and no MAC.
Signed-off-by: Richard Henderson
---
linux-user/sh4/target_prctl.h | 2 +-
target/sh4/cpu.h | 4 +++
target/sh4/translate.c| 50 ---
3 files changed, 39 insertions(+), 17 deletions(-)
diff --git a/linux-user/sh4/target_prctl.h b/linux-user/sh4/target_prctl.h
index eb53b31ad5..5629ddbf39 100644
--- a/linux-user/sh4/target_prctl.h
+++ b/linux-user/sh4/target_prctl.h
@@ -1 +1 @@
-/* No special prctl support required. */
+#include "../generic/target_prctl_unalign.h"
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 4cfb109f56..fb9dd9db2f 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -83,6 +83,7 @@
#define DELAY_SLOT_RTE (1 << 2)
#define TB_FLAG_PENDING_MOVCA (1 << 3)
+#define TB_FLAG_UNALIGN(1 << 4)
#define GUSA_SHIFT 4
#ifdef CONFIG_USER_ONLY
@@ -373,6 +374,9 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env,
target_ulong *pc,
| (env->sr & ((1u << SR_MD) | (1u << SR_RB))) /* Bits 29-30
*/
| (env->sr & (1u << SR_FD))/* Bit 15 */
| (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 3 */
+#ifdef CONFIG_USER_ONLY
+*flags |= TB_FLAG_UNALIGN * !env_cpu(env)->prctl_unalign_sigbus;
+#endif
}
#endif /* SH4_CPU_H */
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index ce5d674a52..50493c61ea 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -50,8 +50,10 @@ typedef struct DisasContext {
#if defined(CONFIG_USER_ONLY)
#define IS_USER(ctx) 1
+#define UNALIGN(C) (ctx->tbflags & TB_FLAG_UNALIGN ? MO_UNALN : MO_ALIGN)
#else
#define IS_USER(ctx) (!(ctx->tbflags & (1u << SR_MD)))
+#define UNALIGN(C) 0
#endif
/* Target-specific values for ctx->base.is_jmp. */
@@ -495,7 +497,8 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_addi_i32(addr, REG(B11_8), B3_0 * 4);
-tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUL);
+tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx,
+MO_TEUL | UNALIGN(ctx));
tcg_temp_free(addr);
}
return;
@@ -503,7 +506,8 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 4);
-tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, MO_TESL);
+tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx,
+MO_TESL | UNALIGN(ctx));
tcg_temp_free(addr);
}
return;
@@ -558,19 +562,23 @@ static void _decode_opc(DisasContext * ctx)
tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_UB);
return;
case 0x2001: /* mov.w Rm,@Rn */
-tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_TEUW);
+tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx,
+MO_TEUW | UNALIGN(ctx));
return;
case 0x2002: /* mov.l Rm,@Rn */
-tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx, MO_TEUL);
+tcg_gen_qemu_st_i32(REG(B7_4), REG(B11_8), ctx->memidx,
+MO_TEUL | UNALIGN(ctx));
return;
case 0x6000: /* mov.b @Rm,Rn */
tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_SB);
return;
case 0x6001: /* mov.w @Rm,Rn */
-tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_TESW);
+tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx,
+MO_TESW | UNALIGN(ctx));
return;
case 0x6002: /* mov.l @Rm,Rn */
-tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx, MO_TESL);
+tcg_gen_qemu_ld_i32(REG(B11_8), REG(B7_4), ctx->memidx,
+MO_TESL | UNALIGN(ctx));
return;
case 0x2004: /* mov.b Rm,@-Rn */
{
@@ -586,7 +594,8 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_subi_i32(addr, REG(B11_8), 2);
-tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx, MO_TEUW);
+tcg_gen_qemu_st_i32(REG(B7_4), addr, ctx->memidx,
+MO_TEUW | UNALIGN(ctx));
tcg_gen_mov_i32(REG(B11_8), addr);
tcg_temp_free(addr);
}
@@ -595,7 +604,8 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv addr = tcg_temp_new();
tcg_gen_subi_i32(addr, REG(B11_8), 4);
-
Re: [PATCH] linux-user/signal: Map exit signals in SIGCHLD siginfo_t
Le 23/10/2021 à 21:59, Matthias Schiffer a écrit :
When converting a siginfo_t from waitid(), the interpretation of si_status
depends on the value of si_code: For CLD_EXITED, it is an exit code and
should be copied verbatim. For other codes, it is a signal number
(possibly with additional high bits from ptrace) that should be mapped.
This code was previously changed in commit 1c3dfb506ea3
("linux-user/signal: Decode waitid si_code"), but the fix was
incomplete.
Tested with the following test program:
#include
#include
#include
#include
int main() {
pid_t pid = fork();
if (pid == 0) {
exit(12);
} else {
siginfo_t siginfo = {};
waitid(P_PID, pid, &siginfo, WEXITED);
printf("Code: %d, status: %d\n", (int)siginfo.si_code,
(int)siginfo.si_status);
}
pid = fork();
if (pid == 0) {
raise(SIGUSR2);
} else {
siginfo_t siginfo = {};
waitid(P_PID, pid, &siginfo, WEXITED);
printf("Code: %d, status: %d\n", (int)siginfo.si_code,
(int)siginfo.si_status);
}
}
Output with an x86_64 host and mips64el target before 1c3dfb506ea3
(incorrect: exit code 12 is translated like a signal):
Code: 1, status: 17
Code: 2, status: 17
After 1c3dfb506ea3 (incorrect: signal number is not translated):
Code: 1, status: 12
Code: 2, status: 12
With this patch:
Code: 1, status: 12
Code: 2, status: 17
Signed-off-by: Matthias Schiffer
---
linux-user/signal.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 14d8fdfde152..8e3af98ec0a7 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -403,7 +403,12 @@ static inline void
host_to_target_siginfo_noswap(target_siginfo_t *tinfo,
case TARGET_SIGCHLD:
tinfo->_sifields._sigchld._pid = info->si_pid;
tinfo->_sifields._sigchld._uid = info->si_uid;
-tinfo->_sifields._sigchld._status = info->si_status;
+if (si_code == CLD_EXITED)
+tinfo->_sifields._sigchld._status = info->si_status;
+else
+tinfo->_sifields._sigchld._status
+= host_to_target_signal(info->si_status & 0x7f)
+| (info->si_status & ~0x7f);
tinfo->_sifields._sigchld._utime = info->si_utime;
tinfo->_sifields._sigchld._stime = info->si_stime;
si_type = QEMU_SI_CHLD;
Reviewed-by: Laurent Vivier
[RFC PATCH] tests/avocado: add :avocado: tags for some tests
This stops a bunch of tests failing because of a lack of
"./qemu-system-x86-64" in a build directory where you have configured
only one non-default target. I suspect what we really need is:
:avocado: tags=arch:host
to be properly multi-arch safe.
Signed-off-by: Alex Bennée
---
tests/avocado/empty_cpu_model.py | 3 +++
tests/avocado/info_usernet.py| 3 +++
tests/avocado/migration.py | 1 +
tests/avocado/version.py | 1 +
tests/avocado/vnc.py | 1 +
5 files changed, 9 insertions(+)
diff --git a/tests/avocado/empty_cpu_model.py b/tests/avocado/empty_cpu_model.py
index 22f504418d..ffe27780a3 100644
--- a/tests/avocado/empty_cpu_model.py
+++ b/tests/avocado/empty_cpu_model.py
@@ -11,6 +11,9 @@
class EmptyCPUModel(QemuSystemTest):
def test(self):
+"""
+:avocado: tags=arch:x86_64
+"""
self.vm.add_args('-S', '-display', 'none', '-machine', 'none', '-cpu',
'')
self.vm.set_qmp_monitor(enabled=False)
self.vm.launch()
diff --git a/tests/avocado/info_usernet.py b/tests/avocado/info_usernet.py
index dc01f74150..bafbc0e23e 100644
--- a/tests/avocado/info_usernet.py
+++ b/tests/avocado/info_usernet.py
@@ -16,6 +16,9 @@
class InfoUsernet(QemuSystemTest):
def test_hostfwd(self):
+"""
+:avocado: tags=arch:x86_64
+"""
self.vm.add_args('-netdev', 'user,id=vnet,hostfwd=:127.0.0.1:0-:22')
self.vm.launch()
res = self.vm.command('human-monitor-command',
diff --git a/tests/avocado/migration.py b/tests/avocado/migration.py
index 584d6ef53f..4e5516f425 100644
--- a/tests/avocado/migration.py
+++ b/tests/avocado/migration.py
@@ -22,6 +22,7 @@
class Migration(QemuSystemTest):
"""
:avocado: tags=migration
+:avocado: tags=arch:x86_64
"""
timeout = 10
diff --git a/tests/avocado/version.py b/tests/avocado/version.py
index ded7f039c1..be794b9354 100644
--- a/tests/avocado/version.py
+++ b/tests/avocado/version.py
@@ -15,6 +15,7 @@
class Version(QemuSystemTest):
"""
:avocado: tags=quick
+:avocado: tags=arch:x86_64
"""
def test_qmp_human_info_version(self):
self.vm.add_args('-nodefaults')
diff --git a/tests/avocado/vnc.py b/tests/avocado/vnc.py
index 096432988f..1f80647414 100644
--- a/tests/avocado/vnc.py
+++ b/tests/avocado/vnc.py
@@ -14,6 +14,7 @@
class Vnc(QemuSystemTest):
"""
:avocado: tags=vnc,quick
+:avocado: tags=arch:x86_64
"""
def test_no_vnc(self):
self.vm.add_args('-nodefaults', '-S')
--
2.30.2
Re: [PATCH 2/2] hw/display/vmware_vga: do not discard screen updates
Hi,
> This change firstly increases the screen update FIFO size to ensure it's
> large enough to accomodate all updates deferred in a given screen
> refresh cycle.
How do you know it's large enough?
> @@ -385,7 +385,14 @@ static inline void vmsvga_update_rect_delayed(struct
> vmsvga_state_s *s,
> {
> struct vmsvga_rect_s *rect = &s->redraw_fifo[s->redraw_fifo_last++];
>
> -s->redraw_fifo_last &= REDRAW_FIFO_LEN - 1;
> +if (s->redraw_fifo_last >= REDRAW_FIFO_LEN) {
> +VMWARE_VGA_DEBUG("%s: Discarding updates - FIFO length %d
> exceeded\n",
> +"vmsvga_update_rect_delayed",
> +REDRAW_FIFO_LEN
Hmm, apparently you don't know ;)
How about just calling vmsvga_update_rect_flush()
when the fifo is (almost) full?
Which guest do you use btw? I'm kind-of surprised this is still being
used even though it hasn't seen any development (beside fixing a bug now
and then) for a decade or so and the feature gap to recent vmware is
huge ...
take care,
Gerd
Re: Redesign of QEMU startup & initial configuration
Sorry for very delayed reply ... On Thu, Dec 02, 2021 at 07:57:38AM +0100, Markus Armbruster wrote: > 1. QMP only > >Management applications need to use QMP for monitoring anyway. They >may want to use it for initial configuration, too. Libvirt does. > >They still need to bootstrap a QMP monitor, and for that, CLI is fine >as long as it's simple and stable. libguestfs actually does not use the QMP monitor but manages to configure eveything from the command line just fine. I've attached below a typical example. (Of course we can use libvirt too, but still for many configurations libvirt causes problems unfortunately). > Human users struggle with inconsistent syntax, insufficiently expressive > configuration files, and huge command lines. One advantage of "huge command lines" is that they document the configuration of qemu quite well. I know it's only an approximation, but in many cases it's exactly what we want. It is frequently the case when troubleshooting that we ask the user "what is the qemu command line", and they can get that from the libvirt log file or through "ps". So we need to consider this and make sure that everything is changed so we don't regress. libguestfs will need substantial changes and libvirt must dump the full configuration (qinfo or whatever) to the log file. I don't really disagreee with anything else you wrote however. Rich. libguestfs example: /usr/bin/qemu-kvm \ -global virtio-blk-pci.scsi=off \ -no-user-config \ -nodefaults \ -display none \ -machine accel=kvm:tcg,graphics=off \ -cpu max \ -m 1280 \ -no-reboot \ -rtc driftfix=slew \ -no-hpet \ -global kvm-pit.lost_tick_policy=discard \ -kernel /var/tmp/.guestfs-1000/appliance.d/kernel \ -initrd /var/tmp/.guestfs-1000/appliance.d/initrd \ -object rng-random,filename=/dev/urandom,id=rng0 \ -device virtio-rng-pci,rng=rng0 \ -device virtio-scsi-pci,id=scsi \ -drive file=/tmp/libguestfs9bBO1w/scratch1.img,cache=unsafe,format=raw,id=hd0,if=none \ -device scsi-hd,drive=hd0 \ -drive file=/var/tmp/.guestfs-1000/appliance.d/root,snapshot=on,id=appliance,cache=unsafe,if=none \ -device scsi-hd,drive=appliance \ -device virtio-serial-pci \ -serial stdio \ -chardev socket,path=/run/user/1000/libguestfsGIlAlu/guestfsd.sock,id=channel0 \ -device virtserialport,chardev=channel0,name=org.libguestfs.channel.0 \ -append "panic=1 console=ttyS0 edd=off udevtimeout=6000 udev.event-timeout=6000 no_timer_check printk.time=1 cgroup_disable=memory usbcore.nousb cryptomgr.notests tsc=reliable 8250.nr_uarts=1 root=UUID=9e6e8889-f991-45a3-bb41-67acebe7b062 selinux=0 guestfs_verbose=1 TERM=xterm-256color" -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones Read my programming and virtualization blog: http://rwmj.wordpress.com virt-df lists disk usage of guests without needing to install any software inside the virtual machine. Supports Linux and Windows. http://people.redhat.com/~rjones/virt-df/
Re: [PATCH v11 29/31] linux-user: Implement CPU-specific signal handler for loongarch64 hosts
On Thu, Dec 30, 2021 at 4:50 AM WANG Xuerui wrote:
>
> Hi,
>
> On 12/30/21 11:11, gaosong wrote:
>
> HI,
>
> On 2021/12/21 下午1:41, WANG Xuerui wrote:
>
> +case 0b001110: /* indexed, atomic, bounds-checking memory operations */
> +uint32_t sel = (insn >> 15) & 0b111;
> +
> +switch (sel) {
> +case 0b010: /* stx.b */
> +case 0b0101000: /* stx.h */
> +case 0b011: /* stx.w */
> +case 0b0111000: /* stx.d */
> +case 0b111: /* fstx.s */
> +case 0b000: /* fstx.d */
> +case 0b00011101100: /* fstgt.s */
> +case 0b00011101101: /* fstgt.d */
> +case 0b00011101110: /* fstle.s */
> +case 0b0001110: /* fstle.d */
> +case 0b0001000: /* stgt.b */
> +case 0b0001001: /* stgt.h */
> +case 0b0001010: /* stgt.w */
> +case 0b0001011: /* stgt.d */
> +case 0b0001100: /* stle.b */
> +case 0b0001101: /* stle.h */
> +case 0b0001110: /* stle.w */
> +case 0b000: /* stle.d */
> +case 0b0001100 ... 0b00011100011: /* am* insns */
> +return true;
> +}
> +break;
> +}
>
> We build qemu-x86_64 on LoongArch machine, but got an error,
>
> ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be
> part of a statement and a declaration is not a statement
> uint32_t sel = (insn >> 15) & 0b111;
> ^~~~
>
> I think we should define 'sel' before:
>
> /* Detect store by reading the instruction at the program counter. */
> switch ((insn >> 26) & 0b11) {
>
> or
> case 0b001110:
>
> {
>
> uint32_t set = ...;
>
> ...
>
> }
>
> I can't reproduce the error on both my development machines (amd64 and
> loongarch64), so I wonder if the issue is related to your particular setup
> (i.e. compiler versions and such)?
I can reproduce, setup:
Project version: 6.2.50
C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix
8.3.0-6.lnd.vec.27) 8.3.0")
C linker for the host machine: cc ld.bfd 2.31.1-system
Host machine cpu family: loongarch64
Host machine cpu: loongarch64
C++ compiler for the host machine: c++ (gcc 8.3.0 "c++ (Loongnix
8.3.0-6.lnd.vec.27) 8.3.0")
C++ linker for the host machine: c++ ld.bfd 2.31.1-system
Re: [PATCH] linux-user: Fix trivial build error on loongarch64
I forgot to add trailing "hosts" in the subject line.
On Tue, Jan 4, 2022 at 2:02 PM Philippe Mathieu-Daudé wrote:
>
> When building using GCC 8.3.0 on loongarch64 (Loongnix) we get:
>
> In file included from ../linux-user/signal.c:33:
> ../linux-user/host/loongarch64/host-signal.h: In function
> ‘host_signal_write’:
> ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only
> be part of a statement and a declaration is not a statement
> uint32_t sel = (insn >> 15) & 0b111;
> ^~~~
>
> We don't use the 'sel' variable more than once, so drop it.
>
> Meson output for the record:
>
> Host machine cpu family: loongarch64
> Host machine cpu: loongarch64
> C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix
> 8.3.0-6.lnd.vec.27) 8.3.0")
> C linker for the host machine: cc ld.bfd 2.31.1-system
>
> Fixes: ad812c3bd65 ("linux-user: Implement CPU-specific signal handler for
> loongarch64 hosts")
> Reported-by: Song Gao
> Suggested-by: Song Gao
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> linux-user/host/loongarch64/host-signal.h | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/linux-user/host/loongarch64/host-signal.h
> b/linux-user/host/loongarch64/host-signal.h
> index 05e2c823717..7effa242515 100644
> --- a/linux-user/host/loongarch64/host-signal.h
> +++ b/linux-user/host/loongarch64/host-signal.h
> @@ -54,9 +54,7 @@ static inline bool host_signal_write(siginfo_t *info,
> ucontext_t *uc)
> }
> break;
> case 0b001110: /* indexed, atomic, bounds-checking memory operations */
> -uint32_t sel = (insn >> 15) & 0b111;
> -
> -switch (sel) {
> +switch ((insn >> 15) & 0b111) {
> case 0b010: /* stx.b */
> case 0b0101000: /* stx.h */
> case 0b011: /* stx.w */
> --
> 2.33.1
>
[PATCH] linux-user: Fix trivial build error on loongarch64
When building using GCC 8.3.0 on loongarch64 (Loongnix) we get:
In file included from ../linux-user/signal.c:33:
../linux-user/host/loongarch64/host-signal.h: In function ‘host_signal_write’:
../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be
part of a statement and a declaration is not a statement
uint32_t sel = (insn >> 15) & 0b111;
^~~~
We don't use the 'sel' variable more than once, so drop it.
Meson output for the record:
Host machine cpu family: loongarch64
Host machine cpu: loongarch64
C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix
8.3.0-6.lnd.vec.27) 8.3.0")
C linker for the host machine: cc ld.bfd 2.31.1-system
Fixes: ad812c3bd65 ("linux-user: Implement CPU-specific signal handler for
loongarch64 hosts")
Reported-by: Song Gao
Suggested-by: Song Gao
Signed-off-by: Philippe Mathieu-Daudé
---
linux-user/host/loongarch64/host-signal.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/linux-user/host/loongarch64/host-signal.h
b/linux-user/host/loongarch64/host-signal.h
index 05e2c823717..7effa242515 100644
--- a/linux-user/host/loongarch64/host-signal.h
+++ b/linux-user/host/loongarch64/host-signal.h
@@ -54,9 +54,7 @@ static inline bool host_signal_write(siginfo_t *info,
ucontext_t *uc)
}
break;
case 0b001110: /* indexed, atomic, bounds-checking memory operations */
-uint32_t sel = (insn >> 15) & 0b111;
-
-switch (sel) {
+switch ((insn >> 15) & 0b111) {
case 0b010: /* stx.b */
case 0b0101000: /* stx.h */
case 0b011: /* stx.w */
--
2.33.1
Re: [RFC PATCH v2 20/44] i386/tdx: Parse tdx metadata and store the result into TdxGuestState
On 8/26/2021 7:18 PM, Gerd Hoffmann wrote:
+int load_tdvf(const char *filename)
+{
+for_each_fw_entry(fw, entry) {
+if (entry->address < x86ms->below_4g_mem_size ||
+entry->address > 4 * GiB) {
+tdvf_init_ram_memory(ms, entry);
+} else {
+tdvf_init_bios_memory(fd, filename, entry);
+}
+}
Why there are two different ways to load the firmware?
because there are two different parts in TDVF:
a) one is firmware volume (BFV and CFV, i.e., OVMF_CODE.fd and
OVMF_VAR.fd). Those are ROMs;
b) the other is some RAM regions, e.g., temp memory for BFV early
running and TD HOB to pass info to TDVF; Those are RAMs which is already
added to TDX VM;
Also: why is all this firmware volume parsing needed? The normal ovmf
firmware can simply be mapped just below 4G, why can't tdvf work the
same way?
Ideally, the firmware (part a above) can be mapped just below 4G like
what we do for OVMF.
But it needs additional when map part a) to parse the metadata and get
location of part b) and initialize the RAM of part b). Yes, the
additional work can be added in existing OVMF laoding flow as pflash.
+ Laszlo,
Regarding laoding TDVF as pflash, I have some questions:
- pflash requires KVM to support readonly mmeory. However, for TDX, it
doesn't support readonly memory. Is it a must? or we can make an
exception for TDX?
- I saw from
https://lists.gnu.org/archive/html/qemu-discuss/2018-04/msg00045.html,
you said when load OVMF as pflash, it's MMIO. But for TDVF, it's treated
as private memory. I'm not sure whether it will cause some potential
problem if loading TDVF with pflash.
Anyway I tried changing the existing pflash approach to load TDVF. It
can boot a TDX VM and no issue.
thanks,
Gerd
Re: [PATCH] linux-user: Fix trivial build error on loongarch64
On 2022/1/4 21:02, Philippe Mathieu-Daudé wrote:
> When building using GCC 8.3.0 on loongarch64 (Loongnix) we get:
>
> In file included from ../linux-user/signal.c:33:
> ../linux-user/host/loongarch64/host-signal.h: In function
> ‘host_signal_write’:
> ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only
> be part of a statement and a declaration is not a statement
> uint32_t sel = (insn >> 15) & 0b111;
> ^~~~
>
> We don't use the 'sel' variable more than once, so drop it.
>
> Meson output for the record:
>
> Host machine cpu family: loongarch64
> Host machine cpu: loongarch64
> C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix
> 8.3.0-6.lnd.vec.27) 8.3.0")
> C linker for the host machine: cc ld.bfd 2.31.1-system
So this issue indeed only happens on the Loongson-provided toolchain
with the ancient 8.3.0 version of gcc, after all... I'd have to admit
that I was initially reluctant to even investigate this, given the
tendency of Loongson people not verifying things on upstream versions of
their own work, but...
>
> Fixes: ad812c3bd65 ("linux-user: Implement CPU-specific signal handler for
> loongarch64 hosts")
> Reported-by: Song Gao
> Suggested-by: Song Gao
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> linux-user/host/loongarch64/host-signal.h | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/linux-user/host/loongarch64/host-signal.h
> b/linux-user/host/loongarch64/host-signal.h
> index 05e2c823717..7effa242515 100644
> --- a/linux-user/host/loongarch64/host-signal.h
> +++ b/linux-user/host/loongarch64/host-signal.h
> @@ -54,9 +54,7 @@ static inline bool host_signal_write(siginfo_t *info,
> ucontext_t *uc)
> }
> break;
> case 0b001110: /* indexed, atomic, bounds-checking memory operations */
> -uint32_t sel = (insn >> 15) & 0b111;
> -
> -switch (sel) {
> +switch ((insn >> 15) & 0b111) {
> case 0b010: /* stx.b */
> case 0b0101000: /* stx.h */
> case 0b011: /* stx.w */
the fix is obvious enough, doesn't harm readability, and solves a real
problem for some (their toolchain being outdated is not their fault,
rather Loongson's).
So after fixing the commit message:
Reviewed-by: WANG Xuerui
(Or do I just collect this patch and fix the commit message myself,
sending a pull request later? I'm new to QEMU maintenance procedure and
I'm still not quite sure if it is too heavyweight to have you send v2
for just a single typo and R-b tag collection.)
Re: [PATCH] vl: Add -set options to device opts dict when using JSON syntax for -device
On Wed, Dec 22, 2021 at 09:22:47AM +0100, Gerd Hoffmann wrote: > On Tue, Dec 21, 2021 at 04:40:28PM +0100, Markus Armbruster wrote: > > Paolo Bonzini writes: > > > > > On 12/21/21 13:58, Markus Armbruster wrote: > > >>> Is this a regression? I suspect commit 5dacda5167 "vl: Enable JSON > > >>> syntax for -device" (v6.2.0). > > >> > > >> Obviously not a regression: everything that used to work still works. > > > > > > FWIW I think -set should be deprecated. I'm not aware of any > > > particularly useful use of it. There are a couple in the QEMU tests > > > (in vhost-user-test and in qemu-iotests 068), but in both cases the > > > code would be easier to follow without; patches can be dusted off if > > > desired. > > > > -set has its uses, but they're kind of obscure. When you want to use > > some canned configuration with slight modifications, then -readconfig > > canned.cfg -set ... is nicer than editing a copy of canned.cfg. > > Simliar: configure stuff not supported by libvirt: > > > > > > > There will always be a gap between qemu and libvirt, even if most of > them are temporary only (while developing a new feature). I think we > need some way to deal with this kind of tweaks when moving to QAPI-based > machine setup. Possibly not in qemu, maybe it's easier to add new > '' syntax to libvirt. Yes, I'd suggest we get https://berrange.com -o-https://www.flickr.com/photos/dberrange :| |: https://libvirt.org -o-https://fstop138.berrange.com :| |: https://entangle-photo.org-o-https://www.instagram.com/dberrange :|
Re: [PATCH 2/2] hw/display/vmware_vga: do not discard screen updates
> On 4 Jan 2022, at 12:23, Gerd Hoffmann wrote:
>
> Hi,
>
>> This change firstly increases the screen update FIFO size to ensure it's
>> large enough to accomodate all updates deferred in a given screen
>> refresh cycle.
>
> How do you know it's large enough?
>
>> @@ -385,7 +385,14 @@ static inline void vmsvga_update_rect_delayed(struct
>> vmsvga_state_s *s,
>> {
>> struct vmsvga_rect_s *rect = &s->redraw_fifo[s->redraw_fifo_last++];
>>
>> -s->redraw_fifo_last &= REDRAW_FIFO_LEN - 1;
>> +if (s->redraw_fifo_last >= REDRAW_FIFO_LEN) {
>> +VMWARE_VGA_DEBUG("%s: Discarding updates - FIFO length %d
>> exceeded\n",
>> +"vmsvga_update_rect_delayed",
>> +REDRAW_FIFO_LEN
>
> Hmm, apparently you don't know ;)
>
> How about just calling vmsvga_update_rect_flush()
> when the fifo is (almost) full?
Yeah will give that a shot. Wasn’t sure how it’d play so did the simplest thing
possible.
>
> Which guest do you use btw? I'm kind-of surprised this is still being
> used even though it hasn't seen any development (beside fixing a bug now
> and then) for a decade or so and the feature gap to recent vmware is
> huge ...
>
This is an old vmware vm that rarely gets used. Figured I’d see if I could get
it working over the holidays after making the move off an intel mac to m1, and
noticed the issue with the output. In this case using the already configured
vmware drivers was the least worst option.
> take care,
> Gerd
>
Cheers
Carwyn
[PATCH] tests/tcg/loongson64: Add float reference files
Generated on Loongson-3A5000 (CPU revision 0x0014c011). Signed-off-by: Philippe Mathieu-Daudé --- tests/tcg/loongson64/float_convs.ref | 748 ++ tests/tcg/loongson64/float_madds.ref | 768 +++ 2 files changed, 1516 insertions(+) create mode 100644 tests/tcg/loongson64/float_convs.ref create mode 100644 tests/tcg/loongson64/float_madds.ref diff --git a/tests/tcg/loongson64/float_convs.ref b/tests/tcg/loongson64/float_convs.ref new file mode 100644 index 000..03b2f522a35 --- /dev/null +++ b/tests/tcg/loongson64/float_convs.ref @@ -0,0 +1,748 @@ +### Rounding to nearest +from single: f32(-nan:0xffa0) + to double: f64(-nan:0x00fffc) (INVALID) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(-nan:0xffc0) + to double: f64(-nan:0x00fff8) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(-inf:0xff80) + to double: f64(-inf:0x00fff0) (OK) + to int32: -2147483648 (OK) + to int64: -9223372036854775808 (OK) + to uint32: -2147483648 (OK) + to uint64: -9223372036854775808 (OK) +from single: f32(-0x1.fe00p+127:0xff7f) + to double: f64(-0x1.fe00p+127:0x00c7efe000) (OK) + to int32: -2147483648 (OK) + to int64: -9223372036854775808 (OK) + to uint32: -2147483648 (OK) + to uint64: -9223372036854775808 (OK) +from single: f32(-0x1.1874b200p+103:0xf30c3a59) + to double: f64(-0x1.1874b200p+103:0x00c661874b2000) (OK) + to int32: -2147483648 (OK) + to int64: -9223372036854775808 (OK) + to uint32: -2147483648 (OK) + to uint64: -9223372036854775808 (OK) +from single: f32(-0x1.c0bab600p+99:0xf1605d5b) + to double: f64(-0x1.c0bab600p+99:0x00c62c0bab6000) (OK) + to int32: -2147483648 (OK) + to int64: -9223372036854775808 (OK) + to uint32: -2147483648 (OK) + to uint64: -9223372036854775808 (OK) +from single: f32(-0x1.31f75000p-40:0xab98fba8) + to double: f64(-0x1.31f75000p-40:0x00bd731f75) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(-0x1.50544400p-66:0x9ea82a22) + to double: f64(-0x1.50544400p-66:0x00bbd505444000) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(-0x1.p-126:0x8080) + to double: f64(-0x1.p-126:0x00b810) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(0x0.p+0:00) + to double: f64(0x0.p+0:) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(0x1.p-126:0x0080) + to double: f64(0x1.p-126:0x003810) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(0x1.p-25:0x3300) + to double: f64(0x1.p-25:0x003e60) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(0x1.e600p-25:0x3373) + to double: f64(0x1.e600p-25:0x003e6e6000) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(0x1.ff801a00p-15:0x387fc00d) + to double: f64(0x1.ff801a00p-15:0x003f0ff801a000) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(0x1.0c00p-14:0x3886) + to double: f64(0x1.0c00p-14:0x003f10c000) (OK) + to int32: 0 (OK) + to int64: 0 (OK) + to uint32: 0 (OK) + to uint64: 0 (OK) +from single: f32(0x1.p+0:0x3f80) + to double: f64(0x1.p+0:0x003ff0) (OK) + to int32: 1 (OK) + to int64: 1 (OK) + to uint32: 1 (OK) + to uint64: 1 (OK) +from single: f32(0x1.0040p+0:0x3f802000) + to double: f64(0x1.0040p+0:0x003ff00400) (OK) + to int32: 1 (OK) + to int64: 1 (OK) + to uint32: 1 (OK) + to uint64: 1 (OK) +from single: f32(0x1.p+1:0x4000) + to double: f64(0x1.p+1:0x004000) (OK) + to int32: 2 (OK) + to int64: 2 (OK) + to uint32: 2 (OK) + to uint64: 2 (OK) +from single: f32(0x1.5bf0a800p+1:0x402df854) + to double: f64(0x1.5bf0a800p+1:0x004005bf0a8000) (OK) + to int32: 2 (OK) + to int64: 2 (OK) + to uint32: 2 (OK) + to uint64: 2 (OK) +from single: f32(0x1.921fb600p+1:0x40490fdb) + to double: f64(0x1.921fb600p+1:0x00400921fb6000) (OK) + t
Re: [PATCH 2/2] qapi/ui: introduce change-vnc-listen
On Mon, Dec 20, 2021 at 04:44:18PM +0100, Vladimir Sementsov-Ogievskiy wrote:
> Add command that can change addresses where VNC server listens for new
> connections. Prior to 6.0 this functionality was available through
> 'change' qmp command which was deleted.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> docs/about/removed-features.rst | 3 ++-
> qapi/ui.json| 12
> ui/vnc.c| 26 ++
> 3 files changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst
> index d42c3341de..20e6901a82 100644
> --- a/docs/about/removed-features.rst
> +++ b/docs/about/removed-features.rst
> @@ -348,7 +348,8 @@ documentation of ``query-hotpluggable-cpus`` for
> additional details.
> ``change`` (removed in 6.0)
> '''
>
> -Use ``blockdev-change-medium`` or ``change-vnc-password`` instead.
> +Use ``blockdev-change-medium`` or ``change-vnc-password`` or
> +``change-vnc-listen`` instead.
>
> ``query-events`` (removed in 6.0)
> '
> diff --git a/qapi/ui.json b/qapi/ui.json
> index d7567ac866..14e6fe0b4c 100644
> --- a/qapi/ui.json
> +++ b/qapi/ui.json
> @@ -1304,3 +1304,15 @@
> { 'command': 'display-reload',
>'data': 'DisplayReloadOptions',
>'boxed' : true }
> +
> +##
> +# @change-vnc-listen:
> +#
> +# Change set of addresses to listen for connections.
> +#
> +# Since: 7.0
> +#
> +##
> +{ 'command': 'change-vnc-listen',
> + 'data': { 'id': 'str', 'addresses': ['SocketAddress'],
> +'*websockets': ['SocketAddress'] } }
We already have a general purpose command above 'display-reload'
for doing live changes to the display backends.
THis should instead be
{ 'struct': 'DisplayReloadOptionsVNC',
'data': { '*tls-certs': 'bool',
'*addresses': ['SocketAddress'],
'*websockets': ['SocketAddress'] } }
if 'addresses' is non-null then the listener can be updated.
Regards,
Daniel
--
|: https://berrange.com -o-https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o-https://fstop138.berrange.com :|
|: https://entangle-photo.org-o-https://www.instagram.com/dberrange :|
Re: [PATCH v2 1/5] ps2: Initial horizontal scroll support
On Wed, Dec 22, 2021 at 02:06:43AM +0100, Dmitry Petrov wrote:
> v2:
> - Patch is split into a sequence
> - value is clamped to 31 for horizontal scroll
>
> This patch introduces horizontal scroll support for the ps/2
> mouse.
>
> The patch is based on the previous work
> by Brad Jorsch done in 2010
> but never merge, see
> https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=579968
The bugs attached to that ticket don't have any Signed-off-by
from Brad. Fortunately at the time he did re-submit them on
qemu-devel with Signed-off-by present.
Can you include this link to his patches in your commit
message to get the paper trail
https://lists.gnu.org/archive/html/qemu-devel/2010-05/msg00223.html
> This change adds support for horizontal scroll to ps/2 mouse device
> code. The code is implemented to match the logic of linux kernel
> which is used as a reference.
>
> Signed-off-by: Dmitry Petrov
> ---
> hw/input/ps2.c | 57 +++---
> qapi/ui.json | 2 +-
> 2 files changed, 50 insertions(+), 9 deletions(-)
>
> diff --git a/hw/input/ps2.c b/hw/input/ps2.c
> index 9376a8f4ce..6236711e1b 100644
> --- a/hw/input/ps2.c
> +++ b/hw/input/ps2.c
> @@ -123,6 +123,7 @@ typedef struct {
> int mouse_dx; /* current values, needed for 'poll' mode */
> int mouse_dy;
> int mouse_dz;
> +int mouse_dw;
> uint8_t mouse_buttons;
> } PS2MouseState;
>
> @@ -715,7 +716,7 @@ static int ps2_mouse_send_packet(PS2MouseState *s)
> /* IMPS/2 and IMEX send 4 bytes, PS2 sends 3 bytes */
> const int needed = s->mouse_type ? 4 : 3;
> unsigned int b;
> -int dx1, dy1, dz1;
> +int dx1, dy1, dz1, dw1;
>
> if (PS2_QUEUE_SIZE - s->common.queue.count < needed) {
> return 0;
> @@ -724,6 +725,7 @@ static int ps2_mouse_send_packet(PS2MouseState *s)
> dx1 = s->mouse_dx;
> dy1 = s->mouse_dy;
> dz1 = s->mouse_dz;
> +dw1 = s->mouse_dw;
> /* XXX: increase range to 8 bits ? */
> if (dx1 > 127)
> dx1 = 127;
> @@ -740,6 +742,9 @@ static int ps2_mouse_send_packet(PS2MouseState *s)
> /* extra byte for IMPS/2 or IMEX */
> switch(s->mouse_type) {
> default:
> +/* Just ignore the wheels if not supported */
> +s->mouse_dz = 0;
> +s->mouse_dw = 0;
> break;
> case 3:
> if (dz1 > 127)
> @@ -747,13 +752,41 @@ static int ps2_mouse_send_packet(PS2MouseState *s)
> else if (dz1 < -127)
> dz1 = -127;
> ps2_queue_noirq(&s->common, dz1 & 0xff);
> +s->mouse_dz -= dz1;
> +s->mouse_dw = 0;
> break;
> case 4:
> -if (dz1 > 7)
> -dz1 = 7;
> -else if (dz1 < -7)
> -dz1 = -7;
> -b = (dz1 & 0x0f) | ((s->mouse_buttons & 0x18) << 1);
> +/*
> + * This matches what the Linux kernel expects for exps/2 in
> + * drivers/input/mouse/psmouse-base.c. Note, if you happen to
> + * press/release the 4th or 5th buttons at the same moment as a
> + * horizontal wheel scroll, those button presses will get lost. I'm
> not
> + * sure what to do about that, since by this point we don't know
> + * whether those buttons actually changed state.
> + */
> +if (dw1 != 0) {
> +if (dw1 > 31) {
> +dw1 = 31;
> +} else if (dw1 < -31) {
> +dw1 = -31;
> +}
> +
> +/*
> + * linux kernel expects first 6 bits to represent the value
> + * for horizontal scroll
> + */
> +b = (dw1 & 0x3f) | 0x40;
> +s->mouse_dw -= dw1;
> +} else {
> +if (dz1 > 7) {
> +dz1 = 7;
> +} else if (dz1 < -7) {
> +dz1 = -7;
> +}
> +
> +b = (dz1 & 0x0f) | ((s->mouse_buttons & 0x18) << 1);
> +s->mouse_dz -= dz1;
> +}
> ps2_queue_noirq(&s->common, b);
> break;
> }
> @@ -764,7 +797,6 @@ static int ps2_mouse_send_packet(PS2MouseState *s)
> /* update deltas */
> s->mouse_dx -= dx1;
> s->mouse_dy -= dy1;
> -s->mouse_dz -= dz1;
>
> return 1;
> }
> @@ -806,6 +838,12 @@ static void ps2_mouse_event(DeviceState *dev,
> QemuConsole *src,
> } else if (btn->button == INPUT_BUTTON_WHEEL_DOWN) {
> s->mouse_dz++;
> }
> +
> +if (btn->button == INPUT_BUTTON_WHEEL_RIGHT) {
> +s->mouse_dw--;
> +} else if (btn->button == INPUT_BUTTON_WHEEL_LEFT) {
> +s->mouse_dw++;
> +}
> } else {
> s->mouse_buttons &= ~bmap[btn->button];
> }
> @@ -833,8 +871,10 @@ static void ps2_mouse_sync(DeviceState *dev)
> /* if not remote, send event. Multiple events are sent if
> too big deltas */
> while (ps2_mouse_send_packet(s)) {
> -
Re: [PATCH v2 2/3] qapi/ui: introduce change-vnc-listen
On Wed, Dec 22, 2021 at 08:17:30PM +0100, Vladimir Sementsov-Ogievskiy wrote:
> Add command that can change addresses where VNC server listens for new
> connections. Prior to 6.0 this functionality was available through
> 'change' qmp command which was deleted.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> Reviewed-by: Marc-André Lureau
> ---
> docs/about/removed-features.rst | 3 ++-
> qapi/ui.json| 19 +++
> ui/vnc.c| 26 ++
> 3 files changed, 47 insertions(+), 1 deletion(-)
>
> diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst
> index d42c3341de..20e6901a82 100644
> --- a/docs/about/removed-features.rst
> +++ b/docs/about/removed-features.rst
> @@ -348,7 +348,8 @@ documentation of ``query-hotpluggable-cpus`` for
> additional details.
> ``change`` (removed in 6.0)
> '''
>
> -Use ``blockdev-change-medium`` or ``change-vnc-password`` instead.
> +Use ``blockdev-change-medium`` or ``change-vnc-password`` or
> +``change-vnc-listen`` instead.
>
> ``query-events`` (removed in 6.0)
> '
> diff --git a/qapi/ui.json b/qapi/ui.json
> index 2b4371da37..6a586edff1 100644
> --- a/qapi/ui.json
> +++ b/qapi/ui.json
> @@ -1334,3 +1334,22 @@
> { 'command': 'display-reload',
>'data': 'DisplayReloadOptions',
>'boxed' : true }
> +
> +##
> +# @change-vnc-listen:
> +#
> +# Change set of addresses to listen for connections.
> +#
> +# @id: vnc display identifier
> +#
> +# @addresses: list of addresses for listen at
> +#
> +# @websockets: list of addresses to listen with websockets
> +#
> +# Since: 7.0
> +#
> +##
> +{ 'command': 'change-vnc-listen',
> + 'data': { 'id': 'str', 'addresses': ['SocketAddress'],
> +'*websockets': ['SocketAddress'] },
> + 'if': 'CONFIG_VNC' }
I replied to your v1 before noticing this v2. So this is just to
point out that I suggested we could use 'display-reload' to update
the address rather than adding a new command.
Regards,
Daniel
--
|: https://berrange.com -o-https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o-https://fstop138.berrange.com :|
|: https://entangle-photo.org-o-https://www.instagram.com/dberrange :|
Re: [PATCH 0/5] Introduce camera subsystem and USB video device
On Mon, Dec 27, 2021 at 10:27:29PM +0800, zhenwei pi wrote: > 1, The full picture of this patch set: >+-+ ++ +---+ >|UVC(done)| |virtio(TODO)| |other HW device| >+-+ ++ +---+ > | | | > |++ | >++camera(done)+-+ > ++---+ >| > +-+-+ > | | | > +--+--+ ++-++--+--+ > |builtin(done)| |v4l2(done)||other drivers| > +-+ +--++-+ > > With this patch set, We can run a desktop VM (Ex Ubuntu-2004), several camera > APPs(cheese, kamoso, guvcview and qcam) work fine. > > Some works still in working: > 1, hot-plug > 2, compat with live migration > 3, several actions defined in UVC SPEC > > Zhenwei Pi (5): > camera: Introduce camera subsystem and builtin driver > camera: v4l2: Introduce v4l2 camera driver > usb: Introduce video&mescellaneous > usb: allow max 8192 bytes for desc > usb-video: Introduce USB video class > > camera/builtin.c| 717 > camera/camera-int.h | 19 + > camera/camera.c | 522 +++ > camera/meson.build | 20 + > camera/trace-events | 28 + > camera/trace.h |1 + > camera/v4l2.c | 637 ++ > hw/usb/Kconfig |5 + > hw/usb/desc.c | 15 +- > hw/usb/desc.h |1 + > hw/usb/dev-video.c | 1395 +++ > hw/usb/meson.build |1 + > hw/usb/trace-events | 11 + > include/camera/camera.h | 238 +++ > include/hw/usb.h|2 + > include/hw/usb/video.h | 303 + > meson.build | 20 +- > meson_options.txt |3 + > qapi/camera.json| 101 +++ > qapi/meson.build|1 + > qapi/qapi-schema.json |1 + > qemu-options.hx | 13 + > softmmu/vl.c|4 + There's no MAINTAINERS file update here. As a general rule, if you are introducing an entire new subsystem into the QEMU codebase, it is expected someone will be nominated as the maintainer for the new subsystem. Usually the person adding it will themselves volunteer to be the maintainer. Regards, Daniel -- |: https://berrange.com -o-https://www.flickr.com/photos/dberrange :| |: https://libvirt.org -o-https://fstop138.berrange.com :| |: https://entangle-photo.org-o-https://www.instagram.com/dberrange :|
[PATCH v1] Check and report for incomplete 'global' option format
Qemu might crash when provided incomplete '-global' option.
For example:
qemu-system-x86_64 -global driver=isa-fdc
qemu-system-x86_64: ../../devel/qemu/qapi/string-input-visitor.c:394:
string_input_visitor_new: Assertion `str' failed.
Aborted (core dumped)
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/604
Signed-off-by: Rohit Kumar
---
softmmu/qdev-monitor.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 01f3834db5..7aee7b9882 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -1020,6 +1020,7 @@ int qemu_global_option(const char *str)
char driver[64], property[64];
QemuOpts *opts;
int rc, offset;
+Error *err = NULL;
rc = sscanf(str, "%63[^.=].%63[^=]%n", driver, property, &offset);
if (rc == 2 && str[offset] == '=') {
@@ -1031,7 +1032,13 @@ int qemu_global_option(const char *str)
}
opts = qemu_opts_parse_noisily(&qemu_global_opts, str, false);
-if (!opts) {
+if (!opts || !qemu_opt_get(opts, "driver") || !qemu_opt_get(opts,
"property") ||
+!qemu_opt_get(opts, "value")) {
+error_setg(&err, "Invalid 'global' option format\n"
+ "Expected: -global .= or "
+ "-global driver=driver,property=property,value=value\n"
+ "Received: -global %s", str);
+error_report_err(err);
return -1;
}
--
2.27.0
Re: [PULL 02/15] linux-user: Move syscall error detection into safe_syscall_base
Le 20/12/2021 à 21:24, Richard Henderson a écrit : The current api from safe_syscall_base() is to return -errno, which is the interface provided by *some* linux kernel abis. The wrapper macro, safe_syscall(), detects error, stores into errno, and returns -1, to match the api of the system syscall(). For those kernel abis that do not return -errno natively, this leads to double syscall error detection. E.g. Linux ppc64, which sets the SO flag for error. Simplify the usage from C by moving the error detection into assembly, and usage from assembly by providing a C helper with which to set errno. Reviewed-by: Warner Losh Signed-off-by: Richard Henderson --- linux-user/safe-syscall.h | 16 +++--- linux-user/safe-syscall-error.c| 28 linux-user/host/aarch64/safe-syscall.inc.S | 20 ++-- linux-user/host/arm/safe-syscall.inc.S | 27 ++-- linux-user/host/i386/safe-syscall.inc.S| 37 +++--- linux-user/host/ppc64/safe-syscall.inc.S | 24 +++--- linux-user/host/riscv/safe-syscall.inc.S | 20 ++-- linux-user/host/s390x/safe-syscall.inc.S | 32 --- linux-user/host/x86_64/safe-syscall.inc.S | 29 + linux-user/meson.build | 1 + 10 files changed, 147 insertions(+), 87 deletions(-) create mode 100644 linux-user/safe-syscall-error.c This patch breaks command execution in bash command line interface: - if I run "chroot chroot/powerpc/jessie ls", it works - if I run "echo ls | chroot chroot/powerpc/jessie", it hangs - if I run "chroot chroot/powerpc/jessie bash invalid_command", it does nothing whereas it should return "bash: invalid_command: No such file or directory". I think the exit status of the command is not correctly detected by bash. Thanks, Laurent
Re: [PATCH v1] Check and report for incomplete 'global' option format
Cc'ing Markus / Thomas
On 4/1/22 14:41, Rohit Kumar wrote:
Qemu might crash when provided incomplete '-global' option.
For example:
qemu-system-x86_64 -global driver=isa-fdc
qemu-system-x86_64: ../../devel/qemu/qapi/string-input-visitor.c:394:
string_input_visitor_new: Assertion `str' failed.
Aborted (core dumped)
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/604
Signed-off-by: Rohit Kumar
---
softmmu/qdev-monitor.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 01f3834db5..7aee7b9882 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -1020,6 +1020,7 @@ int qemu_global_option(const char *str)
char driver[64], property[64];
QemuOpts *opts;
int rc, offset;
+Error *err = NULL;
rc = sscanf(str, "%63[^.=].%63[^=]%n", driver, property, &offset);
if (rc == 2 && str[offset] == '=') {
@@ -1031,7 +1032,13 @@ int qemu_global_option(const char *str)
}
opts = qemu_opts_parse_noisily(&qemu_global_opts, str, false);
-if (!opts) {
+if (!opts || !qemu_opt_get(opts, "driver") || !qemu_opt_get(opts,
"property") ||
+!qemu_opt_get(opts, "value")) {
+error_setg(&err, "Invalid 'global' option format\n"
+ "Expected: -global .= or "
+ "-global driver=driver,property=property,value=value\n"
+ "Received: -global %s", str);
+error_report_err(err);
return -1;
}
Re: [PATCH v4 6/7] tcg/tci: Support raising sigbus for user-only
On 4/1/22 03:15, Richard Henderson wrote: Signed-off-by: Richard Henderson --- tcg/tci.c | 20 ++-- 1 file changed, 14 insertions(+), 6 deletions(-) Reviewed-by: Philippe Mathieu-Daudé
Re: [PATCH v4 7/7] tests/tcg/multiarch: Add sigbus.c
On 4/1/22 03:15, Richard Henderson wrote: A mostly generic test for unaligned access raising SIGBUS. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- tests/tcg/multiarch/sigbus.c | 68 1 file changed, 68 insertions(+) create mode 100644 tests/tcg/multiarch/sigbus.c Reviewed-by: Philippe Mathieu-Daudé
Re: [PATCH 5/9] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp
Cédric Le Goater writes:
> On 1/3/22 23:07, Fabiano Rosas wrote:
>> The ppc_interrupts_little_endian function is suitable for determining
>> the endianness of interrupts for all Book3S CPUs.
>>
>> (I'm keeping the MSR check for the rest of the CPUs, but it will go
>> away in the next patch.)
>>
>> Signed-off-by: Fabiano Rosas
>> ---
>> target/ppc/excp_helper.c | 21 ++---
>> 1 file changed, 2 insertions(+), 19 deletions(-)
>>
>> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
>> index 0dbadc5d07..5d31940426 100644
>> --- a/target/ppc/excp_helper.c
>> +++ b/target/ppc/excp_helper.c
>> @@ -760,25 +760,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
>> excp)
>>* CPU, the HV mode, etc...
>>*/
>> #ifdef TARGET_PPC64
>> -if (excp_model == POWERPC_EXCP_POWER7) {
>> -if (!(new_msr & MSR_HVB) && (env->spr[SPR_LPCR] & LPCR_ILE)) {
>> -new_msr |= (target_ulong)1 << MSR_LE;
>> -}
>> -} else if (excp_model == POWERPC_EXCP_POWER8) {
>> -if (new_msr & MSR_HVB) {
>> -if (env->spr[SPR_HID0] & HID0_HILE) {
>> -new_msr |= (target_ulong)1 << MSR_LE;
>> -}
>> -} else if (env->spr[SPR_LPCR] & LPCR_ILE) {
>> -new_msr |= (target_ulong)1 << MSR_LE;
>> -}
>> -} else if (excp_model == POWERPC_EXCP_POWER9 ||
>> - excp_model == POWERPC_EXCP_POWER10) {
>> -if (new_msr & MSR_HVB) {
>> -if (env->spr[SPR_HID0] & HID0_POWER9_HILE) {
>> -new_msr |= (target_ulong)1 << MSR_LE;
>> -}
>> -} else if (env->spr[SPR_LPCR] & LPCR_ILE) {
>> +if (excp_model >= POWERPC_EXCP_970) {
>
> why include POWERPC_EXCP_970 ? These CPUs do not support Little Endian.
>
Because the 970 exception model covers POWER5P as well which has ILE.
And looking at cpu_init.c, POWER5 uses a bunch of 970 functions. And
POWER7 uses the POWER5 ones. So we kind of have a dependency chain
there. That is why I'm always handling ">= 970" as "books".
Re: [PATCH v3 kvm/queue 01/16] mm/shmem: Introduce F_SEAL_INACCESSIBLE
On 23.12.21 13:29, Chao Peng wrote: > From: "Kirill A. Shutemov" > > Introduce a new seal F_SEAL_INACCESSIBLE indicating the content of > the file is inaccessible from userspace in any possible ways like > read(),write() or mmap() etc. > > It provides semantics required for KVM guest private memory support > that a file descriptor with this seal set is going to be used as the > source of guest memory in confidential computing environments such > as Intel TDX/AMD SEV but may not be accessible from host userspace. > > At this time only shmem implements this seal. > > Signed-off-by: Kirill A. Shutemov > Signed-off-by: Chao Peng > --- > include/uapi/linux/fcntl.h | 1 + > mm/shmem.c | 37 +++-- > 2 files changed, 36 insertions(+), 2 deletions(-) > > diff --git a/include/uapi/linux/fcntl.h b/include/uapi/linux/fcntl.h > index 2f86b2ad6d7e..e2bad051936f 100644 > --- a/include/uapi/linux/fcntl.h > +++ b/include/uapi/linux/fcntl.h > @@ -43,6 +43,7 @@ > #define F_SEAL_GROW 0x0004 /* prevent file from growing */ > #define F_SEAL_WRITE 0x0008 /* prevent writes */ > #define F_SEAL_FUTURE_WRITE 0x0010 /* prevent future writes while mapped */ > +#define F_SEAL_INACCESSIBLE 0x0020 /* prevent file from accessing */ I think this needs more clarification: the file content can still be accessed using in-kernel mechanisms such as MEMFD_OPS for KVM. It effectively disallows traditional access to a file (read/write/mmap) that will result in ordinary MMU access to file content. Not sure how to best clarify that: maybe, prevent ordinary MMU access (e.g., read/write/mmap) to file content? > /* (1U << 31) is reserved for signed error codes */ > > /* > diff --git a/mm/shmem.c b/mm/shmem.c > index 18f93c2d68f1..faa7e9b1b9bc 100644 > --- a/mm/shmem.c > +++ b/mm/shmem.c > @@ -1098,6 +1098,10 @@ static int shmem_setattr(struct user_namespace > *mnt_userns, > (newsize > oldsize && (info->seals & F_SEAL_GROW))) > return -EPERM; > > + if ((info->seals & F_SEAL_INACCESSIBLE) && > + (newsize & ~PAGE_MASK)) > + return -EINVAL; > + What happens when sealing and there are existing mmaps? -- Thanks, David / dhildenb
[PATCH] linux-user/syscall.c: malloc to g_try_malloc
Use g_try_malloc instead of malloc to alocate the target ifconfig.
Also replace the corresponding free with g_free.
Signed-off-by: Ahmed Abouzied
---
Hello,
I noticed that there was a `malloc` call in this file. It seems that it
was added by the commit 22e4a267 (3 years ago) which was after the commit
0e173b24 (6 years ago) that replaced malloc calls with glib alternative calls.
There is no issue for this on Gitlab. Should I have created an issue
first?
Best regards,
linux-user/syscall.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 56a3e17183..715f9430e1 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4867,7 +4867,7 @@ static abi_long do_ioctl_ifconf(const IOCTLEntry *ie,
uint8_t *buf_temp,
* We can't fit all the extents into the fixed size buffer.
* Allocate one that is large enough and use it instead.
*/
-host_ifconf = malloc(outbufsz);
+host_ifconf = g_try_malloc(outbufsz);
if (!host_ifconf) {
return -TARGET_ENOMEM;
}
@@ -4915,7 +4915,7 @@ static abi_long do_ioctl_ifconf(const IOCTLEntry *ie,
uint8_t *buf_temp,
}
if (free_buf) {
-free(host_ifconf);
+g_free(host_ifconf);
}
return ret;
--
2.25.1
Re: [PATCH v4 2/3] acpi: tpm: Add missing device identification objects
On 1/4/22 04:55, Igor Mammedov wrote:
On Wed, 22 Dec 2021 21:23:09 -0500
Stefan Berger wrote:
Add missing device identification objects _STR and _UID. They will appear
why, does it break anything or it's just cosmetic?
I don't know about whether any software needs these entries but it's
driven by this:
https://gitlab.com/qemu-project/qemu/-/issues/708
as files 'description' and 'uid' under Linux sysfs.
Cc: Shannon Zhao
Cc: Michael S. Tsirkin
Cc: Igor Mammedov
Cc: Ani Sinha
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/708
Signed-off-by: Stefan Berger
Message-id: 2020133559.3370990-3-stef...@linux.ibm.com
---
hw/arm/virt-acpi-build.c | 1 +
hw/i386/acpi-build.c | 8
2 files changed, 9 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index d0f4867fdf..f2514ce77c 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -229,6 +229,7 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState
*vms)
Aml *dev = aml_device("TPM0");
aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
+aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
aml_append(dev, aml_name_decl("_UID", aml_int(0)));
Aml *crs = aml_resource_template();
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 8383b83ee3..2fb70847cb 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1812,11 +1812,15 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
dev = aml_device("TPM");
aml_append(dev, aml_name_decl("_HID",
aml_string("MSFT0101")));
+aml_append(dev,
+ aml_name_decl("_STR",
+ aml_string("TPM 2.0 Device")));
} else {
dev = aml_device("ISA.TPM");
aml_append(dev, aml_name_decl("_HID",
aml_eisaid("PNP0C31")));
}
+aml_append(dev, aml_name_decl("_UID", aml_int(1)));
why it's 1, and not 0 as in virt-arm?
Marc-Andre and I looked at machines with hardware TPMs and that's what
we found there as well, a '1'.
aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
crs = aml_resource_template();
@@ -1844,6 +1848,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
if (TPM_IS_CRB(tpm)) {
dev = aml_device("TPM");
aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
+aml_append(dev, aml_name_decl("_STR",
+ aml_string("TPM 2.0 Device")));
crs = aml_resource_template();
aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE,
TPM_CRB_ADDR_SIZE,
AML_READ_WRITE));
@@ -1851,6 +1857,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
no necessary ^^^ empty line
fixed
+aml_append(dev, aml_name_decl("_UID", aml_int(1)));
+
tpm_build_ppi_acpi(tpm, dev);
aml_append(sb_scope, dev);
[PULL 02/15] user: move common-user includes to a subdirectory of {bsd, linux}-user/
Avoid polluting the compilation of common-user/ with local include files;
making an include file available to common-user/ should be a deliberate
decision in order to keep a clear interface that can be used by both
bsd-user/ and linux-user/.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
bsd-user/{ => include}/special-errno.h | 0
bsd-user/meson.build| 2 +-
linux-user/{ => include}/host/aarch64/host-signal.h | 0
linux-user/{ => include}/host/alpha/host-signal.h | 0
linux-user/{ => include}/host/arm/host-signal.h | 0
linux-user/{ => include}/host/i386/host-signal.h| 0
linux-user/{ => include}/host/loongarch64/host-signal.h | 0
linux-user/{ => include}/host/mips/host-signal.h| 0
linux-user/{ => include}/host/ppc/host-signal.h | 0
linux-user/{ => include}/host/ppc64/host-signal.h | 0
linux-user/{ => include}/host/riscv/host-signal.h | 0
linux-user/{ => include}/host/s390/host-signal.h| 0
linux-user/{ => include}/host/s390x/host-signal.h | 0
linux-user/{ => include}/host/sparc/host-signal.h | 0
linux-user/{ => include}/host/sparc64/host-signal.h | 0
linux-user/{ => include}/host/x32/host-signal.h | 0
linux-user/{ => include}/host/x86_64/host-signal.h | 0
linux-user/{ => include}/special-errno.h| 0
linux-user/meson.build | 4 ++--
19 files changed, 3 insertions(+), 3 deletions(-)
rename bsd-user/{ => include}/special-errno.h (100%)
rename linux-user/{ => include}/host/aarch64/host-signal.h (100%)
rename linux-user/{ => include}/host/alpha/host-signal.h (100%)
rename linux-user/{ => include}/host/arm/host-signal.h (100%)
rename linux-user/{ => include}/host/i386/host-signal.h (100%)
rename linux-user/{ => include}/host/loongarch64/host-signal.h (100%)
rename linux-user/{ => include}/host/mips/host-signal.h (100%)
rename linux-user/{ => include}/host/ppc/host-signal.h (100%)
rename linux-user/{ => include}/host/ppc64/host-signal.h (100%)
rename linux-user/{ => include}/host/riscv/host-signal.h (100%)
rename linux-user/{ => include}/host/s390/host-signal.h (100%)
rename linux-user/{ => include}/host/s390x/host-signal.h (100%)
rename linux-user/{ => include}/host/sparc/host-signal.h (100%)
rename linux-user/{ => include}/host/sparc64/host-signal.h (100%)
rename linux-user/{ => include}/host/x32/host-signal.h (100%)
rename linux-user/{ => include}/host/x86_64/host-signal.h (100%)
rename linux-user/{ => include}/special-errno.h (100%)
diff --git a/bsd-user/special-errno.h b/bsd-user/include/special-errno.h
similarity index 100%
rename from bsd-user/special-errno.h
rename to bsd-user/include/special-errno.h
diff --git a/bsd-user/meson.build b/bsd-user/meson.build
index 9fcb80c3fa..8380fa44c2 100644
--- a/bsd-user/meson.build
+++ b/bsd-user/meson.build
@@ -4,7 +4,7 @@ endif
bsd_user_ss = ss.source_set()
-common_user_inc += include_directories('.')
+common_user_inc += include_directories('include')
bsd_user_ss.add(files(
'bsdload.c',
diff --git a/linux-user/host/aarch64/host-signal.h
b/linux-user/include/host/aarch64/host-signal.h
similarity index 100%
rename from linux-user/host/aarch64/host-signal.h
rename to linux-user/include/host/aarch64/host-signal.h
diff --git a/linux-user/host/alpha/host-signal.h
b/linux-user/include/host/alpha/host-signal.h
similarity index 100%
rename from linux-user/host/alpha/host-signal.h
rename to linux-user/include/host/alpha/host-signal.h
diff --git a/linux-user/host/arm/host-signal.h
b/linux-user/include/host/arm/host-signal.h
similarity index 100%
rename from linux-user/host/arm/host-signal.h
rename to linux-user/include/host/arm/host-signal.h
diff --git a/linux-user/host/i386/host-signal.h
b/linux-user/include/host/i386/host-signal.h
similarity index 100%
rename from linux-user/host/i386/host-signal.h
rename to linux-user/include/host/i386/host-signal.h
diff --git a/linux-user/host/loongarch64/host-signal.h
b/linux-user/include/host/loongarch64/host-signal.h
similarity index 100%
rename from linux-user/host/loongarch64/host-signal.h
rename to linux-user/include/host/loongarch64/host-signal.h
diff --git a/linux-user/host/mips/host-signal.h
b/linux-user/include/host/mips/host-signal.h
similarity index 100%
rename from linux-user/host/mips/host-signal.h
rename to linux-user/include/host/mips/host-signal.h
diff --git a/linux-user/host/ppc/host-signal.h
b/linux-user/include/host/ppc/host-signal.h
similarity index 100%
rename from linux-user/host/ppc/host-signal.h
rename to linux-user/include/host/ppc/host-signal.h
diff --git a/linux-user/host/ppc64/host-signal.h
b/linux-user/include/host/ppc64/host-signal.h
similarity index 100%
rename from linux-user/host/ppc64/host-signal.h
rename to linux-user/include/host/ppc64/host-signal.h
diff --git a/linux-user/host/riscv/host-signal.h
b/linux-user/include/host/riscv/host-signal.h
sim
[PULL 04/15] block/file-posix: Simplify the XFS_IOC_DIOINFO handling
From: Thomas Huth
The handling for the XFS_IOC_DIOINFO ioctl is currently quite excessive:
This is not a "real" feature like the other features that we provide with
the "--enable-xxx" and "--disable-xxx" switches for the configure script,
since this does not influence lots of code (it's only about one call to
xfsctl() in file-posix.c), so people don't gain much with the ability to
disable this with "--disable-xfsctl".
It's also unfortunate that the ioctl will be disabled on Linux in case
the user did not install the right xfsprogs-devel package before running
configure. Thus let's simplify this by providing the ioctl definition
on our own, so we can completely get rid of the header dependency and
thus the related code in the configure script.
Suggested-by: Paolo Bonzini
Signed-off-by: Thomas Huth
Message-Id: <20211215125824.250091-1-th...@redhat.com>
Signed-off-by: Paolo Bonzini
---
block/file-posix.c | 37 -
configure | 31 ---
meson.build| 1 -
3 files changed, 16 insertions(+), 53 deletions(-)
diff --git a/block/file-posix.c b/block/file-posix.c
index b283093e5b..1f1756e192 100644
--- a/block/file-posix.c
+++ b/block/file-posix.c
@@ -106,10 +106,6 @@
#include
#endif
-#ifdef CONFIG_XFS
-#include
-#endif
-
/* OS X does not have O_DSYNC */
#ifndef O_DSYNC
#ifdef O_SYNC
@@ -156,9 +152,6 @@ typedef struct BDRVRawState {
int perm_change_flags;
BDRVReopenState *reopen_state;
-#ifdef CONFIG_XFS
-bool is_xfs:1;
-#endif
bool has_discard:1;
bool has_write_zeroes:1;
bool discard_zeroes:1;
@@ -409,14 +402,22 @@ static void raw_probe_alignment(BlockDriverState *bs, int
fd, Error **errp)
if (probe_logical_blocksize(fd, &bs->bl.request_alignment) < 0) {
bs->bl.request_alignment = 0;
}
-#ifdef CONFIG_XFS
-if (s->is_xfs) {
-struct dioattr da;
-if (xfsctl(NULL, fd, XFS_IOC_DIOINFO, &da) >= 0) {
-bs->bl.request_alignment = da.d_miniosz;
-/* The kernel returns wrong information for d_mem */
-/* s->buf_align = da.d_mem; */
-}
+
+#ifdef __linux__
+/*
+ * The XFS ioctl definitions are shipped in extra packages that might
+ * not always be available. Since we just need the XFS_IOC_DIOINFO ioctl
+ * here, we simply use our own definition instead:
+ */
+struct xfs_dioattr {
+uint32_t d_mem;
+uint32_t d_miniosz;
+uint32_t d_maxiosz;
+} da;
+if (ioctl(fd, _IOR('X', 30, struct xfs_dioattr), &da) >= 0) {
+bs->bl.request_alignment = da.d_miniosz;
+/* The kernel returns wrong information for d_mem */
+/* s->buf_align = da.d_mem; */
}
#endif
@@ -798,12 +799,6 @@ static int raw_open_common(BlockDriverState *bs, QDict
*options,
#endif
s->needs_alignment = raw_needs_alignment(bs);
-#ifdef CONFIG_XFS
-if (platform_test_xfs_fd(s->fd)) {
-s->is_xfs = true;
-}
-#endif
-
bs->supported_zero_flags = BDRV_REQ_MAY_UNMAP | BDRV_REQ_NO_FALLBACK;
if (S_ISREG(st.st_mode)) {
/* When extending regular files, we get zeros from the OS */
diff --git a/configure b/configure
index 030728d11e..3a523a3d14 100755
--- a/configure
+++ b/configure
@@ -291,7 +291,6 @@ EXTRA_CXXFLAGS=""
EXTRA_LDFLAGS=""
xen_ctrl_version="$default_feature"
-xfs="$default_feature"
membarrier="$default_feature"
vhost_kernel="$default_feature"
vhost_net="$default_feature"
@@ -1021,10 +1020,6 @@ for opt do
;;
--enable-opengl) opengl="yes"
;;
- --disable-xfsctl) xfs="no"
- ;;
- --enable-xfsctl) xfs="yes"
- ;;
--disable-zlib-test)
;;
--enable-guest-agent) guest_agent="yes"
@@ -1431,7 +1426,6 @@ cat << EOF
avx512f AVX512F optimization support
replication replication support
opengl opengl support
- xfsctl xfsctl support
qom-cast-debug cast debugging support
tools build qemu-io, qemu-nbd and qemu-img tools
bochs bochs image format support
@@ -2323,28 +2317,6 @@ EOF
fi
fi
-##
-# xfsctl() probe, used for file-posix.c
-if test "$xfs" != "no" ; then
- cat > $TMPC << EOF
-#include /* NULL */
-#include
-int main(void)
-{
-xfsctl(NULL, 0, 0, NULL);
-return 0;
-}
-EOF
- if compile_prog "" "" ; then
-xfs="yes"
- else
-if test "$xfs" = "yes" ; then
- feature_not_found "xfs" "Install xfsprogs/xfslibs devel"
-fi
-xfs=no
- fi
-fi
-
##
# plugin linker support probe
@@ -3456,9 +3428,6 @@ echo "CONFIG_BDRV_RO_WHITELIST=$block_drv_ro_whitelist"
>> $config_host_mak
if test "$block_drv_whitelist_tools" = "yes" ; then
echo "CONFIG_BDRV_WHITELIST_TOOLS=y" >> $config_host_mak
fi
-if test "$xfs" = "yes" ; then
- echo "CONFIG_XFS=y" >> $config_host_mak
-fi
qemu_version=$(head $source_path/VERSION)
echo "PKGVERSION=$pkgversion" >>$config_host_mak
[PULL v3 00/15] Build system and KVM changes for 2021-12-23
The following changes since commit b5a3d8bc9146ba22a25116cb748c97341bf99737:
Merge tag 'pull-misc-20220103' of https://gitlab.com/rth7680/qemu into
staging (2022-01-03 09:34:41 -0800)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to a2c137e7e00d1bfcc80a17ff8e5104d0e1de2f9a:
tests/tcg: Fix target-specific Makefile variables path for user-mode
(2022-01-04 14:08:44 +0100)
* configure and meson cleanups
* KVM_GET/SET_SREGS2 support for x86
I dropped the tricore Dockerfile change because it is still broken occasionally
with the patch.
Maxim Levitsky (1):
KVM: use KVM_{GET|SET}_SREGS2 when supported.
Paolo Bonzini (12):
meson: reuse common_user_inc when building files specific to user-mode
emulators
user: move common-user includes to a subdirectory of {bsd,linux}-user/
meson: cleanup common-user/ build
configure: simplify creation of plugin symbol list
configure: do not set bsd_user/linux_user early
configure, makefile: remove traces of really old files
configure: parse --enable/--disable-strip automatically, flip default
configure: move non-command-line variables away from command-line parsing
section
meson: build contrib/ executables after generated headers
configure, meson: move config-poison.h to meson
meson: add comments in the target-specific flags section
KVM: x86: ignore interrupt_bitmap field of KVM_GET/SET_SREGS
Philippe Mathieu-Daudé (1):
tests/tcg: Fix target-specific Makefile variables path for user-mode
Thomas Huth (1):
block/file-posix: Simplify the XFS_IOC_DIOINFO handling
Makefile | 11 +-
block/file-posix.c | 37 ++---
bsd-user/{ => include}/special-errno.h | 0
bsd-user/meson.build | 2 +-
common-user/meson.build| 2 +-
configure | 182 +++--
contrib/elf2dmp/meson.build| 2 +-
contrib/ivshmem-client/meson.build | 2 +-
contrib/ivshmem-server/meson.build | 2 +-
contrib/rdmacm-mux/meson.build | 2 +-
.../{ => include}/host/aarch64/host-signal.h | 0
linux-user/{ => include}/host/alpha/host-signal.h | 0
linux-user/{ => include}/host/arm/host-signal.h| 0
linux-user/{ => include}/host/i386/host-signal.h | 0
.../{ => include}/host/loongarch64/host-signal.h | 0
linux-user/{ => include}/host/mips/host-signal.h | 0
linux-user/{ => include}/host/ppc/host-signal.h| 0
linux-user/{ => include}/host/ppc64/host-signal.h | 0
linux-user/{ => include}/host/riscv/host-signal.h | 0
linux-user/{ => include}/host/s390/host-signal.h | 0
linux-user/{ => include}/host/s390x/host-signal.h | 0
linux-user/{ => include}/host/sparc/host-signal.h | 0
.../{ => include}/host/sparc64/host-signal.h | 0
linux-user/{ => include}/host/x32/host-signal.h| 0
linux-user/{ => include}/host/x86_64/host-signal.h | 0
linux-user/{ => include}/special-errno.h | 0
linux-user/meson.build | 4 +-
meson.build| 33 ++--
pc-bios/s390-ccw/Makefile | 2 -
plugins/meson.build| 11 +-
scripts/make-config-poison.sh | 16 ++
scripts/meson-buildoptions.py | 21 ++-
scripts/meson-buildoptions.sh | 3 +
target/i386/cpu.h | 3 +
target/i386/kvm/kvm.c | 130 +--
target/i386/machine.c | 29
tests/tcg/Makefile.target | 2 +-
37 files changed, 259 insertions(+), 237 deletions(-)
rename bsd-user/{ => include}/special-errno.h (100%)
rename linux-user/{ => include}/host/aarch64/host-signal.h (100%)
rename linux-user/{ => include}/host/alpha/host-signal.h (100%)
rename linux-user/{ => include}/host/arm/host-signal.h (100%)
rename linux-user/{ => include}/host/i386/host-signal.h (100%)
rename linux-user/{ => include}/host/loongarch64/host-signal.h (100%)
rename linux-user/{ => include}/host/mips/host-signal.h (100%)
rename linux-user/{ => include}/host/ppc/host-signal.h (100%)
rename linux-user/{ => include}/host/ppc64/host-signal.h (100%)
rename linux-user/{ => include}/host/riscv/host-signal.h (100%)
rename linux-user/{ => include}/host/s390/host-signal.h (100%)
rename linux-user/{ => include}/host/s390x/host-signal.h (100%)
rename linux-user/{ => include}/host/sparc/host-signal.h (100%)
rename linux-user/{ => include}/host/s
[PULL 01/15] meson: reuse common_user_inc when building files specific to user-mode emulators
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index 53065e96ec..de111d6fa1 100644
--- a/meson.build
+++ b/meson.build
@@ -2919,6 +2919,7 @@ foreach target : target_dirs
else
abi = config_target['TARGET_ABI_DIR']
target_type='user'
+target_inc += common_user_inc
qemu_target_name = 'qemu-' + target_name
if target_base_arch in target_user_arch
t = target_user_arch[target_base_arch].apply(config_target, strict:
false)
@@ -2927,7 +2928,6 @@ foreach target : target_dirs
endif
if 'CONFIG_LINUX_USER' in config_target
base_dir = 'linux-user'
- target_inc += include_directories('linux-user/host/' / host_arch)
endif
if 'CONFIG_BSD_USER' in config_target
base_dir = 'bsd-user'
--
2.33.1
[PULL 05/15] configure: simplify creation of plugin symbol list
--dynamic-list is present on all supported ELF (not Windows or Darwin)
platforms, since it dates back to 2006; -exported_symbols_list is
likewise present on all supported versions of macOS. Do not bother
doing a functional test in configure.
Remove the file creation from configure as well: for Darwin, move the
the creation of the Darwin-formatted symbols to meson; for ELF, use the
file in the source path directly and switch from -Wl, to -Xlinker to
not break weird paths that include a comma.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
configure | 80 -
plugins/meson.build | 11 +--
2 files changed, 8 insertions(+), 83 deletions(-)
diff --git a/configure b/configure
index 3a523a3d14..5e61439761 100755
--- a/configure
+++ b/configure
@@ -78,7 +78,6 @@ TMPC="${TMPDIR1}/${TMPB}.c"
TMPO="${TMPDIR1}/${TMPB}.o"
TMPCXX="${TMPDIR1}/${TMPB}.cxx"
TMPE="${TMPDIR1}/${TMPB}.exe"
-TMPTXT="${TMPDIR1}/${TMPB}.txt"
rm -f config.log
@@ -2317,69 +2316,6 @@ EOF
fi
fi
-##
-# plugin linker support probe
-
-if test "$plugins" != "no"; then
-
-#
-# See if --dynamic-list is supported by the linker
-
-ld_dynamic_list="no"
-cat > $TMPTXT < $TMPC <
-void foo(void);
-
-void foo(void)
-{
- printf("foo\n");
-}
-
-int main(void)
-{
- foo();
- return 0;
-}
-EOF
-
-if compile_prog "" "-Wl,--dynamic-list=$TMPTXT" ; then
-ld_dynamic_list="yes"
-fi
-
-#
-# See if -exported_symbols_list is supported by the linker
-
-ld_exported_symbols_list="no"
-cat > $TMPTXT <> $config_host_mak
-# Copy the export object list to the build dir
-if test "$ld_dynamic_list" = "yes" ; then
- echo "CONFIG_HAS_LD_DYNAMIC_LIST=yes" >> $config_host_mak
- ld_symbols=qemu-plugins-ld.symbols
- cp "$source_path/plugins/qemu-plugins.symbols" $ld_symbols
-elif test "$ld_exported_symbols_list" = "yes" ; then
- echo "CONFIG_HAS_LD_EXPORTED_SYMBOLS_LIST=yes" >> $config_host_mak
- ld64_symbols=qemu-plugins-ld64.symbols
- echo "# Automatically generated by configure - do not modify" >
$ld64_symbols
- grep 'qemu_' "$source_path/plugins/qemu-plugins.symbols" | sed 's/;//g'
| \
- sed -E 's/^[[:space:]]*(.*)/_\1/' >> $ld64_symbols
-else
- error_exit \
- "If \$plugins=yes, either \$ld_dynamic_list or " \
- "\$ld_exported_symbols_list should have been set to 'yes'."
-fi
fi
if test -n "$gdb_bin"; then
diff --git a/plugins/meson.build b/plugins/meson.build
index b3de57853b..d0a2ee94cf 100644
--- a/plugins/meson.build
+++ b/plugins/meson.build
@@ -1,10 +1,15 @@
plugin_ldflags = []
# Modules need more symbols than just those in plugins/qemu-plugins.symbols
if not enable_modules
- if 'CONFIG_HAS_LD_DYNAMIC_LIST' in config_host
-plugin_ldflags = ['-Wl,--dynamic-list=qemu-plugins-ld.symbols']
- elif 'CONFIG_HAS_LD_EXPORTED_SYMBOLS_LIST' in config_host
+ if targetos == 'darwin'
+qemu_plugins_symbols_list = configure_file(
+ input: files('qemu-plugins.symbols'),
+ output: 'qemu-plugins-ld64.symbols',
+ capture: true,
+ command: ['sed', '-ne', 's/^[[:space:]]*\\(qemu_.*\\);/_\\1/p',
'@INPUT@'])
plugin_ldflags = ['-Wl,-exported_symbols_list,qemu-plugins-ld64.symbols']
+ else
+plugin_ldflags = ['-Xlinker', '--dynamic-list=' +
(meson.project_source_root() / 'plugins/qemu-plugins.symbols')]
endif
endif
--
2.33.1
[PULL 06/15] configure: do not set bsd_user/linux_user early
Similar to other optional features, leave the variables empty and compute
the actual value later. Use the existence of include or source directories
to detect whether an OS or CPU supports respectively bsd-user and linux-user.
For now, BSD user-mode emulation is buildable even on TCI-only
architectures. This probably will change once safe signals are
brought over from linux-user.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
configure | 28 +---
1 file changed, 17 insertions(+), 11 deletions(-)
diff --git a/configure b/configure
index 5e61439761..b93ba2c86c 100755
--- a/configure
+++ b/configure
@@ -320,8 +320,8 @@ linux="no"
solaris="no"
profiler="no"
softmmu="yes"
-linux_user="no"
-bsd_user="no"
+linux_user=""
+bsd_user=""
pkgversion=""
pie=""
qom_cast_debug="yes"
@@ -538,7 +538,6 @@ gnu/kfreebsd)
;;
freebsd)
bsd="yes"
- bsd_user="yes"
make="${MAKE-gmake}"
# needed for kinfo_getvmmap(3) in libutil.h
;;
@@ -583,7 +582,6 @@ haiku)
;;
linux)
linux="yes"
- linux_user="yes"
vhost_user=${default_feature:-yes}
;;
esac
@@ -1259,18 +1257,26 @@ if eval test -z "\${cross_cc_$cpu}"; then
cross_cc_vars="$cross_cc_vars cross_cc_${cpu}"
fi
-# For user-mode emulation the host arch has to be one we explicitly
-# support, even if we're using TCI.
-if [ "$ARCH" = "unknown" ]; then
- bsd_user="no"
- linux_user="no"
-fi
-
default_target_list=""
deprecated_targets_list=ppc64abi32-linux-user
deprecated_features=""
mak_wilds=""
+if [ "$linux_user" != no ]; then
+if [ "$targetos" = linux ] && [ -d
$source_path/linux-user/include/host/$cpu ]; then
+linux_user=yes
+elif [ "$linux_user" = yes ]; then
+error_exit "linux-user not supported on this architecture"
+fi
+fi
+if [ "$bsd_user" != no ]; then
+if [ "$bsd_user" = "" ]; then
+test $targetos = freebsd && bsd_user=yes
+fi
+if [ "$bsd_user" = yes ] && ! [ -d $source_path/bsd-user/$targetos ]; then
+error_exit "bsd-user not supported on this host OS"
+fi
+fi
if [ "$softmmu" = "yes" ]; then
mak_wilds="${mak_wilds} $source_path/configs/targets/*-softmmu.mak"
fi
--
2.33.1
