Re: [Qemu-devel] SPARC iommu mapping
Am Montag, 17. April 2006 10:49 schrieb Blue Swirl:
Hi!
> This command fails when installing kernel and modules:
> qemu-system-sparc -kernel vmlinux-2.6.11+tcx -cdrom
> debian-30r4-sparc-binary-1.iso -hda hd -initrd debian-30r4-sparc.initrd
> -nographic -append 'cdrom ramdisk_size=16384 devfs=mount rw root=/dev/rd/0'
After spending more time on this issue I tried to reproduce your problems. But
I can't find a suitable initrd. The initrd from ftp.debian.org caused an
Oops:
RAMDISK: ext2 filesystem found at block 0
RAMDISK: Loading 10028KiB [1 disk] into ram disk... done.
VFS: Mounted root (ext2 filesystem).
Root-NFS: No NFS server available, giving up.
Unable to handle kernel NULL pointer dereference
tsk->{mm,active_mm}->context =
tsk->{mm,active_mm}->pgd = fc00
\|/ \|/
"@'/ ,. \`@"
/_| \__/ |_\
\__U_/
swapper(1): Oops [#1]
Which initrd did you use?
regards,
Jörg
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Re: [Qemu-devel] SPARC iommu mapping
swapper(1): Oops [#1] Which initrd did you use? It's the file /dists/stable/main/disks-sparc/current/images-1.44/root.bin as specified by /boot/silo.conf, from debian-30r4-sparc-binary-1.iso. _ Express yourself instantly with MSN Messenger! Download today it's FREE! http://messenger.msn.click-url.com/go/onm00200471ave/direct/01/ ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] MIPS: UART access w/o -kernel option
Hi! I'm still trying to run a MIPS mmon as a BIOS :) I've found one strange issue : when it runs at the KSEG0 region (0x80008000) with -kernel option it works fine. When I'm trying to run it in the MIPS BIOS region (0xbfc0) it can't output anything to the UART and Qemu segfaults on the any keypress (not my program, but whole Qemu !) Seems, UART is unmapped w/o -kernel option or something similar. There was no such issue in the previous CVS (a week ago). The "mmon-qemu" sourcecode and binaries are there: http://www.nwpi.ru/~alec/mips/mmon-qemu-0.5.tgz From the KSEG0 (run as kernel) : = [EMAIL PROTECTED] mmon-qemu-0.5]$ ../qemu/bin/qemu-system-mipsel -nographic -kernel mmon.elf(qemu) Could not configure '/dev/rtc' to have a 1024 Hz timer. This is not a fatalerror, but for better emulation accuracy either use a 2.6 host Linux kernel ortype 'echo 1024 > /proc/sys/dev/rtc/max-user-freq' as root.mips_r4k_init: load BIOS '/home/alec/mips/qemu/share/qemu/mips_bios.bin' size 131072qemu: Warning, could not load MIPS bios '/home/alec/mips/qemu/share/qemu/mips_bios.bin' mmon: VR4300 mini-monitor, Copyright 1996, 2003 Eric Smith <[EMAIL PROTECTED]>>?Commands: db [] dump bytes from addr1 to addr2dh [] dump half-words (16 bits)dw [] dump words (32 bits)sb ... store bytesh ... store half-word (16 bits)sw ... store word (32 bits)swl store word leftswr store word rightfb fill bytes of memory rangefh fill half-wordsfw fill wordsl load S-recordsg [] go (start execution at address)h help (show this command list)>db bfc0BFC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00BFC00010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00BFC00020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00BFC00030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00== From the KSEG1 (i'm using a stub file "reset" ) == [EMAIL PROTECTED] mmon-qemu-0.5]$ ../qemu/bin/qemu-system-mipsel -nographic -L . reset(qemu) Could not configure '/dev/rtc' to have a 1024 Hz timer. This is not a fatalerror, but for better emulation accuracy either use a 2.6 host Linux kernel ortype 'echo 1024 > /proc/sys/dev/rtc/max-user-freq' as root.mips_r4k_init: load BIOS './mips_bios.bin' size 131072Segmentation fault (core dumped) [EMAIL PROTECTED] mmon-qemu-0.5]$ gdb -c core.15214GNU gdb Red Hat Linux (6.1post-1.20040607.62rh)Copyright 2004 Free Software Foundation, Inc.GDB is free software, covered by the GNU General Public License, and you arewelcome to change it and/or distribute copies of it under certain conditions.Type "show copying" to see the conditions.There is absolutely no warranty for GDB. Type "show warranty" for details.This GDB was configured as "i386-redhat-linux-gnu".Core was generated by `../qemu/bin/qemu-system-mipsel -nographic -L'.Program terminated with signal 11, Segmentation fault.#0 0x in ?? ()(gdb) bt#0 0x in ?? ()#1 0x0804b4c7 in ?? ()#2 0x in ?? ()== -- -=AV=- ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] qemu/hw mips_r4k.c
Thiemo Seufer wrote: Fabrice Bellard wrote: CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/02 22:18:28 Modified files: hw : mips_r4k.c Log message: performance boost (on P4 hosts at least, rdtsc is a _very_ bad random generator) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/mips_r4k.c.diff?tr1=1.15&tr2=1.16&r1=text&r2=text Does this really provide a measurable performance improvement? Real hardware simply increments cp0_random together with the cycle counter, this is randomized enough for TLB entry replacement. Unfortunately, at least on my P4 PC it is not random enough: it is always a multiple of two, so the number of TLBs is divided by two ! The speed improvement is _very_ noticeable. Your patch to accelerate tlb_flush_page() is still interesting, but I would like to be sure that it does not reduce the speed of the x86 target. In particular, it could be possible to make it even faster by reducing the size of the memset by using a smarter hash for tb_jmp_cache (a few bit of the index could depend only on the memory page number). Fabrice. ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/target-i386 exec.h helper.c op.c
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 19:17:26 Modified files: target-i386: exec.h helper.c op.c Log message: bswapq fix CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-i386/exec.h.diff?tr1=1.28&tr2=1.29&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-i386/helper.c.diff?tr1=1.64&tr2=1.65&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/target-i386/op.c.diff?tr1=1.43&tr2=1.44&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] MIPS interrupt handling
Thiemo Seufer wrote: Fabrice Bellard wrote: I just looked at the MIPS file target-mips/op_helper.c and I don't understand why IRQs need to be handled in op_helper.c:do_mtc0() with reg = 12. Register 12 is the cp0_status register, it defines which interrupts are masked/enabled/disabled. Btw, I have a patch which moves this to op.c, this should improve performance a bit (and avoids the TB stop for most mtc0 writes). op.c should only contain small functions so it is not a good idea. TB stop after mtc0 is needed at least when the TLB are modified or to handle the interrupts. The current handling of interrupts in mtc0 must be suppressed ASAP as it is not useful and complicates the code. IMHO, the corresponding code should be deleted because the TB is forced to terminate after mtc0 so that the IRQs can be handled in the main loop in cpu-exec.c. Moreover, clearing CPU_INTERRUPT_HARD in do_mtc0() is almost surely a bug ! Somehow the interrupt assert has to be prevented when St0_IE is cleared. That's probably also a job for the main loop, but there may be a race condition (haven't looked yet). Empirically, it works well. :-) If ST0_IE means interrupt enable, the interrupt assert must not be suppressed, but I did not read yet this part of the MIPS spec... Fabrice. ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] qemu/hw mips_r4k.c
Fabrice Bellard wrote: > Thiemo Seufer wrote: > >Fabrice Bellard wrote: > > > >>CVSROOT:/sources/qemu > >>Module name:qemu > >>Branch: > >>Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/02 > >>22:18:28 > >> > >>Modified files: > >>hw : mips_r4k.c > >> > >>Log message: > >>performance boost (on P4 hosts at least, rdtsc is a _very_ bad > >>random generator) > >> > >>CVSWeb URLs: > >>http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/mips_r4k.c.diff?tr1=1.15&tr2=1.16&r1=text&r2=text > > > > > >Does this really provide a measurable performance improvement? > >Real hardware simply increments cp0_random together with the cycle > >counter, this is randomized enough for TLB entry replacement. > > Unfortunately, at least on my P4 PC it is not random enough: it is > always a multiple of two, so the number of TLBs is divided by two ! The > speed improvement is _very_ noticeable. > > Your patch to accelerate tlb_flush_page() is still interesting, but I > would like to be sure that it does not reduce the speed of the x86 > target. In particular, it could be possible to make it even faster by > reducing the size of the memset by using a smarter hash for tb_jmp_cache > (a few bit of the index could depend only on the memory page number). As interim solution I moved it to mips specific code, I still don't trust the MIPS TLB handling that much since it starts to fail once I remove seemingly unnecessary flushes. I still have nearly no time to work on qemu ATM. :-( Thiemo ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] MIPS interrupt handling
Fabrice Bellard wrote: > Thiemo Seufer wrote: > >Fabrice Bellard wrote: > > > >>I just looked at the MIPS file target-mips/op_helper.c and I don't > >>understand why IRQs need to be handled in op_helper.c:do_mtc0() with reg > >>= 12. > > > > > >Register 12 is the cp0_status register, it defines which interrupts are > >masked/enabled/disabled. Btw, I have a patch which moves this to op.c, > >this should improve performance a bit (and avoids the TB stop for > >most mtc0 writes). > > op.c should only contain small functions so it is not a good idea. TB > stop after mtc0 is needed at least when the TLB are modified or to > handle the interrupts. Agreed for the cp0_status part, the other functions are small (probably except cp_cause) and most of them don't need TB stop. > The current handling of interrupts in mtc0 must > be suppressed ASAP as it is not useful and complicates the code. > > >>IMHO, the corresponding code should be deleted because the TB is > >>forced to terminate after mtc0 so that the IRQs can be handled in the > >>main loop in cpu-exec.c. > >> > >>Moreover, clearing CPU_INTERRUPT_HARD in do_mtc0() is almost surely a bug > >>! > > > > > >Somehow the interrupt assert has to be prevented when St0_IE is cleared. > >That's probably also a job for the main loop, but there may be a race > >condition (haven't looked yet). Empirically, it works well. :-) > > If ST0_IE means interrupt enable, the interrupt assert must not be > suppressed, but I did not read yet this part of the MIPS spec... As I tried to explain, I suspect there's a race between disabling interrupts via ST0_IE and turning them off in the exception handling code. For the enable part, it shouldn't matter that much. Thiemo ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/slirp ip_icmp.c main.h misc.c slirp.c sock...
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 19:58:17 Modified files: slirp : ip_icmp.c main.h misc.c slirp.c socket.c tcp_subr.c udp.c Log message: separate alias_addr (10.0.2.2) from our_addr (Ed Swierk) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/ip_icmp.c.diff?tr1=1.1&tr2=1.2&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/main.h.diff?tr1=1.2&tr2=1.3&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/misc.c.diff?tr1=1.6&tr2=1.7&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/slirp.c.diff?tr1=1.12&tr2=1.13&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/socket.c.diff?tr1=1.7&tr2=1.8&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/tcp_subr.c.diff?tr1=1.5&tr2=1.6&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/udp.c.diff?tr1=1.6&tr2=1.7&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu VERSION Changelog
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 20:15:47 Modified files: . : VERSION Changelog Log message: update CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/VERSION.diff?tr1=1.27&tr2=1.28&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/Changelog.diff?tr1=1.115&tr2=1.116&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu configure
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 20:18:43 Modified files: . : configure Log message: removed sh4 user build (not usable yet) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/configure.diff?tr1=1.99&tr2=1.100&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] QEMU 0.8.1
Hi, QEMU version 0.8.1 is available at http://bellard.org/qemu/download.html. version 0.8.1: - USB tablet support (Brad Campbell, Anthony Liguori) - win32 host serial support (Kazu) - PC speaker support (Joachim Henke) - IDE LBA48 support (Jens Axboe) - SSE3 support - Solaris port (Ben Taylor) - Preliminary SH4 target (Samuel Tardieu) - VNC server (Anthony Liguori) - slirp fixes (Ed Swierk et al.) - USB fixes - ARM Versatile Platform Baseboard emulation (Paul Brook) Fabrice. ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/slirp udp.c
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 20:53:46 Modified files: slirp : udp.c Log message: UDP broadcast translation error (Mark Jonckheere) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/slirp/udp.c.diff?tr1=1.7&tr2=1.8&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] QEMU 0.8.1
mingw32 build breaks on "ssize_t" which should be "long" instead on win32 (see previous post on vnc.c). beyond this little detail, compiled version works fine on win32 (I'll do more testing tomorrow). do we need kqemu-1.3.0pre6.tar.gz for this version or a newer kqemu ? On 5/3/06, Fabrice Bellard <[EMAIL PROTECTED]> wrote: Hi, QEMU version 0.8.1 is available at http://bellard.org/qemu/download.html. version 0.8.1: - USB tablet support (Brad Campbell, Anthony Liguori) - win32 host serial support (Kazu) - PC speaker support (Joachim Henke) - IDE LBA48 support (Jens Axboe) - SSE3 support - Solaris port (Ben Taylor) - Preliminary SH4 target (Samuel Tardieu) - VNC server (Anthony Liguori) - slirp fixes (Ed Swierk et al.) - USB fixes - ARM Versatile Platform Baseboard emulation (Paul Brook) Fabrice. ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel -- Christian ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu vnc.c
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 21:18:59 Modified files: . : vnc.c Log message: removed ssize_t for win32 compatibility CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/vnc.c.diff?tr1=1.4&tr2=1.5&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/pc-bios bios.bin bios.diff
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 21:24:55 Modified files: pc-bios: bios.bin bios.diff Log message: more correct e820 ranges for ACPI compatibility CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/pc-bios/bios.bin.diff?tr1=1.13&tr2=1.14&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/pc-bios/bios.diff.diff?tr1=1.11&tr2=1.12&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu ./Makefile.target ./vl.c ./vl.h hw/pc.c hw...
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 22:02:44 Modified files: . : Makefile.target vl.c vl.h hw : pc.c Added files: hw : acpi.c acpi-dsdt.dsl acpi-dsdt.hex Log message: ACPI support CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/Makefile.target.diff?tr1=1.107&tr2=1.108&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/vl.c.diff?tr1=1.184&tr2=1.185&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/vl.h.diff?tr1=1.116&tr2=1.117&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/pc.c.diff?tr1=1.53&tr2=1.54&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/acpi.c?rev=1.1 http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/acpi-dsdt.dsl?rev=1.1 http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/acpi-dsdt.hex?rev=1.1 ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] [PATCH] Allow user to configure -net user subnet
In environments where the 10.0.2.0/24 subnet is already used for
another purpose, it's useful to be able to configure a different -net
user (slirp) subnet, such as 192.168.100.0/24.
The attached patch adds a subnet option to -user net. Currently only
/24 subnets (mask 255.255.255.0) are accepted. An error is generated
if the specified subnet is not of the form XX.YY.ZZ.0/24. This
restriction could be relaxed in the future with more extensive changes
to slirp.
One quirk is that the default guest-host for the -redir option remains
10.0.2.15 even if the user passes a different subnet to -net user.
Obviously this can be worked around by explicitly specifying the
correct guest-host. The next patch (qemu-slirp-options.patch) fixes
this issue, among others.
--Ed
diff -BurN qemu.orig/slirp/libslirp.h qemu/slirp/libslirp.h
--- qemu.orig/slirp/libslirp.h 2006-05-01 16:05:27.0 +
+++ qemu/slirp/libslirp.h 2006-05-02 17:27:59.0 +
@@ -13,6 +13,8 @@
extern "C" {
#endif
+#include "ctl.h"
+
void slirp_init(void);
void slirp_select_fill(int *pnfds,
@@ -33,6 +35,8 @@
extern const char *tftp_prefix;
extern char slirp_hostname[33];
+extern struct in_addr special_addr;
+extern struct in_addr alias_addr;
#ifdef __cplusplus
}
diff -BurN qemu.orig/slirp/main.h qemu/slirp/main.h
--- qemu.orig/slirp/main.h 2006-05-02 17:27:34.0 +
+++ qemu/slirp/main.h 2006-05-02 17:27:59.0 +
@@ -33,8 +33,6 @@
extern u_int curtime;
extern fd_set *global_readfds, *global_writefds, *global_xfds;
extern struct in_addr ctl_addr;
-extern struct in_addr special_addr;
-extern struct in_addr alias_addr;
extern struct in_addr our_addr;
extern struct in_addr loopback_addr;
extern struct in_addr dns_addr;
diff -BurN qemu.orig/slirp/slirp.c qemu/slirp/slirp.c
--- qemu.orig/slirp/slirp.c 2006-05-02 17:27:34.0 +
+++ qemu/slirp/slirp.c 2006-05-02 17:27:59.0 +
@@ -155,8 +155,6 @@
fprintf (stderr, "Warning: No DNS servers found\n");
}
-inet_aton(CTL_SPECIAL, &special_addr);
-alias_addr.s_addr = special_addr.s_addr | htonl(CTL_ALIAS);
getouraddr();
}
diff -BurN qemu.orig/vl.c qemu/vl.c
--- qemu.orig/vl.c 2006-05-01 16:05:27.0 +
+++ qemu/vl.c 2006-05-02 17:28:44.0 +
@@ -2400,7 +2400,7 @@
if (get_str_sep(buf, sizeof(buf), &p, ':') < 0)
goto fail;
if (buf[0] == '\0') {
-pstrcpy(buf, sizeof(buf), "10.0.2.15");
+pstrcpy(buf, sizeof(buf), CTL_LOCAL);
}
if (!inet_aton(buf, &guest_addr))
goto fail;
@@ -3170,6 +3170,22 @@
} else
#ifdef CONFIG_SLIRP
if (!strcmp(device, "user")) {
+if (get_param_value(buf, sizeof(buf), "subnet", p)) {
+char *len;
+len = strchr(buf, 0) - 3;
+if (len < buf || strcmp(len, "/24")) {
+fprintf(stderr, "qemu: invalid subnet=%s (mask must be /24)\n", buf);
+return -1;
+}
+*len = 0;
+} else {
+pstrcpy(buf, sizeof(buf), CTL_SPECIAL);
+}
+if (!inet_aton(buf, &special_addr) || (ntohl(special_addr.s_addr) & 0xff)) {
+fprintf(stderr, "qemu: invalid subnet=%s\n", buf);
+return -1;
+}
+alias_addr.s_addr = special_addr.s_addr | htonl(CTL_ALIAS);
if (get_param_value(buf, sizeof(buf), "hostname", p)) {
pstrcpy(slirp_hostname, sizeof(slirp_hostname), buf);
}
@@ -4628,9 +4644,9 @@
"-net nic[,vlan=n][,macaddr=addr][,model=type]\n"
"create a new Network Interface Card and connect it to VLAN 'n'\n"
#ifdef CONFIG_SLIRP
- "-net user[,vlan=n][,hostname=host]\n"
- "connect the user mode network stack to VLAN 'n' and send\n"
- "hostname 'host' to DHCP clients\n"
+ "-net user[,vlan=n][,hostname=host][,subnet=addr/24]\n"
+ "connect the user mode network stack to VLAN 'n'; send\n"
+ "hostname 'host' to DHCP clients; use subnet addr\n"
#endif
#ifdef _WIN32
"-net tap[,vlan=n],ifname=name\n"
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[Qemu-devel] qemu/hw acpi-dsdt.dsl acpi-dsdt.hex
CVSROOT:/sources/qemu Module name:qemu Branch: Changes by: Fabrice Bellard <[EMAIL PROTECTED]> 06/05/03 23:13:13 Modified files: hw : acpi-dsdt.dsl acpi-dsdt.hex Log message: PCI irq mapping fix CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/acpi-dsdt.dsl.diff?tr1=1.1&tr2=1.2&r1=text&r2=text http://cvs.savannah.gnu.org/viewcvs/qemu/qemu/hw/acpi-dsdt.hex.diff?tr1=1.1&tr2=1.2&r1=text&r2=text ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
