Re: [Mesa-dev] [PATCH] glsl: Convert TES gl_PatchVerticesIn into a constant when using a TCS.
Reviewed-by: Marek Olšák
Marek
On Sun, Oct 25, 2015 at 4:27 AM, Kenneth Graunke wrote:
> When a TCS is present, the TES input gl_PatchVerticesIn is actually a
> constant - it's simply the # of output vertices specified by the TCS
> layout qualifiers. So, we can replace the system value with a constant,
> which may allow further optimization, and will likely be more efficient.
>
> If the TCS is absent, we can't do this optimization.
>
> Cc: Ilia Mirkin
> Cc: Marek Olšák
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/linker.cpp | 16
> 1 file changed, 16 insertions(+)
>
> Works for me on i965, but I haven't set up other drivers to test
> them (sorry...)
>
> diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
> index 424b92a..cfd8f81 100644
> --- a/src/glsl/linker.cpp
> +++ b/src/glsl/linker.cpp
> @@ -2282,6 +2282,22 @@ resize_tes_inputs(struct gl_context *ctx,
> foreach_in_list(ir_instruction, ir, tes->ir) {
>ir->accept(&input_resize_visitor);
> }
> +
> + if (tcs) {
> + /* Convert the gl_PatchVerticesIn system value into a constant, since
> + * the value is known at this point.
> + */
> + foreach_in_list(ir_instruction, ir, tes->ir) {
> + ir_variable *var = ir->as_variable();
> + if (var && var->data.mode == ir_var_system_value &&
> + var->data.location == SYSTEM_VALUE_VERTICES_IN) {
> +void *mem_ctx = ralloc_parent(var);
> +var->data.mode = ir_var_auto;
> +var->data.location = 0;
> +var->constant_value = new(mem_ctx) ir_constant(num_vertices);
> + }
> + }
> + }
> }
>
> /**
> --
> 2.6.2
>
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[Mesa-dev] Mesa 11.0.4
Mesa 11.0.4 is now available. With this release we have a wide selection of core mesa, glsl and driver fixes, a few build related patches and an omx bugfix. Alejandro Piñeiro (2): i965/vec4: check writemask when bailing out at register coalesce i965/vec4: fill src_reg type using the constructor type parameter Brian Paul (2): vbo: fix incorrect switch statement in init_mat_currval() mesa: fix incorrect opcode in save_BlendFunci() Chih-Wei Huang (3): mesa: android: Fix the incorrect path of sse_minmax.c nv50/ir: use C++11 standard std::unordered_map if possible nv30: include the header of ffs prototype Chris Wilson (1): i965: Remove early release of DRI2 miptree Dave Airlie (1): mesa/uniforms: fix get_uniform for doubles (v2) Emil Velikov (3): docs: add sha256 checksums for 11.0.3 Update version to 11.0.4 docs: add release notes for 11.0.4 Francisco Jerez (5): i965: Don't tell the hardware about our UAV access. mesa: Expose function to calculate whether a shader image unit is valid. mesa: Skip redundant texture completeness checking during image validation. i965: Use _mesa_is_image_unit_valid() instead of gl_image_unit::_Valid. mesa: Get rid of texture-dependent image unit derived state. Ian Romanick (8): glsl: Allow built-in functions as constant expressions in OpenGL ES 1.00 ff_fragment_shader: Use binding to set the sampler unit glsl/linker: Use constant_initializer instead of constant_value to initialize uniforms glsl: Use constant_initializer instead of constant_value to determine whether to keep an unused uniform glsl: Only set ir_variable::constant_value for const-decorated variables glsl: Restrict initializers for global variables to constant expression in ES glsl: Add method to determine whether an expression contains the sequence operator glsl: In later GLSL versions, sequence operator is cannot be a constant expression Ilia Mirkin (1): nouveau: make sure there's always room to emit a fence Indrajit Das (1): st/va: Used correct parameter to derive the value of the "h" variable in vlVaCreateImage Jonathan Gray (1): configure.ac: ensure RM is set Krzysztof Sobiecki (1): st/fbo: use pipe_surface_release instead of pipe_surface_reference Leo Liu (1): st/omx/dec/h264: fix field picture type 0 poc disorder Marek Olšák (3): st/mesa: fix clip state dependencies radeonsi: fix a GS copy shader leak gallium: add PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT Nicolai Hähnle (1): u_vbuf: fix vb slot assignment for translated buffers Rob Clark (1): freedreno/a3xx: cache-flush is needed after MEM_WRITE Tapani Pälli (3): mesa: add GL_UNSIGNED_INT_24_8 to _mesa_pack_depth_span mesa: Set api prefix to version string when overriding version mesa: fix ARRAY_SIZE query for GetProgramResourceiv git tag: mesa-11.0.4 ftp://ftp.freedesktop.org/pub/mesa/11.0.4/mesa-11.0.4.tar.gz MD5: aea7233157b0bcb68539f03e23f8d481 mesa-11.0.4.tar.gz SHA1: e006b3f54442c01959e45e21f315e14b5c280862 mesa-11.0.4.tar.gz SHA256: ed412ca6a46d1bd055120e5c12806c15419ae8c4dd6d3f6ea20a83091d5c78bf mesa-11.0.4.tar.gz PGP: ftp://ftp.freedesktop.org/pub/mesa/11.0.4/mesa-11.0.4.tar.gz.sig ftp://ftp.freedesktop.org/pub/mesa/11.0.4/mesa-11.0.4.tar.xz MD5: c92c3729eceaab4898119f82e358 mesa-11.0.4.tar.xz SHA1: 3ca14958231a51576f3f96006df4d78da7669b84 mesa-11.0.4.tar.xz SHA256: 40201bf7fc6fa12a6d9edfe870b41eb4dd6669154e3c42c48a96f70805f5483d mesa-11.0.4.tar.xz PGP: ftp://ftp.freedesktop.org/pub/mesa/11.0.4/mesa-11.0.4.tar.xz.sig -- -Emil signature.asc Description: OpenPGP digital signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2] r600g: Fix special negative immediate constants when using ABS modifier.
On 10/25/15, Ivan Kalvachev wrote:
> Some constants (like 1.0 and 0.5) could be inlined as immediate inputs
> without using their literal value. The r600_bytecode_special_constants()
> function emulates the negative of these constants by using NEG modifier.
>
> However some shaders define -1.0 constant and want to use it as 1.0.
> They do so by using ABS modifier. But r600_bytecode_special_constants()
> set NEG in addition to ABS. Since NEG modifier have priority over ABS one,
> we get -|1.0| as result, instead of |1.0|.
>
> The patch simply prevents the additional switching of NEG when ABS is set.
>
> Signed-off-by: Ivan Kalvachev
> ---
> src/gallium/drivers/r600/r600_asm.c| 9 +
> src/gallium/drivers/r600/r600_shader.c | 2 +-
> 2 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_asm.c
> b/src/gallium/drivers/r600/r600_asm.c
> index bc69806..8fc622c 100644
> --- a/src/gallium/drivers/r600/r600_asm.c
> +++ b/src/gallium/drivers/r600/r600_asm.c
> @@ -635,8 +635,9 @@ static int replace_gpr_with_pv_ps(struct r600_bytecode
> *bc,
> return 0;
> }
>
> -void r600_bytecode_special_constants(uint32_t value, unsigned *sel,
> unsigned *neg)
> +void r600_bytecode_special_constants(uint32_t value, unsigned *sel,
> unsigned *neg, unsigned abs)
> {
> +
> switch(value) {
> case 0:
> *sel = V_SQ_ALU_SRC_0;
> @@ -655,11 +656,11 @@ void r600_bytecode_special_constants(uint32_t
> value, unsigned *sel, unsigned *ne
> break;
> case 0xBF80: /* -1.0f */
> *sel = V_SQ_ALU_SRC_1;
> - *neg ^= 1;
> + *neg ^= !abs;
> break;
> case 0xBF00: /* -0.5f */
> *sel = V_SQ_ALU_SRC_0_5;
> - *neg ^= 1;
> + *neg ^= !abs;
> break;
> default:
> *sel = V_SQ_ALU_SRC_LITERAL;
> @@ -1208,7 +1209,7 @@ int r600_bytecode_add_alu_type(struct r600_bytecode
> *bc,
> }
> if (nalu->src[i].sel == V_SQ_ALU_SRC_LITERAL)
> r600_bytecode_special_constants(nalu->src[i].value,
> - &nalu->src[i].sel, &nalu->src[i].neg);
> + &nalu->src[i].sel, &nalu->src[i].neg,
> nalu->src[i].abs);
> }
> if (nalu->dst.sel >= bc->ngpr) {
> bc->ngpr = nalu->dst.sel + 1;
> diff --git a/src/gallium/drivers/r600/r600_shader.c
> b/src/gallium/drivers/r600/r600_shader.c
> index 8efe902..50c0329 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -1008,7 +1008,7 @@ static void tgsi_src(struct r600_shader_ctx *ctx,
> (tgsi_src->Register.SwizzleX ==
> tgsi_src->Register.SwizzleW)) {
>
> index = tgsi_src->Register.Index * 4 +
> tgsi_src->Register.SwizzleX;
> -
> r600_bytecode_special_constants(ctx->literals[index], &r600_src->sel,
> &r600_src->neg);
> +
> r600_bytecode_special_constants(ctx->literals[index], &r600_src->sel,
> &r600_src->neg, r600_src->abs);
> if (r600_src->sel != V_SQ_ALU_SRC_LITERAL)
> return;
> }
> --
> 2.5.1
>
It's the same patch, I've just forgotten to add the header file change:
diff --git a/src/gallium/drivers/r600/r600_asm.h
b/src/gallium/drivers/r600/r600_asm.h
index 7cf3a09..d48ad1e 100644
--- a/src/gallium/drivers/r600/r600_asm.h
+++ b/src/gallium/drivers/r600/r600_asm.h
@@ -255,7 +255,7 @@ int r600_bytecode_add_cfinst(struct r600_bytecode *bc,
int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
const struct r600_bytecode_alu *alu, unsigned type);
void r600_bytecode_special_constants(uint32_t value,
- unsigned *sel, unsigned *neg);
+ unsigned *sel, unsigned *neg, unsigned abs);
void r600_bytecode_disasm(struct r600_bytecode *bc);
void r600_bytecode_alu_read(struct r600_bytecode *bc,
struct r600_bytecode_alu *alu, uint32_t word0, uint32_t word1);
From b06e4f7d2ebd99c42c6968ec2abd8979cd9680d6 Mon Sep 17 00:00:00 2001
From: Ivan Kalvachev
Date: Sun, 25 Oct 2015 01:16:58 +0300
Subject: [PATCH] r600: Fix special negative immediate constants when using ABS
modifier.
Some constants (like 1.0 and 0.5) could be inlined as immediate inputs
without using their literal value. The r600_bytecode_special_constants()
function emulates the negative of these constants by using NEG modifier.
However some shaders define -1.0 constant and want to use it as 1.0.
They do so by using ABS modifier. But r600_bytecode_special_constants()
set NEG in addition to ABS. Since NEG modifier have priority over ABS one,
we get -|1.0| as result, instead of |1.0|.
The patch simply prevents the additional switching of NEG when ABS is set.
Signed-off-by: Ivan Kalvachev
---
src/gallium/drivers/r600/r600_asm.c| 9 +
src/gall
Re: [Mesa-dev] [PATCH 7/7] nir: add helper macros for running NIR passes
On Sat, Oct 24, 2015 at 7:08 PM, Rob Clark wrote:
> From: Rob Clark
>
> +#define NIR_PASS_PROGRESS(pass, nir, ...) ({ \
> + assert(nir_shader_is_mutable(nir)); \
> + bool __ret = pass(nir, ##__VA_ARGS__); \
> + nir_validate_shader(nir);\
> + if (__nir_test_clone()) {\
> + nir = nir_shader_clone(ralloc_parent(nir), nir); \
> + nir_validate_shader(nir); \
> + }\
> + __ret; \
> + })
> +
0
> + progress |= NIR_PASS_PROGRESS(nir_copy_prop, nir);
This does not generate valid C code, but rather what looks like a GCC
extension. Is that really a good move?
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Re: [Mesa-dev] [PATCH 7/7] nir: add helper macros for running NIR passes
On Sun, Oct 25, 2015 at 8:05 AM, Erik Faye-Lund wrote:
> On Sat, Oct 24, 2015 at 7:08 PM, Rob Clark wrote:
>> From: Rob Clark
>>
>> +#define NIR_PASS_PROGRESS(pass, nir, ...) ({ \
>> + assert(nir_shader_is_mutable(nir)); \
>> + bool __ret = pass(nir, ##__VA_ARGS__); \
>> + nir_validate_shader(nir);\
>> + if (__nir_test_clone()) {\
>> + nir = nir_shader_clone(ralloc_parent(nir), nir); \
>> + nir_validate_shader(nir); \
>> + }\
>> + __ret; \
>> + })
>> +
> 0
>> + progress |= NIR_PASS_PROGRESS(nir_copy_prop, nir);
>
> This does not generate valid C code, but rather what looks like a GCC
> extension. Is that really a good move?
hmm, bleh.. it's used a lot in linux kernel, but it is a GNU C extension:
https://gcc.gnu.org/onlinedocs/gcc/Statement-Exprs.html
well, I guess at least llvm must support it (since I've heard of
people building linux kernel w/ llvm), no idea about MSVC. If it is
supported by MSVC, then maybe we could use it? Or is there any other
compiler people use that doesn't? It sure is a nice extension for
macros..
BR,
-R
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Re: [Mesa-dev] [PATCH 7/7] nir: add helper macros for running NIR passes
2015-10-25 13:58 GMT+01:00 Rob Clark :
> On Sun, Oct 25, 2015 at 8:05 AM, Erik Faye-Lund wrote:
>> On Sat, Oct 24, 2015 at 7:08 PM, Rob Clark wrote:
>>> From: Rob Clark
>>>
>>> +#define NIR_PASS_PROGRESS(pass, nir, ...) ({ \
>>> + assert(nir_shader_is_mutable(nir)); \
>>> + bool __ret = pass(nir, ##__VA_ARGS__); \
>>> + nir_validate_shader(nir);\
>>> + if (__nir_test_clone()) {\
>>> + nir = nir_shader_clone(ralloc_parent(nir), nir); \
>>> + nir_validate_shader(nir); \
>>> + }\
>>> + __ret; \
>>> + })
>>> +
>> 0
>>> + progress |= NIR_PASS_PROGRESS(nir_copy_prop, nir);
>>
>> This does not generate valid C code, but rather what looks like a GCC
>> extension. Is that really a good move?
>
> hmm, bleh.. it's used a lot in linux kernel, but it is a GNU C extension:
>
> https://gcc.gnu.org/onlinedocs/gcc/Statement-Exprs.html
>
> well, I guess at least llvm must support it (since I've heard of
> people building linux kernel w/ llvm), no idea about MSVC. If it is
> supported by MSVC, then maybe we could use it? Or is there any other
> compiler people use that doesn't? It sure is a nice extension for
> macros..
>
Hi Rob,
If my memory is correct I stumbled across this last year, and
I believe the conclusion was that it could not be used in GLSL
as MSVC does not support GNU statement expressions, and
that codepath needs to be compilable by MSVC. I'm not sure
about NIR, I guess noone compiles that with MSVC as of now,
but maybe it will be done in the future, so I guess it is best to
"keep it safe" and avoid using this extension in this codepath.
This stackoverflow question[1] summarizes the support
(allthought the answers are probably a bit outdated).
I believe you could achieve at least parts of what you are
doing here by abusing a "do { ] while (false)".
However, returning values is a different story.
[1]
http://stackoverflow.com/questions/6440021/compiler-support-of-gnu-statement-expression
Regards,
Thomas
> BR,
> -R
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[Mesa-dev] [RFC 2/4] glsl IR: only allow optimization of interstage variable
GL_ARB_separate_shader_objects allow to match by name variable or block
interface. Input varying can't be removed because it is will impact the
location assignment.
It fixes the bug 79783 and likely any application that uses
GL_ARB_separate_shader_objects extension.
piglit test: arb_separate_shader_object-rendezvous_by_name
Signed-off-by: Gregory Hainaut
---
src/glsl/opt_dead_code.cpp | 18 ++
1 file changed, 18 insertions(+)
diff --git a/src/glsl/opt_dead_code.cpp b/src/glsl/opt_dead_code.cpp
index c5be166..fef5e92 100644
--- a/src/glsl/opt_dead_code.cpp
+++ b/src/glsl/opt_dead_code.cpp
@@ -75,6 +75,24 @@ do_dead_code(exec_list *instructions, bool
uniform_locations_assigned)
|| !entry->declaration)
continue;
+ /* Section 7.4.1 (Shader Interface Matching) of the OpenGL 4.5
+ * (Core Profile) spec says:
+ *
+ *"With separable program objects, interfaces between shader
+ *stages may involve the outputs from one program object and the
+ *inputs from a second program object. For such interfaces, it is
+ *not possible to detect mismatches at link time, because the
+ *programs are linked separately. When each such program is
+ *linked, all inputs or outputs interfacing with another program
+ *stage are treated as active."
+ */
+ if (entry->var->data.always_active_io &&
+(!entry->var->data.explicit_location ||
+ entry->var->data.location >= VARYING_SLOT_VAR0) &&
+(entry->var->data.mode == ir_var_shader_in ||
+ entry->var->data.mode == ir_var_shader_out))
+ continue;
+
if (!entry->assign_list.is_empty()) {
/* Remove all the dead assignments to the variable we found.
* Don't do so if it's a shader or function output, though.
--
2.1.4
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[Mesa-dev] [RFC 1/4] glsl IR: add always_active_io attribute to ir_variable
The value will be set in separate-shader program when an input/output
must remains active (i.e. deadcode removal isn't allowed because it will create
interface location/name-matching mismatch)
v3:
* Rename the attribute
* Use ir_variable directly instead of ir_variable_refcount_visitor
* Move the foreach IR code in the linker file
v4:
* Fix variable name in assert
Signed-off-by: Gregory Hainaut
---
src/glsl/ir.cpp | 1 +
src/glsl/ir.h | 7 +
src/glsl/linker.cpp | 73 +
3 files changed, 81 insertions(+)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index 8933b23..0c1430b 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -1666,6 +1666,7 @@ ir_variable::ir_variable(const struct glsl_type *type,
const char *name,
this->data.pixel_center_integer = false;
this->data.depth_layout = ir_depth_layout_none;
this->data.used = false;
+ this->data.always_active_io = false;
this->data.read_only = false;
this->data.centroid = false;
this->data.sample = false;
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index 9c9f22d..0223665 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -658,6 +658,13 @@ public:
unsigned assigned:1;
/**
+ * When separate shader programs are enabled, only interstage
+ * variables can be safely removed of the shader interface. Others
+ * input/output must remains active.
+ */
+ unsigned always_active_io:1;
+
+ /**
* Enum indicating how the variable was declared. See
* ir_var_declaration_type.
*
diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index 424b92a..845 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -3896,6 +3896,70 @@ split_ubos_and_ssbos(void *mem_ctx,
assert(*num_ubos + *num_ssbos == num_blocks);
}
+static void
+ir_set_always_active_io(exec_list *ir, ir_variable_mode io_mode)
+{
+ assert(io_mode == ir_var_shader_in || io_mode == ir_var_shader_out);
+
+ foreach_in_list(ir_instruction, node, ir) {
+ ir_variable *const var = node->as_variable();
+
+ if (var == NULL || var->data.mode != io_mode)
+ continue;
+
+ var->data.always_active_io = true;
+ }
+}
+
+static void
+set_always_active_io(struct gl_shader_program *prog)
+{
+ unsigned first, last;
+ assert(prog->SeparateShader);
+
+ first = MESA_SHADER_STAGES;
+ last = 0;
+
+ /* Determine first and last stage. Excluding the compute stage */
+ for (unsigned i = 0; i < MESA_SHADER_COMPUTE; i++) {
+ if (!prog->_LinkedShaders[i])
+ continue;
+ if (first == MESA_SHADER_STAGES)
+ first = i;
+ last = i;
+ }
+
+ if (first == MESA_SHADER_STAGES)
+ return;
+
+ for (unsigned stage = 0; stage < MESA_SHADER_STAGES; stage++) {
+ gl_shader *sh = prog->_LinkedShaders[stage];
+ if (!sh)
+ continue;
+
+ if (first == last) {
+ /* Single shader program: allowed inactive variable
+ * 1/ input of the VS
+ * 2/ output of the FS
+ */
+ if (stage != MESA_SHADER_VERTEX)
+ir_set_always_active_io(sh->ir, ir_var_shader_in);
+ if (stage != MESA_SHADER_FRAGMENT)
+ir_set_always_active_io(sh->ir, ir_var_shader_out);
+ } else {
+ /* Multiple shaders program: allowed inactive variable
+ * 1/ input of the VS
+ * 2/ output of the FS
+ * 3/ interstage variables
+ */
+ if (stage == first && stage != MESA_SHADER_VERTEX)
+ir_set_always_active_io(sh->ir, ir_var_shader_in);
+ else if (stage == last && stage != MESA_SHADER_FRAGMENT)
+ir_set_always_active_io(sh->ir, ir_var_shader_out);
+ }
+ }
+}
+
void
link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
{
@@ -4155,6 +4219,15 @@ link_shaders(struct gl_context *ctx, struct
gl_shader_program *prog)
}
}
+
+ /**
+* When separate shader programs are enabled, only interstage
+* variables can be safely removed of the shader interface. Others
+* input/output must remains active.
+*/
+ if (prog->SeparateShader)
+ set_always_active_io(prog);
+
if (!interstage_cross_validate_uniform_blocks(prog))
goto done;
--
2.1.4
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[Mesa-dev] [RFC 0/4] V4: Improve GLSL support of GL_ARB_separate_shader_objects
v4: Rebase against lastest master and fix bad variable name in assert. A new test was developed to properly check commit 4 behavior. I ran most of the piglit test without regression. v3: Squash old commit 1&2 * Use a better name for the new attribute: always_active_io * Use ir_variable directly instead of ir_variable_refcount_visitor * Put related code in linker.cpp Add 2 new commits to fix wrong interface matching in more complex case. Commit 3: avoid collision between user and linker slot assignment Commit 4: avoid unpredictable sorting of varying Commit 1/2/3 fix the piglit test: arb_separate_shader_object-rendezvous_by_name posted on piglit ML Commit 4 was tested on the PCSX2 application. Gregory Hainaut (4): glsl IR: add always_active_io attribute to ir_variable glsl IR: only allow optimization of interstage variable glsl: avoid linker and user varying location to overlap glsl: don't sort varying in separate shader mode src/glsl/ir.cpp| 1 + src/glsl/ir.h | 7 + src/glsl/link_varyings.cpp | 76 ++ src/glsl/linker.cpp| 73 src/glsl/opt_dead_code.cpp | 18 +++ 5 files changed, 169 insertions(+), 6 deletions(-) -- 2.1.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [RFC 3/4] glsl: avoid linker and user varying location to overlap
Current behavior on the interface matching:
layout (location = 0) out0; // Assigned to VARYING_SLOT_VAR0 by user
out1; // Assigned to VARYING_SLOT_VAR0 by the linker
New behavior on the interface matching:
layout (location = 0) out0; // Assigned to VARYING_SLOT_VAR0 by user
out1; // Assigned to VARYING_SLOT_VAR1 by the linker
piglit: arb_separate_shader_object-rendezvous_by_name
v4:
* Fix variable name in assert
Signed-off-by: Gregory Hainaut
---
src/glsl/link_varyings.cpp | 46 +++---
1 file changed, 43 insertions(+), 3 deletions(-)
diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
index 7e77a67..67d04cb 100644
--- a/src/glsl/link_varyings.cpp
+++ b/src/glsl/link_varyings.cpp
@@ -766,7 +766,7 @@ public:
gl_shader_stage consumer_stage);
~varying_matches();
void record(ir_variable *producer_var, ir_variable *consumer_var);
- unsigned assign_locations();
+ unsigned assign_locations(uint64_t reserved_slots);
void store_locations() const;
private:
@@ -986,7 +986,7 @@ varying_matches::record(ir_variable *producer_var,
ir_variable *consumer_var)
* passed to varying_matches::record().
*/
unsigned
-varying_matches::assign_locations()
+varying_matches::assign_locations(uint64_t reserved_slots)
{
/* Sort varying matches into an order that makes them easy to pack. */
qsort(this->matches, this->num_matches, sizeof(*this->matches),
@@ -1013,6 +1013,10 @@ varying_matches::assign_locations()
!= this->matches[i].packing_class) {
*location = ALIGN(*location, 4);
}
+ while ((*location < MAX_VARYING * 4u) &&
+(reserved_slots & (1u << *location / 4u))) {
+ *location = ALIGN(*location + 1, 4);
+ }
this->matches[i].generic_location = *location;
@@ -1376,6 +1380,38 @@ canonicalize_shader_io(exec_list *ir, enum
ir_variable_mode io_mode)
}
/**
+ * Generate a bitfield map of the already reserved slots for a shader.
+ *
+ * In theory a 32 bits value will be enough but a 64 bits value is future
proof.
+ */
+uint64_t
+reserved_varying_slot(struct gl_shader *stage, ir_variable_mode io_mode)
+{
+ assert(io_mode == ir_var_shader_in || io_mode == ir_var_shader_out);
+ assert(MAX_VARYING <= 64); /* avoid an overflow of the returned value */
+
+ uint64_t slots = 0;
+ int var_slot;
+
+ if (!stage)
+ return slots;
+
+ foreach_in_list(ir_instruction, node, stage->ir) {
+ ir_variable *const var = node->as_variable();
+
+ if (var == NULL || var->data.mode != io_mode ||
!var->data.explicit_location)
+ continue;
+
+ var_slot = var->data.location - VARYING_SLOT_VAR0;
+ if (var_slot >= 0 && var_slot < MAX_VARYING)
+ slots |= 1u << var_slot;
+ }
+
+ return slots;
+}
+
+
+/**
* Assign locations for all variables that are produced in one pipeline stage
* (the "producer") and consumed in the next stage (the "consumer").
*
@@ -1550,7 +1586,11 @@ assign_varying_locations(struct gl_context *ctx,
matches.record(matched_candidate->toplevel_var, NULL);
}
- const unsigned slots_used = matches.assign_locations();
+ const uint64_t reserved_slots =
+ reserved_varying_slot(producer, ir_var_shader_out) |
+ reserved_varying_slot(consumer, ir_var_shader_in);
+
+ const unsigned slots_used = matches.assign_locations(reserved_slots);
matches.store_locations();
for (unsigned i = 0; i < num_tfeedback_decls; ++i) {
--
2.1.4
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[Mesa-dev] [RFC 4/4] glsl: don't sort varying in separate shader mode
Current issue is the addition of FLAT qualifier on varying_matches::record()
which break the varying expected order
Future issue is the removal of the interpolation qualifier matching constrain
In my humble opinion, it is the responsability of the GL developer to optimize
their slots assignment in SSO with the help of GL_ARB_enhanced_layouts
Signed-off-by: Gregory Hainaut
---
src/glsl/link_varyings.cpp | 36 ++--
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
index 67d04cb..f1794c3 100644
--- a/src/glsl/link_varyings.cpp
+++ b/src/glsl/link_varyings.cpp
@@ -766,7 +766,7 @@ public:
gl_shader_stage consumer_stage);
~varying_matches();
void record(ir_variable *producer_var, ir_variable *consumer_var);
- unsigned assign_locations(uint64_t reserved_slots);
+ unsigned assign_locations(uint64_t reserved_slots, bool separate_shader);
void store_locations() const;
private:
@@ -986,11 +986,34 @@ varying_matches::record(ir_variable *producer_var,
ir_variable *consumer_var)
* passed to varying_matches::record().
*/
unsigned
-varying_matches::assign_locations(uint64_t reserved_slots)
+varying_matches::assign_locations(uint64_t reserved_slots, bool
separate_shader)
{
- /* Sort varying matches into an order that makes them easy to pack. */
- qsort(this->matches, this->num_matches, sizeof(*this->matches),
- &varying_matches::match_comparator);
+ /* Disable the varying sorting for separate shader program
+* 1/ All programs must sort the code in the same order to guarantee the
+*interface matching. However varying_matches::record() will change the
+*interpolation qualifier of some stages.
+*
+* 2/ GLSL version 4.50 removes the matching constrain on the interpolation
+*qualifier.
+*
+* Chapter 4.5 of GLSL 4.40:
+*"The type and presence of interpolation qualifiers of variables with
+*the same name declared in all linked shaders for the same cross-stage
+*interface must match, otherwise the link command will fail.
+*
+*When comparing an output from one stage to an input of a subsequent
+*stage, the input and output don't match if their interpolation
+*qualifiers (or lack thereof) are not the same."
+*
+* Chapter 4.5 of GLSL 4.50:
+*"It is a link-time error if, within the same stage, the interpolation
+*qualifiers of variables of the same name do not match."
+*/
+ if (!separate_shader) {
+ /* Sort varying matches into an order that makes them easy to pack. */
+ qsort(this->matches, this->num_matches, sizeof(*this->matches),
+&varying_matches::match_comparator);
+ }
unsigned generic_location = 0;
unsigned generic_patch_location = MAX_VARYING*4;
@@ -1590,7 +1613,8 @@ assign_varying_locations(struct gl_context *ctx,
reserved_varying_slot(producer, ir_var_shader_out) |
reserved_varying_slot(consumer, ir_var_shader_in);
- const unsigned slots_used = matches.assign_locations(reserved_slots);
+ const unsigned slots_used = matches.assign_locations(reserved_slots,
+prog->SeparateShader);
matches.store_locations();
for (unsigned i = 0; i < num_tfeedback_decls; ++i) {
--
2.1.4
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Re: [Mesa-dev] [PATCH 2/2] i965/vec4: Drop brw_set_default_* before popping insn state.
On Sat, Oct 24, 2015 at 01:20:22PM -0700, Matt Turner wrote: > --- > src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp > b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp > index d50184a..cd8eb0e 100644 > --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp > +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp > @@ -367,7 +367,6 @@ generate_gs_urb_write_allocate(struct brw_codegen *p, > vec4_instruction *inst) > brw_set_default_mask_control(p, BRW_MASK_DISABLE); > brw_MOV(p, get_element_ud(inst->dst.fixed_hw_reg, 0), > get_element_ud(inst->src[0].fixed_hw_reg, 0)); > - brw_set_default_access_mode(p, BRW_ALIGN_16); > brw_pop_insn_state(p); > } > > @@ -424,7 +423,6 @@ generate_gs_set_write_offset(struct brw_codegen *p, >brw_MUL(p, suboffset(stride(dst, 2, 2, 1), 3), stride(src0, 8, 2, 4), >retype(src1, BRW_REGISTER_TYPE_UW)); > } > - brw_set_default_access_mode(p, BRW_ALIGN_16); > brw_pop_insn_state(p); > } > > @@ -458,7 +456,6 @@ generate_gs_set_vertex_count(struct brw_codegen *p, >brw_MOV(p, >suboffset(stride(retype(dst, BRW_REGISTER_TYPE_UW), 2, 2, 1), > 4), >stride(retype(src, BRW_REGISTER_TYPE_UW), 8, 1, 0)); > - brw_set_default_access_mode(p, BRW_ALIGN_16); > } > brw_pop_insn_state(p); > } I'm assuming this is because the correct access mode is always set up before generating the assembly (probably wouldn't hurt to have added that to the commit message for naive people like myself)? If so: Reviewed-by: Ben Widawsky ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/3] radeonsi: allow copying between compatible compressed and uncompressed formats
From: Marek Olšák
which is where a block in src maps to a pixel in dst and vice versa.
e.g. DXT1 <-> R32G32_UINT
DXT5 <-> R32G32B32A32_UINT
---
src/gallium/drivers/radeonsi/si_blit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index a226436..cd2add4 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -507,7 +507,7 @@ void si_resource_copy_region(struct pipe_context *ctx,
util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
util_blitter_default_src_texture(&src_templ, src, src_level);
- if (util_format_is_compressed(src->format) &&
+ if (util_format_is_compressed(src->format) ||
util_format_is_compressed(dst->format)) {
unsigned blocksize = util_format_get_blocksize(src->format);
--
2.1.4
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[Mesa-dev] [PATCH 3/3] st/mesa: implement ARB_copy_image
From: Marek Olšák
I wonder if the craziness was worth it.
---
src/mesa/Makefile.sources| 2 +
src/mesa/state_tracker/st_cb_copyimage.c | 609 +++
src/mesa/state_tracker/st_cb_copyimage.h | 33 ++
src/mesa/state_tracker/st_cb_texture.c | 51 ---
src/mesa/state_tracker/st_context.c | 2 +
src/mesa/state_tracker/st_extensions.c | 1 +
6 files changed, 647 insertions(+), 51 deletions(-)
create mode 100644 src/mesa/state_tracker/st_cb_copyimage.c
create mode 100644 src/mesa/state_tracker/st_cb_copyimage.h
diff --git a/src/mesa/Makefile.sources b/src/mesa/Makefile.sources
index 4bcaa62..de0e330 100644
--- a/src/mesa/Makefile.sources
+++ b/src/mesa/Makefile.sources
@@ -423,6 +423,8 @@ STATETRACKER_FILES = \
state_tracker/st_cb_clear.h \
state_tracker/st_cb_condrender.c \
state_tracker/st_cb_condrender.h \
+ state_tracker/st_cb_copyimage.c \
+ state_tracker/st_cb_copyimage.h \
state_tracker/st_cb_drawpixels.c \
state_tracker/st_cb_drawpixels.h \
state_tracker/st_cb_drawpixels_shader.c \
diff --git a/src/mesa/state_tracker/st_cb_copyimage.c
b/src/mesa/state_tracker/st_cb_copyimage.c
new file mode 100644
index 000..1740aaf
--- /dev/null
+++ b/src/mesa/state_tracker/st_cb_copyimage.c
@@ -0,0 +1,609 @@
+/*
+ * Copyright 2015 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include "state_tracker/st_context.h"
+#include "state_tracker/st_cb_copyimage.h"
+#include "state_tracker/st_cb_fbo.h"
+#include "state_tracker/st_texture.h"
+
+#include "util/u_box.h"
+#include "util/u_format.h"
+#include "util/u_inlines.h"
+
+
+/**
+ * Return an equivalent canonical format without "X" channels.
+ *
+ * Copying between incompatible formats is easier when the format is
+ * canonicalized, meaning that it is in a standard form.
+ *
+ * The returned format has the same component sizes and swizzles as
+ * the source format, the type is changed to UINT or UNORM, depending on
+ * which one has the most swizzle combinations in their group.
+ *
+ * If it's not an array format, return a memcpy-equivalent array format.
+ *
+ * The key feature is that swizzled versions of formats of the same
+ * component size always return the same component type.
+ *
+ * X returns A.
+ * Luminance, intensity, alpha, depth, stencil, and 8-bit and 16-bit packed
+ * formats are not supported. (same as ARB_copy_image)
+ */
+static enum pipe_format
+get_canonical_format(enum pipe_format format)
+{
+ const struct util_format_description *desc =
+ util_format_description(format);
+
+ /* Packed formats. Return the equivalent array format. */
+ if (format == PIPE_FORMAT_R11G11B10_FLOAT ||
+ format == PIPE_FORMAT_R9G9B9E5_FLOAT)
+ return get_canonical_format(PIPE_FORMAT_R8G8B8A8_UINT);
+
+ if (desc->nr_channels == 4 &&
+ desc->channel[0].size == 10 &&
+ desc->channel[1].size == 10 &&
+ desc->channel[2].size == 10 &&
+ desc->channel[3].size == 2) {
+ if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_X &&
+ desc->swizzle[1] == UTIL_FORMAT_SWIZZLE_Y &&
+ desc->swizzle[2] == UTIL_FORMAT_SWIZZLE_Z)
+ return get_canonical_format(PIPE_FORMAT_R8G8B8A8_UINT);
+
+ return PIPE_FORMAT_NONE;
+ }
+
+#define RETURN_FOR_SWIZZLE1(x, format) \
+ if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_##x) \
+ return format
+
+#define RETURN_FOR_SWIZZLE2(x, y, format) \
+ if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_##x && \
+ desc->swizzle[1] == UTIL_FORMAT_SWIZZLE_##y) \
+ return format
+
+#define RETURN_FOR_SWIZZLE3(x, y, z, format) \
+ if (desc->swizzle[0] == UTIL_FORMAT_SWIZZLE_##x && \
+ desc->swizzle[1] == UTIL_FORMAT_SWIZZLE_##y && \
+ desc->swizzle[2] == UTIL_FORMAT_SWIZZLE_##z) \
+ return format
+
+#define RETURN_FOR_SWIZZLE4(x, y, z,
[Mesa-dev] [PATCH 2/3] gallium: add PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS
From: Marek Olšák For ARB_copy_image. --- src/gallium/docs/source/screen.rst | 4 +++- src/gallium/drivers/freedreno/freedreno_screen.c | 1 + src/gallium/drivers/i915/i915_screen.c | 1 + src/gallium/drivers/ilo/ilo_screen.c | 1 + src/gallium/drivers/llvmpipe/lp_screen.c | 1 + src/gallium/drivers/nouveau/nv30/nv30_screen.c | 1 + src/gallium/drivers/nouveau/nv50/nv50_screen.c | 1 + src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 + src/gallium/drivers/r300/r300_screen.c | 1 + src/gallium/drivers/r600/r600_pipe.c | 1 + src/gallium/drivers/radeonsi/si_pipe.c | 1 + src/gallium/drivers/softpipe/sp_screen.c | 1 + src/gallium/drivers/svga/svga_screen.c | 1 + src/gallium/drivers/vc4/vc4_screen.c | 1 + src/gallium/include/pipe/p_defines.h | 1 + 15 files changed, 17 insertions(+), 1 deletion(-) diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index 151afb2..91fdb43 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -278,7 +278,9 @@ The integer capabilities: in the shader. * ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any pipe_context. - +* ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``: + Whether copying between compressed and plain formats is supported where + a compressed block is copied to/from a plain pixel of the same size. .. _pipe_capf: diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index 50d140f..9f8c332 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -238,6 +238,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 0; case PIPE_CAP_MAX_VIEWPORTS: diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 5812af6..2d2fd37 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -252,6 +252,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap) case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 0; case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: diff --git a/src/gallium/drivers/ilo/ilo_screen.c b/src/gallium/drivers/ilo/ilo_screen.c index e1a7dc5..888f7aa 100644 --- a/src/gallium/drivers/ilo/ilo_screen.c +++ b/src/gallium/drivers/ilo/ilo_screen.c @@ -474,6 +474,7 @@ ilo_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index e2ed267..d1c50ae 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -299,6 +299,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 0; } /* should only get here on unhandled cases */ diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c index 0330164..bdecb0a 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c @@ -172,6 +172,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_TXQS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index ec51d00..2c8884e 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -217,6 +217,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index af8e5f7..1646a9d 100644 --- a/src/gallium/dri
Re: [Mesa-dev] [PATCH v2] r600g: Fix special negative immediate constants when using ABS modifier.
On Sun, Oct 25, 2015 at 7:27 AM, Ivan Kalvachev
wrote:
> On 10/25/15, Ivan Kalvachev wrote:
> > Some constants (like 1.0 and 0.5) could be inlined as immediate inputs
> > without using their literal value. The r600_bytecode_special_constants()
> > function emulates the negative of these constants by using NEG modifier.
> >
> > However some shaders define -1.0 constant and want to use it as 1.0.
> > They do so by using ABS modifier. But r600_bytecode_special_constants()
> > set NEG in addition to ABS. Since NEG modifier have priority over ABS
> one,
> > we get -|1.0| as result, instead of |1.0|.
> >
> > The patch simply prevents the additional switching of NEG when ABS is
> set.
> >
> > Signed-off-by: Ivan Kalvachev
> > ---
> > src/gallium/drivers/r600/r600_asm.c| 9 +
> > src/gallium/drivers/r600/r600_shader.c | 2 +-
> > 2 files changed, 6 insertions(+), 5 deletions(-)
> >
> > diff --git a/src/gallium/drivers/r600/r600_asm.c
> > b/src/gallium/drivers/r600/r600_asm.c
> > index bc69806..8fc622c 100644
> > --- a/src/gallium/drivers/r600/r600_asm.c
> > +++ b/src/gallium/drivers/r600/r600_asm.c
> > @@ -635,8 +635,9 @@ static int replace_gpr_with_pv_ps(struct
> r600_bytecode
> > *bc,
> > return 0;
> > }
> >
> > -void r600_bytecode_special_constants(uint32_t value, unsigned *sel,
> > unsigned *neg)
> > +void r600_bytecode_special_constants(uint32_t value, unsigned *sel,
> > unsigned *neg, unsigned abs)
> > {
> > +
> > switch(value) {
> > case 0:
> > *sel = V_SQ_ALU_SRC_0;
> > @@ -655,11 +656,11 @@ void r600_bytecode_special_constants(uint32_t
> > value, unsigned *sel, unsigned *ne
> > break;
> > case 0xBF80: /* -1.0f */
> > *sel = V_SQ_ALU_SRC_1;
> > - *neg ^= 1;
> > + *neg ^= !abs;
> > break;
> > case 0xBF00: /* -0.5f */
> > *sel = V_SQ_ALU_SRC_0_5;
> > - *neg ^= 1;
> > + *neg ^= !abs;
> > break;
> > default:
> > *sel = V_SQ_ALU_SRC_LITERAL;
> > @@ -1208,7 +1209,7 @@ int r600_bytecode_add_alu_type(struct r600_bytecode
> > *bc,
> > }
> > if (nalu->src[i].sel == V_SQ_ALU_SRC_LITERAL)
> >
> r600_bytecode_special_constants(nalu->src[i].value,
> > - &nalu->src[i].sel, &nalu->src[i].neg);
> > + &nalu->src[i].sel, &nalu->src[i].neg,
> > nalu->src[i].abs);
> > }
> > if (nalu->dst.sel >= bc->ngpr) {
> > bc->ngpr = nalu->dst.sel + 1;
> > diff --git a/src/gallium/drivers/r600/r600_shader.c
> > b/src/gallium/drivers/r600/r600_shader.c
> > index 8efe902..50c0329 100644
> > --- a/src/gallium/drivers/r600/r600_shader.c
> > +++ b/src/gallium/drivers/r600/r600_shader.c
> > @@ -1008,7 +1008,7 @@ static void tgsi_src(struct r600_shader_ctx *ctx,
> > (tgsi_src->Register.SwizzleX ==
> > tgsi_src->Register.SwizzleW)) {
> >
> > index = tgsi_src->Register.Index * 4 +
> > tgsi_src->Register.SwizzleX;
> > -
> > r600_bytecode_special_constants(ctx->literals[index], &r600_src->sel,
> > &r600_src->neg);
> > +
> > r600_bytecode_special_constants(ctx->literals[index], &r600_src->sel,
> > &r600_src->neg, r600_src->abs);
> > if (r600_src->sel != V_SQ_ALU_SRC_LITERAL)
> > return;
> > }
> > --
> > 2.5.1
> >
>
> It's the same patch, I've just forgotten to add the header file change:
>
> diff --git a/src/gallium/drivers/r600/r600_asm.h
> b/src/gallium/drivers/r600/r600_asm.h
> index 7cf3a09..d48ad1e 100644
> --- a/src/gallium/drivers/r600/r600_asm.h
> +++ b/src/gallium/drivers/r600/r600_asm.h
> @@ -255,7 +255,7 @@ int r600_bytecode_add_cfinst(struct r600_bytecode *bc,
> int r600_bytecode_add_alu_type(struct r600_bytecode *bc,
> const struct r600_bytecode_alu *alu, unsigned type);
> void r600_bytecode_special_constants(uint32_t value,
> - unsigned *sel, unsigned *neg);
> + unsigned *sel, unsigned *neg, unsigned abs);
> void r600_bytecode_disasm(struct r600_bytecode *bc);
> void r600_bytecode_alu_read(struct r600_bytecode *bc,
> struct r600_bytecode_alu *alu, uint32_t word0, uint32_t
> word1);
>
> ___
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> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
>
Tested-By: Nick Sarnie
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Re: [Mesa-dev] [PATCH 2/2] i965/vec4: Drop brw_set_default_* before popping insn state.
On Sun, Oct 25, 2015 at 9:09 AM, Ben Widawsky wrote: > On Sat, Oct 24, 2015 at 01:20:22PM -0700, Matt Turner wrote: >> --- >> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 3 --- >> 1 file changed, 3 deletions(-) >> >> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> index d50184a..cd8eb0e 100644 >> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> @@ -367,7 +367,6 @@ generate_gs_urb_write_allocate(struct brw_codegen *p, >> vec4_instruction *inst) >> brw_set_default_mask_control(p, BRW_MASK_DISABLE); >> brw_MOV(p, get_element_ud(inst->dst.fixed_hw_reg, 0), >> get_element_ud(inst->src[0].fixed_hw_reg, 0)); >> - brw_set_default_access_mode(p, BRW_ALIGN_16); >> brw_pop_insn_state(p); >> } >> >> @@ -424,7 +423,6 @@ generate_gs_set_write_offset(struct brw_codegen *p, >>brw_MUL(p, suboffset(stride(dst, 2, 2, 1), 3), stride(src0, 8, 2, 4), >>retype(src1, BRW_REGISTER_TYPE_UW)); >> } >> - brw_set_default_access_mode(p, BRW_ALIGN_16); >> brw_pop_insn_state(p); >> } >> >> @@ -458,7 +456,6 @@ generate_gs_set_vertex_count(struct brw_codegen *p, >>brw_MOV(p, >>suboffset(stride(retype(dst, BRW_REGISTER_TYPE_UW), 2, 2, 1), >> 4), >>stride(retype(src, BRW_REGISTER_TYPE_UW), 8, 1, 0)); >> - brw_set_default_access_mode(p, BRW_ALIGN_16); >> } >> brw_pop_insn_state(p); >> } > > I'm assuming this is because the correct access mode is always set up before > generating the assembly (probably wouldn't hurt to have added that to the > commit > message for naive people like myself)? Yep. In all these places, we push-insn-state, modify somethings (align1 vs align16, mask control, etc), generate some instructions, and then pop-insn-state back to the defaults. These calls are totally useless, since they modify the insn state immediately before brw_pop_insn_state() overwrites it. > If so: > Reviewed-by: Ben Widawsky Thanks! ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965/vec4: Eliminate the vec4_generator class altogether.
On Fri, Oct 23, 2015 at 7:10 PM, Kenneth Graunke wrote:
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> index 96a52c6..6569d81 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> @@ -631,10 +511,11 @@ vec4_generator::generate_gs_svb_write(vec4_instruction
> *inst,
> brw_pop_insn_state(p);
> }
>
> -void
> -vec4_generator::generate_gs_svb_set_destination_index(vec4_instruction *inst,
> - struct brw_reg dst,
> - struct brw_reg src)
> +static void
> +generate_gs_svb_set_destination_index(struct brw_codegen *p,
> + vec4_instruction *inst,
> + struct brw_reg dst,
> + struct brw_reg src)
> {
>
Could you delete this stray new line while you're here?
> int vertex = inst->sol_vertex;
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Re: [Mesa-dev] [PATCH v2 1/7] nvc0: fix crash when nv50_miptree_from_handle fails
On 10/22/2015 01:02 AM, Julien Isorce wrote:
Sorry this patch should not have gone in the v2 since it has been
already reviewed by Emil. But thx for your review.
I experienced the crash when testing patch 5/7 of this patch series,
around "resource = pscreen->resource_from_handle" in the new
vaCreateSurface2 function. Just passing a wrong fd.
I checked your remark for nv50 and nv30 and they don't make this step.
From what I can see, nvc0 re-use nv50_miptree_from_handle from nv50
but still has its own nvc0_miptree_vtbl. But that's just a guess :)
ACK.
Thanks for your answer.
Do you need someone to push this patch?
Cheers
Julien
On 20 October 2015 at 18:04, samuel.pitoiset
mailto:samuel.pitoi...@gmail.com>> wrote:
Is there a particular situation where nv50_miptree_from_handle()
fails? And did you check nv50?
Anyway, this patch is:
Reviewed-by: Samuel Pitoiset mailto:samuel.pitoi...@gmail.com>>
On 20/10/2015 18:34, Julien Isorce wrote:
Signed-off-by: Julien Isorce mailto:j.iso...@samsung.com>>
---
src/gallium/drivers/nouveau/nvc0/nvc0_resource.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c
index 12b5a02..15c803c 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_resource.c
@@ -26,7 +26,8 @@ nvc0_resource_from_handle(struct pipe_screen
* screen,
} else {
struct pipe_resource *res =
nv50_miptree_from_handle(screen,
templ, whandle);
- nv04_resource(res)->vtbl = &nvc0_miptree_vtbl;
+ if (res)
+ nv04_resource(res)->vtbl = &nvc0_miptree_vtbl;
return res;
}
}
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Re: [Mesa-dev] [PATCH] nouveau: fix double free when screen_create fails
On 10/22/2015 01:16 AM, Julien Isorce wrote:
The real fix is in nouveau_drm_winsys.c by setting dev to 0.
Which means dev's ownership has been passed to previous call.
Other changes are there to be consistent with what the
screen_create functions already do on errors.
This actually happens because nouveau_device_del() is (sometimes) called
twice
when nvXX_screen_create() fails.
I don't really like this solution but I don't have a better one for now,
I'll think about
that in the next few days. :)
Note that you forgot to call nouveau_device_del() in nvc0_screen_create().
Encountered this crash because nvc0_screen_create sometimes fails with:
nvc0_screen_create:717 - Error allocating PGRAPH context for M2MF: -16
Also see: https://bugs.freedesktop.org/show_bug.cgi?id=70354
Signed-off-by: Julien Isorce
---
src/gallium/drivers/nouveau/nv30/nv30_screen.c | 5 -
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 4 +++-
src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c | 2 ++
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
index 0330164..9b8ddac 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
@@ -425,8 +425,10 @@ nv30_screen_create(struct nouveau_device *dev)
unsigned oclass = 0;
int ret, i;
- if (!screen)
+ if (!screen) {
+ nouveau_device_del(&dev);
return NULL;
+ }
switch (dev->chipset & 0xf0) {
case 0x30:
@@ -456,6 +458,7 @@ nv30_screen_create(struct nouveau_device *dev)
if (!oclass) {
NOUVEAU_ERR("unknown 3d class for 0x%02x\n", dev->chipset);
+ nouveau_device_del(&dev);
FREE(screen);
return NULL;
}
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index ec51d00..e9604d5 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -711,8 +711,10 @@ nv50_screen_create(struct nouveau_device *dev)
int ret;
screen = CALLOC_STRUCT(nv50_screen);
- if (!screen)
+ if (!screen) {
+ nouveau_device_del(&dev);
return NULL;
+ }
pscreen = &screen->base.base;
ret = nouveau_screen_init(&screen->base, dev);
diff --git a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
index c6603e3..bd1d761 100644
--- a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
+++ b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c
@@ -117,6 +117,8 @@ nouveau_drm_screen_create(int fd)
}
screen = (struct nouveau_screen*)init(dev);
+ /* Previous init func took ownership of dev */
+ dev = 0;
if (!screen)
goto err;
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[Mesa-dev] [Bug 92278] Black screen in War Thunder
https://bugs.freedesktop.org/show_bug.cgi?id=92278 --- Comment #3 from Tapani Pälli --- Created attachment 119191 --> https://bugs.freedesktop.org/attachment.cgi?id=119191&action=edit hack that fixes issue OK, looks like exposing EXT_direct_state_access would be enough after all, with attached patch game works and renders just fine (tested on HSW desktop). I'm not sure if there is enough interest to expose EXT variants, instead someone could pursue game vendor to use the ARB functions? -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
