[Mesa-dev] [PATCH 09/13] meta: Refactor binding of renderbuffer as texture image

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/common/meta.h  |  7 
 src/mesa/drivers/common/meta_blit.c | 70 +
 2 files changed, 47 insertions(+), 30 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index fdd8714..70b87a1 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -395,6 +395,13 @@ _mesa_meta_end(struct gl_context *ctx);
 extern GLboolean
 _mesa_meta_in_progress(struct gl_context *ctx);
 
+extern GLboolean
+_mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
+struct gl_renderbuffer *rb,
+GLuint *tex,
+struct gl_texture_object **texObj,
+GLenum *target);
+
 extern void
 _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 14ecf8f..9c8231b 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -392,38 +392,16 @@ blitframebuffer_texture(struct gl_context *ctx,
   texObj = readAtt->Texture;
   target = texObj->Target;
} else if (!readAtt->Texture && ctx->Driver.BindRenderbufferTexImage) {
-  /* Otherwise, we need the driver to be able to bind a renderbuffer as
-   * a texture image.
-   */
-  struct gl_texture_image *texImage;
-
-  if (rb->NumSamples > 1)
- target = GL_TEXTURE_2D_MULTISAMPLE;
-  else
- target = GL_TEXTURE_2D;
-
-  _mesa_GenTextures(1, &tempTex);
-  _mesa_BindTexture(target, tempTex);
-  srcLevel = 0;
-  texObj = _mesa_lookup_texture(ctx, tempTex);
-  texImage = _mesa_get_tex_image(ctx, texObj, target, srcLevel);
-
-  if (!ctx->Driver.BindRenderbufferTexImage(ctx, rb, texImage)) {
- _mesa_DeleteTextures(1, &tempTex);
+  if (!_mesa_meta_bind_rb_as_tex_image(ctx, rb,
+   &tempTex, &texObj, &target))
  return false;
-  } else {
- if (ctx->Driver.FinishRenderTexture &&
- !rb->NeedsFinishRenderTexture) {
-rb->NeedsFinishRenderTexture = true;
-ctx->Driver.FinishRenderTexture(ctx, rb);
- }
 
- if (_mesa_is_winsys_fbo(readFb)) {
-GLint temp = srcY0;
-srcY0 = rb->Height - srcY1;
-srcY1 = rb->Height - temp;
-flipY = -flipY;
- }
+  srcLevel = 0;
+  if (_mesa_is_winsys_fbo(readFb)) {
+ GLint temp = srcY0;
+ srcY0 = rb->Height - srcY1;
+ srcY1 = rb->Height - temp;
+ flipY = -flipY;
   }
} else {
   GLenum tex_base_format;
@@ -603,6 +581,38 @@ blitframebuffer_texture(struct gl_context *ctx,
return true;
 }
 
+GLboolean
+_mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
+struct gl_renderbuffer *rb,
+GLuint *tex,
+struct gl_texture_object **texObj,
+GLenum *target)
+{
+   struct gl_texture_image *texImage;
+
+   if (rb->NumSamples > 1)
+  *target = GL_TEXTURE_2D_MULTISAMPLE;
+   else
+  *target = GL_TEXTURE_2D;
+
+   _mesa_GenTextures(1, tex);
+   _mesa_BindTexture(*target, *tex);
+   *texObj = _mesa_lookup_texture(ctx, *tex);
+   texImage = _mesa_get_tex_image(ctx, *texObj, *target, 0);
+
+   if (!ctx->Driver.BindRenderbufferTexImage(ctx, rb, texImage)) {
+  _mesa_DeleteTextures(1, tex);
+  return false;
+   }
+
+   if (ctx->Driver.FinishRenderTexture && !rb->NeedsFinishRenderTexture) {
+  rb->NeedsFinishRenderTexture = true;
+  ctx->Driver.FinishRenderTexture(ctx, rb);
+   }
+
+   return true;
+}
+
 /**
  * Meta implementation of ctx->Driver.BlitFramebuffer() in terms
  * of texture mapping and polygon rendering.
-- 
1.8.3.1

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[Mesa-dev] Meta path for gen8 stencil

2014-05-09 Thread Topi Pohjolainen
I have the corresponding bits also for gen6-7, but there is a little
work left in that front. Passes all the relevant piglit tests on bdw.

Topi Pohjolainen (13):
  i965: Allow stencil to be used for sampling and as render target
  i965/wm: Surface state overrides for configuring w-tiled as y-tiled
  i965/gen8: Use helper variables for surface parameters
  i965/gen8: Allow stencil buffers to be configured as single sampled
  i965/gen8: Surface state overriding for stencil
  i965: Extend brw_get_rb_for_first_slice() for specified level/layer
  i965/blorp: Expose coordinate scissoring and mirroring
  meta: Merge compiling and linking of blit program
  meta: Refactor binding of renderbuffer as texture image
  meta: Refactor configuration of renderbuffer sampling
  meta: Refactor state save/restore for framebuffer texture blits
  i965/meta: Stencil blits
  i965/fb: Use meta path for stencil blits

 src/mesa/drivers/common/meta.c|  45 +-
 src/mesa/drivers/common/meta.h|  34 ++
 src/mesa/drivers/common/meta_blit.c   | 175 
 src/mesa/drivers/dri/i965/Makefile.sources|   2 +
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp  | 124 +-
 src/mesa/drivers/dri/i965/brw_context.h   |  10 +
 src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 506 ++
 src/mesa/drivers/dri/i965/brw_meta_updownsample.c |  13 +-
 src/mesa/drivers/dri/i965/brw_meta_util.c | 160 +++
 src/mesa/drivers/dri/i965/brw_meta_util.h |  46 ++
 src/mesa/drivers/dri/i965/brw_state.h |   6 +
 src/mesa/drivers/dri/i965/brw_surface_formats.c   |   7 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |  22 +
 src/mesa/drivers/dri/i965/gen8_surface_state.c|  36 +-
 src/mesa/drivers/dri/i965/intel_fbo.c |   9 +
 15 files changed, 969 insertions(+), 226 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
 create mode 100644 src/mesa/drivers/dri/i965/brw_meta_util.c
 create mode 100644 src/mesa/drivers/dri/i965/brw_meta_util.h

-- 
1.8.3.1

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[Mesa-dev] [PATCH 06/13] i965: Extend brw_get_rb_for_first_slice() for specified level/layer

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_context.h   |  4 
 src/mesa/drivers/dri/i965/brw_meta_updownsample.c | 13 +
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 92e1592..2731419 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1475,6 +1475,10 @@ GLboolean brwCreateContext(gl_api api,
 /*==
  * brw_misc_state.c
  */
+GLuint brw_get_rb_for_slice(struct brw_context *brw,
+struct intel_mipmap_tree *mt,
+unsigned level, unsigned layer);
+
 void brw_meta_updownsample(struct brw_context *brw,
struct intel_mipmap_tree *src,
struct intel_mipmap_tree *dst);
diff --git a/src/mesa/drivers/dri/i965/brw_meta_updownsample.c 
b/src/mesa/drivers/dri/i965/brw_meta_updownsample.c
index de25bf4..33d35ca 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_updownsample.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_updownsample.c
@@ -44,8 +44,10 @@
  *
  * Clobbers the current renderbuffer binding (ctx->CurrentRenderbuffer).
  */
-static GLuint
-brw_get_rb_for_first_slice(struct brw_context *brw, struct intel_mipmap_tree 
*mt)
+GLuint
+brw_get_rb_for_slice(struct brw_context *brw,
+ struct intel_mipmap_tree *mt,
+ unsigned level, unsigned layer)
 {
struct gl_context *ctx = &brw->ctx;
GLuint rbo;
@@ -68,6 +70,9 @@ brw_get_rb_for_first_slice(struct brw_context *brw, struct 
intel_mipmap_tree *mt
rb->Width = mt->logical_width0;
rb->Height = mt->logical_height0;
 
+   irb->mt_level = level;
+   irb->mt_layer = layer;
+
intel_miptree_reference(&irb->mt, mt);
 
return rbo;
@@ -101,8 +106,8 @@ brw_meta_updownsample(struct brw_context *brw,
 
_mesa_meta_begin(ctx, MESA_META_ALL);
_mesa_GenFramebuffers(2, fbos);
-   src_rbo = brw_get_rb_for_first_slice(brw, src_mt);
-   dst_rbo = brw_get_rb_for_first_slice(brw, dst_mt);
+   src_rbo = brw_get_rb_for_slice(brw, src_mt, 0, 0);
+   dst_rbo = brw_get_rb_for_slice(brw, dst_mt, 0, 0);
src_fbo = fbos[0];
dst_fbo = fbos[1];
 
-- 
1.8.3.1

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[Mesa-dev] [PATCH 03/13] i965/gen8: Use helper variables for surface parameters

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/gen8_surface_state.c | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 66b9879..cc55bd9 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -284,6 +284,10 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
struct gl_context *ctx = &brw->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_mipmap_tree *mt = irb->mt;
+   unsigned width = mt->logical_width0;
+   unsigned height = mt->logical_height0;
+   unsigned pitch = mt->pitch;
+   uint32_t tiling = mt->tiling;
uint32_t format = 0;
uint32_t surf_type;
bool is_array = false;
@@ -337,15 +341,15 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
  (format << BRW_SURFACE_FORMAT_SHIFT) |
  vertical_alignment(mt) |
  horizontal_alignment(mt) |
- surface_tiling_mode(mt->tiling);
+ surface_tiling_mode(tiling);
 
surf[1] = SET_FIELD(BDW_MOCS_WT, GEN8_SURFACE_MOCS) | mt->qpitch >> 2;
 
-   surf[2] = SET_FIELD(mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) |
- SET_FIELD(mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT);
+   surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
+ SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
 
surf[3] = (depth - 1) << BRW_SURFACE_DEPTH_SHIFT |
- (mt->pitch - 1); /* Surface Pitch */
+ (pitch - 1); /* Surface Pitch */
 
surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) |
  min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT |
-- 
1.8.3.1

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[Mesa-dev] [PATCH 01/13] i965: Allow stencil to be used for sampling and as render target

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_surface_formats.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 5907dd9..7ffa5c4 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -221,7 +221,7 @@ const struct surface_format_info surface_formats[] = {
SF( Y,  Y,  x, 45,  Y,  Y,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UNORM)
SF( Y,  Y,  x,  x,  Y, 60,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SNORM)
SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SINT)
-   SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)
+   SF(60,  x,  x,  x, 60,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)
SF( Y,  Y,  x,  Y,  Y,  Y,  x,  x,  x, BRW_SURFACEFORMAT_A8_UNORM)
SF( Y,  Y,  x,  x,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_I8_UNORM)
SF( Y,  Y,  x,  Y,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_L8_UNORM)
@@ -594,9 +594,12 @@ brw_init_surface_formats(struct brw_context *brw)
* integer, so we don't need hardware support for blending on it.  Other
* than that, GL in general requires alpha blending for render targets,
* even though we don't support it for some formats.
+   * Stencil is also supported as render targer for internal blitting and
+   * scaling purposes.
*/
   if (gen >= rinfo->render_target &&
- (gen >= rinfo->alpha_blend || is_integer)) {
+ (gen >= rinfo->alpha_blend || is_integer ||
+   format == MESA_FORMAT_S_UINT8)) {
 brw->render_target_format[format] = render;
 brw->format_supported_as_render_target[format] = true;
   }
-- 
1.8.3.1

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[Mesa-dev] [PATCH 10/13] meta: Refactor configuration of renderbuffer sampling

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/common/meta.h  |  5 +
 src/mesa/drivers/common/meta_blit.c | 38 -
 2 files changed, 30 insertions(+), 13 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 70b87a1..cc76214 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -402,6 +402,11 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
 struct gl_texture_object **texObj,
 GLenum *target);
 
+GLuint
+_mesa_meta_setup_sampler(struct gl_context *ctx,
+ const struct gl_texture_object *texObj,
+ GLenum target, GLenum filter, GLuint srcLevel);
+
 extern void
 _mesa_meta_BlitFramebuffer(struct gl_context *ctx,
GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 9c8231b..ae21671 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -454,25 +454,13 @@ blitframebuffer_texture(struct gl_context *ctx,
2);
}
 
-   _mesa_GenSamplers(1, &sampler);
-   _mesa_BindSampler(ctx->Texture.CurrentUnit, sampler);
-
/*
  printf("Blit from texture!\n");
  printf("  srcAtt %p  dstAtt %p\n", readAtt, drawAtt);
  printf("  srcTex %p  dstText %p\n", texObj, drawAtt->Texture);
*/
 
-   /* Prepare src texture state */
-   _mesa_BindTexture(target, texObj->Name);
-   _mesa_SamplerParameteri(sampler, GL_TEXTURE_MIN_FILTER, filter);
-   _mesa_SamplerParameteri(sampler, GL_TEXTURE_MAG_FILTER, filter);
-   if (target != GL_TEXTURE_RECTANGLE_ARB) {
-  _mesa_TexParameteri(target, GL_TEXTURE_BASE_LEVEL, srcLevel);
-  _mesa_TexParameteri(target, GL_TEXTURE_MAX_LEVEL, srcLevel);
-   }
-   _mesa_SamplerParameteri(sampler, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE);
-   _mesa_SamplerParameteri(sampler, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE);
+   sampler = _mesa_meta_setup_sampler(ctx, texObj, target, filter, srcLevel);
 
/* Always do our blits with no net sRGB decode or encode.
 *
@@ -613,6 +601,30 @@ _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
return true;
 }
 
+GLuint
+_mesa_meta_setup_sampler(struct gl_context *ctx,
+ const struct gl_texture_object *texObj,
+ GLenum target, GLenum filter, GLuint srcLevel)
+{
+   GLuint sampler;
+
+   _mesa_GenSamplers(1, &sampler);
+   _mesa_BindSampler(ctx->Texture.CurrentUnit, sampler);
+
+   /* Prepare src texture state */
+   _mesa_BindTexture(target, texObj->Name);
+   _mesa_SamplerParameteri(sampler, GL_TEXTURE_MIN_FILTER, filter);
+   _mesa_SamplerParameteri(sampler, GL_TEXTURE_MAG_FILTER, filter);
+   if (target != GL_TEXTURE_RECTANGLE_ARB) {
+  _mesa_TexParameteri(target, GL_TEXTURE_BASE_LEVEL, srcLevel);
+  _mesa_TexParameteri(target, GL_TEXTURE_MAX_LEVEL, srcLevel);
+   }
+   _mesa_SamplerParameteri(sampler, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE);
+   _mesa_SamplerParameteri(sampler, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE);
+
+   return sampler;
+}
+
 /**
  * Meta implementation of ctx->Driver.BlitFramebuffer() in terms
  * of texture mapping and polygon rendering.
-- 
1.8.3.1

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[Mesa-dev] [PATCH 05/13] i965/gen8: Surface state overriding for stencil

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/gen8_surface_state.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 32d1c33..6e6b88a 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -292,8 +292,8 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
uint32_t surf_type;
bool is_array = false;
int depth = MAX2(irb->layer_count, 1);
-   int min_array_element = irb->mt_layer / MAX2(mt->num_samples, 1);
-
+   const int min_array_element = (mt->format == MESA_FORMAT_S_UINT8) ?
+  0 : (irb->mt_layer / MAX2(mt->num_samples, 1));
GLenum gl_target =
   rb->TexImage ? rb->TexImage->TexObject->Target : GL_TEXTURE_2D;
 
@@ -308,8 +308,12 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
/* Render targets can't use IMS layout. Stencil in turn gets configured as
 * single sampled and indexed manually by the program.
 */
-   if (mt->format != MESA_FORMAT_S_UINT8)
+   if (mt->format == MESA_FORMAT_S_UINT8) {
+  brw_configure_w_tiled(mt, true, &width, &height, &pitch,
+&tiling, &format);
+   } else {
   assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS);
+   }
 
switch (gl_target) {
case GL_TEXTURE_CUBE_MAP_ARRAY:
@@ -360,7 +364,8 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
if (mt->format != MESA_FORMAT_S_UINT8)
   surf[4] |= gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout);
 
-   surf[5] = irb->mt_level - irb->mt->first_level;
+   surf[5] = mt->format == MESA_FORMAT_S_UINT8 ?
+0 : (irb->mt_level - irb->mt->first_level);
 
surf[6] = 0; /* Nothing of relevance. */
 
-- 
1.8.3.1

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[Mesa-dev] [PATCH 07/13] i965/blorp: Expose coordinate scissoring and mirroring

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/Makefile.sources   |   1 +
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 124 +
 src/mesa/drivers/dri/i965/brw_meta_util.c| 160 +++
 src/mesa/drivers/dri/i965/brw_meta_util.h|  46 
 4 files changed, 213 insertions(+), 118 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_meta_util.c
 create mode 100644 src/mesa/drivers/dri/i965/brw_meta_util.h

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index 87c73ba..9379fd2 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -76,6 +76,7 @@ i965_FILES = \
brw_lower_texture_gradients.cpp \
brw_lower_unnormalized_offset.cpp \
brw_meta_updownsample.c \
+   brw_meta_util.c \
brw_misc_state.c \
brw_object_purgeable.c \
brw_performance_monitor.c \
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp 
b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 300ff5c..fe75100 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -31,87 +31,10 @@
 #include "brw_context.h"
 #include "brw_blorp_blit_eu.h"
 #include "brw_state.h"
+#include "brw_meta_util.h"
 
 #define FILE_DEBUG_FLAG DEBUG_BLORP
 
-/**
- * Helper function for handling mirror image blits.
- *
- * If coord0 > coord1, swap them and invert the "mirror" boolean.
- */
-static inline void
-fixup_mirroring(bool &mirror, GLfloat &coord0, GLfloat &coord1)
-{
-   if (coord0 > coord1) {
-  mirror = !mirror;
-  GLfloat tmp = coord0;
-  coord0 = coord1;
-  coord1 = tmp;
-   }
-}
-
-
-/**
- * Adjust {src,dst}_x{0,1} to account for clipping and scissoring of
- * destination coordinates.
- *
- * Return true if there is still blitting to do, false if all pixels got
- * rejected by the clip and/or scissor.
- *
- * For clarity, the nomenclature of this function assumes we are clipping and
- * scissoring the X coordinate; the exact same logic applies for Y
- * coordinates.
- *
- * Note: this function may also be used to account for clipping of source
- * coordinates, by swapping the roles of src and dst.
- */
-static inline bool
-clip_or_scissor(bool mirror, GLfloat &src_x0, GLfloat &src_x1, GLfloat &dst_x0,
-GLfloat &dst_x1, GLfloat fb_xmin, GLfloat fb_xmax)
-{
-   float scale = (float) (src_x1 - src_x0) / (dst_x1 - dst_x0);
-   /* If we are going to scissor everything away, stop. */
-   if (!(fb_xmin < fb_xmax &&
- dst_x0 < fb_xmax &&
- fb_xmin < dst_x1 &&
- dst_x0 < dst_x1)) {
-  return false;
-   }
-
-   /* Clip the destination rectangle, and keep track of how many pixels we
-* clipped off of the left and right sides of it.
-*/
-   GLint pixels_clipped_left = 0;
-   GLint pixels_clipped_right = 0;
-   if (dst_x0 < fb_xmin) {
-  pixels_clipped_left = fb_xmin - dst_x0;
-  dst_x0 = fb_xmin;
-   }
-   if (fb_xmax < dst_x1) {
-  pixels_clipped_right = dst_x1 - fb_xmax;
-  dst_x1 = fb_xmax;
-   }
-
-   /* If we are mirrored, then before applying pixels_clipped_{left,right} to
-* the source coordinates, we need to flip them to account for the
-* mirroring.
-*/
-   if (mirror) {
-  GLint tmp = pixels_clipped_left;
-  pixels_clipped_left = pixels_clipped_right;
-  pixels_clipped_right = tmp;
-   }
-
-   /* Adjust the source rectangle to remove the pixels corresponding to those
-* that were clipped/scissored out of the destination rectangle.
-*/
-   src_x0 += pixels_clipped_left * scale;
-   src_x1 -= pixels_clipped_right * scale;
-
-   return true;
-}
-
-
 static struct intel_mipmap_tree *
 find_miptree(GLbitfield buffer_bit, struct intel_renderbuffer *irb)
 {
@@ -244,47 +167,12 @@ try_blorp_blit(struct brw_context *brw,
const struct gl_framebuffer *read_fb = ctx->ReadBuffer;
const struct gl_framebuffer *draw_fb = ctx->DrawBuffer;
 
-   /* Detect if the blit needs to be mirrored */
-   bool mirror_x = false, mirror_y = false;
-   fixup_mirroring(mirror_x, srcX0, srcX1);
-   fixup_mirroring(mirror_x, dstX0, dstX1);
-   fixup_mirroring(mirror_y, srcY0, srcY1);
-   fixup_mirroring(mirror_y, dstY0, dstY1);
-
-   /* If the destination rectangle needs to be clipped or scissored, do so.
-*/
-   if (!(clip_or_scissor(mirror_x, srcX0, srcX1, dstX0, dstX1,
- draw_fb->_Xmin, draw_fb->_Xmax) &&
- clip_or_scissor(mirror_y, srcY0, srcY1, dstY0, dstY1,
- draw_fb->_Ymin, draw_fb->_Ymax))) {
-  /* Everything got clipped/scissored away, so the blit was successful. */
-  return true;
-   }
-
-   /* If the source rectangle needs to be clipped or scissored, do so. */
-   if (!(clip_or_scissor(mirror_x, dstX0, dstX1, srcX0, srcX1,
- 0, read_fb->Width) &&
- clip_or_scissor(mirror_y, dstY0,

[Mesa-dev] [PATCH 02/13] i965/wm: Surface state overrides for configuring w-tiled as y-tiled

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_state.h|  6 ++
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 ++
 2 files changed, 28 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
b/src/mesa/drivers/dri/i965/brw_state.h
index b8e8520..dbcf7c7 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -206,6 +206,12 @@ void gen4_init_vtable_surface_functions(struct brw_context 
*brw);
 uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
 uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
 
+void brw_configure_w_tiled(const struct intel_mipmap_tree *mt,
+   bool is_render_target,
+   unsigned *width, unsigned *height,
+   unsigned *pitch, uint32_t *tiling,
+   unsigned *format);
+
 uint32_t brw_format_for_mesa_format(mesa_format mesa_format);
 
 GLuint translate_tex_target(GLenum target);
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 054467c..f400c41 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -101,6 +101,28 @@ brw_get_surface_num_multisamples(unsigned num_samples)
   return BRW_SURFACE_MULTISAMPLECOUNT_1;
 }
 
+void
+brw_configure_w_tiled(const struct intel_mipmap_tree *mt,
+  bool is_render_target,
+  unsigned *width, unsigned *height,
+  unsigned *pitch, uint32_t *tiling, unsigned *format)
+{
+   const unsigned x_align = 8, y_align = mt->num_samples != 0 ? 8 : 4;
+
+   *tiling = I915_TILING_Y;
+   *pitch = mt->pitch * 2;
+   *width = ALIGN(mt->physical_width0, x_align) * 2;
+   *height = ALIGN(mt->physical_height0, y_align) / 2;
+
+   /* Allow program to access pixels in any mip-level */
+   if (mt->last_level > 1)
+  *height *= 2;
+
+   if (is_render_target) {
+  *format = BRW_SURFACEFORMAT_R8_UINT;
+   }
+}
+
 
 /**
  * Compute the combination of DEPTH_TEXTURE_MODE and EXT_texture_swizzle
-- 
1.8.3.1

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[Mesa-dev] [PATCH 04/13] i965/gen8: Allow stencil buffers to be configured as single sampled

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/gen8_surface_state.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index cc55bd9..32d1c33 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -305,8 +305,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
 
intel_miptree_used_for_rendering(mt);
 
-   /* Render targets can't use IMS layout. */
-   assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS);
+   /* Render targets can't use IMS layout. Stencil in turn gets configured as
+* single sampled and indexed manually by the program.
+*/
+   if (mt->format != MESA_FORMAT_S_UINT8)
+  assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS);
 
switch (gl_target) {
case GL_TEXTURE_CUBE_MAP_ARRAY:
@@ -351,10 +354,12 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
surf[3] = (depth - 1) << BRW_SURFACE_DEPTH_SHIFT |
  (pitch - 1); /* Surface Pitch */
 
-   surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) |
- min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT |
+   surf[4] = min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT |
  (depth - 1) << GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT_SHIFT;
 
+   if (mt->format != MESA_FORMAT_S_UINT8)
+  surf[4] |= gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout);
+
surf[5] = irb->mt_level - irb->mt->first_level;
 
surf[6] = 0; /* Nothing of relevance. */
-- 
1.8.3.1

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[Mesa-dev] [PATCH 11/13] meta: Refactor state save/restore for framebuffer texture blits

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/common/meta.h  | 15 ++
 src/mesa/drivers/common/meta_blit.c | 59 +++--
 2 files changed, 52 insertions(+), 22 deletions(-)

diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index cc76214..2186a39 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -267,6 +267,13 @@ struct blit_state
bool no_ctsi_fallback;
 };
 
+struct fb_tex_blit_state
+{
+   GLint baseLevelSave, maxLevelSave;
+   GLuint sampler, samplerSave;
+   GLuint tempTex;
+};
+
 
 /**
  * State for glClear()
@@ -395,6 +402,14 @@ _mesa_meta_end(struct gl_context *ctx);
 extern GLboolean
 _mesa_meta_in_progress(struct gl_context *ctx);
 
+extern void
+_mesa_meta_fb_tex_blit_begin(const struct gl_context *ctx,
+ struct fb_tex_blit_state *blit);
+
+extern void
+_mesa_meta_fb_tex_blit_end(const struct gl_context *ctx, GLenum target,
+   struct fb_tex_blit_state *blit);
+
 extern GLboolean
 _mesa_meta_bind_rb_as_tex_image(struct gl_context *ctx,
 struct gl_renderbuffer *rb,
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index ae21671..beb1ea5 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -356,19 +356,14 @@ blitframebuffer_texture(struct gl_context *ctx,
const struct gl_renderbuffer_attachment *readAtt =
   &readFb->Attachment[att_index];
struct blit_state *blit = &ctx->Meta->Blit;
+   struct fb_tex_blit_state fb_tex_blit;
const GLint dstX = MIN2(dstX0, dstX1);
const GLint dstY = MIN2(dstY0, dstY1);
const GLint dstW = abs(dstX1 - dstX0);
const GLint dstH = abs(dstY1 - dstY0);
struct gl_texture_object *texObj;
GLuint srcLevel;
-   GLint baseLevelSave;
-   GLint maxLevelSave;
GLenum target;
-   GLuint sampler, samplerSave =
-  ctx->Texture.Unit[ctx->Texture.CurrentUnit].Sampler ?
-  ctx->Texture.Unit[ctx->Texture.CurrentUnit].Sampler->Name : 0;
-   GLuint tempTex = 0;
struct gl_renderbuffer *rb = readAtt->Renderbuffer;
struct temp_texture *meta_temp_texture;
 
@@ -380,6 +375,8 @@ blitframebuffer_texture(struct gl_context *ctx,
   filter = GL_LINEAR;
}
 
+   _mesa_meta_fb_tex_blit_begin(ctx, &fb_tex_blit);
+
if (readAtt->Texture &&
(readAtt->Texture->Target == GL_TEXTURE_2D ||
 readAtt->Texture->Target == GL_TEXTURE_RECTANGLE ||
@@ -392,8 +389,8 @@ blitframebuffer_texture(struct gl_context *ctx,
   texObj = readAtt->Texture;
   target = texObj->Target;
} else if (!readAtt->Texture && ctx->Driver.BindRenderbufferTexImage) {
-  if (!_mesa_meta_bind_rb_as_tex_image(ctx, rb,
-   &tempTex, &texObj, &target))
+  if (!_mesa_meta_bind_rb_as_tex_image(ctx, rb, &fb_tex_blit.tempTex,
+   &texObj, &target))
  return false;
 
   srcLevel = 0;
@@ -442,8 +439,8 @@ blitframebuffer_texture(struct gl_context *ctx,
   srcY1 = srcH;
}
 
-   baseLevelSave = texObj->BaseLevel;
-   maxLevelSave = texObj->MaxLevel;
+   fb_tex_blit.baseLevelSave = texObj->BaseLevel;
+   fb_tex_blit.maxLevelSave = texObj->MaxLevel;
 
if (glsl_version) {
   setup_glsl_blit_framebuffer(ctx, blit, rb, target);
@@ -460,7 +457,8 @@ blitframebuffer_texture(struct gl_context *ctx,
  printf("  srcTex %p  dstText %p\n", texObj, drawAtt->Texture);
*/
 
-   sampler = _mesa_meta_setup_sampler(ctx, texObj, target, filter, srcLevel);
+   fb_tex_blit.sampler = _mesa_meta_setup_sampler(ctx, texObj, target, filter,
+  srcLevel);
 
/* Always do our blits with no net sRGB decode or encode.
 *
@@ -481,11 +479,12 @@ blitframebuffer_texture(struct gl_context *ctx,
if (ctx->Extensions.EXT_texture_sRGB_decode) {
   if (_mesa_get_format_color_encoding(rb->Format) == GL_SRGB &&
   ctx->DrawBuffer->Visual.sRGBCapable) {
- _mesa_SamplerParameteri(sampler, GL_TEXTURE_SRGB_DECODE_EXT,
- GL_DECODE_EXT);
+ _mesa_SamplerParameteri(fb_tex_blit.sampler,
+ GL_TEXTURE_SRGB_DECODE_EXT, GL_DECODE_EXT);
  _mesa_set_framebuffer_srgb(ctx, GL_TRUE);
   } else {
- _mesa_SamplerParameteri(sampler, GL_TEXTURE_SRGB_DECODE_EXT,
+ _mesa_SamplerParameteri(fb_tex_blit.sampler,
+ GL_TEXTURE_SRGB_DECODE_EXT,
  GL_SKIP_DECODE_EXT);
  /* set_framebuffer_srgb was set by _mesa_meta_begin(). */
   }
@@ -552,21 +551,37 @@ blitframebuffer_texture(struct gl_context *ctx,
_mesa_DepthFunc(GL_ALWAYS);
 
_mesa_DrawArrays(GL_TRIANGLE_FAN, 0, 4);
+   _mesa_meta_fb_tex_blit_end(ctx, target, &fb_tex_blit);
+
+   return true;
+}
+
+void
+_mesa_meta_fb_tex_blit_begi

[Mesa-dev] [PATCH 13/13] i965/fb: Use meta path for stencil blits

2014-05-09 Thread Topi Pohjolainen
This is effective only on gen8 for now as previous generations still
go through blorp.

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/intel_fbo.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c 
b/src/mesa/drivers/dri/i965/intel_fbo.c
index 2d68de8..58b7043 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -879,6 +879,15 @@ intel_blit_framebuffer(struct gl_context *ctx,
if (mask == 0x0)
   return;
 
+   if (mask & GL_STENCIL_BUFFER_BIT) {
+  brw_meta_fbo_stencil_blit(brw_context(ctx),
+srcX0, srcY0, srcX1, srcY1,
+dstX0, dstY0, dstX1, dstY1);
+  mask &= ~GL_STENCIL_BUFFER_BIT;
+  if (mask == 0x0)
+ return;
+   }
+
/* Try using the BLT engine. */
mask = intel_blit_framebuffer_with_blitter(ctx,
   srcX0, srcY0, srcX1, srcY1,
-- 
1.8.3.1

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[Mesa-dev] [PATCH 12/13] i965/meta: Stencil blits

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/Makefile.sources|   1 +
 src/mesa/drivers/dri/i965/brw_context.h   |   6 +
 src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 506 ++
 3 files changed, 513 insertions(+)
 create mode 100644 src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index 9379fd2..5fc90b5 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -76,6 +76,7 @@ i965_FILES = \
brw_lower_texture_gradients.cpp \
brw_lower_unnormalized_offset.cpp \
brw_meta_updownsample.c \
+   brw_meta_stencil_blit.c \
brw_meta_util.c \
brw_misc_state.c \
brw_object_purgeable.c \
diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 2731419..9e3da3e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1482,6 +1482,12 @@ GLuint brw_get_rb_for_slice(struct brw_context *brw,
 void brw_meta_updownsample(struct brw_context *brw,
struct intel_mipmap_tree *src,
struct intel_mipmap_tree *dst);
+
+void brw_meta_fbo_stencil_blit(struct brw_context *brw,
+   GLfloat srcX0, GLfloat srcY0,
+   GLfloat srcX1, GLfloat srcY1,
+   GLfloat dstX0, GLfloat dstY0,
+   GLfloat dstX1, GLfloat dstY1);
 /*==
  * brw_misc_state.c
  */
diff --git a/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c 
b/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
new file mode 100644
index 000..88d2e81
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
@@ -0,0 +1,506 @@
+/*
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/**
+ * @file brw_meta_stencil_blit.c
+ *
+ * Implements upsampling, downsampling and scaling of stencil miptrees. The
+ * logic can be originally found in brw_blorp_blit.c.
+ * Implementation creates a temporary draw framebuffer object and attaches the
+ * destination stencil buffer attachment as color attachment. Source attachment
+ * is in turn treated as a stencil texture and the glsl program used for the
+ * blitting samples it using stencil-indexing.
+ *
+ * Unfortunately as the data port does not support interleaved msaa-surfaces
+ * (stencil is always IMS), the glsl program needs to handle the writing of
+ * individual samples manually. Surface is configured as if it were single
+ * sampled (with adjusted dimensions) and the glsl program extracts the
+ * sample indices from the input coordinates for correct texturing.
+ *
+ * Target surface is also configured as Y-tiled instead of W-tiled in order
+ * to support generations 6-7. Later hardware supports W-tiled as render target
+ * and the logic here could be simplified for those.
+ */
+
+#include "brw_context.h"
+#include "intel_batchbuffer.h"
+#include "intel_fbo.h"
+
+#include "main/blit.h"
+#include "main/buffers.h"
+#include "main/fbobject.h"
+#include "main/uniforms.h"
+#include "main/texparam.h"
+#include "main/texobj.h"
+#include "main/viewport.h"
+#include "main/enable.h"
+#include "main/blend.h"
+#include "main/varray.h"
+#include "main/shaderapi.h"
+#include "glsl/ralloc.h"
+
+#include "drivers/common/meta.h"
+#include "brw_meta_util.h"
+
+#define FILE_DEBUG_FLAG DEBUG_FBO
+
+struct blit_dims {
+   int src_x0, src_y0, src_x1, src_y1;
+   int dst_x0, dst_y0, dst_x1, dst_y1;
+   bool mirror_x, mirror_y;
+};
+
+static const char *vs_source =
+   "#version 130\n"
+   "in vec2 position;\n"
+   "out vec2 tex_coords;\n"
+   "void main()\n"
+   "{\n"
+   "   te

[Mesa-dev] [PATCH 08/13] meta: Merge compiling and linking of blit program

2014-05-09 Thread Topi Pohjolainen
Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/common/meta.c  | 45 -
 src/mesa/drivers/common/meta.h  |  7 ++
 src/mesa/drivers/common/meta_blit.c | 18 +++
 3 files changed, 39 insertions(+), 31 deletions(-)

diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index b4c3056..3ef3f79 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -204,6 +204,31 @@ _mesa_meta_link_program_with_debug(struct gl_context *ctx, 
GLuint program)
return 0;
 }
 
+void
+_mesa_meta_compile_and_link_program(struct gl_context *ctx,
+const char *vs_source,
+const char *fs_source,
+const char *name,
+GLuint *program)
+{
+   GLuint vs = _mesa_meta_compile_shader_with_debug(ctx, GL_VERTEX_SHADER,
+vs_source);
+   GLuint fs = _mesa_meta_compile_shader_with_debug(ctx, GL_FRAGMENT_SHADER,
+fs_source);
+
+   *program = _mesa_CreateProgram();
+   _mesa_AttachShader(*program, fs);
+   _mesa_DeleteShader(fs);
+   _mesa_AttachShader(*program, vs);
+   _mesa_DeleteShader(vs);
+   _mesa_BindAttribLocation(*program, 0, "position");
+   _mesa_BindAttribLocation(*program, 1, "texcoords");
+   _mesa_meta_link_program_with_debug(ctx, *program);
+   _mesa_ObjectLabel(GL_PROGRAM, *program, -1, name);
+
+   _mesa_UseProgram(*program);
+}
+
 /**
  * Generate a generic shader to blit from a texture to a framebuffer
  *
@@ -219,10 +244,8 @@ _mesa_meta_setup_blit_shader(struct gl_context *ctx,
 {
const char *vs_source;
char *fs_source;
-   GLuint vs, fs;
void *const mem_ctx = ralloc_context(NULL);
struct blit_shader *shader = choose_blit_shader(target, table);
-   char *name;
 
assert(shader != NULL);
 
@@ -282,22 +305,12 @@ _mesa_meta_setup_blit_shader(struct gl_context *ctx,
   shader->texcoords);
}
 
-   vs = _mesa_meta_compile_shader_with_debug(ctx, GL_VERTEX_SHADER, vs_source);
-   fs = _mesa_meta_compile_shader_with_debug(ctx, GL_FRAGMENT_SHADER, 
fs_source);
 
-   shader->shader_prog = _mesa_CreateProgram();
-   _mesa_AttachShader(shader->shader_prog, fs);
-   _mesa_DeleteShader(fs);
-   _mesa_AttachShader(shader->shader_prog, vs);
-   _mesa_DeleteShader(vs);
-   _mesa_BindAttribLocation(shader->shader_prog, 0, "position");
-   _mesa_BindAttribLocation(shader->shader_prog, 1, "texcoords");
-   _mesa_meta_link_program_with_debug(ctx, shader->shader_prog);
-   name = ralloc_asprintf(mem_ctx, "%s blit", shader->type);
-   _mesa_ObjectLabel(GL_PROGRAM, shader->shader_prog, -1, name);
+   _mesa_meta_compile_and_link_program(ctx, vs_source, fs_source,
+   ralloc_asprintf(mem_ctx, "%s blit",
+   shader->type),
+   &shader->shader_prog);
ralloc_free(mem_ctx);
-
-   _mesa_UseProgram(shader->shader_prog);
 }
 
 /**
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index 32b71fa..fdd8714 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -455,6 +455,13 @@ _mesa_meta_compile_shader_with_debug(struct gl_context 
*ctx, GLenum target,
 GLuint
 _mesa_meta_link_program_with_debug(struct gl_context *ctx, GLuint program);
 
+void
+_mesa_meta_compile_and_link_program(struct gl_context *ctx,
+const char *vs_source,
+const char *fs_source,
+const char *name,
+GLuint *program);
+
 GLboolean
 _mesa_meta_alloc_texture(struct temp_texture *tex,
  GLsizei width, GLsizei height, GLenum intFormat);
diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index c3dc146..14ecf8f 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -62,7 +62,6 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
 {
const char *vs_source;
char *fs_source;
-   GLuint vs, fs;
void *mem_ctx;
enum blit_msaa_shader shader_index;
bool dst_is_msaa = false;
@@ -314,21 +313,10 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
   sample_resolve);
}
 
-   vs = _mesa_meta_compile_shader_with_debug(ctx, GL_VERTEX_SHADER, vs_source);
-   fs = _mesa_meta_compile_shader_with_debug(ctx, GL_FRAGMENT_SHADER, 
fs_source);
-
-   blit->msaa_shaders[shader_index] = _mesa_CreateProgram();
-   _mesa_AttachShader(blit->msaa_shaders[shader_index], fs);
-   _mesa_DeleteShader(fs);
-   _mesa_AttachShader(blit->msaa_shaders[shader_index], vs);
-   _mesa_DeleteShader(vs);
-   _mesa_BindAttribLocation(blit->msaa_shaders[shad

[Mesa-dev] [PATCH] ralloc: Omit detailed license information about talloc.

2014-05-09 Thread jfonseca
From: José Fonseca 

That information misleads source code auditing tools to think that
ralloc itself is released under LGPL v3.

Instead, simply state talloc is not licensed under a permissive license.
---
 src/glsl/ralloc.h | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/glsl/ralloc.h b/src/glsl/ralloc.h
index 4581a7a..70f7d9c 100644
--- a/src/glsl/ralloc.h
+++ b/src/glsl/ralloc.h
@@ -38,10 +38,9 @@
  * Tridgell's talloc, but ralloc is an independent implementation
  * released under the MIT license and tuned for Mesa.
  *
- * The talloc implementation is available under the GNU Lesser
- * General Public License (GNU LGPL), version 3 or later. It is
- * more sophisticated than ralloc in that it includes reference
- * counting and debugging features. See: http://talloc.samba.org/
+ * The talloc implementation is not available under a permissive
+ * license. It is more sophisticated than ralloc in that it includes
+ * reference counting and debugging features. See: http://talloc.samba.org/
  */
 
 #ifndef RALLOC_H
-- 
1.9.1

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Re: [Mesa-dev] [PATCH] ralloc: Omit detailed license information about talloc.

2014-05-09 Thread Brian Paul

On 05/09/2014 03:55 AM, jfons...@vmware.com wrote:

From: José Fonseca 

That information misleads source code auditing tools to think that
ralloc itself is released under LGPL v3.

Instead, simply state talloc is not licensed under a permissive license.
---
  src/glsl/ralloc.h | 7 +++
  1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/glsl/ralloc.h b/src/glsl/ralloc.h
index 4581a7a..70f7d9c 100644
--- a/src/glsl/ralloc.h
+++ b/src/glsl/ralloc.h
@@ -38,10 +38,9 @@
   * Tridgell's talloc, but ralloc is an independent implementation
   * released under the MIT license and tuned for Mesa.
   *
- * The talloc implementation is available under the GNU Lesser
- * General Public License (GNU LGPL), version 3 or later. It is
- * more sophisticated than ralloc in that it includes reference
- * counting and debugging features. See: http://talloc.samba.org/
+ * The talloc implementation is not available under a permissive
+ * license. It is more sophisticated than ralloc in that it includes
+ * reference counting and debugging features. See: http://talloc.samba.org/
   */

  #ifndef RALLOC_H



Reviewed-by: Brian Paul 

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[Mesa-dev] [PATCH] i965/fs: Fix gen<6 LRP opcode

2014-05-09 Thread Juha-Pekka Heikkila
On ILK implicit accumulator write from MUL opcode seem to
behave sometime unexpected. This patch change implicit
accumulator write to explicit on emitting LRP for gen<6.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77707
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77703
Signed-off-by: Juha-Pekka Heikkila 
---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index d2dc5fa..c09f0a7 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -226,8 +226,10 @@ fs_visitor::emit_lrp(const fs_reg &dst, const fs_reg &x, 
const fs_reg &y,
   fs_reg negative_a = a;
   negative_a.negate = !a.negate;
 
+  struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
+
   emit(ADD(one_minus_a, negative_a, fs_reg(1.0f)));
-  fs_inst *mul = emit(MUL(reg_null_f, y, a));
+  fs_inst *mul = emit(MUL(acc, y, a));
   mul->writes_accumulator = true;
   emit(MAC(dst, x, one_minus_a));
} else {
-- 
1.8.1.2

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[Mesa-dev] Mesa 10.1.3

2014-05-09 Thread Carl Worth
Mesa 10.1.3 has been released. Mesa 10.1.3 is a bug fix release which
fixes bugs fixed since the 10.1.2 release, (see below for a list of
changes).

Note: Mesa 10.1.3 is being released sooner than originally scheduled to
make available a fix for a performance rgression that was inadvertently
introduced to Mesa 10.1.2. The performance regression is reported to
make vmware swapbuffers fall back to software.

The tag in the git repository for Mesa 10.1.3 is 'mesa-10.1.3'.

Mesa 10.1.3 is available for download at
ftp://freedesktop.org/pub/mesa/10.1.3/

md5sums:
665fe1656aaa2c37b32042068aff92cb  MesaLib-10.1.3.tar.gz
ba6dbe2b9cab0b4de840c996b9b6a3ad  MesaLib-10.1.3.tar.bz2
4e6f26330a63d3c47e62ac4bdead39e8  MesaLib-10.1.3.zip

I have verified building from the .tar.bz2 file by doing:

tar xjf MesaLib-10.1.3.tar.bz2
cd Mesa-10.1.3
./configure --enable-gallium-llvm
make -j6
make install

I have also verified that I pushed the tag.

-Carl

-- 
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Changes from 10.1.2 to 10.1.3

Carl Worth (4):
  docs: Add MD5 sums for Mesa 10.1.2
  get-pick-list.sh: Require explicit "10.1" for nominating stable patches
  VERSION: Update to 10.1.3
  docs: Add release notes for Mesa 10.1.3.

Kenneth Graunke (2):
  mesa: Fix MaxNumLayers for 1D array textures.
  i965: Fix depth (array slices) computation for 1D_ARRAY render targets.

Tapani Pälli (1):
  glsl: fix bogus layout qualifier warnings

Thomas Hellstrom (1):
  st/xa: Fix performance regression introduced by commit "Cache render 
target surface"



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Re: [Mesa-dev] Mesa 10.1.2

2014-05-09 Thread Carl Worth
Thomas Hellstrom  writes:
> The reason it was CC'd stable was that it appeared to fix a rendering
> problem that we were seeing, but I should definitely have tested this
> more thoroughly. :(

No worries. It happens to all of us at times.

> An unfortunate situation but the sooner we could cut a 10.1.3 release
> including 9306b7c171b29ac99f837e9efcd0281caf1d332e, the
> better for us.

Done. I did this quicker than I usually do, so hopefully I didn't make
any mistakes. If you notice anything, please let me know.

-Carl

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[Mesa-dev] [Bug 57013] Enable --without-glut

2014-05-09 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=57013

--- Comment #2 from Drew Moseley  ---
Created attachment 98768
  --> https://bugs.freedesktop.org/attachment.cgi?id=98768&action=edit
Updated patch.

I think embedding "/lib" in the GLUT_LIBS definition makes this not work on
64-bit systems that use /lib64.

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[Mesa-dev] [Bug 78496] New: Some data files not using DEMOS_DATA_DIR

2014-05-09 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=78496

  Priority: medium
Bug ID: 78496
  Assignee: mesa-dev@lists.freedesktop.org
   Summary: Some data files not using DEMOS_DATA_DIR
  Severity: normal
Classification: Unclassified
OS: All
  Reporter: d...@moseleynet.net
  Hardware: Other
Status: NEW
   Version: git
 Component: Demos
   Product: Mesa

Created attachment 98769
  --> https://bugs.freedesktop.org/attachment.cgi?id=98769&action=edit
Add DEMOS_DATA_DIR to filenames.

Some data files are not using the DEMOS_DATA_DIR configuration variable so that
if they are installed into the system, they are not easily located.

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Re: [Mesa-dev] [PATCH] i965: Fix GPU hangs on Broadwell in shaders with some control flow.

2014-05-09 Thread Jordan Justen
Reviewed-by: Jordan Justen 

On Thu, May 8, 2014 at 4:44 PM, Kenneth Graunke  wrote:
> According to the documentation, we need to set the source 0 register
> type to IMM for flow control instructions that have both JIP and UIP.
>
> Fixes GPU hangs in approximately 10 Piglit tests, 5 es3conform tests,
> Unigine Crypt, a WebGL raytracer demo, and several Steam titles.
>
> Cc: "10.2" 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75478
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75878
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76939
> Signed-off-by: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/gen8_generator.cpp | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_generator.cpp 
> b/src/mesa/drivers/dri/i965/gen8_generator.cpp
> index dd434a7..faca9c0 100644
> --- a/src/mesa/drivers/dri/i965/gen8_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/gen8_generator.cpp
> @@ -422,6 +422,7 @@ gen8_generator::IF(unsigned predicate)
>  {
> gen8_instruction *inst = next_inst(BRW_OPCODE_IF);
> gen8_set_dst(brw, inst, vec1(retype(brw_null_reg(), 
> BRW_REGISTER_TYPE_D)));
> +   gen8_set_src0(brw, inst, brw_imm_d(0));
> gen8_set_exec_size(inst, default_state.exec_size);
> gen8_set_pred_control(inst, predicate);
> gen8_set_mask_control(inst, BRW_MASK_ENABLE);
> @@ -435,6 +436,7 @@ gen8_generator::ELSE()
>  {
> gen8_instruction *inst = next_inst(BRW_OPCODE_ELSE);
> gen8_set_dst(brw, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
> +   gen8_set_src0(brw, inst, brw_imm_d(0));
> gen8_set_mask_control(inst, BRW_MASK_ENABLE);
> push_if_stack(inst);
> return inst;
> @@ -456,6 +458,7 @@ gen8_generator::ENDIF()
>
> gen8_instruction *endif_inst = next_inst(BRW_OPCODE_ENDIF);
> gen8_set_mask_control(endif_inst, BRW_MASK_ENABLE);
> +   gen8_set_src0(brw, endif_inst, brw_imm_d(0));
> patch_IF_ELSE(if_inst, else_inst, endif_inst);
>
> return endif_inst;
> @@ -577,8 +580,7 @@ gen8_generator::BREAK()
>  {
> gen8_instruction *inst = next_inst(BRW_OPCODE_BREAK);
> gen8_set_dst(brw, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
> -   gen8_set_src0(brw, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
> -   gen8_set_src1(brw, inst, brw_imm_d(0));
> +   gen8_set_src0(brw, inst, brw_imm_d(0));
> gen8_set_exec_size(inst, default_state.exec_size);
> return inst;
>  }
> @@ -588,8 +590,7 @@ gen8_generator::CONTINUE()
>  {
> gen8_instruction *inst = next_inst(BRW_OPCODE_CONTINUE);
> gen8_set_dst(brw, inst, brw_ip_reg());
> -   gen8_set_src0(brw, inst, brw_ip_reg());
> -   gen8_set_src1(brw, inst, brw_imm_d(0));
> +   gen8_set_src0(brw, inst, brw_imm_d(0));
> gen8_set_exec_size(inst, default_state.exec_size);
> return inst;
>  }
> @@ -601,8 +602,7 @@ gen8_generator::WHILE()
> gen8_instruction *while_inst = next_inst(BRW_OPCODE_WHILE);
>
> gen8_set_dst(brw, while_inst, retype(brw_null_reg(), 
> BRW_REGISTER_TYPE_D));
> -   gen8_set_src0(brw, while_inst, retype(brw_null_reg(), 
> BRW_REGISTER_TYPE_D));
> -   gen8_set_src1(brw, while_inst, brw_imm_ud(0));
> +   gen8_set_src0(brw, while_inst, brw_imm_d(0));
> gen8_set_jip(while_inst, 16 * (do_inst - while_inst));
> gen8_set_exec_size(while_inst, default_state.exec_size);
>
> @@ -614,7 +614,7 @@ gen8_generator::HALT()
>  {
> gen8_instruction *inst = next_inst(BRW_OPCODE_HALT);
> gen8_set_dst(brw, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
> -   gen8_set_src0(brw, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
> +   gen8_set_src0(brw, inst, brw_imm_d(0));
> gen8_set_exec_size(inst, default_state.exec_size);
> gen8_set_mask_control(inst, BRW_MASK_DISABLE);
> return inst;
> --
> 1.9.1
>
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Re: [Mesa-dev] [PATCH] ralloc: Omit detailed license information about talloc.

2014-05-09 Thread Kenneth Graunke
On 05/09/2014 02:55 AM, jfons...@vmware.com wrote:
> From: José Fonseca 
> 
> That information misleads source code auditing tools to think that
> ralloc itself is released under LGPL v3.
> 
> Instead, simply state talloc is not licensed under a permissive license.
> ---
>  src/glsl/ralloc.h | 7 +++
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/src/glsl/ralloc.h b/src/glsl/ralloc.h
> index 4581a7a..70f7d9c 100644
> --- a/src/glsl/ralloc.h
> +++ b/src/glsl/ralloc.h
> @@ -38,10 +38,9 @@
>   * Tridgell's talloc, but ralloc is an independent implementation
>   * released under the MIT license and tuned for Mesa.
>   *
> - * The talloc implementation is available under the GNU Lesser
> - * General Public License (GNU LGPL), version 3 or later. It is
> - * more sophisticated than ralloc in that it includes reference
> - * counting and debugging features. See: http://talloc.samba.org/
> + * The talloc implementation is not available under a permissive
> + * license. It is more sophisticated than ralloc in that it includes
> + * reference counting and debugging features. See: http://talloc.samba.org/
>   */
>  
>  #ifndef RALLOC_H

Sigh...gotta love those source code auditing tools.

Reasonable enough though.

Acked-by: Kenneth Graunke 



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Re: [Mesa-dev] [PATCH 2/4] targets/xa: limit the amount of exported symbols

2014-05-09 Thread Emil Velikov
ping

Thomas, Rob,
Can you please take a look if the patch makes sense ? I have double checked
that only the required functions are exported although I may have missed
something. IMHO you both know XA API a lot better than me :)

Thanks
Emil

On 02/05/14 22:02, Emil Velikov wrote:
> In the presence of LLVM the final library exports every symbol from
> the llvm namespace. Resolve this by using a version script (w/o the
> version/name tag).
> 
> Considering that there are only ~35 symbols, explicitly list them
> to minimize the chances of rogue symbols sneaking in.
> 
> Signed-off-by: Emil Velikov 
> ---
>  src/gallium/targets/xa/Makefile.am |  1 +
>  src/gallium/targets/xa/xa.sym  | 38 
> ++
>  2 files changed, 39 insertions(+)
>  create mode 100644 src/gallium/targets/xa/xa.sym
> 
> diff --git a/src/gallium/targets/xa/Makefile.am 
> b/src/gallium/targets/xa/Makefile.am
> index 2619e57..17cd6c4 100644
> --- a/src/gallium/targets/xa/Makefile.am
> +++ b/src/gallium/targets/xa/Makefile.am
> @@ -63,6 +63,7 @@ endif
>  libxatracker_la_LDFLAGS = \
>   -no-undefined \
>   -version-number $(XA_MAJOR):$(XA_MINOR):$(XA_TINY) \
> + -Wl,--version-script=$(top_srcdir)/src/gallium/targets/xa/xa.sym \
>   $(GC_SECTIONS) \
>   $(LD_NO_UNDEFINED)
>  
> diff --git a/src/gallium/targets/xa/xa.sym b/src/gallium/targets/xa/xa.sym
> new file mode 100644
> index 000..9c7f422
> --- /dev/null
> +++ b/src/gallium/targets/xa/xa.sym
> @@ -0,0 +1,38 @@
> +{
> + global:
> + xa_composite_allocation;
> + xa_composite_check_accelerated;
> + xa_composite_done;
> + xa_composite_prepare;
> + xa_composite_rect;
> + xa_context_create;
> + xa_context_default;
> + xa_context_destroy;
> + xa_context_flush;
> + xa_copy;
> + xa_copy_done;
> + xa_copy_prepare;
> + xa_fence_get;
> + xa_fence_wait;
> + xa_fence_destroy;
> + xa_format_check_supported;
> + xa_solid;
> + xa_solid_done;
> + xa_solid_prepare;
> + xa_surface_create;
> + xa_surface_dma;
> + xa_surface_format;
> + xa_surface_from_handle;
> + xa_surface_handle;
> + xa_surface_map;
> + xa_surface_redefine;
> + xa_surface_ref;
> + xa_surface_unmap;
> + xa_surface_unref;
> + xa_tracker_create;
> + xa_tracker_destroy;
> + xa_tracker_version;
> + xa_yuv_planar_blit;
> + local:
> + *;
> +};
> 

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Re: [Mesa-dev] [PATCH 3/4] targets/osmesa: limit the amount of exported symbols

2014-05-09 Thread Emil Velikov
ping,

Brian, you seem to be the only person that came near osmesa over the last few
years. Can you take a look at the patch below?

Cheers
Emil

On 02/05/14 22:02, Emil Velikov wrote:
> Explicitly list all the OSMesa* symbols and wildcast the gl*
> ones.
> 
> Cc: Brian Paul 
> Signed-off-by: Emil Velikov 
> ---
>  src/gallium/targets/osmesa/Makefile.am |  1 +
>  src/gallium/targets/osmesa/osmesa.sym  | 18 ++
>  2 files changed, 19 insertions(+)
>  create mode 100644 src/gallium/targets/osmesa/osmesa.sym
> 
> diff --git a/src/gallium/targets/osmesa/Makefile.am 
> b/src/gallium/targets/osmesa/Makefile.am
> index 067f980..0ec8a26 100644
> --- a/src/gallium/targets/osmesa/Makefile.am
> +++ b/src/gallium/targets/osmesa/Makefile.am
> @@ -45,6 +45,7 @@ lib@OSMESA_LIB@_la_LDFLAGS = \
>   -module \
>   -no-undefined \
>   -version-number @OSMESA_VERSION@ \
> + 
> -Wl,--version-script=$(top_srcdir)/src/gallium/targets/osmesa/osmesa.sym \
>   $(GC_SECTIONS) \
>   $(LD_NO_UNDEFINED)
>  
> diff --git a/src/gallium/targets/osmesa/osmesa.sym 
> b/src/gallium/targets/osmesa/osmesa.sym
> new file mode 100644
> index 000..b8230e0
> --- /dev/null
> +++ b/src/gallium/targets/osmesa/osmesa.sym
> @@ -0,0 +1,18 @@
> +{
> + global:
> + OSMesaColorClamp;
> + OSMesaCreateContext;
> + OSMesaCreateContextExt;
> + OSMesaDestroyContext;
> + OSMesaGetColorBuffer;
> + OSMesaGetCurrentContext;
> + OSMesaGetDepthBuffer;
> + OSMesaGetIntegerv;
> + OSMesaGetProcAddress;
> + OSMesaMakeCurrent;
> + OSMesaPixelStore;
> + OSMesaPostprocess;
> + gl*;
> + local:
> + *;
> +};
> 

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Re: [Mesa-dev] [PATCH 4/4] targets/libgl-xlib: hide all the exported symbol mayhem

2014-05-09 Thread Emil Velikov
Ping

Btw the TODO list here was for my personal reference, I'll change/nuke it
before pushing.

Cheers,
Emil

On 02/05/14 22:02, Emil Velikov wrote:
> TODO:
>  - properly cleanup all the _glapi* symbols
>  - XMesa*
>  -- no sign of the header even being distributed
>  -- mesa-demos uses it to the point that the relevant code is not compiled
>  -- the classic driver (x11) exibits the same issues
> 
> Brian,
> 
> Do you know of any users of the XMesa* functions outside of mesa-demos ?
> AFAICS we should be safe with dropping PUBLIC although I may have missed
> something. As a follow up someone can cleanup all the mesa-demos code :)
> 
> Cc: Brian Paul 
> Signed-off-by: Emil Velikov 
> ---
>  src/gallium/targets/libgl-xlib/Makefile.am| 1 +
>  src/gallium/targets/libgl-xlib/libgl-xlib.sym | 6 ++
>  2 files changed, 7 insertions(+)
>  create mode 100644 src/gallium/targets/libgl-xlib/libgl-xlib.sym
> 
> diff --git a/src/gallium/targets/libgl-xlib/Makefile.am 
> b/src/gallium/targets/libgl-xlib/Makefile.am
> index 4ee364e..3718243 100644
> --- a/src/gallium/targets/libgl-xlib/Makefile.am
> +++ b/src/gallium/targets/libgl-xlib/Makefile.am
> @@ -47,6 +47,7 @@ libGL_la_SOURCES = xlib.c
>  libGL_la_LDFLAGS = \
>   -no-undefined \
>   -version-number $(GL_MAJOR):$(GL_MINOR):$(GL_TINY) \
> + 
> -Wl,--version-script=$(top_srcdir)/src/gallium/targets/libgl-xlib/libgl-xlib.sym
>  \
>   $(GC_SECTIONS) \
>   $(LD_NO_UNDEFINED)
>  
> diff --git a/src/gallium/targets/libgl-xlib/libgl-xlib.sym 
> b/src/gallium/targets/libgl-xlib/libgl-xlib.sym
> new file mode 100644
> index 000..d6cd23d
> --- /dev/null
> +++ b/src/gallium/targets/libgl-xlib/libgl-xlib.sym
> @@ -0,0 +1,6 @@
> +{
> + global:
> + gl*;
> + local:
> + *;
> +};
> 

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Re: [Mesa-dev] [PATCH 1/2] configure: error out of building GBM without dri

2014-05-09 Thread Emil Velikov
ping for this and [PATCH 2/2] docs: Add a note about llvm-shared-libs and
libxatracker

On 05/05/14 22:09, Emil Velikov wrote:
> Both backends require --enable-dri, and building an empty libgbm
> makes little to no sense. Error out at configure to prevent the
> user from shooting themselves in the foot.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78225
> Cc: "10.1 10.2" 
> Signed-off-by: Emil Velikov 
> ---
> 
> Strictly speaking, not crucial for mesa-stable, although it
> will be nice to have. I do not feel too strong either way.
> 
> -Emil
> 
>  configure.ac | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/configure.ac b/configure.ac
> index e77ed77..371c17f 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1179,6 +1179,13 @@ if test "x$enable_gbm" = xyes; then
>  if test "x$enable_shared_glapi" = xno; then
>  AC_MSG_ERROR([gbm_dri requires --enable-shared-glapi])
>  fi
> +else
> +# Strictly speaking libgbm does not require --enable-dri, although
> +# both of its backends do. Thus one can build libgbm without any
> +# backends if --disable-dri is set.
> +# To avoid unnecessary complexity of checking if at least one backend
> +# is available when building, just mandate --enable-dri.
> +AC_MSG_ERROR([gbm requires --enable-dri])
>  fi
>  fi
>  AM_CONDITIONAL(HAVE_GBM, test "x$enable_gbm" = xyes)
> 

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Re: [Mesa-dev] [PATCH] glsl: Rename linker's is_varying_var

2014-05-09 Thread Anuj Phogat
On Thu, May 8, 2014 at 4:28 PM, Chris Forbes  wrote:
>
> Both the ast->IR and linker have functions with this name, but different
> behavior.
>
> Rename the linker's version to var_counts_against_varying_limit to be
> closer to what it is actually used for.
>
> Suggested by Ian a while back.
>
> Signed-off-by: Chris Forbes 
> ---
>
> Note that there's actually a bug lurking in here -- 
> check_against_output_limit won't actually count anything, since it requires 
> var->data.mode == ir_var_shader_out and stage != MESA_SHADER_FRAGMENT.
>
>  src/glsl/link_varyings.cpp | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
> index ac38a2f..71998df 100644
> --- a/src/glsl/link_varyings.cpp
> +++ b/src/glsl/link_varyings.cpp
> @@ -992,7 +992,7 @@ varying_matches::match_comparator(const void *x_generic, 
> const void *y_generic)
>   * varyings, but excludes variables such as gl_FrontFacing and gl_FragCoord.
>   */
>  static bool
> -is_varying_var(gl_shader_stage stage, const ir_variable *var)
> +var_counts_against_varying_limit(gl_shader_stage stage, const ir_variable 
> *var)
>  {
> /* Only fragment shaders will take a varying variable as an input */
> if (stage == MESA_SHADER_FRAGMENT &&
> @@ -1462,7 +1462,7 @@ check_against_output_limit(struct gl_context *ctx,
>ir_variable *const var = ((ir_instruction *) node)->as_variable();
>
>if (var && var->data.mode == ir_var_shader_out &&
> -  is_varying_var(producer->Stage, var)) {
> +  var_counts_against_varying_limit(producer->Stage, var)) {
>   output_vectors += var->type->count_attribute_slots();
>}
> }
> @@ -1501,7 +1501,7 @@ check_against_input_limit(struct gl_context *ctx,
>ir_variable *const var = ((ir_instruction *) node)->as_variable();
>
>if (var && var->data.mode == ir_var_shader_in &&
> -  is_varying_var(consumer->Stage, var)) {
> +  var_counts_against_varying_limit(consumer->Stage, var)) {
>   input_vectors += var->type->count_attribute_slots();
>}
> }
> --
Reviewed-by: Anuj Phogat 

> 1.9.2
>
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Re: [Mesa-dev] [PATCH] ralloc: Omit detailed license information about talloc.

2014-05-09 Thread Jordan Justen
On Fri, May 9, 2014 at 2:55 AM,   wrote:
> From: José Fonseca 
>
> That information misleads source code auditing tools to think that
> ralloc itself is released under LGPL v3.
>
> Instead, simply state talloc is not licensed under a permissive license.
> ---
>  src/glsl/ralloc.h | 7 +++
>  1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/src/glsl/ralloc.h b/src/glsl/ralloc.h
> index 4581a7a..70f7d9c 100644
> --- a/src/glsl/ralloc.h
> +++ b/src/glsl/ralloc.h
> @@ -38,10 +38,9 @@
>   * Tridgell's talloc, but ralloc is an independent implementation
>   * released under the MIT license and tuned for Mesa.
>   *
> - * The talloc implementation is available under the GNU Lesser
> - * General Public License (GNU LGPL), version 3 or later. It is
> - * more sophisticated than ralloc in that it includes reference
> - * counting and debugging features. See: http://talloc.samba.org/
> + * The talloc implementation is not available under a permissive
> + * license. It is more sophisticated than ralloc in that it includes
> + * reference counting and debugging features. See: http://talloc.samba.org/

What about this instead?

"The talloc implementation is available under a different open source
license. It is more sophisticated than ralloc in that it includes
reference counting and debugging features. See: http://talloc.samba.org/";

-Jordan

>   */
>
>  #ifndef RALLOC_H
> --
> 1.9.1
>
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[Mesa-dev] [Bug 78403] query_renderer_implementation_unittest.cpp:144:4: error: expected primary-expression before ‘.’ token

2014-05-09 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=78403

--- Comment #2 from Vinson Lee  ---
Verified attachment 98641 fixes the build error.

Tested-by: Vinson Lee 

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Re: [Mesa-dev] [PATCH 2/2] i965: Stop doing remapping of "special" regs.

2014-05-09 Thread Matt Turner
On Tue, May 6, 2014 at 3:47 PM, Eric Anholt  wrote:
> Now that we aren't using pixel_[xy] in live variables, nothing is looking
> at these regs after the visitor stage.
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 37 
> 
>  1 file changed, 37 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index c550c41..6b1b866 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1740,34 +1740,6 @@ fs_visitor::compact_virtual_grfs()
>}
> }
>
> -   /* In addition to registers used in instructions, fs_visitor keeps
> -* direct references to certain special values which must be patched:
> -*/
> -   struct {
> -  fs_reg *reg;
> -  unsigned count;
> -   } special[] = {
> -  { &frag_depth, 1 },
> -  { &pixel_x, 1 },
> -  { &pixel_y, 1 },
> -  { &pixel_w, 1 },
> -  { &wpos_w, 1 },
> -  { &dual_src_output, 1 },
> -  { outputs, ARRAY_SIZE(outputs) },
> -  { delta_x, ARRAY_SIZE(delta_x) },
> -  { delta_y, ARRAY_SIZE(delta_y) },
> -  { &sample_mask, 1 },
> -  { &shader_start_time, 1 },
> -   };
> -
> -   /* Treat all special values as used, to be conservative */
> -   for (unsigned i = 0; i < ARRAY_SIZE(special); i++) {
> -  for (unsigned j = 0; j < special[i].count; j++) {
> - if (special[i].reg[j].file == GRF)
> -remap_table[special[i].reg[j].reg] = 0;
> -  }
> -   }
> -
> /* Compact the GRF arrays. */
> int new_index = 0;
> for (int i = 0; i < this->virtual_grf_count; i++) {
> @@ -1793,15 +1765,6 @@ fs_visitor::compact_virtual_grfs()
>  inst->src[i].reg = remap_table[inst->src[i].reg];
>}
> }
> -
> -   /* Patch all the references to special values */
> -   for (unsigned i = 0; i < ARRAY_SIZE(special); i++) {
> -  for (unsigned j = 0; j < special[i].count; j++) {
> - fs_reg *reg = &special[i].reg[j];
> - if (reg->file == GRF && remap_table[reg->reg] != -1)
> -reg->reg = remap_table[reg->reg];
> -  }
> -   }
>  }
>
>  /*
> --
> 1.9.2

Series is

Reviewed-by: Matt Turner 
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Re: [Mesa-dev] [PATCH] i965: fix size assert for gen7 in brw_init_compaction_tables()

2014-05-09 Thread Matt Turner
Reviewed-by: Matt Turner 

I'll commit this.
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Re: [Mesa-dev] [PATCH] ralloc: Omit detailed license information about talloc.

2014-05-09 Thread Jose Fonseca


- Original Message -
> On Fri, May 9, 2014 at 2:55 AM,   wrote:
> > From: José Fonseca 
> >
> > That information misleads source code auditing tools to think that
> > ralloc itself is released under LGPL v3.
> >
> > Instead, simply state talloc is not licensed under a permissive license.
> > ---
> >  src/glsl/ralloc.h | 7 +++
> >  1 file changed, 3 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/glsl/ralloc.h b/src/glsl/ralloc.h
> > index 4581a7a..70f7d9c 100644
> > --- a/src/glsl/ralloc.h
> > +++ b/src/glsl/ralloc.h
> > @@ -38,10 +38,9 @@
> >   * Tridgell's talloc, but ralloc is an independent implementation
> >   * released under the MIT license and tuned for Mesa.
> >   *
> > - * The talloc implementation is available under the GNU Lesser
> > - * General Public License (GNU LGPL), version 3 or later. It is
> > - * more sophisticated than ralloc in that it includes reference
> > - * counting and debugging features. See:
> > https://urldefense.proofpoint.com/v1/url?u=http://talloc.samba.org/&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=a97e9dd737954d1433e70ee76d13fdc7c1f433e837da4f3c217138445a70320f
> > + * The talloc implementation is not available under a permissive
> > + * license. It is more sophisticated than ralloc in that it includes
> > + * reference counting and debugging features. See:
> > https://urldefense.proofpoint.com/v1/url?u=http://talloc.samba.org/&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=a97e9dd737954d1433e70ee76d13fdc7c1f433e837da4f3c217138445a70320f
> 
> What about this instead?
> 
> "The talloc implementation is available under a different open source
> license.

I'm not sure in what way it is better.  The reason talloc was inadequate was 
not only because it was in a different license but because it was a copyleft 
(non-permissive) license.  (E.g., LLVM has a different license from Mesa, but 
nobody went out its way to replace it.) 

That said, I don't care either way.  Provided it doesn't have " GNU Lesser 
General Public License" nor "LPGL" it should be fine.   (I also though of 
saying "copyleft" instead of non-permissive, but again, I worry it might cause 
more confusion.)

We could also remove this sentence all together.

Jose


> It is more sophisticated than ralloc in that it includes
> reference counting and debugging features. See:
> https://urldefense.proofpoint.com/v1/url?u=http://talloc.samba.org/&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=a97e9dd737954d1433e70ee76d13fdc7c1f433e837da4f3c217138445a70320f";
> 
> -Jordan
> 
> >   */
> >
> >  #ifndef RALLOC_H
> > --
> > 1.9.1
> >
> > ___
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> > mesa-dev@lists.freedesktop.org
> > https://urldefense.proofpoint.com/v1/url?u=http://lists.freedesktop.org/mailman/listinfo/mesa-dev&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=e68a5b29bd3b5c9d5a4d11685f95f0a1bac85f0e038b397051d0bc8b1aaee2ff
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Re: [Mesa-dev] [PATCH] ralloc: Omit detailed license information about talloc.

2014-05-09 Thread Kenneth Graunke
On 05/09/2014 12:48 PM, Jose Fonseca wrote:
> 
> 
> - Original Message -
>> On Fri, May 9, 2014 at 2:55 AM,   wrote:
>>> From: José Fonseca 
>>>
>>> That information misleads source code auditing tools to think that
>>> ralloc itself is released under LGPL v3.
>>>
>>> Instead, simply state talloc is not licensed under a permissive license.
>>> ---
>>>  src/glsl/ralloc.h | 7 +++
>>>  1 file changed, 3 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/src/glsl/ralloc.h b/src/glsl/ralloc.h
>>> index 4581a7a..70f7d9c 100644
>>> --- a/src/glsl/ralloc.h
>>> +++ b/src/glsl/ralloc.h
>>> @@ -38,10 +38,9 @@
>>>   * Tridgell's talloc, but ralloc is an independent implementation
>>>   * released under the MIT license and tuned for Mesa.
>>>   *
>>> - * The talloc implementation is available under the GNU Lesser
>>> - * General Public License (GNU LGPL), version 3 or later. It is
>>> - * more sophisticated than ralloc in that it includes reference
>>> - * counting and debugging features. See:
>>> https://urldefense.proofpoint.com/v1/url?u=http://talloc.samba.org/&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=a97e9dd737954d1433e70ee76d13fdc7c1f433e837da4f3c217138445a70320f
>>> + * The talloc implementation is not available under a permissive
>>> + * license. It is more sophisticated than ralloc in that it includes
>>> + * reference counting and debugging features. See:
>>> https://urldefense.proofpoint.com/v1/url?u=http://talloc.samba.org/&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=a97e9dd737954d1433e70ee76d13fdc7c1f433e837da4f3c217138445a70320f
>>
>> What about this instead?
>>
>> "The talloc implementation is available under a different open source
>> license.
> 
> I'm not sure in what way it is better.  The reason talloc was
> inadequate was not only because it was in a different license but
> because it was a copyleft (non-permissive) license.  (E.g., LLVM has
> a different license from Mesa, but nobody went out its way to replace
> it.)
> 
> That said, I don't care either way.  Provided it doesn't have " GNU
> Lesser General Public License" nor "LPGL" it should be fine.   (I
> also though of saying "copyleft" instead of non-permissive, but
> again, I worry it might cause more confusion.)
> 
> We could also remove this sentence all together.
> 
> Jose

Actually, I don't think copyleft was the problem.  It was because
various VMware and Intel people were paranoid about LGPLv3, and
vehemently opposed to depending on LGPLv3 code.  I think if it was
LGPLv2, nobody would have cared.  (Personally, I think is unwarranted
paranoia, but what can you do?)  It was just easier to reimplement it,
and put it under the same license as the rest of Mesa.

Independently of that, it did give us an opportunity to make different
performance trade-offs: ralloc_parent(x) is O(1) while talloc_parent(x)
is O(n).  Mesa calls parent() all the time, while Samba doesn't, and
benefits more from a different operation being fast.

I'm fine with either sentence, or simply deleting it.  My original
intent was to encourage people who are OK with LGPLv3 to go use the more
robust code that's already available as a reusable shared library.

Perhaps a mix of the two:

"talloc is more sophisticated than ralloc in that it includes reference
counting and useful debugging features.  However, it is released under
a non-permissive open source license."

Whatever you decide to commit is fine by me.

--Ken



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Re: [Mesa-dev] [PATCH 1/2] i965: Generalize the pixel_x/y workaround for all UW types.

2014-05-09 Thread Kenneth Graunke
On 05/06/2014 03:47 PM, Eric Anholt wrote:
> This is the only case where a fs_reg in brw_fs_visitor is used during
> optimization/code generation, and it meant that optimizations had to be
> careful to not move pixel_x/y's register number without updating it.
> 
> Additionally, it turns out we had a couple of other UW values that weren't
> getting this treatment (like gl_SampleID), so this more general fix is
> probably a good idea (though I wasn't able to replicate problems with
> either pixel_[xy]'s values or gl_SampleID, even when telling the register
> allocator to reuse registers immediately)
> ---
>  src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
> index c7b1f25..7969b67 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
> @@ -86,10 +86,10 @@ fs_live_variables::setup_one_read(bblock_t *block, 
> fs_inst *inst,
>  */
> int end_ip = ip;
> if (v->dispatch_width == 16 && (reg.stride == 0 ||
> -   ((v->pixel_x.file == GRF &&
> - v->pixel_x.reg == reg.reg) ||
> -(v->pixel_y.file == GRF &&
> - v->pixel_y.reg == reg.reg {
> +   reg.type == BRW_REGISTER_TYPE_UW ||
> +   reg.type == BRW_REGISTER_TYPE_W ||
> +   reg.type == BRW_REGISTER_TYPE_UB ||
> +   reg.type == BRW_REGISTER_TYPE_B)) {
>end_ip++;
> }
>  
> 

I like this much better.  Series is:
Reviewed-by: Kenneth Graunke 



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Re: [Mesa-dev] [PATCH 2/2] i965: Stop doing remapping of "special" regs.

2014-05-09 Thread Kenneth Graunke
On 05/06/2014 03:47 PM, Eric Anholt wrote:
> Now that we aren't using pixel_[xy] in live variables, nothing is looking
> at these regs after the visitor stage.
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 37 
> 
>  1 file changed, 37 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index c550c41..6b1b866 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1740,34 +1740,6 @@ fs_visitor::compact_virtual_grfs()
>}
> }
>  
> -   /* In addition to registers used in instructions, fs_visitor keeps
> -* direct references to certain special values which must be patched:
> -*/
> -   struct {
> -  fs_reg *reg;
> -  unsigned count;
> -   } special[] = {
> -  { &frag_depth, 1 },
> -  { &pixel_x, 1 },
> -  { &pixel_y, 1 },
> -  { &pixel_w, 1 },
> -  { &wpos_w, 1 },
> -  { &dual_src_output, 1 },
> -  { outputs, ARRAY_SIZE(outputs) },
> -  { delta_x, ARRAY_SIZE(delta_x) },
> -  { delta_y, ARRAY_SIZE(delta_y) },
> -  { &sample_mask, 1 },
> -  { &shader_start_time, 1 },
> -   };
> -
> -   /* Treat all special values as used, to be conservative */
> -   for (unsigned i = 0; i < ARRAY_SIZE(special); i++) {
> -  for (unsigned j = 0; j < special[i].count; j++) {
> - if (special[i].reg[j].file == GRF)
> -remap_table[special[i].reg[j].reg] = 0;
> -  }
> -   }
> -
> /* Compact the GRF arrays. */
> int new_index = 0;
> for (int i = 0; i < this->virtual_grf_count; i++) {
> @@ -1793,15 +1765,6 @@ fs_visitor::compact_virtual_grfs()
>  inst->src[i].reg = remap_table[inst->src[i].reg];
>}
> }
> -
> -   /* Patch all the references to special values */
> -   for (unsigned i = 0; i < ARRAY_SIZE(special); i++) {
> -  for (unsigned j = 0; j < special[i].count; j++) {
> - fs_reg *reg = &special[i].reg[j];
> - if (reg->file == GRF && remap_table[reg->reg] != -1)
> -reg->reg = remap_table[reg->reg];
> -  }
> -   }
>  }
>  
>  /*
> 

Although I gave this patch a Reviewed-by, I am somewhat uncomfortable
with the idea that fs_visitor now has references to fs_regs which are
total lies once optimization happens.  (Then again, they're probably
broken in other ways anyway...)

Perhaps we can eventually break up the giant fs_visitor class, so those
fs_regs are only available during the initial code generation.  I may
take a look at that when I do some other refactoring.



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Re: [Mesa-dev] [PATCH] ralloc: Omit detailed license information about talloc.

2014-05-09 Thread Jose Fonseca


- Original Message -
> On 05/09/2014 12:48 PM, Jose Fonseca wrote:
> > 
> > 
> > - Original Message -
> >> On Fri, May 9, 2014 at 2:55 AM,   wrote:
> >>> From: José Fonseca 
> >>>
> >>> That information misleads source code auditing tools to think that
> >>> ralloc itself is released under LGPL v3.
> >>>
> >>> Instead, simply state talloc is not licensed under a permissive license.
> >>> ---
> >>>  src/glsl/ralloc.h | 7 +++
> >>>  1 file changed, 3 insertions(+), 4 deletions(-)
> >>>
> >>> diff --git a/src/glsl/ralloc.h b/src/glsl/ralloc.h
> >>> index 4581a7a..70f7d9c 100644
> >>> --- a/src/glsl/ralloc.h
> >>> +++ b/src/glsl/ralloc.h
> >>> @@ -38,10 +38,9 @@
> >>>   * Tridgell's talloc, but ralloc is an independent implementation
> >>>   * released under the MIT license and tuned for Mesa.
> >>>   *
> >>> - * The talloc implementation is available under the GNU Lesser
> >>> - * General Public License (GNU LGPL), version 3 or later. It is
> >>> - * more sophisticated than ralloc in that it includes reference
> >>> - * counting and debugging features. See:
> >>> https://urldefense.proofpoint.com/v1/url?u=http://talloc.samba.org/&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=a97e9dd737954d1433e70ee76d13fdc7c1f433e837da4f3c217138445a70320f
> >>> + * The talloc implementation is not available under a permissive
> >>> + * license. It is more sophisticated than ralloc in that it includes
> >>> + * reference counting and debugging features. See:
> >>> https://urldefense.proofpoint.com/v1/url?u=http://talloc.samba.org/&k=oIvRg1%2BdGAgOoM1BIlLLqw%3D%3D%0A&r=NMr9uy2iTjWVixC0wOcYCWEIYhfo80qKwRgdodpoDzA%3D%0A&m=W9QOIrhCEXJz3yIQbKcCXWeb39YRUJRWizIYkimspSE%3D%0A&s=a97e9dd737954d1433e70ee76d13fdc7c1f433e837da4f3c217138445a70320f
> >>
> >> What about this instead?
> >>
> >> "The talloc implementation is available under a different open source
> >> license.
> > 
> > I'm not sure in what way it is better.  The reason talloc was
> > inadequate was not only because it was in a different license but
> > because it was a copyleft (non-permissive) license.  (E.g., LLVM has
> > a different license from Mesa, but nobody went out its way to replace
> > it.)
> > 
> > That said, I don't care either way.  Provided it doesn't have " GNU
> > Lesser General Public License" nor "LPGL" it should be fine.   (I
> > also though of saying "copyleft" instead of non-permissive, but
> > again, I worry it might cause more confusion.)
> > 
> > We could also remove this sentence all together.
> > 
> > Jose
> 
> Actually, I don't think copyleft was the problem.  It was because
> various VMware and Intel people were paranoid about LGPLv3, and
> vehemently opposed to depending on LGPLv3 code.  I think if it was
> LGPLv2, nobody would have cared.  (Personally, I think is unwarranted
> paranoia, but what can you do?)  It was just easier to reimplement it,
> and put it under the same license as the rest of Mesa.

At least from VMware POV, even LGPLv2 compliance terms are too onerous.  The 
ability to statically link proprietary code makes things much easier for us. 
Dynamically linking is not technically/legally impossible, but a huge hassle in 
terms of installing, driver signing, etc.

> Independently of that, it did give us an opportunity to make different
> performance trade-offs: ralloc_parent(x) is O(1) while talloc_parent(x)
> is O(n).  Mesa calls parent() all the time, while Samba doesn't, and
> benefits more from a different operation being fast.
> 
> I'm fine with either sentence, or simply deleting it.  My original
> intent was to encourage people who are OK with LGPLv3 to go use the more
> robust code that's already available as a reusable shared library.
> 
> Perhaps a mix of the two:
> 
> "talloc is more sophisticated than ralloc in that it includes reference
> counting and useful debugging features.  However, it is released under
> a non-permissive open source license."
> 
> Whatever you decide to commit is fine by me.

You're the author so I'm going with your suggestion.

Jose
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Re: [Mesa-dev] [PATCH 1/2] configure: error out of building GBM without dri

2014-05-09 Thread Kenneth Graunke
On 05/05/2014 02:09 PM, Emil Velikov wrote:
> Both backends require --enable-dri, and building an empty libgbm
> makes little to no sense. Error out at configure to prevent the
> user from shooting themselves in the foot.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78225
> Cc: "10.1 10.2" 
> Signed-off-by: Emil Velikov 
> ---
> 
> Strictly speaking, not crucial for mesa-stable, although it
> will be nice to have. I do not feel too strong either way.
> 
> -Emil
> 
>  configure.ac | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/configure.ac b/configure.ac
> index e77ed77..371c17f 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1179,6 +1179,13 @@ if test "x$enable_gbm" = xyes; then
>  if test "x$enable_shared_glapi" = xno; then
>  AC_MSG_ERROR([gbm_dri requires --enable-shared-glapi])
>  fi
> +else
> +# Strictly speaking libgbm does not require --enable-dri, although
> +# both of its backends do. Thus one can build libgbm without any
> +# backends if --disable-dri is set.
> +# To avoid unnecessary complexity of checking if at least one backend
> +# is available when building, just mandate --enable-dri.
> +AC_MSG_ERROR([gbm requires --enable-dri])
>  fi
>  fi
>  AM_CONDITIONAL(HAVE_GBM, test "x$enable_gbm" = xyes)
> 

Sounds good to me - thanks Emil!

Reviewed-by: Kenneth Graunke 

(I didn't look at patch 2, since I know approximately 0 about the
Gallium llvm and xatracker stuff.)



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Re: [Mesa-dev] [PATCH 13/13] i965/fb: Use meta path for stencil blits

2014-05-09 Thread Kenneth Graunke
On 05/09/2014 01:28 AM, Topi Pohjolainen wrote:
> This is effective only on gen8 for now as previous generations still
> go through blorp.
> 
> Signed-off-by: Topi Pohjolainen 
> ---
>  src/mesa/drivers/dri/i965/intel_fbo.c | 9 +
>  1 file changed, 9 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c 
> b/src/mesa/drivers/dri/i965/intel_fbo.c
> index 2d68de8..58b7043 100644
> --- a/src/mesa/drivers/dri/i965/intel_fbo.c
> +++ b/src/mesa/drivers/dri/i965/intel_fbo.c
> @@ -879,6 +879,15 @@ intel_blit_framebuffer(struct gl_context *ctx,
> if (mask == 0x0)
>return;
>  
> +   if (mask & GL_STENCIL_BUFFER_BIT) {
> +  brw_meta_fbo_stencil_blit(brw_context(ctx),
> +srcX0, srcY0, srcX1, srcY1,
> +dstX0, dstY0, dstX1, dstY1);
> +  mask &= ~GL_STENCIL_BUFFER_BIT;
> +  if (mask == 0x0)
> + return;
> +   }
> +
> /* Try using the BLT engine. */
> mask = intel_blit_framebuffer_with_blitter(ctx,
>srcX0, srcY0, srcX1, srcY1,
> 

Hi Topi,

You'll also want to hook this up into intel_miptree_updownsample somehow
- there's still a class of tests (such as "copy-pixels -samples=4
-auto") that hit the blorp path and assert.

Could you send a patch to do that as well?

Thanks a ton!
--Ken



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Re: [Mesa-dev] [PATCH 01/13] i965: Allow stencil to be used for sampling and as render target

2014-05-09 Thread Kenneth Graunke
On 05/09/2014 01:28 AM, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen 
> ---
>  src/mesa/drivers/dri/i965/brw_surface_formats.c | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
> b/src/mesa/drivers/dri/i965/brw_surface_formats.c
> index 5907dd9..7ffa5c4 100644
> --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
> +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
> @@ -221,7 +221,7 @@ const struct surface_format_info surface_formats[] = {
> SF( Y,  Y,  x, 45,  Y,  Y,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UNORM)
> SF( Y,  Y,  x,  x,  Y, 60,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SNORM)
> SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SINT)
> -   SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)
> +   SF(60,  x,  x,  x, 60,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)

This hunk seems wrong to me.  From the G45 PRM, Volume 4, page 133:

| Y |   |   |   | Y |   | Y |   |   | R8_UINT

So, AFAICT, this has been supported since the original Broadwater/G965.

> SF( Y,  Y,  x,  Y,  Y,  Y,  x,  x,  x, BRW_SURFACEFORMAT_A8_UNORM)
> SF( Y,  Y,  x,  x,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_I8_UNORM)
> SF( Y,  Y,  x,  Y,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_L8_UNORM)
> @@ -594,9 +594,12 @@ brw_init_surface_formats(struct brw_context *brw)
> * integer, so we don't need hardware support for blending on it.  
> Other
> * than that, GL in general requires alpha blending for render targets,
> * even though we don't support it for some formats.
> +   * Stencil is also supported as render targer for internal blitting and

render target (typo)

> +   * scaling purposes.
> */
>if (gen >= rinfo->render_target &&
> -   (gen >= rinfo->alpha_blend || is_integer)) {
> +   (gen >= rinfo->alpha_blend || is_integer ||
> +   format == MESA_FORMAT_S_UINT8)) {
>brw->render_target_format[format] = render;
>brw->format_supported_as_render_target[format] = true;
>}

I noticed there is already code that does:

   brw->format_supported_as_render_target[MESA_FORMAT_S_UINT8] = true;

Your patch additionally causes:

   brw->render_target_format[MESA_FORMAT_S_UINT8] =
BRW_SURFACEFORMAT_R8_UINT;

which seems reasonable.  However, I don't think any of your patches
actually rely on this fact, since you override the format in
brw_configure_w_tiled.  So, perhaps this patch can be dropped?



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Re: [Mesa-dev] Meta path for gen8 stencil

2014-05-09 Thread Kenneth Graunke
On 05/09/2014 01:28 AM, Topi Pohjolainen wrote:
> I have the corresponding bits also for gen6-7, but there is a little
> work left in that front. Passes all the relevant piglit tests on bdw.
> 
> Topi Pohjolainen (13):
>   i965: Allow stencil to be used for sampling and as render target
>   i965/wm: Surface state overrides for configuring w-tiled as y-tiled
>   i965/gen8: Use helper variables for surface parameters
>   i965/gen8: Allow stencil buffers to be configured as single sampled
>   i965/gen8: Surface state overriding for stencil
>   i965: Extend brw_get_rb_for_first_slice() for specified level/layer
>   i965/blorp: Expose coordinate scissoring and mirroring
>   meta: Merge compiling and linking of blit program
>   meta: Refactor binding of renderbuffer as texture image
>   meta: Refactor configuration of renderbuffer sampling
>   meta: Refactor state save/restore for framebuffer texture blits
>   i965/meta: Stencil blits
>   i965/fb: Use meta path for stencil blits
> 
>  src/mesa/drivers/common/meta.c|  45 +-
>  src/mesa/drivers/common/meta.h|  34 ++
>  src/mesa/drivers/common/meta_blit.c   | 175 
>  src/mesa/drivers/dri/i965/Makefile.sources|   2 +
>  src/mesa/drivers/dri/i965/brw_blorp_blit.cpp  | 124 +-
>  src/mesa/drivers/dri/i965/brw_context.h   |  10 +
>  src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 506 
> ++
>  src/mesa/drivers/dri/i965/brw_meta_updownsample.c |  13 +-
>  src/mesa/drivers/dri/i965/brw_meta_util.c | 160 +++
>  src/mesa/drivers/dri/i965/brw_meta_util.h |  46 ++
>  src/mesa/drivers/dri/i965/brw_state.h |   6 +
>  src/mesa/drivers/dri/i965/brw_surface_formats.c   |   7 +-
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |  22 +
>  src/mesa/drivers/dri/i965/gen8_surface_state.c|  36 +-
>  src/mesa/drivers/dri/i965/intel_fbo.c |   9 +
>  15 files changed, 969 insertions(+), 226 deletions(-)
>  create mode 100644 src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c
>  create mode 100644 src/mesa/drivers/dri/i965/brw_meta_util.c
>  create mode 100644 src/mesa/drivers/dri/i965/brw_meta_util.h

Patches 2-10 are:
Reviewed-by: Kenneth Graunke 

Also, please add:
Cc: "10.2" 



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Re: [Mesa-dev] [PATCH] glsl: Do not call lhs->variable_referenced() multiple times

2014-05-09 Thread Kenneth Graunke
On 05/08/2014 11:50 PM, Iago Toral Quiroga wrote:
> Instead take the result from the first call and use it where needed.
> ---
>  src/glsl/ast_to_hir.cpp | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index 7516c33..0128b3f 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
> @@ -792,25 +792,24 @@ do_assignment(exec_list *instructions, struct 
> _mesa_glsl_parse_state *state,
> ir_variable *lhs_var = lhs->variable_referenced();
> if (lhs_var)
>lhs_var->data.assigned = true;
>  
> if (!error_emitted) {
>if (non_lvalue_description != NULL) {
>   _mesa_glsl_error(&lhs_loc, state,
>"assignment to %s",
>non_lvalue_description);
>   error_emitted = true;
> -  } else if (lhs->variable_referenced() != NULL
> - && lhs->variable_referenced()->data.read_only) {
> +  } else if (lhs_var != NULL && lhs_var->data.read_only) {
>   _mesa_glsl_error(&lhs_loc, state,
>"assignment to read-only variable '%s'",
> -  lhs->variable_referenced()->name);
> +  lhs_var->name);
>   error_emitted = true;
>} else if (lhs->type->is_array() &&
>   !state->check_version(120, 300, &lhs_loc,
> "whole array assignment forbidden")) {
>   /* From page 32 (page 38 of the PDF) of the GLSL 1.10 spec:
>*
>*"Other binary or unary expressions, non-dereferenced
>* arrays, function names, swizzles with repeated fields,
>* and constants cannot be l-values."
>*
> 

Reviewed-by: Kenneth Graunke 

By the way, if you'd like to apply for push access, the procedure is
documented here:

http://www.freedesktop.org/wiki/AccountRequests/



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Re: [Mesa-dev] [PATCH 1/2] configure: error out of building GBM without dri

2014-05-09 Thread Emil Velikov
On 09/05/14 23:14, Kenneth Graunke wrote:
> On 05/05/2014 02:09 PM, Emil Velikov wrote:
>> Both backends require --enable-dri, and building an empty libgbm
>> makes little to no sense. Error out at configure to prevent the
>> user from shooting themselves in the foot.
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78225
>> Cc: "10.1 10.2" 
>> Signed-off-by: Emil Velikov 
>> ---
>>
>> Strictly speaking, not crucial for mesa-stable, although it
>> will be nice to have. I do not feel too strong either way.
>>
>> -Emil
>>
>>  configure.ac | 7 +++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/configure.ac b/configure.ac
>> index e77ed77..371c17f 100644
>> --- a/configure.ac
>> +++ b/configure.ac
>> @@ -1179,6 +1179,13 @@ if test "x$enable_gbm" = xyes; then
>>  if test "x$enable_shared_glapi" = xno; then
>>  AC_MSG_ERROR([gbm_dri requires --enable-shared-glapi])
>>  fi
>> +else
>> +# Strictly speaking libgbm does not require --enable-dri, although
>> +# both of its backends do. Thus one can build libgbm without any
>> +# backends if --disable-dri is set.
>> +# To avoid unnecessary complexity of checking if at least one 
>> backend
>> +# is available when building, just mandate --enable-dri.
>> +AC_MSG_ERROR([gbm requires --enable-dri])
>>  fi
>>  fi
>>  AM_CONDITIONAL(HAVE_GBM, test "x$enable_gbm" = xyes)
>>
> 
> Sounds good to me - thanks Emil!
> 
> Reviewed-by: Kenneth Graunke 
> 
> (I didn't look at patch 2, since I know approximately 0 about the
> Gallium llvm and xatracker stuff.)
> 
In case you're interested here is a five line summary (wrt final libraries):

XA recently got the ability (via gallium/aux module) to load individual pipe
drivers and their respective winsys, with the latter two built into a shared
library worth ~5MiB (for each driver). Roughly speaking one can relate them to
libGL and *_dri.so + unstable interface. LLVM is used all over the place. When
static linked, our libraries inherit all of its exported symbols - fun.

Thanks for sticking until the end :)
Emil

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[Mesa-dev] [Bug 78225] Compile error due to undefined reference to `gbm_dri_backend', fix attached

2014-05-09 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=78225

Emil Velikov  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #2 from Emil Velikov  ---
As mentioned previously, building gbm without dri i.e. without any backends
serves little benefit. With the following commit we'll avoid that error-ing at
configure time.

commit e477d12c3396ded1607b6f57c15e100ca08f44f5
Author: Emil Velikov 
Date:   Mon May 5 22:09:22 2014 +0100

configure: error out if building GBM without dri

Both backends require --enable-dri, and building an empty libgbm
makes little to no sense. Error out at configure to prevent the
user from shooting themselves in the foot.

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[Mesa-dev] [Bug 78403] query_renderer_implementation_unittest.cpp:144:4: error: expected primary-expression before ‘.’ token

2014-05-09 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=78403

Emil Velikov  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #3 from Emil Velikov  ---
Pushed to master

commit 326b8e253e5ee2e09e54ad46d8370a6e8c8d46da
Author: Emil Velikov 
Date:   Wed May 7 22:30:43 2014 +0100

glx/tests: Partially revert commit 51e3569573a7b3f8da0df093836761003fcdc414

C++ does not support designated initializers, thus compilation
is not guaranteed to succeed. Surprisingly gcc 4.6.3 fails to
build the code, while version 4.9.0 compiles it without a hitch.

Cc: "10.2" 

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[Mesa-dev] [PATCH] configure.ac: Remove -fstack-protector-strong from LLVM flags.

2014-05-09 Thread Vinson Lee
-fstack-protector-strong is not supported by clang.

This patch fixes this build error on Fedora 20 with clang.

  CXX  gallivm/lp_bld_debug.lo
clang: error: unknown argument: '-fstack-protector-strong'

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75010
Signed-off-by: Vinson Lee 
---
 configure.ac | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index c68db00..7649091 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1571,7 +1571,8 @@ strip_unwanted_llvm_flags() {
-e 's/-fno-exceptions\>//g' \
-e 's/-fomit-frame-pointer\>//g' \
-e 's/-fvisibility-inlines-hidden\>//g' \
-   -e 's/-fPIC\>//g'
+   -e 's/-fPIC\>//g' \
+   -e 's/-fstack-protector-strong\>//g'
 }
 
 
-- 
1.9.0

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Re: [Mesa-dev] [PATCH] configure.ac: Remove -fstack-protector-strong from LLVM flags.

2014-05-09 Thread Emil Velikov
On 10/05/14 02:28, Vinson Lee wrote:
> -fstack-protector-strong is not supported by clang.
> 
> This patch fixes this build error on Fedora 20 with clang.
> 
>   CXX  gallivm/lp_bld_debug.lo
> clang: error: unknown argument: '-fstack-protector-strong'
> 
fwiw clang gained support for stack-protector-strong in february this year.
guessing that it should land with version 3.5.

-Emil

> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75010
> Signed-off-by: Vinson Lee 
> ---
>  configure.ac | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/configure.ac b/configure.ac
> index c68db00..7649091 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -1571,7 +1571,8 @@ strip_unwanted_llvm_flags() {
>   -e 's/-fno-exceptions\>//g' \
>   -e 's/-fomit-frame-pointer\>//g' \
>   -e 's/-fvisibility-inlines-hidden\>//g' \
> - -e 's/-fPIC\>//g'
> + -e 's/-fPIC\>//g' \
> + -e 's/-fstack-protector-strong\>//g'
>  }
>  
>  
> 

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Re: [Mesa-dev] Mesa (10.2): i965: Always intel_prepare_render() after invalidating front buffers.

2014-05-09 Thread Ian Romanick
I just noticed that this commit breaks piglit's read-front on both
master and, sadly, 10.2.  I'm going to revert it from 10.2 so that I can
release RC2 without regressions. :(

On 05/07/2014 09:51 AM, Ian Romanick wrote:
> Module: Mesa
> Branch: 10.2
> Commit: a1dd1e62fa911a593cca354349e43149bd5f6e45
> URL:
> http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1dd1e62fa911a593cca354349e43149bd5f6e45
> 
> Author: Kenneth Graunke 
> Date:   Mon May  5 11:02:18 2014 -0700
> 
> i965: Always intel_prepare_render() after invalidating front buffers.
> 
> Fixes glean/texture_srgb, which hit recursive-flush prevention
> assertions in vbo_exec_FlushVertices.

Is there anything extra that needs to be done to trigger this assertion?
 I've never hit it.

> This probably hurts the performance of front buffer rendering, but
> very few people in their right mind do front buffer rendering.
> 
> Fixes Glean's texture_srgb test.
> 
> Cc: "10.2" 
> Signed-off-by: Kenneth Graunke 
> Acked-by: Anuj Phogat 
> Reviewed-by: Eric Anholt 
> (cherry picked from commit cde8bad1c9363ee293ae7844bcecb6179426ea65)
> 
> ---
> 
>  src/mesa/drivers/dri/i965/intel_buffers.c |2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/intel_buffers.c 
> b/src/mesa/drivers/dri/i965/intel_buffers.c
> index f151287..6ad67f1 100644
> --- a/src/mesa/drivers/dri/i965/intel_buffers.c
> +++ b/src/mesa/drivers/dri/i965/intel_buffers.c
> @@ -65,6 +65,7 @@ intelDrawBuffer(struct gl_context * ctx, GLenum mode)
> * (including the fake front) before we start rendering again.
> */
>dri2InvalidateDrawable(brw->driContext->driDrawablePriv);
> +  intel_prepare_render(brw);
> }
>  }
>  
> @@ -80,6 +81,7 @@ intelReadBuffer(struct gl_context * ctx, GLenum mode)
> * (including the fake front) before we start reading again.
> */
>dri2InvalidateDrawable(brw->driContext->driReadablePriv);
> +  intel_prepare_render(brw);
> }
>  }
>  
> 
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> http://lists.freedesktop.org/mailman/listinfo/mesa-commit
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[Mesa-dev] [PATCH 2/3] gallium/egl: st_profiles are build time decision, treat them as such

2014-05-09 Thread Emil Velikov
The profiles are present depending on the defines at build time.
Drop the extra functions and feed the defines directly into the
state-tracker at build time.

Cc: Chia-I Wu 
Signed-off-by: Emil Velikov 
---
 src/gallium/state_trackers/egl/Android.mk  |  5 +++-
 src/gallium/state_trackers/egl/SConscript  | 12 +
 src/gallium/state_trackers/egl/common/egl_g3d.c| 20 +--
 .../state_trackers/egl/common/egl_g3d_loader.h |  1 -
 src/gallium/targets/egl-static/Android.mk  |  2 --
 src/gallium/targets/egl-static/SConscript  |  6 -
 src/gallium/targets/egl-static/egl.c   |  3 ---
 src/gallium/targets/egl-static/egl_st.c| 29 --
 src/gallium/targets/egl-static/egl_st.h|  3 ---
 9 files changed, 28 insertions(+), 53 deletions(-)

diff --git a/src/gallium/state_trackers/egl/Android.mk 
b/src/gallium/state_trackers/egl/Android.mk
index b27e14b..7c4c936 100644
--- a/src/gallium/state_trackers/egl/Android.mk
+++ b/src/gallium/state_trackers/egl/Android.mk
@@ -32,7 +32,10 @@ LOCAL_SRC_FILES := \
$(common_FILES) \
$(android_FILES)
 
-LOCAL_CFLAGS := -DHAVE_ANDROID_BACKEND
+LOCAL_CFLAGS := \
+   -DFEATURE_ES1=1 \
+   -DFEATURE_ES2=1 \
+   -DHAVE_ANDROID_BACKEND
 
 LOCAL_C_INCLUDES := \
$(GALLIUM_TOP)/state_trackers/egl \
diff --git a/src/gallium/state_trackers/egl/SConscript 
b/src/gallium/state_trackers/egl/SConscript
index 3ddf0bc..3727fb2 100644
--- a/src/gallium/state_trackers/egl/SConscript
+++ b/src/gallium/state_trackers/egl/SConscript
@@ -14,6 +14,18 @@ env.Append(CPPPATH = [
 
 sources = env.ParseSourceList('Makefile.sources', 'common_FILES')
 
+# OpenGL ES and OpenGL
+if env['gles']:
+env.Append(CPPDEFINES = [
+'FEATURE_GL=1',
+'FEATURE_ES1=1',
+'FEATURE_ES2=1'
+])
+
+# OpenVG
+if True:
+env.Append(CPPDEFINES = ['FEATURE_VG=1'])
+
 if env['platform'] == 'windows':
 env.Append(CPPDEFINES = ['HAVE_GDI_BACKEND'])
 sources.append(env.ParseSourceList('Makefile.sources', 'gdi_FILES'))
diff --git a/src/gallium/state_trackers/egl/common/egl_g3d.c 
b/src/gallium/state_trackers/egl/common/egl_g3d.c
index 7cc4e8f..d3f5e92 100644
--- a/src/gallium/state_trackers/egl/common/egl_g3d.c
+++ b/src/gallium/state_trackers/egl/common/egl_g3d.c
@@ -548,14 +548,18 @@ egl_g3d_initialize(_EGLDriver *drv, _EGLDisplay *dpy)
   goto fail;
}
 
-   if (gdpy->loader->profile_masks[ST_API_OPENGL] & ST_PROFILE_DEFAULT_MASK)
-  dpy->ClientAPIs |= EGL_OPENGL_BIT;
-   if (gdpy->loader->profile_masks[ST_API_OPENGL] & ST_PROFILE_OPENGL_ES1_MASK)
-  dpy->ClientAPIs |= EGL_OPENGL_ES_BIT;
-   if (gdpy->loader->profile_masks[ST_API_OPENGL] & ST_PROFILE_OPENGL_ES2_MASK)
-  dpy->ClientAPIs |= EGL_OPENGL_ES2_BIT;
-   if (gdpy->loader->profile_masks[ST_API_OPENVG] & ST_PROFILE_DEFAULT_MASK)
-  dpy->ClientAPIs |= EGL_OPENVG_BIT;
+#if FEATURE_GL
+   dpy->ClientAPIs |= EGL_OPENGL_BIT;
+#endif
+#if FEATURE_ES1
+   dpy->ClientAPIs |= EGL_OPENGL_ES_BIT;
+#endif
+#if FEATURE_ES2
+   dpy->ClientAPIs |= EGL_OPENGL_ES2_BIT;
+#endif
+#if FEATURE_VG
+   dpy->ClientAPIs |= EGL_OPENVG_BIT;
+#endif
 
gdpy->smapi = egl_g3d_create_st_manager(dpy);
if (!gdpy->smapi) {
diff --git a/src/gallium/state_trackers/egl/common/egl_g3d_loader.h 
b/src/gallium/state_trackers/egl/common/egl_g3d_loader.h
index 51b4d19..03db153 100644
--- a/src/gallium/state_trackers/egl/common/egl_g3d_loader.h
+++ b/src/gallium/state_trackers/egl/common/egl_g3d_loader.h
@@ -36,7 +36,6 @@ struct pipe_screen;
 struct sw_winsys;
 
 struct egl_g3d_loader {
-   uint profile_masks[ST_API_COUNT];
struct st_api *(*get_st_api)(enum st_api_type api);
 
struct pipe_screen *(*create_drm_screen)(const char *name, int fd);
diff --git a/src/gallium/targets/egl-static/Android.mk 
b/src/gallium/targets/egl-static/Android.mk
index 37244b5..01408a7 100644
--- a/src/gallium/targets/egl-static/Android.mk
+++ b/src/gallium/targets/egl-static/Android.mk
@@ -31,8 +31,6 @@ LOCAL_SRC_FILES := \
egl_st.c
 
 LOCAL_CFLAGS := \
-   -DFEATURE_ES1=1 \
-   -DFEATURE_ES2=1 \
-D_EGL_MAIN=_eglBuiltInDriverGALLIUM
 
 LOCAL_C_INCLUDES := \
diff --git a/src/gallium/targets/egl-static/SConscript 
b/src/gallium/targets/egl-static/SConscript
index 83937fe..f879cc3 100644
--- a/src/gallium/targets/egl-static/SConscript
+++ b/src/gallium/targets/egl-static/SConscript
@@ -63,11 +63,6 @@ if env['platform'] == 'windows':
 
 # OpenGL ES and OpenGL
 if env['gles']:
-env.Append(CPPDEFINES = [
-'FEATURE_GL=1',
-'FEATURE_ES1=1',
-'FEATURE_ES2=1'
-])
 env.Prepend(LIBPATH = [shared_glapi.dir])
 # manually add LIBPREFIX on windows
 glapi_name = 'glapi' if env['platform'] != 'windows' else 'libglapi'
@@ -75,7 +70,6 @@ if env['gles']:
 
 # OpenVG
 if True:
-env.Append(CPPDEFINES = ['FEATURE_VG=1'])
 env.Prepend(LIBPATH = [openvg.dir])
 # manually add

[Mesa-dev] [PATCH 1/3] dri_util: set implemented version of the DRI_CORE extension

2014-05-09 Thread Emil Velikov
... rather than the one defined in our internal interface (dri_interface.h)

Signed-off-by: Emil Velikov 
---
 src/mesa/drivers/dri/common/dri_util.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/common/dri_util.c 
b/src/mesa/drivers/dri/common/dri_util.c
index 248c361..ce8b0ed 100644
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -732,7 +732,7 @@ driSwapBuffers(__DRIdrawable *pdp)
 
 /** Core interface */
 const __DRIcoreExtension driCoreExtension = {
-.base = { __DRI_CORE, __DRI_CORE_VERSION },
+.base = { __DRI_CORE, 1 },
 
 .createNewScreen= NULL,
 .destroyScreen  = driDestroyScreen,
-- 
1.9.2

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[Mesa-dev] [PATCH 3/3] glx: do not leak dri3Display

2014-05-09 Thread Emil Velikov
Cc: "10.1 10.2" 
Cc: Keith Packard 
Signed-off-by: Emil Velikov 
---
 src/glx/glxext.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/glx/glxext.c b/src/glx/glxext.c
index 2931790..a7be2d9 100644
--- a/src/glx/glxext.c
+++ b/src/glx/glxext.c
@@ -249,6 +249,12 @@ glx_display_free(struct glx_display *priv)
if (priv->dri2Display)
   (*priv->dri2Display->destroyDisplay) (priv->dri2Display);
priv->dri2Display = NULL;
+
+#if defined(HAVE_DRI3)
+   if (priv->dri3Display)
+  (*priv->dri3Display->destroyDisplay) (priv->dri3Display);
+   priv->dri3Display = NULL;
+#endif
 #endif
 
free((char *) priv);
-- 
1.9.2

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[Mesa-dev] [PATCH] nv50: fix setting of texture ms info to be per-stage

2014-05-09 Thread Ilia Mirkin
Different textures may be bound to each slot for each stage. So we need
to be able to upload ms parameters for each one without stages
overwriting each other.

Signed-off-by: Ilia Mirkin 
Cc: "10.1 10.2" 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp |  4 
 src/gallium/drivers/nouveau/nv50/nv50_context.h   | 10 +-
 src/gallium/drivers/nouveau/nv50/nv50_tex.c   |  2 +-
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index eafc0a7..63db1d7 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -591,6 +591,10 @@ void NV50LoweringPreSSA::loadTexMsInfo(uint32_t off, Value 
**ms,
Value *tmp = new_LValue(func, FILE_GPR);
uint8_t b = prog->driver->io.resInfoCBSlot;
off += prog->driver->io.suInfoBase;
+   if (prog->getType() > Program::TYPE_VERTEX)
+  off += 16 * 2 * 4;
+   if (prog->getType() > Program::TYPE_GEOMETRY)
+  off += 16 * 2 * 4;
*ms_x = bld.mkLoadv(TYPE_U32, bld.mkSymbol(
  FILE_MEMORY_CONST, b, TYPE_U32, off + 0), NULL);
*ms_y = bld.mkLoadv(TYPE_U32, bld.mkSymbol(
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.h 
b/src/gallium/drivers/nouveau/nv50/nv50_context.h
index b776dee..3b7cb18 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.h
@@ -78,16 +78,16 @@
 /* 8 user clip planes, at 4 32-bit floats each */
 #define NV50_CB_AUX_UCP_OFFSET0x
 #define NV50_CB_AUX_UCP_SIZE  (8 * 4 * 4)
-/* 256 textures, each with ms_x, ms_y u32 pairs */
+/* 16 textures * 3 shaders, each with ms_x, ms_y u32 pairs */
 #define NV50_CB_AUX_TEX_MS_OFFSET 0x0080
-#define NV50_CB_AUX_TEX_MS_SIZE   (256 * 2 * 4)
+#define NV50_CB_AUX_TEX_MS_SIZE   (16 * 3 * 2 * 4)
 /* For each MS level (4), 8 sets of 32-bit integer pairs sample offsets */
-#define NV50_CB_AUX_MS_OFFSET 0x880
+#define NV50_CB_AUX_MS_OFFSET 0x200
 #define NV50_CB_AUX_MS_SIZE   (4 * 8 * 4 * 2)
 /* Sample position pairs for the current output MS level */
-#define NV50_CB_AUX_SAMPLE_OFFSET 0x980
+#define NV50_CB_AUX_SAMPLE_OFFSET 0x300
 #define NV50_CB_AUX_SAMPLE_OFFSET_SIZE (4 * 8 * 2)
-/* next spot: 0x9c0 */
+/* next spot: 0x340 */
 /* 4 32-bit floats for the vertex runout, put at the end */
 #define NV50_CB_AUX_RUNOUT_OFFSET (NV50_CB_AUX_SIZE - 0x10)
 
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_tex.c 
b/src/gallium/drivers/nouveau/nv50/nv50_tex.c
index 5cfce3a..0d2604e 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_tex.c
@@ -286,7 +286,7 @@ nv50_validate_tic(struct nv50_context *nv50, int s)
}
if (nv50->num_textures[s]) {
   BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
-  PUSH_DATA (push, (NV50_CB_AUX_TEX_MS_OFFSET << (8 - 2)) | NV50_CB_AUX);
+  PUSH_DATA (push, ((NV50_CB_AUX_TEX_MS_OFFSET + 16 * s * 2 * 4) << (8 - 
2)) | NV50_CB_AUX);
   BEGIN_NI04(push, NV50_3D(CB_DATA(0)), nv50->num_textures[s] * 2);
   for (i = 0; i < nv50->num_textures[s]; i++) {
  struct nv50_tic_entry *tic = nv50_tic_entry(nv50->textures[s][i]);
-- 
1.8.5.5

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[Mesa-dev] Mesa 10.2 release candidate 2

2014-05-09 Thread Ian Romanick
Mesa 10.2 release candidate 2 is now available for testing.  The current
plan of record is to have an additional release candidate each Friday
until the 10.2 release on Friday, May 30th (correcte from the RC1
announcement e-mail).

Note: there is a possible front-buffer rendering regression in the
branch on some Intel hardware configurations.  If you're worried about
this case, you may want to wait for RC3.  I chose to not revert the
patches because I would have needed to revert quite a few (due to a
dependency chain), and the patches fix an assertion failure.  For more
information, see:

https://bugs.freedesktop.org/show_bug.cgi?id=78515

The tag in the GIT repository for Mesa 10.2-rc2 is 'mesa-10.2-rc2'.

Mesa 10.2 release candidate 2 is available for download at
ftp://freedesktop.org/pub/mesa/10.2/

md5sums:

f0f962321522c9fe599a2b69cc229b67  MesaLib-10.2.0-rc2.tar.gz
9976683cf51b330d3b06301e52bbc3d6  MesaLib-10.2.0-rc2.tar.bz2
910c14cd75cac00b26b11c35d1034d06  MesaLib-10.2.0-rc2.zip

I have verified building from the .tar.bz2 file by doing the following
on my aging Fedora 18 system:

tar -xjf Mesa-10.2.0-rc2.tar.bz2
cd Mesa-10.2.0-rc2
./configure --enable-gallium-llvm
make -j6 && make check
make install

Changes since mesa-10.2-rc1:

Emil Velikov (2):
  configure: error out if building GBM without dri
  glx/tests: Partially revert commit 
51e3569573a7b3f8da0df093836761003fcdc414

Ian Romanick (2):
  linker: Fix consumer_inputs_with_locations indexing
  mesa: Bump version to 10.2-rc2

Ilia Mirkin (1):
  nv50/ir/gk110: fix set with f32 dest

Kenneth Graunke (9):
  i965: Set miptree target field when creating from a BO.
  i965: Always intel_prepare_render() after invalidating front buffers.
  meta: Unify the GLSL and fixed-function clear paths.
  meta: Add a new MESA_META_DRAW_BUFFERS bit.
  meta: Add infrastructure for saving/restoring the DrawBuffers state.
  meta: Only clear the requested color buffers.
  i965: Enable GL_ARB_texture_view on Broadwell.
  mesa: Fix MaxNumLayers for 1D array textures.
  i965: Fix GPU hangs on Broadwell in shaders with some control flow.

Roland Scheidegger (1):
  draw: do not use draw_get_option_use_llvm() inside draw execution paths

Tapani Pälli (1):
  glsl: fix bogus layout qualifier warnings

Thomas Hellstrom (1):
  st/xa: Fix performance regression introduced by commit "Cache render 
target surface"

Tom Stellard (4):
  pipe-loader: Don't destroy the winsys in the sw loader
  clover: Destory pipe_screen when device does not support compute v2
  configure.ac: Add LLVM_VERSION_PATCH to DEFINES
  radeonsi: Enable geometry shaders with LLVM 3.4.1
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[Mesa-dev] Mesa 10.2 release candidate 2

2014-05-09 Thread Ian Romanick
(This is a re-send with a GPG signature.)

Mesa 10.2 release candidate 2 is now available for testing.  The current
plan of record is to have an additional release candidate each Friday
until the 10.2 release on Friday, May 30th (correcte from the RC1
announcement e-mail).

Note: there is a possible front-buffer rendering regression in the
branch on some Intel hardware configurations.  If you're worried about
this case, you may want to wait for RC3.  I chose to not revert the
patches because I would have needed to revert quite a few (due to a
dependency chain), and the patches fix an assertion failure.  For more
information, see:

https://bugs.freedesktop.org/show_bug.cgi?id=78515

The tag in the GIT repository for Mesa 10.2-rc2 is 'mesa-10.2-rc2'.

Mesa 10.2 release candidate 2 is available for download at
ftp://freedesktop.org/pub/mesa/10.2/

md5sums:

f0f962321522c9fe599a2b69cc229b67  MesaLib-10.2.0-rc2.tar.gz
9976683cf51b330d3b06301e52bbc3d6  MesaLib-10.2.0-rc2.tar.bz2
910c14cd75cac00b26b11c35d1034d06  MesaLib-10.2.0-rc2.zip

I have verified building from the .tar.bz2 file by doing the following
on my aging Fedora 18 system:

tar -xjf Mesa-10.2.0-rc2.tar.bz2
cd Mesa-10.2.0-rc2
./configure --enable-gallium-llvm
make -j6 && make check
make install

Changes since mesa-10.2-rc1:

Emil Velikov (2):
  configure: error out if building GBM without dri
  glx/tests: Partially revert commit 
51e3569573a7b3f8da0df093836761003fcdc414

Ian Romanick (2):
  linker: Fix consumer_inputs_with_locations indexing
  mesa: Bump version to 10.2-rc2

Ilia Mirkin (1):
  nv50/ir/gk110: fix set with f32 dest

Kenneth Graunke (9):
  i965: Set miptree target field when creating from a BO.
  i965: Always intel_prepare_render() after invalidating front buffers.
  meta: Unify the GLSL and fixed-function clear paths.
  meta: Add a new MESA_META_DRAW_BUFFERS bit.
  meta: Add infrastructure for saving/restoring the DrawBuffers state.
  meta: Only clear the requested color buffers.
  i965: Enable GL_ARB_texture_view on Broadwell.
  mesa: Fix MaxNumLayers for 1D array textures.
  i965: Fix GPU hangs on Broadwell in shaders with some control flow.

Roland Scheidegger (1):
  draw: do not use draw_get_option_use_llvm() inside draw execution paths

Tapani Pälli (1):
  glsl: fix bogus layout qualifier warnings

Thomas Hellstrom (1):
  st/xa: Fix performance regression introduced by commit "Cache render 
target surface"

Tom Stellard (4):
  pipe-loader: Don't destroy the winsys in the sw loader
  clover: Destory pipe_screen when device does not support compute v2
  configure.ac: Add LLVM_VERSION_PATCH to DEFINES
  radeonsi: Enable geometry shaders with LLVM 3.4.1



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Re: [Mesa-dev] [PATCH 01/13] i965: Allow stencil to be used for sampling and as render target

2014-05-09 Thread Pohjolainen, Topi
On Fri, May 09, 2014 at 05:07:44PM -0700, Kenneth Graunke wrote:
> On 05/09/2014 01:28 AM, Topi Pohjolainen wrote:
> > Signed-off-by: Topi Pohjolainen 
> > ---
> >  src/mesa/drivers/dri/i965/brw_surface_formats.c | 7 +--
> >  1 file changed, 5 insertions(+), 2 deletions(-)
> > diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
> > b/src/mesa/drivers/dri/i965/brw_surface_formats.c
> > index 5907dd9..7ffa5c4 100644
> > --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
> > +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
> > @@ -221,7 +221,7 @@ const struct surface_format_info surface_formats[] = {
> > SF( Y,  Y,  x, 45,  Y,  Y,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UNORM)
> > SF( Y,  Y,  x,  x,  Y, 60,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SNORM)
> > SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SINT)
> > -   SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)
> > +   SF(60,  x,  x,  x, 60,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)
> 
> This hunk seems wrong to me.  From the G45 PRM, Volume 4, page 133:
> 
> | Y |   |   |   | Y |   | Y |   |   | R8_UINT
> 
> So, AFAICT, this has been supported since the original Broadwater/G965.
> 
> > SF( Y,  Y,  x,  Y,  Y,  Y,  x,  x,  x, BRW_SURFACEFORMAT_A8_UNORM)
> > SF( Y,  Y,  x,  x,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_I8_UNORM)
> > SF( Y,  Y,  x,  Y,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_L8_UNORM)
> > @@ -594,9 +594,12 @@ brw_init_surface_formats(struct brw_context *brw)
> > * integer, so we don't need hardware support for blending on it.  
> > Other
> > * than that, GL in general requires alpha blending for render 
> > targets,
> > * even though we don't support it for some formats.
> > +   * Stencil is also supported as render targer for internal blitting 
> > and
> 
> render target (typo)
> 
> > +   * scaling purposes.
> > */
> >if (gen >= rinfo->render_target &&
> > - (gen >= rinfo->alpha_blend || is_integer)) {
> > + (gen >= rinfo->alpha_blend || is_integer ||
> > +   format == MESA_FORMAT_S_UINT8)) {
> >  brw->render_target_format[format] = render;
> >  brw->format_supported_as_render_target[format] = true;
> >}
> 
> I noticed there is already code that does:
> 
>brw->format_supported_as_render_target[MESA_FORMAT_S_UINT8] = true;
> 
> Your patch additionally causes:
> 
>brw->render_target_format[MESA_FORMAT_S_UINT8] =
> BRW_SURFACEFORMAT_R8_UINT;
> 
> which seems reasonable.  However, I don't think any of your patches
> actually rely on this fact, since you override the format in
> brw_configure_w_tiled.  So, perhaps this patch can be dropped?
> 

This is in fact misleading, it only overrides it for texture surface path. In
case of render target the override gotten from brw_configure_w_tiled() is
ignored:

   /* _NEW_BUFFERS */
   mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
   assert(brw_render_target_supported(brw, rb));
   format = brw->render_target_format[rb_format];


And here the lookup needs the additional change in the table. I didn't like
this patch in the first place but I kind of sticked to it because there were
so much other work related with stencil in SNB/IVB front.

I would rather move the "brw_configure_w_tiled()" after the normal format
resolve and let it override the format for render target as well. How would you
like that?

-Topi
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Re: [Mesa-dev] [PATCH 01/13] i965: Allow stencil to be used for sampling and as render target

2014-05-09 Thread Kenneth Graunke
On 05/09/2014 09:50 PM, Pohjolainen, Topi wrote:
> On Fri, May 09, 2014 at 05:07:44PM -0700, Kenneth Graunke wrote:
>> On 05/09/2014 01:28 AM, Topi Pohjolainen wrote:
>>> Signed-off-by: Topi Pohjolainen 
>>> ---
>>>  src/mesa/drivers/dri/i965/brw_surface_formats.c | 7 +--
>>>  1 file changed, 5 insertions(+), 2 deletions(-)
>>> diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
>>> b/src/mesa/drivers/dri/i965/brw_surface_formats.c
>>> index 5907dd9..7ffa5c4 100644
>>> --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
>>> +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
>>> @@ -221,7 +221,7 @@ const struct surface_format_info surface_formats[] = {
>>> SF( Y,  Y,  x, 45,  Y,  Y,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UNORM)
>>> SF( Y,  Y,  x,  x,  Y, 60,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SNORM)
>>> SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_SINT)
>>> -   SF( Y,  x,  x,  x,  Y,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)
>>> +   SF(60,  x,  x,  x, 60,  x,  Y,  x,  x, BRW_SURFACEFORMAT_R8_UINT)
>>
>> This hunk seems wrong to me.  From the G45 PRM, Volume 4, page 133:
>>
>> | Y |   |   |   | Y |   | Y |   |   | R8_UINT
>>
>> So, AFAICT, this has been supported since the original Broadwater/G965.
>>
>>> SF( Y,  Y,  x,  Y,  Y,  Y,  x,  x,  x, BRW_SURFACEFORMAT_A8_UNORM)
>>> SF( Y,  Y,  x,  x,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_I8_UNORM)
>>> SF( Y,  Y,  x,  Y,  x,  x,  x,  x,  x, BRW_SURFACEFORMAT_L8_UNORM)
>>> @@ -594,9 +594,12 @@ brw_init_surface_formats(struct brw_context *brw)
>>> * integer, so we don't need hardware support for blending on it.  
>>> Other
>>> * than that, GL in general requires alpha blending for render 
>>> targets,
>>> * even though we don't support it for some formats.
>>> +   * Stencil is also supported as render targer for internal blitting 
>>> and
>>
>> render target (typo)
>>
>>> +   * scaling purposes.
>>> */
>>>if (gen >= rinfo->render_target &&
>>> - (gen >= rinfo->alpha_blend || is_integer)) {
>>> + (gen >= rinfo->alpha_blend || is_integer ||
>>> +   format == MESA_FORMAT_S_UINT8)) {
>>>  brw->render_target_format[format] = render;
>>>  brw->format_supported_as_render_target[format] = true;
>>>}
>>
>> I noticed there is already code that does:
>>
>>brw->format_supported_as_render_target[MESA_FORMAT_S_UINT8] = true;
>>
>> Your patch additionally causes:
>>
>>brw->render_target_format[MESA_FORMAT_S_UINT8] =
>> BRW_SURFACEFORMAT_R8_UINT;
>>
>> which seems reasonable.  However, I don't think any of your patches
>> actually rely on this fact, since you override the format in
>> brw_configure_w_tiled.  So, perhaps this patch can be dropped?
>>
> 
> This is in fact misleading, it only overrides it for texture surface path. In
> case of render target the override gotten from brw_configure_w_tiled() is
> ignored:
> 
>/* _NEW_BUFFERS */
>mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
>assert(brw_render_target_supported(brw, rb));
>format = brw->render_target_format[rb_format];
> 
> 
> And here the lookup needs the additional change in the table. I didn't like
> this patch in the first place but I kind of sticked to it because there were
> so much other work related with stencil in SNB/IVB front.
> 
> I would rather move the "brw_configure_w_tiled()" after the normal format
> resolve and let it override the format for render target as well. How would 
> you
> like that?
> 
> -Topi

That could work.  Though, I think an easy solution would be to move this block
into the } else { case of the S8 check:

   if (mt->format == MESA_FORMAT_S_UINT8) {
  brw_configure_w_tiled(mt, true, &width, &height, &pitch,
&tiling, &format);
   } else {
  assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS);

  /* _NEW_BUFFERS */
  mesa_format rb_format = _mesa_get_render_format(ctx, 
intel_rb_format(irb));
  assert(brw_render_target_supported(brw, rb));
  format = brw->render_target_format[rb_format];
  if (unlikely(!brw->format_supported_as_render_target[rb_format])) {
 _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n",
   __FUNCTION__, _mesa_get_format_name(rb_format));
  }
   }

(I ran this idea by Topi on IRC and he seemed to like it.)

On a slight tangent, I think the _mesa_problem block is pretty useless.
It should never happen.  In debug builds, we would have failed the
assert(brw_render_target_supported(brw, rb)); check anyway.  In release
builds, it plows ahead anyway and would probably hang the GPU or do
something nasty.  So it doesn't even add an extra safety check.  We
could just drop it.

--Ken



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