[llvm-commits] [llvm] r45731 - /llvm/trunk/lib/Target/X86/X86JITInfo.cpp

[Bill Wendling]

Author: void
Date: Mon Jan  7 18:52:29 2008
New Revision: 45731

URL: http://llvm.org/viewvc/llvm-project?rev=45731&view=rev
Log:
Silence warning about loss of precision.

Modified:
llvm/trunk/lib/Target/X86/X86JITInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86JITInfo.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86JITInfo.cpp?rev=45731&r1=45730&r2=45731&view=diff

==
--- llvm/trunk/lib/Target/X86/X86JITInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86JITInfo.cpp Mon Jan  7 18:52:29 2008
@@ -387,7 +387,7 @@
   MCE.emitWordLE(((unsigned *)&GV)[1]);
 #else
   MCE.startFunctionStub(4, 4);
-  MCE.emitWordLE((unsigned)GV);
+  MCE.emitWordLE((intptr_t)GV);
 #endif
   return MCE.finishFunctionStub(0);
 }


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[llvm-commits] [llvm] r45733 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

[Evan Cheng]

Author: evancheng
Date: Mon Jan  7 20:06:11 2008
New Revision: 45733

URL: http://llvm.org/viewvc/llvm-project?rev=45733&view=rev
Log:
Fix a x86-64 static codegen bug. This fixes a lot of x86-64 jit failures.

Modified:
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=45733&r1=45732&r2=45733&view=diff

==
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Jan  7 20:06:11 2008
@@ -1091,7 +1091,10 @@
   // Turn ADD X, c to MOV32ri X+c. This cannot be done with tblgen'd
   // code and is matched first so to prevent it from being turned into
   // LEA32r X+c.
-  // In 64-bit mode, use LEA to take advantage of RIP-relative addressing.
+  // In 64-bit small code size mode, use LEA to take advantage of
+  // RIP-relative addressing.
+  if (TM.getCodeModel() != CodeModel::Small)
+break;
   MVT::ValueType PtrVT = TLI.getPointerTy();
   SDOperand N0 = N.getOperand(0);
   SDOperand N1 = N.getOperand(1);


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[llvm-commits] [llvm] r45734 - /llvm/trunk/lib/Target/X86/X86TargetMachine.cpp

[Evan Cheng]

Author: evancheng
Date: Mon Jan  7 20:07:10 2008
New Revision: 45734

URL: http://llvm.org/viewvc/llvm-project?rev=45734&view=rev
Log:
Minor fix to enable x86-64 pic jit (still fails for other reasons).

Modified:
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=45734&r1=45733&r2=45734&view=diff

==
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Jan  7 20:07:10 2008
@@ -171,9 +171,10 @@
 bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
   bool DumpAsm, MachineCodeEmitter &MCE) {
   // FIXME: Move this to TargetJITInfo!
-  if (DefRelocModel == Reloc::Default)
+  if (DefRelocModel == Reloc::Default) {
 setRelocationModel(Reloc::Static);
-  Subtarget.setPICStyle(PICStyle::None);
+Subtarget.setPICStyle(PICStyle::None);
+  }
   
   // JIT cannot ensure globals are placed in the lower 4G of address.
   if (Subtarget.is64Bit())


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Re: [llvm-commits] [llvm] r45669 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/AsmPrinter.cpp lib/CodeGen/README.txt lib/CodeGen/SelectionDAG/

[Gordon Henriksen]

On 2008-01-07, at 13:59, Evan Cheng wrote:

> I don't know much about the GC work. But it is really necessary for  
> AsmPrinter to use any analysis info? That seems odd to me.

Hi Evan,

Debug information has an analogue in the MachineModuleInfo pass, which  
you'll find is required from the target-specific subclasses of  
AsmPrinter. In both cases, these are ImmutablePasses (not analyses in  
any practical sense) and are used so that PassManager does the memory  
management. They store information collected during lowering.

I would've put GC information in MMI except that the GC code is  
independent of MachineFoo. The shadow-stack algorithm works with the  
CBackend, as a for-instance.

— Gordon


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[llvm-commits] [llvm] r45736 - /llvm/trunk/tools/bugpoint/ExtractFunction.cpp

[Chris Lattner]

Author: lattner
Date: Mon Jan  7 22:26:20 2008
New Revision: 45736

URL: http://llvm.org/viewvc/llvm-project?rev=45736&view=rev
Log:
Fix PR1797

Modified:
llvm/trunk/tools/bugpoint/ExtractFunction.cpp

Modified: llvm/trunk/tools/bugpoint/ExtractFunction.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/bugpoint/ExtractFunction.cpp?rev=45736&r1=45735&r2=45736&view=diff

==
--- llvm/trunk/tools/bugpoint/ExtractFunction.cpp (original)
+++ llvm/trunk/tools/bugpoint/ExtractFunction.cpp Mon Jan  7 22:26:20 2008
@@ -335,6 +335,9 @@
   for (std::vector::const_iterator I = BBs.begin(), E = BBs.end();
I != E; ++I) {
 BasicBlock *BB = *I;
+// If the BB doesn't have a name, give it one so we have something to key
+// off of.
+if (!BB->hasName()) BB->setName("tmpbb");
 BlocksToNotExtractFile << BB->getParent()->getName() << " "
<< BB->getName() << "\n";
   }


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[llvm-commits] [llvm] r45738 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp

[Owen Anderson]

Author: resistor
Date: Mon Jan  7 23:16:15 2008
New Revision: 45738

URL: http://llvm.org/viewvc/llvm-project?rev=45738&view=rev
Log:
Actually insert copies now!

Modified:
llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp

Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45738&r1=45737&r2=45738&view=diff

==
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Mon Jan  7 23:16:15 2008
@@ -25,6 +25,7 @@
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/ADT/DepthFirstIterator.h"
@@ -47,11 +48,8 @@
 bool runOnMachineFunction(MachineFunction &Fn);
 
 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-  AU.addPreserved();
-  AU.addPreservedID(PHIEliminationID);
   AU.addRequired();
   AU.addRequired();
-  AU.setPreservesAll();
   MachineFunctionPass::getAnalysisUsage(AU);
 }
 
@@ -516,6 +514,7 @@
 /// of Static Single Assignment Form" by Briggs, et al.
 void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
   std::set& pushed) {
+  // FIXME: This function needs to update LiveVariables
   std::map& copy_set= Waiting[MBB];
   
   std::map worklist;
@@ -540,6 +539,8 @@
   }
   
   LiveVariables& LV = getAnalysis();
+  MachineFunction* MF = MBB->getParent();
+  const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
   
   // Iterate over the worklist, inserting copies
   while (!worklist.empty() || !copy_set.empty()) {
@@ -547,13 +548,29 @@
   std::pair curr = *worklist.begin();
   worklist.erase(curr.first);
   
+  const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
+  
   if (isLiveOut(LV.getVarInfo(curr.second), MBB)) {
-// Insert copy from curr.second to a temporary
+// Create a temporary
+unsigned t = MF->getRegInfo().createVirtualRegister(RC);
+
+// Insert copy from curr.second to a temporary at
+// the Phi defining curr.second
+LiveVariables::VarInfo VI = LV.getVarInfo(curr.second);
+MachineBasicBlock::iterator PI = VI.DefInst;
+TII->copyRegToReg(*VI.DefInst->getParent(), PI, t,
+  curr.second, RC, RC);
+
 // Push temporary on Stacks
-// Insert temporary in pushed
+Stacks[curr.second].push_back(t);
+
+// Insert curr.second in pushed
+pushed.insert(curr.second);
   }
   
   // Insert copy from map[curr.first] to curr.second
+  TII->copyRegToReg(*MBB, MBB->end(), curr.second,
+map[curr.first], RC, RC);
   map[curr.first] = curr.second;
   
   // If curr.first is a destination in copy_set...
@@ -577,8 +594,13 @@
   std::pair curr = *copy_set.begin();
   copy_set.erase(curr.first);
   
+  const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
+  
   // Insert a copy from dest to a new temporary t at the end of b
-  // map[curr.second] = t;
+  unsigned t = MF->getRegInfo().createVirtualRegister(RC);
+  TII->copyRegToReg(*MBB, MBB->end(), t,
+curr.second, RC, RC);
+  map[curr.second] = t;
   
   worklist.insert(curr);
 }
@@ -628,6 +650,7 @@
   InsertCopies(Fn.begin());
   
   // FIXME: Perform renaming
+  // FIXME: Remove Phi instrs
   
   return false;
 }


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[llvm-commits] [llvm] r45739 - /llvm/trunk/test/CFrontend/2008-01-07-UnusualIntSize.c

[Chris Lattner]

Author: lattner
Date: Mon Jan  7 23:16:29 2008
New Revision: 45739

URL: http://llvm.org/viewvc/llvm-project?rev=45739&view=rev
Log:
Testcase for PR1721

Added:
llvm/trunk/test/CFrontend/2008-01-07-UnusualIntSize.c

Added: llvm/trunk/test/CFrontend/2008-01-07-UnusualIntSize.c
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2008-01-07-UnusualIntSize.c?rev=45739&view=auto

==
--- llvm/trunk/test/CFrontend/2008-01-07-UnusualIntSize.c (added)
+++ llvm/trunk/test/CFrontend/2008-01-07-UnusualIntSize.c Mon Jan  7 23:16:29 
2008
@@ -0,0 +1,11 @@
+// RUN: %llvmgcc %s -S -o - -O | grep {and.*8589934591}
+// PR1721
+
+struct s {
+  unsigned long long u33: 33;
+} a, b;
+
+// This should turn into a real 33-bit add, not a 64-bit add.
+_Bool test(void) {
+  return a.u33 + b.u33 != 0;
+}


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[llvm-commits] [llvm-gcc-4.2] r45740 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

[Chris Lattner]

Author: lattner
Date: Mon Jan  7 23:18:45 2008
New Revision: 45740

URL: http://llvm.org/viewvc/llvm-project?rev=45740&view=rev
Log:
Fix PR1721 with a minimal hack: if we see that we are codegen'ing something
with a smaller precision than the llvm register for it, do the zext/sext 
explicitly in the llvm IR.  This mirrors what GCC does in its expr.c.



Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45740&r1=45739&r2=45740&view=diff

==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Mon Jan  7 23:18:45 2008
@@ -982,6 +982,30 @@
 break;
   }
   
+  // If this is an operation on an integer value in a precision smaller than
+  // the LLVM value we are computing it in, reduce the excess precision here.
+  // This happens with odd-sized bitfields (e.g. i33) that are evaluated in the
+  // next size power-of-two register (e.g. i64).  This should be reevaluated
+  // when we have good support for unusual sized integers in the code 
generator.
+  if (Result && TREE_CODE(TREE_TYPE(exp)) == INTEGER_TYPE) {
+unsigned LLVMWidth = cast(Result->getType())->getBitWidth();
+unsigned TreeWidth = TYPE_PRECISION(TREE_TYPE(exp));
+if (LLVMWidth > TreeWidth && lang_hooks.reduce_bit_field_operations) {
+  if (TYPE_UNSIGNED(TREE_TYPE(exp))) {
+// Use an 'and' to clear excess top bits.
+Constant *Mask =
+ConstantInt::get(APInt::getLowBitsSet(LLVMWidth, TreeWidth));
+Result = Builder.CreateAnd(Result, Mask, "mask");
+  } else {
+// Shift Left then shift right.
+Constant *ShAmt = ConstantInt::get(Result->getType(), 
+   LLVMWidth-TreeWidth);
+Result = Builder.CreateShl(Result, ShAmt, "sextl");
+Result = Builder.CreateAShr(Result, ShAmt, "sextr");
+  }
+}
+  }
+  
   if (TheDebugInfo && EXPR_HAS_LOCATION(exp)) {
 // Restore location back down the tree.
 TheDebugInfo->setLocationFile(EXPR_FILENAME(exp));


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[llvm-commits] [llvm-gcc-4.0] r45737 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp

[Chris Lattner]

Author: lattner
Date: Mon Jan  7 22:59:40 2008
New Revision: 45737

URL: http://llvm.org/viewvc/llvm-project?rev=45737&view=rev
Log:
Fix PR1721 with a minimal hack: if we see that we are codegen'ing something
with a smaller precision than the llvm register for it, do the zext/sext 
explicitly in the llvm IR.  This mirrors what GCC does in its expr.c.

Modified:
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=45737&r1=45736&r2=45737&view=diff

==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Mon Jan  7 22:59:40 2008
@@ -940,6 +940,30 @@
 break;
   }
   
+  // If this is an operation on an integer value in a precision smaller than
+  // the LLVM value we are computing it in, reduce the excess precision here.
+  // This happens with odd-sized bitfields (e.g. i33) that are evaluated in the
+  // next size power-of-two register (e.g. i64).  This should be reevaluated
+  // when we have good support for unusual sized integers in the code 
generator.
+  if (Result && TREE_CODE(TREE_TYPE(exp)) == INTEGER_TYPE) {
+unsigned LLVMWidth = cast(Result->getType())->getBitWidth();
+unsigned TreeWidth = TYPE_PRECISION(TREE_TYPE(exp));
+if (LLVMWidth > TreeWidth && lang_hooks.reduce_bit_field_operations) {
+  if (TYPE_UNSIGNED(TREE_TYPE(exp))) {
+// Use an 'and' to clear excess top bits.
+Constant *Mask =
+  ConstantInt::get(APInt::getLowBitsSet(LLVMWidth, TreeWidth));
+Result = Builder.CreateAnd(Result, Mask, "mask");
+  } else {
+// Shift Left then shift right.
+Constant *ShAmt = ConstantInt::get(Result->getType(), 
+   LLVMWidth-TreeWidth);
+Result = Builder.CreateShl(Result, ShAmt, "sextl");
+Result = Builder.CreateAShr(Result, ShAmt, "sextr");
+  }
+}
+  }
+  
   if (TheDebugInfo && EXPR_HAS_LOCATION(exp)) {
 // Restore location back down the tree.
 TheDebugInfo->setLocationFile(EXPR_FILENAME(exp));


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[llvm-commits] [llvm-gcc-4.2] r45741 - /llvm-gcc-4.2/trunk/gcc/objc/objc-act.c

[Bill Wendling]

Author: void
Date: Tue Jan  8 00:08:04 2008
New Revision: 45741

URL: http://llvm.org/viewvc/llvm-project?rev=45741&view=rev
Log:
Make the metaclass and some other metadata variables local instead of global.

Modified:
llvm-gcc-4.2/trunk/gcc/objc/objc-act.c

Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=45741&r1=45740&r2=45741&view=diff

==
--- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original)
+++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Tue Jan  8 00:08:04 2008
@@ -9925,12 +9925,24 @@
   /* struct class_t OBJC_CLASS_$_; */
   UOBJC_V2_CLASS_decl = build_metadata_decl ("OBJC_CLASS_$",
 /* APPLE LOCAL radar 5202926 */
+ /* APPLE LOCAL begin radar 
5658734 */
+#ifndef ENABLE_LLVM
  objc_v2_class_template, true);
+#else
+ objc_v2_class_template, false);
+#endif
+ /* APPLE LOCAL end radar 5658734 
*/
 
  /* struct class_t OBJC_METACLASS_$_; */
  UOBJC_V2_METACLASS_decl = build_metadata_decl ("OBJC_METACLASS_$",
/* APPLE LOCAL radar 5202926 */
+/* APPLE LOCAL begin radar 
5658734 */
+#ifndef ENABLE_LLVM
 objc_v2_class_template, true);
+#else
+objc_v2_class_template, false);
+#endif
+/* APPLE LOCAL end radar 
5658734 */
 }
 
 static void
@@ -12034,7 +12046,16 @@
   sav = objc_implementation_context;
   objc_implementation_context = my_root_int;
   /* APPLE LOCAL radar 5202926 */
-  root_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template, true);
+  /* APPLE LOCAL begin radar 5658734 */
+#ifndef ENABLE_LLVM
+  root_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template,
+   true);
+#else
+  root_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template,
+   false);
+#endif
+  root_expr = update_var_decl (root_expr);
+  /* APPLE LOCAL end radar 5658734 */
   root_expr = build_fold_addr_expr (root_expr);
 
   /* Install class `isa' and `super' pointers at runtime.  */
@@ -12045,10 +12066,32 @@
  back-end, recognizes '_OBJC_' prefix and prepends an 'L' in front of 
this. Darwin
  assembler treats names starting with 'L_' as local symbols. */
   /* APPLE LOCAL radar 5202926 */
-  class_superclass_expr = build_metadata_decl ("OBJC_CLASS_$", 
objc_v2_class_template, true);
+  /* APPLE LOCAL begin radar 5658734 */
+#ifndef ENABLE_LLVM
+  class_superclass_expr = build_metadata_decl ("OBJC_CLASS_$",
+   objc_v2_class_template,
+   true);
+#else
+  class_superclass_expr = build_metadata_decl ("OBJC_CLASS_$",
+   objc_v2_class_template,
+   false);
+#endif
+  class_superclass_expr = update_var_decl (class_superclass_expr);
+  /* APPLE LOCAL end radar 5658734 */
   class_superclass_expr = build_fold_addr_expr (class_superclass_expr);
   /* APPLE LOCAL radar 5202926 */
-  metaclass_superclass_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template, true);
+  /* APPLE LOCAL begin radar 5658734 */
+#ifndef ENABLE_LLVM
+  metaclass_superclass_expr = build_metadata_decl ("OBJC_METACLASS_$",
+   objc_v2_class_template,
+   true);
+#else
+  metaclass_superclass_expr = build_metadata_decl ("OBJC_METACLASS_$",
+   objc_v2_class_template,
+   false);
+#endif
+  metaclass_superclass_expr = update_var_decl (metaclass_superclass_expr);
+  /* APPLE LOCAL end radar 5658734 */
   metaclass_superclass_expr = build_fold_addr_expr 
(metaclass_superclass_expr);
   objc_implementation_context = sav;
 }


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[llvm-commits] [llvm] r45742 - in /llvm/trunk: lib/Target/PowerPC/PPCISelDAGToDAG.cpp lib/Target/PowerPC/README.txt test/CodeGen/PowerPC/compare-fcmp-ord.ll

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 00:46:30 2008
New Revision: 45742

URL: http://llvm.org/viewvc/llvm-project?rev=45742&view=rev
Log:
Finally implement correct ordered comparisons for PPC, even though
the code generated is not wonderful.  This turns a miscompilation into
a code quality bug (noted in the ppc readme).  This fixes PR642, which
is over 2 years old (!).  Nate, please review this.

Added:
llvm/trunk/test/CodeGen/PowerPC/compare-fcmp-ord.ll
Modified:
llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/trunk/lib/Target/PowerPC/README.txt

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=45742&r1=45741&r2=45742&view=diff

==
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Tue Jan  8 00:46:30 2008
@@ -624,29 +624,34 @@
 /// getCRIdxForSetCC - Return the index of the condition register field
 /// associated with the SetCC condition, and whether or not the field is
 /// treated as inverted.  That is, lt = 0; ge = 0 inverted.
-static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool& Inv) {
+///
+/// If this returns with Other != -1, then the returned comparison is an or of
+/// two simpler comparisons.  In this case, Invert is guaranteed to be false.
+static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert, int &Other) {
+  Invert = false;
+  Other = -1;
   switch (CC) {
   default: assert(0 && "Unknown condition!"); abort();
-  case ISD::SETOLT:  // FIXME: This is incorrect see PR642.
-  case ISD::SETULT:
-  case ISD::SETLT:  Inv = false;  return 0;
-  case ISD::SETOGE:  // FIXME: This is incorrect see PR642.
+  case ISD::SETOLT:
+  case ISD::SETLT:  return 0;  // Bit #0 = SETOLT
+  case ISD::SETOGT:
+  case ISD::SETGT:  return 1;  // Bit #1 = SETOGT
+  case ISD::SETOEQ:
+  case ISD::SETEQ:  return 2;  // Bit #2 = SETOEQ
+  case ISD::SETUO:  return 3;  // Bit #3 = SETUO
   case ISD::SETUGE:
-  case ISD::SETGE:  Inv = true;   return 0;
-  case ISD::SETOGT:  // FIXME: This is incorrect see PR642.
-  case ISD::SETUGT:
-  case ISD::SETGT:  Inv = false;  return 1;
-  case ISD::SETOLE:  // FIXME: This is incorrect see PR642.
+  case ISD::SETGE:  Invert = true; return 0;   // !Bit #0 = SETUGE
   case ISD::SETULE:
-  case ISD::SETLE:  Inv = true;   return 1;
-  case ISD::SETOEQ:  // FIXME: This is incorrect see PR642.
-  case ISD::SETUEQ:
-  case ISD::SETEQ:  Inv = false;  return 2;
-  case ISD::SETONE:  // FIXME: This is incorrect see PR642.
+  case ISD::SETLE:  Invert = true; return 1;   // !Bit #1 = SETULE
   case ISD::SETUNE:
-  case ISD::SETNE:  Inv = true;   return 2;
-  case ISD::SETO:   Inv = true;   return 3;
-  case ISD::SETUO:  Inv = false;  return 3;
+  case ISD::SETNE:  Invert = true; return 2;   // !Bit #2 = SETUNE
+  case ISD::SETO:   Invert = true; return 3;   // !Bit #3 = SETO
+  case ISD::SETULT: Other = 0; return 3;   // SETOLT | SETUO
+  case ISD::SETUGT: Other = 1; return 3;   // SETOGT | SETUO
+  case ISD::SETUEQ: Other = 2; return 3;   // SETOEQ | SETUO
+  case ISD::SETOGE: Other = 1; return 2;   // SETOGT | SETOEQ
+  case ISD::SETOLE: Other = 0; return 2;   // SETOLT | SETOEQ
+  case ISD::SETONE: Other = 0; return 1;   // SETOLT | SETOGT
   }
   return 0;
 }
@@ -726,7 +731,8 @@
   }
   
   bool Inv;
-  unsigned Idx = getCRIdxForSetCC(CC, Inv);
+  int OtherCondIdx;
+  unsigned Idx = getCRIdxForSetCC(CC, Inv, OtherCondIdx);
   SDOperand CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC);
   SDOperand IntCR;
   
@@ -737,7 +743,7 @@
   CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), CR7Reg, CCReg, 
InFlag).getValue(1);
   
-  if (PPCSubTarget.isGigaProcessor())
+  if (PPCSubTarget.isGigaProcessor() && OtherCondIdx == -1)
 IntCR = SDOperand(CurDAG->getTargetNode(PPC::MFOCRF, MVT::i32, CR7Reg,
 CCReg), 0);
   else
@@ -745,13 +751,26 @@
   
   SDOperand Ops[] = { IntCR, getI32Imm((32-(3-Idx)) & 31),
   getI32Imm(31), getI32Imm(31) };
-  if (!Inv) {
+  if (OtherCondIdx == -1 && !Inv)
 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4);
-  } else {
-SDOperand Tmp =
-  SDOperand(CurDAG->getTargetNode(PPC::RLWINM, MVT::i32, Ops, 4), 0);
+
+  // Get the specified bit.
+  SDOperand Tmp =
+SDOperand(CurDAG->getTargetNode(PPC::RLWINM, MVT::i32, Ops, 4), 0);
+  if (Inv) {
+assert(OtherCondIdx == -1 && "Can't have split plus negation");
 return CurDAG->SelectNodeTo(N, PPC::XORI, MVT::i32, Tmp, getI32Imm(1));
   }
+
+  // Otherwise, we have to turn an operation like SETONE -> SETOLT | SETOGT.
+  // We already got the bit for the first part of the comparison (e.g. SETULE).
+
+  // Get the other bit of th

[llvm-commits] [llvm] r45743 - /llvm/trunk/test/CodeGen/PowerPC/compare-fcmp-ord.ll

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 00:52:51 2008
New Revision: 45743

URL: http://llvm.org/viewvc/llvm-project?rev=45743&view=rev
Log:
remove darwin/i386 t-t

Modified:
llvm/trunk/test/CodeGen/PowerPC/compare-fcmp-ord.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/compare-fcmp-ord.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/compare-fcmp-ord.ll?rev=45743&r1=45742&r2=45743&view=diff

==
--- llvm/trunk/test/CodeGen/PowerPC/compare-fcmp-ord.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/compare-fcmp-ord.ll Tue Jan  8 00:52:51 2008
@@ -1,9 +1,6 @@
 ; RUN: llvm-as < %s | llc -march=ppc32 | grep or | count 3
 ; This should produce one 'or' or 'cror' instruction per function.
 
-target datalayout = 
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i686-apple-darwin8"
-
 define i32 @test(double %x, double %y) nounwind  {
 entry:
%tmp3 = fcmp ole double %x, %y  ;  [#uses=1]


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[llvm-commits] [llvm] r45744 - /llvm/trunk/include/llvm/Support/PatternMatch.h

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 01:02:44 2008
New Revision: 45744

URL: http://llvm.org/viewvc/llvm-project?rev=45744&view=rev
Log:
add match support for casts.

Modified:
llvm/trunk/include/llvm/Support/PatternMatch.h

Modified: llvm/trunk/include/llvm/Support/PatternMatch.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/PatternMatch.h?rev=45744&r1=45743&r2=45744&view=diff

==
--- llvm/trunk/include/llvm/Support/PatternMatch.h (original)
+++ llvm/trunk/include/llvm/Support/PatternMatch.h Tue Jan  8 01:02:44 2008
@@ -322,6 +322,30 @@
 }
 
 
//===--===//
+// Matchers for CastInst classes
+//
+
+template
+struct CastClass_match {
+  Op_t Op;
+  
+  CastClass_match(const Op_t &OpMatch) : Op(OpMatch) {}
+  
+  template
+  bool match(OpTy *V) {
+if (Class *I = dyn_cast(V))
+  return Op.match(I->getOperand(0));
+return false;
+  }
+};
+
+template
+inline CastClass_match m_Cast(const OpTy &Op) {
+  return CastClass_match(Op);
+}
+
+  
+//===--===//
 // Matchers for unary operators
 //
 


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[llvm-commits] [llvm] r45745 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/add2.ll

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 01:23:51 2008
New Revision: 45745

URL: http://llvm.org/viewvc/llvm-project?rev=45745&view=rev
Log:
Implement PR1795, an instcombine hack for forming GEPs with integer pointer 
arithmetic.

Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
llvm/trunk/test/Transforms/InstCombine/add2.ll

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45745&r1=45744&r2=45745&view=diff

==
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Tue Jan  8 
01:23:51 2008
@@ -210,7 +210,7 @@
 Instruction *visitUIToFP(CastInst &CI);
 Instruction *visitSIToFP(CastInst &CI);
 Instruction *visitPtrToInt(CastInst &CI);
-Instruction *visitIntToPtr(CastInst &CI);
+Instruction *visitIntToPtr(IntToPtrInst &CI);
 Instruction *visitBitCast(BitCastInst &CI);
 Instruction *FoldSelectOpOp(SelectInst &SI, Instruction *TI,
 Instruction *FI);
@@ -7148,8 +7148,58 @@
   return commonPointerCastTransforms(CI);
 }
 
-Instruction *InstCombiner::visitIntToPtr(CastInst &CI) {
-  return commonCastTransforms(CI);
+Instruction *InstCombiner::visitIntToPtr(IntToPtrInst &CI) {
+  if (Instruction *I = commonCastTransforms(CI))
+return I;
+  
+  const Type *DestPointee = cast(CI.getType())->getElementType();
+  if (!DestPointee->isSized()) return 0;
+
+  // If this is inttoptr(add (ptrtoint x), cst), try to turn this into a GEP.
+  ConstantInt *Cst;
+  Value *X;
+  if (match(CI.getOperand(0), m_Add(m_Cast(m_Value(X)),
+m_ConstantInt(Cst {
+// If the source and destination operands have the same type, see if this
+// is a single-index GEP.
+if (X->getType() == CI.getType()) {
+  // Get the size of the pointee type.
+  uint64_t Size = TD->getABITypeSizeInBits(DestPointee);
+
+  // Convert the constant to intptr type.
+  APInt Offset = Cst->getValue();
+  Offset.sextOrTrunc(TD->getPointerSizeInBits());
+
+  // If Offset is evenly divisible by Size, we can do this xform.
+  if (Size && !APIntOps::srem(Offset, APInt(Offset.getBitWidth(), Size))){
+Offset = APIntOps::sdiv(Offset, APInt(Offset.getBitWidth(), Size));
+return new GetElementPtrInst(X, ConstantInt::get(Offset));
+  }
+}
+// TODO: Could handle other cases, e.g. where add is indexing into field of
+// struct etc.
+  } else if (CI.getOperand(0)->hasOneUse() &&
+ match(CI.getOperand(0), m_Add(m_Value(X), m_ConstantInt(Cst {
+// Otherwise, if this is inttoptr(add x, cst), try to turn this into an
+// "inttoptr+GEP" instead of "add+intptr".
+
+// Get the size of the pointee type.
+uint64_t Size = TD->getABITypeSize(DestPointee);
+
+// Convert the constant to intptr type.
+APInt Offset = Cst->getValue();
+Offset.sextOrTrunc(TD->getPointerSizeInBits());
+
+// If Offset is evenly divisible by Size, we can do this xform.
+if (Size && !APIntOps::srem(Offset, APInt(Offset.getBitWidth(), Size))){
+  Offset = APIntOps::sdiv(Offset, APInt(Offset.getBitWidth(), Size));
+  
+  Instruction *P = InsertNewInstBefore(new IntToPtrInst(X, CI.getType(),
+"tmp"), CI);
+  return new GetElementPtrInst(P, ConstantInt::get(Offset), "tmp");
+}
+  }
+  return 0;
 }
 
 Instruction *InstCombiner::visitBitCast(BitCastInst &CI) {

Modified: llvm/trunk/test/Transforms/InstCombine/add2.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/add2.ll?rev=45745&r1=45744&r2=45745&view=diff

==
--- llvm/trunk/test/Transforms/InstCombine/add2.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/add2.ll Tue Jan  8 01:23:51 2008
@@ -1,6 +1,10 @@
 ; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
 ; RUN:grep -v OK | not grep add
 
+;; Target triple for gep raising case below.
+target datalayout = 
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i686-apple-darwin8"
+
 define i64 @test1(i64 %A, i32 %B) {
 %tmp12 = zext i32 %B to i64
 %tmp3 = shl i64 %tmp12, 32
@@ -9,3 +13,19 @@
 ret i64 %tmp6
 }
 
+; PR1795
+define void @test2(i32 %.val24) {
+EntryBlock:
+add i32 %.val24, -12
+inttoptr i32 %0 to i32*
+store i32 1, i32* %1
+add i32 %.val24, -16
+inttoptr i32 %2 to i32*
+getelementptr i32* %3, i32 1
+load i32* %4
+tail call i32 @callee( i32 %5 )
+ret void
+}
+
+declare i32 @callee(i32)
+


_

Re: [llvm-commits] [llvm-gcc-4.2] r45590 - in /llvm-gcc-4.2/trunk/gcc: llvm-abi.h llvm-convert.cpp llvm-debug.cpp llvm-internal.h llvm-types.cpp

[Duncan Sands]

> If a struct field is marked as a bitfield but
> didn't need to be, treat it like an ordinary
> field.  The Ada front-end likes to mark fields
> as bitfields preemptively, so this can occur
> quite often for Ada.  What is more, it can
> mark non-integer fields as bitfields.  In all
> examples I came across so far, these non-integer
> bitfields can be treated like ordinary fields.
> With this patch, the Ada front-end builds (but
> does not bootstrap)!  It is true that the problem
> of non-integer bitfields could be handled in the
> Ada front-end, but since ignoring silly bitfields
> seems like a good idea for all front-ends I chose
> to solve it in the generic code.

I forgot to mention the testcase: FrontendAda/non_bitfield.ads.

Duncan.
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[llvm-commits] [llvm] r45746 - in /llvm/trunk/lib/Target: PowerPC/PPCSubtarget.cpp X86/X86Subtarget.cpp

[Duncan Sands]

Author: baldrick
Date: Tue Jan  8 04:06:15 2008
New Revision: 45746

URL: http://llvm.org/viewvc/llvm-project?rev=45746&view=rev
Log:
Use size_t to store Pos, avoid truncating value
on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

Modified:
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=45746&r1=45745&r2=45746&view=diff

==
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Tue Jan  8 04:06:15 2008
@@ -103,7 +103,7 @@
   const std::string &TT = M.getTargetTriple();
   if (TT.length() > 7) {
 // Determine which version of darwin this is.
-unsigned DarwinPos = TT.find("-darwin");
+size_t DarwinPos = TT.find("-darwin");
 if (DarwinPos != std::string::npos) {
   if (isdigit(TT[DarwinPos+7]))
 DarwinVers = atoi(&TT[DarwinPos+7]);

Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=45746&r1=45745&r2=45746&view=diff

==
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Tue Jan  8 04:06:15 2008
@@ -257,7 +257,7 @@
   // if one cannot be determined, to true.
   const std::string& TT = M.getTargetTriple();
   if (TT.length() > 5) {
-unsigned Pos;
+size_t Pos;
 if ((Pos = TT.find("-darwin")) != std::string::npos) {
   TargetType = isDarwin;
   


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[llvm-commits] [llvm] r45748 - in /llvm/trunk: include/llvm/Target/TargetInstrDesc.h utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 12:05:21 2008
New Revision: 45748

URL: http://llvm.org/viewvc/llvm-project?rev=45748&view=rev
Log:
add a mayLoad property for machine instructions, a correlary to mayStore.
This is currently not set by anything.

Modified:
llvm/trunk/include/llvm/Target/TargetInstrDesc.h
llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
llvm/trunk/utils/TableGen/CodeGenInstruction.h
llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp

Modified: llvm/trunk/include/llvm/Target/TargetInstrDesc.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrDesc.h?rev=45748&r1=45747&r2=45748&view=diff

==
--- llvm/trunk/include/llvm/Target/TargetInstrDesc.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrDesc.h Tue Jan  8 12:05:21 2008
@@ -90,6 +90,7 @@
 NotDuplicable,
 DelaySlot,
 SimpleLoad,
+MayLoad,
 MayStore,
 NeverHasSideEffects,
 MayHaveSideEffects,
@@ -308,6 +309,14 @@
   
//======//
   // Side Effect Analysis
   
//======//
+
+  /// mayLoad - Return true if this instruction could possibly read memory.
+  /// Instructions with this flag set are not necessarily simple load
+  /// instructions, they may load a value and modify it, for example.
+  bool mayLoad() const {
+return Flags & (1 << TID::MayLoad);
+  }
+  
   
   /// mayStore - Return true if this instruction could possibly modify memory.
   /// Instructions with this flag set are not necessarily simple store
@@ -317,8 +326,6 @@
 return Flags & (1 << TID::MayStore);
   }
   
-  // TODO: mayLoad.
-  
   /// hasNoSideEffects - Return true if all instances of this instruction are
   /// guaranteed to have no side effects other than:
   ///   1. The register operands that are def/used by the MachineInstr.

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=45748&r1=45747&r2=45748&view=diff

==
--- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Tue Jan  8 12:05:21 2008
@@ -84,6 +84,7 @@
   isBarrier= R->getValueAsBit("isBarrier");
   isCall   = R->getValueAsBit("isCall");
   isSimpleLoad = R->getValueAsBit("isSimpleLoad");
+  mayLoad  = R->getValueAsBit("mayLoad");
   mayStore = R->getValueAsBit("mayStore");
   isImplicitDef= R->getValueAsBit("isImplicitDef");
   bool isTwoAddress = R->getValueAsBit("isTwoAddress");

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=45748&r1=45747&r2=45748&view=diff

==
--- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Tue Jan  8 12:05:21 2008
@@ -90,7 +90,7 @@
 bool isBarrier;
 bool isCall;
 bool isSimpleLoad;
-bool mayStore;
+bool mayLoad, mayStore;
 bool isImplicitDef;
 bool isPredicable;
 bool isConvertibleToThreeAddress;

Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=45748&r1=45747&r2=45748&view=diff

==
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Tue Jan  8 12:05:21 2008
@@ -144,12 +144,12 @@
 class InstAnalyzer {
   const CodeGenDAGPatterns &CDP;
   bool &mayStore;
-  bool &isLoad;
+  bool &mayLoad;
   bool &NeverHasSideEffects;
 public:
   InstAnalyzer(const CodeGenDAGPatterns &cdp,
-   bool &maystore, bool &isload, bool &nhse)
-: CDP(cdp), mayStore(maystore), isLoad(isload), NeverHasSideEffects(nhse) {
+   bool &maystore, bool &mayload, bool &nhse)
+: CDP(cdp), mayStore(maystore), mayLoad(mayload), 
NeverHasSideEffects(nhse){
   }
   
   void Analyze(Record *InstRecord) {
@@ -166,9 +166,8 @@
   
 private:
   void AnalyzeNode(const TreePatternNode *N) {
-if (N->isLeaf()) {
+if (N->isLeaf())
   return;
-}
 
 if (N->getOperator()->getName() != "set") {
   // Get information about the SDNode for the operator.
@@ -191,11 +190,11 @@
 };
 
 void InstrInfoEmitter::InferFromPattern(const CodeGenInstruction &Inst, 
-bool &mayStore, bool &isLoad, 
+bool &mayStore, bool &mayLoad, 
 bool &NeverHasSideEffects) {
-  mayStore = isLoad = NeverHasSideEffects = false;
+  mayStore = mayLoad

[llvm-commits] [llvm-gcc-4.2] r45751 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 12:21:54 2008
New Revision: 45751

URL: http://llvm.org/viewvc/llvm-project?rev=45751&view=rev
Log:
cleanups suggested by duncan, thanks Duncan!

Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45751&r1=45750&r2=45751&view=diff

==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Tue Jan  8 12:21:54 2008
@@ -988,13 +988,13 @@
   // next size power-of-two register (e.g. i64).  This should be reevaluated
   // when we have good support for unusual sized integers in the code 
generator.
   if (Result && TREE_CODE(TREE_TYPE(exp)) == INTEGER_TYPE) {
-unsigned LLVMWidth = cast(Result->getType())->getBitWidth();
+unsigned LLVMWidth = Result->getType()->getPrimitiveSizeInBits();
 unsigned TreeWidth = TYPE_PRECISION(TREE_TYPE(exp));
 if (LLVMWidth > TreeWidth && lang_hooks.reduce_bit_field_operations) {
   if (TYPE_UNSIGNED(TREE_TYPE(exp))) {
 // Use an 'and' to clear excess top bits.
 Constant *Mask =
-ConstantInt::get(APInt::getLowBitsSet(LLVMWidth, TreeWidth));
+  ConstantInt::get(APInt::getLowBitsSet(LLVMWidth, TreeWidth));
 Result = Builder.CreateAnd(Result, Mask, "mask");
   } else {
 // Shift Left then shift right.


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[llvm-commits] [llvm-gcc-4.0] r45753 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 13:41:42 2008
New Revision: 45753

URL: http://llvm.org/viewvc/llvm-project?rev=45753&view=rev
Log:
Cleanup suggested by Duncan, thanks!

Modified:
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp

Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=45753&r1=45752&r2=45753&view=diff

==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Tue Jan  8 13:41:42 2008
@@ -946,7 +946,7 @@
   // next size power-of-two register (e.g. i64).  This should be reevaluated
   // when we have good support for unusual sized integers in the code 
generator.
   if (Result && TREE_CODE(TREE_TYPE(exp)) == INTEGER_TYPE) {
-unsigned LLVMWidth = cast(Result->getType())->getBitWidth();
+unsigned LLVMWidth = Result->getType()->getPrimitiveSizeInBits();
 unsigned TreeWidth = TYPE_PRECISION(TREE_TYPE(exp));
 if (LLVMWidth > TreeWidth && lang_hooks.reduce_bit_field_operations) {
   if (TYPE_UNSIGNED(TREE_TYPE(exp))) {


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[llvm-commits] [llvm] r45752 - /llvm/trunk/include/llvm/ADT/ImmutableMap.h

[Ted Kremenek]

Author: kremenek
Date: Tue Jan  8 13:38:55 2008
New Revision: 45752

URL: http://llvm.org/viewvc/llvm-project?rev=45752&view=rev
Log:
Fixed 80 col. violation.

Modified:
llvm/trunk/include/llvm/ADT/ImmutableMap.h

Modified: llvm/trunk/include/llvm/ADT/ImmutableMap.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableMap.h?rev=45752&r1=45751&r2=45752&view=diff

==
--- llvm/trunk/include/llvm/ADT/ImmutableMap.h (original)
+++ llvm/trunk/include/llvm/ADT/ImmutableMap.h Tue Jan  8 13:38:55 2008
@@ -76,7 +76,8 @@
 ImmutableMap GetEmptyMap() { return ImmutableMap(F.GetEmptyTree()); }
 
 ImmutableMap Add(ImmutableMap Old, key_type_ref K, data_type_ref D) {
-  return 
ImmutableMap(F.Add(Old.Root,std::make_pair(K,D)));
+  return ImmutableMap(F.Add(Old.Root,
+std::make_pair(K,D)));
 }
 
 ImmutableMap Remove(ImmutableMap Old, key_type_ref K) {


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[llvm-commits] [llvm] r45756 - /llvm/trunk/include/llvm/ADT/ImmutableMap.h

[Ted Kremenek]

Author: kremenek
Date: Tue Jan  8 15:05:59 2008
New Revision: 45756

URL: http://llvm.org/viewvc/llvm-project?rev=45756&view=rev
Log:
Added "getRoot()" to ImmutableMap.
Made the ctor for ImmutableMap to construct a map from an AVL tree public.

Modified:
llvm/trunk/include/llvm/ADT/ImmutableMap.h

Modified: llvm/trunk/include/llvm/ADT/ImmutableMap.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/ImmutableMap.h?rev=45756&r1=45755&r2=45756&view=diff

==
--- llvm/trunk/include/llvm/ADT/ImmutableMap.h (original)
+++ llvm/trunk/include/llvm/ADT/ImmutableMap.h Tue Jan  8 15:05:59 2008
@@ -52,20 +52,24 @@
 template  >
 class ImmutableMap {
+public:
   typedef typename ValInfo::value_type  value_type;
   typedef typename ValInfo::value_type_ref  value_type_ref;
   typedef typename ValInfo::key_typekey_type;
   typedef typename ValInfo::key_type_refkey_type_ref;
   typedef typename ValInfo::data_type   data_type;
   typedef typename ValInfo::data_type_ref   data_type_ref;
+  typedef ImutAVLTree  TreeTy;
   
-private:  
-  typedef ImutAVLTree TreeTy;
+private:
   TreeTy* Root;
-  
-  ImmutableMap(TreeTy* R) : Root(R) {}
-  
+
 public:
+  /// Constructs a map from a pointer to a tree root.  In general one
+  /// should use a Factory object to create maps instead of directly
+  /// invoking the constructor, but there are cases where make this
+  /// constructor public is useful.
+  explicit ImmutableMap(TreeTy* R) : Root(R) {}
   
   class Factory {
 typename TreeTy::Factory F;
@@ -112,6 +116,8 @@
 return Root && RHS.Root ? Root->isNotEqual(*RHS.Root) : Root != RHS.Root;
   }
   
+  TreeTy* getRoot() const { return Root; }
+  
   bool isEmpty() const { return !Root; }
 
   //===--===//


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[llvm-commits] [llvm-gcc-4.0] r45755 - /llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 15:01:08 2008
New Revision: 45755

URL: http://llvm.org/viewvc/llvm-project?rev=45755&view=rev
Log:
Fix the MMX related shift/rotate regressions (PR1902)
Patch by Anders Carlsson, thanks!


Modified:
llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp

Modified: llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp?rev=45755&r1=45754&r2=45755&view=diff

==
--- llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/config/i386/llvm-i386.cpp Tue Jan  8 15:01:08 2008
@@ -79,7 +79,10 @@
   case IX86_BUILTIN_PSLLWI: {
 Function *psllw =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_w);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psllw, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -96,7 +99,10 @@
   case IX86_BUILTIN_PSLLDI: {
 Function *pslld =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_d);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(pslld, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -113,7 +119,10 @@
   case IX86_BUILTIN_PSLLQI: {
 Function *psllq =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_q);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psllq, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -130,7 +139,10 @@
   case IX86_BUILTIN_PSRLWI: {
 Function *psrlw =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_w);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psrlw, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -147,7 +159,10 @@
   case IX86_BUILTIN_PSRLDI: {
 Function *psrld =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_d);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psrld, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -164,7 +179,10 @@
   case IX86_BUILTIN_PSRLQI: {
 Function *psrlq =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_q);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1),
+   "bitcast");  
 Result = Builder.CreateCall(psrlq, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -181,7 +199,10 @@
   case IX86_BUILTIN_PSRAWI: {
 Function *psraw =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psra_w);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1),
+   "bitcast");  
 Result = Builder.CreateCall(psraw, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -198,7 

[llvm-commits] [llvm-gcc-4.2] r45754 - /llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 15:00:44 2008
New Revision: 45754

URL: http://llvm.org/viewvc/llvm-project?rev=45754&view=rev
Log:
Fix the MMX related shift/rotate regressions (PR1902)
Patch by Anders Carlsson, thanks!


Modified:
llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp

Modified: llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp?rev=45754&r1=45753&r2=45754&view=diff

==
--- llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/config/i386/llvm-i386.cpp Tue Jan  8 15:00:44 2008
@@ -79,7 +79,10 @@
   case IX86_BUILTIN_PSLLWI: {
 Function *psllw =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_w);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psllw, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -97,7 +100,10 @@
   case IX86_BUILTIN_PSLLDI: {
 Function *pslld =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_d);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(pslld, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -114,7 +120,10 @@
   case IX86_BUILTIN_PSLLQI: {
 Function *psllq =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psll_q);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psllq, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -132,7 +141,10 @@
   case IX86_BUILTIN_PSRLWI: {
 Function *psrlw =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_w);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psrlw, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -150,7 +162,10 @@
   case IX86_BUILTIN_PSRLDI: {
 Function *psrld =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_d);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1), 
+   "bitcast");  
 Result = Builder.CreateCall(psrld, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -167,7 +182,10 @@
   case IX86_BUILTIN_PSRLQI: {
 Function *psrlq =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psrl_q);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1),
+   "bitcast");  
 Result = Builder.CreateCall(psrlq, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -185,7 +203,10 @@
   case IX86_BUILTIN_PSRAWI: {
 Function *psraw =
   Intrinsic::getDeclaration(TheModule, Intrinsic::x86_mmx_psra_w);
-Ops[1] = BuildVector(Ops[1], UndefValue::get(Type::Int32Ty), NULL);
+Ops[1] = Builder.CreateZExt(Ops[1], Type::Int64Ty, "zext");
+Ops[1] = Builder.CreateBitCast(Ops[1], 
+   VectorType::get(Type::Int64Ty, 1),
+   "bitcast");  
 Result = Builder.CreateCall(psraw, Ops.begin(), Ops.begin()+2, "tmp");
 Result = Builder.CreateBitCast(Result, ResultType, "tmp");
 return true;
@@ -203,7

[llvm-commits] [llvm-gcc-4.2] r45757 - in /llvm-gcc-4.2/trunk/gcc: llvm-types.cpp tree.c tree.h

[Dale Johannesen]

Author: johannes
Date: Tue Jan  8 15:08:57 2008
New Revision: 45757

URL: http://llvm.org/viewvc/llvm-project?rev=45757&view=rev
Log:
Fix gcc->llvm translation for virtual base classes.  pr1746


Modified:
llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
llvm-gcc-4.2/trunk/gcc/tree.c
llvm-gcc-4.2/trunk/gcc/tree.h

Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=45757&r1=45756&r2=45757&view=diff

==
--- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Tue Jan  8 15:08:57 2008
@@ -1614,6 +1614,129 @@
 
 }
 
+/// Mapping from type to type-used-as-base-class and back.
+static DenseMap BaseTypesMap;
+
+/// FixBaseClassField - This method is called when we have a field Field
+/// of Record type within a Record, and the size of Field is smaller than the
+/// size of its Record type.  This may indicate the situation where a base 
class
+/// has virtual base classes which are not allocated.  Replace Field's original
+/// type with a modified one reflecting what actually gets allocated.
+///
+/// This can also occur when a class has an empty base class; the class will
+/// have size N+4 and the field size N+1.  In this case the fields will add
+/// up to N+4, so we haven't really changed anything.
+
+static tree FixBaseClassField(tree Field) {
+  tree oldTy = TREE_TYPE(Field);
+  tree &newTy = BaseTypesMap[oldTy];
+  // If already in table, reuse.
+  if (!newTy) {
+newTy = copy_node(oldTy);
+tree F2 = 0, prevF2 = 0;
+// Copy the fields up to the TYPE_DECL separator.
+// VAR_DECLs can also appear, representing static members.  Possibly some
+// other junk I haven't hit yet, just skip anything that's not a FIELD:(
+for (tree F = TYPE_FIELDS(oldTy); F; prevF2 = F2, F = TREE_CHAIN(F)) {
+  if (TREE_CODE(F) == TYPE_DECL)
+break;
+  if (TREE_CODE(F) == FIELD_DECL) {
+F2 = copy_node(F);
+if (prevF2)
+  TREE_CHAIN(prevF2) = F2;
+else
+  TYPE_FIELDS(newTy) = F2;
+TREE_CHAIN(F2) = 0;
+  }
+}
+BaseTypesMap[oldTy] = newTy;
+BaseTypesMap[newTy] = oldTy;
+/* Prevent gcc's garbage collector from destroying newTy.  The
+   GC code doesn't understand DenseMaps:( */
+llvm_note_type_used(newTy);
+TYPE_SIZE(newTy) = DECL_SIZE(Field);
+TYPE_SIZE_UNIT(newTy) = DECL_SIZE_UNIT(Field);
+TYPE_MAIN_VARIANT(newTy) = newTy;
+// Change the name.
+if (TYPE_NAME(oldTy)) {
+  const char *p = "anon";
+  if (TREE_CODE(TYPE_NAME(oldTy)) ==IDENTIFIER_NODE)
+p = IDENTIFIER_POINTER(TYPE_NAME(oldTy));
+  else if (DECL_NAME(TYPE_NAME(oldTy)))
+p = IDENTIFIER_POINTER(DECL_NAME(TYPE_NAME(oldTy)));
+  char *q = (char *)xmalloc(strlen(p)+6);
+  strcpy(q,p);
+  strcat(q,".base");
+  TYPE_NAME(newTy) = get_identifier(q);
+  free(q);
+}
+  }
+  return newTy;
+}
+
+/// FixBaseClassFields - alter the types referred to by Field nodes that
+/// represent base classes to reflect reality.
+//
+// Suppose we're converting type T.  Look for the case where a base class A
+// of T contains a virtual base class B, and B is not allocated when A is 
+// used as the base class of T.  This is indicated by the FIELD node for A
+// having a size smaller than the size of A, and the chain of fields for A
+// having a TYPE_DECL node in the middle of it; that node comes after the
+// allocated fields and before the unallocated virtual base classes.  Create
+// a new type A.base for LLVM purposes which does not contain the virtual
+// base classes.  (Where A is a virtual base class of T, there is also a BINFO
+// node for it, but not when A is a nonvirtual base class.  So we can't
+// use that.)
+static void FixBaseClassFields(tree type) {
+  assert(TREE_CODE(type)==RECORD_TYPE);
+  for (tree Field = TYPE_FIELDS(type); Field; Field = TREE_CHAIN(Field)) {
+if (TREE_CODE(Field)==FIELD_DECL && 
+!DECL_BIT_FIELD_TYPE(Field) &&
+TREE_CODE(DECL_FIELD_OFFSET(Field))==INTEGER_CST &&
+TREE_CODE(TREE_TYPE(Field))==RECORD_TYPE &&
+TYPE_SIZE(TREE_TYPE(Field)) &&
+DECL_SIZE(Field) &&
+TREE_INT_CST_LOW(DECL_SIZE(Field)) < 
+  TREE_INT_CST_LOW(TYPE_SIZE(TREE_TYPE(Field
+  TREE_TYPE(Field) = FixBaseClassField(Field);
+  }
+  // Size of the complete type will be a multiple of its alignment.
+  // In some cases involving empty C++ classes this is not true coming in.
+  // Earlier, the sizes in the field types were also wrong in a way that
+  // compensated as far as LLVM's translation code is concerned; now we
+  // have fixed that, and have to fix the size also.
+  if (TYPE_SIZE (type) && TREE_CODE(TYPE_SIZE(type)) == INTEGER_CST) {
+TYPE_SIZE(type) = build_int_cst(
+   TREE_TYPE(TYPE_SIZE(type)),
+   (TREE_INT_CST_LOW(TYPE_SIZ

[llvm-commits] [llvm] r45759 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp

[Owen Anderson]

Author: resistor
Date: Tue Jan  8 15:54:52 2008
New Revision: 45759

URL: http://llvm.org/viewvc/llvm-project?rev=45759&view=rev
Log:
Rename registers that do not need copies.

Modified:
llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp

Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45759&r1=45758&r2=45759&view=diff

==
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Tue Jan  8 15:54:52 2008
@@ -44,6 +44,7 @@
 
 std::map > Stacks;
 std::set UsedByAnother;
+std::map > RenameSets;
 
 bool runOnMachineFunction(MachineFunction &Fn);
 
@@ -442,7 +443,8 @@
   }
 }
 
-// FIXME: Cache renaming information
+// Cache renaming information
+RenameSets.insert(std::make_pair(P->getOperand(0).getReg(), PHIUnion));
 
 ProcessedNames.insert(PHIUnion.begin(), PHIUnion.end());
 ++P;
@@ -649,8 +651,22 @@
   // FIXME: This process should probably preserve LiveVariables
   InsertCopies(Fn.begin());
   
-  // FIXME: Perform renaming
-  // FIXME: Remove Phi instrs
+  // Perform renaming
+  typedef std::map > RenameSetType;
+  for (RenameSetType::iterator I = RenameSets.begin(), E = RenameSets.end();
+   I != E; ++I)
+for (std::set::iterator SI = I->second.begin(),
+ SE = I->second.end(); SI != SE; ++SI)
+  Fn.getRegInfo().replaceRegWith(*SI, I->first);
+  
+  // FIXME: Insert last-minute copies
+  
+  // Remove PHIs
+  for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
+for (MachineBasicBlock::iterator BI = I->begin(), BE = I->end();
+ BI != BE; ++BI)
+  if (BI->getOpcode() == TargetInstrInfo::PHI)
+BI->eraseFromParent();
   
   return false;
 }


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[llvm-commits] [llvm] r45758 - /llvm/trunk/test/CodeGen/X86/2008-01-08-IllegalCMP.ll

[Duncan Sands]

Author: baldrick
Date: Tue Jan  8 15:51:53 2008
New Revision: 45758

URL: http://llvm.org/viewvc/llvm-project?rev=45758&view=rev
Log:
Crashes llc when using Chris's new legalization logic.

Added:
llvm/trunk/test/CodeGen/X86/2008-01-08-IllegalCMP.ll

Added: llvm/trunk/test/CodeGen/X86/2008-01-08-IllegalCMP.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-01-08-IllegalCMP.ll?rev=45758&view=auto

==
--- llvm/trunk/test/CodeGen/X86/2008-01-08-IllegalCMP.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-01-08-IllegalCMP.ll Tue Jan  8 15:51:53 
2008
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc
+
+target datalayout = 
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i64 @__absvdi2(i64 %a) nounwind  {
+entry:
+   %w.0 = select i1 false, i64 0, i64 %a   ;  [#uses=2]
+   %tmp9 = icmp slt i64 %w.0, 0;  [#uses=1]
+   br i1 %tmp9, label %bb12, label %bb13
+
+bb12:  ; preds = %entry
+   unreachable
+
+bb13:  ; preds = %entry
+   ret i64 %w.0
+}


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Re: [llvm-commits] [llvm] r45687 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/MachineInstr.cpp lib/CodeGen/SelectionDAG/ScheduleDAG.cpp lib/Target/X86/X86CodeEmitter.cpp utils/T

[Evan Cheng]

Comments are accurate. Thx!

Evan
On Jan 6, 2008, at 9:19 PM, Chris Lattner wrote:

> Author: lattner
> Date: Sun Jan  6 23:19:29 2008
> New Revision: 45687
>
> URL: http://llvm.org/viewvc/llvm-project?rev=45687&view=rev
> Log:
> rename hasVariableOperands() -> isVariadic().  Add some comments.
> Evan, please review the comments I added to getNumDefs to make sure
> that they are accurate, thx.
>
> Modified:
>llvm/trunk/include/llvm/Target/TargetInstrInfo.h
>llvm/trunk/lib/CodeGen/MachineInstr.cpp
>llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
>llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
>llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
>llvm/trunk/utils/TableGen/CodeGenInstruction.h
>llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
>llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
>
> Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
> URL: 
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45687&r1=45686&r2=45687&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Sun Jan  6  
> 23:19:29 2008
> @@ -125,9 +125,7 @@
> // block.
> const unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 12;
>
> -// M_VARIABLE_OPS - Set if this instruction can have a variable  
> number of extra
> -// operands in addition to the minimum number operands specified.
> -const unsigned M_VARIABLE_OPS  = 1 << 13;
> +const unsigned M_VARIADIC  = 1 << 13;
>
> // M_PREDICABLE - Set if this instruction has a predicate operand that
> // controls execution. It may be set to 'always'.
> @@ -141,8 +139,6 @@
> // (e.g. instructions with unique labels attached).
> const unsigned M_NOT_DUPLICABLE= 1 << 16;
>
> -// M_HAS_OPTIONAL_DEF - Set if this instruction has an optional  
> definition, e.g.
> -// ARM instructions which can set condition code if 's' bit is set.
> const unsigned M_HAS_OPTIONAL_DEF  = 1 << 17;
>
> // M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction has no side  
> effects that
> @@ -182,7 +178,7 @@
>   /// it is set. Returns -1 if it is not set.
>   int getOperandConstraint(unsigned OpNum,
>TOI::OperandConstraint Constraint) const {
> -assert((OpNum < NumOperands || hasVariableOperands()) &&
> +assert((OpNum < NumOperands || isVariadic()) &&
>"Invalid operand # of TargetInstrInfo");
> if (OpNum < NumOperands &&
> (OpInfo[OpNum].Constraints & (1 << Constraint))) {
> @@ -202,18 +198,32 @@
> return Name;
>   }
>
> +  /// getNumOperands - Return the number of declared  
> MachineOperands for this
> +  /// MachineInstruction.  Note that variadic (isVariadic() returns  
> true)
> +  /// instructions may have additional operands at the end of the  
> list, and note
> +  /// that the machine instruction may include implicit register  
> def/uses as
> +  /// well.
>   unsigned getNumOperands() const {
> return NumOperands;
>   }
>
> +  /// getNumDefs - Return the number of MachineOperands that are  
> register
> +  /// definitions.  Register definitions always occur at the start  
> of the
> +  /// machine operand list.  This is the number of "outs" in  
> the .td file.
>   unsigned getNumDefs() const {
> return NumDefs;
>   }
>
> -  bool hasVariableOperands() const {
> -return Flags & M_VARIABLE_OPS;
> +  /// isVariadic - Return true if this instruction can have a  
> variable number of
> +  /// operands.  In this case, the variable operands will be after  
> the normal
> +  /// operands but before the implicit definitions and uses (if any  
> are
> +  /// present).
> +  bool isVariadic() const {
> +return Flags & M_VARIADIC;
>   }
>
> +  /// hasOptionalDef - Set if this instruction has an optional  
> definition, e.g.
> +  /// ARM instructions which can set condition code if 's' bit is  
> set.
>   bool hasOptionalDef() const {
> return Flags & M_HAS_OPTIONAL_DEF;
>   }
>
> Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
> URL: 
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=45687&r1=45686&r2=45687&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ==
> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Sun Jan  6 23:19:29 2008
> @@ -488,8 +488,7 @@
> ///
> bool MachineInstr::OperandsComplete() const {
>   unsigned short NumOperands = TID->getNumOperands();
> -  if (TID->hasVariableOperands() == 0 &&
> -  getNumOperands()-NumImplicitOps >= NumOperands)
> +  if (!TID->isVariadic() && getNumOperands()-NumImplicitOps >=  
> NumOperands)
> return true;  // Broken: we have all the operands of this  
> instruction!
>   return false;
> }
> @@ -498,7 +497,7 @@
> ///
> unsigned MachineInstr::getNumExpli

Re: [llvm-commits] [llvm] r45027 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/VMCore/AutoUpgrade.cpp test/Assembler/AutoUpgradeIntrinsics.ll

[Evan Cheng]

It looks ok. But please add test cases that cover more than one of  
these intrinsics please.

Evan

On Jan 6, 2008, at 4:35 AM, Bill Wendling wrote:

> Here's a potential patch as a follow-up for this patch:
>
> 
>
> It's not tested (I got a compiler error during compilation of  
> LLVM...not LLVM-GCC). What do you think?
>
> -bw
>
> On Dec 13, 2007, at 10:38 PM, Anders Carlsson wrote:
>
>> Author: andersca
>> Date: Fri Dec 14 00:38:54 2007
>> New Revision: 45027
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=45027&view=rev
>> Log:
>> All MMX shift instructions took a <2 x i32> vector as the shift  
>> amount parameter. Change this to be <1 x i64> instead, which  
>> matches the assembler instruction.
>>
>> Modified:
>>llvm/trunk/include/llvm/IntrinsicsX86.td
>>llvm/trunk/lib/VMCore/AutoUpgrade.cpp
>>llvm/trunk/test/Assembler/AutoUpgradeIntrinsics.ll
>>
>> Modified: llvm/trunk/include/llvm/IntrinsicsX86.td
>> URL: 
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45027&r1=45026&r2=45027&view=diff
>>
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> =
>> --- llvm/trunk/include/llvm/IntrinsicsX86.td (original)
>> +++ llvm/trunk/include/llvm/IntrinsicsX86.td Fri Dec 14 00:38:54 2007
>> @@ -767,30 +767,30 @@
>>   // Shift left logical
>>   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
>>   Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>>   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
>>   Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>>   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
>>   Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>>
>>   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
>>   Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>>   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
>>   Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>>   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
>>   Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>>
>>   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
>>   Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>>   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
>>   Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
>> - llvm_v2i32_ty], [IntrNoMem]>;
>> + llvm_v1i64_ty], [IntrNoMem]>;
>> }
>>
>> // Pack ops.
>>
>> Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp
>> URL: 
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=45027&r1=45026&r2=45027&view=diff
>>
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> =
>> --- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original)
>> +++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Fri Dec 14 00:38:54 2007
>> @@ -12,6 +12,7 @@
>> // 
>> = 
>> = 
>> = 
>> --= 
>> ==//
>>
>> #include "llvm/AutoUpgrade.h"
>> +#include "llvm/Constants.h"
>> #include "llvm/Function.h"
>> #include "llvm/Module.h"
>> #include "llvm/Instructions.h"
>> @@ -110,6 +111,39 @@
>> }
>>
>> break;
>> +  case 'x':
>> +// This fixes all MMX shift intrinsic instructions to take a
>> +// v1i64 instead of a v2i32 as the second parameter.
>> +if (Name.compare(5,10,"x86.mmx.ps",10) == 0 &&
>> +(Name.compare(13,4,"psll", 4) == 0 ||
>> + Name.compare(13,4,"psra", 4) == 0 ||
>> + Name.compare(13,4,"psrl", 4) == 0)) {
>> +
>> +  const llvm::Type *VT = VectorType::get(IntegerType::get(64),  
>> 1);
>> +
>> +  // We don't have to do anything if the parameter already has
>> +  // the correct type.
>> +  if (FTy->getParamType(1) == VT)
>> +break;
>> +
>> +  //  We first need to change the name of the old (bad)  
>> intrinsic, because
>> +  //  its type is incorrect, but we cannot overload that name.  
>> We
>> +  //  arbitrarily unique it here allowing us to construct a  
>> correctly named
>> +  // 

Re: [llvm-commits] [llvm-gcc-4.2] r45757 - in /llvm-gcc-4.2/trunk/gcc: llvm-types.cpp tree.c tree.h

[Dale Johannesen]

On Jan 8, 2008, at 2:28 PM, Chris Lattner wrote:

> On Jan 8, 2008, at 1:08 PM, Dale Johannesen wrote:
>> URL: http://llvm.org/viewvc/llvm-project?rev=45757&view=rev
>> Log:
>> Fix gcc->llvm translation for virtual base classes.  pr1746
>
> Yay, very nice Dale.
>
>> +/// Mapping from type to type-used-as-base-class and back.
>> +static DenseMap BaseTypesMap;
>
> Does this play well with PCH?  Please add a comment above this that  
> says that the trees are kept pinned for the GC by the  
> llvm_types_used map.
>
> If this doesn't work with PCH (Devang, thoughts?) it might be better  
> to use the GCC splay tree or whatever they use for tree->tree  
> mappings.

I haven't tried it (except that there are no failures in the PCH part  
of the gcc testsuite, which probably doesn't prove much).
It should be OK for the map to be zeroes after a PCH read; all that  
will happen is some trees get rebuilt when this might be avoidable.
It should also be OK for it to contain tree's, since all such trees  
are referred to from GTY'd storage.


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Re: [llvm-commits] [llvm-gcc-4.2] r45757 - in /llvm-gcc-4.2/trunk/gcc: llvm-types.cpp tree.c tree.h

[Chris Lattner]

On Jan 8, 2008, at 1:08 PM, Dale Johannesen wrote:
> URL: http://llvm.org/viewvc/llvm-project?rev=45757&view=rev
> Log:
> Fix gcc->llvm translation for virtual base classes.  pr1746

Yay, very nice Dale.

> +/// Mapping from type to type-used-as-base-class and back.
> +static DenseMap BaseTypesMap;

Does this play well with PCH?  Please add a comment above this that  
says that the trees are kept pinned for the GC by the llvm_types_used  
map.

If this doesn't work with PCH (Devang, thoughts?) it might be better  
to use the GCC splay tree or whatever they use for tree->tree mappings.

Thanks for tackling this Dale,

-Chris

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Re: [llvm-commits] [llvm-gcc-4.2] r45757 - in /llvm-gcc-4.2/trunk/gcc: llvm-types.cpp tree.c tree.h

[Chris Lattner]

>>> +/// Mapping from type to type-used-as-base-class and back.
>>> +static DenseMap BaseTypesMap;
>>
>> Does this play well with PCH?  Please add a comment above this that  
>> says that the trees are kept pinned for the GC by the  
>> llvm_types_used map.
>>
>> If this doesn't work with PCH (Devang, thoughts?) it might be  
>> better to use the GCC splay tree or whatever they use for tree- 
>> >tree mappings.
>
> I haven't tried it (except that there are no failures in the PCH  
> part of the gcc testsuite, which probably doesn't prove much).
> It should be OK for the map to be zeroes after a PCH read; all that  
> will happen is some trees get rebuilt when this might be avoidable.
> It should also be OK for it to contain tree's, since all such trees  
> are referred to from GTY'd storage.

Ok.  Devang, when it gets read in, will it be default constructed?  If  
so, this should be ok then.

-Chris
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[llvm-commits] [llvm] r45762 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/longlong-deadload.ll

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 17:08:06 2008
New Revision: 45762

URL: http://llvm.org/viewvc/llvm-project?rev=45762&view=rev
Log:
Make load->store deletion a bit smarter.  This allows us to compile this:

void test(long long *P) { *P ^= 1; }

into just:

_test:
movl4(%esp), %eax
xorl$1, (%eax)
ret

instead of code like this:

_test:
movl4(%esp), %ecx
xorl$1, (%ecx)
movl4(%ecx), %edx
movl%edx, 4(%ecx)
ret


Added:
llvm/trunk/test/CodeGen/X86/longlong-deadload.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=45762&r1=45761&r2=45762&view=diff

==
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Jan  8 17:08:06 2008
@@ -4122,6 +4122,34 @@
   return SDOperand();
 }
 
+/// ReachesChainWithoutSideEffects - Do a little local search to see if Src can
+/// reach Dest without any side effects like a store, or call.  Non-volatile
+/// loads are ok though.
+static bool ReachesChainWithoutSideEffects(SDOperand Src, SDOperand Dest,
+   unsigned Depth = 0) {
+  if (Src == Dest) return true;
+  
+  // Don't search too deeply, we just want to be able to see through
+  // TokenFactor's etc.
+  if (Depth == 2) return false;
+  
+  // If this is a token factor, all inputs to the TF happen in parallel.  If 
any
+  // of the operands of the TF reach dest, then we can do the xform.
+  if (Src.getOpcode() == ISD::TokenFactor) {
+for (unsigned i = 0, e = Src.getNumOperands(); i != e; ++i)
+  if (ReachesChainWithoutSideEffects(Src.getOperand(i), Dest, Depth+1))
+return true;
+return false;
+  }
+  
+  // Loads don't have side effects, look through them.
+  if (LoadSDNode *Ld = dyn_cast(Src)) {
+if (!Ld->isVolatile())
+  return ReachesChainWithoutSideEffects(Ld->getChain(), Dest, Depth+1);
+  }
+  return false;
+}
+
 SDOperand DAGCombiner::visitSTORE(SDNode *N) {
   StoreSDNode *ST  = cast(N);
   SDOperand Chain = ST->getChain();
@@ -4250,10 +4278,12 @@
   // If this is a load followed by a store to the same location, then the store
   // is dead/noop.
   if (LoadSDNode *Ld = dyn_cast(Value)) {
-if (Chain.Val == Ld && Ld->getBasePtr() == Ptr &&
+if (Ld->getBasePtr() == Ptr && ST->getStoredVT() == Ld->getLoadedVT() &&
 ST->getAddressingMode() == ISD::UNINDEXED &&
-ST->getStoredVT() == Ld->getLoadedVT() &&
-!ST->isVolatile()) {
+!ST->isVolatile() &&
+// There can't be any side effects between the load and store, such as
+// a call or store.
+ReachesChainWithoutSideEffects(Chain, SDOperand(Ld, 1))) {
   // The store is dead, remove it.
   return Chain;
 }

Added: llvm/trunk/test/CodeGen/X86/longlong-deadload.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/longlong-deadload.ll?rev=45762&view=auto

==
--- llvm/trunk/test/CodeGen/X86/longlong-deadload.ll (added)
+++ llvm/trunk/test/CodeGen/X86/longlong-deadload.ll Tue Jan  8 17:08:06 2008
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=x86 | not grep '4{(%...)}
+; This should not load or store the top part of *P.
+
+define void @test(i64* %P) nounwind  {
+entry:
+   %tmp1 = load i64* %P, align 8   ;  [#uses=1]
+   %tmp2 = xor i64 %tmp1, 1;  [#uses=1]
+   store i64 %tmp2, i64* %P, align 8
+   ret void
+}
+


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[llvm-commits] [llvm-gcc-4.2] r45761 - /llvm-gcc-4.2/trunk/gcc/objc/objc-act.c

[Bill Wendling]

Author: void
Date: Tue Jan  8 17:05:19 2008
New Revision: 45761

URL: http://llvm.org/viewvc/llvm-project?rev=45761&view=rev
Log:
Revert r45741; this broke the Objective-C ABI. Instead, mark metadata as
"external".

Modified:
llvm-gcc-4.2/trunk/gcc/objc/objc-act.c

Modified: llvm-gcc-4.2/trunk/gcc/objc/objc-act.c
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/objc/objc-act.c?rev=45761&r1=45760&r2=45761&view=diff

==
--- llvm-gcc-4.2/trunk/gcc/objc/objc-act.c (original)
+++ llvm-gcc-4.2/trunk/gcc/objc/objc-act.c Tue Jan  8 17:05:19 2008
@@ -9925,24 +9925,12 @@
   /* struct class_t OBJC_CLASS_$_; */
   UOBJC_V2_CLASS_decl = build_metadata_decl ("OBJC_CLASS_$",
 /* APPLE LOCAL radar 5202926 */
- /* APPLE LOCAL begin radar 
5658734 */
-#ifndef ENABLE_LLVM
  objc_v2_class_template, true);
-#else
- objc_v2_class_template, false);
-#endif
- /* APPLE LOCAL end radar 5658734 
*/
 
  /* struct class_t OBJC_METACLASS_$_; */
  UOBJC_V2_METACLASS_decl = build_metadata_decl ("OBJC_METACLASS_$",
/* APPLE LOCAL radar 5202926 */
-/* APPLE LOCAL begin radar 
5658734 */
-#ifndef ENABLE_LLVM
 objc_v2_class_template, true);
-#else
-objc_v2_class_template, false);
-#endif
-/* APPLE LOCAL end radar 
5658734 */
 }
 
 static void
@@ -12046,16 +12034,12 @@
   sav = objc_implementation_context;
   objc_implementation_context = my_root_int;
   /* APPLE LOCAL radar 5202926 */
-  /* APPLE LOCAL begin radar 5658734 */
-#ifndef ENABLE_LLVM
-  root_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template,
-   true);
-#else
-  root_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template,
-   false);
+  root_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template, true);
+  /* APPLE LOCAL LLVM begin - radar 5658734 */
+#ifdef ENABLE_LLVM
+  DECL_EXTERNAL(root_expr) = 1;
 #endif
-  root_expr = update_var_decl (root_expr);
-  /* APPLE LOCAL end radar 5658734 */
+  /* APPLE LOCAL LLVM end - radar 5658734 */
   root_expr = build_fold_addr_expr (root_expr);
 
   /* Install class `isa' and `super' pointers at runtime.  */
@@ -12066,32 +12050,20 @@
  back-end, recognizes '_OBJC_' prefix and prepends an 'L' in front of 
this. Darwin
  assembler treats names starting with 'L_' as local symbols. */
   /* APPLE LOCAL radar 5202926 */
-  /* APPLE LOCAL begin radar 5658734 */
-#ifndef ENABLE_LLVM
-  class_superclass_expr = build_metadata_decl ("OBJC_CLASS_$",
-   objc_v2_class_template,
-   true);
-#else
-  class_superclass_expr = build_metadata_decl ("OBJC_CLASS_$",
-   objc_v2_class_template,
-   false);
+  class_superclass_expr = build_metadata_decl ("OBJC_CLASS_$", 
objc_v2_class_template, true);
+  /* APPLE LOCAL LLVM begin - radar 5658734 */
+#ifdef ENABLE_LLVM
+  DECL_EXTERNAL(class_superclass_expr) = 1;
 #endif
-  class_superclass_expr = update_var_decl (class_superclass_expr);
-  /* APPLE LOCAL end radar 5658734 */
+  /* APPLE LOCAL LLVM end - radar 5658734 */
   class_superclass_expr = build_fold_addr_expr (class_superclass_expr);
   /* APPLE LOCAL radar 5202926 */
-  /* APPLE LOCAL begin radar 5658734 */
-#ifndef ENABLE_LLVM
-  metaclass_superclass_expr = build_metadata_decl ("OBJC_METACLASS_$",
-   objc_v2_class_template,
-   true);
-#else
-  metaclass_superclass_expr = build_metadata_decl ("OBJC_METACLASS_$",
-   objc_v2_class_template,
-   false);
+  metaclass_superclass_expr = build_metadata_decl ("OBJC_METACLASS_$", 
objc_v2_class_template, true);
+  /* APPLE LOCAL LLVM begin - radar 5658734 */
+#ifdef ENABLE_LLVM
+  DECL_EXTERNAL(metaclass_superclass_expr) = 1;
 #endif
-  metaclass_superclass_expr = update_var_decl (metaclass_superclass_expr);
-  /* APPLE LOCAL end radar 5658734 */
+  /* APPLE LOCAL LLVM end - radar 5658734 */
   metaclass_superclass_expr = build_fold_addr_expr 
(metaclass_superclass_expr);
   objc_impl

Re: [llvm-commits] [llvm-gcc-4.2] r45757 - in /llvm-gcc-4.2/trunk/gcc: llvm-types.cpp tree.c tree.h

[Devang Patel]

On Jan 8, 2008, at 2:36 PM, Dale Johannesen wrote:

>
> On Jan 8, 2008, at 2:28 PM, Chris Lattner wrote:
>
>> On Jan 8, 2008, at 1:08 PM, Dale Johannesen wrote:
>>> URL: http://llvm.org/viewvc/llvm-project?rev=45757&view=rev
>>> Log:
>>> Fix gcc->llvm translation for virtual base classes.  pr1746
>>
>> Yay, very nice Dale.
>>
>>> +/// Mapping from type to type-used-as-base-class and back.
>>> +static DenseMap BaseTypesMap;
>>
>> Does this play well with PCH?  Please add a comment above this that  
>> says that the trees are kept pinned for the GC by the  
>> llvm_types_used map.
>>
>> If this doesn't work with PCH (Devang, thoughts?) it might be  
>> better to use the GCC splay tree or whatever they use for tree- 
>> >tree mappings.
>
> I haven't tried it (except that there are no failures in the PCH  
> part of the gcc testsuite, which probably doesn't prove much).
> It should be OK for the map to be zeroes after a PCH read; all that  
> will happen is some trees get rebuilt when this might be avoidable.


> It should also be OK for it to contain tree's, since all such trees  
> are referred to from GTY'd storage.

BaseTypeMap is empty at the beginning. PCH reading does not insert any  
entries so this map will be empty after PCH read. If LLVM types refers  
to mapped tree nodes then it is OK because such tree nodes are GTY'd.

As long as it is safe to rebuilt some trees for BaseTypeMap this patch  
looks OK.

-
Devang



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[llvm-commits] [llvm-gcc-4.2] r45765 - /llvm-gcc-4.2/trunk/gcc/llvm-types.cpp

[Dale Johannesen]

Author: johannes
Date: Tue Jan  8 18:16:55 2008
New Revision: 45765

URL: http://llvm.org/viewvc/llvm-project?rev=45765&view=rev
Log:
Watch out for overflow rounding up sizes of large objects.


Modified:
llvm-gcc-4.2/trunk/gcc/llvm-types.cpp

Modified: llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-types.cpp?rev=45765&r1=45764&r2=45765&view=diff

==
--- llvm-gcc-4.2/trunk/gcc/llvm-types.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-types.cpp Tue Jan  8 18:16:55 2008
@@ -1706,14 +1706,25 @@
   // compensated as far as LLVM's translation code is concerned; now we
   // have fixed that, and have to fix the size also.
   if (TYPE_SIZE (type) && TREE_CODE(TYPE_SIZE(type)) == INTEGER_CST) {
-TYPE_SIZE(type) = build_int_cst(
-   TREE_TYPE(TYPE_SIZE(type)),
-   (TREE_INT_CST_LOW(TYPE_SIZE(type))+TYPE_ALIGN(type)-1) &
-   ~(TYPE_ALIGN(type)-1));
-TYPE_SIZE_UNIT(type) = build_int_cst(
-   TREE_TYPE(TYPE_SIZE_UNIT(type)),
-   (TREE_INT_CST_LOW(TYPE_SIZE_UNIT(type))+TYPE_ALIGN_UNIT(type)-1) &
-   ~(TYPE_ALIGN_UNIT(type)-1));
+// This computes (size+align-1) & ~(align-1)
+// NB "sizetype" is #define'd in one of the gcc headers.  Gotcha!
+tree size_type = TREE_TYPE(TYPE_SIZE(type));
+tree alignm1 = fold_build2(PLUS_EXPR, size_type,
+build_int_cst(size_type, TYPE_ALIGN(type)),
+fold_build1(NEGATE_EXPR, size_type,
+  build_int_cst(size_type, 1)));
+tree lhs = fold_build2(PLUS_EXPR, size_type, TYPE_SIZE(type), alignm1);
+tree rhs = fold_build1(BIT_NOT_EXPR, size_type, alignm1);
+TYPE_SIZE(type) = fold_build2(BIT_AND_EXPR, size_type, lhs, rhs);
+
+size_type = TREE_TYPE(TYPE_SIZE_UNIT(type));
+alignm1 = fold_build2(PLUS_EXPR, size_type,
+build_int_cst(size_type, 
TYPE_ALIGN_UNIT(type)),
+fold_build1(NEGATE_EXPR, size_type,
+build_int_cst(size_type, 1)));
+lhs = fold_build2(PLUS_EXPR, size_type, TYPE_SIZE_UNIT(type), alignm1);
+rhs = fold_build1(BIT_NOT_EXPR, size_type, alignm1);
+TYPE_SIZE_UNIT(type) = fold_build2(BIT_AND_EXPR, size_type, lhs, rhs);
   }
 }
 


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[llvm-commits] [llvm] r45766 - /llvm/trunk/lib/Target/README.txt

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 18:17:57 2008
New Revision: 45766

URL: http://llvm.org/viewvc/llvm-project?rev=45766&view=rev
Log:
add a note

Modified:
llvm/trunk/lib/Target/README.txt

Modified: llvm/trunk/lib/Target/README.txt
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=45766&r1=45765&r2=45766&view=diff

==
--- llvm/trunk/lib/Target/README.txt (original)
+++ llvm/trunk/lib/Target/README.txt Tue Jan  8 18:17:57 2008
@@ -524,3 +524,24 @@
 http://burtleburtle.net/bob/hash/perfect.html
 
 //===-===//
+
+We should turn things like "load+fabs+store" and "load+fneg+store" into the
+corresponding integer operations.  On a yonah, this loop:
+
+double a[256];
+ for (b = 0; b < 1000; b++)
+ for (i = 0; i < 256; i++)
+   a[i] = -a[i];
+
+is twice as slow as this loop:
+
+long long a[256];
+ for (b = 0; b < 1000; b++)
+ for (i = 0; i < 256; i++)
+   a[i] ^= (1ULL << 63);
+
+and I suspect other processors are similar.  On X86 in particular this is a
+big win because doing this with integers allows the use of read/modify/write
+instructions.
+
+//===-===//


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[llvm-commits] [llvm] r45768 - in /llvm/trunk/lib/Target/X86: README.txt X86InstrInfo.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 18:37:18 2008
New Revision: 45768

URL: http://llvm.org/viewvc/llvm-project?rev=45768&view=rev
Log:
add a testcase 

Modified:
llvm/trunk/lib/Target/X86/README.txt
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/trunk/lib/Target/X86/README.txt
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=45768&r1=45767&r2=45768&view=diff

==
--- llvm/trunk/lib/Target/X86/README.txt (original)
+++ llvm/trunk/lib/Target/X86/README.txt Tue Jan  8 18:37:18 2008
@@ -1601,13 +1601,13 @@
 In SSE mode, we turn abs and neg into a load from the constant pool plus a xor
 or and instruction, for example:
 
-   xorpd   LCPI2_0-"L2$pb"(%esi), %xmm2
+   xorpd   LCPI1_0, %xmm2
 
 However, if xmm2 gets spilled, we end up with really ugly code like this:
 
-   %xmm2 = reload [mem]
-   xorpd   LCPI2_0-"L2$pb"(%esi), %xmm2
-   store %xmm2 -> [mem]
+   movsd   (%esp), %xmm0
+   xorpd   LCPI1_0, %xmm0
+   movsd   %xmm0, (%esp)
 
 Since we 'know' that this is a 'neg', we can actually "fold" the spill into
 the neg/abs instruction, turning it into an *integer* operation, like this:
@@ -1615,6 +1615,17 @@
xorl 2147483648, [mem+4] ## 2147483648 = (1 << 31)
 
 you could also use xorb, but xorl is less likely to lead to a partial register
-stall.
+stall.  Here is a contrived testcase:
+
+double a, b, c;
+void test(double *P) {
+  double X = *P;
+  a = X;
+  bar();
+  X = -X;
+  b = X;
+  bar();
+  c = X;
+}
 
 //===-===//

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=45768&r1=45767&r2=45768&view=diff

==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Tue Jan  8 18:37:18 2008
@@ -1740,8 +1740,7 @@
   
   // No fusion 
   if (PrintFailedFusing)
-cerr << "We failed to fuse ("
- << ((i == 1) ? "r" : "s") << "): " << *MI;
+cerr << "We failed to fuse operand " << i << *MI;
   return NULL;
 }
 
@@ -1773,8 +1772,8 @@
 }
 
 MachineInstr* X86InstrInfo::foldMemoryOperand(MachineInstr *MI,
- SmallVectorImpl 
&Ops,
- MachineInstr *LoadMI) const {
+  SmallVectorImpl &Ops,
+  MachineInstr *LoadMI) const {
   // Check switch flag 
   if (NoFusing) return NULL;
 
@@ -1802,7 +1801,7 @@
 
 
 bool X86InstrInfo::canFoldMemoryOperand(MachineInstr *MI,
- SmallVectorImpl &Ops) const 
{
+SmallVectorImpl &Ops) const {
   // Check switch flag 
   if (NoFusing) return 0;
 


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[llvm-commits] [llvm] r45770 - /llvm/trunk/tools/llvm-ld/llvm-ld.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan  8 19:01:17 2008
New Revision: 45770

URL: http://llvm.org/viewvc/llvm-project?rev=45770&view=rev
Log:
Fix llvm-ld -Xlinker, patch by Daniel Teske!

Modified:
llvm/trunk/tools/llvm-ld/llvm-ld.cpp

Modified: llvm/trunk/tools/llvm-ld/llvm-ld.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-ld/llvm-ld.cpp?rev=45770&r1=45769&r2=45770&view=diff

==
--- llvm/trunk/tools/llvm-ld/llvm-ld.cpp (original)
+++ llvm/trunk/tools/llvm-ld/llvm-ld.cpp Tue Jan  8 19:01:17 2008
@@ -338,10 +338,8 @@
   }
 
   // Add the requested options
-  for (unsigned index = 0; index < XLinker.size(); index++) {
+  for (unsigned index = 0; index < XLinker.size(); index++)
 args.push_back(XLinker[index]);
-args.push_back(Libraries[index]);
-  }
 
   // Add in the libraries to link.
   for (unsigned index = 0; index < LinkItems.size(); index++)


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[llvm-commits] [llvm] r45772 - in /llvm/trunk: include/llvm/IntrinsicsX86.td test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll test/CodeGen/X86/vec_shift.ll

[Evan Cheng]

Author: evancheng
Date: Tue Jan  8 20:16:44 2008
New Revision: 45772

URL: http://llvm.org/viewvc/llvm-project?rev=45772&view=rev
Log:
Fix sse2.psrl.w and sse2.psrl.q definitions.

Added:
llvm/trunk/test/CodeGen/X86/vec_shift.ll
Modified:
llvm/trunk/include/llvm/IntrinsicsX86.td
llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll

Modified: llvm/trunk/include/llvm/IntrinsicsX86.td
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45772&r1=45771&r2=45772&view=diff

==
--- llvm/trunk/include/llvm/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsX86.td Tue Jan  8 20:16:44 2008
@@ -329,13 +329,13 @@
  llvm_i32_ty], [IntrNoMem]>;
   def int_x86_sse2_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw128">,
   Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
- llvm_v4i32_ty], [IntrNoMem]>;
+ llvm_v8i16_ty], [IntrNoMem]>;
   def int_x86_sse2_psrl_d : GCCBuiltin<"__builtin_ia32_psrld128">,
   Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
  llvm_v4i32_ty], [IntrNoMem]>;
   def int_x86_sse2_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq128">,
   Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
- llvm_v4i32_ty], [IntrNoMem]>;
+ llvm_v2i64_ty], [IntrNoMem]>;
   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
   Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
  llvm_i32_ty], [IntrNoMem]>;

Modified: llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll?rev=45772&r1=45771&r2=45772&view=diff

==
--- llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll Tue Jan  8 
20:16:44 2008
@@ -3,7 +3,7 @@
 
 declare <8 x i16> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>)
 
-declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <4 x i32>)
+declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>)
 
 define fastcc void @test(i32* %src, i32 %sbpr, i32* %dst, i32 %dbpr, i32 %w, 
i32 %h, i32 %dstalpha, i32 %mask) {
%tmp633 = shufflevector <8 x i16> zeroinitializer, <8 x i16> undef, <8 
x i32> < i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7 >
@@ -12,7 +12,7 @@
%tmp777 = add <4 x i32> %tmp776, shufflevector (<4 x i32> < i32 65537, 
i32 0, i32 0, i32 0 >, <4 x i32> < i32 65537, i32 0, i32 0, i32 0 >, <4 x i32> 
zeroinitializer)
%tmp805 = add <4 x i32> %tmp777, zeroinitializer
%tmp832 = bitcast <4 x i32> %tmp805 to <8 x i16>
-   %tmp838 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp832, 
<4 x i32> < i32 8, i32 undef, i32 undef, i32 undef > )
+   %tmp838 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp832, 
<8 x i16> < i16 8, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 
undef, i16 undef > )
%tmp1020 = tail call <8 x i16> @llvm.x86.sse2.packuswb.128( <8 x i16> 
zeroinitializer, <8 x i16> %tmp838 )
%tmp1030 = bitcast <8 x i16> %tmp1020 to <4 x i32>
%tmp1033 = add <4 x i32> zeroinitializer, %tmp1030

Added: llvm/trunk/test/CodeGen/X86/vec_shift.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shift.ll?rev=45772&view=auto

==
--- llvm/trunk/test/CodeGen/X86/vec_shift.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vec_shift.ll Tue Jan  8 20:16:44 2008
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psllw
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psrlq
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep psraw
+
+define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind  {
+entry:
+   %tmp6 = bitcast <2 x i64> %c to <8 x i16>   ; <<8 x i16>> 
[#uses=1]
+   %tmp8 = bitcast <2 x i64> %b1 to <8 x i16>  ; <<8 x i16>> 
[#uses=1]
+   %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 
x i16> %tmp6 ) nounwind readnone ; <<8 x i16>> [#uses=1]
+   %tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64>   ; <<2 x i64>> 
[#uses=1]
+   ret <2 x i64> %tmp10
+}
+
+define <2 x i64> @t3(<2 x i64> %b1, i32 %c) nounwind  {
+entry:
+   %tmp2 = bitcast <2 x i64> %b1 to <8 x i16>  ; <<8 x i16>> 
[#uses=1]
+   %tmp4 = insertelement <4 x i32> undef, i32 %c, i32 0; <<4 x 
i32>> [#uses=1]
+   %tmp8 = bitcast <4 x i32> %tmp4 to <8 x i16>; <<8 x i16>> 
[#uses=1]
+   %tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 
x i16> %tmp8 )   ; <<8 x i16>> [#uses=1]
+   %tmp11 = bit

[llvm-commits] CVS: llvm-www/devmtg/current/

[LLVM]

Changes in directory llvm-www/devmtg/current:

---
Log message:

Directory /var/cvs/llvm/llvm-www/devmtg/current added to the repository


---
Diffs of the changes:  (+0 -0)

 0 files changed



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[llvm-commits] [llvm] r45773 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp

[Owen Anderson]

Author: resistor
Date: Wed Jan  9 00:19:05 2008
New Revision: 45773

URL: http://llvm.org/viewvc/llvm-project?rev=45773&view=rev
Log:
Fix some simple bugs.  StrongPHIElimination now does not crash on 164.gzip.

Modified:
llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp

Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45773&r1=45772&r2=45773&view=diff

==
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Wed Jan  9 00:19:05 2008
@@ -178,7 +178,6 @@
 else if (preorder[ABlock] > preorder[BBlock])
   return false;
 
-assert(0 && "Error sorting by dominance!");
 return false;
   }
 };
@@ -208,8 +207,9 @@
   for (std::vector::iterator I = worklist.begin(), E = 
worklist.end();
I != E; ++I) {
 unsigned pre = preorder[LV.getVarInfo(*I).DefInst->getParent()];
-MachineBasicBlock* parentBlock =
-  LV.getVarInfo(CurrentParent->getReg()).DefInst->getParent();
+MachineBasicBlock* parentBlock = CurrentParent->getReg() ?
+ LV.getVarInfo(CurrentParent->getReg()).DefInst->getParent() :
+ 0;
 
 while (pre > maxpreorder[parentBlock]) {
   stack.pop_back();


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[llvm-commits] CVS: llvm-www/devmtg/current/index.html

[Jonathan Johnson]

Changes in directory llvm-www/devmtg/current:

index.html added (r1.1)
---
Log message:

Added initial dev meeting page.


---
Diffs of the changes:  (+49 -0)

 index.html |   49 +
 1 files changed, 49 insertions(+)


Index: llvm-www/devmtg/current/index.html
diff -c /dev/null llvm-www/devmtg/current/index.html:1.1
*** /dev/null   Tue Jan  8 22:47:20 2008
--- llvm-www/devmtg/current/index.html  Tue Jan  8 22:47:10 2008
***
*** 0 
--- 1,49 
+ 
+ LLVM Developers' Meeting
+ 
+   
+ 
+   Important Notes
+   Attendees
+ 
+ 
+   
+   What: The second general meeting of LLVM Developers 
and Users.
+   
+   Why: To get acquainted, learn how LLVM is used, and 
exchange 
+   ideas.
+   When: To be determined.
+   Where: To be determined.
+   
+ 
+ 
+ 
+ Important Notes
+ 
+   We are in the early stages of planning the second LLVM group 
meeting. At this point in time, we are asking that anyone interested in 
attending mailto:[EMAIL PROTECTED]">email the answers to these 
questions to the person organizing this meeting:
+   
+   Are you willing to give a talk? on what topic?
+   What topics are your primary interests?
+   Are you or your company willing to make a donation?
+   What timeframe and location is best for you?
+   
+ 
+ 
+ 
+ Attendees
+ 
+   This table lists all attendees that have expressed interest in 
attending this year's conference.
+   
+   Unconfirmed Attendees
+   NameOrganization
+   Robert HundtGoogle
+   Jonathan JohnsonAlacatia Labs, Inc.
+   Chris LattnerApple, Inc.
+   Joseph RanieriAlacatia Labs, Inc.
+   Chuck RoseAdobe Systems Incorporated
+   Mike StumpApple, Inc.
+   
+   Total unconfirmed: 6
+ 
+ 
+ 
\ No newline at end of file



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[llvm-commits] CVS: llvm-www/devmtg/current/index.html

[Jonathan Johnson]

Changes in directory llvm-www/devmtg/current:

index.html updated: 1.1 -> 1.2
---
Log message:

Fixed virtual include paths for developer meeting page.

---
Diffs of the changes:  (+2 -2)

 index.html |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm-www/devmtg/current/index.html
diff -u llvm-www/devmtg/current/index.html:1.1 
llvm-www/devmtg/current/index.html:1.2
--- llvm-www/devmtg/current/index.html:1.1  Tue Jan  8 22:47:10 2008
+++ llvm-www/devmtg/current/index.html  Tue Jan  8 22:49:01 2008
@@ -1,4 +1,4 @@
-
+
 LLVM Developers' Meeting
 

@@ -46,4 +46,4 @@
Total unconfirmed: 6
 
 
-
\ No newline at end of file
+
\ No newline at end of file



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