[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h ValueTypes.td
Changes in directory llvm/include/llvm/CodeGen: ValueTypes.h updated: 1.36 -> 1.37 ValueTypes.td updated: 1.4 -> 1.5 --- Log message: Renumber the SimpleValueType values to fill in the hole left by removing MVT::Vector. --- Diffs of the changes: (+24 -25) ValueTypes.h | 26 +- ValueTypes.td | 23 +++ 2 files changed, 24 insertions(+), 25 deletions(-) Index: llvm/include/llvm/CodeGen/ValueTypes.h diff -u llvm/include/llvm/CodeGen/ValueTypes.h:1.36 llvm/include/llvm/CodeGen/ValueTypes.h:1.37 --- llvm/include/llvm/CodeGen/ValueTypes.h:1.36 Mon Jun 25 11:23:39 2007 +++ llvm/include/llvm/CodeGen/ValueTypes.h Tue Jun 26 09:28:59 2007 @@ -46,22 +46,22 @@ isVoid = 12, // This has no value -v8i8 = 14, // 8 x i8 -v4i16 = 15, // 4 x i16 -v2i32 = 16, // 2 x i32 -v1i64 = 17, // 1 x i64 -v16i8 = 18, // 16 x i8 -v8i16 = 19, // 8 x i16 -v4i32 = 20, // 4 x i32 -v2i64 = 21, // 2 x i64 - -v2f32 = 22, // 2 x f32 -v4f32 = 23, // 4 x f32 -v2f64 = 24, // 2 x f64 +v8i8 = 13, // 8 x i8 +v4i16 = 14, // 4 x i16 +v2i32 = 15, // 2 x i32 +v1i64 = 16, // 1 x i64 +v16i8 = 17, // 16 x i8 +v8i16 = 18, // 8 x i16 +v4i32 = 19, // 4 x i32 +v2i64 = 20, // 2 x i64 + +v2f32 = 21, // 2 x f32 +v4f32 = 22, // 4 x f32 +v2f64 = 23, // 2 x f64 FIRST_VECTOR_VALUETYPE = v8i8, LAST_VECTOR_VALUETYPE = v2f64, -LAST_VALUETYPE = 25, // This always remains at the end of the list. +LAST_VALUETYPE = 24, // This always remains at the end of the list. // iAny - An integer value of any bit width. This is used for intrinsics // that have overloadings based on integer bit widths. This is only for Index: llvm/include/llvm/CodeGen/ValueTypes.td diff -u llvm/include/llvm/CodeGen/ValueTypes.td:1.4 llvm/include/llvm/CodeGen/ValueTypes.td:1.5 --- llvm/include/llvm/CodeGen/ValueTypes.td:1.4 Sun Apr 1 02:17:45 2007 +++ llvm/include/llvm/CodeGen/ValueTypes.td Tue Jun 26 09:28:59 2007 @@ -32,19 +32,18 @@ def f128 : ValueType<128, 10>; // 128-bit floating point value def FlagVT : ValueType<0 , 11>; // Condition code or machine flag def isVoid : ValueType<0 , 12>; // Produces no value -def Vector : ValueType<0 , 13>; // Abstract vector value -def v8i8 : ValueType<64 , 14>; // 8 x i8 vector value -def v4i16 : ValueType<64 , 15>; // 4 x i16 vector value -def v2i32 : ValueType<64 , 16>; // 2 x i32 vector value -def v1i64 : ValueType<64 , 17>; // 1 x i64 vector value +def v8i8 : ValueType<64 , 13>; // 8 x i8 vector value +def v4i16 : ValueType<64 , 14>; // 4 x i16 vector value +def v2i32 : ValueType<64 , 15>; // 2 x i32 vector value +def v1i64 : ValueType<64 , 16>; // 1 x i64 vector value -def v16i8 : ValueType<128, 18>; // 16 x i8 vector value -def v8i16 : ValueType<128, 19>; // 8 x i16 vector value -def v4i32 : ValueType<128, 20>; // 4 x i32 vector value -def v2i64 : ValueType<128, 21>; // 2 x i64 vector value -def v2f32 : ValueType<64, 22>; // 2 x f32 vector value -def v4f32 : ValueType<128, 23>; // 4 x f32 vector value -def v2f64 : ValueType<128, 24>; // 2 x f64 vector value +def v16i8 : ValueType<128, 17>; // 16 x i8 vector value +def v8i16 : ValueType<128, 18>; // 8 x i16 vector value +def v4i32 : ValueType<128, 19>; // 4 x i32 vector value +def v2i64 : ValueType<128, 20>; // 2 x i64 vector value +def v2f32 : ValueType<64, 21>; // 2 x f32 vector value +def v4f32 : ValueType<128, 22>; // 4 x f32 vector value +def v2f64 : ValueType<128, 23>; // 2 x f64 vector value // Pseudo valuetype to represent "integer of any bit width" def iAny : ValueType<0 , 254>; // integer value of any bit width ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Hi Chris, Thanks for all the review comments! I've addressed a few comments below; I'll get to the others soon. >> @@ -1162,6 +1179,11 @@ >> SDOperand Op = BuildSDIV(N); >> if (Op.Val) return Op; >>} >> + >> + // If either operand is undef, the result is undef >> + if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF) >> +return DAG.getNode(ISD::UNDEF, VT); >> + >>return SDOperand(); >> } > > This is not safe for sdiv/udiv. Safe xforms are: > >// undef / X -> 0 >// X / undef -> undef > > If in doubt, plz check instcombine. Thanks for correcting me on the undef rules. I'll check in a fix for the code soon. For this sdiv/udiv one though, why is undef/X not undef? For any non-zero value of X there's at least one value the undef might have which makes the divide have a non-zero result. >> @@ -2742,6 +2807,30 @@ >>SDOperand N0 = N->getOperand(0); >>MVT::ValueType VT = N->getValueType(0); >> >> + // If the input is a BUILD_VECTOR with all constant elements, >> fold this now. >> + // Only do this before legalize, since afterward the target may >> be depending >> + // on the bitconvert. > > Interesting. This is a good solution for now, but maybe this argues > for having a "target build vector", like "target constant", which > would be unmolested by the optimizer? It's a similar situation for SimplifyVBinOp, and a few other places, as you noticed, and we don't want to clone all those if we don't need to. An alternative would be to replace the conservative checks with specific checks for !AfterLegalize || TLI.isOperationLegal() as is done in other places to protect against creating illegal nodes. >> +MVT::ValueType VT = MVT::getVectorType(DstEltVT, >> + Ops.size()); >> +return DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); > > This idiom occurs in several places. Do you think it makes sense to > have a helper method on SelectionDAG to do this? Sure. Dan -- Dan Gohman, Cray Inc. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/ValueTypes.cpp
Changes in directory llvm/lib/VMCore:
ValueTypes.cpp updated: 1.19 -> 1.20
---
Log message:
Use utostr from StringExtras.h instead of ostringstream from .
---
Diffs of the changes: (+4 -7)
ValueTypes.cpp | 11 ---
1 files changed, 4 insertions(+), 7 deletions(-)
Index: llvm/lib/VMCore/ValueTypes.cpp
diff -u llvm/lib/VMCore/ValueTypes.cpp:1.19 llvm/lib/VMCore/ValueTypes.cpp:1.20
--- llvm/lib/VMCore/ValueTypes.cpp:1.19 Mon Jun 25 11:23:39 2007
+++ llvm/lib/VMCore/ValueTypes.cpp Tue Jun 26 10:14:48 2007
@@ -11,10 +11,10 @@
//
//===--===//
+#include "llvm/ADT/StringExtras.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Type.h"
#include "llvm/DerivedTypes.h"
-#include
using namespace llvm;
/// MVT::getValueTypeString - This function returns value type as a string,
@@ -22,12 +22,9 @@
std::string MVT::getValueTypeString(MVT::ValueType VT) {
switch (VT) {
default:
-if (isExtendedValueType(VT)) {
- std::ostringstream OS;
- OS << "v" << getVectorNumElements(VT)
- << getValueTypeString(getVectorElementType(VT));
- return OS.str();
-}
+if (isExtendedValueType(VT))
+ return "v" + utostr(getVectorNumElements(VT)) +
+ getValueTypeString(getVectorElementType(VT));
assert(0 && "Invalid ValueType!");
case MVT::i1:return "i1";
case MVT::i8:return "i8";
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.130 -> 1.131
---
Log message:
Simplify the expression for TargetLowering::isTypeLegal.
---
Diffs of the changes: (+1 -3)
TargetLowering.h |4 +---
1 files changed, 1 insertion(+), 3 deletions(-)
Index: llvm/include/llvm/Target/TargetLowering.h
diff -u llvm/include/llvm/Target/TargetLowering.h:1.130
llvm/include/llvm/Target/TargetLowering.h:1.131
--- llvm/include/llvm/Target/TargetLowering.h:1.130 Mon Jun 25 11:23:39 2007
+++ llvm/include/llvm/Target/TargetLowering.h Tue Jun 26 10:16:27 2007
@@ -130,9 +130,7 @@
/// specified value type. This means that it has a register that directly
/// holds it without promotions or expansions.
bool isTypeLegal(MVT::ValueType VT) const {
-return !MVT::isExtendedValueType(VT) ?
- RegClassForVT[VT] != 0 :
- false;
+return !MVT::isExtendedValueType(VT) && RegClassForVT[VT] != 0;
}
class ValueTypeActionImpl {
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.37 -> 1.38
---
Log message:
Simplify the expression for MVT::isExtendedValueType.
---
Diffs of the changes: (+1 -1)
ValueTypes.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/ValueTypes.h
diff -u llvm/include/llvm/CodeGen/ValueTypes.h:1.37
llvm/include/llvm/CodeGen/ValueTypes.h:1.38
--- llvm/include/llvm/CodeGen/ValueTypes.h:1.37 Tue Jun 26 09:28:59 2007
+++ llvm/include/llvm/CodeGen/ValueTypes.h Tue Jun 26 10:20:04 2007
@@ -92,7 +92,7 @@
/// MVT::isExtendedValueType - Test if the given ValueType is extended
/// (as opposed to being simple).
static inline bool isExtendedValueType(ValueType VT) {
-return VT & ~SimpleTypeMask;
+return VT > SimpleTypeMask;
}
/// MVT::isInteger - Return true if this is an integer, or a vector integer
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[llvm-commits] CVS: llvm-test/Makefile.programs
Changes in directory llvm-test: Makefile.programs updated: 1.270 -> 1.271 --- Log message: switch back to local. Duraid has plenty of todo items from last night's run :) --- Diffs of the changes: (+1 -1) Makefile.programs |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.270 llvm-test/Makefile.programs:1.271 --- llvm-test/Makefile.programs:1.270 Mon Jun 25 22:22:13 2007 +++ llvm-test/Makefile.programs Tue Jun 26 11:12:31 2007 @@ -235,7 +235,7 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -regalloc=bigblock -fast +LLCBETAOPTION := -regalloc=local -fast endif ifeq ($(ARCH),Sparc) LLCBETAOPTION := -enable-sparc-v9-insts ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.131 -> 1.132
---
Log message:
Replace ?: with if statements, for clarity.
---
Diffs of the changes: (+12 -18)
TargetLowering.h | 30 --
1 files changed, 12 insertions(+), 18 deletions(-)
Index: llvm/include/llvm/Target/TargetLowering.h
diff -u llvm/include/llvm/Target/TargetLowering.h:1.131
llvm/include/llvm/Target/TargetLowering.h:1.132
--- llvm/include/llvm/Target/TargetLowering.h:1.131 Tue Jun 26 10:16:27 2007
+++ llvm/include/llvm/Target/TargetLowering.h Tue Jun 26 11:19:08 2007
@@ -148,9 +148,8 @@
}
LegalizeAction getTypeAction(MVT::ValueType VT) const {
- return !MVT::isExtendedValueType(VT) ?
- (LegalizeAction)((ValueTypeActions[VT>>4] >> ((2*VT) & 31)) & 3) :
- Expand;
+ if (MVT::isExtendedValueType(VT)) return Expand;
+ return (LegalizeAction)((ValueTypeActions[VT>>4] >> ((2*VT) & 31)) & 3);
}
void setTypeAction(MVT::ValueType VT, LegalizeAction Action) {
assert(!MVT::isExtendedValueType(VT));
@@ -251,9 +250,8 @@
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const {
-return !MVT::isExtendedValueType(VT) ?
- (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3) :
- Expand;
+if (MVT::isExtendedValueType(VT)) return Expand;
+return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3);
}
/// isOperationLegal - Return true if the specified operation is legal on
this
@@ -268,9 +266,8 @@
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getLoadXAction(unsigned LType, MVT::ValueType VT) const {
-return !MVT::isExtendedValueType(VT) ?
- (LegalizeAction)((LoadXActions[LType] >> (2*VT)) & 3) :
- Expand;
+if (MVT::isExtendedValueType(VT)) return Expand;
+return (LegalizeAction)((LoadXActions[LType] >> (2*VT)) & 3);
}
/// isLoadXLegal - Return true if the specified load with extension is legal
@@ -285,9 +282,8 @@
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getStoreXAction(MVT::ValueType VT) const {
-return !MVT::isExtendedValueType(VT) ?
- (LegalizeAction)((StoreXActions >> (2*VT)) & 3) :
- Expand;
+if (MVT::isExtendedValueType(VT)) return Expand;
+return (LegalizeAction)((StoreXActions >> (2*VT)) & 3);
}
/// isStoreXLegal - Return true if the specified store with truncation is
@@ -302,9 +298,8 @@
/// for it.
LegalizeAction
getIndexedLoadAction(unsigned IdxMode, MVT::ValueType VT) const {
-return !MVT::isExtendedValueType(VT) ?
- (LegalizeAction)((IndexedModeActions[0][IdxMode] >> (2*VT)) & 3) :
- Expand;
+if (MVT::isExtendedValueType(VT)) return Expand;
+return (LegalizeAction)((IndexedModeActions[0][IdxMode] >> (2*VT)) & 3);
}
/// isIndexedLoadLegal - Return true if the specified indexed load is legal
@@ -320,9 +315,8 @@
/// for it.
LegalizeAction
getIndexedStoreAction(unsigned IdxMode, MVT::ValueType VT) const {
-return !MVT::isExtendedValueType(VT) ?
- (LegalizeAction)((IndexedModeActions[1][IdxMode] >> (2*VT)) & 3) :
- Expand;
+if (MVT::isExtendedValueType(VT)) return Expand;
+return (LegalizeAction)((IndexedModeActions[1][IdxMode] >> (2*VT)) & 3);
}
/// isIndexedStoreLegal - Return true if the specified indexed load is legal
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[llvm-commits] [128838] Don't assume &P[0] is nonnull in LLVM.
Revision: 128838 Author: johannes Date: 2007-06-26 09:45:24 -0700 (Tue, 26 Jun 2007) Log Message: --- Don't assume &P[0] is nonnull in LLVM. Modified Paths: -- apple-local/branches/llvm/gcc/c-common.c Modified: apple-local/branches/llvm/gcc/c-common.c === --- apple-local/branches/llvm/gcc/c-common.c2007-06-26 15:41:13 UTC (rev 128837) +++ apple-local/branches/llvm/gcc/c-common.c2007-06-26 16:45:24 UTC (rev 128838) @@ -2636,6 +2636,18 @@ && DECL_EXTERNAL (TREE_OPERAND (expr, 0))) break; +/* APPLE LOCAL begin llvm */ +#if ENABLE_LLVM +/* LLVM extends ARRAY_REF to allow pointers to be the base value. It is not + valid to assume ADDR of this is nonzero, because it could be derived from + original (P+constant). Radar 5286401. */ +if (TREE_CODE (TREE_OPERAND (expr, 0)) == ARRAY_REF +&& TREE_CODE (TREE_TYPE (TREE_OPERAND (TREE_OPERAND (expr, 0), 0))) +!= ARRAY_TYPE) + break; +#endif +/* APPLE LOCAL end llvm */ + if (TREE_SIDE_EFFECTS (TREE_OPERAND (expr, 0))) return build2 (COMPOUND_EXPR, truthvalue_type_node, TREE_OPERAND (expr, 0), truthvalue_true_node); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [128839] Fix a couple of objC-specific name encodings for LLVM.
Revision: 128839 Author: johannes Date: 2007-06-26 09:46:15 -0700 (Tue, 26 Jun 2007) Log Message: --- Fix a couple of objC-specific name encodings for LLVM. Modified Paths: -- apple-local/branches/llvm/gcc/objc/objc-act.c Modified: apple-local/branches/llvm/gcc/objc/objc-act.c === --- apple-local/branches/llvm/gcc/objc/objc-act.c 2007-06-26 16:45:24 UTC (rev 128838) +++ apple-local/branches/llvm/gcc/objc/objc-act.c 2007-06-26 16:46:15 UTC (rev 128839) @@ -18152,6 +18152,13 @@ DECL_INITIAL (decl) = exp; TREE_STATIC (decl) = 1; TREE_USED (decl) = 1; +/* APPLE LOCAL begin LLVM */ +#ifdef ENABLE_LLVM + /* This decl's name is special. Ask llvm to not add leading underscore by + setting it as a user supplied asm name. */ + set_user_assembler_name(decl, string); +#endif ENABLE_LLVM +/* APPLE LOCAL end LLVM */ pushdecl (decl); rest_of_decl_compilation (decl, 0, 0); @@ -18188,8 +18195,16 @@ /* Do the same for categories. Even though no references to these symbols are generated automatically by the compiler, it gives you a handle to pull them into an archive by hand. */ +/* APPLE LOCAL begin LLVM */ +#ifdef ENABLE_LLVM + /* The * is a sentinel for gcc's back end, but is not wanted by llvm. */ + sprintf (string, "%sobjc_category_name_%s_%s", + (flag_next_runtime ? "." : "__"), class_name, class_super_name); +#else sprintf (string, "*%sobjc_category_name_%s_%s", (flag_next_runtime ? "." : "__"), class_name, class_super_name); +#endif +/* APPLE LOCAL end LLVM */ } else return; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> Thanks for all the review comments! I've addressed a few comments > below; I'll get to the others soon. Thanks! I also filed pr1529, which is the only failure that showed on the ppc nightly tester. >>> @@ -1162,6 +1179,11 @@ >>> SDOperand Op = BuildSDIV(N); >>> if (Op.Val) return Op; >>>} >>> + >>> + // If either operand is undef, the result is undef >>> + if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF) >>> +return DAG.getNode(ISD::UNDEF, VT); >>> + >>>return SDOperand(); >>> } >> >> This is not safe for sdiv/udiv. Safe xforms are: >> >>// undef / X -> 0 >>// X / undef -> undef >> >> If in doubt, plz check instcombine. > > Thanks for correcting me on the undef rules. I'll check in a fix > for the code soon. For this sdiv/udiv one though, why is undef/X not > undef? For any non-zero value of X there's at least one value the > undef might have which makes the divide have a non-zero result. I think that undef udiv intmax -> 0, no? If not, plz update instcombine as well. >>> @@ -2742,6 +2807,30 @@ >>>SDOperand N0 = N->getOperand(0); >>>MVT::ValueType VT = N->getValueType(0); >>> >>> + // If the input is a BUILD_VECTOR with all constant elements, >>> fold this now. >>> + // Only do this before legalize, since afterward the target may >>> be depending >>> + // on the bitconvert. >> >> Interesting. This is a good solution for now, but maybe this argues >> for having a "target build vector", like "target constant", which >> would be unmolested by the optimizer? > > It's a similar situation for SimplifyVBinOp, and a few other > places, as > you noticed, and we don't want to clone all those if we don't need to. > An alternative would be to replace the conservative checks with > specific checks for >!AfterLegalize || TLI.isOperationLegal() > as is done in other places to protect against creating illegal nodes. I think it certainly would be better to check isOperationLegal. The only hard part is that some operations (like buildvector) are legal with certain operands. We don't have a way to capture that. :( >>> +MVT::ValueType VT = MVT::getVectorType(DstEltVT, >>> + Ops.size()); >>> +return DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); >> >> This idiom occurs in several places. Do you think it makes sense to >> have a helper method on SelectionDAG to do this? > > Sure. Thanks for all the great changes Dan! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/NewNightlyTest.pl
Changes in directory llvm/utils:
NewNightlyTest.pl updated: 1.73 -> 1.74
---
Log message:
Update for Subversion conversion:
1. Fix comments for -usesvn and -svnurl options.
2. Fix default URL for SVN access.
3. Fix paths to accommodate "trunk" when checking out from SVN.
---
Diffs of the changes: (+7 -7)
NewNightlyTest.pl | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
Index: llvm/utils/NewNightlyTest.pl
diff -u llvm/utils/NewNightlyTest.pl:1.73 llvm/utils/NewNightlyTest.pl:1.74
--- llvm/utils/NewNightlyTest.pl:1.73 Mon May 14 13:03:45 2007
+++ llvm/utils/NewNightlyTest.plTue Jun 26 12:08:16 2007
@@ -45,10 +45,10 @@
# -gccpath Path to gcc/g++ used to build LLVM
# -cvstag Check out a specific CVS tag to build LLVM (useful for
# testing release branches)
-# -usesvn Check code out from a subversion repository. With no
-# argument, use the standard repository. An argument
specifies
-# the repository URL to use.
-# -svnurl Specify the SVN URL where LLVM can be found
+# -usesvn Check code out from a subversion repository.
+# -svnurl Specify the SVN URL where LLVM can be found. Needs -usesvn
+# to be useful. If -svnurl is not used but -usesvn is then
+# the standard (UIUC) repository will be used.
# -target Specify the target triplet
# -cflags Next argument specifies that C compilation options that
# override the default.
@@ -96,7 +96,7 @@
##
my $HOME = $ENV{'HOME'};
my $SVNURL = $ENV{"SVNURL"};
-$SVNURL= 'svn://[EMAIL PROTECTED]:3691/llvm.svn' unless $SVNURL;
+$SVNURL= 'https://llvm.org/svn/llvm-project' unless $SVNURL;
my $CVSRootDir = $ENV{'CVSROOT'};
$CVSRootDir= "/home/vadve/shared/PublicCVS" unless $CVSRootDir;
my $BuildDir = $ENV{'BUILDDIR'};
@@ -520,9 +520,9 @@
if ($USESVN) {
my $SVNCMD = "$NICE svn co $SVNURL";
if ($VERBOSE) {
- print "( time -p $SVNCMD/llvm/trunk llvm; cd llvm/projects ; " .
+ print "( time -p $SVNCMD/llvm/trunk llvm; cd llvm/trunk/projects ; " .
"$SVNCMD/llvm-test/trunk llvm-test ) > $COLog 2>&1\n";
- system "( time -p $SVNCMD/llvm/trunk llvm; cd llvm/projects ; " .
+ system "( time -p $SVNCMD/llvm/trunk llvm; cd llvm/trunk/projects ; " .
"$SVNCMD/llvm-test/trunk llvm-test ) > $COLog 2>&1\n";
}
} else {
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp
Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.59 -> 1.60 --- Log message: Silence a warning. --- Diffs of the changes: (+2 -1) ARMISelLowering.cpp |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMISelLowering.cpp diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.59 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.60 --- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.59Fri Jun 22 09:59:07 2007 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp Tue Jun 26 13:31:22 2007 @@ -1195,7 +1195,8 @@ Index = DAG.getNode(ISD::MUL, PTy, Index, DAG.getConstant(4, PTy)); SDOperand Addr = DAG.getNode(ISD::ADD, PTy, Index, Table); bool isPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_; - Addr = DAG.getLoad(isPIC ? MVT::i32 : PTy, Chain, Addr, NULL, 0); + Addr = DAG.getLoad(isPIC ? (MVT::ValueType)MVT::i32 : PTy, + Chain, Addr, NULL, 0); Chain = Addr.getValue(1); if (isPIC) Addr = DAG.getNode(ISD::ADD, PTy, Addr, Table); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html updated: 1.15 -> 1.16 --- Log message: Update with current information. --- Diffs of the changes: (+96 -31) SVNMigration.html | 127 -- 1 files changed, 96 insertions(+), 31 deletions(-) Index: llvm-www/SVNMigration.html diff -u llvm-www/SVNMigration.html:1.15 llvm-www/SVNMigration.html:1.16 --- llvm-www/SVNMigration.html:1.15 Fri Jun 15 15:03:47 2007 +++ llvm-www/SVNMigration.html Tue Jun 26 15:45:56 2007 @@ -4,23 +4,33 @@ This document contains notes about the planned migration of the CVS code repository to Subversion. + + Schedule + Impact + Status + Module Renaming + Branch Status + Tag Status + Migration Process + -Schedule +Schedule - When: (Tentatively) June 25, 2007, approx. 1pm CDT (Central Time USA) or 18:00 GMT). - Duration: 4 hours - Notices:: Notices will be sent out 1 week before, 1 day before, and + When: June 29, 2007, 09:00 CDT, 07:00 PDT, 14:00 UTC. + Duration: Approximately 4 hours + Notices:: Notices will be sent out 3 days before, 1 day before, and 1 hour before the conversion actually takes place. - Impact: Both CVS and Subversion will be unavailable for approximately - 4 hours while the migration takes place. Once completed, CVS will be restored - in read-only mode and Subversion will permit read-write access. + Impact: CVS commits will be unavailable for approximately 4 hours + while the migration takes place. Anonymous CVS checkout will still be allowed + during this time frame. Once the migration is done, CVS will remain in + read-only mode and Subversion will be enable for read and write access. Fallback Plan: If the conversion cannot be completed successfully in 4 hours, we will turn CVS commit access back on and try the migration again at a later date. -User Impact +User Impact Here are some things you need to know about how to use Subversion once the migration is done and how to prepare for the change. @@ -28,32 +38,42 @@ Subversion Version: 1.4.3. You can use older clients, but we recommend that you upgrade to 1.4.3 to gain most benefit. URLS: Subversion uses URLs to specify the repository. Our -configuration uses HTTP URLs. The host name portion of the URL for all -LLVM related repositories is svn.llvm.org (which redirects to -subversion.cs.uiuc.edu). We encourage you to use the svn.llvm.org host name -because that one will be correct in perpetuity as the redirect might not be. -Repository Access: There are two ways to access the -repository: public (anonymous, read-only access) and private (named, -read-write access). -Public Access: The URL for the public access repository is -http://svn.llvm.org/pub/svn/llvm";>http://svn.llvm.org/pub/svn/llvm -Use this URL with the svn checkout command to obtain a read-only -copy of LLVM without a username or password. -Private Access: The URL for the private access repository is -https://svn.llvm.org/svn/llvm";>http://vn.llvm.org/svn/llvm. -Use this URL with the svn checkout command to obtain read-write -access to the LLVM repository. The svn command will prompt you for -your user name and password. -Browsable URLs: Both the public and private access URLs are -browsable with any web browser. +configuration uses HTTPS URLs. The host name portion of the URL for all +LLVM related repositories is llvm.org. The URL for accessing any of +the modules in the LLVM repository is: +https://llvm.org/svn/llvm-project";> + https://llvm.org/svn/llvm-project. Note that the URL uses the HTTPS +protocol. This is necessary to ensure that passwords are not transmitted in +the clear. +Browsing: You can browse the latest revision of the repository +with any web browser by just pointing it at the URL shown above. +Modules: The repository contains several modules. Each module is +contained in a top level directory and has its own trunk, +branches, and tags directories at the second level. Some +of the modules have changed name. See the Renaming +section for details. +Checkout Access: You can checkout any llvm module by simply using +the svn command with the above URL. For example: +svn co https://llvm.org/svn/llvm-project/llvm/trunk llvm +This will give you a local llvm directory that contains the +contents of the "llvm" module. +Commit Access: If you have commit access you will need to supply +a user name and password to commit. We recommend that you check out using a +URL like this: https://[EMAIL PROTECTED]/svn/llvm-project/ You +should replace "uname" with your actual user name. When you attempt to +commit you will get a password prompt from the Subversion command. Enter +your password to complete the commit. Available Now:: You can try these out now. Only a few users have
[llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.57 -> 1.58
---
Log message:
Add immediate sub-registers.
---
Diffs of the changes: (+21 -0)
RegisterInfoEmitter.cpp | 21 +
1 files changed, 21 insertions(+)
Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.57
llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.58
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.57Wed Jun 13 17:20:15 2007
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Tue Jun 26 15:54:46 2007
@@ -359,6 +359,7 @@
OS << " };\n";
// Emit register sub-registers / super-registers, aliases...
+ std::map > RegisterImmSubRegs;
std::map > RegisterSubRegs;
std::map > RegisterSuperRegs;
std::map > RegisterAliases;
@@ -397,6 +398,7 @@
cerr << "Warning: register " << getQualifiedName(SubReg)
<< " specified as a sub-register of " << getQualifiedName(R)
<< " multiple times!\n";
+ RegisterImmSubRegs[R].insert(SubReg);
addSubSuperReg(R, SubReg, RegisterSubRegs, RegisterSuperRegs,
RegisterAliases, *this);
}
@@ -434,6 +436,21 @@
OS << "0 };\n";
}
+ if (!RegisterImmSubRegs.empty())
+OS << "\n\n // Register Immediate Sub-registers Sets...\n";
+
+ // Loop over all of the registers which have sub-registers, emitting the
+ // sub-registers list to memory.
+ for (std::map >::iterator
+ I = RegisterImmSubRegs.begin(), E = RegisterImmSubRegs.end();
+ I != E; ++I) {
+OS << " const unsigned " << I->first->getName() << "_ImmSubRegsSet[] = {
";
+for (std::set::iterator ASI = I->second.begin(),
+ E = I->second.end(); ASI != E; ++ASI)
+ OS << getQualifiedName(*ASI) << ", ";
+OS << "0 };\n";
+ }
+
if (!RegisterSuperRegs.empty())
OS << "\n\n // Register Super-registers Sets...\n";
@@ -472,6 +489,10 @@
OS << Reg.getName() << "_SubRegsSet,\t";
else
OS << "Empty_SubRegsSet,\t";
+if (RegisterImmSubRegs.count(Reg.TheDef))
+ OS << Reg.getName() << "_ImmSubRegsSet,\t";
+else
+ OS << "Empty_SubRegsSet,\t";
if (RegisterSuperRegs.count(Reg.TheDef))
OS << Reg.getName() << "_SuperRegsSet },\n";
else
___
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[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.111 -> 1.112
---
Log message:
Add immediate sub-registers.
---
Diffs of the changes: (+9 -0)
MRegisterInfo.h |9 +
1 files changed, 9 insertions(+)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.111
llvm/include/llvm/Target/MRegisterInfo.h:1.112
--- llvm/include/llvm/Target/MRegisterInfo.h:1.111 Wed Jun 13 17:20:15 2007
+++ llvm/include/llvm/Target/MRegisterInfo.hTue Jun 26 15:59:16 2007
@@ -48,6 +48,7 @@
const char *Name; // Assembly language name for the register
const unsigned *AliasSet; // Register Alias Set, described above
const unsigned *SubRegs; // Sub-register set, described above
+ const unsigned *ImmSubRegs; // Immediate sub-register set, described above
const unsigned *SuperRegs;// Super-register set, described above
};
@@ -326,6 +327,14 @@
return get(RegNo).SubRegs;
}
+ /// getImmediateSubRegisters - Return the set of registers that are immediate
+ /// sub-registers of the specified register, or a null list of there are
none.
+ /// The list returned is zero terminated.
+ ///
+ const unsigned *getImmediateSubRegisters(unsigned RegNo) const {
+return get(RegNo).ImmSubRegs;
+ }
+
/// getSuperRegisters - Return the set of registers that are super-registers
/// of the specified register, or a null list of there are none. The list
/// returned is zero terminated.
___
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[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html updated: 1.16 -> 1.17 --- Log message: Add doxygen to the to-do list. --- Diffs of the changes: (+5 -1) SVNMigration.html |6 +- 1 files changed, 5 insertions(+), 1 deletion(-) Index: llvm-www/SVNMigration.html diff -u llvm-www/SVNMigration.html:1.16 llvm-www/SVNMigration.html:1.17 --- llvm-www/SVNMigration.html:1.16 Tue Jun 26 15:45:56 2007 +++ llvm-www/SVNMigration.html Tue Jun 26 16:02:42 2007 @@ -274,6 +274,10 @@ whatever we do we should jsut rewrite the /releases/ URL to point to some place where the releases are stored (or create /releases/ in the document root). +Doxygen. The crontab on Zion needs to be fixed so that doxygen is +generated from the right sources. Probably it should be generated into some +standard location on Zion and then the /doxygen/ URL mapped to that +location. @@ -284,6 +288,6 @@ src="http://jigsaw.w3.org/css-validator/images/vcss"; alt="Valid CSS!"> http://validator.w3.org/check/referer";>http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!"> -Last modified: $Date: 2007/06/26 20:45:56 $ +Last modified: $Date: 2007/06/26 21:02:42 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveVariables.h
Changes in directory llvm/include/llvm/CodeGen: LiveVariables.h updated: 1.46 -> 1.47 --- Log message: Properly handle kills of a physical register which has sub-registers that are read by later instructions. --- Diffs of the changes: (+10 -0) LiveVariables.h | 10 ++ 1 files changed, 10 insertions(+) Index: llvm/include/llvm/CodeGen/LiveVariables.h diff -u llvm/include/llvm/CodeGen/LiveVariables.h:1.46 llvm/include/llvm/CodeGen/LiveVariables.h:1.47 --- llvm/include/llvm/CodeGen/LiveVariables.h:1.46 Tue May 8 14:00:00 2007 +++ llvm/include/llvm/CodeGen/LiveVariables.h Tue Jun 26 16:02:59 2007 @@ -31,6 +31,7 @@ #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/ADT/BitVector.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/ADT/SmallVector.h" #include @@ -163,6 +164,15 @@ bool addRegisterDead(unsigned IncomingReg, MachineInstr *MI, bool AddIfNotFound = false); + void addRegisterKills(unsigned Reg, MachineInstr *MI, +SmallSet &SubKills); + + /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the + /// uses. Pay special attention to the sub-register uses which may come below + /// the last use of the whole register. + bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI, + SmallSet &SubKills); + bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI); void HandlePhysRegUse(unsigned Reg, MachineInstr *MI); void HandlePhysRegDef(unsigned Reg, MachineInstr *MI); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp
Changes in directory llvm/lib/CodeGen:
LiveVariables.cpp updated: 1.84 -> 1.85
---
Log message:
Properly handle kills of a physical register which has sub-registers that are
read by later instructions.
---
Diffs of the changes: (+73 -13)
LiveVariables.cpp | 86 +-
1 files changed, 73 insertions(+), 13 deletions(-)
Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.84
llvm/lib/CodeGen/LiveVariables.cpp:1.85
--- llvm/lib/CodeGen/LiveVariables.cpp:1.84 Mon May 14 15:39:18 2007
+++ llvm/lib/CodeGen/LiveVariables.cpp Tue Jun 26 16:03:35 2007
@@ -286,38 +286,85 @@
PhysRegPartUse[SuperReg] = MI;
}
+bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI,
+ SmallSet &SubKills) {
+ for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs) {
+MachineInstr *LastRef = PhysRegInfo[SubReg];
+if (LastRef != RefMI)
+ SubKills.insert(SubReg);
+else if (!HandlePhysRegKill(SubReg, RefMI, SubKills))
+ SubKills.insert(SubReg);
+ }
+
+ if (*RegInfo->getImmediateSubRegisters(Reg) == 0) {
+// No sub-registers, just check if reg is killed by RefMI.
+if (PhysRegInfo[Reg] == RefMI)
+ return true;
+ } else if (SubKills.empty())
+// None of the sub-registers are killed elsewhere...
+return true;
+ return false;
+}
+
+void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI,
+ SmallSet &SubKills) {
+ if (SubKills.count(Reg) == 0)
+addRegisterKilled(Reg, MI, true);
+ else {
+for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs)
+ addRegisterKills(SubReg, MI, SubKills);
+ }
+}
+
+bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI) {
+ SmallSet SubKills;
+ if (HandlePhysRegKill(Reg, RefMI, SubKills)) {
+addRegisterKilled(Reg, RefMI);
+return true;
+ } else {
+// Some sub-registers are killed by another MI.
+for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs)
+ addRegisterKills(SubReg, RefMI, SubKills);
+return false;
+ }
+}
+
void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
// Does this kill a previous version of this register?
if (MachineInstr *LastRef = PhysRegInfo[Reg]) {
-if (PhysRegUsed[Reg])
- addRegisterKilled(Reg, LastRef);
-else if (PhysRegPartUse[Reg])
+if (PhysRegUsed[Reg]) {
+ if (!HandlePhysRegKill(Reg, LastRef)) {
+if (PhysRegPartUse[Reg])
+ addRegisterKilled(Reg, PhysRegPartUse[Reg], true);
+ }
+} else if (PhysRegPartUse[Reg])
// Add implicit use / kill to last use of a sub-register.
addRegisterKilled(Reg, PhysRegPartUse[Reg], true);
else
addRegisterDead(Reg, LastRef);
}
- PhysRegInfo[Reg] = MI;
- PhysRegUsed[Reg] = false;
- PhysRegPartUse[Reg] = NULL;
for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
unsigned SubReg = *SubRegs; ++SubRegs) {
if (MachineInstr *LastRef = PhysRegInfo[SubReg]) {
- if (PhysRegUsed[SubReg])
-addRegisterKilled(SubReg, LastRef);
- else if (PhysRegPartUse[SubReg])
+ if (PhysRegUsed[SubReg]) {
+if (!HandlePhysRegKill(SubReg, LastRef)) {
+ if (PhysRegPartUse[SubReg])
+addRegisterKilled(SubReg, PhysRegPartUse[SubReg], true);
+}
+//addRegisterKilled(SubReg, LastRef);
+ } else if (PhysRegPartUse[SubReg])
// Add implicit use / kill to last use of a sub-register.
addRegisterKilled(SubReg, PhysRegPartUse[SubReg], true);
else
addRegisterDead(SubReg, LastRef);
}
-PhysRegInfo[SubReg] = MI;
-PhysRegUsed[SubReg] = false;
-PhysRegPartUse[SubReg] = NULL;
}
- if (MI)
+ if (MI) {
for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg);
unsigned SuperReg = *SuperRegs; ++SuperRegs) {
if (PhysRegInfo[SuperReg]) {
@@ -334,6 +381,17 @@
// Remember this partial def.
PhysRegPartDef[SuperReg].push_back(MI);
}
+}
+
+PhysRegInfo[Reg] = MI;
+PhysRegUsed[Reg] = false;
+PhysRegPartUse[Reg] = NULL;
+for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+ unsigned SubReg = *SubRegs; ++SubRegs) {
+ PhysRegInfo[SubReg] = MI;
+ PhysRegUsed[SubReg] = false;
+ PhysRegPartUse[SubReg] = NULL;
+}
}
}
@@ -465,6 +523,8 @@
// Clear some states between BB's. These are purely local information.
for (unsigned i = 0; i != NumRegs; ++i)
PhysRegPartDef[i].clear();
+std::fill(PhysRegInfo, PhysRegInfo + NumRegs, (MachineInstr*)0);
+std::fill(PhysRegUsed, PhysRegUsed + NumRegs, false);
std::fill(PhysRegPartUse, PhysRegPartUse +
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLocal.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocLocal.cpp updated: 1.106 -> 1.107
---
Log message:
Correctly handle implcit def / use operands.
---
Diffs of the changes: (+64 -52)
RegAllocLocal.cpp | 116 +-
1 files changed, 64 insertions(+), 52 deletions(-)
Index: llvm/lib/CodeGen/RegAllocLocal.cpp
diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.106
llvm/lib/CodeGen/RegAllocLocal.cpp:1.107
--- llvm/lib/CodeGen/RegAllocLocal.cpp:1.106Tue May 8 14:02:46 2007
+++ llvm/lib/CodeGen/RegAllocLocal.cpp Tue Jun 26 16:05:13 2007
@@ -106,6 +106,14 @@
return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
}
+void AddToPhysRegsUseOrder(unsigned Reg) {
+ std::vector::iterator It =
+std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), Reg);
+ if (It != PhysRegsUseOrder.end())
+PhysRegsUseOrder.erase(It);
+ PhysRegsUseOrder.push_back(Reg);
+}
+
void MarkPhysRegRecentlyUsed(unsigned Reg) {
if (PhysRegsUseOrder.empty() ||
PhysRegsUseOrder.back() == Reg) return; // Already most recently
used
@@ -184,13 +192,6 @@
///
void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
-/// liberatePhysReg - Make sure the specified physical register is
available
-/// for use. If there is currently a value in it, it is either moved out
of
-/// the way or spilled to memory.
-///
-void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator
&I,
- unsigned PhysReg);
-
/// isPhysRegAvailable - Return true if the specified physical register is
/// free and available for use. This also includes checking to see if
/// aliased registers are all free...
@@ -314,19 +315,8 @@
*AliasSet; ++AliasSet)
if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
PhysRegsUsed[*AliasSet] != -2) // If allocatable.
-if (PhysRegsUsed[*AliasSet] == 0) {
- // This must have been a dead def due to something like this:
- // %EAX :=
- // := op %AL
- // No more use of %EAX, %AH, etc.
- // %EAX isn't dead upon definition, but %AH is. However %AH isn't
- // an operand of definition MI so it's not marked as such.
- DOUT << " Register " << RegInfo->getName(*AliasSet)
- << " [%reg" << *AliasSet
- << "] is never used, removing it frame live list\n";
- removePhysReg(*AliasSet);
-} else
- spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
+ if (PhysRegsUsed[*AliasSet])
+spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
}
}
@@ -341,7 +331,7 @@
// it holds VirtReg.
PhysRegsUsed[PhysReg] = VirtReg;
getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
- PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
+ AddToPhysRegsUseOrder(PhysReg); // New use of PhysReg
}
@@ -380,17 +370,6 @@
}
-/// liberatePhysReg - Make sure the specified physical register is available
for
-/// use. If there is currently a value in it, it is either moved out of the
way
-/// or spilled to memory.
-///
-void RALocal::liberatePhysReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &I,
- unsigned PhysReg) {
- spillPhysReg(MBB, I, PhysReg);
-}
-
-
/// getReg - Find a physical register to hold the specified virtual
/// register. If all compatible physical registers are used, this method
spills
/// the last used virtual register to the stack, and uses that register.
@@ -522,7 +501,29 @@
return MI;
}
+/// isReadModWriteImplicitKill - True if this is an implicit kill for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+MachineOperand& MO = MI->getOperand(i);
+if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
+MO.isDef() && !MO.isDead())
+ return true;
+ }
+ return false;
+}
+/// isReadModWriteImplicitDef - True if this is an implicit def for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+MachineOperand& MO = MI->getOperand(i);
+if (MO.isRegister() && MO.getReg() == Reg && MO.isImplicit() &&
+!MO.isDef() && MO.isKill())
+ return true;
+ }
+ return false;
+}
void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
// loop over each instruction
@@ -540,11 +541,11 @@
unsigned Reg = I->first;
MF->setPhysRegUsed(Reg);
PhysRegsUsed[Reg] = 0;// It is free and reserved now
- PhysRegsUseOrder.push_back(Reg);
- for (const unsigned *AliasSet = RegInf
[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.112 -> 1.113
---
Log message:
Add comment.
---
Diffs of the changes: (+5 -3)
MRegisterInfo.h |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.112
llvm/include/llvm/Target/MRegisterInfo.h:1.113
--- llvm/include/llvm/Target/MRegisterInfo.h:1.112 Tue Jun 26 15:59:16 2007
+++ llvm/include/llvm/Target/MRegisterInfo.hTue Jun 26 16:19:07 2007
@@ -40,9 +40,11 @@
/// Registers that this does not apply to simply should set this to null.
/// The SubRegs field is a zero terminated array of registers that are
/// sub-registers of the specific register, e.g. AL, AH are sub-registers of
AX.
-/// The SuperRegs field is a zero terminated array of registers that are
-/// super-registers of the specific register, e.g. RAX, EAX, are
super-registers
-/// of AX.
+/// The ImmsubRegs field is a subset of SubRegs. It includes only the immediate
+/// sub-registers. e.g. EAX has only one immediate sub-register of AX, not AH,
+/// AL which are immediate sub-registers of AX. The SuperRegs field is a zero
+/// terminated array of registers that are super-registers of the specific
+/// register, e.g. RAX, EAX, are super-registers of AX.
///
struct TargetRegisterDesc {
const char *Name; // Assembly language name for the register
___
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[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html updated: 1.17 -> 1.18 --- Log message: Add a step to update GettingStarted.html directions for checkout from SVN. --- Diffs of the changes: (+3 -1) SVNMigration.html |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm-www/SVNMigration.html diff -u llvm-www/SVNMigration.html:1.17 llvm-www/SVNMigration.html:1.18 --- llvm-www/SVNMigration.html:1.17 Tue Jun 26 16:02:42 2007 +++ llvm-www/SVNMigration.html Tue Jun 26 17:01:57 2007 @@ -254,6 +254,8 @@ so that the -usesvn option gets the right repository by default. Final CutOver. The cut-over to SVN needs to be done. Currently scheduled for 6/29/2007 at 9:00am CDT. +GettingStarted.html. Update this to reflect the new checkout +commands needed. NewNightlyTest.pl Defaults to SVN. This script needs to be updated so that the default repository is Subversion and the ability to use CVS is taken away. @@ -288,6 +290,6 @@ src="http://jigsaw.w3.org/css-validator/images/vcss"; alt="Valid CSS!"> http://validator.w3.org/check/referer";>http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!"> -Last modified: $Date: 2007/06/26 21:02:42 $ +Last modified: $Date: 2007/06/26 22:01:57 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/SVNMigration.html
Changes in directory llvm-www: SVNMigration.html updated: 1.18 -> 1.19 --- Log message: Add notes about migration of llvm-gcc4 and HLVM to the Subversion repo. --- Diffs of the changes: (+7 -1) SVNMigration.html |8 +++- 1 files changed, 7 insertions(+), 1 deletion(-) Index: llvm-www/SVNMigration.html diff -u llvm-www/SVNMigration.html:1.18 llvm-www/SVNMigration.html:1.19 --- llvm-www/SVNMigration.html:1.18 Tue Jun 26 17:01:57 2007 +++ llvm-www/SVNMigration.html Tue Jun 26 17:33:16 2007 @@ -280,6 +280,12 @@ generated from the right sources. Probably it should be generated into some standard location on Zion and then the /doxygen/ URL mapped to that location. +llvm-gcc. The llvm-gcc repository hosted by Apple needs to be +migrated to the Zion repository. This should be as simple as dump and load +since they are both Subversion. +HLVM. The HLVM repository hosted by Reid needs to be +migrated to the Zion repository. This should be as simple as dump and load +since they are both Subversion. @@ -290,6 +296,6 @@ src="http://jigsaw.w3.org/css-validator/images/vcss"; alt="Valid CSS!"> http://validator.w3.org/check/referer";>http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!"> -Last modified: $Date: 2007/06/26 22:01:57 $ +Last modified: $Date: 2007/06/26 22:33:16 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/GVNPRE.cpp
Changes in directory llvm/lib/Transforms/Scalar:
GVNPRE.cpp updated: 1.58 -> 1.59
---
Log message:
1. Correct some comments and clean up some dead code.
2. When calculating ANTIC_IN, only iterate the changed blocks. For most average
inputs this is a small speedup, but for cases with unusual CFGs, this can be a
significant win.
---
Diffs of the changes: (+27 -22)
GVNPRE.cpp | 49 +++--
1 files changed, 27 insertions(+), 22 deletions(-)
Index: llvm/lib/Transforms/Scalar/GVNPRE.cpp
diff -u llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.58
llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.59
--- llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.58 Mon Jun 25 13:25:31 2007
+++ llvm/lib/Transforms/Scalar/GVNPRE.cpp Tue Jun 26 18:29:41 2007
@@ -377,7 +377,7 @@
SmallPtrSet& currExps,
SmallPtrSet& currTemps,
std::set& visited);
-unsigned buildsets(Function& F);
+void buildsets(Function& F);
void insertion_pre(Value* e, BasicBlock* BB,
std::map& avail,
@@ -895,7 +895,7 @@
/// buildsets - Phase 1 of the main algorithm. Construct the AVAIL_OUT
/// and the ANTIC_IN sets.
-unsigned GVNPRE::buildsets(Function& F) {
+void GVNPRE::buildsets(Function& F) {
std::map > generatedExpressions;
std::map > generatedPhis;
std::map > generatedTemporaries;
@@ -937,32 +937,42 @@
// Phase 1, Part 2: calculate ANTIC_IN
std::set visited;
+ SmallPtrSet block_changed;
+ for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
+block_changed.insert(FI);
bool changed = true;
unsigned iterations = 0;
+
while (changed) {
changed = false;
SmallPtrSet anticOut;
-// Top-down walk of the postdominator tree
+// Postorder walk of the CFG
for (po_iterator BBI = po_begin(&F.getEntryBlock()),
BBE = po_end(&F.getEntryBlock()); BBI != BBE; ++BBI) {
BasicBlock* BB = *BBI;
- if (BB == 0)
-continue;
- unsigned ret = buildsets_anticin(BB, anticOut,generatedExpressions[BB],
- generatedTemporaries[BB], visited);
-
- if (ret == 0) {
-changed = true;
-continue;
- } else {
-visited.insert(BB);
-if (ret == 2) {
- DOUT << "CHANGED: " << BB->getName() << "\n";
+ if (block_changed.count(BB) != 0) {
+unsigned ret = buildsets_anticin(BB, anticOut,generatedExpressions[BB],
+ generatedTemporaries[BB], visited);
+
+if (ret == 0) {
+ changed = true;
+ continue;
+} else {
+ visited.insert(BB);
+
+ if (ret == 2)
+ for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
+ PI != PE; ++PI) {
+ block_changed.insert(*PI);
+ }
+ else
+block_changed.erase(BB);
+
+ changed |= (ret == 2);
}
-changed |= (ret == 2);
}
}
@@ -970,8 +980,6 @@
}
DOUT << "ITERATIONS: " << iterations << "\n";
-
- return 0; // No bail, no changes
}
/// insertion_pre - When a partial redundancy has been identified, eliminate it
@@ -1173,10 +1181,7 @@
// This phase calculates the AVAIL_OUT and ANTIC_IN sets
// NOTE: If full postdom information is no available, this will bail
// early, performing GVN but not PRE
- unsigned bail = buildsets(F);
- //If a bail occurred, terminate early
- if (bail != 0)
-return (bail == 2);
+ buildsets(F);
// Phase 2: Insert
// This phase inserts values to make partially redundant values
___
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Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGISel.cpp TargetLowering.cpp
> --- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.500 Fri Jun 22
> 09:59:07 2007
> +++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Jun 25
> 11:23:39 2007
> @@ -173,15 +173,13 @@
> + /// ScalarizeVectorOp - Given an operand of vector type, convert
> it into the
> + /// equivalent operation that returns a scalar value.
> + SDOperand ScalarizeVectorOp(SDOperand O);
This comment should explicitly mention that the function is only
supposed to be called on single-element vector types.
> Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.409 llvm/
> lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.410
> --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.409 Fri Jun 22
> 09:59:07 2007
> +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cppMon Jun 25
> 11:23:39 2007
> @@ -673,7 +673,9 @@
> SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT,
>bool isTarget) {
>assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP
> constant!");
> - if (VT == MVT::f32)
> + MVT::ValueType EltVT =
> +MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
I don't understand this change. getConstantFP shouldn't be called on
vectors, should it? This seems to be a strange thing to overload.
-Chris
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Re: [llvm-commits] CVS: llvm/lib/Target/Target.td
On Jun 25, 2007, at 5:48 PM, Dan Gohman wrote: > Revert the earlier change that removed the M_REMATERIALIZABLE machine > instruction flag, and use the flag along with a virtual member > function > hook for targets to override if there are instructions that are only > trivially rematerializable with specific operands (i.e. constant pool > loads). nice! -chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [128845] Make weak_import work for LLVM.
Revision: 128845
Author: johannes
Date: 2007-06-26 17:16:19 -0700 (Tue, 26 Jun 2007)
Log Message:
---
Make weak_import work for LLVM.
Modified Paths:
--
apple-local/branches/llvm/gcc/config/darwin.h
Modified: apple-local/branches/llvm/gcc/config/darwin.h
===
--- apple-local/branches/llvm/gcc/config/darwin.h 2007-06-26 21:59:14 UTC
(rev 128844)
+++ apple-local/branches/llvm/gcc/config/darwin.h 2007-06-27 00:16:19 UTC
(rev 128845)
@@ -673,6 +673,23 @@
fputc ('\n', FILE);
\
} while (0)
+/* APPLE LOCAL begin LLVM */
+/* weak_import, a Darwin special, does not make function definitions weak. */
+#define TARGET_ADJUST_LLVM_LINKAGE(FN, DECL)\
+ do { \
+if ((DECL) && \
+TREE_CODE (DECL) == FUNCTION_DECL &&\
+!DECL_EXTERNAL (DECL) &&\
+TREE_PUBLIC (DECL) && \
+DECL_WEAK (DECL) && \
+! lookup_attribute ("weak", DECL_ATTRIBUTES (DECL)) && \
+ lookup_attribute ("weak_import", DECL_ATTRIBUTES (DECL)) && \
+(FN)->hasWeakLinkage()) { \
+ (FN)->setLinkage(Function::ExternalLinkage); \
+} \
+ } while (0)
+/* APPLE LOCAL end LLVM */
+
/* Darwin has the pthread routines in libSystem, which every program
links to, so there's no need for weak-ness for that. */
#define GTHREAD_USE_WEAK 0
___
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[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.248 -> 1.249
---
Log message:
Fix an obvious bug. Old code only worked for the entry block.
---
Diffs of the changes: (+4 -3)
LiveIntervalAnalysis.cpp |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.248
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.249
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.248 Mon Jun 18 20:48:04 2007
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Jun 26 20:16:36 2007
@@ -623,10 +623,11 @@
}
exit:
- // Alias of a live-in register might not be used at all.
- if (isAlias && end == 0) {
+ // Live-in register might not be used at all.
+ if (end == MIIdx) {
DOUT << " dead";
-end = getDefIndex(start) + 1;
+if (isAlias)
+ end = getDefIndex(MIIdx) + 1;
}
assert(start < end && "did not find end of interval?");
___
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[llvm-commits] CVS: llvm/test/Transforms/GVNPRE/extractelement.ll insertelement.ll shufflevector.ll
Changes in directory llvm/test/Transforms/GVNPRE:
extractelement.ll added (r1.1)
insertelement.ll added (r1.1)
shufflevector.ll added (r1.1)
---
Log message:
Add tests for performing GVNPRE on the three vector-specific instructions.
---
Diffs of the changes: (+54 -0)
extractelement.ll | 18 ++
insertelement.ll | 18 ++
shufflevector.ll | 18 ++
3 files changed, 54 insertions(+)
Index: llvm/test/Transforms/GVNPRE/extractelement.ll
diff -c /dev/null llvm/test/Transforms/GVNPRE/extractelement.ll:1.1
*** /dev/null Tue Jun 26 23:06:42 2007
--- llvm/test/Transforms/GVNPRE/extractelement.ll Tue Jun 26 23:06:32 2007
***
*** 0
--- 1,18
+ ; RUN: llvm-as < %s | opt -gvnpre | llvm-dis | grep b.gvnpre
+
+ define i32 @extract() {
+ entry:; preds = %cond_false, %entry
+ %foo = add <2 x i32> < i32 1, i32 1 >, < i32 1, i32 1 >
+ br i1 true, label %cond_true, label %cond_false
+
+ cond_true:
+ br label %end
+
+ cond_false:
+ %a = extractelement <2 x i32> %foo, i32 0
+ br label %end
+
+ end:
+ %b = extractelement <2 x i32> %foo, i32 0
+ ret i32 %b
+ }
Index: llvm/test/Transforms/GVNPRE/insertelement.ll
diff -c /dev/null llvm/test/Transforms/GVNPRE/insertelement.ll:1.1
*** /dev/null Tue Jun 26 23:06:55 2007
--- llvm/test/Transforms/GVNPRE/insertelement.llTue Jun 26 23:06:32 2007
***
*** 0
--- 1,18
+ ; RUN: llvm-as < %s | opt -gvnpre | llvm-dis | grep b.gvnpre
+
+ define i32 @extract() {
+ entry:; preds = %cond_false, %entry
+ %foo = add <2 x i32> < i32 1, i32 1 >, < i32 1, i32 1 >
+ br i1 true, label %cond_true, label %cond_false
+
+ cond_true:
+ br label %end
+
+ cond_false:
+ %a = insertelement <2 x i32> %foo, i32 0, i32 3
+ br label %end
+
+ end:
+ %b = insertelement <2 x i32> %foo, i32 0, i32 3
+ ret i32 0
+ }
Index: llvm/test/Transforms/GVNPRE/shufflevector.ll
diff -c /dev/null llvm/test/Transforms/GVNPRE/shufflevector.ll:1.1
*** /dev/null Tue Jun 26 23:06:55 2007
--- llvm/test/Transforms/GVNPRE/shufflevector.llTue Jun 26 23:06:32 2007
***
*** 0
--- 1,18
+ ; RUN: llvm-as < %s | opt -gvnpre | llvm-dis | grep b.gvnpre
+
+ define i32 @extract() {
+ entry:; preds = %cond_false, %entry
+ %foo = add <2 x i32> < i32 1, i32 1 >, < i32 1, i32 1 >
+ br i1 true, label %cond_true, label %cond_false
+
+ cond_true:
+ br label %end
+
+ cond_false:
+ %a = shufflevector <2 x i32> %foo, <2 x i32> undef, <2 x i32> < i32 0, i32
1 >
+ br label %end
+
+ end:
+ %b = shufflevector <2 x i32> %foo, <2 x i32> undef, <2 x i32> < i32 0, i32
1 >
+ ret i32 0
+ }
___
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/GVNPRE.cpp
Changes in directory llvm/lib/Transforms/Scalar:
GVNPRE.cpp updated: 1.59 -> 1.60
---
Log message:
Add support for performing GVNPRE on the three vector-specific operations.
---
Diffs of the changes: (+436 -20)
GVNPRE.cpp | 456 ++---
1 files changed, 436 insertions(+), 20 deletions(-)
Index: llvm/lib/Transforms/Scalar/GVNPRE.cpp
diff -u llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.59
llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.60
--- llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.59 Tue Jun 26 18:29:41 2007
+++ llvm/lib/Transforms/Scalar/GVNPRE.cpp Tue Jun 26 23:10:46 2007
@@ -58,24 +58,30 @@
ICMPSGT, ICMPSGE, ICMPSLT, ICMPSLE, FCMPOEQ,
FCMPOGT, FCMPOGE, FCMPOLT, FCMPOLE, FCMPONE,
FCMPORD, FCMPUNO, FCMPUEQ, FCMPUGT, FCMPUGE,
- FCMPULT, FCMPULE, FCMPUNE };
+ FCMPULT, FCMPULE, FCMPUNE, EXTRACT, INSERT,
+ SHUFFLE };
ExpressionOpcode opcode;
-uint32_t leftVN;
-uint32_t rightVN;
+uint32_t firstVN;
+uint32_t secondVN;
+uint32_t thirdVN;
bool operator< (const Expression& other) const {
if (opcode < other.opcode)
return true;
else if (opcode > other.opcode)
return false;
- else if (leftVN < other.leftVN)
+ else if (firstVN < other.firstVN)
return true;
- else if (leftVN > other.leftVN)
+ else if (firstVN > other.firstVN)
return false;
- else if (rightVN < other.rightVN)
+ else if (secondVN < other.secondVN)
return true;
- else if (rightVN > other.rightVN)
+ else if (secondVN > other.secondVN)
+return false;
+ else if (thirdVN < other.thirdVN)
+return true;
+ else if (thirdVN > other.thirdVN)
return false;
else
return false;
@@ -92,6 +98,9 @@
Expression::ExpressionOpcode getOpcode(CmpInst* C);
Expression create_expression(BinaryOperator* BO);
Expression create_expression(CmpInst* C);
+ Expression create_expression(ShuffleVectorInst* V);
+ Expression create_expression(ExtractElementInst* C);
+ Expression create_expression(InsertElementInst* V);
public:
ValueTable() { nextValueNumber = 1; }
uint32_t lookup_or_add(Value* V);
@@ -218,8 +227,9 @@
ValueTable::Expression ValueTable::create_expression(BinaryOperator* BO) {
Expression e;
- e.leftVN = lookup_or_add(BO->getOperand(0));
- e.rightVN = lookup_or_add(BO->getOperand(1));
+ e.firstVN = lookup_or_add(BO->getOperand(0));
+ e.secondVN = lookup_or_add(BO->getOperand(1));
+ e.thirdVN = 0;
e.opcode = getOpcode(BO);
return e;
@@ -228,13 +238,47 @@
ValueTable::Expression ValueTable::create_expression(CmpInst* C) {
Expression e;
- e.leftVN = lookup_or_add(C->getOperand(0));
- e.rightVN = lookup_or_add(C->getOperand(1));
+ e.firstVN = lookup_or_add(C->getOperand(0));
+ e.secondVN = lookup_or_add(C->getOperand(1));
+ e.thirdVN = 0;
e.opcode = getOpcode(C);
return e;
}
+ValueTable::Expression ValueTable::create_expression(ShuffleVectorInst* S) {
+ Expression e;
+
+ e.firstVN = lookup_or_add(S->getOperand(0));
+ e.secondVN = lookup_or_add(S->getOperand(1));
+ e.thirdVN = lookup_or_add(S->getOperand(2));
+ e.opcode = Expression::SHUFFLE;
+
+ return e;
+}
+
+ValueTable::Expression ValueTable::create_expression(ExtractElementInst* E) {
+ Expression e;
+
+ e.firstVN = lookup_or_add(E->getOperand(0));
+ e.secondVN = lookup_or_add(E->getOperand(1));
+ e.thirdVN = 0;
+ e.opcode = Expression::EXTRACT;
+
+ return e;
+}
+
+ValueTable::Expression ValueTable::create_expression(InsertElementInst* I) {
+ Expression e;
+
+ e.firstVN = lookup_or_add(I->getOperand(0));
+ e.secondVN = lookup_or_add(I->getOperand(1));
+ e.thirdVN = lookup_or_add(I->getOperand(2));
+ e.opcode = Expression::INSERT;
+
+ return e;
+}
+
//===--===//
// ValueTable External Functions
//===--===//
@@ -273,6 +317,45 @@
return nextValueNumber++;
}
+ } else if (ShuffleVectorInst* U = dyn_cast(V)) {
+Expression e = create_expression(U);
+
+std::map::iterator EI = expressionNumbering.find(e);
+if (EI != expressionNumbering.end()) {
+ valueNumbering.insert(std::make_pair(V, EI->second));
+ return EI->second;
+} else {
+ expressionNumbering.insert(std::make_pair(e, nextValueNumber));
+ valueNumbering.insert(std::make_pair(V, nextValueNumber));
+
+ return nextValueNumber++;
+}
+ } else if (ExtractElementInst* U
[llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp
Changes in directory llvm/lib/CodeGen:
LiveVariables.cpp updated: 1.85 -> 1.86
---
Log message:
Replace std::set with SmallPtrSet.
---
Diffs of the changes: (+5 -3)
LiveVariables.cpp |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.85
llvm/lib/CodeGen/LiveVariables.cpp:1.86
--- llvm/lib/CodeGen/LiveVariables.cpp:1.85 Tue Jun 26 16:03:35 2007
+++ llvm/lib/CodeGen/LiveVariables.cpp Wed Jun 27 00:23:00 2007
@@ -32,6 +32,7 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/DepthFirstIterator.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Config/alloca.h"
#include
@@ -424,9 +425,10 @@
// nodes, which are treated as a special case).
//
MachineBasicBlock *Entry = MF->begin();
- std::set Visited;
- for (df_ext_iterator DFI = df_ext_begin(Entry, Visited),
- E = df_ext_end(Entry, Visited); DFI != E; ++DFI) {
+ SmallPtrSet Visited;
+ for (df_ext_iterator >
+ DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited);
+ DFI != E; ++DFI) {
MachineBasicBlock *MBB = *DFI;
// Mark live-in registers as live-in.
___
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