Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.57 -> 1.58 --- Log message: Add immediate sub-registers. --- Diffs of the changes: (+21 -0) RegisterInfoEmitter.cpp | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+) Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.57 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.58 --- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.57 Wed Jun 13 17:20:15 2007 +++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Tue Jun 26 15:54:46 2007 @@ -359,6 +359,7 @@ OS << " };\n"; // Emit register sub-registers / super-registers, aliases... + std::map<Record*, std::set<Record*> > RegisterImmSubRegs; std::map<Record*, std::set<Record*> > RegisterSubRegs; std::map<Record*, std::set<Record*> > RegisterSuperRegs; std::map<Record*, std::set<Record*> > RegisterAliases; @@ -397,6 +398,7 @@ cerr << "Warning: register " << getQualifiedName(SubReg) << " specified as a sub-register of " << getQualifiedName(R) << " multiple times!\n"; + RegisterImmSubRegs[R].insert(SubReg); addSubSuperReg(R, SubReg, RegisterSubRegs, RegisterSuperRegs, RegisterAliases, *this); } @@ -434,6 +436,21 @@ OS << "0 };\n"; } + if (!RegisterImmSubRegs.empty()) + OS << "\n\n // Register Immediate Sub-registers Sets...\n"; + + // Loop over all of the registers which have sub-registers, emitting the + // sub-registers list to memory. + for (std::map<Record*, std::set<Record*> >::iterator + I = RegisterImmSubRegs.begin(), E = RegisterImmSubRegs.end(); + I != E; ++I) { + OS << " const unsigned " << I->first->getName() << "_ImmSubRegsSet[] = { "; + for (std::set<Record*>::iterator ASI = I->second.begin(), + E = I->second.end(); ASI != E; ++ASI) + OS << getQualifiedName(*ASI) << ", "; + OS << "0 };\n"; + } + if (!RegisterSuperRegs.empty()) OS << "\n\n // Register Super-registers Sets...\n"; @@ -472,6 +489,10 @@ OS << Reg.getName() << "_SubRegsSet,\t"; else OS << "Empty_SubRegsSet,\t"; + if (RegisterImmSubRegs.count(Reg.TheDef)) + OS << Reg.getName() << "_ImmSubRegsSet,\t"; + else + OS << "Empty_SubRegsSet,\t"; if (RegisterSuperRegs.count(Reg.TheDef)) OS << Reg.getName() << "_SuperRegsSet },\n"; else _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits