[llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp BitcodeReader.h
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.20 -> 1.21
BitcodeReader.h updated: 1.14 -> 1.15
---
Log message:
handle function-level forward references, read binops.
---
Diffs of the changes: (+147 -22)
BitcodeReader.cpp | 150 ++
BitcodeReader.h | 19 ++
2 files changed, 147 insertions(+), 22 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.20
llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.21
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.20 Tue May 1 00:52:21 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Tue May 1 02:01:57 2007
@@ -15,6 +15,7 @@
#include "BitcodeReader.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
+#include "llvm/Instructions.h"
#include "llvm/Module.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/MathExtras.h"
@@ -125,10 +126,9 @@
NumOperands = Idx+1;
}
- if (Uses[Idx]) {
-assert(Ty == getOperand(Idx)->getType() &&
- "Type mismatch in constant table!");
-return cast(getOperand(Idx));
+ if (Value *V = Uses[Idx]) {
+assert(Ty == V->getType() && "Type mismatch in constant table!");
+return cast(V);
}
// Create and return a placeholder, which will later be RAUW'd.
@@ -137,6 +137,25 @@
return C;
}
+Value *BitcodeReaderValueList::getValueFwdRef(unsigned Idx, const Type *Ty) {
+ if (Idx >= size()) {
+// Insert a bunch of null values.
+Uses.resize(Idx+1);
+OperandList = &Uses[0];
+NumOperands = Idx+1;
+ }
+
+ if (Value *V = Uses[Idx]) {
+assert((Ty == 0 || Ty == V->getType()) && "Type mismatch in value table!");
+return V;
+ }
+
+ // Create and return a placeholder, which will later be RAUW'd.
+ Value *V = new Argument(Ty);
+ Uses[Idx].init(V, this);
+ return V;
+}
+
const Type *BitcodeReader::getTypeByID(unsigned ID, bool isTypeTable) {
// If the TypeID is in range, return it.
@@ -151,7 +170,6 @@
return TypeList.back().get();
}
-
bool BitcodeReader::ParseTypeTable() {
if (Stream.EnterSubBlock())
return Error("Malformed block record");
@@ -643,18 +661,7 @@
}
}
-if (NextCstNo == ValueList.size())
- ValueList.push_back(V);
-else if (ValueList[NextCstNo] == 0)
- ValueList.initVal(NextCstNo, V);
-else {
- // If there was a forward reference to this constant,
- Value *OldV = ValueList[NextCstNo];
- ValueList.setOperand(NextCstNo, V);
- OldV->replaceAllUsesWith(V);
- delete OldV;
-}
-
+ValueList.AssignValue(V, NextCstNo);
++NextCstNo;
}
}
@@ -998,6 +1005,8 @@
for(Function::arg_iterator I = F->arg_begin(), E = F->arg_end(); I != E; ++I)
ValueList.push_back(I);
+ unsigned NextValueNo = ValueList.size();
+
// Read all the records.
SmallVector Record;
while (1) {
@@ -1016,6 +1025,7 @@
break;
case bitc::CONSTANTS_BLOCK_ID:
if (ParseConstants()) return true;
+NextValueNo = ValueList.size();
break;
case bitc::VALUE_SYMTAB_BLOCK_ID:
if (ParseValueSymbolTable()) return true;
@@ -1031,19 +1041,115 @@
// Read a record.
Record.clear();
+Instruction *I = 0;
+BasicBlock *CurBB = 0;
+unsigned CurBBNo = 0;
switch (Stream.ReadRecord(Code, Record)) {
-default: // Default behavior: unknown constant
+default: // Default behavior: reject
+ return Error("Unknown instruction");
case bitc::FUNC_CODE_DECLAREBLOCKS: // DECLAREBLOCKS: [nblocks]
- if (Record.size() < 1)
-return Error("Invalid FUNC_CODE_DECLAREBLOCKS record");
+ if (Record.size() < 1 || Record[0] == 0)
+return Error("Invalid DECLAREBLOCKS record");
// Create all the basic blocks for the function.
FunctionBBs.resize(Record.size());
for (unsigned i = 0, e = FunctionBBs.size(); i != e; ++i)
FunctionBBs[i] = new BasicBlock("", F);
- break;
-}
+ CurBB = FunctionBBs[0];
+ continue;
+
+case bitc::FUNC_CODE_INST_BINOP: {
+ // BINOP: [opcode, ty, opval, opval]
+ if (Record.size() < 4) return Error("Invalid BINOP record");
+ const Type *Ty = getTypeByID(Record[1]);
+ int Opc = GetDecodedBinaryOpcode(Record[0], Ty);
+ Value *LHS = getFnValueByID(Record[2], Ty);
+ Value *RHS = getFnValueByID(Record[3], Ty);
+ if (Opc == -1 || Ty == 0 || LHS == 0 || RHS == 0)
+ return Error("Invalid BINOP record");
+ I = BinaryOperator::create((Instruction::BinaryOps)Opc, LHS, RHS);
+ break;
+}
+#if 0
+case bitc::FUNC_CODE_INST_CAST:
+ // CAST: [opcode, ty, opty, opval]
+case bitc::FUNC_CODE_INST_GEP:
+ // GEP:[n, n x operands]
+case bitc::FUNC_CODE_INST_SELECT:
+ // SELECT: [ty, opval, opval, opval]
+case bitc::FUNC_CODE_INST_EXTRACTELT:
+ // EXTRACTELT: [op
[llvm-commits] CVS: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Changes in directory llvm/lib/Bitcode/Writer:
BitcodeWriter.cpp updated: 1.18 -> 1.19
---
Log message:
fix build with non-buggy compilers
---
Diffs of the changes: (+11 -10)
BitcodeWriter.cpp | 21 +++--
1 files changed, 11 insertions(+), 10 deletions(-)
Index: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff -u llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.18
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.19
--- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.18 Mon Apr 30 21:14:57 2007
+++ llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Tue May 1 02:03:37 2007
@@ -571,7 +571,7 @@
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
Vals.push_back(VE.getValueID(I.getOperand(i)));
break;
- case Instruction::Invoke:
+ case Instruction::Invoke: {
Code = bitc::FUNC_CODE_INST_INVOKE;
// FIXME: param attrs
Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
@@ -596,6 +596,7 @@
}
}
break;
+ }
case Instruction::Unwind:
Code = bitc::FUNC_CODE_INST_UNWIND;
break;
@@ -658,18 +659,18 @@
for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)
Vals.push_back(VE.getValueID(I.getOperand(i+1))); // fixed param.
- // Emit type/value pairs for varargs params.
- if (FTy->isVarArg()) {
-unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
-Vals.push_back(NumVarargs);
-for (unsigned i = I.getNumOperands()-NumVarargs, e =
I.getNumOperands();
- i != e; ++i) {
- Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
- Vals.push_back(VE.getValueID(I.getOperand(i)));
-}
+// Emit type/value pairs for varargs params.
+if (FTy->isVarArg()) {
+ unsigned NumVarargs = I.getNumOperands()-1-FTy->getNumParams();
+ Vals.push_back(NumVarargs);
+ for (unsigned i = I.getNumOperands()-NumVarargs, e = I.getNumOperands();
+ i != e; ++i) {
+Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
+Vals.push_back(VE.getValueID(I.getOperand(i)));
}
}
break;
+ }
case Instruction::VAArg:
Code = bitc::FUNC_CODE_INST_VAARG;
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Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Doh. Brain cramp.
Evan
On Apr 30, 2007, at 9:39 PM, Chris Lattner wrote:
>> +bool HasUses = false;
>> +SmallVector VTs;
>> +for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
>> + if (!N->hasNUsesOfValue(0, i)) {
>> +HasUses = true;
>> +break;
>> + }
>> + VTs.push_back(N->getValueType(i));
>> +}
>> +if (!HasUses) {
>> + SmallVector Ops;
>> + return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size
>> (), 0, 0),
>> + Chain);
>
> This can never trigger and isn't right if it did.
>
> #1: This should trigger if the chain has uses but the other values do
> not. If the entire node is dead, it will already have been removed.
>
> #2. you can't create an undef with multiple results, you have to
> create multiple undefs :)
>
> I'd suggest just writing this as:
>
>if (N->getValueType(1) == MVT::Other) {
> // single result case.
>} else {
> assert(N->getValueType(2) == MVT::Other);
> // multi result case.
>}
>
> This lets you drop the looping and smallvector.
>
> -Chris
>
> ___
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.297 -> 1.298
---
Log message:
Forgot about chain result; also UNDEF cannot have multiple values.
---
Diffs of the changes: (+12 -12)
DAGCombiner.cpp | 24
1 files changed, 12 insertions(+), 12 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.298
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297 Mon Apr 30 19:38:21 2007
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue May 1 03:53:39 2007
@@ -3331,19 +3331,19 @@
// the updated indexed value in case of indexed loads), change uses of the
// chain value into uses of the chain input (i.e. delete the dead load).
if (!LD->isVolatile()) {
-bool HasUses = false;
-SmallVector VTs;
-for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
- if (!N->hasNUsesOfValue(0, i)) {
-HasUses = true;
-break;
+if (N->getValueType(1) == MVT::Other) {
+ // Unindexed loads.
+ if (N->hasNUsesOfValue(0, 0))
+return CombineTo(N, DAG.getNode(ISD::UNDEF, N->getValueType(0)),
Chain);
+} else {
+ // Indexed loads.
+ assert(N->getValueType(2) == MVT::Other && "Malformed indexed loads?");
+ if (N->hasNUsesOfValue(0, 0) && N->hasNUsesOfValue(0, 1)) {
+SDOperand Undef0 = DAG.getNode(ISD::UNDEF, N->getValueType(0));
+SDOperand Undef1 = DAG.getNode(ISD::UNDEF, N->getValueType(1));
+SDOperand To[] = { Undef0, Undef1, Chain };
+return CombineTo(N, To, 3);
}
- VTs.push_back(N->getValueType(i));
-}
-if (!HasUses) {
- SmallVector Ops;
- return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size(), 0, 0),
- Chain);
}
}
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[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Changes in directory llvm/include/llvm/Target: MRegisterInfo.h updated: 1.109 -> 1.110 --- Log message: Add SPAdj parameter to account for call frame setup SP adjustment. --- Diffs of the changes: (+4 -3) MRegisterInfo.h |7 --- 1 files changed, 4 insertions(+), 3 deletions(-) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.109 llvm/include/llvm/Target/MRegisterInfo.h:1.110 --- llvm/include/llvm/Target/MRegisterInfo.h:1.109 Tue May 1 00:57:02 2007 +++ llvm/include/llvm/Target/MRegisterInfo.hTue May 1 03:58:27 2007 @@ -512,11 +512,12 @@ /// referenced by the iterator contains an MO_FrameIndex operand which must be /// eliminated by this method. This method may modify or replace the /// specified instruction, as long as it keeps the iterator pointing the the - /// finished product. The return value is the number of instructions - /// added to (negative if removed from) the basic block. + /// finished product. SPAdj is the SP adjustment due to call frame setup + /// instruction. The return value is the number of instructions added to + /// (negative if removed from) the basic block. /// virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, - RegScavenger *RS = NULL) const = 0; + int SPAdj, RegScavenger *RS=NULL) const = 0; /// emitProlog/emitEpilog - These methods insert prolog and epilog code into /// the function. The return value is the number of instructions ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/RegisterScavenging.h
Changes in directory llvm/include/llvm/CodeGen:
RegisterScavenging.h updated: 1.12 -> 1.13
---
Log message:
Pass call frame setup SP adjustment along to eliminateFrameIndex().
---
Diffs of the changes: (+6 -5)
RegisterScavenging.h | 11 ++-
1 files changed, 6 insertions(+), 5 deletions(-)
Index: llvm/include/llvm/CodeGen/RegisterScavenging.h
diff -u llvm/include/llvm/CodeGen/RegisterScavenging.h:1.12
llvm/include/llvm/CodeGen/RegisterScavenging.h:1.13
--- llvm/include/llvm/CodeGen/RegisterScavenging.h:1.12 Mon Mar 26 17:23:54 2007
+++ llvm/include/llvm/CodeGen/RegisterScavenging.h Tue May 1 03:59:18 2007
@@ -117,12 +117,13 @@
int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
/// scavengeRegister - Make a register of the specific register class
- /// available and do the appropriate bookkeeping. Returns the scavenged
- /// register.
+ /// available and do the appropriate bookkeeping. SPAdj is the stack
+ /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
+ /// Returns the scavenged register.
unsigned scavengeRegister(const TargetRegisterClass *RegClass,
-MachineBasicBlock::iterator I);
- unsigned scavengeRegister(const TargetRegisterClass *RegClass) {
-return scavengeRegister(RegClass, MBBI);
+MachineBasicBlock::iterator I, int SPAdj);
+ unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
+return scavengeRegister(RegClass, MBBI, SPAdj);
}
private:
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[llvm-commits] CVS: llvm/lib/CodeGen/PrologEpilogInserter.cpp RegisterScavenging.cpp
Changes in directory llvm/lib/CodeGen:
PrologEpilogInserter.cpp updated: 1.83 -> 1.84
RegisterScavenging.cpp updated: 1.16 -> 1.17
---
Log message:
If call frame is not part of stack frame and no dynamic alloc,
eliminateFrameIndex() must adjust SP offset with size of call frames.
---
Diffs of the changes: (+49 -18)
PrologEpilogInserter.cpp | 58 +++
RegisterScavenging.cpp |9 ---
2 files changed, 49 insertions(+), 18 deletions(-)
Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
diff -u llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.83
llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.84
--- llvm/lib/CodeGen/PrologEpilogInserter.cpp:1.83 Mon Apr 30 19:51:28 2007
+++ llvm/lib/CodeGen/PrologEpilogInserter.cpp Tue May 1 04:01:42 2007
@@ -26,6 +26,7 @@
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/ADT/STLExtras.h"
#include
using namespace llvm;
@@ -151,9 +152,14 @@
MachineFrameInfo *FFI = Fn.getFrameInfo();
FFI->setHasCalls(HasCalls);
FFI->setMaxCallFrameSize(MaxCallFrameSize);
+
for (unsigned i = 0, e = FrameSDOps.size(); i != e; ++i) {
MachineBasicBlock::iterator I = FrameSDOps[i];
-RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
+// If call frames are not being included as part of the stack frame,
+// and there is no dynamic allocation (therefore referencing frame slots
+// off sp), leave the pseudo ops alone. We'll eliminate them later.
+if (RegInfo->hasReservedCallFrame(Fn) || RegInfo->hasFP(Fn))
+ RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
}
// Now figure out which *callee saved* registers are modified by the current
@@ -491,25 +497,49 @@
const TargetMachine &TM = Fn.getTarget();
assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
const MRegisterInfo &MRI = *TM.getRegisterInfo();
+ const TargetFrameInfo *TFI = TM.getFrameInfo();
+ bool StackGrowsDown =
+TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
+ int FrameSetupOpcode = MRI.getCallFrameSetupOpcode();
+ int FrameDestroyOpcode = MRI.getCallFrameDestroyOpcode();
for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
{
+int SPAdj = 0; // SP offset due to call frame setup / destroy.
if (RS) RS->enterBasicBlock(BB);
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
- MachineInstr *MI = I++;
- for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
-if (MI->getOperand(i).isFrameIndex()) {
- // If this instruction has a FrameIndex operand, we need to use that
- // target machine register info object to eliminate it.
- MRI.eliminateFrameIndex(MI, RS);
-
- // Revisit the instruction in full. Some instructions (e.g. inline
- // asm instructions) can have multiple frame indices.
- --I;
- MI = 0;
- break;
-}
+ MachineInstr *MI = I;
+
+ // Remember how much SP has been adjustment to create the call frame.
+ if (I->getOpcode() == FrameSetupOpcode ||
+ I->getOpcode() == FrameDestroyOpcode) {
+int Size = I->getOperand(0).getImmedValue();
+if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
+(StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
+ Size = -Size;
+SPAdj += Size;
+MachineBasicBlock::iterator PrevI = prior(I);
+MRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
+// Visit the instructions created by eliminateCallFramePseudoInstr().
+I = next(PrevI);
+MI = NULL;
+ } else {
+I++;
+for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
+ if (MI->getOperand(i).isFrameIndex()) {
+// If this instruction has a FrameIndex operand, we need to use
that
+// target machine register info object to eliminate it.
+MRI.eliminateFrameIndex(MI, SPAdj, RS);
+
+// Revisit the instruction in full. Some instructions (e.g. inline
+// asm instructions) can have multiple frame indices.
+--I;
+MI = 0;
+break;
+ }
+ }
// Update register states.
if (RS && MI) RS->forward(MI);
}
+assert(SPAdj == 0 && "Unbalanced call frame setup / destroy pairs?");
}
}
Index: llvm/lib/CodeGen/RegisterScavenging.cpp
diff -u llvm/lib/CodeGen/RegisterScavenging.cpp:1.16
llvm/lib/CodeGen/RegisterScavenging.cpp:1.17
--- llvm/lib/CodeGen/RegisterScavenging.cpp:1.16Thu Apr 26 13:59:33 2007
+++ llvm/lib/CodeGen/RegisterScavenging.cpp Tue May 1 04:01:42 2007
@@ -75,7 +75,7 @@
RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
ScavengingFrameIndex, ScavengedRC);
MachineBasicBlock::iterator II =
[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp SparcRegisterInfo.h
Changes in directory llvm/lib/Target/Sparc:
SparcRegisterInfo.cpp updated: 1.58 -> 1.59
SparcRegisterInfo.h updated: 1.23 -> 1.24
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
SparcRegisterInfo.cpp |4 +++-
SparcRegisterInfo.h |2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.58
llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.59
--- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.58Tue Mar 20 03:08:48 2007
+++ llvm/lib/Target/Sparc/SparcRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -165,7 +165,9 @@
}
void SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
-RegScavenger *RS) const {
+int SPAdj, RegScavenger *RS) const
{
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
while (!MI.getOperand(i).isFrameIndex()) {
Index: llvm/lib/Target/Sparc/SparcRegisterInfo.h
diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.23
llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.24
--- llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.23 Tue Mar 20 03:08:48 2007
+++ llvm/lib/Target/Sparc/SparcRegisterInfo.h Tue May 1 04:13:03 2007
@@ -64,7 +64,7 @@
MachineBasicBlock::iterator I) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp X86RegisterInfo.h
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.216 -> 1.217
X86RegisterInfo.h updated: 1.51 -> 1.52
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
X86RegisterInfo.cpp |4 +++-
X86RegisterInfo.h |2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.216
llvm/lib/Target/X86/X86RegisterInfo.cpp:1.217
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.216 Wed Apr 25 20:09:28 2007
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -986,7 +986,9 @@
}
void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const{
+ int SPAdj, RegScavenger *RS) const{
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
MachineFunction &MF = *MI.getParent()->getParent();
Index: llvm/lib/Target/X86/X86RegisterInfo.h
diff -u llvm/lib/Target/X86/X86RegisterInfo.h:1.51
llvm/lib/Target/X86/X86RegisterInfo.h:1.52
--- llvm/lib/Target/X86/X86RegisterInfo.h:1.51 Tue Mar 20 03:09:38 2007
+++ llvm/lib/Target/X86/X86RegisterInfo.h Tue May 1 04:13:03 2007
@@ -94,7 +94,7 @@
MachineBasicBlock::iterator MI) const;
void eliminateFrameIndex(MachineBasicBlock::iterator MI,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp ARMRegisterInfo.h
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.91 -> 1.92
ARMRegisterInfo.h updated: 1.18 -> 1.19
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+5 -4)
ARMRegisterInfo.cpp |7 ---
ARMRegisterInfo.h |2 +-
2 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.91
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.92
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.91Mon Apr 30 19:52:08 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -689,7 +689,7 @@
}
void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const{
+ int SPAdj, RegScavenger *RS) const{
unsigned i = 0;
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
@@ -705,7 +705,7 @@
unsigned FrameReg = ARM::SP;
int FrameIndex = MI.getOperand(i).getFrameIndex();
int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
- MF.getFrameInfo()->getStackSize();
+ MF.getFrameInfo()->getStackSize() + SPAdj;
if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex))
Offset -= AFI->getGPRCalleeSavedArea1Offset();
@@ -714,6 +714,7 @@
else if (AFI->isDPRCalleeSavedAreaFrame(FrameIndex))
Offset -= AFI->getDPRCalleeSavedAreaOffset();
else if (hasFP(MF)) {
+assert(SPAdj == 0 && "Unexpected");
// There is alloca()'s in this function, must reference off the frame
// pointer instead.
FrameReg = getFrameRegister(MF);
@@ -988,7 +989,7 @@
unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI);
if (ScratchReg == 0)
// No register is "free". Scavenge a register.
- ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II);
+ ScratchReg = RS->scavengeRegister(&ARM::GPRRegClass, II, SPAdj);
emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
isSub ? -Offset : Offset, TII);
MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
Index: llvm/lib/Target/ARM/ARMRegisterInfo.h
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.18
llvm/lib/Target/ARM/ARMRegisterInfo.h:1.19
--- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.18 Mon Apr 30 19:52:08 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.h Tue May 1 04:13:03 2007
@@ -85,7 +85,7 @@
MachineBasicBlock::iterator I) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS = NULL) const;
___
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp AlphaRegisterInfo.h
Changes in directory llvm/lib/Target/Alpha:
AlphaRegisterInfo.cpp updated: 1.65 -> 1.66
AlphaRegisterInfo.h updated: 1.23 -> 1.24
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
AlphaRegisterInfo.cpp |4 +++-
AlphaRegisterInfo.h |2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.65
llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.66
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.65Mon Apr 16 13:10:22 2007
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -255,7 +255,9 @@
//<- SP
void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
-RegScavenger *RS) const {
+int SPAdj, RegScavenger *RS) const
{
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.h
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.23
llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.24
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.23 Tue Mar 20 03:07:46 2007
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.h Tue May 1 04:13:03 2007
@@ -61,7 +61,7 @@
MachineBasicBlock::iterator I) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
//void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.h
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.122 -> 1.123
PPCRegisterInfo.h updated: 1.34 -> 1.35
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
PPCRegisterInfo.cpp |4 +++-
PPCRegisterInfo.h |2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.122
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.123
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.122 Wed Apr 25 17:13:27 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -589,7 +589,9 @@
}
void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS) const {
+ int SPAdj, RegScavenger *RS) const {
+ assert(SPAdj == 0 && "Unexpected");
+
// Get the instruction.
MachineInstr &MI = *II;
// Get the instruction's basic block.
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.34
llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.35
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.34 Tue Mar 20 03:08:30 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Tue May 1 04:13:03 2007
@@ -80,7 +80,7 @@
void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
/// determineFrameLayout - Determine the size of the frame and maximum call
/// frame size.
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.cpp IA64RegisterInfo.h
Changes in directory llvm/lib/Target/IA64:
IA64RegisterInfo.cpp updated: 1.35 -> 1.36
IA64RegisterInfo.h updated: 1.17 -> 1.18
---
Log message:
eliminateFrameIndex() change.
---
Diffs of the changes: (+4 -2)
IA64RegisterInfo.cpp |4 +++-
IA64RegisterInfo.h |2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.35
llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.36
--- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.35 Tue Mar 20 03:08:04 2007
+++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Tue May 1 04:13:03 2007
@@ -177,7 +177,9 @@
}
void IA64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
- RegScavenger *RS)const{
+ int SPAdj, RegScavenger *RS)const{
+ assert(SPAdj == 0 && "Unexpected");
+
unsigned i = 0;
MachineInstr &MI = *II;
MachineBasicBlock &MBB = *MI.getParent();
Index: llvm/lib/Target/IA64/IA64RegisterInfo.h
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.h:1.17
llvm/lib/Target/IA64/IA64RegisterInfo.h:1.18
--- llvm/lib/Target/IA64/IA64RegisterInfo.h:1.17Tue Mar 20 03:08:04 2007
+++ llvm/lib/Target/IA64/IA64RegisterInfo.h Tue May 1 04:13:03 2007
@@ -60,7 +60,7 @@
MachineBasicBlock::iterator MI) const;
void eliminateFrameIndex(MachineBasicBlock::iterator MI,
- RegScavenger *RS = NULL) const;
+ int SPAdj, RegScavenger *RS = NULL) const;
void emitPrologue(MachineFunction &MF) const;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
Changes in directory llvm/lib/Target/X86: X86TargetAsmInfo.cpp updated: 1.36 -> 1.37 --- Log message: Adjust correct EH-related sections --- Diffs of the changes: (+4 -0) X86TargetAsmInfo.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.36 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.37 --- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.36 Wed Apr 25 09:27:10 2007 +++ llvm/lib/Target/X86/X86TargetAsmInfo.cppTue May 1 05:16:06 2007 @@ -121,6 +121,10 @@ DwarfARangesSection = "\t.section\t.debug_aranges,\"\",@progbits"; DwarfRangesSection = "\t.section\t.debug_ranges,\"\",@progbits"; DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\",@progbits"; + +SupportsExceptionHandling = true; +DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\",@progbits"; +DwarfExceptionSection = "\t.section\t.gcc_except_table,\"a\",@progbits"; break; case X86Subtarget::isCygwin: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
Changes in directory llvm/lib/Target/X86: X86TargetAsmInfo.cpp updated: 1.37 -> 1.38 --- Log message: Use correct PC symbol --- Diffs of the changes: (+2 -0) X86TargetAsmInfo.cpp |2 ++ 1 files changed, 2 insertions(+) Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.37 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.38 --- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.37 Tue May 1 05:16:06 2007 +++ llvm/lib/Target/X86/X86TargetAsmInfo.cppTue May 1 05:19:31 2007 @@ -109,6 +109,8 @@ PrivateGlobalPrefix = ".L"; WeakRefDirective = "\t.weak\t"; SetDirective = "\t.set\t"; +PCSymbol = "."; + DwarfRequiresFrameSection = false; DwarfAbbrevSection = "\t.section\t.debug_abbrev,\"\",@progbits"; DwarfInfoSection ="\t.section\t.debug_info,\"\",@progbits"; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] ELF sections in X86AsmTargetAsm.cpp
The attached patch sets the section names for fixed-size constants for ELF on x86 to match what GCC uses, and it uses the mergeable flag so that duplicate constants can be merged. This works for me with GAS; are there other assemblers (or linkers?) being used with LLVM on x86 ELF targets that don't support this? It looks like nasm/yasm wouldn't accept some of the other things that LLVM currently emits anyway.. Dan -- Dan Gohman, Cray Inc. Index: lib/Target/X86/X86TargetAsmInfo.cpp === RCS file: /var/cvs/llvm/llvm/lib/Target/X86/X86TargetAsmInfo.cpp,v retrieving revision 1.38 diff -u -r1.38 X86TargetAsmInfo.cpp --- lib/Target/X86/X86TargetAsmInfo.cpp +++ lib/Target/X86/X86TargetAsmInfo.cpp @@ -106,6 +106,11 @@ // HasDotFile - True if target asm supports .file directives. // bool HasDotFile; // Defaults to false. ReadOnlySection = "\t.section\t.rodata\n"; +FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\",@progbits,4"; +EightByteConstantSection = "\t.section\t.rodata.cst8,\"aM\",@progbits,8"; +SixteenByteConstantSection = + "\t.section\t.rodata.cst16,\"aM\",@progbits,16"; +CStringSection = "\t.section\t.rodata.str1.1,\"aMS\",@progbits,1"; PrivateGlobalPrefix = ".L"; WeakRefDirective = "\t.weak\t"; SetDirective = "\t.set\t"; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> Forgot about chain result; also UNDEF cannot have multiple values.
Nice! Thanks Evan,
-Chris
> ---
> Diffs of the changes: (+12 -12)
>
> DAGCombiner.cpp | 24
> 1 files changed, 12 insertions(+), 12 deletions(-)
>
>
> Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297 llvm/
> lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.298
> --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.297 Mon Apr 30
> 19:38:21 2007
> +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue May 1
> 03:53:39 2007
> @@ -3331,19 +3331,19 @@
>// the updated indexed value in case of indexed loads), change
> uses of the
>// chain value into uses of the chain input (i.e. delete the
> dead load).
>if (!LD->isVolatile()) {
> -bool HasUses = false;
> -SmallVector VTs;
> -for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
> - if (!N->hasNUsesOfValue(0, i)) {
> -HasUses = true;
> -break;
> +if (N->getValueType(1) == MVT::Other) {
> + // Unindexed loads.
> + if (N->hasNUsesOfValue(0, 0))
> +return CombineTo(N, DAG.getNode(ISD::UNDEF, N->getValueType
> (0)), Chain);
> +} else {
> + // Indexed loads.
> + assert(N->getValueType(2) == MVT::Other && "Malformed
> indexed loads?");
> + if (N->hasNUsesOfValue(0, 0) && N->hasNUsesOfValue(0, 1)) {
> +SDOperand Undef0 = DAG.getNode(ISD::UNDEF, N->getValueType
> (0));
> +SDOperand Undef1 = DAG.getNode(ISD::UNDEF, N->getValueType
> (1));
> +SDOperand To[] = { Undef0, Undef1, Chain };
> +return CombineTo(N, To, 3);
>}
> - VTs.push_back(N->getValueType(i));
> -}
> -if (!HasUses) {
> - SmallVector Ops;
> - return CombineTo(N, DAG.getNode(ISD::UNDEF, &VTs[0], VTs.size
> (), 0, 0),
> - Chain);
> }
>}
>
>
>
>
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[llvm-commits] llvm-gcc: handle TRY_CATCH_EXPR with compound-stmt for handler
According to the documentation, the handler for a TRY_CATCH_EXPR can be:
- A sequence of statements to execute. When an exception occurs,
these statements are executed, and then the exception is rethrown.
- A sequence of CATCH_EXPR expressions. Each CATCH_EXPR
has a list of applicable exception types and handler code. If the
thrown exception matches one of the caught types, the associated
handler code is executed. If the handler code falls off the bottom,
execution continues after the original TRY_CATCH_EXPR.
- An EH_FILTER_EXPR expression. This has a list of
permitted exception types, and code to handle a match failure. If the
thrown exception does not match one of the allowed types, the
associated match failure code is executed. If the thrown exception
does match, it continues unwinding the stack looking for the next
handler.
However GatherTypeInfo wasn't expecting the first case, causing a crash
when building the C++ runtime. Fix and testcase attached.
Ciao,
Duncan.
Index: gcc.llvm/gcc/llvm-convert.cpp
===
--- gcc.llvm.orig/gcc/llvm-convert.cpp 2007-05-01 16:13:22.0 +0200
+++ gcc.llvm/gcc/llvm-convert.cpp 2007-05-01 18:51:29.0 +0200
@@ -1868,11 +1868,12 @@
TypeInfos.push_back(TypeInfo);
}
}
- } else {
-assert(TREE_CODE(exp) == STATEMENT_LIST && "Need an exp with typeinfo");
-// Each statement in the statement list will be a catch.
+ } else if (TREE_CODE(exp) == STATEMENT_LIST) {
+// Each statement in the statement list will be a catch, or none will.
for (tree_stmt_iterator I = tsi_start(exp); !tsi_end_p(I); tsi_next(&I))
GatherTypeInfo(tsi_stmt(I), TypeInfos);
+ } else {
+assert(TypeInfos.empty() && "Need an exp with typeinfo");
}
}
// RUN: %llvmgxx -S %s -o /dev/null
#include
namespace std
{
codecvt::
codecvt(size_t __refs)
: __codecvt_abstract_base(__refs),
_M_c_locale_codecvt(_S_get_c_locale())
{ }
}
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[llvm-commits] [126768] improve support for __builtin_extract_return_address and
Revision: 126768
Author: clattner
Date: 2007-05-01 10:59:57 -0700 (Tue, 01 May 2007)
Log Message:
---
improve support for __builtin_extract_return_address and
__builtin_frob_return_address (?) for most targets.
This is one step towards solving PR1375, though it is not
correct for ARM, SPARC, MIPS etc.
Patch by Anton K!
Modified Paths:
--
apple-local/branches/llvm/gcc/llvm-convert.cpp
apple-local/branches/llvm/gcc/llvm-internal.h
Modified: apple-local/branches/llvm/gcc/llvm-convert.cpp
===
--- apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 17:49:23 UTC
(rev 126767)
+++ apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 17:59:57 UTC
(rev 126768)
@@ -4071,6 +4071,10 @@
case BUILT_IN_RETURN_ADDRESS: return EmitBuiltinReturnAddr(exp,
Result,false);
case BUILT_IN_STACK_SAVE: return EmitBuiltinStackSave(exp, Result);
case BUILT_IN_STACK_RESTORE: return EmitBuiltinStackRestore(exp);
+ case BUILT_IN_EXTRACT_RETURN_ADDR:
+ return EmitBuiltinExtractReturnAddr(exp, Result);
+ case BUILT_IN_FROB_RETURN_ADDR:
+ return EmitBuiltinFrobReturnAddr(exp, Result);
#define HANDLE_UNARY_FP(F32, F64, V) \
Result = EmitBuiltinUnaryFPOp(V, Intrinsic::F32, Intrinsic::F64)
@@ -4162,8 +4166,6 @@
case BUILT_IN_DWARF_SP_COLUMN:
case BUILT_IN_INIT_DWARF_REG_SIZES:
#endif
-case BUILT_IN_FROB_RETURN_ADDR:
-case BUILT_IN_EXTRACT_RETURN_ADDR:
case BUILT_IN_EH_RETURN:
#ifdef EH_RETURN_DATA_REGNO
case BUILT_IN_EH_RETURN_DATA_REGNO:
@@ -4404,6 +4406,39 @@
return true;
}
+bool TreeToLLVM::EmitBuiltinExtractReturnAddr(tree exp, Value *&Result) {
+ tree arglist = TREE_OPERAND(exp, 1);
+
+ Value *Ptr = Emit(TREE_VALUE(arglist), 0);
+
+ // FIXME: Actually we should do something like this:
+ //
+ // Result = (Ptr & MASK_RETURN_ADDR) + RETURN_ADDR_OFFSET, if mask and
+ // offset are defined. This seems to be needed for: ARM, MIPS, Sparc.
+ // Unfortunately, these constants are defined as RTL expressions and
+ // should be handled separately.
+
+ Result = CastToType(Instruction::BitCast, Ptr,
PointerType::get(Type::Int8Ty));
+
+ return true;
+}
+
+bool TreeToLLVM::EmitBuiltinFrobReturnAddr(tree exp, Value *&Result) {
+ tree arglist = TREE_OPERAND(exp, 1);
+
+ Value *Ptr = Emit(TREE_VALUE(arglist), 0);
+
+ // FIXME: Actually we should do something like this:
+ //
+ // Result = Ptr - RETURN_ADDR_OFFSET, if offset is defined. This seems to be
+ // needed for: MIPS, Sparc. Unfortunately, these constants are defined
+ // as RTL expressions and should be handled separately.
+
+ Result = CastToType(Instruction::BitCast, Ptr,
PointerType::get(Type::Int8Ty));
+
+ return true;
+}
+
bool TreeToLLVM::EmitBuiltinStackSave(tree exp, Value *&Result) {
tree arglist = TREE_OPERAND(exp, 1);
if (!validate_arglist(arglist, VOID_TYPE))
Modified: apple-local/branches/llvm/gcc/llvm-internal.h
===
--- apple-local/branches/llvm/gcc/llvm-internal.h 2007-05-01 17:49:23 UTC
(rev 126767)
+++ apple-local/branches/llvm/gcc/llvm-internal.h 2007-05-01 17:59:57 UTC
(rev 126768)
@@ -524,6 +524,8 @@
bool EmitBuiltinBZero(tree_node *exp, Value *&Result);
bool EmitBuiltinPrefetch(tree_node *exp);
bool EmitBuiltinReturnAddr(tree_node *exp, Value *&Result, bool isFrame);
+ bool EmitBuiltinExtractReturnAddr(tree_node *exp, Value *&Result);
+ bool EmitBuiltinFrobReturnAddr(tree_node *exp, Value *&Result);
bool EmitBuiltinStackSave(tree_node *exp, Value *&Result);
bool EmitBuiltinStackRestore(tree_node *exp);
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[llvm-commits] [126769] From Duncan Sands:
Revision: 126769
Author: clattner
Date: 2007-05-01 11:46:41 -0700 (Tue, 01 May 2007)
Log Message:
---
>From Duncan Sands:
According to the documentation, the handler for a TRY_CATCH_EXPR can be:
- A sequence of statements to execute. When an exception occurs,
these statements are executed, and then the exception is rethrown.
- A sequence of CATCH_EXPR expressions. Each CATCH_EXPR
has a list of applicable exception types and handler code. If the
thrown exception matches one of the caught types, the associated
handler code is executed. If the handler code falls off the bottom,
execution continues after the original TRY_CATCH_EXPR.
- An EH_FILTER_EXPR expression. This has a list of
permitted exception types, and code to handle a match failure. If the
thrown exception does not match one of the allowed types, the
associated match failure code is executed. If the thrown exception
does match, it continues unwinding the stack looking for the next
handler.
However GatherTypeInfo wasn't expecting the first case, causing a crash
when building the C++ runtime. Fix and testcase attached.
Testcase here: C++Frontend/2007-04-31-TryCatch.cpp
Modified Paths:
--
apple-local/branches/llvm/gcc/llvm-convert.cpp
Modified: apple-local/branches/llvm/gcc/llvm-convert.cpp
===
--- apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 17:59:57 UTC
(rev 126768)
+++ apple-local/branches/llvm/gcc/llvm-convert.cpp 2007-05-01 18:46:41 UTC
(rev 126769)
@@ -1868,11 +1868,12 @@
TypeInfos.push_back(TypeInfo);
}
}
- } else {
-assert(TREE_CODE(exp) == STATEMENT_LIST && "Need an exp with typeinfo");
-// Each statement in the statement list will be a catch.
+ } else if (TREE_CODE(exp) == STATEMENT_LIST) {
+// Each statement in the statement list will be a catch, or none will.
for (tree_stmt_iterator I = tsi_start(exp); !tsi_end_p(I); tsi_next(&I))
GatherTypeInfo(tsi_stmt(I), TypeInfos);
+ } else {
+assert(TypeInfos.empty() && "Need an exp with typeinfo");
}
}
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[llvm-commits] CVS: llvm/test/C++Frontend/2007-04-31-TryCatch.cpp
Changes in directory llvm/test/C++Frontend:
2007-04-31-TryCatch.cpp added (r1.1)
---
Log message:
Test handling of TRY_CATCH_EXPRs for which the handler is a sequence of
ordinary statements, rather than a list of CATCH_EXPRs or an EH_FILTER_EXPR.
---
Diffs of the changes: (+12 -0)
2007-04-31-TryCatch.cpp | 12
1 files changed, 12 insertions(+)
Index: llvm/test/C++Frontend/2007-04-31-TryCatch.cpp
diff -c /dev/null llvm/test/C++Frontend/2007-04-31-TryCatch.cpp:1.1
*** /dev/null Tue May 1 13:49:40 2007
--- llvm/test/C++Frontend/2007-04-31-TryCatch.cpp Tue May 1 13:49:30 2007
***
*** 0
--- 1,12
+ // RUN: %llvmgxx -S %s -o /dev/null
+
+ #include
+
+ namespace std
+ {
+ codecvt::
+ codecvt(size_t __refs)
+ : __codecvt_abstract_base(__refs),
+ _M_c_locale_codecvt(_S_get_c_locale())
+ { }
+ }
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Re: [llvm-commits] Patch for bug in llvm-ld
On Apr 30, 2007, at 6:45 AM, jlh wrote:
> Hello!
>
> I've been told to send this here. In tools/llvm-ld/llvm-ld.cpp,
> line 360, a const char* to a temporary std::string is being
> stored, with the string going out of scope right after, making
> that pointer invalid.
>
> std::string lib_name = "-l" + LinkItems[index].first;
> args.push_back(lib_name.c_str());
>
Thanks, but this doesn't seem safe. If the args_temp vector is
reallocated, it will move all the std::string objects, invalidating
the pointers.
-Chris
> The attached patch fixes this in a simple way.
>
> jlh
> Index: llvm-ld.cpp
> ===
> RCS file: /var/cvs/llvm/llvm/tools/llvm-ld/llvm-ld.cpp,v
> retrieving revision 1.51
> diff -u -r1.51 llvm-ld.cpp
> --- llvm-ld.cpp 29 Apr 2007 23:59:47 - 1.51
> +++ llvm-ld.cpp 30 Apr 2007 13:34:21 -
> @@ -330,6 +330,9 @@
>// We can't just assemble and link the file with the system
> assembler
>// and linker because we don't know where to put the _start
> symbol.
>// GCC mysteriously knows how to do it.
> +
> + // args_temp is for storing temporary strings while we have a
> const char * to them
> + std::vector args_temp;
>std::vector args;
>args.push_back(gcc.c_str());
>args.push_back("-fno-strict-aliasing");
> @@ -354,8 +357,8 @@
>for (unsigned index = 0; index < LinkItems.size(); index++)
> if (LinkItems[index].first != "crtend") {
>if (LinkItems[index].second) {
> -std::string lib_name = "-l" + LinkItems[index].first;
> -args.push_back(lib_name.c_str());
> +args_temp.push_back("-l" + LinkItems[index].first);
> +args.push_back(args_temp.back().c_str());
>} else
> args.push_back(LinkItems[index].first.c_str());
> }
> ___
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Re: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
Hi Nate,
Could you look into the possibility of re-using the sub/super
register support that Evan recently added? This may prevent much
duplication of information in the RegisterInfo.td, especially for
targets with vector registers that have many subregisters.
I believe that sub/super register generator unions the set of sub/
super registers in a deterministic fashion and produces the necessary
tables in the RegisterInfo.inc already. The only thing is that this
would make the sub register index implicit in the ordering of the sub
register list in the RegisterInfo.td.
Also, would it be possible to emit the information gathered as table
lookups rather than a massive two level switch statement? I believe
all the information to get the necessary mappings should be available.
--
Christopher Lamb
On May 1, 2007, at 12:57 AM, Nate Begeman wrote:
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.52 -> 1.53
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+36 -0)
RegisterInfoEmitter.cpp | 36
1 files changed, 36 insertions(+)
Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.52 llvm/utils/
TableGen/RegisterInfoEmitter.cpp:1.53
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.52 Fri Apr 20
19:55:29 2007
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Tue May 1 00:57:02
2007
@@ -61,6 +61,7 @@
<< " " << ClassName
<< "(int CallFrameSetupOpcode = -1, int
CallFrameDestroyOpcode = -1);\n"
<< " int getDwarfRegNum(unsigned RegNum) const;\n"
+ << " unsigned getSubReg(unsigned RegNo, unsigned Index)
const;\n"
<< "};\n\n";
const std::vector &RegisterClasses =
@@ -322,6 +323,7 @@
std::map > RegisterSubRegs;
std::map > RegisterSuperRegs;
std::map > RegisterAliases;
+ std::map > >
SubRegVectors;
const std::vector &Regs = Target.getRegisters();
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
@@ -441,6 +443,40 @@
std::string ClassName = Target.getName() + "GenRegisterInfo";
+ // Calculate the mapping of subregister+index pairs to physical
registers.
+ std::vector SubRegs = Records.getAllDerivedDefinitions
("SubRegSet");
+ for (unsigned i = 0, e = SubRegs.size(); i != e; ++i) {
+int subRegIndex = SubRegs[i]->getValueAsInt("index");
+std::vector From = SubRegs[i]->getValueAsListOfDefs
("From");
+std::vector To = SubRegs[i]->getValueAsListOfDefs
("To");
+
+assert((From.size() == To.size()) &&
+ "SubRegSet has mismatched from/to size");
+
+// For each entry in from/to vectors, insert the to register
at index
+for (unsigned ii = 0, ee = From.size(); ii != ee; ++ii)
+ SubRegVectors[From[ii]].push_back(std::make_pair
(subRegIndex, To[ii]));
+ }
+
+ // Emit the subregister + index mapping function based on the
information
+ // calculated above.
+ OS << "unsigned " << ClassName
+ << "::getSubReg(unsigned RegNo, unsigned Index) const {\n"
+ << " switch (RegNo) {\n"
+ << " default: abort(); break;\n";
+ for (std::map >
>::iterator
+I = SubRegVectors.begin(), E = SubRegVectors.end(); I !=
E; ++I) {
+OS << " case " << getQualifiedName(I->first) << ":\n";
+OS << "switch (Index) {\n";
+OS << "default: abort(); break;\n";
+for (unsigned i = 0, e = I->second.size(); i != e; ++i)
+ OS << "case " << (I->second)[i].first << ": return "
+ << getQualifiedName((I->second)[i].second) << ";\n";
+OS << "}; break;\n";
+ }
+ OS << " };\n";
+ OS << "}\n\n";
+
// Emit the constructor of the class...
OS << ClassName << "::" << ClassName
<< "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
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[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrThumb.td
Changes in directory llvm/lib/Target/ARM:
ARMInstrThumb.td updated: 1.24 -> 1.25
---
Log message:
Doh. PC displacement is between the constantpool and the add instruction.
---
Diffs of the changes: (+1 -1)
ARMInstrThumb.td |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.24
llvm/lib/Target/ARM/ARMInstrThumb.td:1.25
--- llvm/lib/Target/ARM/ARMInstrThumb.td:1.24 Fri Apr 27 08:54:47 2007
+++ llvm/lib/Target/ARM/ARMInstrThumb.tdTue May 1 15:27:19 2007
@@ -511,7 +511,7 @@
// assembler.
def tLEApcrel : TIx2<(ops GPR:$dst, i32imm:$label),
!strconcat(!strconcat(".set PCRELV${:uid}, ($label-(",
- "${:private}PCRELL${:uid}+6))\n"),
+ "${:private}PCRELL${:uid}+4))\n"),
!strconcat("\tmov $dst, #PCRELV${:uid}\n",
"${:private}PCRELL${:uid}:\n\tadd $dst,
pc")),
[]>;
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Re: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
On May 1, 2007, at 12:24 PM, Christopher Lamb wrote: > Hi Nate, > > Could you look into the possibility of re-using the sub/super > register support that Evan recently added? This may prevent much > duplication of information in the RegisterInfo.td, especially for > targets with vector registers that have many subregisters. It certainly would, I agree. > I believe that sub/super register generator unions the set of sub/ > super registers in a deterministic fashion and produces the > necessary tables in the RegisterInfo.inc already. The only thing is > that this would make the sub register index implicit in the > ordering of the sub register list in the RegisterInfo.td. I'm not sure things are sufficiently well ordered internally for that, or sorted in any particular fashion. I'll look into it, but it seems like it would be less flexible and make the td files far less intuitive as to what is actually going on. If tablegen picked the numbering, I would have to go read the generated file to know what to write in the ISel for that backend, which seems backwards to me. > Also, would it be possible to emit the information gathered as > table lookups rather than a massive two level switch statement? I > believe all the information to get the necessary mappings should be > available. It would be possible, but seems like significantly more work. I'm sure it will be possible to improve upon the initial implementation, which should be good enough to address most of the issues blocked by the lack of subregs exposed to the selection dag. Nate ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/docs/WritingAnLLVMPass.html
Changes in directory llvm/docs:
WritingAnLLVMPass.html updated: 1.56 -> 1.57
---
Log message:
Update doc to reflect changes I am about to install to fix PR 888:
http://llvm.org/PR888 .
---
Diffs of the changes: (+20 -1)
WritingAnLLVMPass.html | 21 -
1 files changed, 20 insertions(+), 1 deletion(-)
Index: llvm/docs/WritingAnLLVMPass.html
diff -u llvm/docs/WritingAnLLVMPass.html:1.56
llvm/docs/WritingAnLLVMPass.html:1.57
--- llvm/docs/WritingAnLLVMPass.html:1.56 Mon Apr 16 19:17:11 2007
+++ llvm/docs/WritingAnLLVMPass.htmlTue May 1 15:55:38 2007
@@ -263,6 +263,14 @@
time.
+ static const int ID;
+ Hello() : FunctionPass((intptr_t)&ID) {}
+
+
+ This declares pass identifier used by LLVM to identify pass. This allows
LLVM to
+avoid using expensive C++ runtime information.
+
+
virtual bool runOnFunction(Function
&F) {
llvm::cerr << "Hello: " << F.getName() << "\n";
return false;
@@ -277,6 +285,13 @@
function.
+ const int Hello::ID = 0;
+
+
+ We initialize pass ID here. LLVM uses ID's address to identify pass so
+initialization value is not important.
+
+
RegisterPass X("hello", "Hello World Pass");
} // end of anonymous namespace
@@ -295,6 +310,10 @@
namespace {
struct Hello : public FunctionPass
{
+
+static const int ID;
+Hello() : FunctionPass((intptr_t)&ID) {}
+
virtual bool runOnFunction(Function
&F) {
llvm::cerr << "Hello: " << F.getName() << "\n";
return false;
@@ -1788,7 +1807,7 @@
mailto:[EMAIL PROTECTED]">Chris Lattner
http://llvm.org";>The LLVM Compiler Infrastructure
- Last modified: $Date: 2007/04/17 00:17:11 $
+ Last modified: $Date: 2007/05/01 20:55:38 $
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Re: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
On May 1, 2007, at 3:28 PM, Nate Begeman wrote: On May 1, 2007, at 12:24 PM, Christopher Lamb wrote: Hi Nate, Could you look into the possibility of re-using the sub/super register support that Evan recently added? This may prevent much duplication of information in the RegisterInfo.td, especially for targets with vector registers that have many subregisters. It certainly would, I agree. I believe that sub/super register generator unions the set of sub/ super registers in a deterministic fashion and produces the necessary tables in the RegisterInfo.inc already. The only thing is that this would make the sub register index implicit in the ordering of the sub register list in the RegisterInfo.td. I'm not sure things are sufficiently well ordered internally for that, or sorted in any particular fashion. I'll look into it, but it seems like it would be less flexible and make the td files far less intuitive as to what is actually going on. If tablegen picked the numbering, I would have to go read the generated file to know what to write in the ISel for that backend, which seems backwards to me. I see the problem in generating the ISel. Perhaps it would be be best to go the other way and have the sub/super reg sets be determined by the the explicit sets defined. My goal was simply to eliminate redundant, and possibly erroneously conflicting information from the file. Right now there are two different ways to specify sub registers, and if they don't match there could be problems. Also, would it be possible to emit the information gathered as table lookups rather than a massive two level switch statement? I believe all the information to get the necessary mappings should be available. It would be possible, but seems like significantly more work. I'm sure it will be possible to improve upon the initial implementation, which should be good enough to address most of the issues blocked by the lack of subregs exposed to the selection dag. Thanks for working on this. I didn't expect to get it addressed for quite a while! -- Christopher Lamb ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
On May 1, 2007, at 2:03 PM, Christopher Lamb wrote: > I see the problem in generating the ISel. Perhaps it would be be > best to go the other way and have the sub/super reg sets be > determined by the the explicit sets defined. My goal was simply to > eliminate redundant, and possibly erroneously conflicting > information from the file. Right now there are two different ways > to specify sub registers, and if they don't match there could be > problems. > >> >>> Also, would it be possible to emit the information gathered as >>> table lookups rather than a massive two level switch statement? I >>> believe all the information to get the necessary mappings should be >>> available. >> >> It would be possible, but seems like significantly more work. I'm >> sure it will be possible to improve upon the initial implementation, >> which should be good enough to address most of the issues blocked by >> the lack of subregs exposed to the selection dag. > > Thanks for working on this. I didn't expect to get it addressed for > quite a while! No prob. I appreciate the feedback; I'll definitely be keeping it in mind while I finish the rest of the bug. Hopefully for 2.1 we can have everything done with no duplication of subreg info. Thanks, Nate ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp ARMLoadStoreOptimizer.cpp
Changes in directory llvm/lib/Target/ARM:
ARMConstantIslandPass.cpp updated: 1.39 -> 1.40
ARMLoadStoreOptimizer.cpp updated: 1.8 -> 1.9
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+8 -0)
ARMConstantIslandPass.cpp |4
ARMLoadStoreOptimizer.cpp |4
2 files changed, 8 insertions(+)
Index: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
diff -u llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.39
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.40
--- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp:1.39 Sun Apr 29 14:19:30 2007
+++ llvm/lib/Target/ARM/ARMConstantIslandPass.cpp Tue May 1 16:15:46 2007
@@ -128,6 +128,9 @@
ARMFunctionInfo *AFI;
bool isThumb;
public:
+static const int ID;
+ARMConstantIslands() : MachineFunctionPass((intptr_t)&ID) {}
+
virtual bool runOnMachineFunction(MachineFunction &Fn);
virtual const char *getPassName() const {
@@ -171,6 +174,7 @@
void dumpBBs();
void verify(MachineFunction &Fn);
};
+ const int ARMConstantIslands::ID = 0;
}
/// verify - check BBOffsets, BBSizes, alignment of islands
Index: llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
diff -u llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.8
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.9
--- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp:1.8 Thu Apr 26 14:00:32 2007
+++ llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue May 1 16:15:46 2007
@@ -38,6 +38,9 @@
namespace {
struct VISIBILITY_HIDDEN ARMLoadStoreOpt : public MachineFunctionPass {
+static const int ID;
+ARMLoadStoreOpt() : MachineFunctionPass((intptr_t)&ID) {}
+
const TargetInstrInfo *TII;
const MRegisterInfo *MRI;
ARMFunctionInfo *AFI;
@@ -70,6 +73,7 @@
bool LoadStoreMultipleOpti(MachineBasicBlock &MBB);
bool MergeReturnIntoLDM(MachineBasicBlock &MBB);
};
+ const int ARMLoadStoreOpt::ID = 0;
}
/// createARMLoadStoreOptimizationPass - returns an instance of the load /
store
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[llvm-commits] CVS: llvm/lib/Target/Sparc/DelaySlotFiller.cpp FPMover.cpp
Changes in directory llvm/lib/Target/Sparc:
DelaySlotFiller.cpp updated: 1.13 -> 1.14
FPMover.cpp updated: 1.18 -> 1.19
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+9 -3)
DelaySlotFiller.cpp |5 -
FPMover.cpp |7 +--
2 files changed, 9 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/Sparc/DelaySlotFiller.cpp
diff -u llvm/lib/Target/Sparc/DelaySlotFiller.cpp:1.13
llvm/lib/Target/Sparc/DelaySlotFiller.cpp:1.14
--- llvm/lib/Target/Sparc/DelaySlotFiller.cpp:1.13 Tue Dec 19 16:59:26 2006
+++ llvm/lib/Target/Sparc/DelaySlotFiller.cpp Tue May 1 16:15:46 2007
@@ -30,7 +30,9 @@
TargetMachine &TM;
const TargetInstrInfo *TII;
-Filler(TargetMachine &tm) : TM(tm), TII(tm.getInstrInfo()) { }
+static const int ID;
+Filler(TargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm), TII(tm.getInstrInfo()) { }
virtual const char *getPassName() const {
return "SPARC Delay Slot Filler";
@@ -46,6 +48,7 @@
}
};
+ const int Filler::ID = 0;
} // end of anonymous namespace
/// createSparcDelaySlotFillerPass - Returns a pass that fills in delay
Index: llvm/lib/Target/Sparc/FPMover.cpp
diff -u llvm/lib/Target/Sparc/FPMover.cpp:1.18
llvm/lib/Target/Sparc/FPMover.cpp:1.19
--- llvm/lib/Target/Sparc/FPMover.cpp:1.18 Tue Dec 19 16:59:26 2006
+++ llvm/lib/Target/Sparc/FPMover.cpp Tue May 1 16:15:46 2007
@@ -31,8 +31,10 @@
/// layout, etc.
///
TargetMachine &TM;
-
-FPMover(TargetMachine &tm) : TM(tm) { }
+
+static const int ID;
+FPMover(TargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
virtual const char *getPassName() const {
return "Sparc Double-FP Move Fixer";
@@ -41,6 +43,7 @@
bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
bool runOnMachineFunction(MachineFunction &F);
};
+ const int FPMover::ID = 0;
} // end of anonymous namespace
/// createSparcFPMoverPass - Returns a pass that turns FpMOVD
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCBranchSelector.cpp PPCCodeEmitter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCBranchSelector.cpp updated: 1.42 -> 1.43
PPCCodeEmitter.cpp updated: 1.75 -> 1.76
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+7 -1)
PPCBranchSelector.cpp |4
PPCCodeEmitter.cpp|4 +++-
2 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
diff -u llvm/lib/Target/PowerPC/PPCBranchSelector.cpp:1.42
llvm/lib/Target/PowerPC/PPCBranchSelector.cpp:1.43
--- llvm/lib/Target/PowerPC/PPCBranchSelector.cpp:1.42 Fri Jan 26 08:34:51 2007
+++ llvm/lib/Target/PowerPC/PPCBranchSelector.cpp Tue May 1 16:15:46 2007
@@ -32,6 +32,9 @@
namespace {
struct VISIBILITY_HIDDEN PPCBSel : public MachineFunctionPass {
+static const int ID;
+PPCBSel() : MachineFunctionPass((intptr_t)&ID) {}
+
/// BlockSizes - The sizes of the basic blocks in the function.
std::vector BlockSizes;
@@ -41,6 +44,7 @@
return "PowerPC Branch Selector";
}
};
+ const int PPCBSel::ID = 0;
}
/// createPPCBranchSelectionPass - returns an instance of the Branch Selection
Index: llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
diff -u llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.75
llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.76
--- llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp:1.75 Sat Feb 24 23:34:32 2007
+++ llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp Tue May 1 16:15:46 2007
@@ -40,8 +40,9 @@
int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
public:
+static const int ID;
PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
- : TM(T), MCE(M) {}
+ : MachineFunctionPass((intptr_t)&ID), TM(T), MCE(M) {}
const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
@@ -63,6 +64,7 @@
///
unsigned getBinaryCodeForInstr(MachineInstr &MI);
};
+ const int PPCCodeEmitter::ID = 0;
}
/// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
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[llvm-commits] CVS: llvm/lib/Bytecode/Writer/Writer.cpp
Changes in directory llvm/lib/Bytecode/Writer:
Writer.cpp updated: 1.179 -> 1.180
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+1 -0)
Writer.cpp |1 +
1 files changed, 1 insertion(+)
Index: llvm/lib/Bytecode/Writer/Writer.cpp
diff -u llvm/lib/Bytecode/Writer/Writer.cpp:1.179
llvm/lib/Bytecode/Writer/Writer.cpp:1.180
--- llvm/lib/Bytecode/Writer/Writer.cpp:1.179 Sun Apr 29 13:35:00 2007
+++ llvm/lib/Bytecode/Writer/Writer.cpp Tue May 1 16:15:46 2007
@@ -47,6 +47,7 @@
/// @brief The bytecode version number
const unsigned BCVersionNum = 7;
+const int WriteBytecodePass::ID = 0;
static RegisterPass X("emitbytecode", "Bytecode Writer");
STATISTIC(BytesWritten, "Number of bytecode bytes written");
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[llvm-commits] CVS: llvm/lib/Target/MSIL/MSILWriter.cpp MSILWriter.h
Changes in directory llvm/lib/Target/MSIL:
MSILWriter.cpp updated: 1.4 -> 1.5
MSILWriter.h updated: 1.2 -> 1.3
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+6 -3)
MSILWriter.cpp |2 ++
MSILWriter.h |7 ---
2 files changed, 6 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/MSIL/MSILWriter.cpp
diff -u llvm/lib/Target/MSIL/MSILWriter.cpp:1.4
llvm/lib/Target/MSIL/MSILWriter.cpp:1.5
--- llvm/lib/Target/MSIL/MSILWriter.cpp:1.4 Mon Apr 16 13:10:23 2007
+++ llvm/lib/Target/MSIL/MSILWriter.cpp Tue May 1 16:15:46 2007
@@ -80,6 +80,8 @@
return Changed;
}
+const int MSILModule::ID = 0;
+const int MSILWriter::ID = 0;
bool MSILWriter::runOnFunction(Function &F) {
if (F.isDeclaration()) return false;
Index: llvm/lib/Target/MSIL/MSILWriter.h
diff -u llvm/lib/Target/MSIL/MSILWriter.h:1.2
llvm/lib/Target/MSIL/MSILWriter.h:1.3
--- llvm/lib/Target/MSIL/MSILWriter.h:1.2 Mon Apr 16 13:10:23 2007
+++ llvm/lib/Target/MSIL/MSILWriter.h Tue May 1 16:15:46 2007
@@ -37,9 +37,10 @@
const TargetData*& TD;
public:
+static const int ID;
MSILModule(const std::set*& _UsedTypes,
const TargetData*& _TD)
- : UsedTypes(_UsedTypes), TD(_TD) {}
+ : ModulePass((intptr_t)&ID), UsedTypes(_UsedTypes), TD(_TD) {}
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
@@ -82,8 +83,8 @@
std::map >
StaticInitList;
const std::set* UsedTypes;
-
-MSILWriter(std::ostream &o) : Out(o) {
+static const int ID;
+MSILWriter(std::ostream &o) : FunctionPass((intptr_t)&ID), Out(o) {
UniqID = 0;
}
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[llvm-commits] CVS: llvm/lib/Target/TargetData.cpp
Changes in directory llvm/lib/Target:
TargetData.cpp updated: 1.107 -> 1.108
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+3 -1)
TargetData.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/TargetData.cpp
diff -u llvm/lib/Target/TargetData.cpp:1.107
llvm/lib/Target/TargetData.cpp:1.108
--- llvm/lib/Target/TargetData.cpp:1.107Sun Apr 22 16:54:13 2007
+++ llvm/lib/Target/TargetData.cpp Tue May 1 16:15:46 2007
@@ -33,6 +33,7 @@
// Handle the Pass registration stuff necessary to use TargetData's.
namespace {
// Register the default SparcV9 implementation...
+ const int TargetData::ID = 0;
RegisterPass X("targetdata", "Target Data Layout");
}
@@ -221,7 +222,8 @@
}
}
-TargetData::TargetData(const Module *M) {
+TargetData::TargetData(const Module *M)
+ : ImmutablePass((intptr_t)&ID) {
init(M->getDataLayout());
}
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.442 -> 1.443 --- Log message: Do not use typeinfo to identify pass in pass manager. --- Diffs of the changes: (+2 -0) SelectionDAGISel.cpp |2 ++ 1 files changed, 2 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.442 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.443 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.442Mon Apr 30 16:11:17 2007 +++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue May 1 16:15:46 2007 @@ -5011,3 +5011,5 @@ if (e != InOps.size()) Ops.push_back(InOps.back()); } + +const int SelectionDAGISel::ID = 0; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp LCSSA.cpp LoopSimplify.cpp LowerAllocations.cpp LowerInvoke.cpp LowerSelect.cpp LowerSwitch.cpp Mem2Reg.cpp UnifyFunctionExitNodes.
Changes in directory llvm/lib/Transforms/Utils:
BreakCriticalEdges.cpp updated: 1.44 -> 1.45
LCSSA.cpp updated: 1.38 -> 1.39
LoopSimplify.cpp updated: 1.92 -> 1.93
LowerAllocations.cpp updated: 1.73 -> 1.74
LowerInvoke.cpp updated: 1.59 -> 1.60
LowerSelect.cpp updated: 1.12 -> 1.13
LowerSwitch.cpp updated: 1.38 -> 1.39
Mem2Reg.cpp updated: 1.26 -> 1.27
UnifyFunctionExitNodes.cpp updated: 1.36 -> 1.37
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+33 -3)
BreakCriticalEdges.cpp |4
LCSSA.cpp |4
LoopSimplify.cpp |4
LowerAllocations.cpp |5 -
LowerInvoke.cpp|5 -
LowerSelect.cpp|5 -
LowerSwitch.cpp|4
Mem2Reg.cpp|4
UnifyFunctionExitNodes.cpp |1 +
9 files changed, 33 insertions(+), 3 deletions(-)
Index: llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp
diff -u llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.44
llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.45
--- llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp:1.44 Tue Apr 17
13:09:47 2007
+++ llvm/lib/Transforms/Utils/BreakCriticalEdges.cppTue May 1 16:15:47 2007
@@ -34,6 +34,9 @@
namespace {
struct VISIBILITY_HIDDEN BreakCriticalEdges : public FunctionPass {
+static const int ID; // Pass identifcation, replacement for typeid
+BreakCriticalEdges() : FunctionPass((intptr_t)&ID) {}
+
virtual bool runOnFunction(Function &F);
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
@@ -47,6 +50,7 @@
}
};
+ const int BreakCriticalEdges::ID = 0;
RegisterPass X("break-crit-edges",
"Break critical edges in CFG");
}
Index: llvm/lib/Transforms/Utils/LCSSA.cpp
diff -u llvm/lib/Transforms/Utils/LCSSA.cpp:1.38
llvm/lib/Transforms/Utils/LCSSA.cpp:1.39
--- llvm/lib/Transforms/Utils/LCSSA.cpp:1.38Wed Apr 18 17:39:00 2007
+++ llvm/lib/Transforms/Utils/LCSSA.cpp Tue May 1 16:15:47 2007
@@ -47,6 +47,9 @@
namespace {
struct VISIBILITY_HIDDEN LCSSA : public FunctionPass {
+static const int ID; // Pass identifcation, replacement for typeid
+LCSSA() : FunctionPass((intptr_t)&ID) {}
+
// Cached analysis information for the current function.
LoopInfo *LI;
DominatorTree *DT;
@@ -81,6 +84,7 @@
}
};
+ const int LCSSA::ID = 0;
RegisterPass X("lcssa", "Loop-Closed SSA Form Pass");
}
Index: llvm/lib/Transforms/Utils/LoopSimplify.cpp
diff -u llvm/lib/Transforms/Utils/LoopSimplify.cpp:1.92
llvm/lib/Transforms/Utils/LoopSimplify.cpp:1.93
--- llvm/lib/Transforms/Utils/LoopSimplify.cpp:1.92 Fri Apr 20 15:04:37 2007
+++ llvm/lib/Transforms/Utils/LoopSimplify.cpp Tue May 1 16:15:47 2007
@@ -54,6 +54,9 @@
namespace {
struct VISIBILITY_HIDDEN LoopSimplify : public FunctionPass {
+static const int ID; // Pass identifcation, replacement for typeid
+LoopSimplify() : FunctionPass((intptr_t)&ID) {}
+
// AA - If we have an alias analysis object to update, this is it,
otherwise
// this is null.
AliasAnalysis *AA;
@@ -89,6 +92,7 @@
std::vector &PredBlocks);
};
+ const int LoopSimplify::ID = 0;
RegisterPass
X("loopsimplify", "Canonicalize natural loops", true);
}
Index: llvm/lib/Transforms/Utils/LowerAllocations.cpp
diff -u llvm/lib/Transforms/Utils/LowerAllocations.cpp:1.73
llvm/lib/Transforms/Utils/LowerAllocations.cpp:1.74
--- llvm/lib/Transforms/Utils/LowerAllocations.cpp:1.73 Mon Apr 16 13:10:23 2007
+++ llvm/lib/Transforms/Utils/LowerAllocations.cpp Tue May 1 16:15:47 2007
@@ -36,8 +36,10 @@
Constant *FreeFunc; // Initialized by doInitialization
bool LowerMallocArgToInteger;
public:
+static const int ID; // Pass ID, replacement for typeid
LowerAllocations(bool LowerToInt = false)
- : MallocFunc(0), FreeFunc(0), LowerMallocArgToInteger(LowerToInt) {}
+ : BasicBlockPass((intptr_t)&ID), MallocFunc(0), FreeFunc(0),
+LowerMallocArgToInteger(LowerToInt) {}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
@@ -66,6 +68,7 @@
bool runOnBasicBlock(BasicBlock &BB);
};
+ const int LowerAllocations::ID = 0;
RegisterPass
X("lowerallocs", "Lower allocations from instructions to calls");
}
Index: llvm/lib/Transforms/Utils/LowerInvoke.cpp
diff -u llvm/lib/Transforms/Utils/LowerInvoke.cpp:1.59
llvm/lib/Transforms/Utils/LowerInvoke.cpp:1.60
--- llvm/lib/Transforms/Utils/LowerInvoke.cpp:1.59 Fri Apr 20 17:40:10 2007
+++ llvm/lib/Transforms/Utils/LowerInvoke.cpp Tue May 1 16:15:47 2007
@@ -75,7 +75,9 @@
const TargetLowering *TLI;
public:
-LowerInvoke(const TargetLowering *tli = NULL) : TLI(tli) { }
+static const int ID; // Pass identifcation, replacement for typeid
+LowerInvoke(const TargetLowering *tli = NUL
[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp X86FloatingPoint.cpp
Changes in directory llvm/lib/Target/X86:
X86CodeEmitter.cpp updated: 1.133 -> 1.134
X86FloatingPoint.cpp updated: 1.68 -> 1.69
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+10 -2)
X86CodeEmitter.cpp |8 ++--
X86FloatingPoint.cpp |4
2 files changed, 10 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.133
llvm/lib/Target/X86/X86CodeEmitter.cpp:1.134
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.133Mon Apr 16 13:10:23 2007
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp Tue May 1 16:15:46 2007
@@ -39,11 +39,14 @@
MachineCodeEmitter &MCE;
bool Is64BitMode;
public:
+static const int ID;
explicit Emitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : II(0), TD(0), TM(tm), MCE(mce), Is64BitMode(false) {}
+ : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
+ MCE(mce), Is64BitMode(false) {}
Emitter(TargetMachine &tm, MachineCodeEmitter &mce,
const X86InstrInfo &ii, const TargetData &td, bool is64)
- : II(&ii), TD(&td), TM(tm), MCE(mce), Is64BitMode(is64) {}
+ : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm),
+ MCE(mce), Is64BitMode(is64) {}
bool runOnMachineFunction(MachineFunction &MF);
@@ -79,6 +82,7 @@
bool isX86_64ExtendedReg(const MachineOperand &MO);
unsigned determineREX(const MachineInstr &MI);
};
+ const int Emitter::ID = 0;
}
/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
Index: llvm/lib/Target/X86/X86FloatingPoint.cpp
diff -u llvm/lib/Target/X86/X86FloatingPoint.cpp:1.68
llvm/lib/Target/X86/X86FloatingPoint.cpp:1.69
--- llvm/lib/Target/X86/X86FloatingPoint.cpp:1.68 Wed Apr 25 17:13:27 2007
+++ llvm/lib/Target/X86/X86FloatingPoint.cppTue May 1 16:15:46 2007
@@ -52,6 +52,9 @@
namespace {
struct VISIBILITY_HIDDEN FPS : public MachineFunctionPass {
+static const int ID;
+FPS() : MachineFunctionPass((intptr_t)&ID) {}
+
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const { return "X86 FP Stackifier"; }
@@ -151,6 +154,7 @@
void handleCondMovFP(MachineBasicBlock::iterator &I);
void handleSpecialFP(MachineBasicBlock::iterator &I);
};
+ const int FPS::ID = 0;
}
FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS();
}
___
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[llvm-commits] CVS: llvm/lib/Transforms/Instrumentation/BlockProfiling.cpp EdgeProfiling.cpp RSProfiling.cpp RSProfiling.h
Changes in directory llvm/lib/Transforms/Instrumentation:
BlockProfiling.cpp updated: 1.22 -> 1.23
EdgeProfiling.cpp updated: 1.12 -> 1.13
RSProfiling.cpp updated: 1.23 -> 1.24
RSProfiling.h updated: 1.4 -> 1.5
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+19 -0)
BlockProfiling.cpp |7 +++
EdgeProfiling.cpp |4
RSProfiling.cpp|7 +++
RSProfiling.h |1 +
4 files changed, 19 insertions(+)
Index: llvm/lib/Transforms/Instrumentation/BlockProfiling.cpp
diff -u llvm/lib/Transforms/Instrumentation/BlockProfiling.cpp:1.22
llvm/lib/Transforms/Instrumentation/BlockProfiling.cpp:1.23
--- llvm/lib/Transforms/Instrumentation/BlockProfiling.cpp:1.22 Mon Feb 5
17:32:05 2007
+++ llvm/lib/Transforms/Instrumentation/BlockProfiling.cpp Tue May 1
16:15:47 2007
@@ -32,9 +32,13 @@
namespace {
class VISIBILITY_HIDDEN FunctionProfiler : public RSProfilers_std {
+ public:
+static const int ID;
bool runOnModule(Module &M);
};
+ const int FunctionProfiler::ID = 0;
+
RegisterPass X("insert-function-profiling",
"Insert instrumentation for function
profiling");
RegisterAnalysisGroup XG(X);
@@ -79,8 +83,11 @@
namespace {
class BlockProfiler : public RSProfilers_std {
bool runOnModule(Module &M);
+ public:
+static const int ID;
};
+ const int BlockProfiler::ID = 0;
RegisterPass Y("insert-block-profiling",
"Insert instrumentation for block profiling");
RegisterAnalysisGroup YG(Y);
Index: llvm/lib/Transforms/Instrumentation/EdgeProfiling.cpp
diff -u llvm/lib/Transforms/Instrumentation/EdgeProfiling.cpp:1.12
llvm/lib/Transforms/Instrumentation/EdgeProfiling.cpp:1.13
--- llvm/lib/Transforms/Instrumentation/EdgeProfiling.cpp:1.12 Mon Feb 5
17:32:05 2007
+++ llvm/lib/Transforms/Instrumentation/EdgeProfiling.cpp Tue May 1
16:15:47 2007
@@ -32,8 +32,12 @@
namespace {
class VISIBILITY_HIDDEN EdgeProfiler : public ModulePass {
bool runOnModule(Module &M);
+ public:
+static const int ID; // Pass identifcation, replacement for typeid
+EdgeProfiler() : ModulePass((intptr_t)&ID) {}
};
+ const int EdgeProfiler::ID = 0;
RegisterPass X("insert-edge-profiling",
"Insert instrumentation for edge profiling");
}
Index: llvm/lib/Transforms/Instrumentation/RSProfiling.cpp
diff -u llvm/lib/Transforms/Instrumentation/RSProfiling.cpp:1.23
llvm/lib/Transforms/Instrumentation/RSProfiling.cpp:1.24
--- llvm/lib/Transforms/Instrumentation/RSProfiling.cpp:1.23Tue Apr 17
12:54:12 2007
+++ llvm/lib/Transforms/Instrumentation/RSProfiling.cpp Tue May 1 16:15:47 2007
@@ -69,6 +69,7 @@
/// measuring framework overhead
class VISIBILITY_HIDDEN NullProfilerRS : public RSProfilers {
public:
+static const int ID; // Pass identifcation, replacement for typeid
bool isProfiling(Value* v) {
return false;
}
@@ -80,7 +81,9 @@
}
};
+ const int RSProfilers::ID = 0;
static RegisterAnalysisGroup A("Profiling passes");
+ const int NullProfilerRS::ID = 0;
static RegisterPass NP("insert-null-profiling-rs",
"Measure profiling framework
overhead");
static RegisterAnalysisGroup NPT(NP);
@@ -138,6 +141,9 @@
/// ProfilerRS - Insert the random sampling framework
struct VISIBILITY_HIDDEN ProfilerRS : public FunctionPass {
+static const int ID; // Pass identifcation, replacement for typeid
+ProfilerRS() : FunctionPass((intptr_t)&ID) {}
+
std::map TransCache;
std::set ChoicePoints;
Chooser* c;
@@ -154,6 +160,7 @@
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
};
+ const int ProfilerRS::ID = 0;
RegisterPass X("insert-rs-profiling-framework",
"Insert random sampling instrumentation
framework");
}
Index: llvm/lib/Transforms/Instrumentation/RSProfiling.h
diff -u llvm/lib/Transforms/Instrumentation/RSProfiling.h:1.4
llvm/lib/Transforms/Instrumentation/RSProfiling.h:1.5
--- llvm/lib/Transforms/Instrumentation/RSProfiling.h:1.4 Sat Feb 3
18:40:41 2007
+++ llvm/lib/Transforms/Instrumentation/RSProfiling.h Tue May 1 16:15:47 2007
@@ -17,6 +17,7 @@
/// RSProfilers_std - a simple support class for profilers that handles most
/// of the work of chaining and tracking inserted code.
struct RSProfilers_std : public RSProfilers {
+static const int ID;
std::set profcode;
// Lookup up values in profcode
virtual bool isProfiling(Value* v);
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaBranchSelector.cpp AlphaCodeEmitter.cpp AlphaLLRP.cpp
Changes in directory llvm/lib/Target/Alpha:
AlphaBranchSelector.cpp updated: 1.2 -> 1.3
AlphaCodeEmitter.cpp updated: 1.21 -> 1.22
AlphaLLRP.cpp updated: 1.8 -> 1.9
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+11 -3)
AlphaBranchSelector.cpp |3 +++
AlphaCodeEmitter.cpp|6 --
AlphaLLRP.cpp |5 -
3 files changed, 11 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/Alpha/AlphaBranchSelector.cpp
diff -u llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:1.2
llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:1.3
--- llvm/lib/Target/Alpha/AlphaBranchSelector.cpp:1.2 Thu Nov 30 01:12:03 2006
+++ llvm/lib/Target/Alpha/AlphaBranchSelector.cpp Tue May 1 16:15:46 2007
@@ -22,6 +22,8 @@
namespace {
struct VISIBILITY_HIDDEN AlphaBSel : public MachineFunctionPass {
+static const int ID;
+AlphaBSel() : MachineFunctionPass((intptr_t)&ID) {}
virtual bool runOnMachineFunction(MachineFunction &Fn);
@@ -29,6 +31,7 @@
return "Alpha Branch Selection";
}
};
+ const int AlphaBSel::ID = 0;
}
/// createAlphaBranchSelectionPass - returns an instance of the Branch
Selection
Index: llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
diff -u llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.21
llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.22
--- llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp:1.21 Tue Dec 19 16:59:25 2006
+++ llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp Tue May 1 16:15:46 2007
@@ -36,11 +36,12 @@
int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
public:
+static const int ID;
explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : II(0), TM(tm), MCE(mce) {}
+ : MachineFunctionPass((intptr_t)&ID), II(0), TM(tm), MCE(mce) {}
AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
const AlphaInstrInfo& ii)
- : II(&ii), TM(tm), MCE(mce) {}
+ : MachineFunctionPass((intptr_t)&ID), II(&ii), TM(tm), MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
@@ -60,6 +61,7 @@
void emitBasicBlock(MachineBasicBlock &MBB);
};
+ const int AlphaCodeEmitter::ID = 0;
}
/// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha
code
Index: llvm/lib/Target/Alpha/AlphaLLRP.cpp
diff -u llvm/lib/Target/Alpha/AlphaLLRP.cpp:1.8
llvm/lib/Target/Alpha/AlphaLLRP.cpp:1.9
--- llvm/lib/Target/Alpha/AlphaLLRP.cpp:1.8 Mon Apr 16 13:10:22 2007
+++ llvm/lib/Target/Alpha/AlphaLLRP.cpp Tue May 1 16:15:46 2007
@@ -37,7 +37,9 @@
///
AlphaTargetMachine &TM;
-AlphaLLRPPass(AlphaTargetMachine &tm) : TM(tm) { }
+static const int ID;
+AlphaLLRPPass(AlphaTargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
virtual const char *getPassName() const {
return "Alpha NOP inserter";
@@ -152,6 +154,7 @@
return Changed;
}
};
+ const int AlphaLLRPPass::ID = 0;
} // end of anonymous namespace
FunctionPass *llvm::createAlphaLLRPPass(AlphaTargetMachine &tm) {
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[llvm-commits] CVS: llvm/include/llvm/Analysis/AliasAnalysis.h CallGraph.h Dominators.h FindUsedTypes.h IntervalPartition.h LoopInfo.h LoopPass.h PostDominators.h ProfileInfo.h ScalarEvolution.h Value
Changes in directory llvm/include/llvm/Analysis:
AliasAnalysis.h updated: 1.28 -> 1.29
CallGraph.h updated: 1.53 -> 1.54
Dominators.h updated: 1.76 -> 1.77
FindUsedTypes.h updated: 1.29 -> 1.30
IntervalPartition.h updated: 1.23 -> 1.24
LoopInfo.h updated: 1.63 -> 1.64
LoopPass.h updated: 1.15 -> 1.16
PostDominators.h updated: 1.17 -> 1.18
ProfileInfo.h updated: 1.5 -> 1.6
ScalarEvolution.h updated: 1.16 -> 1.17
ValueNumbering.h updated: 1.10 -> 1.11
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+45 -14)
AliasAnalysis.h |1 +
CallGraph.h |1 +
Dominators.h| 27 ++-
FindUsedTypes.h |3 +++
IntervalPartition.h |4 +++-
LoopInfo.h |3 +++
LoopPass.h |3 +++
PostDominators.h| 12 +---
ProfileInfo.h |1 +
ScalarEvolution.h |3 ++-
ValueNumbering.h|1 +
11 files changed, 45 insertions(+), 14 deletions(-)
Index: llvm/include/llvm/Analysis/AliasAnalysis.h
diff -u llvm/include/llvm/Analysis/AliasAnalysis.h:1.28
llvm/include/llvm/Analysis/AliasAnalysis.h:1.29
--- llvm/include/llvm/Analysis/AliasAnalysis.h:1.28 Sun Feb 11 22:59:57 2007
+++ llvm/include/llvm/Analysis/AliasAnalysis.h Tue May 1 16:15:46 2007
@@ -61,6 +61,7 @@
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
public:
+ static const int ID; // Class identification, replacement for typeinfo
AliasAnalysis() : TD(0), AA(0) {}
virtual ~AliasAnalysis(); // We want to be subclassed
Index: llvm/include/llvm/Analysis/CallGraph.h
diff -u llvm/include/llvm/Analysis/CallGraph.h:1.53
llvm/include/llvm/Analysis/CallGraph.h:1.54
--- llvm/include/llvm/Analysis/CallGraph.h:1.53 Sat Dec 16 23:15:12 2006
+++ llvm/include/llvm/Analysis/CallGraph.h Tue May 1 16:15:46 2007
@@ -73,6 +73,7 @@
FunctionMapTy FunctionMap;// Map from a function to its node
public:
+ static const int ID; // Class identification, replacement for typeinfo
//===-
// Accessors...
//
Index: llvm/include/llvm/Analysis/Dominators.h
diff -u llvm/include/llvm/Analysis/Dominators.h:1.76
llvm/include/llvm/Analysis/Dominators.h:1.77
--- llvm/include/llvm/Analysis/Dominators.h:1.76Sat Apr 21 02:04:45 2007
+++ llvm/include/llvm/Analysis/Dominators.h Tue May 1 16:15:46 2007
@@ -42,9 +42,10 @@
protected:
std::vector Roots;
const bool IsPostDominators;
-
- inline DominatorBase(bool isPostDom) : Roots(), IsPostDominators(isPostDom)
{}
+ inline DominatorBase(intptr_t ID, bool isPostDom) :
+FunctionPass(ID), Roots(), IsPostDominators(isPostDom) {}
public:
+
/// getRoots - Return the root blocks of the current CFG. This may include
/// multiple blocks if we are computing post dominators. For forward
/// dominators, this will always be a single block (the entry node).
@@ -135,7 +136,8 @@
};
public:
- DominatorTreeBase(bool isPostDom) : DominatorBase(isPostDom) {}
+ DominatorTreeBase(intptr_t ID, bool isPostDom)
+: DominatorBase(ID, isPostDom) {}
~DominatorTreeBase() { reset(); }
virtual void releaseMemory() { reset(); }
@@ -206,7 +208,8 @@
///
class DominatorTree : public DominatorTreeBase {
public:
- DominatorTree() : DominatorTreeBase(false) {}
+ static const int ID; // Pass ID, replacement for typeid
+ DominatorTree() : DominatorTreeBase((intptr_t)&ID, false) {}
BasicBlock *getRoot() const {
assert(Roots.size() == 1 && "Should always have entry node!");
@@ -264,8 +267,9 @@
///
class ETForestBase : public DominatorBase {
public:
- ETForestBase(bool isPostDom) : DominatorBase(isPostDom), Nodes(),
- DFSInfoValid(false), SlowQueries(0) {}
+ ETForestBase(intptr_t ID, bool isPostDom)
+: DominatorBase(ID, isPostDom), Nodes(),
+ DFSInfoValid(false), SlowQueries(0) {}
virtual void releaseMemory() { reset(); }
@@ -395,7 +399,9 @@
class ETForest : public ETForestBase {
public:
- ETForest() : ETForestBase(false) {}
+ static const int ID; // Pass identifcation, replacement for typeid
+
+ ETForest() : ETForestBase((intptr_t)&ID, false) {}
BasicBlock *getRoot() const {
assert(Roots.size() == 1 && "Should always have entry node!");
@@ -425,7 +431,8 @@
protected:
DomSetMapType Frontiers;
public:
- DominanceFrontierBase(bool isPostDom) : DominatorBase(isPostDom) {}
+ DominanceFrontierBase(intptr_t ID, bool isPostDom)
+: DominatorBase(ID, isPostDom) {}
virtual void releaseMemory() { Frontiers.clear(); }
@@ -470,7 +477,9 @@
///
class DominanceFrontier : public DominanceFrontierBase {
public:
- DominanceFrontier() : DominanceFrontierBase(false) {}
+ static const int ID; // Pass ID, replacement for typeid
+ DominanceFrontier() :
+DominanceFrontierBase((intptr_t)& ID, false) {}
BasicBlock *getRoot() const {
assert(Roots.size() == 1 &&
[llvm-commits] CVS: llvm/lib/VMCore/AsmWriter.cpp Dominators.cpp Pass.cpp PassManager.cpp Verifier.cpp
Changes in directory llvm/lib/VMCore:
AsmWriter.cpp updated: 1.279 -> 1.280
Dominators.cpp updated: 1.97 -> 1.98
Pass.cpp updated: 1.87 -> 1.88
PassManager.cpp updated: 1.153 -> 1.154
Verifier.cpp updated: 1.209 -> 1.210
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+51 -32)
AsmWriter.cpp |2 ++
Dominators.cpp |3 +++
Pass.cpp| 29 ++---
PassManager.cpp | 25 +
Verifier.cpp| 24 +++-
5 files changed, 51 insertions(+), 32 deletions(-)
Index: llvm/lib/VMCore/AsmWriter.cpp
diff -u llvm/lib/VMCore/AsmWriter.cpp:1.279 llvm/lib/VMCore/AsmWriter.cpp:1.280
--- llvm/lib/VMCore/AsmWriter.cpp:1.279 Sun Apr 29 13:35:00 2007
+++ llvm/lib/VMCore/AsmWriter.cpp Tue May 1 16:15:47 2007
@@ -135,8 +135,10 @@
} // end namespace llvm
+const int PrintModulePass::ID = 0;
static RegisterPass
X("printm", "Print module to stderr");
+const int PrintFunctionPass::ID = 0;
static RegisterPass
Y("print","Print function to stderr");
Index: llvm/lib/VMCore/Dominators.cpp
diff -u llvm/lib/VMCore/Dominators.cpp:1.97 llvm/lib/VMCore/Dominators.cpp:1.98
--- llvm/lib/VMCore/Dominators.cpp:1.97 Fri Apr 20 19:36:45 2007
+++ llvm/lib/VMCore/Dominators.cpp Tue May 1 16:15:47 2007
@@ -58,6 +58,7 @@
//
//===--===//
+const int DominatorTree::ID = 0;
static RegisterPass
E("domtree", "Dominator Tree Construction", true);
@@ -353,6 +354,7 @@
// DominanceFrontier Implementation
//===--===//
+const int DominanceFrontier::ID = 0;
static RegisterPass
G("domfrontier", "Dominance Frontier Construction", true);
@@ -833,6 +835,7 @@
// ETForest implementation
//===--===//
+const int ETForest::ID = 0;
static RegisterPass
D("etforest", "ET Forest Construction", true);
Index: llvm/lib/VMCore/Pass.cpp
diff -u llvm/lib/VMCore/Pass.cpp:1.87 llvm/lib/VMCore/Pass.cpp:1.88
--- llvm/lib/VMCore/Pass.cpp:1.87 Thu Apr 26 16:33:42 2007
+++ llvm/lib/VMCore/Pass.cppTue May 1 16:15:47 2007
@@ -133,7 +133,7 @@
class PassRegistrar {
/// PassInfoMap - Keep track of the passinfo object for each registered llvm
/// pass.
- std::map PassInfoMap;
+ std::map PassInfoMap;
/// AnalysisGroupInfo - Keep track of information for each analysis group.
struct AnalysisGroupInfo {
@@ -147,19 +147,19 @@
public:
- const PassInfo *GetPassInfo(const std::type_info &TI) const {
-std::map::const_iterator I = PassInfoMap.find(TI);
+ const PassInfo *GetPassInfo(intptr_t TI) const {
+std::map::const_iterator I = PassInfoMap.find(TI);
return I != PassInfoMap.end() ? I->second : 0;
}
void RegisterPass(PassInfo &PI) {
bool Inserted =
-
PassInfoMap.insert(std::make_pair(TypeInfo(PI.getTypeInfo()),&PI)).second;
+ PassInfoMap.insert(std::make_pair(PI.getTypeInfo(),&PI)).second;
assert(Inserted && "Pass registered multiple times!");
}
void UnregisterPass(PassInfo &PI) {
-std::map::iterator I =
+std::map::iterator I =
PassInfoMap.find(PI.getTypeInfo());
assert(I != PassInfoMap.end() && "Pass registered but not in map!");
@@ -168,7 +168,7 @@
}
void EnumerateWith(PassRegistrationListener *L) {
-for (std::map::const_iterator I = PassInfoMap.begin(),
+for (std::map::const_iterator I = PassInfoMap.begin(),
E = PassInfoMap.end(); I != E; ++I)
L->passEnumerate(I->second);
}
@@ -210,11 +210,10 @@
// getPassInfo - Return the PassInfo data structure that corresponds to this
// pass...
const PassInfo *Pass::getPassInfo() const {
- if (PassInfoCache) return PassInfoCache;
- return lookupPassInfo(typeid(*this));
+ return lookupPassInfo(PassID);
}
-const PassInfo *Pass::lookupPassInfo(const std::type_info &TI) {
+const PassInfo *Pass::lookupPassInfo(intptr_t TI) {
return getPassRegistrar()->GetPassInfo(TI);
}
@@ -238,12 +237,12 @@
// RegisterAGBase implementation
//
-RegisterAGBase::RegisterAGBase(const std::type_info &Interface,
- const std::type_info *Pass, bool isDefault)
- : RegisterPassBase(Interface),
+RegisterAGBase::RegisterAGBase(intptr_t InterfaceID,
+ intptr_t PassID, bool isDefault)
+ : RegisterPassBase(InterfaceID),
ImplementationInfo(0), isDefaultImplementation(isDefault) {
- InterfaceInfo = const_cast(Pass::lookupPassInfo(Interface));
+ InterfaceInfo = const_cast(Pass::lookupPassInfo(InterfaceID));
if (InterfaceInfo == 0) {
// First reference to Interface, register it now.
registerPass();
@@ -252,8 +251,8 @@
assert(PIObj.isAnalysisGroup() &&
"Trying to join an analysis group that is a normal pass!");
- if (Pass) {
-Implement
[llvm-commits] CVS: llvm/lib/Transforms/IPO/ArgumentPromotion.cpp ConstantMerge.cpp DeadArgumentElimination.cpp DeadTypeElimination.cpp ExtractFunction.cpp GlobalDCE.cpp GlobalOpt.cpp IPConstantPropag
Changes in directory llvm/lib/Transforms/IPO:
ArgumentPromotion.cpp updated: 1.39 -> 1.40
ConstantMerge.cpp updated: 1.39 -> 1.40
DeadArgumentElimination.cpp updated: 1.40 -> 1.41
DeadTypeElimination.cpp updated: 1.62 -> 1.63
ExtractFunction.cpp updated: 1.20 -> 1.21
GlobalDCE.cpp updated: 1.45 -> 1.46
GlobalOpt.cpp updated: 1.101 -> 1.102
IPConstantPropagation.cpp updated: 1.23 -> 1.24
IndMemRemoval.cpp updated: 1.15 -> 1.16
InlineSimple.cpp updated: 1.78 -> 1.79
Inliner.cpp updated: 1.37 -> 1.38
Inliner.h updated: 1.9 -> 1.10
Internalize.cpp updated: 1.45 -> 1.46
LoopExtractor.cpp updated: 1.24 -> 1.25
LowerSetJmp.cpp updated: 1.40 -> 1.41
PruneEH.cpp updated: 1.31 -> 1.32
RaiseAllocations.cpp updated: 1.40 -> 1.41
SimplifyLibCalls.cpp updated: 1.112 -> 1.113
StripDeadPrototypes.cpp updated: 1.5 -> 1.6
StripSymbols.cpp updated: 1.15 -> 1.16
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+85 -10)
ArgumentPromotion.cpp |4
ConstantMerge.cpp |4
DeadArgumentElimination.cpp |5 +
DeadTypeElimination.cpp |4
ExtractFunction.cpp |6 +-
GlobalDCE.cpp |4
GlobalOpt.cpp |3 +++
IPConstantPropagation.cpp |4
IndMemRemoval.cpp |4
InlineSimple.cpp|2 ++
Inliner.cpp |4 +++-
Inliner.h |1 +
Internalize.cpp |6 --
LoopExtractor.cpp | 15 ---
LowerSetJmp.cpp |4
PruneEH.cpp |5 +
RaiseAllocations.cpp|5 -
SimplifyLibCalls.cpp|4
StripDeadPrototypes.cpp |5 -
StripSymbols.cpp|6 +-
20 files changed, 85 insertions(+), 10 deletions(-)
Index: llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
diff -u llvm/lib/Transforms/IPO/ArgumentPromotion.cpp:1.39
llvm/lib/Transforms/IPO/ArgumentPromotion.cpp:1.40
--- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp:1.39 Thu Mar 1 15:00:32 2007
+++ llvm/lib/Transforms/IPO/ArgumentPromotion.cpp Tue May 1 16:15:46 2007
@@ -63,12 +63,16 @@
}
virtual bool runOnSCC(const std::vector &SCC);
+static const int ID; // Pass identifcation, replacement for typeid
+ArgPromotion() : CallGraphSCCPass((intptr_t)&ID) {}
+
private:
bool PromoteArguments(CallGraphNode *CGN);
bool isSafeToPromoteArgument(Argument *Arg) const;
Function *DoPromotion(Function *F, std::vector &ArgsToPromote);
};
+ const int ArgPromotion::ID = 0;
RegisterPass X("argpromotion",
"Promote 'by reference' arguments to scalars");
}
Index: llvm/lib/Transforms/IPO/ConstantMerge.cpp
diff -u llvm/lib/Transforms/IPO/ConstantMerge.cpp:1.39
llvm/lib/Transforms/IPO/ConstantMerge.cpp:1.40
--- llvm/lib/Transforms/IPO/ConstantMerge.cpp:1.39 Sat Apr 14 13:06:52 2007
+++ llvm/lib/Transforms/IPO/ConstantMerge.cpp Tue May 1 16:15:46 2007
@@ -29,12 +29,16 @@
namespace {
struct VISIBILITY_HIDDEN ConstantMerge : public ModulePass {
+static const int ID; // Pass identifcation, replacement for typeid
+ConstantMerge() : ModulePass((intptr_t)&ID) {}
+
// run - For this pass, process all of the globals in the module,
// eliminating duplicate constants.
//
bool runOnModule(Module &M);
};
+ const int ConstantMerge::ID = 0;
RegisterPassX("constmerge","Merge Duplicate Global
Constants");
}
Index: llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
diff -u llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp:1.40
llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp:1.41
--- llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp:1.40Mon Feb 12
20:10:56 2007
+++ llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp Tue May 1 16:15:46 2007
@@ -76,6 +76,8 @@
std::multimap CallSites;
public:
+static const int ID; // Pass identifcation, replacement for typeid
+DAE() : ModulePass((intptr_t)&ID) {}
bool runOnModule(Module &M);
virtual bool ShouldHackArguments() const { return false; }
@@ -93,14 +95,17 @@
void RemoveDeadArgumentsFromFunction(Function *F);
};
+ const int DAE::ID = 0;
RegisterPass X("deadargelim", "Dead Argument Elimination");
/// DAH - DeadArgumentHacking pass - Same as dead argument elimination, but
/// deletes arguments to functions which are external. This is only for use
/// by bugpoint.
struct DAH : public DAE {
+static const int ID;
virtual bool ShouldHackArguments() const { return true; }
};
+ const int DAH::ID = 0;
RegisterPass Y("deadarghaX0r",
"Dead Argument Hacking (BUGPOINT USE ONLY; DO NOT USE)");
}
Index: llvm/lib/Transforms/IPO/DeadTypeElimination.cpp
diff -u llvm/lib/Transforms/IPO/DeadTypeElimination.cpp:1.62
llvm/lib/Transforms/IPO/DeadTypeElimination.cpp:1.63
--- llvm/lib/Transforms/IPO/
[llvm-commits] CVS: llvm/lib/Target/IA64/IA64Bundling.cpp
Changes in directory llvm/lib/Target/IA64:
IA64Bundling.cpp updated: 1.8 -> 1.9
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+4 -1)
IA64Bundling.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/IA64/IA64Bundling.cpp
diff -u llvm/lib/Target/IA64/IA64Bundling.cpp:1.8
llvm/lib/Target/IA64/IA64Bundling.cpp:1.9
--- llvm/lib/Target/IA64/IA64Bundling.cpp:1.8 Mon Apr 16 13:10:23 2007
+++ llvm/lib/Target/IA64/IA64Bundling.cpp Tue May 1 16:15:46 2007
@@ -36,12 +36,14 @@
namespace {
struct IA64BundlingPass : public MachineFunctionPass {
+static const int ID;
/// Target machine description which we query for reg. names, data
/// layout, etc.
///
IA64TargetMachine &TM;
-IA64BundlingPass(IA64TargetMachine &tm) : TM(tm) { }
+IA64BundlingPass(IA64TargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
virtual const char *getPassName() const {
return "IA64 (Itanium) Bundling Pass";
@@ -61,6 +63,7 @@
// 'fallthrough' code
std::set PendingRegWrites;
};
+ const int IA64BundlingPass::ID = 0;
} // end of anonymous namespace
/// createIA64BundlingPass - Returns a pass that adds STOP (;;) instructions
___
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[llvm-commits] CVS: llvm/lib/Target/CBackend/CBackend.cpp
Changes in directory llvm/lib/Target/CBackend:
CBackend.cpp updated: 1.338 -> 1.339
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+12 -2)
CBackend.cpp | 14 --
1 files changed, 12 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/CBackend/CBackend.cpp
diff -u llvm/lib/Target/CBackend/CBackend.cpp:1.338
llvm/lib/Target/CBackend/CBackend.cpp:1.339
--- llvm/lib/Target/CBackend/CBackend.cpp:1.338 Tue Apr 17 04:20:00 2007
+++ llvm/lib/Target/CBackend/CBackend.cpp Tue May 1 16:15:46 2007
@@ -56,6 +56,10 @@
/// external functions with the same name.
///
class CBackendNameAllUsedStructsAndMergeFunctions : public ModulePass {
+ public:
+static const int ID;
+CBackendNameAllUsedStructsAndMergeFunctions()
+ : ModulePass((intptr_t)&ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
}
@@ -67,6 +71,8 @@
virtual bool runOnModule(Module &M);
};
+ const int CBackendNameAllUsedStructsAndMergeFunctions::ID = 0;
+
/// CWriter - This class is the main chunk of code that converts an LLVM
/// module to a C translation unit.
class CWriter : public FunctionPass, public InstVisitor {
@@ -82,8 +88,10 @@
std::set intrinsicPrototypesAlreadyGenerated;
public:
-CWriter(std::ostream &o) : Out(o), IL(0), Mang(0), LI(0), TheModule(0),
- TAsm(0), TD(0) {}
+static const int ID;
+CWriter(std::ostream &o)
+ : FunctionPass((intptr_t)&ID), Out(o), IL(0), Mang(0), LI(0),
+TheModule(0), TAsm(0), TD(0) {}
virtual const char *getPassName() const { return "C backend"; }
@@ -256,6 +264,8 @@
};
}
+const int CWriter::ID = 0;
+
/// This method inserts names for any unnamed structure types that are used by
/// the program, and removes names from structure types that are not used by
the
/// program.
___
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[llvm-commits] CVS: llvm/include/llvm/Bytecode/WriteBytecodePass.h
Changes in directory llvm/include/llvm/Bytecode:
WriteBytecodePass.h updated: 1.19 -> 1.20
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+4 -2)
WriteBytecodePass.h |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/Bytecode/WriteBytecodePass.h
diff -u llvm/include/llvm/Bytecode/WriteBytecodePass.h:1.19
llvm/include/llvm/Bytecode/WriteBytecodePass.h:1.20
--- llvm/include/llvm/Bytecode/WriteBytecodePass.h:1.19 Sun Jan 21 00:31:34 2007
+++ llvm/include/llvm/Bytecode/WriteBytecodePass.h Tue May 1 16:15:46 2007
@@ -26,10 +26,12 @@
bool DeleteStream;
bool CompressFile;
public:
+ static const int ID; // Pass identifcation, replacement for typeid
WriteBytecodePass()
-: Out(&cout), DeleteStream(false), CompressFile(false) {}
+: ModulePass((intptr_t) &ID), Out(&cout), DeleteStream(false),
+ CompressFile(false) {}
WriteBytecodePass(OStream *o, bool DS = false, bool CF = false)
-: Out(o), DeleteStream(DS), CompressFile(CF) {}
+: ModulePass((intptr_t) &ID), Out(o), DeleteStream(DS), CompressFile(CF) {}
inline ~WriteBytecodePass() {
if (DeleteStream) delete Out;
___
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[llvm-commits] CVS: llvm/tools/opt/AnalysisWrappers.cpp GraphPrinters.cpp PrintSCC.cpp opt.cpp
Changes in directory llvm/tools/opt:
AnalysisWrappers.cpp updated: 1.21 -> 1.22
GraphPrinters.cpp updated: 1.14 -> 1.15
PrintSCC.cpp updated: 1.15 -> 1.16
opt.cpp updated: 1.134 -> 1.135
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+31 -4)
AnalysisWrappers.cpp |7 +++
GraphPrinters.cpp|4
PrintSCC.cpp |7 +++
opt.cpp | 17 +
4 files changed, 31 insertions(+), 4 deletions(-)
Index: llvm/tools/opt/AnalysisWrappers.cpp
diff -u llvm/tools/opt/AnalysisWrappers.cpp:1.21
llvm/tools/opt/AnalysisWrappers.cpp:1.22
--- llvm/tools/opt/AnalysisWrappers.cpp:1.21Tue Jan 30 14:08:39 2007
+++ llvm/tools/opt/AnalysisWrappers.cpp Tue May 1 16:15:47 2007
@@ -30,6 +30,8 @@
/// useful when looking for standard library functions we should constant
fold
/// or handle in alias analyses.
struct ExternalFunctionsPassedConstants : public ModulePass {
+static const int ID; // Pass ID, replacement for typeid
+ExternalFunctionsPassedConstants() : ModulePass((intptr_t)&ID) {}
virtual bool runOnModule(Module &M) {
for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I)
if (I->isDeclaration()) {
@@ -61,10 +63,14 @@
}
};
+ const int ExternalFunctionsPassedConstants::ID = 0;
RegisterPass
P1("externalfnconstants", "Print external fn callsites passed constants");
struct CallGraphPrinter : public ModulePass {
+static const int ID; // Pass ID, replacement for typeid
+CallGraphPrinter() : ModulePass((intptr_t)&ID) {}
+
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequiredTransitive();
@@ -76,6 +82,7 @@
}
};
+ const int CallGraphPrinter::ID = 0;
RegisterPass
P2("callgraph", "Print a call graph");
}
Index: llvm/tools/opt/GraphPrinters.cpp
diff -u llvm/tools/opt/GraphPrinters.cpp:1.14
llvm/tools/opt/GraphPrinters.cpp:1.15
--- llvm/tools/opt/GraphPrinters.cpp:1.14 Fri Nov 17 04:05:07 2006
+++ llvm/tools/opt/GraphPrinters.cppTue May 1 16:15:47 2007
@@ -60,6 +60,9 @@
namespace {
struct CallGraphPrinter : public ModulePass {
+static const int ID; // Pass ID, replacement for typeid
+CallGraphPrinter() : ModulePass((intptr_t)&ID) {}
+
virtual bool runOnModule(Module &M) {
WriteGraphToFile(std::cerr, "callgraph", &getAnalysis());
return false;
@@ -74,6 +77,7 @@
}
};
+ const int CallGraphPrinter::ID = 0;
RegisterPass P2("print-callgraph",
"Print Call Graph to 'dot' file");
}
Index: llvm/tools/opt/PrintSCC.cpp
diff -u llvm/tools/opt/PrintSCC.cpp:1.15 llvm/tools/opt/PrintSCC.cpp:1.16
--- llvm/tools/opt/PrintSCC.cpp:1.15Sun Aug 27 17:30:17 2006
+++ llvm/tools/opt/PrintSCC.cpp Tue May 1 16:15:47 2007
@@ -35,6 +35,8 @@
namespace {
struct CFGSCC : public FunctionPass {
+static const int ID; // Pass identification, replacement for typeid
+CFGSCC() : FunctionPass((intptr_t)&ID) {}
bool runOnFunction(Function& func);
void print(std::ostream &O, const Module* = 0) const { }
@@ -45,6 +47,9 @@
};
struct CallGraphSCC : public ModulePass {
+static const int ID; // Pass identification, replacement for typeid
+CallGraphSCC() : ModulePass((intptr_t)&ID) {}
+
// run - Print out SCCs in the call graph for the specified module.
bool runOnModule(Module &M);
@@ -57,9 +62,11 @@
}
};
+ const int CFGSCC::ID = 0;
RegisterPass
Y("cfgscc", "Print SCCs of each function CFG");
+ const int CallGraphSCC::ID = 0;
RegisterPass
Z("callscc", "Print SCCs of the Call Graph");
}
Index: llvm/tools/opt/opt.cpp
diff -u llvm/tools/opt/opt.cpp:1.134 llvm/tools/opt/opt.cpp:1.135
--- llvm/tools/opt/opt.cpp:1.134Thu Apr 19 23:45:58 2007
+++ llvm/tools/opt/opt.cpp Tue May 1 16:15:47 2007
@@ -98,8 +98,10 @@
namespace {
struct ModulePassPrinter : public ModulePass {
+ static const int ID;
const PassInfo *PassToPrint;
- ModulePassPrinter(const PassInfo *PI) : PassToPrint(PI) {}
+ ModulePassPrinter(const PassInfo *PI) : ModulePass((intptr_t)&ID),
+ PassToPrint(PI) {}
virtual bool runOnModule(Module &M) {
if (!Quiet) {
@@ -119,12 +121,15 @@
}
};
+const int ModulePassPrinter::ID = 0;
struct FunctionPassPrinter : public FunctionPass {
const PassInfo *PassToPrint;
- FunctionPassPrinter(const PassInfo *PI) : PassToPrint(PI) {}
+ static const int ID;
+ FunctionPassPrinter(const PassInfo *PI) : FunctionPass((intptr_t)&ID),
+PassToPrint(PI) {}
virtual bool runOnFunction(Function &F) {
-if (!Quiet) {
+if (!Quiet) {
cout << "Printing analysis '" << PassToPrint->getPassName()
<< "' for function '" << F.getName() << "':\n";
}
@@ -141,9 +146,12 @@
}
};
+const int Functi
[llvm-commits] CVS: llvm/lib/Transforms/Hello/Hello.cpp
Changes in directory llvm/lib/Transforms/Hello:
Hello.cpp updated: 1.14 -> 1.15
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+9 -0)
Hello.cpp |9 +
1 files changed, 9 insertions(+)
Index: llvm/lib/Transforms/Hello/Hello.cpp
diff -u llvm/lib/Transforms/Hello/Hello.cpp:1.14
llvm/lib/Transforms/Hello/Hello.cpp:1.15
--- llvm/lib/Transforms/Hello/Hello.cpp:1.14Fri Apr 13 13:58:18 2007
+++ llvm/lib/Transforms/Hello/Hello.cpp Tue May 1 16:15:46 2007
@@ -25,6 +25,9 @@
namespace {
// Hello - The first implementation, without getAnalysisUsage.
struct Hello : public FunctionPass {
+static const int ID; // Pass identifcation, replacement for typeid
+Hello() : FunctionPass((intptr_t)&ID) {}
+
virtual bool runOnFunction(Function &F) {
HelloCounter++;
std::string fname = F.getName();
@@ -33,10 +36,15 @@
return false;
}
};
+
+ const int Hello::ID = 0;
RegisterPass X("hello", "Hello World Pass");
// Hello2 - The second implementation with getAnalysisUsage implemented.
struct Hello2 : public FunctionPass {
+static const int ID; // Pass identifcation, replacement for typeid
+Hello2() : FunctionPass((intptr_t)&ID) {}
+
virtual bool runOnFunction(Function &F) {
HelloCounter++;
std::string fname = F.getName();
@@ -50,6 +58,7 @@
AU.setPreservesAll();
};
};
+ const int Hello2::ID = 0;
RegisterPass Y("hello2",
"Hello World Pass (with getAnalysisUsage
implemented)");
}
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[llvm-commits] CVS: llvm/include/llvm/Assembly/PrintModulePass.h
Changes in directory llvm/include/llvm/Assembly:
PrintModulePass.h updated: 1.21 -> 1.22
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+7 -4)
PrintModulePass.h | 11 +++
1 files changed, 7 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/Assembly/PrintModulePass.h
diff -u llvm/include/llvm/Assembly/PrintModulePass.h:1.21
llvm/include/llvm/Assembly/PrintModulePass.h:1.22
--- llvm/include/llvm/Assembly/PrintModulePass.h:1.21 Wed Dec 6 19:30:30 2006
+++ llvm/include/llvm/Assembly/PrintModulePass.hTue May 1 16:15:46 2007
@@ -28,9 +28,10 @@
OStream *Out; // ostream to print on
bool DeleteStream; // Delete the ostream in our dtor?
public:
- PrintModulePass() : Out(&cerr), DeleteStream(false) {}
+ static const int ID;
+ PrintModulePass() : ModulePass((intptr_t)&ID), Out(&cerr),
DeleteStream(false) {}
PrintModulePass(OStream *o, bool DS = false)
-: Out(o), DeleteStream(DS) {}
+: ModulePass((intptr_t)&ID), Out(o), DeleteStream(DS) {}
~PrintModulePass() {
if (DeleteStream) delete Out;
@@ -51,10 +52,12 @@
OStream *Out; // ostream to print on
bool DeleteStream; // Delete the ostream in our dtor?
public:
- PrintFunctionPass() : Banner(""), Out(&cerr), DeleteStream(false) {}
+ static const int ID;
+ PrintFunctionPass() : FunctionPass((intptr_t)&ID), Banner(""), Out(&cerr),
+DeleteStream(false) {}
PrintFunctionPass(const std::string &B, OStream *o = &cout,
bool DS = false)
-: Banner(B), Out(o), DeleteStream(DS) {}
+: FunctionPass((intptr_t)&ID), Banner(B), Out(o), DeleteStream(DS) {}
inline ~PrintFunctionPass() {
if (DeleteStream) delete Out;
___
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[llvm-commits] CVS: llvm/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h
Changes in directory llvm/include/llvm/Transforms/Utils:
UnifyFunctionExitNodes.h updated: 1.20 -> 1.21
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+3 -1)
UnifyFunctionExitNodes.h |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h
diff -u llvm/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h:1.20
llvm/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h:1.21
--- llvm/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h:1.20Fri Jun
2 13:40:06 2006
+++ llvm/include/llvm/Transforms/Utils/UnifyFunctionExitNodes.h Tue May 1
16:15:46 2007
@@ -25,7 +25,9 @@
struct UnifyFunctionExitNodes : public FunctionPass {
BasicBlock *ReturnBlock, *UnwindBlock, *UnreachableBlock;
public:
- UnifyFunctionExitNodes() : ReturnBlock(0), UnwindBlock(0) {}
+ static const int ID; // Pass identifcation, replacement for typeid
+ UnifyFunctionExitNodes() : FunctionPass((intptr_t)&ID),
+ ReturnBlock(0), UnwindBlock(0) {}
// We can preserve non-critical-edgeness when we unify function exit nodes
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
___
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[llvm-commits] CVS: llvm/lib/CodeGen/AsmPrinter.cpp BranchFolding.cpp ELFWriter.cpp ELFWriter.h LiveIntervalAnalysis.cpp LiveVariables.cpp MachOWriter.cpp MachOWriter.h MachineFunction.cpp MachineModu
Changes in directory llvm/lib/CodeGen:
AsmPrinter.cpp updated: 1.160 -> 1.161
BranchFolding.cpp updated: 1.46 -> 1.47
ELFWriter.cpp updated: 1.38 -> 1.39
ELFWriter.h updated: 1.1 -> 1.2
LiveIntervalAnalysis.cpp updated: 1.239 -> 1.240
LiveVariables.cpp updated: 1.79 -> 1.80
MachOWriter.cpp updated: 1.32 -> 1.33
MachOWriter.h updated: 1.3 -> 1.4
MachineFunction.cpp updated: 1.111 -> 1.112
MachineModuleInfo.cpp updated: 1.5 -> 1.6
PHIElimination.cpp updated: 1.57 -> 1.58
PrologEpilogInserter.cpp updated: 1.84 -> 1.85
RegAllocLinearScan.cpp updated: 1.145 -> 1.146
RegAllocLocal.cpp updated: 1.102 -> 1.103
RegAllocSimple.cpp updated: 1.83 -> 1.84
TwoAddressInstructionPass.cpp updated: 1.47 -> 1.48
UnreachableBlockElim.cpp updated: 1.9 -> 1.10
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+64 -7)
AsmPrinter.cpp|3 ++-
BranchFolding.cpp |4
ELFWriter.cpp |4 +++-
ELFWriter.h |2 ++
LiveIntervalAnalysis.cpp |1 +
LiveVariables.cpp |1 +
MachOWriter.cpp |4 +++-
MachOWriter.h |1 +
MachineFunction.cpp | 11 +--
MachineModuleInfo.cpp |9 -
PHIElimination.cpp|4
PrologEpilogInserter.cpp |4
RegAllocLinearScan.cpp|4
RegAllocLocal.cpp |5 +
RegAllocSimple.cpp|6 +-
TwoAddressInstructionPass.cpp |4
UnreachableBlockElim.cpp |4
17 files changed, 64 insertions(+), 7 deletions(-)
Index: llvm/lib/CodeGen/AsmPrinter.cpp
diff -u llvm/lib/CodeGen/AsmPrinter.cpp:1.160
llvm/lib/CodeGen/AsmPrinter.cpp:1.161
--- llvm/lib/CodeGen/AsmPrinter.cpp:1.160 Mon Apr 30 12:00:18 2007
+++ llvm/lib/CodeGen/AsmPrinter.cpp Tue May 1 16:15:46 2007
@@ -32,9 +32,10 @@
static cl::opt
AsmVerbose("asm-verbose", cl::Hidden, cl::desc("Add comments to directives."));
+const int AsmPrinter::ID = 0;
AsmPrinter::AsmPrinter(std::ostream &o, TargetMachine &tm,
const TargetAsmInfo *T)
-: FunctionNumber(0), O(o), TM(tm), TAI(T)
+ : MachineFunctionPass((intptr_t)&ID), FunctionNumber(0), O(o), TM(tm), TAI(T)
{}
std::string AsmPrinter::getSectionForFunction(const Function &F) const {
Index: llvm/lib/CodeGen/BranchFolding.cpp
diff -u llvm/lib/CodeGen/BranchFolding.cpp:1.46
llvm/lib/CodeGen/BranchFolding.cpp:1.47
--- llvm/lib/CodeGen/BranchFolding.cpp:1.46 Mon Apr 30 18:35:00 2007
+++ llvm/lib/CodeGen/BranchFolding.cpp Tue May 1 16:15:46 2007
@@ -39,6 +39,9 @@
namespace {
struct BranchFolder : public MachineFunctionPass {
+static const int ID;
+BranchFolder() : MachineFunctionPass((intptr_t)&ID) {}
+
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const { return "Control Flow Optimizer";
}
const TargetInstrInfo *TII;
@@ -64,6 +67,7 @@
MachineBasicBlock *TBB, MachineBasicBlock *FBB,
const std::vector &Cond);
};
+ const int BranchFolder::ID = 0;
}
FunctionPass *llvm::createBranchFoldingPass() { return new BranchFolder(); }
Index: llvm/lib/CodeGen/ELFWriter.cpp
diff -u llvm/lib/CodeGen/ELFWriter.cpp:1.38 llvm/lib/CodeGen/ELFWriter.cpp:1.39
--- llvm/lib/CodeGen/ELFWriter.cpp:1.38 Tue Feb 13 23:52:17 2007
+++ llvm/lib/CodeGen/ELFWriter.cpp Tue May 1 16:15:46 2007
@@ -47,6 +47,7 @@
#include
using namespace llvm;
+const int ELFWriter::ID = 0;
/// AddELFWriter - Concrete function to add the ELF writer to the function pass
/// manager.
MachineCodeEmitter *llvm::AddELFWriter(FunctionPassManager &FPM,
@@ -176,7 +177,8 @@
// ELFWriter Implementation
//===--===//
-ELFWriter::ELFWriter(std::ostream &o, TargetMachine &tm) : O(o), TM(tm) {
+ELFWriter::ELFWriter(std::ostream &o, TargetMachine &tm)
+ : MachineFunctionPass((intptr_t)&ID), O(o), TM(tm) {
e_flags = 0;// e_flags defaults to 0, no flags.
is64Bit = TM.getTargetData()->getPointerSizeInBits() == 64;
Index: llvm/lib/CodeGen/ELFWriter.h
diff -u llvm/lib/CodeGen/ELFWriter.h:1.1 llvm/lib/CodeGen/ELFWriter.h:1.2
--- llvm/lib/CodeGen/ELFWriter.h:1.1Wed Feb 7 19:30:50 2007
+++ llvm/lib/CodeGen/ELFWriter.hTue May 1 16:15:46 2007
@@ -30,6 +30,8 @@
class ELFWriter : public MachineFunctionPass {
friend class ELFCodeEmitter;
public:
+static const int ID;
+
MachineCodeEmitter &getMachineCodeEmitter() const {
return *(MachineCodeEmitter*)MCE;
}
Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.239
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.240
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.239 Thu Apr 26 13:59:33 2007
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
[llvm-commits] CVS: llvm/include/llvm/CodeGen/AsmPrinter.h LiveIntervalAnalysis.h LiveVariables.h MachineFunctionPass.h MachineModuleInfo.h SelectionDAGISel.h
Changes in directory llvm/include/llvm/CodeGen:
AsmPrinter.h updated: 1.63 -> 1.64
LiveIntervalAnalysis.h updated: 1.80 -> 1.81
LiveVariables.h updated: 1.41 -> 1.42
MachineFunctionPass.h updated: 1.5 -> 1.6
MachineModuleInfo.h updated: 1.7 -> 1.8
SelectionDAGISel.h updated: 1.37 -> 1.38
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+15 -1)
AsmPrinter.h |2 ++
LiveIntervalAnalysis.h |3 +++
LiveVariables.h|3 +++
MachineFunctionPass.h |2 ++
MachineModuleInfo.h|2 ++
SelectionDAGISel.h |4 +++-
6 files changed, 15 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/AsmPrinter.h
diff -u llvm/include/llvm/CodeGen/AsmPrinter.h:1.63
llvm/include/llvm/CodeGen/AsmPrinter.h:1.64
--- llvm/include/llvm/CodeGen/AsmPrinter.h:1.63 Wed Apr 25 09:27:10 2007
+++ llvm/include/llvm/CodeGen/AsmPrinter.h Tue May 1 16:15:46 2007
@@ -34,6 +34,8 @@
/// AsmPrinter - This class is intended to be used as a driving class for all
/// asm writers.
class AsmPrinter : public MachineFunctionPass {
+static const int ID;
+
/// FunctionNumber - This provides a unique ID for each function emitted in
/// this translation unit. It is autoincremented by SetupMachineFunction,
/// and can be accessed with getFunctionNumber() and
Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.80
llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.81
--- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.80 Wed Apr 25
02:30:23 2007
+++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.hTue May 1 16:15:46 2007
@@ -65,6 +65,9 @@
BitVector JoinedLIs;
public:
+static const int ID; // Pass identifcation, replacement for typeid
+LiveIntervals() : MachineFunctionPass((intptr_t)&ID) {}
+
struct CopyRec {
MachineInstr *MI;
unsigned SrcReg, DstReg;
Index: llvm/include/llvm/CodeGen/LiveVariables.h
diff -u llvm/include/llvm/CodeGen/LiveVariables.h:1.41
llvm/include/llvm/CodeGen/LiveVariables.h:1.42
--- llvm/include/llvm/CodeGen/LiveVariables.h:1.41 Wed Apr 25 20:40:09 2007
+++ llvm/include/llvm/CodeGen/LiveVariables.h Tue May 1 16:15:46 2007
@@ -40,6 +40,9 @@
class LiveVariables : public MachineFunctionPass {
public:
+ static const int ID; // Pass identifcation, replacement for typeid
+ LiveVariables() : MachineFunctionPass((intptr_t)&ID) {}
+
/// VarInfo - This represents the regions where a virtual register is live in
/// the program. We represent this with three different pieces of
/// information: the instruction that uniquely defines the value, the set of
Index: llvm/include/llvm/CodeGen/MachineFunctionPass.h
diff -u llvm/include/llvm/CodeGen/MachineFunctionPass.h:1.5
llvm/include/llvm/CodeGen/MachineFunctionPass.h:1.6
--- llvm/include/llvm/CodeGen/MachineFunctionPass.h:1.5 Fri Jul 14 18:08:47 2006
+++ llvm/include/llvm/CodeGen/MachineFunctionPass.h Tue May 1 16:15:46 2007
@@ -26,6 +26,8 @@
struct MachineFunctionPass : public FunctionPass {
+ MachineFunctionPass(intptr_t ID) : FunctionPass(ID) {}
+
/// runOnMachineFunction - This method must be overloaded to perform the
/// desired machine code transformation or analysis.
///
Index: llvm/include/llvm/CodeGen/MachineModuleInfo.h
diff -u llvm/include/llvm/CodeGen/MachineModuleInfo.h:1.7
llvm/include/llvm/CodeGen/MachineModuleInfo.h:1.8
--- llvm/include/llvm/CodeGen/MachineModuleInfo.h:1.7 Thu Mar 1 14:25:32 2007
+++ llvm/include/llvm/CodeGen/MachineModuleInfo.h Tue May 1 16:15:46 2007
@@ -1022,6 +1022,8 @@
std::vector TypeInfos;
public:
+ static const int ID; // Pass identifcation, replacement for typeid
+
MachineModuleInfo();
~MachineModuleInfo();
Index: llvm/include/llvm/CodeGen/SelectionDAGISel.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.37
llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.38
--- llvm/include/llvm/CodeGen/SelectionDAGISel.h:1.37 Mon Apr 9 07:31:58 2007
+++ llvm/include/llvm/CodeGen/SelectionDAGISel.hTue May 1 16:15:46 2007
@@ -41,8 +41,10 @@
MachineBasicBlock *BB;
std::vector TopOrder;
unsigned DAGSize;
+ static const int ID;
- explicit SelectionDAGISel(TargetLowering &tli) : TLI(tli), DAGSize(0) {}
+ explicit SelectionDAGISel(TargetLowering &tli) :
+FunctionPass((intptr_t)&ID), TLI(tli), DAGSize(0) {}
TargetLowering &getTargetLowering() { return TLI; }
___
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[llvm-commits] CVS: llvm/tools/bugpoint/ExtractFunction.cpp TestPasses.cpp
Changes in directory llvm/tools/bugpoint:
ExtractFunction.cpp updated: 1.58 -> 1.59
TestPasses.cpp updated: 1.10 -> 1.11
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+15 -1)
ExtractFunction.cpp |4
TestPasses.cpp | 12 +++-
2 files changed, 15 insertions(+), 1 deletion(-)
Index: llvm/tools/bugpoint/ExtractFunction.cpp
diff -u llvm/tools/bugpoint/ExtractFunction.cpp:1.58
llvm/tools/bugpoint/ExtractFunction.cpp:1.59
--- llvm/tools/bugpoint/ExtractFunction.cpp:1.58Mon Feb 5 14:47:21 2007
+++ llvm/tools/bugpoint/ExtractFunction.cpp Tue May 1 16:15:47 2007
@@ -305,7 +305,11 @@
/// BlocksToNotExtract list.
class BlockExtractorPass : public ModulePass {
bool runOnModule(Module &M);
+ public:
+static const int ID; // Pass ID, replacement for typeid
+BlockExtractorPass() : ModulePass((intptr_t)&ID) {}
};
+ const int BlockExtractorPass::ID = 0;
RegisterPass
XX("extract-bbs", "Extract Basic Blocks From Module (for bugpoint use)");
}
Index: llvm/tools/bugpoint/TestPasses.cpp
diff -u llvm/tools/bugpoint/TestPasses.cpp:1.10
llvm/tools/bugpoint/TestPasses.cpp:1.11
--- llvm/tools/bugpoint/TestPasses.cpp:1.10 Thu Apr 21 18:59:23 2005
+++ llvm/tools/bugpoint/TestPasses.cpp Tue May 1 16:15:47 2007
@@ -25,6 +25,10 @@
/// CrashOnCalls - This pass is used to test bugpoint. It intentionally
/// crashes on any call instructions.
class CrashOnCalls : public BasicBlockPass {
+ public:
+static const int ID; // Pass ID, replacement for typeid
+CrashOnCalls() : BasicBlockPass((intptr_t)&ID) {}
+ private:
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
}
@@ -38,6 +42,7 @@
}
};
+ const int CrashOnCalls::ID = 0;
RegisterPass
X("bugpoint-crashcalls",
"BugPoint Test Pass - Intentionally crash on CallInsts");
@@ -47,6 +52,10 @@
/// DeleteCalls - This pass is used to test bugpoint. It intentionally
/// deletes some call instructions, "misoptimizing" the program.
class DeleteCalls : public BasicBlockPass {
+ public:
+static const int ID; // Pass ID, replacement for typeid
+DeleteCalls() : BasicBlockPass((intptr_t)&ID) {}
+ private:
bool runOnBasicBlock(BasicBlock &BB) {
for (BasicBlock::iterator I = BB.begin(), E = BB.end(); I != E; ++I)
if (CallInst *CI = dyn_cast(I)) {
@@ -58,7 +67,8 @@
return false;
}
};
-
+
+ const int DeleteCalls::ID = 0;
RegisterPass
Y("bugpoint-deletecalls",
"BugPoint Test Pass - Intentionally 'misoptimize' CallInsts");
___
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[llvm-commits] CVS: llvm/include/llvm/CallGraphSCCPass.h Pass.h PassManagers.h PassSupport.h
Changes in directory llvm/include/llvm:
CallGraphSCCPass.h updated: 1.12 -> 1.13
Pass.h updated: 1.86 -> 1.87
PassManagers.h updated: 1.16 -> 1.17
PassSupport.h updated: 1.38 -> 1.39
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+29 -19)
CallGraphSCCPass.h |2 ++
Pass.h | 16 +++-
PassManagers.h |4 +++-
PassSupport.h | 26 +-
4 files changed, 29 insertions(+), 19 deletions(-)
Index: llvm/include/llvm/CallGraphSCCPass.h
diff -u llvm/include/llvm/CallGraphSCCPass.h:1.12
llvm/include/llvm/CallGraphSCCPass.h:1.13
--- llvm/include/llvm/CallGraphSCCPass.h:1.12 Mon Apr 16 13:51:25 2007
+++ llvm/include/llvm/CallGraphSCCPass.hTue May 1 16:15:46 2007
@@ -31,6 +31,8 @@
struct CallGraphSCCPass : public Pass {
+ CallGraphSCCPass(intptr_t pid) : Pass(pid) {}
+
/// doInitialization - This method is called before the SCC's of the program
/// has been processed, allowing the pass to do initialization as necessary.
virtual bool doInitialization(CallGraph &CG) {
Index: llvm/include/llvm/Pass.h
diff -u llvm/include/llvm/Pass.h:1.86 llvm/include/llvm/Pass.h:1.87
--- llvm/include/llvm/Pass.h:1.86 Thu Apr 26 16:33:41 2007
+++ llvm/include/llvm/Pass.hTue May 1 16:15:46 2007
@@ -34,8 +34,8 @@
#include
#include
#include
-#include
#include
+#include
namespace llvm {
@@ -77,7 +77,7 @@
///
class Pass {
AnalysisResolver *Resolver; // Used to resolve analysis
- const PassInfo *PassInfoCache;
+ intptr_t PassID;
// AnalysisImpls - This keeps track of which passes implement the interfaces
// that are required by the current pass (to implement getAnalysis()).
@@ -87,7 +87,7 @@
void operator=(const Pass&); // DO NOT IMPLEMENT
Pass(const Pass &); // DO NOT IMPLEMENT
public:
- Pass() : Resolver(0), PassInfoCache(0) {}
+ Pass(intptr_t pid) : Resolver(0), PassID(pid) {}
virtual ~Pass();
/// getPassName - Return a nice clean name for a pass. This usually
@@ -163,12 +163,12 @@
template
static const PassInfo *getClassPassInfo() {
-return lookupPassInfo(typeid(AnalysisClass));
+return lookupPassInfo((intptr_t)&AnalysisClass::ID);
}
// lookupPassInfo - Return the pass info object for the specified pass class,
// or null if it is not known.
- static const PassInfo *lookupPassInfo(const std::type_info &TI);
+ static const PassInfo *lookupPassInfo(intptr_t TI);
/// getAnalysisToUpdate() - This function is used by subclasses
/// to get to the analysis information that might be around that needs to be
@@ -232,6 +232,7 @@
return PMT_ModulePassManager;
}
+ ModulePass(intptr_t pid) : Pass(pid) {}
// Force out-of-line virtual method.
virtual ~ModulePass();
};
@@ -256,6 +257,7 @@
///
virtual bool runOnModule(Module &M) { return false; }
+ ImmutablePass(intptr_t pid) : ModulePass(pid) {}
// Force out-of-line virtual method.
virtual ~ImmutablePass();
};
@@ -271,6 +273,8 @@
///
class FunctionPass : public Pass {
public:
+ FunctionPass(intptr_t pid) : Pass(pid) {}
+
/// doInitialization - Virtual method overridden by subclasses to do
/// any necessary per-module initialization.
///
@@ -320,6 +324,8 @@
///
class BasicBlockPass : public Pass {
public:
+ BasicBlockPass(intptr_t pid) : Pass(pid) {}
+
/// doInitialization - Virtual method overridden by subclasses to do
/// any necessary per-module initialization.
///
Index: llvm/include/llvm/PassManagers.h
diff -u llvm/include/llvm/PassManagers.h:1.16
llvm/include/llvm/PassManagers.h:1.17
--- llvm/include/llvm/PassManagers.h:1.16 Mon Apr 16 15:12:57 2007
+++ llvm/include/llvm/PassManagers.hTue May 1 16:15:46 2007
@@ -336,7 +336,9 @@
class FPPassManager : public ModulePass, public PMDataManager {
public:
- explicit FPPassManager(int Depth) : PMDataManager(Depth) { }
+ static const int ID;
+ explicit FPPassManager(int Depth)
+ : ModulePass((intptr_t)&ID), PMDataManager(Depth) { }
/// run - Execute all of the passes scheduled for execution. Keep track of
/// whether any of the passes modifies the module, and if so, return true.
Index: llvm/include/llvm/PassSupport.h
diff -u llvm/include/llvm/PassSupport.h:1.38
llvm/include/llvm/PassSupport.h:1.39
--- llvm/include/llvm/PassSupport.h:1.38Mon Apr 16 13:10:22 2007
+++ llvm/include/llvm/PassSupport.h Tue May 1 16:15:46 2007
@@ -37,19 +37,19 @@
class PassInfo {
const char *PassName; // Nice name for Pass
const char *PassArgument; // Command Line argument to run this
pass
- const std::type_info &TypeInfo; // type_info object for this Pass class
+ intptr_t PassID;
bool IsCFGOnlyPass; // Pass only looks at the CFG.
bool IsAnalysisGroup;// True if an analysis group.
std::vector ItfImpl;// Interfaces implemen
[llvm-commits] CVS: llvm/include/llvm/Transforms/RSProfiling.h
Changes in directory llvm/include/llvm/Transforms:
RSProfiling.h updated: 1.2 -> 1.3
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+3 -0)
RSProfiling.h |3 +++
1 files changed, 3 insertions(+)
Index: llvm/include/llvm/Transforms/RSProfiling.h
diff -u llvm/include/llvm/Transforms/RSProfiling.h:1.2
llvm/include/llvm/Transforms/RSProfiling.h:1.3
--- llvm/include/llvm/Transforms/RSProfiling.h:1.2 Wed Feb 22 10:23:43 2006
+++ llvm/include/llvm/Transforms/RSProfiling.h Tue May 1 16:15:46 2007
@@ -23,6 +23,9 @@
/// this interface are expected to chain to other implementations, such that
/// multiple profilers can be support simultaniously.
struct RSProfilers : public ModulePass {
+static const int ID; // Pass identification, replacement for typeinfo
+RSProfilers() : ModulePass((intptr_t)&ID) {}
+
/// isProfiling - This method returns true if the value passed it was
/// inserted by the profiler.
virtual bool isProfiling(Value* v) = 0;
___
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetData.h
Changes in directory llvm/include/llvm/Target:
TargetData.h updated: 1.60 -> 1.61
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+6 -3)
TargetData.h |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
Index: llvm/include/llvm/Target/TargetData.h
diff -u llvm/include/llvm/Target/TargetData.h:1.60
llvm/include/llvm/Target/TargetData.h:1.61
--- llvm/include/llvm/Target/TargetData.h:1.60 Thu Apr 26 14:39:32 2007
+++ llvm/include/llvm/Target/TargetData.h Tue May 1 16:15:46 2007
@@ -108,14 +108,15 @@
///
/// @note This has to exist, because this is a pass, but it should never be
/// used.
- TargetData() {
+ TargetData() : ImmutablePass((intptr_t)&ID) {
assert(0 && "ERROR: Bad TargetData ctor used. "
"Tool did not specify a TargetData to use?");
abort();
}
/// Constructs a TargetData from a specification string. See init().
- TargetData(const std::string &TargetDescription) {
+ TargetData(const std::string &TargetDescription)
+: ImmutablePass((intptr_t)&ID) {
init(TargetDescription);
}
@@ -123,7 +124,7 @@
TargetData(const Module *M);
TargetData(const TargetData &TD) :
-ImmutablePass(),
+ImmutablePass((intptr_t)&ID),
LittleEndian(TD.isLittleEndian()),
PointerMemSize(TD.PointerMemSize),
PointerABIAlign(TD.PointerABIAlign),
@@ -200,6 +201,8 @@
/// specified global, returned in log form. This includes an explicitly
/// requested alignment (if the global has one).
unsigned getPreferredAlignmentLog(const GlobalVariable *GV) const;
+
+ static const int ID; // Pass identifcation, replacement for typeid
};
/// StructLayout - used to lazily calculate structure layout information for a
___
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[llvm-commits] CVS: llvm/lib/Analysis/AliasAnalysis.cpp AliasAnalysisCounter.cpp AliasAnalysisEvaluator.cpp AliasDebugger.cpp AliasSetTracker.cpp BasicAliasAnalysis.cpp CFGPrinter.cpp InstCount.cpp In
Changes in directory llvm/lib/Analysis:
AliasAnalysis.cpp updated: 1.30 -> 1.31
AliasAnalysisCounter.cpp updated: 1.20 -> 1.21
AliasAnalysisEvaluator.cpp updated: 1.33 -> 1.34
AliasDebugger.cpp updated: 1.3 -> 1.4
AliasSetTracker.cpp updated: 1.46 -> 1.47
BasicAliasAnalysis.cpp updated: 1.108 -> 1.109
CFGPrinter.cpp updated: 1.22 -> 1.23
InstCount.cpp updated: 1.20 -> 1.21
IntervalPartition.cpp updated: 1.32 -> 1.33
LoadValueNumbering.cpp updated: 1.39 -> 1.40
LoopInfo.cpp updated: 1.83 -> 1.84
LoopPass.cpp updated: 1.18 -> 1.19
PostDominators.cpp updated: 1.67 -> 1.68
ProfileInfo.cpp updated: 1.11 -> 1.12
ProfileInfoLoaderPass.cpp updated: 1.18 -> 1.19
ScalarEvolution.cpp updated: 1.112 -> 1.113
ValueNumbering.cpp updated: 1.25 -> 1.26
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+61 -5)
AliasAnalysis.cpp |1 +
AliasAnalysisCounter.cpp |4 +++-
AliasAnalysisEvaluator.cpp |4
AliasDebugger.cpp |4
AliasSetTracker.cpp|4
BasicAliasAnalysis.cpp |6 ++
CFGPrinter.cpp |6 ++
InstCount.cpp |4
IntervalPartition.cpp |4 +++-
LoadValueNumbering.cpp |3 +++
LoopInfo.cpp |1 +
LoopPass.cpp |5 -
PostDominators.cpp |3 +++
ProfileInfo.cpp|7 ++-
ProfileInfoLoaderPass.cpp |4 +++-
ScalarEvolution.cpp|1 +
ValueNumbering.cpp |5 +
17 files changed, 61 insertions(+), 5 deletions(-)
Index: llvm/lib/Analysis/AliasAnalysis.cpp
diff -u llvm/lib/Analysis/AliasAnalysis.cpp:1.30
llvm/lib/Analysis/AliasAnalysis.cpp:1.31
--- llvm/lib/Analysis/AliasAnalysis.cpp:1.30Fri Nov 17 01:10:51 2006
+++ llvm/lib/Analysis/AliasAnalysis.cpp Tue May 1 16:15:46 2007
@@ -34,6 +34,7 @@
// Register the AliasAnalysis interface, providing a nice name to refer to.
namespace {
+ const int AliasAnalysis::ID = 0;
RegisterAnalysisGroup Z("Alias Analysis");
}
Index: llvm/lib/Analysis/AliasAnalysisCounter.cpp
diff -u llvm/lib/Analysis/AliasAnalysisCounter.cpp:1.20
llvm/lib/Analysis/AliasAnalysisCounter.cpp:1.21
--- llvm/lib/Analysis/AliasAnalysisCounter.cpp:1.20 Mon Feb 5 17:42:17 2007
+++ llvm/lib/Analysis/AliasAnalysisCounter.cpp Tue May 1 16:15:46 2007
@@ -34,7 +34,8 @@
const char *Name;
Module *M;
public:
-AliasAnalysisCounter() {
+static const int ID; // Class identification, replacement for typeinfo
+AliasAnalysisCounter() : ModulePass((intptr_t) &ID) {
No = May = Must = 0;
NoMR = JustRef = JustMod = MR = 0;
}
@@ -107,6 +108,7 @@
}
};
+ const int AliasAnalysisCounter::ID = 0;
RegisterPass
X("count-aa", "Count Alias Analysis Query Responses");
RegisterAnalysisGroup Y(X);
Index: llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
diff -u llvm/lib/Analysis/AliasAnalysisEvaluator.cpp:1.33
llvm/lib/Analysis/AliasAnalysisEvaluator.cpp:1.34
--- llvm/lib/Analysis/AliasAnalysisEvaluator.cpp:1.33 Mon Feb 5 17:42:17 2007
+++ llvm/lib/Analysis/AliasAnalysisEvaluator.cppTue May 1 16:15:46 2007
@@ -50,6 +50,9 @@
unsigned NoModRef, Mod, Ref, ModRef;
public:
+static const int ID; // Pass identifcation, replacement for typeid
+AAEval() : FunctionPass((intptr_t)&ID) {}
+
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired();
AU.setPreservesAll();
@@ -70,6 +73,7 @@
bool doFinalization(Module &M);
};
+ const int AAEval::ID = 0;
RegisterPass
X("aa-eval", "Exhaustive Alias Analysis Precision Evaluator");
}
Index: llvm/lib/Analysis/AliasDebugger.cpp
diff -u llvm/lib/Analysis/AliasDebugger.cpp:1.3
llvm/lib/Analysis/AliasDebugger.cpp:1.4
--- llvm/lib/Analysis/AliasDebugger.cpp:1.3 Mon Feb 5 17:42:17 2007
+++ llvm/lib/Analysis/AliasDebugger.cpp Tue May 1 16:15:46 2007
@@ -40,6 +40,9 @@
std::set Vals;
public:
+static const int ID; // Class identification, replacement for typeinfo
+AliasDebugger() : ModulePass((intptr_t)&ID) {}
+
bool runOnModule(Module &M) {
InitializeAliasAnalysis(this); // set up super class
@@ -119,6 +122,7 @@
};
+ const int AliasDebugger::ID = 0;
RegisterPass X("debug-aa", "AA use debugger");
RegisterAnalysisGroup Y(X);
}
Index: llvm/lib/Analysis/AliasSetTracker.cpp
diff -u llvm/lib/Analysis/AliasSetTracker.cpp:1.46
llvm/lib/Analysis/AliasSetTracker.cpp:1.47
--- llvm/lib/Analysis/AliasSetTracker.cpp:1.46 Mon Feb 5 17:42:17 2007
+++ llvm/lib/Analysis/AliasSetTracker.cpp Tue May 1 16:15:46 2007
@@ -555,6 +555,9 @@
class VISIBILITY_HIDDEN AliasSetPrinter : public FunctionPass {
AliasSetTracker *Tracker;
public:
+static const int ID; // Pass identifcation, replacement for typeid
+AliasSetPrinter() : FunctionPass((intptr_t)&ID) {}
+
virtual void getAnalysisUsage(AnalysisUsage &AU)
[llvm-commits] CVS: llvm/lib/Analysis/IPA/Andersens.cpp CallGraph.cpp CallGraphSCCPass.cpp FindUsedTypes.cpp GlobalsModRef.cpp
Changes in directory llvm/lib/Analysis/IPA:
Andersens.cpp updated: 1.46 -> 1.47
CallGraph.cpp updated: 1.65 -> 1.66
CallGraphSCCPass.cpp updated: 1.21 -> 1.22
FindUsedTypes.cpp updated: 1.38 -> 1.39
GlobalsModRef.cpp updated: 1.29 -> 1.30
---
Log message:
Do not use typeinfo to identify pass in pass manager.
---
Diffs of the changes: (+20 -2)
Andersens.cpp|6 ++
CallGraph.cpp|6 +-
CallGraphSCCPass.cpp |5 -
FindUsedTypes.cpp|1 +
GlobalsModRef.cpp|4
5 files changed, 20 insertions(+), 2 deletions(-)
Index: llvm/lib/Analysis/IPA/Andersens.cpp
diff -u llvm/lib/Analysis/IPA/Andersens.cpp:1.46
llvm/lib/Analysis/IPA/Andersens.cpp:1.47
--- llvm/lib/Analysis/IPA/Andersens.cpp:1.46Sun Mar 4 18:00:42 2007
+++ llvm/lib/Analysis/IPA/Andersens.cpp Tue May 1 16:15:46 2007
@@ -75,12 +75,17 @@
namespace {
class VISIBILITY_HIDDEN Andersens : public ModulePass, public AliasAnalysis,
private InstVisitor {
+ public:
+static const int ID; // Class identification, replacement for typeinfo
+Andersens() : ModulePass((intptr_t)&ID) {}
+ private:
/// Node class - This class is used to represent a memory object in the
/// program, and is the primitive used to build the points-to graph.
class Node {
std::vector Pointees;
Value *Val;
public:
+ static const unsigned ID; // Pass identifcation, replacement for typeid
Node() : Val(0) {}
Node *setValue(Value *V) {
assert(Val == 0 && "Value already set for this node!");
@@ -334,6 +339,7 @@
void visitInstruction(Instruction &I);
};
+ const int Andersens::ID = 0;
RegisterPass X("anders-aa",
"Andersen's Interprocedural Alias Analysis");
RegisterAnalysisGroup Y(X);
Index: llvm/lib/Analysis/IPA/CallGraph.cpp
diff -u llvm/lib/Analysis/IPA/CallGraph.cpp:1.65
llvm/lib/Analysis/IPA/CallGraph.cpp:1.66
--- llvm/lib/Analysis/IPA/CallGraph.cpp:1.65Mon Feb 5 17:42:17 2007
+++ llvm/lib/Analysis/IPA/CallGraph.cpp Tue May 1 16:15:46 2007
@@ -51,7 +51,9 @@
CallGraphNode *CallsExternalNode;
public:
- BasicCallGraph() : Root(0), ExternalCallingNode(0), CallsExternalNode(0) {}
+ static const int ID; // Class identification, replacement for typeinfo
+ BasicCallGraph() : ModulePass((intptr_t)&ID), Root(0),
+ExternalCallingNode(0), CallsExternalNode(0) {}
// runOnModule - Compute the call graph for the specified module.
virtual bool runOnModule(Module &M) {
@@ -188,7 +190,9 @@
}
};
+const int CallGraph::ID = 0;
RegisterAnalysisGroup X("Call Graph");
+const int BasicCallGraph::ID = 0;
RegisterPass Y("basiccg", "Basic CallGraph Construction");
RegisterAnalysisGroup Z(Y);
Index: llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp
diff -u llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.21
llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.22
--- llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp:1.21 Mon Apr 16 13:10:22 2007
+++ llvm/lib/Analysis/IPA/CallGraphSCCPass.cpp Tue May 1 16:15:46 2007
@@ -30,7 +30,9 @@
class CGPassManager : public ModulePass, public PMDataManager {
public:
- CGPassManager(int Depth) : PMDataManager(Depth) { }
+ static const int ID;
+ CGPassManager(int Depth)
+: ModulePass((intptr_t)&ID), PMDataManager(Depth) { }
/// run - Execute all of the passes scheduled for execution. Keep track of
/// whether any of the passes modifies the module, and if so, return true.
@@ -71,6 +73,7 @@
}
};
+const int CGPassManager::ID = 0;
/// run - Execute all of the passes scheduled for execution. Keep track of
/// whether any of the passes modifies the module, and if so, return true.
bool CGPassManager::runOnModule(Module &M) {
Index: llvm/lib/Analysis/IPA/FindUsedTypes.cpp
diff -u llvm/lib/Analysis/IPA/FindUsedTypes.cpp:1.38
llvm/lib/Analysis/IPA/FindUsedTypes.cpp:1.39
--- llvm/lib/Analysis/IPA/FindUsedTypes.cpp:1.38Wed Dec 6 00:35:25 2006
+++ llvm/lib/Analysis/IPA/FindUsedTypes.cpp Tue May 1 16:15:46 2007
@@ -21,6 +21,7 @@
#include "llvm/Support/InstIterator.h"
using namespace llvm;
+const int FindUsedTypes::ID = 0;
static RegisterPass
X("printusedtypes", "Find Used Types");
Index: llvm/lib/Analysis/IPA/GlobalsModRef.cpp
diff -u llvm/lib/Analysis/IPA/GlobalsModRef.cpp:1.29
llvm/lib/Analysis/IPA/GlobalsModRef.cpp:1.30
--- llvm/lib/Analysis/IPA/GlobalsModRef.cpp:1.29Mon Feb 5 17:42:17 2007
+++ llvm/lib/Analysis/IPA/GlobalsModRef.cpp Tue May 1 16:15:46 2007
@@ -83,6 +83,9 @@
std::map FunctionInfo;
public:
+static const int ID;
+GlobalsModRef() : ModulePass((intptr_t)&ID) {}
+
bool runOnModule(Module &M) {
InitializeAliasAnalysis(this); // set up super class
AnalyzeGlobals(M); // find non-addr taken
globals
@@ -143,6 +146,7 @@
bool AnalyzeIndirectGlobalMemory(GlobalValue *GV);
};
+ const int G
[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
Changes in directory llvm/lib/Target/X86: X86TargetAsmInfo.cpp updated: 1.38 -> 1.39 --- Log message: Fix couple of bugs connected with eh info: 1. Correct output offsets on Linux 2. Fix "style" of personality function. It shouldn't be indirect. --- Diffs of the changes: (+4 -2) X86TargetAsmInfo.cpp |6 -- 1 files changed, 4 insertions(+), 2 deletions(-) Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.38 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.39 --- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.38 Tue May 1 05:19:31 2007 +++ llvm/lib/Target/X86/X86TargetAsmInfo.cppTue May 1 17:23:12 2007 @@ -99,7 +99,8 @@ case X86Subtarget::isELF: // Set up DWARF directives HasLEB128 = true; // Target asm supports leb128 directives (little-endian) -AbsoluteSectionOffsets = true; +AbsoluteDebugSectionOffsets = true; +AbsoluteEHSectionOffsets = false; // bool HasLEB128; // Defaults to false. // hasDotLoc - True if target asm supports .loc directives. // bool HasDotLoc; // Defaults to false. @@ -141,7 +142,8 @@ // Set up DWARF directives HasLEB128 = true; // Target asm supports leb128 directives (little-endian) -AbsoluteSectionOffsets = true; +AbsoluteDebugSectionOffsets = true; +AbsoluteEHSectionOffsets = false; PrivateGlobalPrefix = "L"; // Prefix for private global symbols WeakRefDirective = "\t.weak\t"; SetDirective = "\t.set\t"; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/TargetAsmInfo.h
Changes in directory llvm/include/llvm/Target:
TargetAsmInfo.h updated: 1.31 -> 1.32
---
Log message:
Fix couple of bugs connected with eh info:
1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.
---
Diffs of the changes: (+13 -6)
TargetAsmInfo.h | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
Index: llvm/include/llvm/Target/TargetAsmInfo.h
diff -u llvm/include/llvm/Target/TargetAsmInfo.h:1.31
llvm/include/llvm/Target/TargetAsmInfo.h:1.32
--- llvm/include/llvm/Target/TargetAsmInfo.h:1.31 Sun Apr 29 14:17:45 2007
+++ llvm/include/llvm/Target/TargetAsmInfo.hTue May 1 17:23:12 2007
@@ -263,10 +263,14 @@
//===--- Dwarf Emission Directives ---===//
-/// AbsoluteSectionOffsets - True if we should emit abolute section
-/// offsets. Defaults to false.
-bool AbsoluteSectionOffsets;
-
+/// AbsoluteDebugSectionOffsets - True if we should emit abolute section
+/// offsets for debug information. Defaults to false.
+bool AbsoluteDebugSectionOffsets;
+
+/// AbsoluteEHSectionOffsets - True if we should emit abolute section
+/// offsets for EH information. Defaults to false.
+bool AbsoluteEHSectionOffsets;
+
/// HasLEB128 - True if target asm supports leb128 directives.
///
bool HasLEB128; // Defaults to false.
@@ -530,8 +534,11 @@
const char *getProtectedDirective() const {
return ProtectedDirective;
}
-bool isAbsoluteSectionOffsets() const {
- return AbsoluteSectionOffsets;
+bool isAbsoluteDebugSectionOffsets() const {
+ return AbsoluteDebugSectionOffsets;
+}
+bool isAbsoluteEHSectionOffsets() const {
+ return AbsoluteEHSectionOffsets;
}
bool hasLEB128() const {
return HasLEB128;
___
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[llvm-commits] CVS: llvm/lib/Target/TargetAsmInfo.cpp
Changes in directory llvm/lib/Target:
TargetAsmInfo.cpp updated: 1.24 -> 1.25
---
Log message:
Fix couple of bugs connected with eh info:
1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.
---
Diffs of the changes: (+2 -1)
TargetAsmInfo.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/TargetAsmInfo.cpp
diff -u llvm/lib/Target/TargetAsmInfo.cpp:1.24
llvm/lib/Target/TargetAsmInfo.cpp:1.25
--- llvm/lib/Target/TargetAsmInfo.cpp:1.24 Sun Apr 29 13:35:00 2007
+++ llvm/lib/Target/TargetAsmInfo.cpp Tue May 1 17:23:12 2007
@@ -75,7 +75,8 @@
WeakRefDirective(0),
HiddenDirective("\t.hidden\t"),
ProtectedDirective("\t.protected\t"),
- AbsoluteSectionOffsets(false),
+ AbsoluteDebugSectionOffsets(false),
+ AbsoluteEHSectionOffsets(false),
HasLEB128(false),
HasDotLoc(false),
HasDotFile(false),
___
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[llvm-commits] CVS: llvm/lib/CodeGen/DwarfWriter.cpp
Changes in directory llvm/lib/CodeGen:
DwarfWriter.cpp updated: 1.132 -> 1.133
---
Log message:
Fix couple of bugs connected with eh info:
1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.
---
Diffs of the changes: (+27 -15)
DwarfWriter.cpp | 42 +++---
1 files changed, 27 insertions(+), 15 deletions(-)
Index: llvm/lib/CodeGen/DwarfWriter.cpp
diff -u llvm/lib/CodeGen/DwarfWriter.cpp:1.132
llvm/lib/CodeGen/DwarfWriter.cpp:1.133
--- llvm/lib/CodeGen/DwarfWriter.cpp:1.132 Wed Mar 7 02:25:02 2007
+++ llvm/lib/CodeGen/DwarfWriter.cppTue May 1 17:23:12 2007
@@ -914,13 +914,20 @@
void EmitSectionOffset(const char* Label, const char* Section,
unsigned LabelNumber, unsigned SectionNumber,
- bool IsSmall = false) {
+ bool IsSmall = false, bool isEH = false) {
+bool printAbsolute = false;
if (TAI->needsSet()) {
O << "\t.set\t";
PrintLabelName("set", SetCounter);
O << ",";
PrintLabelName(Label, LabelNumber, true);
- if (!TAI->isAbsoluteSectionOffsets()) {
+
+ if (isEH)
+printAbsolute = TAI->isAbsoluteEHSectionOffsets();
+ else
+printAbsolute = TAI->isAbsoluteDebugSectionOffsets();
+
+ if (!printAbsolute) {
O << "-";
PrintLabelName(Section, SectionNumber);
}
@@ -940,7 +947,13 @@
O << TAI->getData64bitsDirective();
PrintLabelName(Label, LabelNumber, true);
- if (!TAI->isAbsoluteSectionOffsets()) {
+
+ if (isEH)
+printAbsolute = TAI->isAbsoluteEHSectionOffsets();
+ else
+printAbsolute = TAI->isAbsoluteDebugSectionOffsets();
+
+ if (!printAbsolute) {
O << "-";
PrintLabelName(Section, SectionNumber);
}
@@ -1688,7 +1701,7 @@
CompileUnit *NewCompileUnit(CompileUnitDesc *UnitDesc, unsigned ID) {
// Construct debug information entry.
DIE *Die = new DIE(DW_TAG_compile_unit);
-if (TAI->isAbsoluteSectionOffsets())
+if (TAI->isAbsoluteDebugSectionOffsets())
AddLabel(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line",
0));
else
AddDelta(Die, DW_AT_stmt_list, DW_FORM_data4, DWLabel("section_line", 0),
@@ -2107,7 +2120,7 @@
Asm->EmitInt32(ContentSize); Asm->EOL("Length of Compilation Unit Info");
Asm->EmitInt16(DWARF_VERSION); Asm->EOL("DWARF version number");
-EmitSectionOffset("abbrev_begin", "section_abbrev", 0, 0, true);
+EmitSectionOffset("abbrev_begin", "section_abbrev", 0, 0, true, false);
Asm->EOL("Offset Into Abbrev. Section");
Asm->EmitInt8(TAI->getAddressSize()); Asm->EOL("Address Size (in bytes)");
@@ -2366,7 +2379,7 @@
EmitLabel("frame_begin", SubprogramCount);
-EmitSectionOffset("frame_common_begin", "section_frame", 0, 0, true);
+EmitSectionOffset("frame_common_begin", "section_frame", 0, 0, true,
false);
Asm->EOL("FDE CIE offset");
EmitReference("func_begin", SubprogramCount);
@@ -2401,7 +2414,8 @@
Asm->EmitInt16(DWARF_VERSION); Asm->EOL("DWARF Version");
-EmitSectionOffset("info_begin", "section_info", Unit->getID(), 0, true);
+EmitSectionOffset("info_begin", "section_info",
+ Unit->getID(), 0, true, false);
Asm->EOL("Offset of Compilation Unit Info");
EmitDifference("info_end", Unit->getID(), "info_begin",
Unit->getID(),true);
@@ -2769,10 +2783,8 @@
if (Personality) {
Asm->EmitULEB128Bytes(7);
Asm->EOL("Augmentation Size");
- Asm->EmitInt8(DW_EH_PE_indirect |
-DW_EH_PE_pcrel |
-DW_EH_PE_sdata4);
- Asm->EOL("Personality (indirect pcrel sdata4)");
+ Asm->EmitInt8(DW_EH_PE_pcrel | DW_EH_PE_sdata4);
+ Asm->EOL("Personality (pcrel sdata4)");
O << TAI->getData32bitsDirective();
Asm->EmitExternalGlobal((const GlobalVariable *)(Personality));
@@ -2830,7 +2842,7 @@
EmitLabel("eh_frame_begin", SubprogramCount);
EmitSectionOffset("eh_frame_begin", "section_eh_frame",
-SubprogramCount, 0, true);
+SubprogramCount, 0, true, true);
Asm->EOL("FDE CIE offset");
EmitReference("eh_func_begin", SubprogramCount, true);
@@ -2994,7 +3006,7 @@
for (unsigned i = 0, N = LandingPads.size(); i != N; ++i) {
const LandingPadInfo &LandingPad = LandingPads[i];
EmitSectionOffset("label", "eh_func_begin",
-LandingPad.BeginLabel, SubprogramCount);
+LandingPad.BeginLabel, SubprogramCount, false, true);
Asm->EOL("Region start");
EmitDifference("label", LandingPad.EndLabel,
@@ -3007,8 +3019,8 @@
else
Asm->EmitInt64(0);
} else {
-EmitSectionOffset("label", "eh_f
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMTargetAsmInfo.h ARMTargetAsmInfo.cpp
Changes in directory llvm/lib/Target/ARM:
ARMTargetAsmInfo.h updated: 1.3 -> 1.4
ARMTargetAsmInfo.cpp updated: 1.18 -> 1.19
---
Log message:
Add some support for (Darwin) code-generating directives in getInlineAsmLength.
Support is incomplete, but more accurate than gcc's.
---
Diffs of the changes: (+115 -18)
ARMTargetAsmInfo.cpp | 128 ---
ARMTargetAsmInfo.h |5 +
2 files changed, 115 insertions(+), 18 deletions(-)
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.h
diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.h:1.3
llvm/lib/Target/ARM/ARMTargetAsmInfo.h:1.4
--- llvm/lib/Target/ARM/ARMTargetAsmInfo.h:1.3 Sun Apr 29 14:17:45 2007
+++ llvm/lib/Target/ARM/ARMTargetAsmInfo.h Tue May 1 20:02:40 2007
@@ -15,6 +15,7 @@
#define ARMTARGETASMINFO_H
#include "llvm/Target/TargetAsmInfo.h"
+#include "ARMSubtarget.h"
namespace llvm {
@@ -24,9 +25,11 @@
struct ARMTargetAsmInfo : public TargetAsmInfo {
ARMTargetAsmInfo(const ARMTargetMachine &TM);
-bool isThumb;
+const ARMSubtarget *Subtarget;
virtual unsigned getInlineAsmLength(const char *Str) const;
+unsigned countArguments(const char *p) const;
+unsigned countString(const char *p) const;
};
Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.18
llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.19
--- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.18 Sun Apr 29 19:30:48 2007
+++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cppTue May 1 20:02:40 2007
@@ -1,3 +1,4 @@
+
//===-- ARMTargetAsmInfo.cpp - ARM asm properties ---*- C++
-*-===//
//
// The LLVM Compiler Infrastructure
@@ -18,7 +19,7 @@
using namespace llvm;
ARMTargetAsmInfo::ARMTargetAsmInfo(const ARMTargetMachine &TM) {
- const ARMSubtarget *Subtarget = &TM.getSubtarget();
+ Subtarget = &TM.getSubtarget();
if (Subtarget->isTargetDarwin()) {
GlobalPrefix = "_";
PrivateGlobalPrefix = "L";
@@ -85,13 +86,42 @@
InlineAsmStart = "@ InlineAsm Start";
InlineAsmEnd = "@ InlineAsm End";
LCOMMDirective = "\t.lcomm\t";
- isThumb = Subtarget->isThumb();
+}
+
+/// Count the number of comma-separated arguments.
+/// Do not try to detect errors.
+unsigned ARMTargetAsmInfo::countArguments(const char* p) const {
+ unsigned count = 0;
+ while (*p && isspace(*p) && *p != '\n')
+p++;
+ count++;
+ while (*p && *p!='\n' &&
+ strncmp(p, CommentString, strlen(CommentString))!=0) {
+if (*p==',')
+ count++;
+p++;
+ }
+ return count;
+}
+
+/// Count the length of a string enclosed in quote characters.
+/// Do not try to detect errors.
+unsigned ARMTargetAsmInfo::countString(const char* p) const {
+ unsigned count = 0;
+ while (*p && isspace(*p) && *p!='\n')
+p++;
+ if (!*p || *p != '\"')
+return count;
+ while (*++p && *p != '\"')
+count++;
+ return count;
}
/// ARM-specific version of TargetAsmInfo::getInlineAsmLength.
unsigned ARMTargetAsmInfo::getInlineAsmLength(const char *Str) const {
// Count the number of bytes in the asm.
bool atInsnStart = true;
+ bool inTextSection = true;
unsigned Length = 0;
for (; *Str; ++Str) {
if (atInsnStart) {
@@ -102,30 +132,94 @@
for (const char* p = Str; *p && !isspace(*p); p++)
if (*p == ':') {
Str = p+1;
+ while (*Str && isspace(*Str) && *Str != '\n')
+Str++;
break;
}
// Ignore everything from comment char(s) to EOL
if (strncmp(Str, CommentString, strlen(CommentString))==-0)
atInsnStart = false;
- else {
+ // FIXME do something like the following for non-Darwin
+ else if (*Str == '.' && Subtarget->isTargetDarwin()) {
+// Directive.
+atInsnStart = false;
+// Some change the section, but don't generate code.
+if (strncasecmp(Str, ".literal4", strlen(".literal4"))==0 ||
+strncasecmp(Str, ".literal8", strlen(".literal8"))==0 ||
+strncasecmp(Str, ".const", strlen(".const"))==0 ||
+strncasecmp(Str, ".constructor", strlen(".constructor"))==0 ||
+strncasecmp(Str, ".cstring", strlen(".cstring"))==0 ||
+strncasecmp(Str, ".data", strlen(".data"))==0 ||
+strncasecmp(Str, ".destructor", strlen(".destructor"))==0 ||
+strncasecmp(Str, ".fvmlib_init0", strlen(".fvmlib_init0"))==0 ||
+strncasecmp(Str, ".fvmlib_init1", strlen(".fvmlib_init1"))==0 ||
+strncasecmp(Str, ".mod_init_func", strlen(".mod_init_func"))==0 ||
+strncasecmp(Str, ".mod_term_func", strlen(".mod_term_func"))==0 ||
+strncasecmp(Str, ".picsymbol_stub", strlen(".picsymbol_stub"))==0
||
+strncasecmp(Str, ".symbol_stub", strlen(".symbol_stub"))==0 ||
+strncasecmp(Str, ".static_data", strlen(".static_data"))==0 ||
+strncasecmp(Str, ".section", strlen(".section"))==
Re: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMTargetAsmInfo.h ARMTargetAsmInfo.cpp
Woot! Fun stuff. :-)
Thanks Dale.
Evan
On May 1, 2007, at 6:03 PM, Dale Johannesen wrote:
>
>
> Changes in directory llvm/lib/Target/ARM:
>
> ARMTargetAsmInfo.h updated: 1.3 -> 1.4
> ARMTargetAsmInfo.cpp updated: 1.18 -> 1.19
> ---
> Log message:
>
> Add some support for (Darwin) code-generating directives in
> getInlineAsmLength.
> Support is incomplete, but more accurate than gcc's.
>
>
> ---
> Diffs of the changes: (+115 -18)
>
> ARMTargetAsmInfo.cpp | 128 +++
> +---
> ARMTargetAsmInfo.h |5 +
> 2 files changed, 115 insertions(+), 18 deletions(-)
>
>
> Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.h
> diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.h:1.3 llvm/lib/Target/
> ARM/ARMTargetAsmInfo.h:1.4
> --- llvm/lib/Target/ARM/ARMTargetAsmInfo.h:1.3Sun Apr 29 14:17:45
> 2007
> +++ llvm/lib/Target/ARM/ARMTargetAsmInfo.hTue May 1 20:02:40 2007
> @@ -15,6 +15,7 @@
> #define ARMTARGETASMINFO_H
>
> #include "llvm/Target/TargetAsmInfo.h"
> +#include "ARMSubtarget.h"
>
> namespace llvm {
>
> @@ -24,9 +25,11 @@
>struct ARMTargetAsmInfo : public TargetAsmInfo {
> ARMTargetAsmInfo(const ARMTargetMachine &TM);
>
> -bool isThumb;
> +const ARMSubtarget *Subtarget;
>
> virtual unsigned getInlineAsmLength(const char *Str) const;
> +unsigned countArguments(const char *p) const;
> +unsigned countString(const char *p) const;
>};
>
>
>
>
> Index: llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp
> diff -u llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.18 llvm/lib/
> Target/ARM/ARMTargetAsmInfo.cpp:1.19
> --- llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp:1.18 Sun Apr 29
> 19:30:48 2007
> +++ llvm/lib/Target/ARM/ARMTargetAsmInfo.cpp Tue May 1 20:02:40 2007
> @@ -1,3 +1,4 @@
> +
> //===-- ARMTargetAsmInfo.cpp - ARM asm properties ---
> *- C++ -*-===//
> //
> // The LLVM Compiler Infrastructure
> @@ -18,7 +19,7 @@
> using namespace llvm;
>
> ARMTargetAsmInfo::ARMTargetAsmInfo(const ARMTargetMachine &TM) {
> - const ARMSubtarget *Subtarget = &TM.getSubtarget();
> + Subtarget = &TM.getSubtarget();
>if (Subtarget->isTargetDarwin()) {
> GlobalPrefix = "_";
> PrivateGlobalPrefix = "L";
> @@ -85,13 +86,42 @@
>InlineAsmStart = "@ InlineAsm Start";
>InlineAsmEnd = "@ InlineAsm End";
>LCOMMDirective = "\t.lcomm\t";
> - isThumb = Subtarget->isThumb();
> +}
> +
> +/// Count the number of comma-separated arguments.
> +/// Do not try to detect errors.
> +unsigned ARMTargetAsmInfo::countArguments(const char* p) const {
> + unsigned count = 0;
> + while (*p && isspace(*p) && *p != '\n')
> +p++;
> + count++;
> + while (*p && *p!='\n' &&
> + strncmp(p, CommentString, strlen(CommentString))!=0) {
> +if (*p==',')
> + count++;
> +p++;
> + }
> + return count;
> +}
> +
> +/// Count the length of a string enclosed in quote characters.
> +/// Do not try to detect errors.
> +unsigned ARMTargetAsmInfo::countString(const char* p) const {
> + unsigned count = 0;
> + while (*p && isspace(*p) && *p!='\n')
> +p++;
> + if (!*p || *p != '\"')
> +return count;
> + while (*++p && *p != '\"')
> +count++;
> + return count;
> }
>
> /// ARM-specific version of TargetAsmInfo::getInlineAsmLength.
> unsigned ARMTargetAsmInfo::getInlineAsmLength(const char *Str)
> const {
>// Count the number of bytes in the asm.
>bool atInsnStart = true;
> + bool inTextSection = true;
>unsigned Length = 0;
>for (; *Str; ++Str) {
> if (atInsnStart) {
> @@ -102,30 +132,94 @@
>for (const char* p = Str; *p && !isspace(*p); p++)
> if (*p == ':') {
>Str = p+1;
> + while (*Str && isspace(*Str) && *Str != '\n')
> +Str++;
>break;
> }
>// Ignore everything from comment char(s) to EOL
>if (strncmp(Str, CommentString, strlen(CommentString))==-0)
> atInsnStart = false;
> - else {
> + // FIXME do something like the following for non-Darwin
> + else if (*Str == '.' && Subtarget->isTargetDarwin()) {
> +// Directive.
> +atInsnStart = false;
> +// Some change the section, but don't generate code.
> +if (strncasecmp(Str, ".literal4", strlen(".literal4"))==0 ||
> +strncasecmp(Str, ".literal8", strlen(".literal8"))==0 ||
> +strncasecmp(Str, ".const", strlen(".const"))==0 ||
> +strncasecmp(Str, ".constructor", strlen
> (".constructor"))==0 ||
> +strncasecmp(Str, ".cstring", strlen(".cstring"))==0 ||
> +strncasecmp(Str, ".data", strlen(".data"))==0 ||
> +strncasecmp(Str, ".destructor", strlen(".destructor"))
> ==0 ||
> +strncasecmp(Str, ".fvmlib_init0", strlen
> (".fvmlib_init0"))==0 ||
> +strncasecmp(Str, ".fvmlib_init1", strlen
> (".fvmlib_init1"))==0 ||
> +strncasecmp(Str, ".mod_init_func", strlen
> (".mod_init_func")
[llvm-commits] CVS: llvm-www/DevMtgMay2007.html
Changes in directory llvm-www: DevMtgMay2007.html updated: 1.115 -> 1.116 --- Log message: Add Alireza Moshtaghi --- Diffs of the changes: (+3 -1) DevMtgMay2007.html |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm-www/DevMtgMay2007.html diff -u llvm-www/DevMtgMay2007.html:1.115 llvm-www/DevMtgMay2007.html:1.116 --- llvm-www/DevMtgMay2007.html:1.115 Fri Apr 27 13:31:19 2007 +++ llvm-www/DevMtgMay2007.html Tue May 1 20:42:00 2007 @@ -127,6 +127,7 @@ LLVM, that tutorial you gave last week, etc. SpeakerTopic + Evan ChengBack end talk Nick Lewycky Design and implementation of the PredicateSimplifier pass, or, "VRP in LLVM" @@ -319,6 +320,7 @@ NameOrganization Paul McJonesAdobe Systems Incorporated. Scott MichelAerospace +Alireza MoshtaghiMicrochip Technology Robert MyklandAscenium Corp. Steve NaroffApple Inc. Devang PatelApple Inc. @@ -360,6 +362,6 @@ src="http://jigsaw.w3.org/css-validator/images/vcss"; alt="Valid CSS!"> http://validator.w3.org/check/referer";>http://www.w3.org/Icons/valid-html401"; alt="Valid HTML 4.01!"> -Last modified: $Date: 2007/04/27 18:31:19 $ +Last modified: $Date: 2007/05/02 01:42:00 $ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/CBackend/CBackend.cpp
Changes in directory llvm/lib/Target/CBackend:
CBackend.cpp updated: 1.339 -> 1.340
---
Log message:
Make sign extension work correctly for unusual bit widths.
---
Diffs of the changes: (+100 -28)
CBackend.cpp | 128 ++-
1 files changed, 100 insertions(+), 28 deletions(-)
Index: llvm/lib/Target/CBackend/CBackend.cpp
diff -u llvm/lib/Target/CBackend/CBackend.cpp:1.339
llvm/lib/Target/CBackend/CBackend.cpp:1.340
--- llvm/lib/Target/CBackend/CBackend.cpp:1.339 Tue May 1 16:15:46 2007
+++ llvm/lib/Target/CBackend/CBackend.cpp Tue May 1 21:17:41 2007
@@ -412,6 +412,29 @@
}
}
+#define IMPL_SIGN_EXTENSION(OpTy, Func) { \
+ const IntegerType* IntTy = cast(OpTy); \
+ unsigned BitWidth = IntTy->getBitWidth(); \
+ if (BitWidth != 8 && BitWidth != 16 && BitWidth != 32 && \
+ BitWidth != 64 && BitWidth != 128) { \
+const char * Suffix; \
+if (BitWidth <=32)\
+ Suffix = "U"; \
+else \
+ Suffix = "ULL"; \
+Out << "("; \
+Func; \
+Out << " & (1" << Suffix << " << " << BitWidth - 1 << " ) ? "; \
+Func; \
+Out << " | " << (~IntTy->getBitMask()) << Suffix << " : "; \
+Func; \
+Out << " & " << IntTy->getBitMask() << Suffix; \
+Out << ")";\
+ } \
+ else \
+Func; \
+ }
+
// Pass the Type* and the variable name and this prints out the variable
// declaration.
//
@@ -711,23 +734,39 @@
case Instruction::BitCast:
Out << "(";
printCast(CE->getOpcode(), CE->getOperand(0)->getType(), CE->getType());
- if (CE->getOpcode() == Instruction::SExt &&
- CE->getOperand(0)->getType() == Type::Int1Ty) {
-// Make sure we really sext from bool here by subtracting from 0
-Out << "0-";
- }
- printConstant(CE->getOperand(0));
- if (CE->getType() == Type::Int1Ty &&
- (CE->getOpcode() == Instruction::Trunc ||
+ if (CE->getOpcode() == Instruction::Trunc ||
CE->getOpcode() == Instruction::FPToUI ||
CE->getOpcode() == Instruction::FPToSI ||
- CE->getOpcode() == Instruction::PtrToInt)) {
-// Make sure we really truncate to bool here by anding with 1
-Out << "&1u";
+ CE->getOpcode() == Instruction::PtrToInt) {
+if (const IntegerType* IntTy = dyn_cast(CE->getType())) {
+ uint64_t BitMask = IntTy->getBitMask();
+ printConstant(CE->getOperand(0));
+ Out << "&" << BitMask << (IntTy->getBitWidth() <=32 ? "U": "ULL");
+}
}
- Out << ')';
+ else if (CE->getOpcode() == Instruction::SExt &&
+ CE->getOperand(0)->getType() == Type::Int1Ty) {
+// Make sure we really sext from bool here by subtracting from 0
+Out << "0-";
+printConstant(CE->getOperand(0));
+ }
+ else if (CE->getOpcode() == Instruction::SExt &&
+ CE->getOperand(0)->getType()->getTypeID() == Type::IntegerTyID)
{
+ IMPL_SIGN_EXTENSION(CE->getOperand(0)->getType(),
+ printConstant(CE->getOperand(0)));
+ }
+ else if (CE->getOpcode() == Instruction::ZExt &&
+CE->getOperand(0)->getType()->getTypeID() ==
Type::IntegerTyID){
+ const IntegerType* IntTy =
+ cast(CE->getOperand(0)->getType());
+ uint64_t BitMask = IntTy->getBitMask();
+ writeOperand(CE->getOperand(0));
+ Out << "&" << BitMask << (IntTy->getBitWidth() <=32 ? "U": "ULL");
+ }
+ else
+ printConstant(CE->getOperand(0));
+ Out << ")";
return;
-
case Instruction::GetElementPtr:
Out << "(&(";
printIndexingExpression(CE->getOperand(0), gep_type_begin(CPV),
@@ -1228,7 +1267,11 @@
Out << "((";
printSimpleType(Out, OpTy, castIsSigned);
Out << ")";
-writeOperand(Operand);
+if (castIsSigned && OpTy->getTypeID() == Type::IntegerTyID) {
+ IMPL_SIGN_EXTENSION(OpTy, writeOperand(Operand));
+}
+else
+ writeOperand(Operand);
Out << ")";
} else
writeOperand(Operand);
@@ -1253,7 +1296,9 @@
switch (predicate) {
default:
// for eq and ne, it doesn't matter
- break;
+ break;
+case ICmpInst::ICMP_EQ:
+case ICmpInst::ICMP_NE:
case ICmpInst::ICMP_UGT:
case ICmpInst::ICMP_UGE:
case ICmpInst::ICMP_ULT:
@@ -1278,10 +1323,25 @@
else
printType(Out, OpTy); // not integer, sign doesn't matter
Out << ")";
-writeOperand(Operand);
+if(castIsSigned && OpTy->getTypeID() == Type::IntegerTyID) {
+ IMPL_SIGN_EXTENSION(OpTy, writeOperand(Operand));
+} else {
+ writeOperand(Operand);
+ if(OpTy->getTypeID() == Type::IntegerTyID){
+const IntegerType * IntTy = cast(OpTy);
+uint64_t BitMask = IntTy->getBitMask();
+Out << "&" << BitMask << (IntTy->getBitWidth() <=32 ? "U": "ULL")
[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/bits.h
Changes in directory llvm-test/SingleSource/UnitTests/Integer:
bits.h updated: 1.4 -> 1.5
---
Log message:
Add some bit widths.
Make conversion from hex string easier.
---
Diffs of the changes: (+9 -1)
bits.h | 10 +-
1 files changed, 9 insertions(+), 1 deletion(-)
Index: llvm-test/SingleSource/UnitTests/Integer/bits.h
diff -u llvm-test/SingleSource/UnitTests/Integer/bits.h:1.4
llvm-test/SingleSource/UnitTests/Integer/bits.h:1.5
--- llvm-test/SingleSource/UnitTests/Integer/bits.h:1.4 Sat Apr 21 12:47:59 2007
+++ llvm-test/SingleSource/UnitTests/Integer/bits.h Tue May 1 21:35:26 2007
@@ -40,12 +40,14 @@
typedef unsigned int __attribute__((bitwidth(68))) uint68;
typedef unsigned int __attribute__((bitwidth(128))) uint128;
-typedef int __attribute__ ((bitwidth(9))) int9;
+typedef int __attribute__((bitwidth(9))) int9;
typedef int __attribute__((bitwidth(10))) int10;
typedef int __attribute__((bitwidth(21))) int21;
typedef int __attribute__((bitwidth(24))) int24;
typedef int __attribute__((bitwidth(32))) int32;
typedef int __attribute__((bitwidth(33))) int33;
+typedef int __attribute__((bitwidth(68))) int68;
+typedef int __attribute__((bitwidth(69))) int69;
typedef int __attribute__((bitwidth(169))) int169;
typedef unsigned int __attribute__((bitwidth(250))) int250;
@@ -111,3 +113,9 @@
__builtin_bit_from_string(&Result, str, 10); \
Result; \
})
+
+#define bitsFromHexString(str,bits) ({ \
+ int __attribute__((bitwidth(bits))) Result; \
+ __builtin_bit_from_string(&Result, str, 16); \
+ Result; \
+})
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[llvm-commits] CVS: llvm/lib/VMCore/Pass.cpp
Changes in directory llvm/lib/VMCore:
Pass.cpp updated: 1.88 -> 1.89
---
Log message:
disable this assertion as a hack to get the build more unbroken :(
---
Diffs of the changes: (+1 -1)
Pass.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/VMCore/Pass.cpp
diff -u llvm/lib/VMCore/Pass.cpp:1.88 llvm/lib/VMCore/Pass.cpp:1.89
--- llvm/lib/VMCore/Pass.cpp:1.88 Tue May 1 16:15:47 2007
+++ llvm/lib/VMCore/Pass.cppTue May 1 23:01:44 2007
@@ -155,7 +155,7 @@
void RegisterPass(PassInfo &PI) {
bool Inserted =
PassInfoMap.insert(std::make_pair(PI.getTypeInfo(),&PI)).second;
-assert(Inserted && "Pass registered multiple times!");
+//assert(Inserted && "Pass registered multiple times!");
}
void UnregisterPass(PassInfo &PI) {
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Re: [llvm-commits] CVS: llvm/lib/Target/ARM/ARMConstantIslandPass.cpp ARMLoadStoreOptimizer.cpp
> +static const int ID;
> +ARMConstantIslands() : MachineFunctionPass((intptr_t)&ID) {}
Why the cast to intptr_t? Why not just make the ctors take void* ?
-Chris
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[llvm-commits] CVS: llvm/lib/VMCore/Pass.cpp
Changes in directory llvm/lib/VMCore:
Pass.cpp updated: 1.89 -> 1.90
---
Log message:
revert enough of devang's recent patches to get the tree basically working again
---
Diffs of the changes: (+16 -15)
Pass.cpp | 31 ---
1 files changed, 16 insertions(+), 15 deletions(-)
Index: llvm/lib/VMCore/Pass.cpp
diff -u llvm/lib/VMCore/Pass.cpp:1.89 llvm/lib/VMCore/Pass.cpp:1.90
--- llvm/lib/VMCore/Pass.cpp:1.89 Tue May 1 23:01:44 2007
+++ llvm/lib/VMCore/Pass.cppTue May 1 23:25:31 2007
@@ -133,7 +133,7 @@
class PassRegistrar {
/// PassInfoMap - Keep track of the passinfo object for each registered llvm
/// pass.
- std::map PassInfoMap;
+ std::map PassInfoMap;
/// AnalysisGroupInfo - Keep track of information for each analysis group.
struct AnalysisGroupInfo {
@@ -147,19 +147,19 @@
public:
- const PassInfo *GetPassInfo(intptr_t TI) const {
-std::map::const_iterator I = PassInfoMap.find(TI);
+ const PassInfo *GetPassInfo(const std::type_info &TI) const {
+std::map::const_iterator I = PassInfoMap.find(TI);
return I != PassInfoMap.end() ? I->second : 0;
}
void RegisterPass(PassInfo &PI) {
bool Inserted =
- PassInfoMap.insert(std::make_pair(PI.getTypeInfo(),&PI)).second;
-//assert(Inserted && "Pass registered multiple times!");
+
PassInfoMap.insert(std::make_pair(TypeInfo(PI.getTypeInfo()),&PI)).second;
+assert(Inserted && "Pass registered multiple times!");
}
void UnregisterPass(PassInfo &PI) {
-std::map::iterator I =
+std::map::iterator I =
PassInfoMap.find(PI.getTypeInfo());
assert(I != PassInfoMap.end() && "Pass registered but not in map!");
@@ -168,7 +168,7 @@
}
void EnumerateWith(PassRegistrationListener *L) {
-for (std::map::const_iterator I = PassInfoMap.begin(),
+for (std::map::const_iterator I = PassInfoMap.begin(),
E = PassInfoMap.end(); I != E; ++I)
L->passEnumerate(I->second);
}
@@ -210,10 +210,11 @@
// getPassInfo - Return the PassInfo data structure that corresponds to this
// pass...
const PassInfo *Pass::getPassInfo() const {
- return lookupPassInfo(PassID);
+ if (PassInfoCache) return PassInfoCache;
+ return lookupPassInfo(typeid(*this));
}
-const PassInfo *Pass::lookupPassInfo(intptr_t TI) {
+const PassInfo *Pass::lookupPassInfo(const std::type_info &TI) {
return getPassRegistrar()->GetPassInfo(TI);
}
@@ -237,12 +238,12 @@
// RegisterAGBase implementation
//
-RegisterAGBase::RegisterAGBase(intptr_t InterfaceID,
- intptr_t PassID, bool isDefault)
- : RegisterPassBase(InterfaceID),
+RegisterAGBase::RegisterAGBase(const std::type_info &Interface,
+ const std::type_info *Pass, bool isDefault)
+ : RegisterPassBase(Interface),
ImplementationInfo(0), isDefaultImplementation(isDefault) {
- InterfaceInfo = const_cast(Pass::lookupPassInfo(InterfaceID));
+ InterfaceInfo = const_cast(Pass::lookupPassInfo(Interface));
if (InterfaceInfo == 0) {
// First reference to Interface, register it now.
registerPass();
@@ -251,8 +252,8 @@
assert(PIObj.isAnalysisGroup() &&
"Trying to join an analysis group that is a normal pass!");
- if (PassID) {
-ImplementationInfo = Pass::lookupPassInfo(PassID);
+ if (Pass) {
+ImplementationInfo = Pass::lookupPassInfo(*Pass);
assert(ImplementationInfo &&
"Must register pass before adding to AnalysisGroup!");
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[llvm-commits] CVS: llvm/include/llvm/Pass.h PassSupport.h
Changes in directory llvm/include/llvm:
Pass.h updated: 1.87 -> 1.88
PassSupport.h updated: 1.39 -> 1.40
---
Log message:
revert enough of devang's recent patches to get the tree basically working again
---
Diffs of the changes: (+20 -20)
Pass.h| 14 +++---
PassSupport.h | 26 +-
2 files changed, 20 insertions(+), 20 deletions(-)
Index: llvm/include/llvm/Pass.h
diff -u llvm/include/llvm/Pass.h:1.87 llvm/include/llvm/Pass.h:1.88
--- llvm/include/llvm/Pass.h:1.87 Tue May 1 16:15:46 2007
+++ llvm/include/llvm/Pass.hTue May 1 23:25:30 2007
@@ -34,8 +34,8 @@
#include
#include
#include
+#include
#include
-#include
namespace llvm {
@@ -77,7 +77,7 @@
///
class Pass {
AnalysisResolver *Resolver; // Used to resolve analysis
- intptr_t PassID;
+ const PassInfo *PassInfoCache;
// AnalysisImpls - This keeps track of which passes implement the interfaces
// that are required by the current pass (to implement getAnalysis()).
@@ -87,7 +87,7 @@
void operator=(const Pass&); // DO NOT IMPLEMENT
Pass(const Pass &); // DO NOT IMPLEMENT
public:
- Pass(intptr_t pid) : Resolver(0), PassID(pid) {}
+ Pass(intptr_t pid = 0) : Resolver(0), PassInfoCache(0) {}
virtual ~Pass();
/// getPassName - Return a nice clean name for a pass. This usually
@@ -163,12 +163,12 @@
template
static const PassInfo *getClassPassInfo() {
-return lookupPassInfo((intptr_t)&AnalysisClass::ID);
+return lookupPassInfo(typeid(AnalysisClass));
}
// lookupPassInfo - Return the pass info object for the specified pass class,
// or null if it is not known.
- static const PassInfo *lookupPassInfo(intptr_t TI);
+ static const PassInfo *lookupPassInfo(const std::type_info &TI);
/// getAnalysisToUpdate() - This function is used by subclasses
/// to get to the analysis information that might be around that needs to be
@@ -274,7 +274,7 @@
class FunctionPass : public Pass {
public:
FunctionPass(intptr_t pid) : Pass(pid) {}
-
+
/// doInitialization - Virtual method overridden by subclasses to do
/// any necessary per-module initialization.
///
@@ -325,7 +325,7 @@
class BasicBlockPass : public Pass {
public:
BasicBlockPass(intptr_t pid) : Pass(pid) {}
-
+
/// doInitialization - Virtual method overridden by subclasses to do
/// any necessary per-module initialization.
///
Index: llvm/include/llvm/PassSupport.h
diff -u llvm/include/llvm/PassSupport.h:1.39
llvm/include/llvm/PassSupport.h:1.40
--- llvm/include/llvm/PassSupport.h:1.39Tue May 1 16:15:46 2007
+++ llvm/include/llvm/PassSupport.h Tue May 1 23:25:30 2007
@@ -37,19 +37,19 @@
class PassInfo {
const char *PassName; // Nice name for Pass
const char *PassArgument; // Command Line argument to run this
pass
- intptr_t PassID;
+ const std::type_info &TypeInfo; // type_info object for this Pass class
bool IsCFGOnlyPass; // Pass only looks at the CFG.
bool IsAnalysisGroup;// True if an analysis group.
std::vector ItfImpl;// Interfaces implemented by this pass
- Pass *(*NormalCtor)();
+ Pass *(*NormalCtor)(); // No argument ctor
public:
/// PassInfo ctor - Do not call this directly, this should only be invoked
/// through RegisterPass.
- PassInfo(const char *name, const char *arg, intptr_t pi,
+ PassInfo(const char *name, const char *arg, const std::type_info &ti,
Pass *(*normal)() = 0, bool isCFGOnly = false)
-: PassName(name), PassArgument(arg), PassID(pi),
+: PassName(name), PassArgument(arg), TypeInfo(ti),
IsCFGOnlyPass(isCFGOnly), IsAnalysisGroup(false), NormalCtor(normal) {
}
@@ -65,8 +65,8 @@
const char *getPassArgument() const { return PassArgument; }
/// getTypeInfo - Return the type_info object for the pass...
- /// TODO : Rename
- intptr_t getTypeInfo() const { return PassID; }
+ ///
+ const std::type_info &getTypeInfo() const { return TypeInfo; }
/// isAnalysisGroup - Return true if this is an analysis group, not a normal
/// pass.
@@ -139,12 +139,12 @@
typedef Pass* (*NormalCtor_t)();
- RegisterPassBase(const char *Name, const char *Arg, intptr_t TI,
+ RegisterPassBase(const char *Name, const char *Arg, const std::type_info &TI,
NormalCtor_t NormalCtor = 0, bool CFGOnly = false)
: PIObj(Name, Arg, TI, NormalCtor, CFGOnly) {
registerPass();
}
- RegisterPassBase(intptr_t TI)
+ RegisterPassBase(const std::type_info &TI)
: PIObj("", "", TI) {
// This ctor may only be used for analysis groups: it does not
auto-register
// the pass.
@@ -165,7 +165,7 @@
// Register Pass using default constructor...
RegisterPass(const char *PassArg, const char *Name, bool CFGOnly = false)
-: RegisterPassBase(Name, PassArg, (intptr_t)&PassName::ID,
+ : RegisterPassBase(Name, Pas
[llvm-commits] CVS: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Changes in directory llvm/lib/Bitcode/Writer:
BitcodeWriter.cpp updated: 1.19 -> 1.20
---
Log message:
use the correct code for binop instrs
---
Diffs of the changes: (+1 -1)
BitcodeWriter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff -u llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.19
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.20
--- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.19 Tue May 1 02:03:37 2007
+++ llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Tue May 1 23:26:36 2007
@@ -497,7 +497,7 @@
Vals.push_back(VE.getValueID(I.getOperand(0)));
} else {
assert(isa(I) && "Unknown instruction!");
- Code = bitc::CST_CODE_CE_BINOP;
+ Code = bitc::FUNC_CODE_INST_BINOP;
Vals.push_back(GetEncodedBinaryOpcode(I.getOpcode()));
Vals.push_back(VE.getTypeID(I.getType()));
Vals.push_back(VE.getValueID(I.getOperand(0)));
___
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[llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.21 -> 1.22
---
Log message:
read a few instructions, fix some bugs. This is enough to be able to round
trip function bodies like this:
define <2 x i64> @foo(<2 x i64> %x, <2 x i64> %y) {
%tmp4 = bitcast <2 x i64> %y to <8 x i16> ; <<8 x i16>>
[#uses=1]
%tmp5 = bitcast <2 x i64> %x to <8 x i16> ; <<8 x i16>>
[#uses=1]
%tmp = add <8 x i16> %tmp5, %tmp4 ; <<8 x i16>> [#uses=1]
%tmp6 = bitcast <8 x i16> %tmp to <2 x i64> ; <<2 x i64>>
[#uses=1]
ret <2 x i64> %tmp6
}
---
Diffs of the changes: (+38 -15)
BitcodeReader.cpp | 53 ++---
1 files changed, 38 insertions(+), 15 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.21
llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.22
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.21 Tue May 1 02:01:57 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Tue May 1 23:27:25 2007
@@ -1006,7 +1006,9 @@
ValueList.push_back(I);
unsigned NextValueNo = ValueList.size();
-
+ BasicBlock *CurBB = 0;
+ unsigned CurBBNo = 0;
+
// Read all the records.
SmallVector Record;
while (1) {
@@ -1042,8 +1044,6 @@
// Read a record.
Record.clear();
Instruction *I = 0;
-BasicBlock *CurBB = 0;
-unsigned CurBBNo = 0;
switch (Stream.ReadRecord(Code, Record)) {
default: // Default behavior: reject
return Error("Unknown instruction");
@@ -1057,8 +1057,7 @@
CurBB = FunctionBBs[0];
continue;
-case bitc::FUNC_CODE_INST_BINOP: {
- // BINOP: [opcode, ty, opval, opval]
+case bitc::FUNC_CODE_INST_BINOP: {// BINOP: [opcode, ty, opval, opval]
if (Record.size() < 4) return Error("Invalid BINOP record");
const Type *Ty = getTypeByID(Record[1]);
int Opc = GetDecodedBinaryOpcode(Record[0], Ty);
@@ -1069,9 +1068,18 @@
I = BinaryOperator::create((Instruction::BinaryOps)Opc, LHS, RHS);
break;
}
+case bitc::FUNC_CODE_INST_CAST: {// CAST: [opcode, ty, opty, opval]
+ if (Record.size() < 4) return Error("Invalid CAST record");
+ int Opc = GetDecodedCastOpcode(Record[0]);
+ const Type *ResTy = getTypeByID(Record[1]);
+ const Type *OpTy = getTypeByID(Record[2]);
+ Value *Op = getFnValueByID(Record[3], OpTy);
+ if (Opc == -1 || ResTy == 0 || OpTy == 0 || Op == 0)
+return Error("Invalid CAST record");
+ I = CastInst::create((Instruction::CastOps)Opc, Op, ResTy);
+ break;
+}
#if 0
-case bitc::FUNC_CODE_INST_CAST:
- // CAST: [opcode, ty, opty, opval]
case bitc::FUNC_CODE_INST_GEP:
// GEP:[n, n x operands]
case bitc::FUNC_CODE_INST_SELECT:
@@ -1084,20 +1092,35 @@
// SHUFFLEVEC: [ty, opval, opval, opval]
case bitc::FUNC_CODE_INST_CMP:
// CMP:[opty, opval, opval, pred]
-
-case bitc::FUNC_CODE_INST_RET:
- // RET:[opty,opval]
+#endif
+
+case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval]
+ if (Record.size() == 0) {
+I = new ReturnInst();
+break;
+ }
+ if (Record.size() == 2) {
+const Type *OpTy = getTypeByID(Record[0]);
+Value *Op = getFnValueByID(Record[1], OpTy);
+if (OpTy && Op);
+I = new ReturnInst(Op);
+break;
+ }
+ return Error("Invalid RET record");
+#if 0
case bitc::FUNC_CODE_INST_BR:
// BR: [opval, bb#, bb#] or [bb#]
case bitc::FUNC_CODE_INST_SWITCH:
// SWITCH: [opty, opval, n, n x ops]
case bitc::FUNC_CODE_INST_INVOKE:
// INVOKE: [fnty, op0,op1,op2, ...]
-case bitc::FUNC_CODE_INST_UNWIND:
- // UNWIND
-case bitc::FUNC_CODE_INST_UNREACHABLE:
- // UNREACHABLE
-
+case bitc::FUNC_CODE_INST_UNWIND: // UNWIND
+ I = new UnwindInst();
+ break;
+case bitc::FUNC_CODE_INST_UNREACHABLE: // UNREACHABLE
+ I = new UnreachableInst();
+ break;
+
case bitc::FUNC_CODE_INST_PHI:
// PHI:[ty, #ops, val0,bb0, ...]
case bitc::FUNC_CODE_INST_MALLOC:
___
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[llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.22 -> 1.23
---
Log message:
add reader support for a bunch of new instructions
---
Diffs of the changes: (+90 -14)
BitcodeReader.cpp | 104 ++
1 files changed, 90 insertions(+), 14 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.22
llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.23
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.22 Tue May 1 23:27:25 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Wed May 2 00:16:49 2007
@@ -150,6 +150,9 @@
return V;
}
+ // No type specified, must be invalid reference.
+ if (Ty == 0) return 0;
+
// Create and return a placeholder, which will later be RAUW'd.
Value *V = new Argument(Ty);
Uses[Idx].init(V, this);
@@ -1079,21 +1082,94 @@
I = CastInst::create((Instruction::CastOps)Opc, Op, ResTy);
break;
}
-#if 0
-case bitc::FUNC_CODE_INST_GEP:
- // GEP:[n, n x operands]
-case bitc::FUNC_CODE_INST_SELECT:
- // SELECT: [ty, opval, opval, opval]
-case bitc::FUNC_CODE_INST_EXTRACTELT:
- // EXTRACTELT: [opty, opval, opval]
-case bitc::FUNC_CODE_INST_INSERTELT:
- // INSERTELT: [ty, opval, opval, opval]
-case bitc::FUNC_CODE_INST_SHUFFLEVEC:
- // SHUFFLEVEC: [ty, opval, opval, opval]
-case bitc::FUNC_CODE_INST_CMP:
- // CMP:[opty, opval, opval, pred]
-#endif
+case bitc::FUNC_CODE_INST_GEP: { // GEP: [n, n x operands]
+ if (Record.size() < 2 || (Record.size() & 1))
+return Error("Invalid GEP record");
+ const Type *OpTy = getTypeByID(Record[0]);
+ Value *Op = getFnValueByID(Record[1], OpTy);
+ if (OpTy == 0 || Op == 0)
+return Error("Invalid GEP record");
+
+ SmallVector GEPIdx;
+ for (unsigned i = 1, e = Record.size()/2; i != e; ++i) {
+const Type *IdxTy = getTypeByID(Record[i*2]);
+Value *Idx = getFnValueByID(Record[i*2+1], IdxTy);
+if (IdxTy == 0 || Idx == 0)
+ return Error("Invalid GEP record");
+GEPIdx.push_back(Idx);
+ }
+
+ I = new GetElementPtrInst(Op, &GEPIdx[0], GEPIdx.size());
+ break;
+}
+case bitc::FUNC_CODE_INST_SELECT: { // SELECT: [ty, opval, opval, opval]
+ if (Record.size() < 4) return Error("Invalid SELECT record");
+ const Type *Ty = getTypeByID(Record[0]);
+ Value *Cond = getFnValueByID(Record[1], Type::Int1Ty);
+ Value *LHS = getFnValueByID(Record[2], Ty);
+ Value *RHS = getFnValueByID(Record[3], Ty);
+ if (Ty == 0 || Cond == 0 || LHS == 0 || RHS == 0)
+return Error("Invalid SELECT record");
+ I = new SelectInst(Cond, LHS, RHS);
+ break;
+}
+
+case bitc::FUNC_CODE_INST_EXTRACTELT: { // EXTRACTELT: [opty, opval, opval]
+ if (Record.size() < 3) return Error("Invalid EXTRACTELT record");
+ const Type *OpTy = getTypeByID(Record[0]);
+ Value *Vec = getFnValueByID(Record[1], OpTy);
+ Value *Idx = getFnValueByID(Record[2], Type::Int32Ty);
+ if (OpTy == 0 || Vec == 0 || Idx == 0)
+return Error("Invalid EXTRACTELT record");
+ I = new ExtractElementInst(Vec, Idx);
+ break;
+}
+
+case bitc::FUNC_CODE_INST_INSERTELT: { // INSERTELT: [ty,
opval,opval,opval]
+ if (Record.size() < 4) return Error("Invalid INSERTELT record");
+ const VectorType *OpTy =
+dyn_cast_or_null(getTypeByID(Record[0]));
+ if (OpTy == 0) return Error("Invalid INSERTELT record");
+ Value *Vec = getFnValueByID(Record[1], OpTy);
+ Value *Elt = getFnValueByID(Record[2], OpTy->getElementType());
+ Value *Idx = getFnValueByID(Record[3], Type::Int32Ty);
+ if (Vec == 0 || Elt == 0 || Idx == 0)
+return Error("Invalid INSERTELT record");
+ I = new InsertElementInst(Vec, Elt, Idx);
+ break;
+}
+
+case bitc::FUNC_CODE_INST_SHUFFLEVEC: {// SHUFFLEVEC:
[ty,opval,opval,opval]
+ if (Record.size() < 4) return Error("Invalid SHUFFLEVEC record");
+ const VectorType *OpTy =
+dyn_cast_or_null(getTypeByID(Record[0]));
+ if (OpTy == 0) return Error("Invalid SHUFFLEVEC record");
+ Value *Vec1 = getFnValueByID(Record[1], OpTy);
+ Value *Vec2 = getFnValueByID(Record[2], OpTy);
+ Value *Mask = getFnValueByID(Record[3],
+ VectorType::get(Type::Int32Ty,
+ OpTy->getNumElements()));
+ if (Vec1 == 0 || Vec2 == 0 || Mask == 0)
+return Error("Invalid SHUFFLEVEC record");
+ I = new ShuffleVectorInst(Vec1, Vec2, Mask);
+ break;
+}
+
+case bitc::FUNC_CODE_INST_CMP: { // CMP: [opty, opval, opval, pred]
+ if (Record.size() < 4) return Error("Invalid CMP record");
+ const Type *OpTy = getTypeByID(Record[0]);
+ Value *LHS = getFnValu
[llvm-commits] CVS: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Changes in directory llvm/lib/Bitcode/Writer:
BitcodeWriter.cpp updated: 1.20 -> 1.21
---
Log message:
add reader logic for terminator instrs.
---
Diffs of the changes: (+0 -2)
BitcodeWriter.cpp |2 --
1 files changed, 2 deletions(-)
Index: llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
diff -u llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.20
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.21
--- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp:1.20 Tue May 1 23:26:36 2007
+++ llvm/lib/Bitcode/Writer/BitcodeWriter.cpp Wed May 2 00:46:45 2007
@@ -507,7 +507,6 @@
case Instruction::GetElementPtr:
Code = bitc::FUNC_CODE_INST_GEP;
-Vals.push_back(I.getNumOperands());
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
Vals.push_back(VE.getTypeID(I.getOperand(i)->getType()));
Vals.push_back(VE.getValueID(I.getOperand(i)));
@@ -567,7 +566,6 @@
case Instruction::Switch:
Code = bitc::FUNC_CODE_INST_SWITCH;
Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
-Vals.push_back(I.getNumOperands());
for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
Vals.push_back(VE.getValueID(I.getOperand(i)));
break;
___
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[llvm-commits] CVS: llvm/lib/Bitcode/Reader/BitcodeReader.cpp BitcodeReader.h
Changes in directory llvm/lib/Bitcode/Reader:
BitcodeReader.cpp updated: 1.23 -> 1.24
BitcodeReader.h updated: 1.15 -> 1.16
---
Log message:
add reader logic for terminator instrs.
---
Diffs of the changes: (+93 -8)
BitcodeReader.cpp | 97 +-
BitcodeReader.h |4 ++
2 files changed, 93 insertions(+), 8 deletions(-)
Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp
diff -u llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.23
llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.24
--- llvm/lib/Bitcode/Reader/BitcodeReader.cpp:1.23 Wed May 2 00:16:49 2007
+++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp Wed May 2 00:46:45 2007
@@ -1090,7 +1090,7 @@
if (OpTy == 0 || Op == 0)
return Error("Invalid GEP record");
- SmallVector GEPIdx;
+ SmallVector GEPIdx;
for (unsigned i = 1, e = Record.size()/2; i != e; ++i) {
const Type *IdxTy = getTypeByID(Record[i*2]);
Value *Idx = getFnValueByID(Record[i*2+1], IdxTy);
@@ -1183,19 +1183,100 @@
break;
}
return Error("Invalid RET record");
-#if 0
-case bitc::FUNC_CODE_INST_BR:
- // BR: [opval, bb#, bb#] or [bb#]
-case bitc::FUNC_CODE_INST_SWITCH:
- // SWITCH: [opty, opval, n, n x ops]
-case bitc::FUNC_CODE_INST_INVOKE:
- // INVOKE: [fnty, op0,op1,op2, ...]
+case bitc::FUNC_CODE_INST_BR: { // BR: [bb#, bb#, opval] or [bb#]
+ if (Record.size() != 1 || Record.size() != 3)
+return Error("Invalid BR record");
+ BasicBlock *TrueDest = getBasicBlock(Record[0]);
+ if (TrueDest == 0)
+return Error("Invalid BR record");
+
+ if (Record.size() == 1)
+I = new BranchInst(TrueDest);
+ else {
+BasicBlock *FalseDest = getBasicBlock(Record[1]);
+Value *Cond = getFnValueByID(Record[2], Type::Int1Ty);
+if (FalseDest == 0 || Cond == 0)
+ return Error("Invalid BR record");
+I = new BranchInst(TrueDest, FalseDest, Cond);
+ }
+ break;
+}
+case bitc::FUNC_CODE_INST_SWITCH: { // SWITCH: [opty, opval, n, n x ops]
+ if (Record.size() < 3 || (Record.size() & 1) == 0)
+return Error("Invalid SWITCH record");
+ const Type *OpTy = getTypeByID(Record[0]);
+ Value *Cond = getFnValueByID(Record[1], OpTy);
+ BasicBlock *Default = getBasicBlock(Record[2]);
+ if (OpTy == 0 || Cond == 0 || Default == 0)
+return Error("Invalid SWITCH record");
+ unsigned NumCases = (Record.size()-3)/2;
+ SwitchInst *SI = new SwitchInst(Cond, Default, NumCases);
+ for (unsigned i = 0, e = NumCases; i != e; ++i) {
+ConstantInt *CaseVal =
+ dyn_cast_or_null(getFnValueByID(Record[3+i*2], OpTy));
+BasicBlock *DestBB = getBasicBlock(Record[1+3+i*2]);
+if (CaseVal == 0 || DestBB == 0) {
+ delete SI;
+ return Error("Invalid SWITCH record!");
+}
+SI->addCase(CaseVal, DestBB);
+ }
+ I = SI;
+ break;
+}
+
+case bitc::FUNC_CODE_INST_INVOKE: { // INVOKE: [fnty, op0,op1,op2, ...]
+ if (Record.size() < 4)
+return Error("Invalid INVOKE record");
+ const PointerType *CalleeTy =
+dyn_cast_or_null(getTypeByID(Record[0]));
+ Value *Callee = getFnValueByID(Record[1], CalleeTy);
+ BasicBlock *NormalBB = getBasicBlock(Record[2]);
+ BasicBlock *UnwindBB = getBasicBlock(Record[3]);
+ if (CalleeTy == 0 || Callee == 0 || NormalBB == 0 || UnwindBB == 0)
+return Error("Invalid INVOKE record");
+
+ const FunctionType *FTy =
+dyn_cast(CalleeTy->getElementType());
+
+ // Check that the right number of fixed parameters are here.
+ if (FTy == 0 || Record.size() < 4+FTy->getNumParams())
+return Error("Invalid INVOKE record");
+
+ SmallVector Ops;
+ for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i) {
+Ops.push_back(getFnValueByID(Record[4+i], FTy->getParamType(4+i)));
+if (Ops.back() == 0)
+ return Error("Invalid INVOKE record");
+ }
+
+ unsigned FirstVarargParam = 4+FTy->getNumParams();
+ if (FTy->isVarArg()) {
+// Read type/value pairs for varargs params.
+if ((Record.size()-FirstVarargParam) & 1)
+ return Error("Invalid INVOKE record");
+
+for (unsigned i = FirstVarargParam, e = Record.size(); i != e; i += 2)
{
+ const Type *ArgTy = getTypeByID(Record[i]);
+ Ops.push_back(getFnValueByID(Record[i+1], ArgTy));
+ if (Ops.back() == 0 || ArgTy == 0)
+return Error("Invalid INVOKE record");
+}
+ } else {
+if (Record.size() != FirstVarargParam)
+ return Error("Invalid INVOKE record");
+ }
+
+ I = new InvokeInst(Callee, NormalBB, UnwindBB, &Ops[0], Ops.size());
+ break;
+}
case bitc::FUNC_CODE_INST_UNWIND: // UNWIND
I = new UnwindInst();
[llvm-commits] CVS: llvm/include/llvm/Bitcode/LLVMBitCodes.h
Changes in directory llvm/include/llvm/Bitcode: LLVMBitCodes.h updated: 1.10 -> 1.11 --- Log message: update to reflect reality --- Diffs of the changes: (+1 -1) LLVMBitCodes.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/Bitcode/LLVMBitCodes.h diff -u llvm/include/llvm/Bitcode/LLVMBitCodes.h:1.10 llvm/include/llvm/Bitcode/LLVMBitCodes.h:1.11 --- llvm/include/llvm/Bitcode/LLVMBitCodes.h:1.10 Mon Apr 30 21:12:05 2007 +++ llvm/include/llvm/Bitcode/LLVMBitCodes.hWed May 2 00:47:22 2007 @@ -165,7 +165,7 @@ FUNC_CODE_INST_CMP = 9, // CMP:[opty, opval, opval, pred] FUNC_CODE_INST_RET = 10, // RET:[opty,opval] -FUNC_CODE_INST_BR = 11, // BR: [opval, bb#, bb#] or [bb#] +FUNC_CODE_INST_BR = 11, // BR: [bb#, bb#, cond] or [bb#] FUNC_CODE_INST_SWITCH = 12, // SWITCH: [opty, opval, n, n x ops] FUNC_CODE_INST_INVOKE = 13, // INVOKE: [fnty, op0,op1,op2, ...] FUNC_CODE_INST_UNWIND = 14, // UNWIND ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
On May 1, 2007, at 1:28 PM, Nate Begeman wrote: >> I believe that sub/super register generator unions the set of sub/ >> super registers in a deterministic fashion and produces the >> necessary tables in the RegisterInfo.inc already. The only thing is >> that this would make the sub register index implicit in the >> ordering of the sub register list in the RegisterInfo.td. > > I'm not sure things are sufficiently well ordered internally for > that, or sorted in any particular fashion. I'll look into it, but it > seems like it would be less flexible and make the td files far less > intuitive as to what is actually going on. If tablegen picked the > numbering, I would have to go read the generated file to know what to > write in the ISel for that backend, which seems backwards to me. I agree with both of you. We should have the subreg number in the .td file, but we should merge this with the existing subreg stuff if possible. One simple thing would be for nates new syntax to populate the old tables, making the old syntax unneeded? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
