On May 1, 2007, at 2:03 PM, Christopher Lamb wrote: > I see the problem in generating the ISel. Perhaps it would be be > best to go the other way and have the sub/super reg sets be > determined by the the explicit sets defined. My goal was simply to > eliminate redundant, and possibly erroneously conflicting > information from the file. Right now there are two different ways > to specify sub registers, and if they don't match there could be > problems. > >> >>> Also, would it be possible to emit the information gathered as >>> table lookups rather than a massive two level switch statement? I >>> believe all the information to get the necessary mappings should be >>> available. >> >> It would be possible, but seems like significantly more work. I'm >> sure it will be possible to improve upon the initial implementation, >> which should be good enough to address most of the issues blocked by >> the lack of subregs exposed to the selection dag. > > Thanks for working on this. I didn't expect to get it addressed for > quite a while!
No prob. I appreciate the feedback; I'll definitely be keeping it in mind while I finish the rest of the bug. Hopefully for 2.1 we can have everything done with no duplication of subreg info. Thanks, Nate _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
